1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these except perhaps the floating-point CONST_DOUBLEs
91 are unique; no other rtx-object will be equal to any of these. */
93 rtx global_rtl[GR_MAX];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static htab_t mem_attrs_htab;
151 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
152 shortly thrown away. We use two mechanisms to prevent this waste:
154 For sizes up to 5 elements, we keep a SEQUENCE and its associated
155 rtvec for use by gen_sequence. One entry for each size is
156 sufficient because most cases are calls to gen_sequence followed by
157 immediately emitting the SEQUENCE. Reuse is safe since emitting a
158 sequence is destructive on the insn in it anyway and hence can't be
161 We do not bother to save this cached data over nested function calls.
162 Instead, we just reinitialize them. */
164 #define SEQUENCE_RESULT_SIZE 5
166 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
168 /* During RTL generation, we also keep a list of free INSN rtl codes. */
169 static rtx free_insn;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_linenum (cfun->emit->x_last_linenum)
175 #define last_filename (cfun->emit->x_last_filename)
176 #define first_label_num (cfun->emit->x_first_label_num)
178 static rtx make_jump_insn_raw PARAMS ((rtx));
179 static rtx make_call_insn_raw PARAMS ((rtx));
180 static rtx find_line_note PARAMS ((rtx));
181 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
182 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
184 static void unshare_all_rtl_1 PARAMS ((rtx));
185 static void unshare_all_decls PARAMS ((tree));
186 static void reset_used_decls PARAMS ((tree));
187 static void mark_label_nuses PARAMS ((rtx));
188 static hashval_t const_int_htab_hash PARAMS ((const void *));
189 static int const_int_htab_eq PARAMS ((const void *,
191 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
192 static int mem_attrs_htab_eq PARAMS ((const void *,
194 static void mem_attrs_mark PARAMS ((const void *));
195 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
198 static tree component_ref_for_mem_expr PARAMS ((tree));
199 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
201 /* Probability of the conditional branch currently proceeded by try_split.
202 Set to -1 otherwise. */
203 int split_branch_probability = -1;
205 /* Returns a hash code for X (which is a really a CONST_INT). */
208 const_int_htab_hash (x)
211 return (hashval_t) INTVAL ((const struct rtx_def *) x);
214 /* Returns non-zero if the value represented by X (which is really a
215 CONST_INT) is the same as that given by Y (which is really a
219 const_int_htab_eq (x, y)
223 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
226 /* Returns a hash code for X (which is a really a mem_attrs *). */
229 mem_attrs_htab_hash (x)
232 mem_attrs *p = (mem_attrs *) x;
234 return (p->alias ^ (p->align * 1000)
235 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
236 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
240 /* Returns non-zero if the value represented by X (which is really a
241 mem_attrs *) is the same as that given by Y (which is also really a
245 mem_attrs_htab_eq (x, y)
249 mem_attrs *p = (mem_attrs *) x;
250 mem_attrs *q = (mem_attrs *) y;
252 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
253 && p->size == q->size && p->align == q->align);
256 /* This routine is called when we determine that we need a mem_attrs entry.
257 It marks the associated decl and RTL as being used, if present. */
263 mem_attrs *p = (mem_attrs *) x;
266 ggc_mark_tree (p->expr);
269 ggc_mark_rtx (p->offset);
272 ggc_mark_rtx (p->size);
275 /* Allocate a new mem_attrs structure and insert it into the hash table if
276 one identical to it is not already in the table. We are doing this for
280 get_mem_attrs (alias, expr, offset, size, align, mode)
286 enum machine_mode mode;
291 /* If everything is the default, we can just return zero. */
292 if (alias == 0 && expr == 0 && offset == 0
294 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
295 && (align == BITS_PER_UNIT
297 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
302 attrs.offset = offset;
306 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
309 *slot = ggc_alloc (sizeof (mem_attrs));
310 memcpy (*slot, &attrs, sizeof (mem_attrs));
316 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
317 don't attempt to share with the various global pieces of rtl (such as
318 frame_pointer_rtx). */
321 gen_raw_REG (mode, regno)
322 enum machine_mode mode;
325 rtx x = gen_rtx_raw_REG (mode, regno);
326 ORIGINAL_REGNO (x) = regno;
330 /* There are some RTL codes that require special attention; the generation
331 functions do the raw handling. If you add to this list, modify
332 special_rtx in gengenrtl.c as well. */
335 gen_rtx_CONST_INT (mode, arg)
336 enum machine_mode mode ATTRIBUTE_UNUSED;
341 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
342 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
344 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
345 if (const_true_rtx && arg == STORE_FLAG_VALUE)
346 return const_true_rtx;
349 /* Look up the CONST_INT in the hash table. */
350 slot = htab_find_slot_with_hash (const_int_htab, &arg,
351 (hashval_t) arg, INSERT);
353 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
358 /* CONST_DOUBLEs needs special handling because their length is known
362 gen_rtx_CONST_DOUBLE (mode, arg0, arg1)
363 enum machine_mode mode;
364 HOST_WIDE_INT arg0, arg1;
366 rtx r = rtx_alloc (CONST_DOUBLE);
370 X0EXP (r, 0) = NULL_RTX;
374 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 2; --i)
381 gen_rtx_REG (mode, regno)
382 enum machine_mode mode;
385 /* In case the MD file explicitly references the frame pointer, have
386 all such references point to the same frame pointer. This is
387 used during frame pointer elimination to distinguish the explicit
388 references to these registers from pseudos that happened to be
391 If we have eliminated the frame pointer or arg pointer, we will
392 be using it as a normal register, for example as a spill
393 register. In such cases, we might be accessing it in a mode that
394 is not Pmode and therefore cannot use the pre-allocated rtx.
396 Also don't do this when we are making new REGs in reload, since
397 we don't want to get confused with the real pointers. */
399 if (mode == Pmode && !reload_in_progress)
401 if (regno == FRAME_POINTER_REGNUM)
402 return frame_pointer_rtx;
403 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
404 if (regno == HARD_FRAME_POINTER_REGNUM)
405 return hard_frame_pointer_rtx;
407 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
408 if (regno == ARG_POINTER_REGNUM)
409 return arg_pointer_rtx;
411 #ifdef RETURN_ADDRESS_POINTER_REGNUM
412 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
413 return return_address_pointer_rtx;
415 if (regno == PIC_OFFSET_TABLE_REGNUM
416 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
417 return pic_offset_table_rtx;
418 if (regno == STACK_POINTER_REGNUM)
419 return stack_pointer_rtx;
422 return gen_raw_REG (mode, regno);
426 gen_rtx_MEM (mode, addr)
427 enum machine_mode mode;
430 rtx rt = gen_rtx_raw_MEM (mode, addr);
432 /* This field is not cleared by the mere allocation of the rtx, so
440 gen_rtx_SUBREG (mode, reg, offset)
441 enum machine_mode mode;
445 /* This is the most common failure type.
446 Catch it early so we can see who does it. */
447 if ((offset % GET_MODE_SIZE (mode)) != 0)
450 /* This check isn't usable right now because combine will
451 throw arbitrary crap like a CALL into a SUBREG in
452 gen_lowpart_for_combine so we must just eat it. */
454 /* Check for this too. */
455 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
458 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
461 /* Generate a SUBREG representing the least-significant part of REG if MODE
462 is smaller than mode of REG, otherwise paradoxical SUBREG. */
465 gen_lowpart_SUBREG (mode, reg)
466 enum machine_mode mode;
469 enum machine_mode inmode;
471 inmode = GET_MODE (reg);
472 if (inmode == VOIDmode)
474 return gen_rtx_SUBREG (mode, reg,
475 subreg_lowpart_offset (mode, inmode));
478 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
480 ** This routine generates an RTX of the size specified by
481 ** <code>, which is an RTX code. The RTX structure is initialized
482 ** from the arguments <element1> through <elementn>, which are
483 ** interpreted according to the specific RTX type's format. The
484 ** special machine mode associated with the rtx (if any) is specified
487 ** gen_rtx can be invoked in a way which resembles the lisp-like
488 ** rtx it will generate. For example, the following rtx structure:
490 ** (plus:QI (mem:QI (reg:SI 1))
491 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
493 ** ...would be generated by the following C code:
495 ** gen_rtx (PLUS, QImode,
496 ** gen_rtx (MEM, QImode,
497 ** gen_rtx (REG, SImode, 1)),
498 ** gen_rtx (MEM, QImode,
499 ** gen_rtx (PLUS, SImode,
500 ** gen_rtx (REG, SImode, 2),
501 ** gen_rtx (REG, SImode, 3)))),
506 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
508 int i; /* Array indices... */
509 const char *fmt; /* Current rtx's format... */
510 rtx rt_val; /* RTX to return to caller... */
513 VA_FIXEDARG (p, enum rtx_code, code);
514 VA_FIXEDARG (p, enum machine_mode, mode);
519 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
524 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
525 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
527 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1);
532 rt_val = gen_rtx_REG (mode, va_arg (p, int));
536 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
540 rt_val = rtx_alloc (code); /* Allocate the storage space. */
541 rt_val->mode = mode; /* Store the machine mode... */
543 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
544 for (i = 0; i < GET_RTX_LENGTH (code); i++)
548 case '0': /* Unused field. */
551 case 'i': /* An integer? */
552 XINT (rt_val, i) = va_arg (p, int);
555 case 'w': /* A wide integer? */
556 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
559 case 's': /* A string? */
560 XSTR (rt_val, i) = va_arg (p, char *);
563 case 'e': /* An expression? */
564 case 'u': /* An insn? Same except when printing. */
565 XEXP (rt_val, i) = va_arg (p, rtx);
568 case 'E': /* An RTX vector? */
569 XVEC (rt_val, i) = va_arg (p, rtvec);
572 case 'b': /* A bitmap? */
573 XBITMAP (rt_val, i) = va_arg (p, bitmap);
576 case 't': /* A tree? */
577 XTREE (rt_val, i) = va_arg (p, tree);
591 /* gen_rtvec (n, [rt1, ..., rtn])
593 ** This routine creates an rtvec and stores within it the
594 ** pointers to rtx's which are its arguments.
599 gen_rtvec VPARAMS ((int n, ...))
605 VA_FIXEDARG (p, int, n);
608 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
610 vector = (rtx *) alloca (n * sizeof (rtx));
612 for (i = 0; i < n; i++)
613 vector[i] = va_arg (p, rtx);
615 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
619 return gen_rtvec_v (save_n, vector);
623 gen_rtvec_v (n, argp)
631 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
633 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
635 for (i = 0; i < n; i++)
636 rt_val->elem[i] = *argp++;
641 /* Generate a REG rtx for a new pseudo register of mode MODE.
642 This pseudo is assigned the next sequential register number. */
646 enum machine_mode mode;
648 struct function *f = cfun;
651 /* Don't let anything called after initial flow analysis create new
656 if (generating_concat_p
657 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
658 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
660 /* For complex modes, don't make a single pseudo.
661 Instead, make a CONCAT of two pseudos.
662 This allows noncontiguous allocation of the real and imaginary parts,
663 which makes much better code. Besides, allocating DCmode
664 pseudos overstrains reload on some machines like the 386. */
665 rtx realpart, imagpart;
666 int size = GET_MODE_UNIT_SIZE (mode);
667 enum machine_mode partmode
668 = mode_for_size (size * BITS_PER_UNIT,
669 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
670 ? MODE_FLOAT : MODE_INT),
673 realpart = gen_reg_rtx (partmode);
674 imagpart = gen_reg_rtx (partmode);
675 return gen_rtx_CONCAT (mode, realpart, imagpart);
678 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
679 enough to have an element for this pseudo reg number. */
681 if (reg_rtx_no == f->emit->regno_pointer_align_length)
683 int old_size = f->emit->regno_pointer_align_length;
688 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
689 memset (new + old_size, 0, old_size);
690 f->emit->regno_pointer_align = (unsigned char *) new;
692 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
693 old_size * 2 * sizeof (rtx));
694 memset (new1 + old_size, 0, old_size * sizeof (rtx));
695 regno_reg_rtx = new1;
697 new2 = (tree *) xrealloc (f->emit->regno_decl,
698 old_size * 2 * sizeof (tree));
699 memset (new2 + old_size, 0, old_size * sizeof (tree));
700 f->emit->regno_decl = new2;
702 f->emit->regno_pointer_align_length = old_size * 2;
705 val = gen_raw_REG (mode, reg_rtx_no);
706 regno_reg_rtx[reg_rtx_no++] = val;
710 /* Identify REG (which may be a CONCAT) as a user register. */
716 if (GET_CODE (reg) == CONCAT)
718 REG_USERVAR_P (XEXP (reg, 0)) = 1;
719 REG_USERVAR_P (XEXP (reg, 1)) = 1;
721 else if (GET_CODE (reg) == REG)
722 REG_USERVAR_P (reg) = 1;
727 /* Identify REG as a probable pointer register and show its alignment
728 as ALIGN, if nonzero. */
731 mark_reg_pointer (reg, align)
735 if (! REG_POINTER (reg))
737 REG_POINTER (reg) = 1;
740 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
742 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
743 /* We can no-longer be sure just how aligned this pointer is */
744 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
747 /* Return 1 plus largest pseudo reg number used in the current function. */
755 /* Return 1 + the largest label number used so far in the current function. */
760 if (last_label_num && label_num == base_label_num)
761 return last_label_num;
765 /* Return first label number used in this function (if any were used). */
768 get_first_label_num ()
770 return first_label_num;
773 /* Return the final regno of X, which is a SUBREG of a hard
776 subreg_hard_regno (x, check_mode)
780 enum machine_mode mode = GET_MODE (x);
781 unsigned int byte_offset, base_regno, final_regno;
782 rtx reg = SUBREG_REG (x);
784 /* This is where we attempt to catch illegal subregs
785 created by the compiler. */
786 if (GET_CODE (x) != SUBREG
787 || GET_CODE (reg) != REG)
789 base_regno = REGNO (reg);
790 if (base_regno >= FIRST_PSEUDO_REGISTER)
792 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
795 /* Catch non-congruent offsets too. */
796 byte_offset = SUBREG_BYTE (x);
797 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
800 final_regno = subreg_regno (x);
805 /* Return a value representing some low-order bits of X, where the number
806 of low-order bits is given by MODE. Note that no conversion is done
807 between floating-point and fixed-point values, rather, the bit
808 representation is returned.
810 This function handles the cases in common between gen_lowpart, below,
811 and two variants in cse.c and combine.c. These are the cases that can
812 be safely handled at all points in the compilation.
814 If this is not a case we can handle, return 0. */
817 gen_lowpart_common (mode, x)
818 enum machine_mode mode;
821 int msize = GET_MODE_SIZE (mode);
822 int xsize = GET_MODE_SIZE (GET_MODE (x));
825 if (GET_MODE (x) == mode)
828 /* MODE must occupy no more words than the mode of X. */
829 if (GET_MODE (x) != VOIDmode
830 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
831 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
834 offset = subreg_lowpart_offset (mode, GET_MODE (x));
836 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
837 && (GET_MODE_CLASS (mode) == MODE_INT
838 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
840 /* If we are getting the low-order part of something that has been
841 sign- or zero-extended, we can either just use the object being
842 extended or make a narrower extension. If we want an even smaller
843 piece than the size of the object being extended, call ourselves
846 This case is used mostly by combine and cse. */
848 if (GET_MODE (XEXP (x, 0)) == mode)
850 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
851 return gen_lowpart_common (mode, XEXP (x, 0));
852 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
853 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
855 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
856 || GET_CODE (x) == CONCAT)
857 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
858 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
859 from the low-order part of the constant. */
860 else if ((GET_MODE_CLASS (mode) == MODE_INT
861 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
862 && GET_MODE (x) == VOIDmode
863 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
865 /* If MODE is twice the host word size, X is already the desired
866 representation. Otherwise, if MODE is wider than a word, we can't
867 do this. If MODE is exactly a word, return just one CONST_INT. */
869 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
871 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
873 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
874 return (GET_CODE (x) == CONST_INT ? x
875 : GEN_INT (CONST_DOUBLE_LOW (x)));
878 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
879 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
880 : CONST_DOUBLE_LOW (x));
882 /* Sign extend to HOST_WIDE_INT. */
883 val = trunc_int_for_mode (val, mode);
885 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
890 /* The floating-point emulator can handle all conversions between
891 FP and integer operands. This simplifies reload because it
892 doesn't have to deal with constructs like (subreg:DI
893 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
894 /* Single-precision floats are always 32-bits and double-precision
895 floats are always 64-bits. */
897 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
898 && GET_MODE_BITSIZE (mode) == 32
899 && GET_CODE (x) == CONST_INT)
905 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
906 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
908 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
909 && GET_MODE_BITSIZE (mode) == 64
910 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
911 && GET_MODE (x) == VOIDmode)
915 HOST_WIDE_INT low, high;
917 if (GET_CODE (x) == CONST_INT)
920 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
924 low = CONST_DOUBLE_LOW (x);
925 high = CONST_DOUBLE_HIGH (x);
928 #if HOST_BITS_PER_WIDE_INT == 32
929 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
931 if (WORDS_BIG_ENDIAN)
932 i[0] = high, i[1] = low;
934 i[0] = low, i[1] = high;
939 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
940 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
942 else if ((GET_MODE_CLASS (mode) == MODE_INT
943 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
944 && GET_CODE (x) == CONST_DOUBLE
945 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
948 long i[4]; /* Only the low 32 bits of each 'long' are used. */
949 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
951 /* Convert 'r' into an array of four 32-bit words in target word
953 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
954 switch (GET_MODE_BITSIZE (GET_MODE (x)))
957 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
960 i[3 - 3 * endian] = 0;
963 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
964 i[2 - 2 * endian] = 0;
965 i[3 - 2 * endian] = 0;
968 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
969 i[3 - 3 * endian] = 0;
972 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
977 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
979 #if HOST_BITS_PER_WIDE_INT == 32
980 return immed_double_const (i[3 * endian], i[1 + endian], mode);
982 if (HOST_BITS_PER_WIDE_INT != 64)
985 return immed_double_const ((((unsigned long) i[3 * endian])
986 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
987 (((unsigned long) i[2 - endian])
988 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
993 /* Otherwise, we can't do this. */
997 /* Return the real part (which has mode MODE) of a complex value X.
998 This always comes at the low address in memory. */
1001 gen_realpart (mode, x)
1002 enum machine_mode mode;
1005 if (WORDS_BIG_ENDIAN
1006 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1008 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1010 ("can't access real part of complex value in hard register");
1011 else if (WORDS_BIG_ENDIAN)
1012 return gen_highpart (mode, x);
1014 return gen_lowpart (mode, x);
1017 /* Return the imaginary part (which has mode MODE) of a complex value X.
1018 This always comes at the high address in memory. */
1021 gen_imagpart (mode, x)
1022 enum machine_mode mode;
1025 if (WORDS_BIG_ENDIAN)
1026 return gen_lowpart (mode, x);
1027 else if (! WORDS_BIG_ENDIAN
1028 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1030 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1032 ("can't access imaginary part of complex value in hard register");
1034 return gen_highpart (mode, x);
1037 /* Return 1 iff X, assumed to be a SUBREG,
1038 refers to the real part of the complex value in its containing reg.
1039 Complex values are always stored with the real part in the first word,
1040 regardless of WORDS_BIG_ENDIAN. */
1043 subreg_realpart_p (x)
1046 if (GET_CODE (x) != SUBREG)
1049 return ((unsigned int) SUBREG_BYTE (x)
1050 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1053 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1054 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1055 least-significant part of X.
1056 MODE specifies how big a part of X to return;
1057 it usually should not be larger than a word.
1058 If X is a MEM whose address is a QUEUED, the value may be so also. */
1061 gen_lowpart (mode, x)
1062 enum machine_mode mode;
1065 rtx result = gen_lowpart_common (mode, x);
1069 else if (GET_CODE (x) == REG)
1071 /* Must be a hard reg that's not valid in MODE. */
1072 result = gen_lowpart_common (mode, copy_to_reg (x));
1077 else if (GET_CODE (x) == MEM)
1079 /* The only additional case we can do is MEM. */
1081 if (WORDS_BIG_ENDIAN)
1082 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1083 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1085 if (BYTES_BIG_ENDIAN)
1086 /* Adjust the address so that the address-after-the-data
1088 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1089 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1091 return adjust_address (x, mode, offset);
1093 else if (GET_CODE (x) == ADDRESSOF)
1094 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1099 /* Like `gen_lowpart', but refer to the most significant part.
1100 This is used to access the imaginary part of a complex number. */
1103 gen_highpart (mode, x)
1104 enum machine_mode mode;
1107 unsigned int msize = GET_MODE_SIZE (mode);
1110 /* This case loses if X is a subreg. To catch bugs early,
1111 complain if an invalid MODE is used even in other cases. */
1112 if (msize > UNITS_PER_WORD
1113 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1116 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1117 subreg_highpart_offset (mode, GET_MODE (x)));
1119 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1120 the target if we have a MEM. gen_highpart must return a valid operand,
1121 emitting code if necessary to do so. */
1122 if (result != NULL_RTX && GET_CODE (result) == MEM)
1123 result = validize_mem (result);
1130 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1131 be VOIDmode constant. */
1133 gen_highpart_mode (outermode, innermode, exp)
1134 enum machine_mode outermode, innermode;
1137 if (GET_MODE (exp) != VOIDmode)
1139 if (GET_MODE (exp) != innermode)
1141 return gen_highpart (outermode, exp);
1143 return simplify_gen_subreg (outermode, exp, innermode,
1144 subreg_highpart_offset (outermode, innermode));
1146 /* Return offset in bytes to get OUTERMODE low part
1147 of the value in mode INNERMODE stored in memory in target format. */
1150 subreg_lowpart_offset (outermode, innermode)
1151 enum machine_mode outermode, innermode;
1153 unsigned int offset = 0;
1154 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1158 if (WORDS_BIG_ENDIAN)
1159 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1160 if (BYTES_BIG_ENDIAN)
1161 offset += difference % UNITS_PER_WORD;
1167 /* Return offset in bytes to get OUTERMODE high part
1168 of the value in mode INNERMODE stored in memory in target format. */
1170 subreg_highpart_offset (outermode, innermode)
1171 enum machine_mode outermode, innermode;
1173 unsigned int offset = 0;
1174 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1176 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1181 if (! WORDS_BIG_ENDIAN)
1182 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1183 if (! BYTES_BIG_ENDIAN)
1184 offset += difference % UNITS_PER_WORD;
1190 /* Return 1 iff X, assumed to be a SUBREG,
1191 refers to the least significant part of its containing reg.
1192 If X is not a SUBREG, always return 1 (it is its own low part!). */
1195 subreg_lowpart_p (x)
1198 if (GET_CODE (x) != SUBREG)
1200 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1203 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1204 == SUBREG_BYTE (x));
1208 /* Helper routine for all the constant cases of operand_subword.
1209 Some places invoke this directly. */
1212 constant_subword (op, offset, mode)
1215 enum machine_mode mode;
1217 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1220 /* If OP is already an integer word, return it. */
1221 if (GET_MODE_CLASS (mode) == MODE_INT
1222 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1225 /* The output is some bits, the width of the target machine's word.
1226 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1228 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1229 && GET_MODE_CLASS (mode) == MODE_FLOAT
1230 && GET_MODE_BITSIZE (mode) == 64
1231 && GET_CODE (op) == CONST_DOUBLE)
1236 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1237 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1239 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1240 which the words are written depends on the word endianness.
1241 ??? This is a potential portability problem and should
1242 be fixed at some point.
1244 We must exercise caution with the sign bit. By definition there
1245 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1246 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1247 So we explicitly mask and sign-extend as necessary. */
1248 if (BITS_PER_WORD == 32)
1251 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1252 return GEN_INT (val);
1254 #if HOST_BITS_PER_WIDE_INT >= 64
1255 else if (BITS_PER_WORD >= 64 && offset == 0)
1257 val = k[! WORDS_BIG_ENDIAN];
1258 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1259 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1260 return GEN_INT (val);
1263 else if (BITS_PER_WORD == 16)
1265 val = k[offset >> 1];
1266 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1268 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1269 return GEN_INT (val);
1274 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1275 && GET_MODE_CLASS (mode) == MODE_FLOAT
1276 && GET_MODE_BITSIZE (mode) > 64
1277 && GET_CODE (op) == CONST_DOUBLE)
1282 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1283 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1285 if (BITS_PER_WORD == 32)
1288 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1289 return GEN_INT (val);
1291 #if HOST_BITS_PER_WIDE_INT >= 64
1292 else if (BITS_PER_WORD >= 64 && offset <= 1)
1294 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1295 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1296 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1297 return GEN_INT (val);
1304 /* Single word float is a little harder, since single- and double-word
1305 values often do not have the same high-order bits. We have already
1306 verified that we want the only defined word of the single-word value. */
1307 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1308 && GET_MODE_BITSIZE (mode) == 32
1309 && GET_CODE (op) == CONST_DOUBLE)
1314 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1315 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1317 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1319 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1321 if (BITS_PER_WORD == 16)
1323 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1325 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1328 return GEN_INT (val);
1331 /* The only remaining cases that we can handle are integers.
1332 Convert to proper endianness now since these cases need it.
1333 At this point, offset == 0 means the low-order word.
1335 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1336 in general. However, if OP is (const_int 0), we can just return
1339 if (op == const0_rtx)
1342 if (GET_MODE_CLASS (mode) != MODE_INT
1343 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1344 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1347 if (WORDS_BIG_ENDIAN)
1348 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1350 /* Find out which word on the host machine this value is in and get
1351 it from the constant. */
1352 val = (offset / size_ratio == 0
1353 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1354 : (GET_CODE (op) == CONST_INT
1355 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1357 /* Get the value we want into the low bits of val. */
1358 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1359 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1361 val = trunc_int_for_mode (val, word_mode);
1363 return GEN_INT (val);
1366 /* Return subword OFFSET of operand OP.
1367 The word number, OFFSET, is interpreted as the word number starting
1368 at the low-order address. OFFSET 0 is the low-order word if not
1369 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1371 If we cannot extract the required word, we return zero. Otherwise,
1372 an rtx corresponding to the requested word will be returned.
1374 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1375 reload has completed, a valid address will always be returned. After
1376 reload, if a valid address cannot be returned, we return zero.
1378 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1379 it is the responsibility of the caller.
1381 MODE is the mode of OP in case it is a CONST_INT.
1383 ??? This is still rather broken for some cases. The problem for the
1384 moment is that all callers of this thing provide no 'goal mode' to
1385 tell us to work with. This exists because all callers were written
1386 in a word based SUBREG world.
1387 Now use of this function can be deprecated by simplify_subreg in most
1392 operand_subword (op, offset, validate_address, mode)
1394 unsigned int offset;
1395 int validate_address;
1396 enum machine_mode mode;
1398 if (mode == VOIDmode)
1399 mode = GET_MODE (op);
1401 if (mode == VOIDmode)
1404 /* If OP is narrower than a word, fail. */
1406 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1409 /* If we want a word outside OP, return zero. */
1411 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1414 /* Form a new MEM at the requested address. */
1415 if (GET_CODE (op) == MEM)
1417 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1419 if (! validate_address)
1422 else if (reload_completed)
1424 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1428 return replace_equiv_address (new, XEXP (new, 0));
1431 /* Rest can be handled by simplify_subreg. */
1432 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1435 /* Similar to `operand_subword', but never return 0. If we can't extract
1436 the required subword, put OP into a register and try again. If that fails,
1437 abort. We always validate the address in this case.
1439 MODE is the mode of OP, in case it is CONST_INT. */
1442 operand_subword_force (op, offset, mode)
1444 unsigned int offset;
1445 enum machine_mode mode;
1447 rtx result = operand_subword (op, offset, 1, mode);
1452 if (mode != BLKmode && mode != VOIDmode)
1454 /* If this is a register which can not be accessed by words, copy it
1455 to a pseudo register. */
1456 if (GET_CODE (op) == REG)
1457 op = copy_to_reg (op);
1459 op = force_reg (mode, op);
1462 result = operand_subword (op, offset, 1, mode);
1469 /* Given a compare instruction, swap the operands.
1470 A test instruction is changed into a compare of 0 against the operand. */
1473 reverse_comparison (insn)
1476 rtx body = PATTERN (insn);
1479 if (GET_CODE (body) == SET)
1480 comp = SET_SRC (body);
1482 comp = SET_SRC (XVECEXP (body, 0, 0));
1484 if (GET_CODE (comp) == COMPARE)
1486 rtx op0 = XEXP (comp, 0);
1487 rtx op1 = XEXP (comp, 1);
1488 XEXP (comp, 0) = op1;
1489 XEXP (comp, 1) = op0;
1493 rtx new = gen_rtx_COMPARE (VOIDmode,
1494 CONST0_RTX (GET_MODE (comp)), comp);
1495 if (GET_CODE (body) == SET)
1496 SET_SRC (body) = new;
1498 SET_SRC (XVECEXP (body, 0, 0)) = new;
1502 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1503 or (2) a component ref of something variable. Represent the later with
1504 a NULL expression. */
1507 component_ref_for_mem_expr (ref)
1510 tree inner = TREE_OPERAND (ref, 0);
1512 if (TREE_CODE (inner) == COMPONENT_REF)
1513 inner = component_ref_for_mem_expr (inner);
1516 tree placeholder_ptr = 0;
1518 /* Now remove any conversions: they don't change what the underlying
1519 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1520 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1521 || TREE_CODE (inner) == NON_LVALUE_EXPR
1522 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1523 || TREE_CODE (inner) == SAVE_EXPR
1524 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1525 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1526 inner = find_placeholder (inner, &placeholder_ptr);
1528 inner = TREE_OPERAND (inner, 0);
1530 if (! DECL_P (inner))
1534 if (inner == TREE_OPERAND (ref, 0))
1537 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1538 TREE_OPERAND (ref, 1));
1541 /* Given REF, a MEM, and T, either the type of X or the expression
1542 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1543 if we are making a new object of this type. */
1546 set_mem_attributes (ref, t, objectp)
1551 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1552 tree expr = MEM_EXPR (ref);
1553 rtx offset = MEM_OFFSET (ref);
1554 rtx size = MEM_SIZE (ref);
1555 unsigned int align = MEM_ALIGN (ref);
1558 /* It can happen that type_for_mode was given a mode for which there
1559 is no language-level type. In which case it returns NULL, which
1564 type = TYPE_P (t) ? t : TREE_TYPE (t);
1566 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1567 wrong answer, as it assumes that DECL_RTL already has the right alias
1568 info. Callers should not set DECL_RTL until after the call to
1569 set_mem_attributes. */
1570 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1573 /* Get the alias set from the expression or type (perhaps using a
1574 front-end routine) and use it. */
1575 alias = get_alias_set (t);
1577 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1578 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1579 RTX_UNCHANGING_P (ref)
1580 |= ((lang_hooks.honor_readonly
1581 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1582 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1584 /* If we are making an object of this type, or if this is a DECL, we know
1585 that it is a scalar if the type is not an aggregate. */
1586 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1587 MEM_SCALAR_P (ref) = 1;
1589 /* We can set the alignment from the type if we are making an object,
1590 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1591 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1592 align = MAX (align, TYPE_ALIGN (type));
1594 /* If the size is known, we can set that. */
1595 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1596 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1598 /* If T is not a type, we may be able to deduce some more information about
1602 maybe_set_unchanging (ref, t);
1603 if (TREE_THIS_VOLATILE (t))
1604 MEM_VOLATILE_P (ref) = 1;
1606 /* Now remove any conversions: they don't change what the underlying
1607 object is. Likewise for SAVE_EXPR. */
1608 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1609 || TREE_CODE (t) == NON_LVALUE_EXPR
1610 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1611 || TREE_CODE (t) == SAVE_EXPR)
1612 t = TREE_OPERAND (t, 0);
1614 /* If this expression can't be addressed (e.g., it contains a reference
1615 to a non-addressable field), show we don't change its alias set. */
1616 if (! can_address_p (t))
1617 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1619 /* If this is a decl, set the attributes of the MEM from it. */
1623 offset = const0_rtx;
1624 size = (DECL_SIZE_UNIT (t)
1625 && host_integerp (DECL_SIZE_UNIT (t), 1)
1626 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1627 align = DECL_ALIGN (t);
1630 /* If this is a constant, we know the alignment. */
1631 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1633 align = TYPE_ALIGN (type);
1634 #ifdef CONSTANT_ALIGNMENT
1635 align = CONSTANT_ALIGNMENT (t, align);
1639 /* If this is a field reference and not a bit-field, record it. */
1640 /* ??? There is some information that can be gleened from bit-fields,
1641 such as the word offset in the structure that might be modified.
1642 But skip it for now. */
1643 else if (TREE_CODE (t) == COMPONENT_REF
1644 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1646 expr = component_ref_for_mem_expr (t);
1647 offset = const0_rtx;
1648 /* ??? Any reason the field size would be different than
1649 the size we got from the type? */
1652 /* If this is an array reference, look for an outer field reference. */
1653 else if (TREE_CODE (t) == ARRAY_REF)
1655 tree off_tree = size_zero_node;
1660 = fold (build (PLUS_EXPR, sizetype,
1661 fold (build (MULT_EXPR, sizetype,
1662 TREE_OPERAND (t, 1),
1663 TYPE_SIZE_UNIT (TREE_TYPE (t)))),
1665 t = TREE_OPERAND (t, 0);
1667 while (TREE_CODE (t) == ARRAY_REF);
1669 if (TREE_CODE (t) == COMPONENT_REF)
1671 expr = component_ref_for_mem_expr (t);
1672 if (host_integerp (off_tree, 1))
1673 offset = GEN_INT (tree_low_cst (off_tree, 1));
1674 /* ??? Any reason the field size would be different than
1675 the size we got from the type? */
1680 /* Now set the attributes we computed above. */
1682 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1684 /* If this is already known to be a scalar or aggregate, we are done. */
1685 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1688 /* If it is a reference into an aggregate, this is part of an aggregate.
1689 Otherwise we don't know. */
1690 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1691 || TREE_CODE (t) == ARRAY_RANGE_REF
1692 || TREE_CODE (t) == BIT_FIELD_REF)
1693 MEM_IN_STRUCT_P (ref) = 1;
1696 /* Set the alias set of MEM to SET. */
1699 set_mem_alias_set (mem, set)
1703 #ifdef ENABLE_CHECKING
1704 /* If the new and old alias sets don't conflict, something is wrong. */
1705 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1709 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1710 MEM_SIZE (mem), MEM_ALIGN (mem),
1714 /* Set the alignment of MEM to ALIGN bits. */
1717 set_mem_align (mem, align)
1721 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1722 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1726 /* Set the expr for MEM to EXPR. */
1729 set_mem_expr (mem, expr)
1734 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1735 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1738 /* Set the offset of MEM to OFFSET. */
1741 set_mem_offset (mem, offset)
1744 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1745 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1749 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1750 and its address changed to ADDR. (VOIDmode means don't change the mode.
1751 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1752 returned memory location is required to be valid. The memory
1753 attributes are not changed. */
1756 change_address_1 (memref, mode, addr, validate)
1758 enum machine_mode mode;
1764 if (GET_CODE (memref) != MEM)
1766 if (mode == VOIDmode)
1767 mode = GET_MODE (memref);
1769 addr = XEXP (memref, 0);
1773 if (reload_in_progress || reload_completed)
1775 if (! memory_address_p (mode, addr))
1779 addr = memory_address (mode, addr);
1782 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1785 new = gen_rtx_MEM (mode, addr);
1786 MEM_COPY_ATTRIBUTES (new, memref);
1790 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1791 way we are changing MEMREF, so we only preserve the alias set. */
1794 change_address (memref, mode, addr)
1796 enum machine_mode mode;
1799 rtx new = change_address_1 (memref, mode, addr, 1);
1800 enum machine_mode mmode = GET_MODE (new);
1803 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1804 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1805 (mmode == BLKmode ? BITS_PER_UNIT
1806 : GET_MODE_ALIGNMENT (mmode)),
1812 /* Return a memory reference like MEMREF, but with its mode changed
1813 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1814 nonzero, the memory address is forced to be valid.
1815 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1816 and caller is responsible for adjusting MEMREF base register. */
1819 adjust_address_1 (memref, mode, offset, validate, adjust)
1821 enum machine_mode mode;
1822 HOST_WIDE_INT offset;
1823 int validate, adjust;
1825 rtx addr = XEXP (memref, 0);
1827 rtx memoffset = MEM_OFFSET (memref);
1829 unsigned int memalign = MEM_ALIGN (memref);
1831 /* ??? Prefer to create garbage instead of creating shared rtl.
1832 This may happen even if offset is non-zero -- consider
1833 (plus (plus reg reg) const_int) -- so do this always. */
1834 addr = copy_rtx (addr);
1838 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1839 object, we can merge it into the LO_SUM. */
1840 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1842 && (unsigned HOST_WIDE_INT) offset
1843 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1844 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1845 plus_constant (XEXP (addr, 1), offset));
1847 addr = plus_constant (addr, offset);
1850 new = change_address_1 (memref, mode, addr, validate);
1852 /* Compute the new values of the memory attributes due to this adjustment.
1853 We add the offsets and update the alignment. */
1855 memoffset = GEN_INT (offset + INTVAL (memoffset));
1857 /* Compute the new alignment by taking the MIN of the alignment and the
1858 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1861 memalign = MIN (memalign,
1862 (unsigned int) (offset & -offset) * BITS_PER_UNIT);
1864 /* We can compute the size in a number of ways. */
1865 if (GET_MODE (new) != BLKmode)
1866 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1867 else if (MEM_SIZE (memref))
1868 size = plus_constant (MEM_SIZE (memref), -offset);
1870 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1871 memoffset, size, memalign, GET_MODE (new));
1873 /* At some point, we should validate that this offset is within the object,
1874 if all the appropriate values are known. */
1878 /* Return a memory reference like MEMREF, but with its mode changed
1879 to MODE and its address changed to ADDR, which is assumed to be
1880 MEMREF offseted by OFFSET bytes. If VALIDATE is
1881 nonzero, the memory address is forced to be valid. */
1884 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
1886 enum machine_mode mode;
1888 HOST_WIDE_INT offset;
1891 memref = change_address_1 (memref, VOIDmode, addr, validate);
1892 return adjust_address_1 (memref, mode, offset, validate, 0);
1895 /* Return a memory reference like MEMREF, but whose address is changed by
1896 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1897 known to be in OFFSET (possibly 1). */
1900 offset_address (memref, offset, pow2)
1905 rtx new, addr = XEXP (memref, 0);
1907 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1909 /* At this point we don't know _why_ the address is invalid. It
1910 could have secondary memory refereces, multiplies or anything.
1912 However, if we did go and rearrange things, we can wind up not
1913 being able to recognize the magic around pic_offset_table_rtx.
1914 This stuff is fragile, and is yet another example of why it is
1915 bad to expose PIC machinery too early. */
1916 if (! memory_address_p (GET_MODE (memref), new)
1917 && GET_CODE (addr) == PLUS
1918 && XEXP (addr, 0) == pic_offset_table_rtx)
1920 addr = force_reg (GET_MODE (addr), addr);
1921 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1924 update_temp_slot_address (XEXP (memref, 0), new);
1925 new = change_address_1 (memref, VOIDmode, new, 1);
1927 /* Update the alignment to reflect the offset. Reset the offset, which
1930 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1931 MIN (MEM_ALIGN (memref),
1932 (unsigned int) pow2 * BITS_PER_UNIT),
1937 /* Return a memory reference like MEMREF, but with its address changed to
1938 ADDR. The caller is asserting that the actual piece of memory pointed
1939 to is the same, just the form of the address is being changed, such as
1940 by putting something into a register. */
1943 replace_equiv_address (memref, addr)
1947 /* change_address_1 copies the memory attribute structure without change
1948 and that's exactly what we want here. */
1949 update_temp_slot_address (XEXP (memref, 0), addr);
1950 return change_address_1 (memref, VOIDmode, addr, 1);
1953 /* Likewise, but the reference is not required to be valid. */
1956 replace_equiv_address_nv (memref, addr)
1960 return change_address_1 (memref, VOIDmode, addr, 0);
1963 /* Return a memory reference like MEMREF, but with its mode widened to
1964 MODE and offset by OFFSET. This would be used by targets that e.g.
1965 cannot issue QImode memory operations and have to use SImode memory
1966 operations plus masking logic. */
1969 widen_memory_access (memref, mode, offset)
1971 enum machine_mode mode;
1972 HOST_WIDE_INT offset;
1974 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
1975 tree expr = MEM_EXPR (new);
1976 rtx memoffset = MEM_OFFSET (new);
1977 unsigned int size = GET_MODE_SIZE (mode);
1979 /* If we don't know what offset we were at within the expression, then
1980 we can't know if we've overstepped the bounds. */
1981 if (! memoffset && offset != 0)
1986 if (TREE_CODE (expr) == COMPONENT_REF)
1988 tree field = TREE_OPERAND (expr, 1);
1990 if (! DECL_SIZE_UNIT (field))
1996 /* Is the field at least as large as the access? If so, ok,
1997 otherwise strip back to the containing structure. */
1998 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
1999 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2000 && INTVAL (memoffset) >= 0)
2003 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2009 expr = TREE_OPERAND (expr, 0);
2010 memoffset = (GEN_INT (INTVAL (memoffset)
2011 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2012 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2015 /* Similarly for the decl. */
2016 else if (DECL_P (expr)
2017 && DECL_SIZE_UNIT (expr)
2018 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2019 && (! memoffset || INTVAL (memoffset) >= 0))
2023 /* The widened memory access overflows the expression, which means
2024 that it could alias another expression. Zap it. */
2031 memoffset = NULL_RTX;
2033 /* The widened memory may alias other stuff, so zap the alias set. */
2034 /* ??? Maybe use get_alias_set on any remaining expression. */
2036 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2037 MEM_ALIGN (new), mode);
2042 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2049 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
2050 NULL_RTX, label_num++, NULL, NULL);
2052 LABEL_NUSES (label) = 0;
2053 LABEL_ALTERNATE_NAME (label) = NULL;
2057 /* For procedure integration. */
2059 /* Install new pointers to the first and last insns in the chain.
2060 Also, set cur_insn_uid to one higher than the last in use.
2061 Used for an inline-procedure after copying the insn chain. */
2064 set_new_first_and_last_insn (first, last)
2073 for (insn = first; insn; insn = NEXT_INSN (insn))
2074 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2079 /* Set the range of label numbers found in the current function.
2080 This is used when belatedly compiling an inline function. */
2083 set_new_first_and_last_label_num (first, last)
2086 base_label_num = label_num;
2087 first_label_num = first;
2088 last_label_num = last;
2091 /* Set the last label number found in the current function.
2092 This is used when belatedly compiling an inline function. */
2095 set_new_last_label_num (last)
2098 base_label_num = label_num;
2099 last_label_num = last;
2102 /* Restore all variables describing the current status from the structure *P.
2103 This is used after a nested function. */
2106 restore_emit_status (p)
2107 struct function *p ATTRIBUTE_UNUSED;
2110 clear_emit_caches ();
2113 /* Clear out all parts of the state in F that can safely be discarded
2114 after the function has been compiled, to let garbage collection
2115 reclaim the memory. */
2118 free_emit_status (f)
2121 free (f->emit->x_regno_reg_rtx);
2122 free (f->emit->regno_pointer_align);
2123 free (f->emit->regno_decl);
2128 /* Go through all the RTL insn bodies and copy any invalid shared
2129 structure. This routine should only be called once. */
2132 unshare_all_rtl (fndecl, insn)
2138 /* Make sure that virtual parameters are not shared. */
2139 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2140 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2142 /* Make sure that virtual stack slots are not shared. */
2143 unshare_all_decls (DECL_INITIAL (fndecl));
2145 /* Unshare just about everything else. */
2146 unshare_all_rtl_1 (insn);
2148 /* Make sure the addresses of stack slots found outside the insn chain
2149 (such as, in DECL_RTL of a variable) are not shared
2150 with the insn chain.
2152 This special care is necessary when the stack slot MEM does not
2153 actually appear in the insn chain. If it does appear, its address
2154 is unshared from all else at that point. */
2155 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2158 /* Go through all the RTL insn bodies and copy any invalid shared
2159 structure, again. This is a fairly expensive thing to do so it
2160 should be done sparingly. */
2163 unshare_all_rtl_again (insn)
2169 for (p = insn; p; p = NEXT_INSN (p))
2172 reset_used_flags (PATTERN (p));
2173 reset_used_flags (REG_NOTES (p));
2174 reset_used_flags (LOG_LINKS (p));
2177 /* Make sure that virtual stack slots are not shared. */
2178 reset_used_decls (DECL_INITIAL (cfun->decl));
2180 /* Make sure that virtual parameters are not shared. */
2181 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2182 reset_used_flags (DECL_RTL (decl));
2184 reset_used_flags (stack_slot_list);
2186 unshare_all_rtl (cfun->decl, insn);
2189 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2190 Assumes the mark bits are cleared at entry. */
2193 unshare_all_rtl_1 (insn)
2196 for (; insn; insn = NEXT_INSN (insn))
2199 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2200 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2201 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2205 /* Go through all virtual stack slots of a function and copy any
2206 shared structure. */
2208 unshare_all_decls (blk)
2213 /* Copy shared decls. */
2214 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2215 if (DECL_RTL_SET_P (t))
2216 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2218 /* Now process sub-blocks. */
2219 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2220 unshare_all_decls (t);
2223 /* Go through all virtual stack slots of a function and mark them as
2226 reset_used_decls (blk)
2232 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2233 if (DECL_RTL_SET_P (t))
2234 reset_used_flags (DECL_RTL (t));
2236 /* Now process sub-blocks. */
2237 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2238 reset_used_decls (t);
2241 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2242 placed in the result directly, rather than being copied. */
2245 copy_most_rtx (orig, may_share)
2252 const char *format_ptr;
2254 if (orig == may_share)
2257 code = GET_CODE (orig);
2275 copy = rtx_alloc (code);
2276 PUT_MODE (copy, GET_MODE (orig));
2277 copy->in_struct = orig->in_struct;
2278 copy->volatil = orig->volatil;
2279 copy->unchanging = orig->unchanging;
2280 copy->integrated = orig->integrated;
2281 copy->frame_related = orig->frame_related;
2283 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2285 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2287 switch (*format_ptr++)
2290 XEXP (copy, i) = XEXP (orig, i);
2291 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2292 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2296 XEXP (copy, i) = XEXP (orig, i);
2301 XVEC (copy, i) = XVEC (orig, i);
2302 if (XVEC (orig, i) != NULL)
2304 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2305 for (j = 0; j < XVECLEN (copy, i); j++)
2306 XVECEXP (copy, i, j)
2307 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2312 XWINT (copy, i) = XWINT (orig, i);
2317 XINT (copy, i) = XINT (orig, i);
2321 XTREE (copy, i) = XTREE (orig, i);
2326 XSTR (copy, i) = XSTR (orig, i);
2330 /* Copy this through the wide int field; that's safest. */
2331 X0WINT (copy, i) = X0WINT (orig, i);
2341 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2342 Recursively does the same for subexpressions. */
2345 copy_rtx_if_shared (orig)
2351 const char *format_ptr;
2357 code = GET_CODE (x);
2359 /* These types may be freely shared. */
2373 /* SCRATCH must be shared because they represent distinct values. */
2377 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2378 a LABEL_REF, it isn't sharable. */
2379 if (GET_CODE (XEXP (x, 0)) == PLUS
2380 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2381 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2390 /* The chain of insns is not being copied. */
2394 /* A MEM is allowed to be shared if its address is constant.
2396 We used to allow sharing of MEMs which referenced
2397 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2398 that can lose. instantiate_virtual_regs will not unshare
2399 the MEMs, and combine may change the structure of the address
2400 because it looks safe and profitable in one context, but
2401 in some other context it creates unrecognizable RTL. */
2402 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2411 /* This rtx may not be shared. If it has already been seen,
2412 replace it with a copy of itself. */
2418 copy = rtx_alloc (code);
2420 (sizeof (*copy) - sizeof (copy->fld)
2421 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2427 /* Now scan the subexpressions recursively.
2428 We can store any replaced subexpressions directly into X
2429 since we know X is not shared! Any vectors in X
2430 must be copied if X was copied. */
2432 format_ptr = GET_RTX_FORMAT (code);
2434 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2436 switch (*format_ptr++)
2439 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2443 if (XVEC (x, i) != NULL)
2446 int len = XVECLEN (x, i);
2448 if (copied && len > 0)
2449 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2450 for (j = 0; j < len; j++)
2451 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2459 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2460 to look for shared sub-parts. */
2463 reset_used_flags (x)
2468 const char *format_ptr;
2473 code = GET_CODE (x);
2475 /* These types may be freely shared so we needn't do any resetting
2497 /* The chain of insns is not being copied. */
2506 format_ptr = GET_RTX_FORMAT (code);
2507 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2509 switch (*format_ptr++)
2512 reset_used_flags (XEXP (x, i));
2516 for (j = 0; j < XVECLEN (x, i); j++)
2517 reset_used_flags (XVECEXP (x, i, j));
2523 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2524 Return X or the rtx for the pseudo reg the value of X was copied into.
2525 OTHER must be valid as a SET_DEST. */
2528 make_safe_from (x, other)
2532 switch (GET_CODE (other))
2535 other = SUBREG_REG (other);
2537 case STRICT_LOW_PART:
2540 other = XEXP (other, 0);
2546 if ((GET_CODE (other) == MEM
2548 && GET_CODE (x) != REG
2549 && GET_CODE (x) != SUBREG)
2550 || (GET_CODE (other) == REG
2551 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2552 || reg_mentioned_p (other, x))))
2554 rtx temp = gen_reg_rtx (GET_MODE (x));
2555 emit_move_insn (temp, x);
2561 /* Emission of insns (adding them to the doubly-linked list). */
2563 /* Return the first insn of the current sequence or current function. */
2571 /* Specify a new insn as the first in the chain. */
2574 set_first_insn (insn)
2577 if (PREV_INSN (insn) != 0)
2582 /* Return the last insn emitted in current sequence or current function. */
2590 /* Specify a new insn as the last in the chain. */
2593 set_last_insn (insn)
2596 if (NEXT_INSN (insn) != 0)
2601 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2604 get_last_insn_anywhere ()
2606 struct sequence_stack *stack;
2609 for (stack = seq_stack; stack; stack = stack->next)
2610 if (stack->last != 0)
2615 /* Return a number larger than any instruction's uid in this function. */
2620 return cur_insn_uid;
2623 /* Renumber instructions so that no instruction UIDs are wasted. */
2626 renumber_insns (stream)
2631 /* If we're not supposed to renumber instructions, don't. */
2632 if (!flag_renumber_insns)
2635 /* If there aren't that many instructions, then it's not really
2636 worth renumbering them. */
2637 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2642 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2645 fprintf (stream, "Renumbering insn %d to %d\n",
2646 INSN_UID (insn), cur_insn_uid);
2647 INSN_UID (insn) = cur_insn_uid++;
2651 /* Return the next insn. If it is a SEQUENCE, return the first insn
2660 insn = NEXT_INSN (insn);
2661 if (insn && GET_CODE (insn) == INSN
2662 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2663 insn = XVECEXP (PATTERN (insn), 0, 0);
2669 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2673 previous_insn (insn)
2678 insn = PREV_INSN (insn);
2679 if (insn && GET_CODE (insn) == INSN
2680 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2681 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2687 /* Return the next insn after INSN that is not a NOTE. This routine does not
2688 look inside SEQUENCEs. */
2691 next_nonnote_insn (insn)
2696 insn = NEXT_INSN (insn);
2697 if (insn == 0 || GET_CODE (insn) != NOTE)
2704 /* Return the previous insn before INSN that is not a NOTE. This routine does
2705 not look inside SEQUENCEs. */
2708 prev_nonnote_insn (insn)
2713 insn = PREV_INSN (insn);
2714 if (insn == 0 || GET_CODE (insn) != NOTE)
2721 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2722 or 0, if there is none. This routine does not look inside
2726 next_real_insn (insn)
2731 insn = NEXT_INSN (insn);
2732 if (insn == 0 || GET_CODE (insn) == INSN
2733 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2740 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2741 or 0, if there is none. This routine does not look inside
2745 prev_real_insn (insn)
2750 insn = PREV_INSN (insn);
2751 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2752 || GET_CODE (insn) == JUMP_INSN)
2759 /* Find the next insn after INSN that really does something. This routine
2760 does not look inside SEQUENCEs. Until reload has completed, this is the
2761 same as next_real_insn. */
2764 active_insn_p (insn)
2767 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2768 || (GET_CODE (insn) == INSN
2769 && (! reload_completed
2770 || (GET_CODE (PATTERN (insn)) != USE
2771 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2775 next_active_insn (insn)
2780 insn = NEXT_INSN (insn);
2781 if (insn == 0 || active_insn_p (insn))
2788 /* Find the last insn before INSN that really does something. This routine
2789 does not look inside SEQUENCEs. Until reload has completed, this is the
2790 same as prev_real_insn. */
2793 prev_active_insn (insn)
2798 insn = PREV_INSN (insn);
2799 if (insn == 0 || active_insn_p (insn))
2806 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2814 insn = NEXT_INSN (insn);
2815 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2822 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2830 insn = PREV_INSN (insn);
2831 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2839 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2840 and REG_CC_USER notes so we can find it. */
2843 link_cc0_insns (insn)
2846 rtx user = next_nonnote_insn (insn);
2848 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2849 user = XVECEXP (PATTERN (user), 0, 0);
2851 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2853 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2856 /* Return the next insn that uses CC0 after INSN, which is assumed to
2857 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2858 applied to the result of this function should yield INSN).
2860 Normally, this is simply the next insn. However, if a REG_CC_USER note
2861 is present, it contains the insn that uses CC0.
2863 Return 0 if we can't find the insn. */
2866 next_cc0_user (insn)
2869 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2872 return XEXP (note, 0);
2874 insn = next_nonnote_insn (insn);
2875 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2876 insn = XVECEXP (PATTERN (insn), 0, 0);
2878 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2884 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2885 note, it is the previous insn. */
2888 prev_cc0_setter (insn)
2891 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2894 return XEXP (note, 0);
2896 insn = prev_nonnote_insn (insn);
2897 if (! sets_cc0_p (PATTERN (insn)))
2904 /* Increment the label uses for all labels present in rtx. */
2914 code = GET_CODE (x);
2915 if (code == LABEL_REF)
2916 LABEL_NUSES (XEXP (x, 0))++;
2918 fmt = GET_RTX_FORMAT (code);
2919 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2922 mark_label_nuses (XEXP (x, i));
2923 else if (fmt[i] == 'E')
2924 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2925 mark_label_nuses (XVECEXP (x, i, j));
2930 /* Try splitting insns that can be split for better scheduling.
2931 PAT is the pattern which might split.
2932 TRIAL is the insn providing PAT.
2933 LAST is non-zero if we should return the last insn of the sequence produced.
2935 If this routine succeeds in splitting, it returns the first or last
2936 replacement insn depending on the value of LAST. Otherwise, it
2937 returns TRIAL. If the insn to be returned can be split, it will be. */
2940 try_split (pat, trial, last)
2944 rtx before = PREV_INSN (trial);
2945 rtx after = NEXT_INSN (trial);
2946 int has_barrier = 0;
2951 if (any_condjump_p (trial)
2952 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2953 split_branch_probability = INTVAL (XEXP (note, 0));
2954 probability = split_branch_probability;
2956 seq = split_insns (pat, trial);
2958 split_branch_probability = -1;
2960 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2961 We may need to handle this specially. */
2962 if (after && GET_CODE (after) == BARRIER)
2965 after = NEXT_INSN (after);
2970 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2971 The latter case will normally arise only when being done so that
2972 it, in turn, will be split (SFmode on the 29k is an example). */
2973 if (GET_CODE (seq) == SEQUENCE)
2977 /* Avoid infinite loop if any insn of the result matches
2978 the original pattern. */
2979 for (i = 0; i < XVECLEN (seq, 0); i++)
2980 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2981 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2985 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2986 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2988 rtx insn = XVECEXP (seq, 0, i);
2989 mark_jump_label (PATTERN (insn),
2990 XVECEXP (seq, 0, i), 0);
2992 if (probability != -1
2993 && any_condjump_p (insn)
2994 && !find_reg_note (insn, REG_BR_PROB, 0))
2996 /* We can preserve the REG_BR_PROB notes only if exactly
2997 one jump is created, otherwise the machine description
2998 is responsible for this step using
2999 split_branch_probability variable. */
3003 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3004 GEN_INT (probability),
3009 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3010 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3011 if (GET_CODE (trial) == CALL_INSN)
3012 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3013 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
3014 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
3015 = CALL_INSN_FUNCTION_USAGE (trial);
3017 /* Copy notes, particularly those related to the CFG. */
3018 for (note = REG_NOTES (trial); note ; note = XEXP (note, 1))
3020 switch (REG_NOTE_KIND (note))
3023 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3025 rtx insn = XVECEXP (seq, 0, i);
3026 if (GET_CODE (insn) == CALL_INSN
3027 || (flag_non_call_exceptions
3028 && may_trap_p (PATTERN (insn))))
3030 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3038 case REG_ALWAYS_RETURN:
3039 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3041 rtx insn = XVECEXP (seq, 0, i);
3042 if (GET_CODE (insn) == CALL_INSN)
3044 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3050 case REG_NON_LOCAL_GOTO:
3051 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3053 rtx insn = XVECEXP (seq, 0, i);
3054 if (GET_CODE (insn) == JUMP_INSN)
3056 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3067 /* If there are LABELS inside the split insns increment the
3068 usage count so we don't delete the label. */
3069 if (GET_CODE (trial) == INSN)
3070 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3071 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
3072 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
3074 tem = emit_insn_after (seq, trial);
3076 delete_related_insns (trial);
3078 emit_barrier_after (tem);
3080 /* Recursively call try_split for each new insn created; by the
3081 time control returns here that insn will be fully split, so
3082 set LAST and continue from the insn after the one returned.
3083 We can't use next_active_insn here since AFTER may be a note.
3084 Ignore deleted insns, which can be occur if not optimizing. */
3085 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3086 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3087 tem = try_split (PATTERN (tem), tem, 1);
3089 /* Avoid infinite loop if the result matches the original pattern. */
3090 else if (rtx_equal_p (seq, pat))
3094 PATTERN (trial) = seq;
3095 INSN_CODE (trial) = -1;
3096 try_split (seq, trial, last);
3099 /* Return either the first or the last insn, depending on which was
3102 ? (after ? PREV_INSN (after) : last_insn)
3103 : NEXT_INSN (before);
3109 /* Make and return an INSN rtx, initializing all its slots.
3110 Store PATTERN in the pattern slots. */
3113 make_insn_raw (pattern)
3118 insn = rtx_alloc (INSN);
3120 INSN_UID (insn) = cur_insn_uid++;
3121 PATTERN (insn) = pattern;
3122 INSN_CODE (insn) = -1;
3123 LOG_LINKS (insn) = NULL;
3124 REG_NOTES (insn) = NULL;
3126 #ifdef ENABLE_RTL_CHECKING
3129 && (returnjump_p (insn)
3130 || (GET_CODE (insn) == SET
3131 && SET_DEST (insn) == pc_rtx)))
3133 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3141 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
3144 make_jump_insn_raw (pattern)
3149 insn = rtx_alloc (JUMP_INSN);
3150 INSN_UID (insn) = cur_insn_uid++;
3152 PATTERN (insn) = pattern;
3153 INSN_CODE (insn) = -1;
3154 LOG_LINKS (insn) = NULL;
3155 REG_NOTES (insn) = NULL;
3156 JUMP_LABEL (insn) = NULL;
3161 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
3164 make_call_insn_raw (pattern)
3169 insn = rtx_alloc (CALL_INSN);
3170 INSN_UID (insn) = cur_insn_uid++;
3172 PATTERN (insn) = pattern;
3173 INSN_CODE (insn) = -1;
3174 LOG_LINKS (insn) = NULL;
3175 REG_NOTES (insn) = NULL;
3176 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3181 /* Add INSN to the end of the doubly-linked list.
3182 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3188 PREV_INSN (insn) = last_insn;
3189 NEXT_INSN (insn) = 0;
3191 if (NULL != last_insn)
3192 NEXT_INSN (last_insn) = insn;
3194 if (NULL == first_insn)
3200 /* Add INSN into the doubly-linked list after insn AFTER. This and
3201 the next should be the only functions called to insert an insn once
3202 delay slots have been filled since only they know how to update a
3206 add_insn_after (insn, after)
3209 rtx next = NEXT_INSN (after);
3212 if (optimize && INSN_DELETED_P (after))
3215 NEXT_INSN (insn) = next;
3216 PREV_INSN (insn) = after;
3220 PREV_INSN (next) = insn;
3221 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3222 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3224 else if (last_insn == after)
3228 struct sequence_stack *stack = seq_stack;
3229 /* Scan all pending sequences too. */
3230 for (; stack; stack = stack->next)
3231 if (after == stack->last)
3241 if (basic_block_for_insn
3242 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3243 && (bb = BLOCK_FOR_INSN (after)))
3245 set_block_for_insn (insn, bb);
3247 bb->flags |= BB_DIRTY;
3248 /* Should not happen as first in the BB is always
3249 either NOTE or LABEL. */
3250 if (bb->end == after
3251 /* Avoid clobbering of structure when creating new BB. */
3252 && GET_CODE (insn) != BARRIER
3253 && (GET_CODE (insn) != NOTE
3254 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3258 NEXT_INSN (after) = insn;
3259 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3261 rtx sequence = PATTERN (after);
3262 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3266 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3267 the previous should be the only functions called to insert an insn once
3268 delay slots have been filled since only they know how to update a
3272 add_insn_before (insn, before)
3275 rtx prev = PREV_INSN (before);
3278 if (optimize && INSN_DELETED_P (before))
3281 PREV_INSN (insn) = prev;
3282 NEXT_INSN (insn) = before;
3286 NEXT_INSN (prev) = insn;
3287 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3289 rtx sequence = PATTERN (prev);
3290 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3293 else if (first_insn == before)
3297 struct sequence_stack *stack = seq_stack;
3298 /* Scan all pending sequences too. */
3299 for (; stack; stack = stack->next)
3300 if (before == stack->first)
3302 stack->first = insn;
3310 if (basic_block_for_insn
3311 && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements
3312 && (bb = BLOCK_FOR_INSN (before)))
3314 set_block_for_insn (insn, bb);
3316 bb->flags |= BB_DIRTY;
3317 /* Should not happen as first in the BB is always
3318 either NOTE or LABEl. */
3319 if (bb->head == insn
3320 /* Avoid clobbering of structure when creating new BB. */
3321 && GET_CODE (insn) != BARRIER
3322 && (GET_CODE (insn) != NOTE
3323 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3327 PREV_INSN (before) = insn;
3328 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3329 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3332 /* Remove an insn from its doubly-linked list. This function knows how
3333 to handle sequences. */
3338 rtx next = NEXT_INSN (insn);
3339 rtx prev = PREV_INSN (insn);
3344 NEXT_INSN (prev) = next;
3345 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3347 rtx sequence = PATTERN (prev);
3348 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3351 else if (first_insn == insn)
3355 struct sequence_stack *stack = seq_stack;
3356 /* Scan all pending sequences too. */
3357 for (; stack; stack = stack->next)
3358 if (insn == stack->first)
3360 stack->first = next;
3370 PREV_INSN (next) = prev;
3371 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3372 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3374 else if (last_insn == insn)
3378 struct sequence_stack *stack = seq_stack;
3379 /* Scan all pending sequences too. */
3380 for (; stack; stack = stack->next)
3381 if (insn == stack->last)
3390 if (basic_block_for_insn
3391 && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements
3392 && (bb = BLOCK_FOR_INSN (insn)))
3395 bb->flags |= BB_DIRTY;
3396 if (bb->head == insn)
3398 /* Never ever delete the basic block note without deleting whole basic
3400 if (GET_CODE (insn) == NOTE)
3404 if (bb->end == insn)
3409 /* Delete all insns made since FROM.
3410 FROM becomes the new last instruction. */
3413 delete_insns_since (from)
3419 NEXT_INSN (from) = 0;
3423 /* This function is deprecated, please use sequences instead.
3425 Move a consecutive bunch of insns to a different place in the chain.
3426 The insns to be moved are those between FROM and TO.
3427 They are moved to a new position after the insn AFTER.
3428 AFTER must not be FROM or TO or any insn in between.
3430 This function does not know about SEQUENCEs and hence should not be
3431 called after delay-slot filling has been done. */
3434 reorder_insns_nobb (from, to, after)
3435 rtx from, to, after;
3437 /* Splice this bunch out of where it is now. */
3438 if (PREV_INSN (from))
3439 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3441 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3442 if (last_insn == to)
3443 last_insn = PREV_INSN (from);
3444 if (first_insn == from)
3445 first_insn = NEXT_INSN (to);
3447 /* Make the new neighbors point to it and it to them. */
3448 if (NEXT_INSN (after))
3449 PREV_INSN (NEXT_INSN (after)) = to;
3451 NEXT_INSN (to) = NEXT_INSN (after);
3452 PREV_INSN (from) = after;
3453 NEXT_INSN (after) = from;
3454 if (after == last_insn)
3458 /* Same as function above, but take care to update BB boundaries. */
3460 reorder_insns (from, to, after)
3461 rtx from, to, after;
3463 rtx prev = PREV_INSN (from);
3464 basic_block bb, bb2;
3466 reorder_insns_nobb (from, to, after);
3468 if (basic_block_for_insn
3469 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3470 && (bb = BLOCK_FOR_INSN (after)))
3473 bb->flags |= BB_DIRTY;
3475 if (basic_block_for_insn
3476 && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements
3477 && (bb2 = BLOCK_FOR_INSN (from)))
3481 bb2->flags |= BB_DIRTY;
3484 if (bb->end == after)
3487 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3488 set_block_for_insn (x, bb);
3492 /* Return the line note insn preceding INSN. */
3495 find_line_note (insn)
3498 if (no_line_numbers)
3501 for (; insn; insn = PREV_INSN (insn))
3502 if (GET_CODE (insn) == NOTE
3503 && NOTE_LINE_NUMBER (insn) >= 0)
3509 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3510 of the moved insns when debugging. This may insert a note between AFTER
3511 and FROM, and another one after TO. */
3514 reorder_insns_with_line_notes (from, to, after)
3515 rtx from, to, after;
3517 rtx from_line = find_line_note (from);
3518 rtx after_line = find_line_note (after);
3520 reorder_insns (from, to, after);
3522 if (from_line == after_line)
3526 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3527 NOTE_LINE_NUMBER (from_line),
3530 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3531 NOTE_LINE_NUMBER (after_line),
3535 /* Remove unnecessary notes from the instruction stream. */
3538 remove_unnecessary_notes ()
3540 rtx block_stack = NULL_RTX;
3541 rtx eh_stack = NULL_RTX;
3546 /* We must not remove the first instruction in the function because
3547 the compiler depends on the first instruction being a note. */
3548 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3550 /* Remember what's next. */
3551 next = NEXT_INSN (insn);
3553 /* We're only interested in notes. */
3554 if (GET_CODE (insn) != NOTE)
3557 switch (NOTE_LINE_NUMBER (insn))
3559 case NOTE_INSN_DELETED:
3560 case NOTE_INSN_LOOP_END_TOP_COND:
3564 case NOTE_INSN_EH_REGION_BEG:
3565 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3568 case NOTE_INSN_EH_REGION_END:
3569 /* Too many end notes. */
3570 if (eh_stack == NULL_RTX)
3572 /* Mismatched nesting. */
3573 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3576 eh_stack = XEXP (eh_stack, 1);
3577 free_INSN_LIST_node (tmp);
3580 case NOTE_INSN_BLOCK_BEG:
3581 /* By now, all notes indicating lexical blocks should have
3582 NOTE_BLOCK filled in. */
3583 if (NOTE_BLOCK (insn) == NULL_TREE)
3585 block_stack = alloc_INSN_LIST (insn, block_stack);
3588 case NOTE_INSN_BLOCK_END:
3589 /* Too many end notes. */
3590 if (block_stack == NULL_RTX)
3592 /* Mismatched nesting. */
3593 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3596 block_stack = XEXP (block_stack, 1);
3597 free_INSN_LIST_node (tmp);
3599 /* Scan back to see if there are any non-note instructions
3600 between INSN and the beginning of this block. If not,
3601 then there is no PC range in the generated code that will
3602 actually be in this block, so there's no point in
3603 remembering the existence of the block. */
3604 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3606 /* This block contains a real instruction. Note that we
3607 don't include labels; if the only thing in the block
3608 is a label, then there are still no PC values that
3609 lie within the block. */
3613 /* We're only interested in NOTEs. */
3614 if (GET_CODE (tmp) != NOTE)
3617 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3619 /* We just verified that this BLOCK matches us with
3620 the block_stack check above. Never delete the
3621 BLOCK for the outermost scope of the function; we
3622 can refer to names from that scope even if the
3623 block notes are messed up. */
3624 if (! is_body_block (NOTE_BLOCK (insn))
3625 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3632 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3633 /* There's a nested block. We need to leave the
3634 current block in place since otherwise the debugger
3635 wouldn't be able to show symbols from our block in
3636 the nested block. */
3642 /* Too many begin notes. */
3643 if (block_stack || eh_stack)
3648 /* Emit an insn of given code and pattern
3649 at a specified place within the doubly-linked list. */
3651 /* Make an instruction with body PATTERN
3652 and output it before the instruction BEFORE. */
3655 emit_insn_before (pattern, before)
3656 rtx pattern, before;
3660 if (GET_CODE (pattern) == SEQUENCE)
3664 for (i = 0; i < XVECLEN (pattern, 0); i++)
3666 insn = XVECEXP (pattern, 0, i);
3667 add_insn_before (insn, before);
3672 insn = make_insn_raw (pattern);
3673 add_insn_before (insn, before);
3679 /* Make an instruction with body PATTERN and code JUMP_INSN
3680 and output it before the instruction BEFORE. */
3683 emit_jump_insn_before (pattern, before)
3684 rtx pattern, before;
3688 if (GET_CODE (pattern) == SEQUENCE)
3689 insn = emit_insn_before (pattern, before);
3692 insn = make_jump_insn_raw (pattern);
3693 add_insn_before (insn, before);
3699 /* Make an instruction with body PATTERN and code CALL_INSN
3700 and output it before the instruction BEFORE. */
3703 emit_call_insn_before (pattern, before)
3704 rtx pattern, before;
3708 if (GET_CODE (pattern) == SEQUENCE)
3709 insn = emit_insn_before (pattern, before);
3712 insn = make_call_insn_raw (pattern);
3713 add_insn_before (insn, before);
3714 PUT_CODE (insn, CALL_INSN);
3720 /* Make an insn of code BARRIER
3721 and output it before the insn BEFORE. */
3724 emit_barrier_before (before)
3727 rtx insn = rtx_alloc (BARRIER);
3729 INSN_UID (insn) = cur_insn_uid++;
3731 add_insn_before (insn, before);
3735 /* Emit the label LABEL before the insn BEFORE. */
3738 emit_label_before (label, before)
3741 /* This can be called twice for the same label as a result of the
3742 confusion that follows a syntax error! So make it harmless. */
3743 if (INSN_UID (label) == 0)
3745 INSN_UID (label) = cur_insn_uid++;
3746 add_insn_before (label, before);
3752 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3755 emit_note_before (subtype, before)
3759 rtx note = rtx_alloc (NOTE);
3760 INSN_UID (note) = cur_insn_uid++;
3761 NOTE_SOURCE_FILE (note) = 0;
3762 NOTE_LINE_NUMBER (note) = subtype;
3764 add_insn_before (note, before);
3768 /* Make an insn of code INSN with body PATTERN
3769 and output it after the insn AFTER. */
3772 emit_insn_after (pattern, after)
3777 if (GET_CODE (pattern) == SEQUENCE)
3781 for (i = 0; i < XVECLEN (pattern, 0); i++)
3783 insn = XVECEXP (pattern, 0, i);
3784 add_insn_after (insn, after);
3790 insn = make_insn_raw (pattern);
3791 add_insn_after (insn, after);
3797 /* Similar to emit_insn_after, except that line notes are to be inserted so
3798 as to act as if this insn were at FROM. */
3801 emit_insn_after_with_line_notes (pattern, after, from)
3802 rtx pattern, after, from;
3804 rtx from_line = find_line_note (from);
3805 rtx after_line = find_line_note (after);
3806 rtx insn = emit_insn_after (pattern, after);
3809 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3810 NOTE_LINE_NUMBER (from_line),
3814 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3815 NOTE_LINE_NUMBER (after_line),
3819 /* Make an insn of code JUMP_INSN with body PATTERN
3820 and output it after the insn AFTER. */
3823 emit_jump_insn_after (pattern, after)
3828 if (GET_CODE (pattern) == SEQUENCE)
3829 insn = emit_insn_after (pattern, after);
3832 insn = make_jump_insn_raw (pattern);
3833 add_insn_after (insn, after);
3839 /* Make an insn of code BARRIER
3840 and output it after the insn AFTER. */
3843 emit_barrier_after (after)
3846 rtx insn = rtx_alloc (BARRIER);
3848 INSN_UID (insn) = cur_insn_uid++;
3850 add_insn_after (insn, after);
3854 /* Emit the label LABEL after the insn AFTER. */
3857 emit_label_after (label, after)
3860 /* This can be called twice for the same label
3861 as a result of the confusion that follows a syntax error!
3862 So make it harmless. */
3863 if (INSN_UID (label) == 0)
3865 INSN_UID (label) = cur_insn_uid++;
3866 add_insn_after (label, after);
3872 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3875 emit_note_after (subtype, after)
3879 rtx note = rtx_alloc (NOTE);
3880 INSN_UID (note) = cur_insn_uid++;
3881 NOTE_SOURCE_FILE (note) = 0;
3882 NOTE_LINE_NUMBER (note) = subtype;
3883 add_insn_after (note, after);
3887 /* Emit a line note for FILE and LINE after the insn AFTER. */
3890 emit_line_note_after (file, line, after)
3897 if (no_line_numbers && line > 0)
3903 note = rtx_alloc (NOTE);
3904 INSN_UID (note) = cur_insn_uid++;
3905 NOTE_SOURCE_FILE (note) = file;
3906 NOTE_LINE_NUMBER (note) = line;
3907 add_insn_after (note, after);
3911 /* Make an insn of code INSN with pattern PATTERN
3912 and add it to the end of the doubly-linked list.
3913 If PATTERN is a SEQUENCE, take the elements of it
3914 and emit an insn for each element.
3916 Returns the last insn emitted. */
3922 rtx insn = last_insn;
3924 if (GET_CODE (pattern) == SEQUENCE)
3928 for (i = 0; i < XVECLEN (pattern, 0); i++)
3930 insn = XVECEXP (pattern, 0, i);
3936 insn = make_insn_raw (pattern);
3943 /* Emit the insns in a chain starting with INSN.
3944 Return the last insn emitted. */
3954 rtx next = NEXT_INSN (insn);
3963 /* Emit the insns in a chain starting with INSN and place them in front of
3964 the insn BEFORE. Return the last insn emitted. */
3967 emit_insns_before (insn, before)
3975 rtx next = NEXT_INSN (insn);
3976 add_insn_before (insn, before);
3984 /* Emit the insns in a chain starting with FIRST and place them in back of
3985 the insn AFTER. Return the last insn emitted. */
3988 emit_insns_after (first, after)
4002 if (basic_block_for_insn
4003 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
4004 && (bb = BLOCK_FOR_INSN (after)))
4006 bb->flags |= BB_DIRTY;
4007 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4008 set_block_for_insn (last, bb);
4009 set_block_for_insn (last, bb);
4010 if (bb->end == after)
4014 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4017 after_after = NEXT_INSN (after);
4019 NEXT_INSN (after) = first;
4020 PREV_INSN (first) = after;
4021 NEXT_INSN (last) = after_after;
4023 PREV_INSN (after_after) = last;
4025 if (after == last_insn)
4030 /* Make an insn of code JUMP_INSN with pattern PATTERN
4031 and add it to the end of the doubly-linked list. */
4034 emit_jump_insn (pattern)
4037 if (GET_CODE (pattern) == SEQUENCE)
4038 return emit_insn (pattern);
4041 rtx insn = make_jump_insn_raw (pattern);
4047 /* Make an insn of code CALL_INSN with pattern PATTERN
4048 and add it to the end of the doubly-linked list. */
4051 emit_call_insn (pattern)
4054 if (GET_CODE (pattern) == SEQUENCE)
4055 return emit_insn (pattern);
4058 rtx insn = make_call_insn_raw (pattern);
4060 PUT_CODE (insn, CALL_INSN);
4065 /* Add the label LABEL to the end of the doubly-linked list. */
4071 /* This can be called twice for the same label
4072 as a result of the confusion that follows a syntax error!
4073 So make it harmless. */
4074 if (INSN_UID (label) == 0)
4076 INSN_UID (label) = cur_insn_uid++;
4082 /* Make an insn of code BARRIER
4083 and add it to the end of the doubly-linked list. */
4088 rtx barrier = rtx_alloc (BARRIER);
4089 INSN_UID (barrier) = cur_insn_uid++;
4094 /* Make an insn of code NOTE
4095 with data-fields specified by FILE and LINE
4096 and add it to the end of the doubly-linked list,
4097 but only if line-numbers are desired for debugging info. */
4100 emit_line_note (file, line)
4104 set_file_and_line_for_stmt (file, line);
4107 if (no_line_numbers)
4111 return emit_note (file, line);
4114 /* Make an insn of code NOTE
4115 with data-fields specified by FILE and LINE
4116 and add it to the end of the doubly-linked list.
4117 If it is a line-number NOTE, omit it if it matches the previous one. */
4120 emit_note (file, line)
4128 if (file && last_filename && !strcmp (file, last_filename)
4129 && line == last_linenum)
4131 last_filename = file;
4132 last_linenum = line;
4135 if (no_line_numbers && line > 0)
4141 note = rtx_alloc (NOTE);
4142 INSN_UID (note) = cur_insn_uid++;
4143 NOTE_SOURCE_FILE (note) = file;
4144 NOTE_LINE_NUMBER (note) = line;
4149 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4152 emit_line_note_force (file, line)
4157 return emit_line_note (file, line);
4160 /* Cause next statement to emit a line note even if the line number
4161 has not changed. This is used at the beginning of a function. */
4164 force_next_line_note ()
4169 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4170 note of this type already exists, remove it first. */
4173 set_unique_reg_note (insn, kind, datum)
4178 rtx note = find_reg_note (insn, kind, NULL_RTX);
4184 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4185 has multiple sets (some callers assume single_set
4186 means the insn only has one set, when in fact it
4187 means the insn only has one * useful * set). */
4188 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4195 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4196 It serves no useful purpose and breaks eliminate_regs. */
4197 if (GET_CODE (datum) == ASM_OPERANDS)
4207 XEXP (note, 0) = datum;
4211 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4212 return REG_NOTES (insn);
4215 /* Return an indication of which type of insn should have X as a body.
4216 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4222 if (GET_CODE (x) == CODE_LABEL)
4224 if (GET_CODE (x) == CALL)
4226 if (GET_CODE (x) == RETURN)
4228 if (GET_CODE (x) == SET)
4230 if (SET_DEST (x) == pc_rtx)
4232 else if (GET_CODE (SET_SRC (x)) == CALL)
4237 if (GET_CODE (x) == PARALLEL)
4240 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4241 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4243 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4244 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4246 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4247 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4253 /* Emit the rtl pattern X as an appropriate kind of insn.
4254 If X is a label, it is simply added into the insn chain. */
4260 enum rtx_code code = classify_insn (x);
4262 if (code == CODE_LABEL)
4263 return emit_label (x);
4264 else if (code == INSN)
4265 return emit_insn (x);
4266 else if (code == JUMP_INSN)
4268 rtx insn = emit_jump_insn (x);
4269 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4270 return emit_barrier ();
4273 else if (code == CALL_INSN)
4274 return emit_call_insn (x);
4279 /* Begin emitting insns to a sequence which can be packaged in an
4280 RTL_EXPR. If this sequence will contain something that might cause
4281 the compiler to pop arguments to function calls (because those
4282 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4283 details), use do_pending_stack_adjust before calling this function.
4284 That will ensure that the deferred pops are not accidentally
4285 emitted in the middle of this sequence. */
4290 struct sequence_stack *tem;
4292 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4294 tem->next = seq_stack;
4295 tem->first = first_insn;
4296 tem->last = last_insn;
4297 tem->sequence_rtl_expr = seq_rtl_expr;
4305 /* Similarly, but indicate that this sequence will be placed in T, an
4306 RTL_EXPR. See the documentation for start_sequence for more
4307 information about how to use this function. */
4310 start_sequence_for_rtl_expr (t)
4318 /* Set up the insn chain starting with FIRST as the current sequence,
4319 saving the previously current one. See the documentation for
4320 start_sequence for more information about how to use this function. */
4323 push_to_sequence (first)
4330 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4336 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4339 push_to_full_sequence (first, last)
4345 /* We really should have the end of the insn chain here. */
4346 if (last && NEXT_INSN (last))
4350 /* Set up the outer-level insn chain
4351 as the current sequence, saving the previously current one. */
4354 push_topmost_sequence ()
4356 struct sequence_stack *stack, *top = NULL;
4360 for (stack = seq_stack; stack; stack = stack->next)
4363 first_insn = top->first;
4364 last_insn = top->last;
4365 seq_rtl_expr = top->sequence_rtl_expr;
4368 /* After emitting to the outer-level insn chain, update the outer-level
4369 insn chain, and restore the previous saved state. */
4372 pop_topmost_sequence ()
4374 struct sequence_stack *stack, *top = NULL;
4376 for (stack = seq_stack; stack; stack = stack->next)
4379 top->first = first_insn;
4380 top->last = last_insn;
4381 /* ??? Why don't we save seq_rtl_expr here? */
4386 /* After emitting to a sequence, restore previous saved state.
4388 To get the contents of the sequence just made, you must call
4389 `gen_sequence' *before* calling here.
4391 If the compiler might have deferred popping arguments while
4392 generating this sequence, and this sequence will not be immediately
4393 inserted into the instruction stream, use do_pending_stack_adjust
4394 before calling gen_sequence. That will ensure that the deferred
4395 pops are inserted into this sequence, and not into some random
4396 location in the instruction stream. See INHIBIT_DEFER_POP for more
4397 information about deferred popping of arguments. */
4402 struct sequence_stack *tem = seq_stack;
4404 first_insn = tem->first;
4405 last_insn = tem->last;
4406 seq_rtl_expr = tem->sequence_rtl_expr;
4407 seq_stack = tem->next;
4412 /* This works like end_sequence, but records the old sequence in FIRST
4416 end_full_sequence (first, last)
4419 *first = first_insn;
4424 /* Return 1 if currently emitting into a sequence. */
4429 return seq_stack != 0;
4432 /* Generate a SEQUENCE rtx containing the insns already emitted
4433 to the current sequence.
4435 This is how the gen_... function from a DEFINE_EXPAND
4436 constructs the SEQUENCE that it returns. */
4446 /* Count the insns in the chain. */
4448 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4451 /* If only one insn, return it rather than a SEQUENCE.
4452 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4453 the case of an empty list.)
4454 We only return the pattern of an insn if its code is INSN and it
4455 has no notes. This ensures that no information gets lost. */
4457 && ! RTX_FRAME_RELATED_P (first_insn)
4458 && GET_CODE (first_insn) == INSN
4459 /* Don't throw away any reg notes. */
4460 && REG_NOTES (first_insn) == 0)
4461 return PATTERN (first_insn);
4463 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4465 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4466 XVECEXP (result, 0, i) = tem;
4471 /* Put the various virtual registers into REGNO_REG_RTX. */
4474 init_virtual_regs (es)
4475 struct emit_status *es;
4477 rtx *ptr = es->x_regno_reg_rtx;
4478 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4479 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4480 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4481 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4482 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4486 clear_emit_caches ()
4490 /* Clear the start_sequence/gen_sequence cache. */
4491 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4492 sequence_result[i] = 0;
4496 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4497 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4498 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4499 static int copy_insn_n_scratches;
4501 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4502 copied an ASM_OPERANDS.
4503 In that case, it is the original input-operand vector. */
4504 static rtvec orig_asm_operands_vector;
4506 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4507 copied an ASM_OPERANDS.
4508 In that case, it is the copied input-operand vector. */
4509 static rtvec copy_asm_operands_vector;
4511 /* Likewise for the constraints vector. */
4512 static rtvec orig_asm_constraints_vector;
4513 static rtvec copy_asm_constraints_vector;
4515 /* Recursively create a new copy of an rtx for copy_insn.
4516 This function differs from copy_rtx in that it handles SCRATCHes and
4517 ASM_OPERANDs properly.
4518 Normally, this function is not used directly; use copy_insn as front end.
4519 However, you could first copy an insn pattern with copy_insn and then use
4520 this function afterwards to properly copy any REG_NOTEs containing
4530 const char *format_ptr;
4532 code = GET_CODE (orig);
4549 for (i = 0; i < copy_insn_n_scratches; i++)
4550 if (copy_insn_scratch_in[i] == orig)
4551 return copy_insn_scratch_out[i];
4555 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4556 a LABEL_REF, it isn't sharable. */
4557 if (GET_CODE (XEXP (orig, 0)) == PLUS
4558 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4559 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4563 /* A MEM with a constant address is not sharable. The problem is that
4564 the constant address may need to be reloaded. If the mem is shared,
4565 then reloading one copy of this mem will cause all copies to appear
4566 to have been reloaded. */
4572 copy = rtx_alloc (code);
4574 /* Copy the various flags, and other information. We assume that
4575 all fields need copying, and then clear the fields that should
4576 not be copied. That is the sensible default behavior, and forces
4577 us to explicitly document why we are *not* copying a flag. */
4578 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4580 /* We do not copy the USED flag, which is used as a mark bit during
4581 walks over the RTL. */
4584 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4585 if (GET_RTX_CLASS (code) == 'i')
4589 copy->frame_related = 0;
4592 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4594 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4596 copy->fld[i] = orig->fld[i];
4597 switch (*format_ptr++)
4600 if (XEXP (orig, i) != NULL)
4601 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4606 if (XVEC (orig, i) == orig_asm_constraints_vector)
4607 XVEC (copy, i) = copy_asm_constraints_vector;
4608 else if (XVEC (orig, i) == orig_asm_operands_vector)
4609 XVEC (copy, i) = copy_asm_operands_vector;
4610 else if (XVEC (orig, i) != NULL)
4612 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4613 for (j = 0; j < XVECLEN (copy, i); j++)
4614 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4625 /* These are left unchanged. */
4633 if (code == SCRATCH)
4635 i = copy_insn_n_scratches++;
4636 if (i >= MAX_RECOG_OPERANDS)
4638 copy_insn_scratch_in[i] = orig;
4639 copy_insn_scratch_out[i] = copy;
4641 else if (code == ASM_OPERANDS)
4643 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4644 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4645 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4646 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4652 /* Create a new copy of an rtx.
4653 This function differs from copy_rtx in that it handles SCRATCHes and
4654 ASM_OPERANDs properly.
4655 INSN doesn't really have to be a full INSN; it could be just the
4661 copy_insn_n_scratches = 0;
4662 orig_asm_operands_vector = 0;
4663 orig_asm_constraints_vector = 0;
4664 copy_asm_operands_vector = 0;
4665 copy_asm_constraints_vector = 0;
4666 return copy_insn_1 (insn);
4669 /* Initialize data structures and variables in this file
4670 before generating rtl for each function. */
4675 struct function *f = cfun;
4677 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4680 seq_rtl_expr = NULL;
4682 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4685 first_label_num = label_num;
4689 clear_emit_caches ();
4691 /* Init the tables that describe all the pseudo regs. */
4693 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4695 f->emit->regno_pointer_align
4696 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4697 sizeof (unsigned char));
4700 = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx));
4703 = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree));
4705 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4706 init_virtual_regs (f->emit);
4708 /* Indicate that the virtual registers and stack locations are
4710 REG_POINTER (stack_pointer_rtx) = 1;
4711 REG_POINTER (frame_pointer_rtx) = 1;
4712 REG_POINTER (hard_frame_pointer_rtx) = 1;
4713 REG_POINTER (arg_pointer_rtx) = 1;
4715 REG_POINTER (virtual_incoming_args_rtx) = 1;
4716 REG_POINTER (virtual_stack_vars_rtx) = 1;
4717 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4718 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4719 REG_POINTER (virtual_cfa_rtx) = 1;
4721 #ifdef STACK_BOUNDARY
4722 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4723 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4724 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4725 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4727 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4728 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4729 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4730 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4731 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4734 #ifdef INIT_EXPANDERS
4739 /* Mark SS for GC. */
4742 mark_sequence_stack (ss)
4743 struct sequence_stack *ss;
4747 ggc_mark_rtx (ss->first);
4748 ggc_mark_tree (ss->sequence_rtl_expr);
4753 /* Mark ES for GC. */
4756 mark_emit_status (es)
4757 struct emit_status *es;
4766 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx,
4768 i > 0; --i, ++r, ++t)
4774 mark_sequence_stack (es->sequence_stack);
4775 ggc_mark_tree (es->sequence_rtl_expr);
4776 ggc_mark_rtx (es->x_first_insn);
4779 /* Generate the constant 0. */
4782 gen_const_vector_0 (mode)
4783 enum machine_mode mode;
4788 enum machine_mode inner;
4790 units = GET_MODE_NUNITS (mode);
4791 inner = GET_MODE_INNER (mode);
4793 v = rtvec_alloc (units);
4795 /* We need to call this function after we to set CONST0_RTX first. */
4796 if (!CONST0_RTX (inner))
4799 for (i = 0; i < units; ++i)
4800 RTVEC_ELT (v, i) = CONST0_RTX (inner);
4802 tem = gen_rtx_CONST_VECTOR (mode, v);
4806 /* Create some permanent unique rtl objects shared between all functions.
4807 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4810 init_emit_once (line_numbers)
4814 enum machine_mode mode;
4815 enum machine_mode double_mode;
4817 /* Initialize the CONST_INT and memory attribute hash tables. */
4818 const_int_htab = htab_create (37, const_int_htab_hash,
4819 const_int_htab_eq, NULL);
4820 ggc_add_deletable_htab (const_int_htab, 0, 0);
4822 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4823 mem_attrs_htab_eq, NULL);
4824 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4826 no_line_numbers = ! line_numbers;
4828 /* Compute the word and byte modes. */
4830 byte_mode = VOIDmode;
4831 word_mode = VOIDmode;
4832 double_mode = VOIDmode;
4834 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4835 mode = GET_MODE_WIDER_MODE (mode))
4837 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4838 && byte_mode == VOIDmode)
4841 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4842 && word_mode == VOIDmode)
4846 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4847 mode = GET_MODE_WIDER_MODE (mode))
4849 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4850 && double_mode == VOIDmode)
4854 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4856 /* Assign register numbers to the globally defined register rtx.
4857 This must be done at runtime because the register number field
4858 is in a union and some compilers can't initialize unions. */
4860 pc_rtx = gen_rtx (PC, VOIDmode);
4861 cc0_rtx = gen_rtx (CC0, VOIDmode);
4862 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4863 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4864 if (hard_frame_pointer_rtx == 0)
4865 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4866 HARD_FRAME_POINTER_REGNUM);
4867 if (arg_pointer_rtx == 0)
4868 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4869 virtual_incoming_args_rtx =
4870 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4871 virtual_stack_vars_rtx =
4872 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4873 virtual_stack_dynamic_rtx =
4874 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4875 virtual_outgoing_args_rtx =
4876 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4877 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4879 /* These rtx must be roots if GC is enabled. */
4880 ggc_add_rtx_root (global_rtl, GR_MAX);
4882 #ifdef INIT_EXPANDERS
4883 /* This is to initialize {init|mark|free}_machine_status before the first
4884 call to push_function_context_to. This is needed by the Chill front
4885 end which calls push_function_context_to before the first call to
4886 init_function_start. */
4890 /* Create the unique rtx's for certain rtx codes and operand values. */
4892 /* Don't use gen_rtx here since gen_rtx in this case
4893 tries to use these variables. */
4894 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4895 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4896 gen_rtx_raw_CONST_INT (VOIDmode, i);
4897 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4899 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4900 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4901 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4903 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4905 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4906 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4907 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4908 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4910 for (i = 0; i <= 2; i++)
4912 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4913 mode = GET_MODE_WIDER_MODE (mode))
4915 rtx tem = rtx_alloc (CONST_DOUBLE);
4916 union real_extract u;
4918 /* Zero any holes in a structure. */
4919 memset ((char *) &u, 0, sizeof u);
4920 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4922 /* Avoid trailing garbage in the rtx. */
4923 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4924 CONST_DOUBLE_LOW (tem) = 0;
4925 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4926 CONST_DOUBLE_HIGH (tem) = 0;
4928 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4929 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4930 PUT_MODE (tem, mode);
4932 const_tiny_rtx[i][(int) mode] = tem;
4935 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4937 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4938 mode = GET_MODE_WIDER_MODE (mode))
4939 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4941 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4943 mode = GET_MODE_WIDER_MODE (mode))
4944 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4947 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
4949 mode = GET_MODE_WIDER_MODE (mode))
4950 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
4952 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
4954 mode = GET_MODE_WIDER_MODE (mode))
4955 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
4957 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4958 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4959 const_tiny_rtx[0][i] = const0_rtx;
4961 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4962 if (STORE_FLAG_VALUE == 1)
4963 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4965 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4966 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4967 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4968 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4969 ggc_add_rtx_root (&const_true_rtx, 1);
4971 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4972 return_address_pointer_rtx
4973 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4977 struct_value_rtx = STRUCT_VALUE;
4979 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4982 #ifdef STRUCT_VALUE_INCOMING
4983 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4985 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4986 struct_value_incoming_rtx
4987 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4989 struct_value_incoming_rtx = struct_value_rtx;
4993 #ifdef STATIC_CHAIN_REGNUM
4994 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4996 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4997 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4998 static_chain_incoming_rtx
4999 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5002 static_chain_incoming_rtx = static_chain_rtx;
5006 static_chain_rtx = STATIC_CHAIN;
5008 #ifdef STATIC_CHAIN_INCOMING
5009 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5011 static_chain_incoming_rtx = static_chain_rtx;
5015 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5016 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5018 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
5019 ggc_add_rtx_root (&struct_value_rtx, 1);
5020 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
5021 ggc_add_rtx_root (&static_chain_rtx, 1);
5022 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
5023 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
5026 /* Query and clear/ restore no_line_numbers. This is used by the
5027 switch / case handling in stmt.c to give proper line numbers in
5028 warnings about unreachable code. */
5031 force_line_numbers ()
5033 int old = no_line_numbers;
5035 no_line_numbers = 0;
5037 force_next_line_note ();
5042 restore_line_number_status (old_value)
5045 no_line_numbers = old_value;