1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_last_label_num was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconst3;
114 REAL_VALUE_TYPE dconst10;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconstm2;
117 REAL_VALUE_TYPE dconsthalf;
118 REAL_VALUE_TYPE dconstthird;
119 REAL_VALUE_TYPE dconstpi;
120 REAL_VALUE_TYPE dconste;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_int_htab;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
163 htab_t mem_attrs_htab;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
167 htab_t reg_attrs_htab;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
171 htab_t const_double_htab;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx make_jump_insn_raw (rtx);
180 static rtx make_call_insn_raw (rtx);
181 static rtx find_line_note (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void unshare_all_decls (tree);
184 static void reset_used_decls (tree);
185 static void mark_label_nuses (rtx);
186 static hashval_t const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx lookup_const_double (rtx);
191 static hashval_t mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
195 static hashval_t reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs *get_reg_attrs (tree, int);
198 static tree component_ref_for_mem_expr (tree);
199 static rtx gen_const_vector_0 (enum machine_mode);
200 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
201 static void copy_rtx_if_shared_1 (rtx *orig);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x)
212 return (hashval_t) INTVAL ((rtx) x);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x, const void *y)
222 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x)
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x, const void *y)
248 rtx a = (rtx)x, b = (rtx)y;
250 if (GET_MODE (a) != GET_MODE (b))
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x)
265 mem_attrs *p = (mem_attrs *) x;
267 return (p->alias ^ (p->align * 1000)
268 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
269 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x, const void *y)
280 mem_attrs *p = (mem_attrs *) x;
281 mem_attrs *q = (mem_attrs *) y;
283 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
284 && p->size == q->size && p->align == q->align);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
293 unsigned int align, enum machine_mode mode)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias == 0 && expr == 0 && offset == 0
303 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
304 && (STRICT_ALIGNMENT && mode != BLKmode
305 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
310 attrs.offset = offset;
314 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
317 *slot = ggc_alloc (sizeof (mem_attrs));
318 memcpy (*slot, &attrs, sizeof (mem_attrs));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x)
329 reg_attrs *p = (reg_attrs *) x;
331 return ((p->offset * 1000) ^ (long) p->decl);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x, const void *y)
341 reg_attrs *p = (reg_attrs *) x;
342 reg_attrs *q = (reg_attrs *) y;
344 return (p->decl == q->decl && p->offset == q->offset);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl, int offset)
356 /* If everything is the default, we can just return zero. */
357 if (decl == 0 && offset == 0)
361 attrs.offset = offset;
363 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
366 *slot = ggc_alloc (sizeof (reg_attrs));
367 memcpy (*slot, &attrs, sizeof (reg_attrs));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode, int regno)
380 rtx x = gen_rtx_raw_REG (mode, regno);
381 ORIGINAL_REGNO (x) = regno;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
394 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
395 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx && arg == STORE_FLAG_VALUE)
399 return const_true_rtx;
402 /* Look up the CONST_INT in the hash table. */
403 slot = htab_find_slot_with_hash (const_int_htab, &arg,
404 (hashval_t) arg, INSERT);
406 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
412 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
414 return GEN_INT (trunc_int_for_mode (c, mode));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real)
427 void **slot = htab_find_slot (const_double_htab, real, INSERT);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
439 rtx real = rtx_alloc (CONST_DOUBLE);
440 PUT_MODE (real, mode);
442 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
444 return lookup_const_double (real);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
458 if (mode != VOIDmode)
461 if (GET_MODE_CLASS (mode) != MODE_INT
462 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width = GET_MODE_BITSIZE (mode);
472 if (width < HOST_BITS_PER_WIDE_INT
473 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
474 != ((HOST_WIDE_INT) (-1) << (width - 1))))
475 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
476 else if (width == HOST_BITS_PER_WIDE_INT
477 && ! (i1 == ~0 && i0 < 0))
479 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width < HOST_BITS_PER_WIDE_INT
493 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
494 i0 |= ((HOST_WIDE_INT) (-1) << width);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width <= HOST_BITS_PER_WIDE_INT)
515 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
522 /* We use VOIDmode for integers. */
523 value = rtx_alloc (CONST_DOUBLE);
524 PUT_MODE (value, VOIDmode);
526 CONST_DOUBLE_LOW (value) = i0;
527 CONST_DOUBLE_HIGH (value) = i1;
529 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
530 XWINT (value, i) = 0;
532 return lookup_const_double (value);
536 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode == Pmode && !reload_in_progress)
554 if (regno == FRAME_POINTER_REGNUM
555 && (!reload_completed || frame_pointer_needed))
556 return frame_pointer_rtx;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno == HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed || frame_pointer_needed))
560 return hard_frame_pointer_rtx;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno == ARG_POINTER_REGNUM)
564 return arg_pointer_rtx;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
568 return return_address_pointer_rtx;
570 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
572 return pic_offset_table_rtx;
573 if (regno == STACK_POINTER_REGNUM)
574 return stack_pointer_rtx;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno < FIRST_PSEUDO_REGISTER
593 && reg_raw_mode[regno] == mode)
594 return regno_reg_rtx[regno];
597 return gen_raw_REG (mode, regno);
601 gen_rtx_MEM (enum machine_mode mode, rtx addr)
603 rtx rt = gen_rtx_raw_MEM (mode, addr);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset % GET_MODE_SIZE (mode)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
628 return gen_rtx_raw_SUBREG (mode, reg, offset);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
637 enum machine_mode inmode;
639 inmode = GET_MODE (reg);
640 if (inmode == VOIDmode)
642 return gen_rtx_SUBREG (mode, reg,
643 subreg_lowpart_offset (mode, inmode));
646 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
648 ** This routine generates an RTX of the size specified by
649 ** <code>, which is an RTX code. The RTX structure is initialized
650 ** from the arguments <element1> through <elementn>, which are
651 ** interpreted according to the specific RTX type's format. The
652 ** special machine mode associated with the rtx (if any) is specified
655 ** gen_rtx can be invoked in a way which resembles the lisp-like
656 ** rtx it will generate. For example, the following rtx structure:
658 ** (plus:QI (mem:QI (reg:SI 1))
659 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
661 ** ...would be generated by the following C code:
663 ** gen_rtx (PLUS, QImode,
664 ** gen_rtx (MEM, QImode,
665 ** gen_rtx (REG, SImode, 1)),
666 ** gen_rtx (MEM, QImode,
667 ** gen_rtx (PLUS, SImode,
668 ** gen_rtx (REG, SImode, 2),
669 ** gen_rtx (REG, SImode, 3)))),
674 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
676 int i; /* Array indices... */
677 const char *fmt; /* Current rtx's format... */
678 rtx rt_val; /* RTX to return to caller... */
686 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
691 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
692 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
694 rt_val = immed_double_const (arg0, arg1, mode);
699 rt_val = gen_rtx_REG (mode, va_arg (p, int));
703 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
707 rt_val = rtx_alloc (code); /* Allocate the storage space. */
708 rt_val->mode = mode; /* Store the machine mode... */
710 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
711 for (i = 0; i < GET_RTX_LENGTH (code); i++)
715 case '0': /* Field with unknown use. Zero it. */
716 X0EXP (rt_val, i) = NULL_RTX;
719 case 'i': /* An integer? */
720 XINT (rt_val, i) = va_arg (p, int);
723 case 'w': /* A wide integer? */
724 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
727 case 's': /* A string? */
728 XSTR (rt_val, i) = va_arg (p, char *);
731 case 'e': /* An expression? */
732 case 'u': /* An insn? Same except when printing. */
733 XEXP (rt_val, i) = va_arg (p, rtx);
736 case 'E': /* An RTX vector? */
737 XVEC (rt_val, i) = va_arg (p, rtvec);
740 case 'b': /* A bitmap? */
741 XBITMAP (rt_val, i) = va_arg (p, bitmap);
744 case 't': /* A tree? */
745 XTREE (rt_val, i) = va_arg (p, tree);
759 /* gen_rtvec (n, [rt1, ..., rtn])
761 ** This routine creates an rtvec and stores within it the
762 ** pointers to rtx's which are its arguments.
767 gen_rtvec (int n, ...)
776 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
778 vector = alloca (n * sizeof (rtx));
780 for (i = 0; i < n; i++)
781 vector[i] = va_arg (p, rtx);
783 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
787 return gen_rtvec_v (save_n, vector);
791 gen_rtvec_v (int n, rtx *argp)
797 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
799 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
801 for (i = 0; i < n; i++)
802 rt_val->elem[i] = *argp++;
807 /* Generate a REG rtx for a new pseudo register of mode MODE.
808 This pseudo is assigned the next sequential register number. */
811 gen_reg_rtx (enum machine_mode mode)
813 struct function *f = cfun;
816 /* Don't let anything called after initial flow analysis create new
821 if (generating_concat_p
822 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
823 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
825 /* For complex modes, don't make a single pseudo.
826 Instead, make a CONCAT of two pseudos.
827 This allows noncontiguous allocation of the real and imaginary parts,
828 which makes much better code. Besides, allocating DCmode
829 pseudos overstrains reload on some machines like the 386. */
830 rtx realpart, imagpart;
831 enum machine_mode partmode = GET_MODE_INNER (mode);
833 realpart = gen_reg_rtx (partmode);
834 imagpart = gen_reg_rtx (partmode);
835 return gen_rtx_CONCAT (mode, realpart, imagpart);
838 /* Make sure regno_pointer_align, and regno_reg_rtx are large
839 enough to have an element for this pseudo reg number. */
841 if (reg_rtx_no == f->emit->regno_pointer_align_length)
843 int old_size = f->emit->regno_pointer_align_length;
847 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
848 memset (new + old_size, 0, old_size);
849 f->emit->regno_pointer_align = (unsigned char *) new;
851 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
852 old_size * 2 * sizeof (rtx));
853 memset (new1 + old_size, 0, old_size * sizeof (rtx));
854 regno_reg_rtx = new1;
856 f->emit->regno_pointer_align_length = old_size * 2;
859 val = gen_raw_REG (mode, reg_rtx_no);
860 regno_reg_rtx[reg_rtx_no++] = val;
864 /* Generate a register with same attributes as REG,
865 but offsetted by OFFSET. */
868 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
870 rtx new = gen_rtx_REG (mode, regno);
871 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
872 REG_OFFSET (reg) + offset);
876 /* Set the decl for MEM to DECL. */
879 set_reg_attrs_from_mem (rtx reg, rtx mem)
881 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
883 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
886 /* Set the register attributes for registers contained in PARM_RTX.
887 Use needed values from memory attributes of MEM. */
890 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
892 if (GET_CODE (parm_rtx) == REG)
893 set_reg_attrs_from_mem (parm_rtx, mem);
894 else if (GET_CODE (parm_rtx) == PARALLEL)
896 /* Check for a NULL entry in the first slot, used to indicate that the
897 parameter goes both on the stack and in registers. */
898 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
899 for (; i < XVECLEN (parm_rtx, 0); i++)
901 rtx x = XVECEXP (parm_rtx, 0, i);
902 if (GET_CODE (XEXP (x, 0)) == REG)
903 REG_ATTRS (XEXP (x, 0))
904 = get_reg_attrs (MEM_EXPR (mem),
905 INTVAL (XEXP (x, 1)));
910 /* Assign the RTX X to declaration T. */
912 set_decl_rtl (tree t, rtx x)
914 DECL_CHECK (t)->decl.rtl = x;
918 /* For register, we maintain the reverse information too. */
919 if (GET_CODE (x) == REG)
920 REG_ATTRS (x) = get_reg_attrs (t, 0);
921 else if (GET_CODE (x) == SUBREG)
922 REG_ATTRS (SUBREG_REG (x))
923 = get_reg_attrs (t, -SUBREG_BYTE (x));
924 if (GET_CODE (x) == CONCAT)
926 if (REG_P (XEXP (x, 0)))
927 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
928 if (REG_P (XEXP (x, 1)))
929 REG_ATTRS (XEXP (x, 1))
930 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
932 if (GET_CODE (x) == PARALLEL)
935 for (i = 0; i < XVECLEN (x, 0); i++)
937 rtx y = XVECEXP (x, 0, i);
938 if (REG_P (XEXP (y, 0)))
939 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
944 /* Identify REG (which may be a CONCAT) as a user register. */
947 mark_user_reg (rtx reg)
949 if (GET_CODE (reg) == CONCAT)
951 REG_USERVAR_P (XEXP (reg, 0)) = 1;
952 REG_USERVAR_P (XEXP (reg, 1)) = 1;
954 else if (GET_CODE (reg) == REG)
955 REG_USERVAR_P (reg) = 1;
960 /* Identify REG as a probable pointer register and show its alignment
961 as ALIGN, if nonzero. */
964 mark_reg_pointer (rtx reg, int align)
966 if (! REG_POINTER (reg))
968 REG_POINTER (reg) = 1;
971 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
973 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
974 /* We can no-longer be sure just how aligned this pointer is. */
975 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
978 /* Return 1 plus largest pseudo reg number used in the current function. */
986 /* Return 1 + the largest label number used so far in the current function. */
991 if (last_label_num && label_num == base_label_num)
992 return last_label_num;
996 /* Return first label number used in this function (if any were used). */
999 get_first_label_num (void)
1001 return first_label_num;
1004 /* Return the final regno of X, which is a SUBREG of a hard
1007 subreg_hard_regno (rtx x, int check_mode)
1009 enum machine_mode mode = GET_MODE (x);
1010 unsigned int byte_offset, base_regno, final_regno;
1011 rtx reg = SUBREG_REG (x);
1013 /* This is where we attempt to catch illegal subregs
1014 created by the compiler. */
1015 if (GET_CODE (x) != SUBREG
1016 || GET_CODE (reg) != REG)
1018 base_regno = REGNO (reg);
1019 if (base_regno >= FIRST_PSEUDO_REGISTER)
1021 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1023 #ifdef ENABLE_CHECKING
1024 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1025 SUBREG_BYTE (x), mode))
1028 /* Catch non-congruent offsets too. */
1029 byte_offset = SUBREG_BYTE (x);
1030 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1033 final_regno = subreg_regno (x);
1038 /* Return a value representing some low-order bits of X, where the number
1039 of low-order bits is given by MODE. Note that no conversion is done
1040 between floating-point and fixed-point values, rather, the bit
1041 representation is returned.
1043 This function handles the cases in common between gen_lowpart, below,
1044 and two variants in cse.c and combine.c. These are the cases that can
1045 be safely handled at all points in the compilation.
1047 If this is not a case we can handle, return 0. */
1050 gen_lowpart_common (enum machine_mode mode, rtx x)
1052 int msize = GET_MODE_SIZE (mode);
1055 enum machine_mode innermode;
1057 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1058 so we have to make one up. Yuk. */
1059 innermode = GET_MODE (x);
1060 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
1061 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1062 else if (innermode == VOIDmode)
1063 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1065 xsize = GET_MODE_SIZE (innermode);
1067 if (innermode == VOIDmode || innermode == BLKmode)
1070 if (innermode == mode)
1073 /* MODE must occupy no more words than the mode of X. */
1074 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1075 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1078 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1079 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1082 offset = subreg_lowpart_offset (mode, innermode);
1084 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1085 && (GET_MODE_CLASS (mode) == MODE_INT
1086 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1088 /* If we are getting the low-order part of something that has been
1089 sign- or zero-extended, we can either just use the object being
1090 extended or make a narrower extension. If we want an even smaller
1091 piece than the size of the object being extended, call ourselves
1094 This case is used mostly by combine and cse. */
1096 if (GET_MODE (XEXP (x, 0)) == mode)
1098 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1099 return gen_lowpart_common (mode, XEXP (x, 0));
1100 else if (msize < xsize)
1101 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1103 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1104 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1105 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1106 return simplify_gen_subreg (mode, x, innermode, offset);
1108 /* Otherwise, we can't do this. */
1112 /* Return the constant real or imaginary part (which has mode MODE)
1113 of a complex value X. The IMAGPART_P argument determines whether
1114 the real or complex component should be returned. This function
1115 returns NULL_RTX if the component isn't a constant. */
1118 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1122 if (GET_CODE (x) == MEM
1123 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1125 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1126 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1128 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1129 if (TREE_CODE (part) == REAL_CST
1130 || TREE_CODE (part) == INTEGER_CST)
1131 return expand_expr (part, NULL_RTX, mode, 0);
1137 /* Return the real part (which has mode MODE) of a complex value X.
1138 This always comes at the low address in memory. */
1141 gen_realpart (enum machine_mode mode, rtx x)
1145 /* Handle complex constants. */
1146 part = gen_complex_constant_part (mode, x, 0);
1147 if (part != NULL_RTX)
1150 if (WORDS_BIG_ENDIAN
1151 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1153 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1155 ("can't access real part of complex value in hard register");
1156 else if (WORDS_BIG_ENDIAN)
1157 return gen_highpart (mode, x);
1159 return gen_lowpart (mode, x);
1162 /* Return the imaginary part (which has mode MODE) of a complex value X.
1163 This always comes at the high address in memory. */
1166 gen_imagpart (enum machine_mode mode, rtx x)
1170 /* Handle complex constants. */
1171 part = gen_complex_constant_part (mode, x, 1);
1172 if (part != NULL_RTX)
1175 if (WORDS_BIG_ENDIAN)
1176 return gen_lowpart (mode, x);
1177 else if (! WORDS_BIG_ENDIAN
1178 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1180 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1182 ("can't access imaginary part of complex value in hard register");
1184 return gen_highpart (mode, x);
1187 /* Return 1 iff X, assumed to be a SUBREG,
1188 refers to the real part of the complex value in its containing reg.
1189 Complex values are always stored with the real part in the first word,
1190 regardless of WORDS_BIG_ENDIAN. */
1193 subreg_realpart_p (rtx x)
1195 if (GET_CODE (x) != SUBREG)
1198 return ((unsigned int) SUBREG_BYTE (x)
1199 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1202 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1203 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1204 least-significant part of X.
1205 MODE specifies how big a part of X to return;
1206 it usually should not be larger than a word.
1207 If X is a MEM whose address is a QUEUED, the value may be so also. */
1210 gen_lowpart (enum machine_mode mode, rtx x)
1212 rtx result = gen_lowpart_common (mode, x);
1216 else if (GET_CODE (x) == REG)
1218 /* Must be a hard reg that's not valid in MODE. */
1219 result = gen_lowpart_common (mode, copy_to_reg (x));
1224 else if (GET_CODE (x) == MEM)
1226 /* The only additional case we can do is MEM. */
1229 /* The following exposes the use of "x" to CSE. */
1230 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1231 && SCALAR_INT_MODE_P (GET_MODE (x))
1232 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1233 GET_MODE_BITSIZE (GET_MODE (x)))
1234 && ! no_new_pseudos)
1235 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1237 if (WORDS_BIG_ENDIAN)
1238 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1239 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1241 if (BYTES_BIG_ENDIAN)
1242 /* Adjust the address so that the address-after-the-data
1244 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1245 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1247 return adjust_address (x, mode, offset);
1249 else if (GET_CODE (x) == ADDRESSOF)
1250 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1255 /* Like `gen_lowpart', but refer to the most significant part.
1256 This is used to access the imaginary part of a complex number. */
1259 gen_highpart (enum machine_mode mode, rtx x)
1261 unsigned int msize = GET_MODE_SIZE (mode);
1264 /* This case loses if X is a subreg. To catch bugs early,
1265 complain if an invalid MODE is used even in other cases. */
1266 if (msize > UNITS_PER_WORD
1267 && msize != (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)))
1270 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1271 subreg_highpart_offset (mode, GET_MODE (x)));
1273 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1274 the target if we have a MEM. gen_highpart must return a valid operand,
1275 emitting code if necessary to do so. */
1276 if (result != NULL_RTX && GET_CODE (result) == MEM)
1277 result = validize_mem (result);
1284 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1285 be VOIDmode constant. */
1287 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1289 if (GET_MODE (exp) != VOIDmode)
1291 if (GET_MODE (exp) != innermode)
1293 return gen_highpart (outermode, exp);
1295 return simplify_gen_subreg (outermode, exp, innermode,
1296 subreg_highpart_offset (outermode, innermode));
1299 /* Return offset in bytes to get OUTERMODE low part
1300 of the value in mode INNERMODE stored in memory in target format. */
1303 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1305 unsigned int offset = 0;
1306 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1310 if (WORDS_BIG_ENDIAN)
1311 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1312 if (BYTES_BIG_ENDIAN)
1313 offset += difference % UNITS_PER_WORD;
1319 /* Return offset in bytes to get OUTERMODE high part
1320 of the value in mode INNERMODE stored in memory in target format. */
1322 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1324 unsigned int offset = 0;
1325 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1327 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1332 if (! WORDS_BIG_ENDIAN)
1333 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1334 if (! BYTES_BIG_ENDIAN)
1335 offset += difference % UNITS_PER_WORD;
1341 /* Return 1 iff X, assumed to be a SUBREG,
1342 refers to the least significant part of its containing reg.
1343 If X is not a SUBREG, always return 1 (it is its own low part!). */
1346 subreg_lowpart_p (rtx x)
1348 if (GET_CODE (x) != SUBREG)
1350 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1353 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1354 == SUBREG_BYTE (x));
1357 /* Return subword OFFSET of operand OP.
1358 The word number, OFFSET, is interpreted as the word number starting
1359 at the low-order address. OFFSET 0 is the low-order word if not
1360 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1362 If we cannot extract the required word, we return zero. Otherwise,
1363 an rtx corresponding to the requested word will be returned.
1365 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1366 reload has completed, a valid address will always be returned. After
1367 reload, if a valid address cannot be returned, we return zero.
1369 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1370 it is the responsibility of the caller.
1372 MODE is the mode of OP in case it is a CONST_INT.
1374 ??? This is still rather broken for some cases. The problem for the
1375 moment is that all callers of this thing provide no 'goal mode' to
1376 tell us to work with. This exists because all callers were written
1377 in a word based SUBREG world.
1378 Now use of this function can be deprecated by simplify_subreg in most
1383 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1385 if (mode == VOIDmode)
1386 mode = GET_MODE (op);
1388 if (mode == VOIDmode)
1391 /* If OP is narrower than a word, fail. */
1393 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1396 /* If we want a word outside OP, return zero. */
1398 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1401 /* Form a new MEM at the requested address. */
1402 if (GET_CODE (op) == MEM)
1404 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1406 if (! validate_address)
1409 else if (reload_completed)
1411 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1415 return replace_equiv_address (new, XEXP (new, 0));
1418 /* Rest can be handled by simplify_subreg. */
1419 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1422 /* Similar to `operand_subword', but never return 0. If we can't extract
1423 the required subword, put OP into a register and try again. If that fails,
1424 abort. We always validate the address in this case.
1426 MODE is the mode of OP, in case it is CONST_INT. */
1429 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1431 rtx result = operand_subword (op, offset, 1, mode);
1436 if (mode != BLKmode && mode != VOIDmode)
1438 /* If this is a register which can not be accessed by words, copy it
1439 to a pseudo register. */
1440 if (GET_CODE (op) == REG)
1441 op = copy_to_reg (op);
1443 op = force_reg (mode, op);
1446 result = operand_subword (op, offset, 1, mode);
1453 /* Given a compare instruction, swap the operands.
1454 A test instruction is changed into a compare of 0 against the operand. */
1457 reverse_comparison (rtx insn)
1459 rtx body = PATTERN (insn);
1462 if (GET_CODE (body) == SET)
1463 comp = SET_SRC (body);
1465 comp = SET_SRC (XVECEXP (body, 0, 0));
1467 if (GET_CODE (comp) == COMPARE)
1469 rtx op0 = XEXP (comp, 0);
1470 rtx op1 = XEXP (comp, 1);
1471 XEXP (comp, 0) = op1;
1472 XEXP (comp, 1) = op0;
1476 rtx new = gen_rtx_COMPARE (VOIDmode,
1477 CONST0_RTX (GET_MODE (comp)), comp);
1478 if (GET_CODE (body) == SET)
1479 SET_SRC (body) = new;
1481 SET_SRC (XVECEXP (body, 0, 0)) = new;
1485 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1486 or (2) a component ref of something variable. Represent the later with
1487 a NULL expression. */
1490 component_ref_for_mem_expr (tree ref)
1492 tree inner = TREE_OPERAND (ref, 0);
1494 if (TREE_CODE (inner) == COMPONENT_REF)
1495 inner = component_ref_for_mem_expr (inner);
1498 tree placeholder_ptr = 0;
1500 /* Now remove any conversions: they don't change what the underlying
1501 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1502 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1503 || TREE_CODE (inner) == NON_LVALUE_EXPR
1504 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1505 || TREE_CODE (inner) == SAVE_EXPR
1506 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1507 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1508 inner = find_placeholder (inner, &placeholder_ptr);
1510 inner = TREE_OPERAND (inner, 0);
1512 if (! DECL_P (inner))
1516 if (inner == TREE_OPERAND (ref, 0))
1519 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1520 TREE_OPERAND (ref, 1));
1523 /* Given REF, a MEM, and T, either the type of X or the expression
1524 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1525 if we are making a new object of this type. BITPOS is nonzero if
1526 there is an offset outstanding on T that will be applied later. */
1529 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1530 HOST_WIDE_INT bitpos)
1532 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1533 tree expr = MEM_EXPR (ref);
1534 rtx offset = MEM_OFFSET (ref);
1535 rtx size = MEM_SIZE (ref);
1536 unsigned int align = MEM_ALIGN (ref);
1537 HOST_WIDE_INT apply_bitpos = 0;
1540 /* It can happen that type_for_mode was given a mode for which there
1541 is no language-level type. In which case it returns NULL, which
1546 type = TYPE_P (t) ? t : TREE_TYPE (t);
1547 if (type == error_mark_node)
1550 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1551 wrong answer, as it assumes that DECL_RTL already has the right alias
1552 info. Callers should not set DECL_RTL until after the call to
1553 set_mem_attributes. */
1554 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1557 /* Get the alias set from the expression or type (perhaps using a
1558 front-end routine) and use it. */
1559 alias = get_alias_set (t);
1561 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1562 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1563 RTX_UNCHANGING_P (ref)
1564 |= ((lang_hooks.honor_readonly
1565 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1566 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1568 /* If we are making an object of this type, or if this is a DECL, we know
1569 that it is a scalar if the type is not an aggregate. */
1570 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1571 MEM_SCALAR_P (ref) = 1;
1573 /* We can set the alignment from the type if we are making an object,
1574 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1575 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1576 align = MAX (align, TYPE_ALIGN (type));
1578 /* If the size is known, we can set that. */
1579 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1580 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1582 /* If T is not a type, we may be able to deduce some more information about
1586 maybe_set_unchanging (ref, t);
1587 if (TREE_THIS_VOLATILE (t))
1588 MEM_VOLATILE_P (ref) = 1;
1590 /* Now remove any conversions: they don't change what the underlying
1591 object is. Likewise for SAVE_EXPR. */
1592 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1593 || TREE_CODE (t) == NON_LVALUE_EXPR
1594 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1595 || TREE_CODE (t) == SAVE_EXPR)
1596 t = TREE_OPERAND (t, 0);
1598 /* If this expression can't be addressed (e.g., it contains a reference
1599 to a non-addressable field), show we don't change its alias set. */
1600 if (! can_address_p (t))
1601 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1603 /* If this is a decl, set the attributes of the MEM from it. */
1607 offset = const0_rtx;
1608 apply_bitpos = bitpos;
1609 size = (DECL_SIZE_UNIT (t)
1610 && host_integerp (DECL_SIZE_UNIT (t), 1)
1611 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1612 align = DECL_ALIGN (t);
1615 /* If this is a constant, we know the alignment. */
1616 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1618 align = TYPE_ALIGN (type);
1619 #ifdef CONSTANT_ALIGNMENT
1620 align = CONSTANT_ALIGNMENT (t, align);
1624 /* If this is a field reference and not a bit-field, record it. */
1625 /* ??? There is some information that can be gleened from bit-fields,
1626 such as the word offset in the structure that might be modified.
1627 But skip it for now. */
1628 else if (TREE_CODE (t) == COMPONENT_REF
1629 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1631 expr = component_ref_for_mem_expr (t);
1632 offset = const0_rtx;
1633 apply_bitpos = bitpos;
1634 /* ??? Any reason the field size would be different than
1635 the size we got from the type? */
1638 /* If this is an array reference, look for an outer field reference. */
1639 else if (TREE_CODE (t) == ARRAY_REF)
1641 tree off_tree = size_zero_node;
1642 /* We can't modify t, because we use it at the end of the
1648 tree index = TREE_OPERAND (t2, 1);
1649 tree array = TREE_OPERAND (t2, 0);
1650 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1651 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1652 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1654 /* We assume all arrays have sizes that are a multiple of a byte.
1655 First subtract the lower bound, if any, in the type of the
1656 index, then convert to sizetype and multiply by the size of the
1658 if (low_bound != 0 && ! integer_zerop (low_bound))
1659 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1662 /* If the index has a self-referential type, pass it to a
1663 WITH_RECORD_EXPR; if the component size is, pass our
1664 component to one. */
1665 if (CONTAINS_PLACEHOLDER_P (index))
1666 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1667 if (CONTAINS_PLACEHOLDER_P (unit_size))
1668 unit_size = build (WITH_RECORD_EXPR, sizetype,
1672 = fold (build (PLUS_EXPR, sizetype,
1673 fold (build (MULT_EXPR, sizetype,
1677 t2 = TREE_OPERAND (t2, 0);
1679 while (TREE_CODE (t2) == ARRAY_REF);
1685 if (host_integerp (off_tree, 1))
1687 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1688 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1689 align = DECL_ALIGN (t2);
1690 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1692 offset = GEN_INT (ioff);
1693 apply_bitpos = bitpos;
1696 else if (TREE_CODE (t2) == COMPONENT_REF)
1698 expr = component_ref_for_mem_expr (t2);
1699 if (host_integerp (off_tree, 1))
1701 offset = GEN_INT (tree_low_cst (off_tree, 1));
1702 apply_bitpos = bitpos;
1704 /* ??? Any reason the field size would be different than
1705 the size we got from the type? */
1707 else if (flag_argument_noalias > 1
1708 && TREE_CODE (t2) == INDIRECT_REF
1709 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1716 /* If this is a Fortran indirect argument reference, record the
1718 else if (flag_argument_noalias > 1
1719 && TREE_CODE (t) == INDIRECT_REF
1720 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1727 /* If we modified OFFSET based on T, then subtract the outstanding
1728 bit position offset. Similarly, increase the size of the accessed
1729 object to contain the negative offset. */
1732 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1734 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1737 /* Now set the attributes we computed above. */
1739 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1741 /* If this is already known to be a scalar or aggregate, we are done. */
1742 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1745 /* If it is a reference into an aggregate, this is part of an aggregate.
1746 Otherwise we don't know. */
1747 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1748 || TREE_CODE (t) == ARRAY_RANGE_REF
1749 || TREE_CODE (t) == BIT_FIELD_REF)
1750 MEM_IN_STRUCT_P (ref) = 1;
1754 set_mem_attributes (rtx ref, tree t, int objectp)
1756 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1759 /* Set the decl for MEM to DECL. */
1762 set_mem_attrs_from_reg (rtx mem, rtx reg)
1765 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1766 GEN_INT (REG_OFFSET (reg)),
1767 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1770 /* Set the alias set of MEM to SET. */
1773 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1775 #ifdef ENABLE_CHECKING
1776 /* If the new and old alias sets don't conflict, something is wrong. */
1777 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1781 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1782 MEM_SIZE (mem), MEM_ALIGN (mem),
1786 /* Set the alignment of MEM to ALIGN bits. */
1789 set_mem_align (rtx mem, unsigned int align)
1791 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1792 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1796 /* Set the expr for MEM to EXPR. */
1799 set_mem_expr (rtx mem, tree expr)
1802 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1803 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1806 /* Set the offset of MEM to OFFSET. */
1809 set_mem_offset (rtx mem, rtx offset)
1811 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1812 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1816 /* Set the size of MEM to SIZE. */
1819 set_mem_size (rtx mem, rtx size)
1821 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1822 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1826 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1827 and its address changed to ADDR. (VOIDmode means don't change the mode.
1828 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1829 returned memory location is required to be valid. The memory
1830 attributes are not changed. */
1833 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1837 if (GET_CODE (memref) != MEM)
1839 if (mode == VOIDmode)
1840 mode = GET_MODE (memref);
1842 addr = XEXP (memref, 0);
1846 if (reload_in_progress || reload_completed)
1848 if (! memory_address_p (mode, addr))
1852 addr = memory_address (mode, addr);
1855 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1858 new = gen_rtx_MEM (mode, addr);
1859 MEM_COPY_ATTRIBUTES (new, memref);
1863 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1864 way we are changing MEMREF, so we only preserve the alias set. */
1867 change_address (rtx memref, enum machine_mode mode, rtx addr)
1869 rtx new = change_address_1 (memref, mode, addr, 1);
1870 enum machine_mode mmode = GET_MODE (new);
1873 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1874 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1875 (mmode == BLKmode ? BITS_PER_UNIT
1876 : GET_MODE_ALIGNMENT (mmode)),
1882 /* Return a memory reference like MEMREF, but with its mode changed
1883 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1884 nonzero, the memory address is forced to be valid.
1885 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1886 and caller is responsible for adjusting MEMREF base register. */
1889 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1890 int validate, int adjust)
1892 rtx addr = XEXP (memref, 0);
1894 rtx memoffset = MEM_OFFSET (memref);
1896 unsigned int memalign = MEM_ALIGN (memref);
1898 /* ??? Prefer to create garbage instead of creating shared rtl.
1899 This may happen even if offset is nonzero -- consider
1900 (plus (plus reg reg) const_int) -- so do this always. */
1901 addr = copy_rtx (addr);
1905 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1906 object, we can merge it into the LO_SUM. */
1907 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1909 && (unsigned HOST_WIDE_INT) offset
1910 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1911 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1912 plus_constant (XEXP (addr, 1), offset));
1914 addr = plus_constant (addr, offset);
1917 new = change_address_1 (memref, mode, addr, validate);
1919 /* Compute the new values of the memory attributes due to this adjustment.
1920 We add the offsets and update the alignment. */
1922 memoffset = GEN_INT (offset + INTVAL (memoffset));
1924 /* Compute the new alignment by taking the MIN of the alignment and the
1925 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1930 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1932 /* We can compute the size in a number of ways. */
1933 if (GET_MODE (new) != BLKmode)
1934 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1935 else if (MEM_SIZE (memref))
1936 size = plus_constant (MEM_SIZE (memref), -offset);
1938 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1939 memoffset, size, memalign, GET_MODE (new));
1941 /* At some point, we should validate that this offset is within the object,
1942 if all the appropriate values are known. */
1946 /* Return a memory reference like MEMREF, but with its mode changed
1947 to MODE and its address changed to ADDR, which is assumed to be
1948 MEMREF offseted by OFFSET bytes. If VALIDATE is
1949 nonzero, the memory address is forced to be valid. */
1952 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1953 HOST_WIDE_INT offset, int validate)
1955 memref = change_address_1 (memref, VOIDmode, addr, validate);
1956 return adjust_address_1 (memref, mode, offset, validate, 0);
1959 /* Return a memory reference like MEMREF, but whose address is changed by
1960 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1961 known to be in OFFSET (possibly 1). */
1964 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1966 rtx new, addr = XEXP (memref, 0);
1968 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1970 /* At this point we don't know _why_ the address is invalid. It
1971 could have secondary memory references, multiplies or anything.
1973 However, if we did go and rearrange things, we can wind up not
1974 being able to recognize the magic around pic_offset_table_rtx.
1975 This stuff is fragile, and is yet another example of why it is
1976 bad to expose PIC machinery too early. */
1977 if (! memory_address_p (GET_MODE (memref), new)
1978 && GET_CODE (addr) == PLUS
1979 && XEXP (addr, 0) == pic_offset_table_rtx)
1981 addr = force_reg (GET_MODE (addr), addr);
1982 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1985 update_temp_slot_address (XEXP (memref, 0), new);
1986 new = change_address_1 (memref, VOIDmode, new, 1);
1988 /* Update the alignment to reflect the offset. Reset the offset, which
1991 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1992 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1997 /* Return a memory reference like MEMREF, but with its address changed to
1998 ADDR. The caller is asserting that the actual piece of memory pointed
1999 to is the same, just the form of the address is being changed, such as
2000 by putting something into a register. */
2003 replace_equiv_address (rtx memref, rtx addr)
2005 /* change_address_1 copies the memory attribute structure without change
2006 and that's exactly what we want here. */
2007 update_temp_slot_address (XEXP (memref, 0), addr);
2008 return change_address_1 (memref, VOIDmode, addr, 1);
2011 /* Likewise, but the reference is not required to be valid. */
2014 replace_equiv_address_nv (rtx memref, rtx addr)
2016 return change_address_1 (memref, VOIDmode, addr, 0);
2019 /* Return a memory reference like MEMREF, but with its mode widened to
2020 MODE and offset by OFFSET. This would be used by targets that e.g.
2021 cannot issue QImode memory operations and have to use SImode memory
2022 operations plus masking logic. */
2025 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2027 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2028 tree expr = MEM_EXPR (new);
2029 rtx memoffset = MEM_OFFSET (new);
2030 unsigned int size = GET_MODE_SIZE (mode);
2032 /* If we don't know what offset we were at within the expression, then
2033 we can't know if we've overstepped the bounds. */
2039 if (TREE_CODE (expr) == COMPONENT_REF)
2041 tree field = TREE_OPERAND (expr, 1);
2043 if (! DECL_SIZE_UNIT (field))
2049 /* Is the field at least as large as the access? If so, ok,
2050 otherwise strip back to the containing structure. */
2051 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2052 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2053 && INTVAL (memoffset) >= 0)
2056 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2062 expr = TREE_OPERAND (expr, 0);
2063 memoffset = (GEN_INT (INTVAL (memoffset)
2064 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2065 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2068 /* Similarly for the decl. */
2069 else if (DECL_P (expr)
2070 && DECL_SIZE_UNIT (expr)
2071 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2072 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2073 && (! memoffset || INTVAL (memoffset) >= 0))
2077 /* The widened memory access overflows the expression, which means
2078 that it could alias another expression. Zap it. */
2085 memoffset = NULL_RTX;
2087 /* The widened memory may alias other stuff, so zap the alias set. */
2088 /* ??? Maybe use get_alias_set on any remaining expression. */
2090 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2091 MEM_ALIGN (new), mode);
2096 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2099 gen_label_rtx (void)
2101 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2102 NULL, label_num++, NULL);
2105 /* For procedure integration. */
2107 /* Install new pointers to the first and last insns in the chain.
2108 Also, set cur_insn_uid to one higher than the last in use.
2109 Used for an inline-procedure after copying the insn chain. */
2112 set_new_first_and_last_insn (rtx first, rtx last)
2120 for (insn = first; insn; insn = NEXT_INSN (insn))
2121 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2126 /* Set the last label number found in the current function.
2127 This is used when belatedly compiling an inline function. */
2130 set_new_last_label_num (int last)
2132 base_label_num = label_num;
2133 last_label_num = last;
2136 /* Restore all variables describing the current status from the structure *P.
2137 This is used after a nested function. */
2140 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2145 /* Go through all the RTL insn bodies and copy any invalid shared
2146 structure. This routine should only be called once. */
2149 unshare_all_rtl (tree fndecl, rtx insn)
2153 /* Make sure that virtual parameters are not shared. */
2154 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2155 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2157 /* Make sure that virtual stack slots are not shared. */
2158 unshare_all_decls (DECL_INITIAL (fndecl));
2160 /* Unshare just about everything else. */
2161 unshare_all_rtl_in_chain (insn);
2163 /* Make sure the addresses of stack slots found outside the insn chain
2164 (such as, in DECL_RTL of a variable) are not shared
2165 with the insn chain.
2167 This special care is necessary when the stack slot MEM does not
2168 actually appear in the insn chain. If it does appear, its address
2169 is unshared from all else at that point. */
2170 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2173 /* Go through all the RTL insn bodies and copy any invalid shared
2174 structure, again. This is a fairly expensive thing to do so it
2175 should be done sparingly. */
2178 unshare_all_rtl_again (rtx insn)
2183 for (p = insn; p; p = NEXT_INSN (p))
2186 reset_used_flags (PATTERN (p));
2187 reset_used_flags (REG_NOTES (p));
2188 reset_used_flags (LOG_LINKS (p));
2191 /* Make sure that virtual stack slots are not shared. */
2192 reset_used_decls (DECL_INITIAL (cfun->decl));
2194 /* Make sure that virtual parameters are not shared. */
2195 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2196 reset_used_flags (DECL_RTL (decl));
2198 reset_used_flags (stack_slot_list);
2200 unshare_all_rtl (cfun->decl, insn);
2203 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2204 Recursively does the same for subexpressions. */
2207 verify_rtx_sharing (rtx orig, rtx insn)
2212 const char *format_ptr;
2217 code = GET_CODE (x);
2219 /* These types may be freely shared. */
2235 /* SCRATCH must be shared because they represent distinct values. */
2237 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2242 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2243 a LABEL_REF, it isn't sharable. */
2244 if (GET_CODE (XEXP (x, 0)) == PLUS
2245 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2246 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2251 /* A MEM is allowed to be shared if its address is constant. */
2252 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2253 || reload_completed || reload_in_progress)
2262 /* This rtx may not be shared. If it has already been seen,
2263 replace it with a copy of itself. */
2265 if (RTX_FLAG (x, used))
2267 error ("Invalid rtl sharing found in the insn");
2269 error ("Shared rtx");
2273 RTX_FLAG (x, used) = 1;
2275 /* Now scan the subexpressions recursively. */
2277 format_ptr = GET_RTX_FORMAT (code);
2279 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2281 switch (*format_ptr++)
2284 verify_rtx_sharing (XEXP (x, i), insn);
2288 if (XVEC (x, i) != NULL)
2291 int len = XVECLEN (x, i);
2293 for (j = 0; j < len; j++)
2295 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2296 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2297 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2298 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2300 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2309 /* Go through all the RTL insn bodies and check that there is no unexpected
2310 sharing in between the subexpressions. */
2313 verify_rtl_sharing (void)
2317 for (p = get_insns (); p; p = NEXT_INSN (p))
2320 reset_used_flags (PATTERN (p));
2321 reset_used_flags (REG_NOTES (p));
2322 reset_used_flags (LOG_LINKS (p));
2325 for (p = get_insns (); p; p = NEXT_INSN (p))
2328 verify_rtx_sharing (PATTERN (p), p);
2329 verify_rtx_sharing (REG_NOTES (p), p);
2330 verify_rtx_sharing (LOG_LINKS (p), p);
2334 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2335 Assumes the mark bits are cleared at entry. */
2338 unshare_all_rtl_in_chain (rtx insn)
2340 for (; insn; insn = NEXT_INSN (insn))
2343 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2344 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2345 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2349 /* Go through all virtual stack slots of a function and copy any
2350 shared structure. */
2352 unshare_all_decls (tree blk)
2356 /* Copy shared decls. */
2357 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2358 if (DECL_RTL_SET_P (t))
2359 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2361 /* Now process sub-blocks. */
2362 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2363 unshare_all_decls (t);
2366 /* Go through all virtual stack slots of a function and mark them as
2369 reset_used_decls (tree blk)
2374 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2375 if (DECL_RTL_SET_P (t))
2376 reset_used_flags (DECL_RTL (t));
2378 /* Now process sub-blocks. */
2379 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2380 reset_used_decls (t);
2383 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2384 placed in the result directly, rather than being copied. MAY_SHARE is
2385 either a MEM of an EXPR_LIST of MEMs. */
2388 copy_most_rtx (rtx orig, rtx may_share)
2393 const char *format_ptr;
2395 if (orig == may_share
2396 || (GET_CODE (may_share) == EXPR_LIST
2397 && in_expr_list_p (may_share, orig)))
2400 code = GET_CODE (orig);
2418 copy = rtx_alloc (code);
2419 PUT_MODE (copy, GET_MODE (orig));
2420 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2421 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2422 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2423 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2424 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2426 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2428 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2430 switch (*format_ptr++)
2433 XEXP (copy, i) = XEXP (orig, i);
2434 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2435 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2439 XEXP (copy, i) = XEXP (orig, i);
2444 XVEC (copy, i) = XVEC (orig, i);
2445 if (XVEC (orig, i) != NULL)
2447 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2448 for (j = 0; j < XVECLEN (copy, i); j++)
2449 XVECEXP (copy, i, j)
2450 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2455 XWINT (copy, i) = XWINT (orig, i);
2460 XINT (copy, i) = XINT (orig, i);
2464 XTREE (copy, i) = XTREE (orig, i);
2469 XSTR (copy, i) = XSTR (orig, i);
2473 X0ANY (copy, i) = X0ANY (orig, i);
2483 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2484 Recursively does the same for subexpressions. Uses
2485 copy_rtx_if_shared_1 to reduce stack space. */
2488 copy_rtx_if_shared (rtx orig)
2490 copy_rtx_if_shared_1 (&orig);
2494 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2495 use. Recursively does the same for subexpressions. */
2498 copy_rtx_if_shared_1 (rtx *orig1)
2504 const char *format_ptr;
2508 /* Repeat is used to turn tail-recursion into iteration. */
2515 code = GET_CODE (x);
2517 /* These types may be freely shared. */
2532 /* SCRATCH must be shared because they represent distinct values. */
2535 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2540 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2541 a LABEL_REF, it isn't sharable. */
2542 if (GET_CODE (XEXP (x, 0)) == PLUS
2543 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2544 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2553 /* The chain of insns is not being copied. */
2560 /* This rtx may not be shared. If it has already been seen,
2561 replace it with a copy of itself. */
2563 if (RTX_FLAG (x, used))
2567 copy = rtx_alloc (code);
2568 memcpy (copy, x, RTX_SIZE (code));
2572 RTX_FLAG (x, used) = 1;
2574 /* Now scan the subexpressions recursively.
2575 We can store any replaced subexpressions directly into X
2576 since we know X is not shared! Any vectors in X
2577 must be copied if X was copied. */
2579 format_ptr = GET_RTX_FORMAT (code);
2580 length = GET_RTX_LENGTH (code);
2583 for (i = 0; i < length; i++)
2585 switch (*format_ptr++)
2589 copy_rtx_if_shared_1 (last_ptr);
2590 last_ptr = &XEXP (x, i);
2594 if (XVEC (x, i) != NULL)
2597 int len = XVECLEN (x, i);
2599 /* Copy the vector iff I copied the rtx and the length
2601 if (copied && len > 0)
2602 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2604 /* Call recursively on all inside the vector. */
2605 for (j = 0; j < len; j++)
2608 copy_rtx_if_shared_1 (last_ptr);
2609 last_ptr = &XVECEXP (x, i, j);
2624 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2625 to look for shared sub-parts. */
2628 reset_used_flags (rtx x)
2632 const char *format_ptr;
2635 /* Repeat is used to turn tail-recursion into iteration. */
2640 code = GET_CODE (x);
2642 /* These types may be freely shared so we needn't do any resetting
2664 /* The chain of insns is not being copied. */
2671 RTX_FLAG (x, used) = 0;
2673 format_ptr = GET_RTX_FORMAT (code);
2674 length = GET_RTX_LENGTH (code);
2676 for (i = 0; i < length; i++)
2678 switch (*format_ptr++)
2686 reset_used_flags (XEXP (x, i));
2690 for (j = 0; j < XVECLEN (x, i); j++)
2691 reset_used_flags (XVECEXP (x, i, j));
2697 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2698 to look for shared sub-parts. */
2701 set_used_flags (rtx x)
2705 const char *format_ptr;
2710 code = GET_CODE (x);
2712 /* These types may be freely shared so we needn't do any resetting
2734 /* The chain of insns is not being copied. */
2741 RTX_FLAG (x, used) = 1;
2743 format_ptr = GET_RTX_FORMAT (code);
2744 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2746 switch (*format_ptr++)
2749 set_used_flags (XEXP (x, i));
2753 for (j = 0; j < XVECLEN (x, i); j++)
2754 set_used_flags (XVECEXP (x, i, j));
2760 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2761 Return X or the rtx for the pseudo reg the value of X was copied into.
2762 OTHER must be valid as a SET_DEST. */
2765 make_safe_from (rtx x, rtx other)
2768 switch (GET_CODE (other))
2771 other = SUBREG_REG (other);
2773 case STRICT_LOW_PART:
2776 other = XEXP (other, 0);
2782 if ((GET_CODE (other) == MEM
2784 && GET_CODE (x) != REG
2785 && GET_CODE (x) != SUBREG)
2786 || (GET_CODE (other) == REG
2787 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2788 || reg_mentioned_p (other, x))))
2790 rtx temp = gen_reg_rtx (GET_MODE (x));
2791 emit_move_insn (temp, x);
2797 /* Emission of insns (adding them to the doubly-linked list). */
2799 /* Return the first insn of the current sequence or current function. */
2807 /* Specify a new insn as the first in the chain. */
2810 set_first_insn (rtx insn)
2812 if (PREV_INSN (insn) != 0)
2817 /* Return the last insn emitted in current sequence or current function. */
2820 get_last_insn (void)
2825 /* Specify a new insn as the last in the chain. */
2828 set_last_insn (rtx insn)
2830 if (NEXT_INSN (insn) != 0)
2835 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2838 get_last_insn_anywhere (void)
2840 struct sequence_stack *stack;
2843 for (stack = seq_stack; stack; stack = stack->next)
2844 if (stack->last != 0)
2849 /* Return the first nonnote insn emitted in current sequence or current
2850 function. This routine looks inside SEQUENCEs. */
2853 get_first_nonnote_insn (void)
2855 rtx insn = first_insn;
2859 insn = next_insn (insn);
2860 if (insn == 0 || GET_CODE (insn) != NOTE)
2867 /* Return the last nonnote insn emitted in current sequence or current
2868 function. This routine looks inside SEQUENCEs. */
2871 get_last_nonnote_insn (void)
2873 rtx insn = last_insn;
2877 insn = previous_insn (insn);
2878 if (insn == 0 || GET_CODE (insn) != NOTE)
2885 /* Return a number larger than any instruction's uid in this function. */
2890 return cur_insn_uid;
2893 /* Renumber instructions so that no instruction UIDs are wasted. */
2896 renumber_insns (FILE *stream)
2900 /* If we're not supposed to renumber instructions, don't. */
2901 if (!flag_renumber_insns)
2904 /* If there aren't that many instructions, then it's not really
2905 worth renumbering them. */
2906 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2911 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2914 fprintf (stream, "Renumbering insn %d to %d\n",
2915 INSN_UID (insn), cur_insn_uid);
2916 INSN_UID (insn) = cur_insn_uid++;
2920 /* Return the next insn. If it is a SEQUENCE, return the first insn
2924 next_insn (rtx insn)
2928 insn = NEXT_INSN (insn);
2929 if (insn && GET_CODE (insn) == INSN
2930 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2931 insn = XVECEXP (PATTERN (insn), 0, 0);
2937 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2941 previous_insn (rtx insn)
2945 insn = PREV_INSN (insn);
2946 if (insn && GET_CODE (insn) == INSN
2947 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2948 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2954 /* Return the next insn after INSN that is not a NOTE. This routine does not
2955 look inside SEQUENCEs. */
2958 next_nonnote_insn (rtx insn)
2962 insn = NEXT_INSN (insn);
2963 if (insn == 0 || GET_CODE (insn) != NOTE)
2970 /* Return the previous insn before INSN that is not a NOTE. This routine does
2971 not look inside SEQUENCEs. */
2974 prev_nonnote_insn (rtx insn)
2978 insn = PREV_INSN (insn);
2979 if (insn == 0 || GET_CODE (insn) != NOTE)
2986 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2987 or 0, if there is none. This routine does not look inside
2991 next_real_insn (rtx insn)
2995 insn = NEXT_INSN (insn);
2996 if (insn == 0 || GET_CODE (insn) == INSN
2997 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3004 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3005 or 0, if there is none. This routine does not look inside
3009 prev_real_insn (rtx insn)
3013 insn = PREV_INSN (insn);
3014 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3015 || GET_CODE (insn) == JUMP_INSN)
3022 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3023 This routine does not look inside SEQUENCEs. */
3026 last_call_insn (void)
3030 for (insn = get_last_insn ();
3031 insn && GET_CODE (insn) != CALL_INSN;
3032 insn = PREV_INSN (insn))
3038 /* Find the next insn after INSN that really does something. This routine
3039 does not look inside SEQUENCEs. Until reload has completed, this is the
3040 same as next_real_insn. */
3043 active_insn_p (rtx insn)
3045 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3046 || (GET_CODE (insn) == INSN
3047 && (! reload_completed
3048 || (GET_CODE (PATTERN (insn)) != USE
3049 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3053 next_active_insn (rtx insn)
3057 insn = NEXT_INSN (insn);
3058 if (insn == 0 || active_insn_p (insn))
3065 /* Find the last insn before INSN that really does something. This routine
3066 does not look inside SEQUENCEs. Until reload has completed, this is the
3067 same as prev_real_insn. */
3070 prev_active_insn (rtx insn)
3074 insn = PREV_INSN (insn);
3075 if (insn == 0 || active_insn_p (insn))
3082 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3085 next_label (rtx insn)
3089 insn = NEXT_INSN (insn);
3090 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3097 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3100 prev_label (rtx insn)
3104 insn = PREV_INSN (insn);
3105 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3113 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3114 and REG_CC_USER notes so we can find it. */
3117 link_cc0_insns (rtx insn)
3119 rtx user = next_nonnote_insn (insn);
3121 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3122 user = XVECEXP (PATTERN (user), 0, 0);
3124 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3126 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3129 /* Return the next insn that uses CC0 after INSN, which is assumed to
3130 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3131 applied to the result of this function should yield INSN).
3133 Normally, this is simply the next insn. However, if a REG_CC_USER note
3134 is present, it contains the insn that uses CC0.
3136 Return 0 if we can't find the insn. */
3139 next_cc0_user (rtx insn)
3141 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3144 return XEXP (note, 0);
3146 insn = next_nonnote_insn (insn);
3147 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3148 insn = XVECEXP (PATTERN (insn), 0, 0);
3150 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3156 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3157 note, it is the previous insn. */
3160 prev_cc0_setter (rtx insn)
3162 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3165 return XEXP (note, 0);
3167 insn = prev_nonnote_insn (insn);
3168 if (! sets_cc0_p (PATTERN (insn)))
3175 /* Increment the label uses for all labels present in rtx. */
3178 mark_label_nuses (rtx x)
3184 code = GET_CODE (x);
3185 if (code == LABEL_REF)
3186 LABEL_NUSES (XEXP (x, 0))++;
3188 fmt = GET_RTX_FORMAT (code);
3189 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3192 mark_label_nuses (XEXP (x, i));
3193 else if (fmt[i] == 'E')
3194 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3195 mark_label_nuses (XVECEXP (x, i, j));
3200 /* Try splitting insns that can be split for better scheduling.
3201 PAT is the pattern which might split.
3202 TRIAL is the insn providing PAT.
3203 LAST is nonzero if we should return the last insn of the sequence produced.
3205 If this routine succeeds in splitting, it returns the first or last
3206 replacement insn depending on the value of LAST. Otherwise, it
3207 returns TRIAL. If the insn to be returned can be split, it will be. */
3210 try_split (rtx pat, rtx trial, int last)
3212 rtx before = PREV_INSN (trial);
3213 rtx after = NEXT_INSN (trial);
3214 int has_barrier = 0;
3218 rtx insn_last, insn;
3221 if (any_condjump_p (trial)
3222 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3223 split_branch_probability = INTVAL (XEXP (note, 0));
3224 probability = split_branch_probability;
3226 seq = split_insns (pat, trial);
3228 split_branch_probability = -1;
3230 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3231 We may need to handle this specially. */
3232 if (after && GET_CODE (after) == BARRIER)
3235 after = NEXT_INSN (after);
3241 /* Avoid infinite loop if any insn of the result matches
3242 the original pattern. */
3246 if (INSN_P (insn_last)
3247 && rtx_equal_p (PATTERN (insn_last), pat))
3249 if (!NEXT_INSN (insn_last))
3251 insn_last = NEXT_INSN (insn_last);
3255 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3257 if (GET_CODE (insn) == JUMP_INSN)
3259 mark_jump_label (PATTERN (insn), insn, 0);
3261 if (probability != -1
3262 && any_condjump_p (insn)
3263 && !find_reg_note (insn, REG_BR_PROB, 0))
3265 /* We can preserve the REG_BR_PROB notes only if exactly
3266 one jump is created, otherwise the machine description
3267 is responsible for this step using
3268 split_branch_probability variable. */
3272 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3273 GEN_INT (probability),
3279 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3280 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3281 if (GET_CODE (trial) == CALL_INSN)
3283 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3284 if (GET_CODE (insn) == CALL_INSN)
3286 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3289 *p = CALL_INSN_FUNCTION_USAGE (trial);
3290 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3294 /* Copy notes, particularly those related to the CFG. */
3295 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3297 switch (REG_NOTE_KIND (note))
3301 while (insn != NULL_RTX)
3303 if (GET_CODE (insn) == CALL_INSN
3304 || (flag_non_call_exceptions
3305 && may_trap_p (PATTERN (insn))))
3307 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3310 insn = PREV_INSN (insn);
3316 case REG_ALWAYS_RETURN:
3318 while (insn != NULL_RTX)
3320 if (GET_CODE (insn) == CALL_INSN)
3322 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3325 insn = PREV_INSN (insn);
3329 case REG_NON_LOCAL_GOTO:
3331 while (insn != NULL_RTX)
3333 if (GET_CODE (insn) == JUMP_INSN)
3335 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3338 insn = PREV_INSN (insn);
3347 /* If there are LABELS inside the split insns increment the
3348 usage count so we don't delete the label. */
3349 if (GET_CODE (trial) == INSN)
3352 while (insn != NULL_RTX)
3354 if (GET_CODE (insn) == INSN)
3355 mark_label_nuses (PATTERN (insn));
3357 insn = PREV_INSN (insn);
3361 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3363 delete_insn (trial);
3365 emit_barrier_after (tem);
3367 /* Recursively call try_split for each new insn created; by the
3368 time control returns here that insn will be fully split, so
3369 set LAST and continue from the insn after the one returned.
3370 We can't use next_active_insn here since AFTER may be a note.
3371 Ignore deleted insns, which can be occur if not optimizing. */
3372 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3373 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3374 tem = try_split (PATTERN (tem), tem, 1);
3376 /* Return either the first or the last insn, depending on which was
3379 ? (after ? PREV_INSN (after) : last_insn)
3380 : NEXT_INSN (before);
3383 /* Make and return an INSN rtx, initializing all its slots.
3384 Store PATTERN in the pattern slots. */
3387 make_insn_raw (rtx pattern)
3391 insn = rtx_alloc (INSN);
3393 INSN_UID (insn) = cur_insn_uid++;
3394 PATTERN (insn) = pattern;
3395 INSN_CODE (insn) = -1;
3396 LOG_LINKS (insn) = NULL;
3397 REG_NOTES (insn) = NULL;
3398 INSN_LOCATOR (insn) = 0;
3399 BLOCK_FOR_INSN (insn) = NULL;
3401 #ifdef ENABLE_RTL_CHECKING
3404 && (returnjump_p (insn)
3405 || (GET_CODE (insn) == SET
3406 && SET_DEST (insn) == pc_rtx)))
3408 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3416 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3419 make_jump_insn_raw (rtx pattern)
3423 insn = rtx_alloc (JUMP_INSN);
3424 INSN_UID (insn) = cur_insn_uid++;
3426 PATTERN (insn) = pattern;
3427 INSN_CODE (insn) = -1;
3428 LOG_LINKS (insn) = NULL;
3429 REG_NOTES (insn) = NULL;
3430 JUMP_LABEL (insn) = NULL;
3431 INSN_LOCATOR (insn) = 0;
3432 BLOCK_FOR_INSN (insn) = NULL;
3437 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3440 make_call_insn_raw (rtx pattern)
3444 insn = rtx_alloc (CALL_INSN);
3445 INSN_UID (insn) = cur_insn_uid++;
3447 PATTERN (insn) = pattern;
3448 INSN_CODE (insn) = -1;
3449 LOG_LINKS (insn) = NULL;
3450 REG_NOTES (insn) = NULL;
3451 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3452 INSN_LOCATOR (insn) = 0;
3453 BLOCK_FOR_INSN (insn) = NULL;
3458 /* Add INSN to the end of the doubly-linked list.
3459 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3464 PREV_INSN (insn) = last_insn;
3465 NEXT_INSN (insn) = 0;
3467 if (NULL != last_insn)
3468 NEXT_INSN (last_insn) = insn;
3470 if (NULL == first_insn)
3476 /* Add INSN into the doubly-linked list after insn AFTER. This and
3477 the next should be the only functions called to insert an insn once
3478 delay slots have been filled since only they know how to update a
3482 add_insn_after (rtx insn, rtx after)
3484 rtx next = NEXT_INSN (after);
3487 if (optimize && INSN_DELETED_P (after))
3490 NEXT_INSN (insn) = next;
3491 PREV_INSN (insn) = after;
3495 PREV_INSN (next) = insn;
3496 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3497 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3499 else if (last_insn == after)
3503 struct sequence_stack *stack = seq_stack;
3504 /* Scan all pending sequences too. */
3505 for (; stack; stack = stack->next)
3506 if (after == stack->last)
3516 if (GET_CODE (after) != BARRIER
3517 && GET_CODE (insn) != BARRIER
3518 && (bb = BLOCK_FOR_INSN (after)))
3520 set_block_for_insn (insn, bb);
3522 bb->flags |= BB_DIRTY;
3523 /* Should not happen as first in the BB is always
3524 either NOTE or LABEL. */
3525 if (BB_END (bb) == after
3526 /* Avoid clobbering of structure when creating new BB. */
3527 && GET_CODE (insn) != BARRIER
3528 && (GET_CODE (insn) != NOTE
3529 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3533 NEXT_INSN (after) = insn;
3534 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3536 rtx sequence = PATTERN (after);
3537 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3541 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3542 the previous should be the only functions called to insert an insn once
3543 delay slots have been filled since only they know how to update a
3547 add_insn_before (rtx insn, rtx before)
3549 rtx prev = PREV_INSN (before);
3552 if (optimize && INSN_DELETED_P (before))
3555 PREV_INSN (insn) = prev;
3556 NEXT_INSN (insn) = before;
3560 NEXT_INSN (prev) = insn;
3561 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3563 rtx sequence = PATTERN (prev);
3564 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3567 else if (first_insn == before)
3571 struct sequence_stack *stack = seq_stack;
3572 /* Scan all pending sequences too. */
3573 for (; stack; stack = stack->next)
3574 if (before == stack->first)
3576 stack->first = insn;
3584 if (GET_CODE (before) != BARRIER
3585 && GET_CODE (insn) != BARRIER
3586 && (bb = BLOCK_FOR_INSN (before)))
3588 set_block_for_insn (insn, bb);
3590 bb->flags |= BB_DIRTY;
3591 /* Should not happen as first in the BB is always
3592 either NOTE or LABEl. */
3593 if (BB_HEAD (bb) == insn
3594 /* Avoid clobbering of structure when creating new BB. */
3595 && GET_CODE (insn) != BARRIER
3596 && (GET_CODE (insn) != NOTE
3597 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3601 PREV_INSN (before) = insn;
3602 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3603 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3606 /* Remove an insn from its doubly-linked list. This function knows how
3607 to handle sequences. */
3609 remove_insn (rtx insn)
3611 rtx next = NEXT_INSN (insn);
3612 rtx prev = PREV_INSN (insn);
3617 NEXT_INSN (prev) = next;
3618 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3620 rtx sequence = PATTERN (prev);
3621 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3624 else if (first_insn == insn)
3628 struct sequence_stack *stack = seq_stack;
3629 /* Scan all pending sequences too. */
3630 for (; stack; stack = stack->next)
3631 if (insn == stack->first)
3633 stack->first = next;
3643 PREV_INSN (next) = prev;
3644 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3645 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3647 else if (last_insn == insn)
3651 struct sequence_stack *stack = seq_stack;
3652 /* Scan all pending sequences too. */
3653 for (; stack; stack = stack->next)
3654 if (insn == stack->last)
3663 if (GET_CODE (insn) != BARRIER
3664 && (bb = BLOCK_FOR_INSN (insn)))
3667 bb->flags |= BB_DIRTY;
3668 if (BB_HEAD (bb) == insn)
3670 /* Never ever delete the basic block note without deleting whole
3672 if (GET_CODE (insn) == NOTE)
3674 BB_HEAD (bb) = next;
3676 if (BB_END (bb) == insn)
3681 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3684 add_function_usage_to (rtx call_insn, rtx call_fusage)
3686 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3689 /* Put the register usage information on the CALL. If there is already
3690 some usage information, put ours at the end. */
3691 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3695 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3696 link = XEXP (link, 1))
3699 XEXP (link, 1) = call_fusage;
3702 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3705 /* Delete all insns made since FROM.
3706 FROM becomes the new last instruction. */
3709 delete_insns_since (rtx from)
3714 NEXT_INSN (from) = 0;
3718 /* This function is deprecated, please use sequences instead.
3720 Move a consecutive bunch of insns to a different place in the chain.
3721 The insns to be moved are those between FROM and TO.
3722 They are moved to a new position after the insn AFTER.
3723 AFTER must not be FROM or TO or any insn in between.
3725 This function does not know about SEQUENCEs and hence should not be
3726 called after delay-slot filling has been done. */
3729 reorder_insns_nobb (rtx from, rtx to, rtx after)
3731 /* Splice this bunch out of where it is now. */
3732 if (PREV_INSN (from))
3733 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3735 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3736 if (last_insn == to)
3737 last_insn = PREV_INSN (from);
3738 if (first_insn == from)
3739 first_insn = NEXT_INSN (to);
3741 /* Make the new neighbors point to it and it to them. */
3742 if (NEXT_INSN (after))
3743 PREV_INSN (NEXT_INSN (after)) = to;
3745 NEXT_INSN (to) = NEXT_INSN (after);
3746 PREV_INSN (from) = after;
3747 NEXT_INSN (after) = from;
3748 if (after == last_insn)
3752 /* Same as function above, but take care to update BB boundaries. */
3754 reorder_insns (rtx from, rtx to, rtx after)
3756 rtx prev = PREV_INSN (from);
3757 basic_block bb, bb2;
3759 reorder_insns_nobb (from, to, after);
3761 if (GET_CODE (after) != BARRIER
3762 && (bb = BLOCK_FOR_INSN (after)))
3765 bb->flags |= BB_DIRTY;
3767 if (GET_CODE (from) != BARRIER
3768 && (bb2 = BLOCK_FOR_INSN (from)))
3770 if (BB_END (bb2) == to)
3771 BB_END (bb2) = prev;
3772 bb2->flags |= BB_DIRTY;
3775 if (BB_END (bb) == after)
3778 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3779 set_block_for_insn (x, bb);
3783 /* Return the line note insn preceding INSN. */
3786 find_line_note (rtx insn)
3788 if (no_line_numbers)
3791 for (; insn; insn = PREV_INSN (insn))
3792 if (GET_CODE (insn) == NOTE
3793 && NOTE_LINE_NUMBER (insn) >= 0)
3799 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3800 of the moved insns when debugging. This may insert a note between AFTER
3801 and FROM, and another one after TO. */
3804 reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
3806 rtx from_line = find_line_note (from);
3807 rtx after_line = find_line_note (after);
3809 reorder_insns (from, to, after);
3811 if (from_line == after_line)
3815 emit_note_copy_after (from_line, after);
3817 emit_note_copy_after (after_line, to);
3820 /* Remove unnecessary notes from the instruction stream. */
3823 remove_unnecessary_notes (void)
3825 rtx block_stack = NULL_RTX;
3826 rtx eh_stack = NULL_RTX;
3831 /* We must not remove the first instruction in the function because
3832 the compiler depends on the first instruction being a note. */
3833 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3835 /* Remember what's next. */
3836 next = NEXT_INSN (insn);
3838 /* We're only interested in notes. */
3839 if (GET_CODE (insn) != NOTE)
3842 switch (NOTE_LINE_NUMBER (insn))
3844 case NOTE_INSN_DELETED:
3845 case NOTE_INSN_LOOP_END_TOP_COND:
3849 case NOTE_INSN_EH_REGION_BEG:
3850 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3853 case NOTE_INSN_EH_REGION_END:
3854 /* Too many end notes. */
3855 if (eh_stack == NULL_RTX)
3857 /* Mismatched nesting. */
3858 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3861 eh_stack = XEXP (eh_stack, 1);
3862 free_INSN_LIST_node (tmp);
3865 case NOTE_INSN_BLOCK_BEG:
3866 /* By now, all notes indicating lexical blocks should have
3867 NOTE_BLOCK filled in. */
3868 if (NOTE_BLOCK (insn) == NULL_TREE)
3870 block_stack = alloc_INSN_LIST (insn, block_stack);
3873 case NOTE_INSN_BLOCK_END:
3874 /* Too many end notes. */
3875 if (block_stack == NULL_RTX)
3877 /* Mismatched nesting. */
3878 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3881 block_stack = XEXP (block_stack, 1);
3882 free_INSN_LIST_node (tmp);
3884 /* Scan back to see if there are any non-note instructions
3885 between INSN and the beginning of this block. If not,
3886 then there is no PC range in the generated code that will
3887 actually be in this block, so there's no point in
3888 remembering the existence of the block. */
3889 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3891 /* This block contains a real instruction. Note that we
3892 don't include labels; if the only thing in the block
3893 is a label, then there are still no PC values that
3894 lie within the block. */
3898 /* We're only interested in NOTEs. */
3899 if (GET_CODE (tmp) != NOTE)
3902 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3904 /* We just verified that this BLOCK matches us with
3905 the block_stack check above. Never delete the
3906 BLOCK for the outermost scope of the function; we
3907 can refer to names from that scope even if the
3908 block notes are messed up. */
3909 if (! is_body_block (NOTE_BLOCK (insn))
3910 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3917 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3918 /* There's a nested block. We need to leave the
3919 current block in place since otherwise the debugger
3920 wouldn't be able to show symbols from our block in
3921 the nested block. */
3927 /* Too many begin notes. */
3928 if (block_stack || eh_stack)
3933 /* Emit insn(s) of given code and pattern
3934 at a specified place within the doubly-linked list.
3936 All of the emit_foo global entry points accept an object
3937 X which is either an insn list or a PATTERN of a single
3940 There are thus a few canonical ways to generate code and
3941 emit it at a specific place in the instruction stream. For
3942 example, consider the instruction named SPOT and the fact that
3943 we would like to emit some instructions before SPOT. We might
3947 ... emit the new instructions ...
3948 insns_head = get_insns ();
3951 emit_insn_before (insns_head, SPOT);
3953 It used to be common to generate SEQUENCE rtl instead, but that
3954 is a relic of the past which no longer occurs. The reason is that
3955 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3956 generated would almost certainly die right after it was created. */
3958 /* Make X be output before the instruction BEFORE. */
3961 emit_insn_before (rtx x, rtx before)
3966 #ifdef ENABLE_RTL_CHECKING
3967 if (before == NULL_RTX)
3974 switch (GET_CODE (x))
3985 rtx next = NEXT_INSN (insn);
3986 add_insn_before (insn, before);
3992 #ifdef ENABLE_RTL_CHECKING
3999 last = make_insn_raw (x);
4000 add_insn_before (last, before);
4007 /* Make an instruction with body X and code JUMP_INSN
4008 and output it before the instruction BEFORE. */
4011 emit_jump_insn_before (rtx x, rtx before)
4013 rtx insn, last = NULL_RTX;
4015 #ifdef ENABLE_RTL_CHECKING
4016 if (before == NULL_RTX)
4020 switch (GET_CODE (x))
4031 rtx next = NEXT_INSN (insn);
4032 add_insn_before (insn, before);
4038 #ifdef ENABLE_RTL_CHECKING
4045 last = make_jump_insn_raw (x);
4046 add_insn_before (last, before);
4053 /* Make an instruction with body X and code CALL_INSN
4054 and output it before the instruction BEFORE. */
4057 emit_call_insn_before (rtx x, rtx before)
4059 rtx last = NULL_RTX, insn;
4061 #ifdef ENABLE_RTL_CHECKING
4062 if (before == NULL_RTX)
4066 switch (GET_CODE (x))
4077 rtx next = NEXT_INSN (insn);
4078 add_insn_before (insn, before);
4084 #ifdef ENABLE_RTL_CHECKING
4091 last = make_call_insn_raw (x);
4092 add_insn_before (last, before);
4099 /* Make an insn of code BARRIER
4100 and output it before the insn BEFORE. */
4103 emit_barrier_before (rtx before)
4105 rtx insn = rtx_alloc (BARRIER);
4107 INSN_UID (insn) = cur_insn_uid++;
4109 add_insn_before (insn, before);
4113 /* Emit the label LABEL before the insn BEFORE. */
4116 emit_label_before (rtx label, rtx before)
4118 /* This can be called twice for the same label as a result of the
4119 confusion that follows a syntax error! So make it harmless. */
4120 if (INSN_UID (label) == 0)
4122 INSN_UID (label) = cur_insn_uid++;
4123 add_insn_before (label, before);
4129 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4132 emit_note_before (int subtype, rtx before)
4134 rtx note = rtx_alloc (NOTE);
4135 INSN_UID (note) = cur_insn_uid++;
4136 NOTE_SOURCE_FILE (note) = 0;
4137 NOTE_LINE_NUMBER (note) = subtype;
4138 BLOCK_FOR_INSN (note) = NULL;
4140 add_insn_before (note, before);
4144 /* Helper for emit_insn_after, handles lists of instructions
4147 static rtx emit_insn_after_1 (rtx, rtx);
4150 emit_insn_after_1 (rtx first, rtx after)
4156 if (GET_CODE (after) != BARRIER
4157 && (bb = BLOCK_FOR_INSN (after)))
4159 bb->flags |= BB_DIRTY;
4160 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4161 if (GET_CODE (last) != BARRIER)
4162 set_block_for_insn (last, bb);
4163 if (GET_CODE (last) != BARRIER)
4164 set_block_for_insn (last, bb);
4165 if (BB_END (bb) == after)
4169 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4172 after_after = NEXT_INSN (after);
4174 NEXT_INSN (after) = first;
4175 PREV_INSN (first) = after;
4176 NEXT_INSN (last) = after_after;
4178 PREV_INSN (after_after) = last;
4180 if (after == last_insn)
4185 /* Make X be output after the insn AFTER. */
4188 emit_insn_after (rtx x, rtx after)
4192 #ifdef ENABLE_RTL_CHECKING
4193 if (after == NULL_RTX)
4200 switch (GET_CODE (x))
4208 last = emit_insn_after_1 (x, after);
4211 #ifdef ENABLE_RTL_CHECKING
4218 last = make_insn_raw (x);
4219 add_insn_after (last, after);
4226 /* Similar to emit_insn_after, except that line notes are to be inserted so
4227 as to act as if this insn were at FROM. */
4230 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4232 rtx from_line = find_line_note (from);
4233 rtx after_line = find_line_note (after);
4234 rtx insn = emit_insn_after (x, after);
4237 emit_note_copy_after (from_line, after);
4240 emit_note_copy_after (after_line, insn);
4243 /* Make an insn of code JUMP_INSN with body X
4244 and output it after the insn AFTER. */
4247 emit_jump_insn_after (rtx x, rtx after)
4251 #ifdef ENABLE_RTL_CHECKING
4252 if (after == NULL_RTX)
4256 switch (GET_CODE (x))
4264 last = emit_insn_after_1 (x, after);
4267 #ifdef ENABLE_RTL_CHECKING
4274 last = make_jump_insn_raw (x);
4275 add_insn_after (last, after);
4282 /* Make an instruction with body X and code CALL_INSN
4283 and output it after the instruction AFTER. */
4286 emit_call_insn_after (rtx x, rtx after)
4290 #ifdef ENABLE_RTL_CHECKING
4291 if (after == NULL_RTX)
4295 switch (GET_CODE (x))
4303 last = emit_insn_after_1 (x, after);
4306 #ifdef ENABLE_RTL_CHECKING
4313 last = make_call_insn_raw (x);
4314 add_insn_after (last, after);
4321 /* Make an insn of code BARRIER
4322 and output it after the insn AFTER. */
4325 emit_barrier_after (rtx after)
4327 rtx insn = rtx_alloc (BARRIER);
4329 INSN_UID (insn) = cur_insn_uid++;
4331 add_insn_after (insn, after);
4335 /* Emit the label LABEL after the insn AFTER. */
4338 emit_label_after (rtx label, rtx after)
4340 /* This can be called twice for the same label
4341 as a result of the confusion that follows a syntax error!
4342 So make it harmless. */
4343 if (INSN_UID (label) == 0)
4345 INSN_UID (label) = cur_insn_uid++;
4346 add_insn_after (label, after);
4352 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4355 emit_note_after (int subtype, rtx after)
4357 rtx note = rtx_alloc (NOTE);
4358 INSN_UID (note) = cur_insn_uid++;
4359 NOTE_SOURCE_FILE (note) = 0;
4360 NOTE_LINE_NUMBER (note) = subtype;
4361 BLOCK_FOR_INSN (note) = NULL;
4362 add_insn_after (note, after);
4366 /* Emit a copy of note ORIG after the insn AFTER. */
4369 emit_note_copy_after (rtx orig, rtx after)
4373 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4379 note = rtx_alloc (NOTE);
4380 INSN_UID (note) = cur_insn_uid++;
4381 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4382 NOTE_DATA (note) = NOTE_DATA (orig);
4383 BLOCK_FOR_INSN (note) = NULL;
4384 add_insn_after (note, after);
4388 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4390 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4392 rtx last = emit_insn_after (pattern, after);
4394 if (pattern == NULL_RTX)
4397 after = NEXT_INSN (after);
4400 if (active_insn_p (after))
4401 INSN_LOCATOR (after) = loc;
4404 after = NEXT_INSN (after);
4409 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4411 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4413 rtx last = emit_jump_insn_after (pattern, after);
4415 if (pattern == NULL_RTX)
4418 after = NEXT_INSN (after);
4421 if (active_insn_p (after))
4422 INSN_LOCATOR (after) = loc;
4425 after = NEXT_INSN (after);
4430 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4432 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4434 rtx last = emit_call_insn_after (pattern, after);
4436 if (pattern == NULL_RTX)
4439 after = NEXT_INSN (after);
4442 if (active_insn_p (after))
4443 INSN_LOCATOR (after) = loc;
4446 after = NEXT_INSN (after);
4451 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4453 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4455 rtx first = PREV_INSN (before);
4456 rtx last = emit_insn_before (pattern, before);
4458 if (pattern == NULL_RTX)
4461 first = NEXT_INSN (first);
4464 if (active_insn_p (first))
4465 INSN_LOCATOR (first) = loc;
4468 first = NEXT_INSN (first);
4473 /* Take X and emit it at the end of the doubly-linked
4476 Returns the last insn emitted. */
4481 rtx last = last_insn;
4487 switch (GET_CODE (x))
4498 rtx next = NEXT_INSN (insn);
4505 #ifdef ENABLE_RTL_CHECKING
4512 last = make_insn_raw (x);
4520 /* Make an insn of code JUMP_INSN with pattern X
4521 and add it to the end of the doubly-linked list. */
4524 emit_jump_insn (rtx x)
4526 rtx last = NULL_RTX, insn;
4528 switch (GET_CODE (x))
4539 rtx next = NEXT_INSN (insn);
4546 #ifdef ENABLE_RTL_CHECKING
4553 last = make_jump_insn_raw (x);
4561 /* Make an insn of code CALL_INSN with pattern X
4562 and add it to the end of the doubly-linked list. */
4565 emit_call_insn (rtx x)
4569 switch (GET_CODE (x))
4577 insn = emit_insn (x);
4580 #ifdef ENABLE_RTL_CHECKING
4587 insn = make_call_insn_raw (x);
4595 /* Add the label LABEL to the end of the doubly-linked list. */
4598 emit_label (rtx label)
4600 /* This can be called twice for the same label
4601 as a result of the confusion that follows a syntax error!
4602 So make it harmless. */
4603 if (INSN_UID (label) == 0)
4605 INSN_UID (label) = cur_insn_uid++;
4611 /* Make an insn of code BARRIER
4612 and add it to the end of the doubly-linked list. */
4617 rtx barrier = rtx_alloc (BARRIER);
4618 INSN_UID (barrier) = cur_insn_uid++;
4623 /* Make line numbering NOTE insn for LOCATION add it to the end
4624 of the doubly-linked list, but only if line-numbers are desired for
4625 debugging info and it doesn't match the previous one. */
4628 emit_line_note (location_t location)
4632 set_file_and_line_for_stmt (location);
4634 if (location.file && last_location.file
4635 && !strcmp (location.file, last_location.file)
4636 && location.line == last_location.line)
4638 last_location = location;
4640 if (no_line_numbers)
4646 note = emit_note (location.line);
4647 NOTE_SOURCE_FILE (note) = location.file;
4652 /* Emit a copy of note ORIG. */
4655 emit_note_copy (rtx orig)
4659 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4665 note = rtx_alloc (NOTE);
4667 INSN_UID (note) = cur_insn_uid++;
4668 NOTE_DATA (note) = NOTE_DATA (orig);
4669 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4670 BLOCK_FOR_INSN (note) = NULL;
4676 /* Make an insn of code NOTE or type NOTE_NO
4677 and add it to the end of the doubly-linked list. */
4680 emit_note (int note_no)
4684 note = rtx_alloc (NOTE);
4685 INSN_UID (note) = cur_insn_uid++;
4686 NOTE_LINE_NUMBER (note) = note_no;
4687 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4688 BLOCK_FOR_INSN (note) = NULL;
4693 /* Cause next statement to emit a line note even if the line number
4697 force_next_line_note (void)
4699 last_location.line = -1;
4702 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4703 note of this type already exists, remove it first. */
4706 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4708 rtx note = find_reg_note (insn, kind, NULL_RTX);
4714 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4715 has multiple sets (some callers assume single_set
4716 means the insn only has one set, when in fact it
4717 means the insn only has one * useful * set). */
4718 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4725 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4726 It serves no useful purpose and breaks eliminate_regs. */
4727 if (GET_CODE (datum) == ASM_OPERANDS)
4737 XEXP (note, 0) = datum;
4741 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4742 return REG_NOTES (insn);
4745 /* Return an indication of which type of insn should have X as a body.
4746 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4749 classify_insn (rtx x)
4751 if (GET_CODE (x) == CODE_LABEL)
4753 if (GET_CODE (x) == CALL)
4755 if (GET_CODE (x) == RETURN)
4757 if (GET_CODE (x) == SET)
4759 if (SET_DEST (x) == pc_rtx)
4761 else if (GET_CODE (SET_SRC (x)) == CALL)
4766 if (GET_CODE (x) == PARALLEL)
4769 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4770 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4772 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4773 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4775 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4776 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4782 /* Emit the rtl pattern X as an appropriate kind of insn.
4783 If X is a label, it is simply added into the insn chain. */
4788 enum rtx_code code = classify_insn (x);
4790 if (code == CODE_LABEL)
4791 return emit_label (x);
4792 else if (code == INSN)
4793 return emit_insn (x);
4794 else if (code == JUMP_INSN)
4796 rtx insn = emit_jump_insn (x);
4797 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4798 return emit_barrier ();
4801 else if (code == CALL_INSN)
4802 return emit_call_insn (x);
4807 /* Space for free sequence stack entries. */
4808 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4810 /* Begin emitting insns to a sequence which can be packaged in an
4811 RTL_EXPR. If this sequence will contain something that might cause
4812 the compiler to pop arguments to function calls (because those
4813 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4814 details), use do_pending_stack_adjust before calling this function.
4815 That will ensure that the deferred pops are not accidentally
4816 emitted in the middle of this sequence. */
4819 start_sequence (void)
4821 struct sequence_stack *tem;
4823 if (free_sequence_stack != NULL)
4825 tem = free_sequence_stack;
4826 free_sequence_stack = tem->next;
4829 tem = ggc_alloc (sizeof (struct sequence_stack));
4831 tem->next = seq_stack;
4832 tem->first = first_insn;
4833 tem->last = last_insn;
4834 tem->sequence_rtl_expr = seq_rtl_expr;
4842 /* Similarly, but indicate that this sequence will be placed in T, an
4843 RTL_EXPR. See the documentation for start_sequence for more
4844 information about how to use this function. */
4847 start_sequence_for_rtl_expr (tree t)
4854 /* Set up the insn chain starting with FIRST as the current sequence,
4855 saving the previously current one. See the documentation for
4856 start_sequence for more information about how to use this function. */
4859 push_to_sequence (rtx first)
4865 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4871 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4874 push_to_full_sequence (rtx first, rtx last)
4879 /* We really should have the end of the insn chain here. */
4880 if (last && NEXT_INSN (last))
4884 /* Set up the outer-level insn chain
4885 as the current sequence, saving the previously current one. */
4888 push_topmost_sequence (void)
4890 struct sequence_stack *stack, *top = NULL;
4894 for (stack = seq_stack; stack; stack = stack->next)
4897 first_insn = top->first;
4898 last_insn = top->last;
4899 seq_rtl_expr = top->sequence_rtl_expr;
4902 /* After emitting to the outer-level insn chain, update the outer-level
4903 insn chain, and restore the previous saved state. */
4906 pop_topmost_sequence (void)
4908 struct sequence_stack *stack, *top = NULL;
4910 for (stack = seq_stack; stack; stack = stack->next)
4913 top->first = first_insn;
4914 top->last = last_insn;
4915 /* ??? Why don't we save seq_rtl_expr here? */
4920 /* After emitting to a sequence, restore previous saved state.
4922 To get the contents of the sequence just made, you must call
4923 `get_insns' *before* calling here.
4925 If the compiler might have deferred popping arguments while
4926 generating this sequence, and this sequence will not be immediately
4927 inserted into the instruction stream, use do_pending_stack_adjust
4928 before calling get_insns. That will ensure that the deferred
4929 pops are inserted into this sequence, and not into some random
4930 location in the instruction stream. See INHIBIT_DEFER_POP for more
4931 information about deferred popping of arguments. */
4936 struct sequence_stack *tem = seq_stack;
4938 first_insn = tem->first;
4939 last_insn = tem->last;
4940 seq_rtl_expr = tem->sequence_rtl_expr;
4941 seq_stack = tem->next;
4943 memset (tem, 0, sizeof (*tem));
4944 tem->next = free_sequence_stack;
4945 free_sequence_stack = tem;
4948 /* This works like end_sequence, but records the old sequence in FIRST
4952 end_full_sequence (rtx *first, rtx *last)
4954 *first = first_insn;
4959 /* Return 1 if currently emitting into a sequence. */
4962 in_sequence_p (void)
4964 return seq_stack != 0;
4967 /* Put the various virtual registers into REGNO_REG_RTX. */
4970 init_virtual_regs (struct emit_status *es)
4972 rtx *ptr = es->x_regno_reg_rtx;
4973 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4974 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4975 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4976 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4977 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4981 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4982 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4983 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4984 static int copy_insn_n_scratches;
4986 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4987 copied an ASM_OPERANDS.
4988 In that case, it is the original input-operand vector. */
4989 static rtvec orig_asm_operands_vector;
4991 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4992 copied an ASM_OPERANDS.
4993 In that case, it is the copied input-operand vector. */
4994 static rtvec copy_asm_operands_vector;
4996 /* Likewise for the constraints vector. */
4997 static rtvec orig_asm_constraints_vector;
4998 static rtvec copy_asm_constraints_vector;
5000 /* Recursively create a new copy of an rtx for copy_insn.
5001 This function differs from copy_rtx in that it handles SCRATCHes and
5002 ASM_OPERANDs properly.
5003 Normally, this function is not used directly; use copy_insn as front end.
5004 However, you could first copy an insn pattern with copy_insn and then use
5005 this function afterwards to properly copy any REG_NOTEs containing
5009 copy_insn_1 (rtx orig)
5014 const char *format_ptr;
5016 code = GET_CODE (orig);
5032 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5037 for (i = 0; i < copy_insn_n_scratches; i++)
5038 if (copy_insn_scratch_in[i] == orig)
5039 return copy_insn_scratch_out[i];
5043 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5044 a LABEL_REF, it isn't sharable. */
5045 if (GET_CODE (XEXP (orig, 0)) == PLUS
5046 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5047 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5051 /* A MEM with a constant address is not sharable. The problem is that
5052 the constant address may need to be reloaded. If the mem is shared,
5053 then reloading one copy of this mem will cause all copies to appear
5054 to have been reloaded. */
5060 copy = rtx_alloc (code);
5062 /* Copy the various flags, and other information. We assume that
5063 all fields need copying, and then clear the fields that should
5064 not be copied. That is the sensible default behavior, and forces
5065 us to explicitly document why we are *not* copying a flag. */
5066 memcpy (copy, orig, RTX_HDR_SIZE);
5068 /* We do not copy the USED flag, which is used as a mark bit during
5069 walks over the RTL. */
5070 RTX_FLAG (copy, used) = 0;
5072 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5073 if (GET_RTX_CLASS (code) == 'i')
5075 RTX_FLAG (copy, jump) = 0;
5076 RTX_FLAG (copy, call) = 0;
5077 RTX_FLAG (copy, frame_related) = 0;
5080 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5082 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5084 copy->u.fld[i] = orig->u.fld[i];
5085 switch (*format_ptr++)
5088 if (XEXP (orig, i) != NULL)
5089 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5094 if (XVEC (orig, i) == orig_asm_constraints_vector)
5095 XVEC (copy, i) = copy_asm_constraints_vector;
5096 else if (XVEC (orig, i) == orig_asm_operands_vector)
5097 XVEC (copy, i) = copy_asm_operands_vector;
5098 else if (XVEC (orig, i) != NULL)
5100 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5101 for (j = 0; j < XVECLEN (copy, i); j++)
5102 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5113 /* These are left unchanged. */
5121 if (code == SCRATCH)
5123 i = copy_insn_n_scratches++;
5124 if (i >= MAX_RECOG_OPERANDS)
5126 copy_insn_scratch_in[i] = orig;
5127 copy_insn_scratch_out[i] = copy;
5129 else if (code == ASM_OPERANDS)
5131 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5132 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5133 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5134 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5140 /* Create a new copy of an rtx.
5141 This function differs from copy_rtx in that it handles SCRATCHes and
5142 ASM_OPERANDs properly.
5143 INSN doesn't really have to be a full INSN; it could be just the
5146 copy_insn (rtx insn)
5148 copy_insn_n_scratches = 0;
5149 orig_asm_operands_vector = 0;
5150 orig_asm_constraints_vector = 0;
5151 copy_asm_operands_vector = 0;
5152 copy_asm_constraints_vector = 0;
5153 return copy_insn_1 (insn);
5156 /* Initialize data structures and variables in this file
5157 before generating rtl for each function. */
5162 struct function *f = cfun;
5164 f->emit = ggc_alloc (sizeof (struct emit_status));
5167 seq_rtl_expr = NULL;
5169 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5170 last_location.line = 0;
5171 last_location.file = 0;
5172 first_label_num = label_num;
5176 /* Init the tables that describe all the pseudo regs. */
5178 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5180 f->emit->regno_pointer_align
5181 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5182 * sizeof (unsigned char));
5185 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5187 /* Put copies of all the hard registers into regno_reg_rtx. */
5188 memcpy (regno_reg_rtx,
5189 static_regno_reg_rtx,
5190 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5192 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5193 init_virtual_regs (f->emit);
5195 /* Indicate that the virtual registers and stack locations are
5197 REG_POINTER (stack_pointer_rtx) = 1;
5198 REG_POINTER (frame_pointer_rtx) = 1;
5199 REG_POINTER (hard_frame_pointer_rtx) = 1;
5200 REG_POINTER (arg_pointer_rtx) = 1;
5202 REG_POINTER (virtual_incoming_args_rtx) = 1;
5203 REG_POINTER (virtual_stack_vars_rtx) = 1;
5204 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5205 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5206 REG_POINTER (virtual_cfa_rtx) = 1;
5208 #ifdef STACK_BOUNDARY
5209 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5210 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5211 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5212 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5214 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5215 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5216 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5217 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5218 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5221 #ifdef INIT_EXPANDERS
5226 /* Generate the constant 0. */
5229 gen_const_vector_0 (enum machine_mode mode)
5234 enum machine_mode inner;
5236 units = GET_MODE_NUNITS (mode);
5237 inner = GET_MODE_INNER (mode);
5239 v = rtvec_alloc (units);
5241 /* We need to call this function after we to set CONST0_RTX first. */
5242 if (!CONST0_RTX (inner))
5245 for (i = 0; i < units; ++i)
5246 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5248 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5252 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5253 all elements are zero. */
5255 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5257 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5260 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5261 if (RTVEC_ELT (v, i) != inner_zero)
5262 return gen_rtx_raw_CONST_VECTOR (mode, v);
5263 return CONST0_RTX (mode);
5266 /* Create some permanent unique rtl objects shared between all functions.
5267 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5270 init_emit_once (int line_numbers)
5273 enum machine_mode mode;
5274 enum machine_mode double_mode;
5276 /* We need reg_raw_mode, so initialize the modes now. */
5277 init_reg_modes_once ();
5279 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5281 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5282 const_int_htab_eq, NULL);
5284 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5285 const_double_htab_eq, NULL);
5287 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5288 mem_attrs_htab_eq, NULL);
5289 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5290 reg_attrs_htab_eq, NULL);
5292 no_line_numbers = ! line_numbers;
5294 /* Compute the word and byte modes. */
5296 byte_mode = VOIDmode;
5297 word_mode = VOIDmode;
5298 double_mode = VOIDmode;
5300 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5301 mode = GET_MODE_WIDER_MODE (mode))
5303 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5304 && byte_mode == VOIDmode)
5307 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5308 && word_mode == VOIDmode)
5312 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5313 mode = GET_MODE_WIDER_MODE (mode))
5315 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5316 && double_mode == VOIDmode)
5320 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5322 /* Assign register numbers to the globally defined register rtx.
5323 This must be done at runtime because the register number field
5324 is in a union and some compilers can't initialize unions. */
5326 pc_rtx = gen_rtx (PC, VOIDmode);
5327 cc0_rtx = gen_rtx (CC0, VOIDmode);
5328 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5329 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5330 if (hard_frame_pointer_rtx == 0)
5331 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5332 HARD_FRAME_POINTER_REGNUM);
5333 if (arg_pointer_rtx == 0)
5334 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5335 virtual_incoming_args_rtx =
5336 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5337 virtual_stack_vars_rtx =
5338 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5339 virtual_stack_dynamic_rtx =
5340 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5341 virtual_outgoing_args_rtx =
5342 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5343 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5345 /* Initialize RTL for commonly used hard registers. These are
5346 copied into regno_reg_rtx as we begin to compile each function. */
5347 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5348 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5350 #ifdef INIT_EXPANDERS
5351 /* This is to initialize {init|mark|free}_machine_status before the first
5352 call to push_function_context_to. This is needed by the Chill front
5353 end which calls push_function_context_to before the first call to
5354 init_function_start. */
5358 /* Create the unique rtx's for certain rtx codes and operand values. */
5360 /* Don't use gen_rtx here since gen_rtx in this case
5361 tries to use these variables. */
5362 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5363 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5364 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5366 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5367 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5368 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5370 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5372 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5373 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5374 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5375 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5376 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5377 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5378 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5380 dconsthalf = dconst1;
5383 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5385 /* Initialize mathematical constants for constant folding builtins.
5386 These constants need to be given to at least 160 bits precision. */
5387 real_from_string (&dconstpi,
5388 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5389 real_from_string (&dconste,
5390 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5392 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5394 REAL_VALUE_TYPE *r =
5395 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5397 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5398 mode = GET_MODE_WIDER_MODE (mode))
5399 const_tiny_rtx[i][(int) mode] =
5400 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5402 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5404 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5405 mode = GET_MODE_WIDER_MODE (mode))
5406 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5408 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5410 mode = GET_MODE_WIDER_MODE (mode))
5411 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5414 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5416 mode = GET_MODE_WIDER_MODE (mode))
5417 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5419 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5421 mode = GET_MODE_WIDER_MODE (mode))
5422 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5424 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5425 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5426 const_tiny_rtx[0][i] = const0_rtx;
5428 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5429 if (STORE_FLAG_VALUE == 1)
5430 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5432 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5433 return_address_pointer_rtx
5434 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5437 #ifdef STATIC_CHAIN_REGNUM
5438 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5440 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5441 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5442 static_chain_incoming_rtx
5443 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5446 static_chain_incoming_rtx = static_chain_rtx;
5450 static_chain_rtx = STATIC_CHAIN;
5452 #ifdef STATIC_CHAIN_INCOMING
5453 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5455 static_chain_incoming_rtx = static_chain_rtx;
5459 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5460 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5463 /* Query and clear/ restore no_line_numbers. This is used by the
5464 switch / case handling in stmt.c to give proper line numbers in
5465 warnings about unreachable code. */
5468 force_line_numbers (void)
5470 int old = no_line_numbers;
5472 no_line_numbers = 0;
5474 force_next_line_note ();
5479 restore_line_number_status (int old_value)
5481 no_line_numbers = old_value;
5484 /* Produce exact duplicate of insn INSN after AFTER.
5485 Care updating of libcall regions if present. */
5488 emit_copy_of_insn_after (rtx insn, rtx after)
5491 rtx note1, note2, link;
5493 switch (GET_CODE (insn))
5496 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5500 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5504 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5505 if (CALL_INSN_FUNCTION_USAGE (insn))
5506 CALL_INSN_FUNCTION_USAGE (new)
5507 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5508 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5509 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5516 /* Update LABEL_NUSES. */
5517 mark_jump_label (PATTERN (new), new, 0);
5519 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5521 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5523 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5524 if (REG_NOTE_KIND (link) != REG_LABEL)
5526 if (GET_CODE (link) == EXPR_LIST)
5528 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5533 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5538 /* Fix the libcall sequences. */
5539 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5542 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5544 XEXP (note1, 0) = p;
5545 XEXP (note2, 0) = new;
5547 INSN_CODE (new) = INSN_CODE (insn);
5551 static GTY((deletable(""))) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5553 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5555 if (hard_reg_clobbers[mode][regno])
5556 return hard_reg_clobbers[mode][regno];
5558 return (hard_reg_clobbers[mode][regno] =
5559 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5562 #include "gt-emit-rtl.h"