1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl[GR_MAX];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab;
147 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
148 shortly thrown away. We use two mechanisms to prevent this waste:
150 For sizes up to 5 elements, we keep a SEQUENCE and its associated
151 rtvec for use by gen_sequence. One entry for each size is
152 sufficient because most cases are calls to gen_sequence followed by
153 immediately emitting the SEQUENCE. Reuse is safe since emitting a
154 sequence is destructive on the insn in it anyway and hence can't be
157 We do not bother to save this cached data over nested function calls.
158 Instead, we just reinitialize them. */
160 #define SEQUENCE_RESULT_SIZE 5
162 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
164 /* During RTL generation, we also keep a list of free INSN rtl codes. */
165 static rtx free_insn;
167 #define first_insn (cfun->emit->x_first_insn)
168 #define last_insn (cfun->emit->x_last_insn)
169 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
170 #define last_linenum (cfun->emit->x_last_linenum)
171 #define last_filename (cfun->emit->x_last_filename)
172 #define first_label_num (cfun->emit->x_first_label_num)
174 static rtx make_jump_insn_raw PARAMS ((rtx));
175 static rtx make_call_insn_raw PARAMS ((rtx));
176 static rtx find_line_note PARAMS ((rtx));
177 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
178 static void unshare_all_rtl_1 PARAMS ((rtx));
179 static void unshare_all_decls PARAMS ((tree));
180 static void reset_used_decls PARAMS ((tree));
181 static void mark_label_nuses PARAMS ((rtx));
182 static hashval_t const_int_htab_hash PARAMS ((const void *));
183 static int const_int_htab_eq PARAMS ((const void *,
185 static int rtx_htab_mark_1 PARAMS ((void **, void *));
186 static void rtx_htab_mark PARAMS ((void *));
189 /* Returns a hash code for X (which is a really a CONST_INT). */
192 const_int_htab_hash (x)
195 return (hashval_t) INTVAL ((const struct rtx_def *) x);
198 /* Returns non-zero if the value represented by X (which is really a
199 CONST_INT) is the same as that given by Y (which is really a
203 const_int_htab_eq (x, y)
207 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
210 /* Mark the hash-table element X (which is really a pointer to an
214 rtx_htab_mark_1 (x, data)
216 void *data ATTRIBUTE_UNUSED;
222 /* Mark all the elements of HTAB (which is really an htab_t full of
229 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
232 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
233 don't attempt to share with the various global pieces of rtl (such as
234 frame_pointer_rtx). */
237 gen_raw_REG (mode, regno)
238 enum machine_mode mode;
241 rtx x = gen_rtx_raw_REG (mode, regno);
242 ORIGINAL_REGNO (x) = regno;
246 /* There are some RTL codes that require special attention; the generation
247 functions do the raw handling. If you add to this list, modify
248 special_rtx in gengenrtl.c as well. */
251 gen_rtx_CONST_INT (mode, arg)
252 enum machine_mode mode ATTRIBUTE_UNUSED;
257 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
258 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
260 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
261 if (const_true_rtx && arg == STORE_FLAG_VALUE)
262 return const_true_rtx;
265 /* Look up the CONST_INT in the hash table. */
266 slot = htab_find_slot_with_hash (const_int_htab, &arg,
267 (hashval_t) arg, INSERT);
269 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
274 /* CONST_DOUBLEs needs special handling because their length is known
278 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
279 enum machine_mode mode;
281 HOST_WIDE_INT arg1, arg2;
283 rtx r = rtx_alloc (CONST_DOUBLE);
288 X0EXP (r, 1) = NULL_RTX;
292 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
299 gen_rtx_REG (mode, regno)
300 enum machine_mode mode;
303 /* In case the MD file explicitly references the frame pointer, have
304 all such references point to the same frame pointer. This is
305 used during frame pointer elimination to distinguish the explicit
306 references to these registers from pseudos that happened to be
309 If we have eliminated the frame pointer or arg pointer, we will
310 be using it as a normal register, for example as a spill
311 register. In such cases, we might be accessing it in a mode that
312 is not Pmode and therefore cannot use the pre-allocated rtx.
314 Also don't do this when we are making new REGs in reload, since
315 we don't want to get confused with the real pointers. */
317 if (mode == Pmode && !reload_in_progress)
319 if (regno == FRAME_POINTER_REGNUM)
320 return frame_pointer_rtx;
321 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
322 if (regno == HARD_FRAME_POINTER_REGNUM)
323 return hard_frame_pointer_rtx;
325 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
326 if (regno == ARG_POINTER_REGNUM)
327 return arg_pointer_rtx;
329 #ifdef RETURN_ADDRESS_POINTER_REGNUM
330 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
331 return return_address_pointer_rtx;
333 if (regno == STACK_POINTER_REGNUM)
334 return stack_pointer_rtx;
337 return gen_raw_REG (mode, regno);
341 gen_rtx_MEM (mode, addr)
342 enum machine_mode mode;
345 rtx rt = gen_rtx_raw_MEM (mode, addr);
347 /* This field is not cleared by the mere allocation of the rtx, so
349 MEM_ALIAS_SET (rt) = 0;
355 gen_rtx_SUBREG (mode, reg, offset)
356 enum machine_mode mode;
360 /* This is the most common failure type.
361 Catch it early so we can see who does it. */
362 if ((offset % GET_MODE_SIZE (mode)) != 0)
365 /* This check isn't usable right now because combine will
366 throw arbitrary crap like a CALL into a SUBREG in
367 gen_lowpart_for_combine so we must just eat it. */
369 /* Check for this too. */
370 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
373 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
376 /* Generate a SUBREG representing the least-significant part
377 * of REG if MODE is smaller than mode of REG, otherwise
378 * paradoxical SUBREG. */
380 gen_lowpart_SUBREG (mode, reg)
381 enum machine_mode mode;
384 enum machine_mode inmode;
386 inmode = GET_MODE (reg);
387 if (inmode == VOIDmode)
389 return gen_rtx_SUBREG (mode, reg,
390 subreg_lowpart_offset (mode, inmode));
393 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
395 ** This routine generates an RTX of the size specified by
396 ** <code>, which is an RTX code. The RTX structure is initialized
397 ** from the arguments <element1> through <elementn>, which are
398 ** interpreted according to the specific RTX type's format. The
399 ** special machine mode associated with the rtx (if any) is specified
402 ** gen_rtx can be invoked in a way which resembles the lisp-like
403 ** rtx it will generate. For example, the following rtx structure:
405 ** (plus:QI (mem:QI (reg:SI 1))
406 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
408 ** ...would be generated by the following C code:
410 ** gen_rtx (PLUS, QImode,
411 ** gen_rtx (MEM, QImode,
412 ** gen_rtx (REG, SImode, 1)),
413 ** gen_rtx (MEM, QImode,
414 ** gen_rtx (PLUS, SImode,
415 ** gen_rtx (REG, SImode, 2),
416 ** gen_rtx (REG, SImode, 3)))),
421 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
423 #ifndef ANSI_PROTOTYPES
425 enum machine_mode mode;
428 register int i; /* Array indices... */
429 register const char *fmt; /* Current rtx's format... */
430 register rtx rt_val; /* RTX to return to caller... */
434 #ifndef ANSI_PROTOTYPES
435 code = va_arg (p, enum rtx_code);
436 mode = va_arg (p, enum machine_mode);
442 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
447 rtx arg0 = va_arg (p, rtx);
448 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
449 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
450 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
455 rt_val = gen_rtx_REG (mode, va_arg (p, int));
459 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
463 rt_val = rtx_alloc (code); /* Allocate the storage space. */
464 rt_val->mode = mode; /* Store the machine mode... */
466 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
467 for (i = 0; i < GET_RTX_LENGTH (code); i++)
471 case '0': /* Unused field. */
474 case 'i': /* An integer? */
475 XINT (rt_val, i) = va_arg (p, int);
478 case 'w': /* A wide integer? */
479 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
482 case 's': /* A string? */
483 XSTR (rt_val, i) = va_arg (p, char *);
486 case 'e': /* An expression? */
487 case 'u': /* An insn? Same except when printing. */
488 XEXP (rt_val, i) = va_arg (p, rtx);
491 case 'E': /* An RTX vector? */
492 XVEC (rt_val, i) = va_arg (p, rtvec);
495 case 'b': /* A bitmap? */
496 XBITMAP (rt_val, i) = va_arg (p, bitmap);
499 case 't': /* A tree? */
500 XTREE (rt_val, i) = va_arg (p, tree);
514 /* gen_rtvec (n, [rt1, ..., rtn])
516 ** This routine creates an rtvec and stores within it the
517 ** pointers to rtx's which are its arguments.
522 gen_rtvec VPARAMS ((int n, ...))
524 #ifndef ANSI_PROTOTYPES
533 #ifndef ANSI_PROTOTYPES
538 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
540 vector = (rtx *) alloca (n * sizeof (rtx));
542 for (i = 0; i < n; i++)
543 vector[i] = va_arg (p, rtx);
546 return gen_rtvec_v (n, vector);
550 gen_rtvec_v (n, argp)
555 register rtvec rt_val;
558 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
560 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
562 for (i = 0; i < n; i++)
563 rt_val->elem[i] = *argp++;
569 /* Generate a REG rtx for a new pseudo register of mode MODE.
570 This pseudo is assigned the next sequential register number. */
574 enum machine_mode mode;
576 struct function *f = cfun;
579 /* Don't let anything called after initial flow analysis create new
584 if (generating_concat_p
585 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
586 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
588 /* For complex modes, don't make a single pseudo.
589 Instead, make a CONCAT of two pseudos.
590 This allows noncontiguous allocation of the real and imaginary parts,
591 which makes much better code. Besides, allocating DCmode
592 pseudos overstrains reload on some machines like the 386. */
593 rtx realpart, imagpart;
594 int size = GET_MODE_UNIT_SIZE (mode);
595 enum machine_mode partmode
596 = mode_for_size (size * BITS_PER_UNIT,
597 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
598 ? MODE_FLOAT : MODE_INT),
601 realpart = gen_reg_rtx (partmode);
602 imagpart = gen_reg_rtx (partmode);
603 return gen_rtx_CONCAT (mode, realpart, imagpart);
606 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
607 to have an element for this pseudo reg number. */
609 if (reg_rtx_no == f->emit->regno_pointer_align_length)
611 int old_size = f->emit->regno_pointer_align_length;
614 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
615 memset (new + old_size, 0, old_size);
616 f->emit->regno_pointer_align = (unsigned char *) new;
618 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
619 old_size * 2 * sizeof (rtx));
620 memset (new1 + old_size, 0, old_size * sizeof (rtx));
621 regno_reg_rtx = new1;
623 f->emit->regno_pointer_align_length = old_size * 2;
626 val = gen_raw_REG (mode, reg_rtx_no);
627 regno_reg_rtx[reg_rtx_no++] = val;
631 /* Identify REG (which may be a CONCAT) as a user register. */
637 if (GET_CODE (reg) == CONCAT)
639 REG_USERVAR_P (XEXP (reg, 0)) = 1;
640 REG_USERVAR_P (XEXP (reg, 1)) = 1;
642 else if (GET_CODE (reg) == REG)
643 REG_USERVAR_P (reg) = 1;
648 /* Identify REG as a probable pointer register and show its alignment
649 as ALIGN, if nonzero. */
652 mark_reg_pointer (reg, align)
656 if (! REG_POINTER (reg))
658 REG_POINTER (reg) = 1;
661 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
663 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
664 /* We can no-longer be sure just how aligned this pointer is */
665 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
668 /* Return 1 plus largest pseudo reg number used in the current function. */
676 /* Return 1 + the largest label number used so far in the current function. */
681 if (last_label_num && label_num == base_label_num)
682 return last_label_num;
686 /* Return first label number used in this function (if any were used). */
689 get_first_label_num ()
691 return first_label_num;
694 /* Return the final regno of X, which is a SUBREG of a hard
697 subreg_hard_regno (x, check_mode)
701 enum machine_mode mode = GET_MODE (x);
702 unsigned int byte_offset, base_regno, final_regno;
703 rtx reg = SUBREG_REG (x);
705 /* This is where we attempt to catch illegal subregs
706 created by the compiler. */
707 if (GET_CODE (x) != SUBREG
708 || GET_CODE (reg) != REG)
710 base_regno = REGNO (reg);
711 if (base_regno >= FIRST_PSEUDO_REGISTER)
713 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
716 /* Catch non-congruent offsets too. */
717 byte_offset = SUBREG_BYTE (x);
718 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
721 final_regno = subreg_regno (x);
726 /* Return a value representing some low-order bits of X, where the number
727 of low-order bits is given by MODE. Note that no conversion is done
728 between floating-point and fixed-point values, rather, the bit
729 representation is returned.
731 This function handles the cases in common between gen_lowpart, below,
732 and two variants in cse.c and combine.c. These are the cases that can
733 be safely handled at all points in the compilation.
735 If this is not a case we can handle, return 0. */
738 gen_lowpart_common (mode, x)
739 enum machine_mode mode;
742 int msize = GET_MODE_SIZE (mode);
743 int xsize = GET_MODE_SIZE (GET_MODE (x));
746 if (GET_MODE (x) == mode)
749 /* MODE must occupy no more words than the mode of X. */
750 if (GET_MODE (x) != VOIDmode
751 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
752 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
755 offset = subreg_lowpart_offset (mode, GET_MODE (x));
757 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
758 && (GET_MODE_CLASS (mode) == MODE_INT
759 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
761 /* If we are getting the low-order part of something that has been
762 sign- or zero-extended, we can either just use the object being
763 extended or make a narrower extension. If we want an even smaller
764 piece than the size of the object being extended, call ourselves
767 This case is used mostly by combine and cse. */
769 if (GET_MODE (XEXP (x, 0)) == mode)
771 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
772 return gen_lowpart_common (mode, XEXP (x, 0));
773 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
774 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
776 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
777 || GET_CODE (x) == CONCAT)
778 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
779 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
780 from the low-order part of the constant. */
781 else if ((GET_MODE_CLASS (mode) == MODE_INT
782 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
783 && GET_MODE (x) == VOIDmode
784 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
786 /* If MODE is twice the host word size, X is already the desired
787 representation. Otherwise, if MODE is wider than a word, we can't
788 do this. If MODE is exactly a word, return just one CONST_INT. */
790 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
792 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
794 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
795 return (GET_CODE (x) == CONST_INT ? x
796 : GEN_INT (CONST_DOUBLE_LOW (x)));
799 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
800 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
801 : CONST_DOUBLE_LOW (x));
803 /* Sign extend to HOST_WIDE_INT. */
804 val = trunc_int_for_mode (val, mode);
806 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
811 #ifndef REAL_ARITHMETIC
812 /* If X is an integral constant but we want it in floating-point, it
813 must be the case that we have a union of an integer and a floating-point
814 value. If the machine-parameters allow it, simulate that union here
815 and return the result. The two-word and single-word cases are
818 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
819 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
820 || flag_pretend_float)
821 && GET_MODE_CLASS (mode) == MODE_FLOAT
822 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
823 && GET_CODE (x) == CONST_INT
824 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
826 union {HOST_WIDE_INT i; float d; } u;
829 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
831 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
832 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
833 || flag_pretend_float)
834 && GET_MODE_CLASS (mode) == MODE_FLOAT
835 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
836 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
837 && GET_MODE (x) == VOIDmode
838 && (sizeof (double) * HOST_BITS_PER_CHAR
839 == 2 * HOST_BITS_PER_WIDE_INT))
841 union {HOST_WIDE_INT i[2]; double d; } u;
842 HOST_WIDE_INT low, high;
844 if (GET_CODE (x) == CONST_INT)
845 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
847 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
849 #ifdef HOST_WORDS_BIG_ENDIAN
850 u.i[0] = high, u.i[1] = low;
852 u.i[0] = low, u.i[1] = high;
855 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
858 /* Similarly, if this is converting a floating-point value into a
859 single-word integer. Only do this is the host and target parameters are
862 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
863 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
864 || flag_pretend_float)
865 && (GET_MODE_CLASS (mode) == MODE_INT
866 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
867 && GET_CODE (x) == CONST_DOUBLE
868 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
869 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
870 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
872 /* Similarly, if this is converting a floating-point value into a
873 two-word integer, we can do this one word at a time and make an
874 integer. Only do this is the host and target parameters are
877 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
878 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
879 || flag_pretend_float)
880 && (GET_MODE_CLASS (mode) == MODE_INT
881 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
882 && GET_CODE (x) == CONST_DOUBLE
883 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
884 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
886 rtx lowpart, highpart;
888 lowpart = constant_subword (x,
889 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
891 highpart = constant_subword (x,
892 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
894 if (lowpart && GET_CODE (lowpart) == CONST_INT
895 && highpart && GET_CODE (highpart) == CONST_INT)
896 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
898 #else /* ifndef REAL_ARITHMETIC */
900 /* When we have a FP emulator, we can handle all conversions between
901 FP and integer operands. This simplifies reload because it
902 doesn't have to deal with constructs like (subreg:DI
903 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
904 /* Single-precision floats are always 32-bits and double-precision
905 floats are always 64-bits. */
907 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
908 && GET_MODE_BITSIZE (mode) == 32
909 && GET_CODE (x) == CONST_INT)
915 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
916 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
918 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
919 && GET_MODE_BITSIZE (mode) == 64
920 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
921 && GET_MODE (x) == VOIDmode)
925 HOST_WIDE_INT low, high;
927 if (GET_CODE (x) == CONST_INT)
930 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
934 low = CONST_DOUBLE_LOW (x);
935 high = CONST_DOUBLE_HIGH (x);
938 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
940 if (WORDS_BIG_ENDIAN)
941 i[0] = high, i[1] = low;
943 i[0] = low, i[1] = high;
945 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
946 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
948 else if ((GET_MODE_CLASS (mode) == MODE_INT
949 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
950 && GET_CODE (x) == CONST_DOUBLE
951 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
954 long i[4]; /* Only the low 32 bits of each 'long' are used. */
955 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
957 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
958 switch (GET_MODE_BITSIZE (GET_MODE (x)))
961 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
965 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
968 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
972 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
978 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
980 #if HOST_BITS_PER_WIDE_INT == 32
981 return immed_double_const (i[endian], i[1 - endian], mode);
986 if (HOST_BITS_PER_WIDE_INT != 64)
989 for (c = 0; c < 4; c++)
992 switch (GET_MODE_BITSIZE (GET_MODE (x)))
996 return immed_double_const (((unsigned long) i[endian]) |
997 (((HOST_WIDE_INT) i[1-endian]) << 32),
1001 return immed_double_const (((unsigned long) i[endian*3]) |
1002 (((HOST_WIDE_INT) i[1+endian]) << 32),
1003 ((unsigned long) i[2-endian]) |
1004 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1012 #endif /* ifndef REAL_ARITHMETIC */
1014 /* Otherwise, we can't do this. */
1018 /* Return the real part (which has mode MODE) of a complex value X.
1019 This always comes at the low address in memory. */
1022 gen_realpart (mode, x)
1023 enum machine_mode mode;
1026 if (WORDS_BIG_ENDIAN
1027 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1029 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1031 ("Can't access real part of complex value in hard register");
1032 else if (WORDS_BIG_ENDIAN)
1033 return gen_highpart (mode, x);
1035 return gen_lowpart (mode, x);
1038 /* Return the imaginary part (which has mode MODE) of a complex value X.
1039 This always comes at the high address in memory. */
1042 gen_imagpart (mode, x)
1043 enum machine_mode mode;
1046 if (WORDS_BIG_ENDIAN)
1047 return gen_lowpart (mode, x);
1048 else if (! WORDS_BIG_ENDIAN
1049 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1051 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1053 ("can't access imaginary part of complex value in hard register");
1055 return gen_highpart (mode, x);
1058 /* Return 1 iff X, assumed to be a SUBREG,
1059 refers to the real part of the complex value in its containing reg.
1060 Complex values are always stored with the real part in the first word,
1061 regardless of WORDS_BIG_ENDIAN. */
1064 subreg_realpart_p (x)
1067 if (GET_CODE (x) != SUBREG)
1070 return ((unsigned int) SUBREG_BYTE (x)
1071 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1074 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1075 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1076 least-significant part of X.
1077 MODE specifies how big a part of X to return;
1078 it usually should not be larger than a word.
1079 If X is a MEM whose address is a QUEUED, the value may be so also. */
1082 gen_lowpart (mode, x)
1083 enum machine_mode mode;
1086 rtx result = gen_lowpart_common (mode, x);
1090 else if (GET_CODE (x) == REG)
1092 /* Must be a hard reg that's not valid in MODE. */
1093 result = gen_lowpart_common (mode, copy_to_reg (x));
1098 else if (GET_CODE (x) == MEM)
1100 /* The only additional case we can do is MEM. */
1101 register int offset = 0;
1102 if (WORDS_BIG_ENDIAN)
1103 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1104 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1106 if (BYTES_BIG_ENDIAN)
1107 /* Adjust the address so that the address-after-the-data
1109 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1110 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1112 return adjust_address (x, mode, offset);
1114 else if (GET_CODE (x) == ADDRESSOF)
1115 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1120 /* Like `gen_lowpart', but refer to the most significant part.
1121 This is used to access the imaginary part of a complex number. */
1124 gen_highpart (mode, x)
1125 enum machine_mode mode;
1128 unsigned int msize = GET_MODE_SIZE (mode);
1131 /* This case loses if X is a subreg. To catch bugs early,
1132 complain if an invalid MODE is used even in other cases. */
1133 if (msize > UNITS_PER_WORD
1134 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1137 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1138 subreg_highpart_offset (mode, GET_MODE (x)));
1140 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1141 the target if we have a MEM. gen_highpart must return a valid operand,
1142 emitting code if necessary to do so. */
1143 if (GET_CODE (result) == MEM)
1144 result = validize_mem (result);
1151 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1152 be VOIDmode constant. */
1154 gen_highpart_mode (outermode, innermode, exp)
1155 enum machine_mode outermode, innermode;
1158 if (GET_MODE (exp) != VOIDmode)
1160 if (GET_MODE (exp) != innermode)
1162 return gen_highpart (outermode, exp);
1164 return simplify_gen_subreg (outermode, exp, innermode,
1165 subreg_highpart_offset (outermode, innermode));
1167 /* Return offset in bytes to get OUTERMODE low part
1168 of the value in mode INNERMODE stored in memory in target format. */
1171 subreg_lowpart_offset (outermode, innermode)
1172 enum machine_mode outermode, innermode;
1174 unsigned int offset = 0;
1175 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1179 if (WORDS_BIG_ENDIAN)
1180 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1181 if (BYTES_BIG_ENDIAN)
1182 offset += difference % UNITS_PER_WORD;
1188 /* Return offset in bytes to get OUTERMODE high part
1189 of the value in mode INNERMODE stored in memory in target format. */
1191 subreg_highpart_offset (outermode, innermode)
1192 enum machine_mode outermode, innermode;
1194 unsigned int offset = 0;
1195 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1197 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1202 if (! WORDS_BIG_ENDIAN)
1203 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1204 if (! BYTES_BIG_ENDIAN)
1205 offset += difference % UNITS_PER_WORD;
1211 /* Return 1 iff X, assumed to be a SUBREG,
1212 refers to the least significant part of its containing reg.
1213 If X is not a SUBREG, always return 1 (it is its own low part!). */
1216 subreg_lowpart_p (x)
1219 if (GET_CODE (x) != SUBREG)
1221 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1224 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1225 == SUBREG_BYTE (x));
1229 /* Helper routine for all the constant cases of operand_subword.
1230 Some places invoke this directly. */
1233 constant_subword (op, offset, mode)
1236 enum machine_mode mode;
1238 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1241 /* If OP is already an integer word, return it. */
1242 if (GET_MODE_CLASS (mode) == MODE_INT
1243 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1246 #ifdef REAL_ARITHMETIC
1247 /* The output is some bits, the width of the target machine's word.
1248 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1250 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1251 && GET_MODE_CLASS (mode) == MODE_FLOAT
1252 && GET_MODE_BITSIZE (mode) == 64
1253 && GET_CODE (op) == CONST_DOUBLE)
1258 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1259 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1261 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1262 which the words are written depends on the word endianness.
1263 ??? This is a potential portability problem and should
1264 be fixed at some point.
1266 We must excercise caution with the sign bit. By definition there
1267 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1268 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1269 So we explicitly mask and sign-extend as necessary. */
1270 if (BITS_PER_WORD == 32)
1273 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1274 return GEN_INT (val);
1276 #if HOST_BITS_PER_WIDE_INT >= 64
1277 else if (BITS_PER_WORD >= 64 && offset == 0)
1279 val = k[! WORDS_BIG_ENDIAN];
1280 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1281 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1282 return GEN_INT (val);
1285 else if (BITS_PER_WORD == 16)
1287 val = k[offset >> 1];
1288 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1290 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1291 return GEN_INT (val);
1296 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1297 && GET_MODE_CLASS (mode) == MODE_FLOAT
1298 && GET_MODE_BITSIZE (mode) > 64
1299 && GET_CODE (op) == CONST_DOUBLE)
1304 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1305 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1307 if (BITS_PER_WORD == 32)
1310 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1311 return GEN_INT (val);
1313 #if HOST_BITS_PER_WIDE_INT >= 64
1314 else if (BITS_PER_WORD >= 64 && offset <= 1)
1316 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1317 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1318 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1319 return GEN_INT (val);
1325 #else /* no REAL_ARITHMETIC */
1326 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1327 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1328 || flag_pretend_float)
1329 && GET_MODE_CLASS (mode) == MODE_FLOAT
1330 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1331 && GET_CODE (op) == CONST_DOUBLE)
1333 /* The constant is stored in the host's word-ordering,
1334 but we want to access it in the target's word-ordering. Some
1335 compilers don't like a conditional inside macro args, so we have two
1336 copies of the return. */
1337 #ifdef HOST_WORDS_BIG_ENDIAN
1338 return GEN_INT (offset == WORDS_BIG_ENDIAN
1339 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1341 return GEN_INT (offset != WORDS_BIG_ENDIAN
1342 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1345 #endif /* no REAL_ARITHMETIC */
1347 /* Single word float is a little harder, since single- and double-word
1348 values often do not have the same high-order bits. We have already
1349 verified that we want the only defined word of the single-word value. */
1350 #ifdef REAL_ARITHMETIC
1351 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1352 && GET_MODE_BITSIZE (mode) == 32
1353 && GET_CODE (op) == CONST_DOUBLE)
1358 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1359 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1361 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1363 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1365 if (BITS_PER_WORD == 16)
1367 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1369 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1372 return GEN_INT (val);
1375 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1376 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1377 || flag_pretend_float)
1378 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1379 && GET_MODE_CLASS (mode) == MODE_FLOAT
1380 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1381 && GET_CODE (op) == CONST_DOUBLE)
1384 union {float f; HOST_WIDE_INT i; } u;
1386 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1389 return GEN_INT (u.i);
1391 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1392 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1393 || flag_pretend_float)
1394 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1395 && GET_MODE_CLASS (mode) == MODE_FLOAT
1396 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1397 && GET_CODE (op) == CONST_DOUBLE)
1400 union {double d; HOST_WIDE_INT i; } u;
1402 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1405 return GEN_INT (u.i);
1407 #endif /* no REAL_ARITHMETIC */
1409 /* The only remaining cases that we can handle are integers.
1410 Convert to proper endianness now since these cases need it.
1411 At this point, offset == 0 means the low-order word.
1413 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1414 in general. However, if OP is (const_int 0), we can just return
1417 if (op == const0_rtx)
1420 if (GET_MODE_CLASS (mode) != MODE_INT
1421 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1422 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1425 if (WORDS_BIG_ENDIAN)
1426 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1428 /* Find out which word on the host machine this value is in and get
1429 it from the constant. */
1430 val = (offset / size_ratio == 0
1431 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1432 : (GET_CODE (op) == CONST_INT
1433 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1435 /* Get the value we want into the low bits of val. */
1436 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1437 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1439 val = trunc_int_for_mode (val, word_mode);
1441 return GEN_INT (val);
1444 /* Return subword OFFSET of operand OP.
1445 The word number, OFFSET, is interpreted as the word number starting
1446 at the low-order address. OFFSET 0 is the low-order word if not
1447 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1449 If we cannot extract the required word, we return zero. Otherwise,
1450 an rtx corresponding to the requested word will be returned.
1452 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1453 reload has completed, a valid address will always be returned. After
1454 reload, if a valid address cannot be returned, we return zero.
1456 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1457 it is the responsibility of the caller.
1459 MODE is the mode of OP in case it is a CONST_INT.
1461 ??? This is still rather broken for some cases. The problem for the
1462 moment is that all callers of this thing provide no 'goal mode' to
1463 tell us to work with. This exists because all callers were written
1464 in a word based SUBREG world.
1465 Now use of this function can be deprecated by simplify_subreg in most
1470 operand_subword (op, offset, validate_address, mode)
1472 unsigned int offset;
1473 int validate_address;
1474 enum machine_mode mode;
1476 if (mode == VOIDmode)
1477 mode = GET_MODE (op);
1479 if (mode == VOIDmode)
1482 /* If OP is narrower than a word, fail. */
1484 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1487 /* If we want a word outside OP, return zero. */
1489 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1492 /* Form a new MEM at the requested address. */
1493 if (GET_CODE (op) == MEM)
1495 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1497 if (! validate_address)
1500 else if (reload_completed)
1502 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1506 return replace_equiv_address (new, XEXP (new, 0));
1509 /* Rest can be handled by simplify_subreg. */
1510 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1513 /* Similar to `operand_subword', but never return 0. If we can't extract
1514 the required subword, put OP into a register and try again. If that fails,
1515 abort. We always validate the address in this case.
1517 MODE is the mode of OP, in case it is CONST_INT. */
1520 operand_subword_force (op, offset, mode)
1522 unsigned int offset;
1523 enum machine_mode mode;
1525 rtx result = operand_subword (op, offset, 1, mode);
1530 if (mode != BLKmode && mode != VOIDmode)
1532 /* If this is a register which can not be accessed by words, copy it
1533 to a pseudo register. */
1534 if (GET_CODE (op) == REG)
1535 op = copy_to_reg (op);
1537 op = force_reg (mode, op);
1540 result = operand_subword (op, offset, 1, mode);
1547 /* Given a compare instruction, swap the operands.
1548 A test instruction is changed into a compare of 0 against the operand. */
1551 reverse_comparison (insn)
1554 rtx body = PATTERN (insn);
1557 if (GET_CODE (body) == SET)
1558 comp = SET_SRC (body);
1560 comp = SET_SRC (XVECEXP (body, 0, 0));
1562 if (GET_CODE (comp) == COMPARE)
1564 rtx op0 = XEXP (comp, 0);
1565 rtx op1 = XEXP (comp, 1);
1566 XEXP (comp, 0) = op1;
1567 XEXP (comp, 1) = op0;
1571 rtx new = gen_rtx_COMPARE (VOIDmode,
1572 CONST0_RTX (GET_MODE (comp)), comp);
1573 if (GET_CODE (body) == SET)
1574 SET_SRC (body) = new;
1576 SET_SRC (XVECEXP (body, 0, 0)) = new;
1580 /* Return a memory reference like MEMREF, but with its mode changed
1581 to MODE and its address changed to ADDR.
1582 (VOIDmode means don't change the mode.
1583 NULL for ADDR means don't change the address.)
1584 VALIDATE is nonzero if the returned memory location is required to be
1588 change_address_1 (memref, mode, addr, validate)
1590 enum machine_mode mode;
1596 if (GET_CODE (memref) != MEM)
1598 if (mode == VOIDmode)
1599 mode = GET_MODE (memref);
1601 addr = XEXP (memref, 0);
1605 if (reload_in_progress || reload_completed)
1607 if (! memory_address_p (mode, addr))
1611 addr = memory_address (mode, addr);
1614 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1617 new = gen_rtx_MEM (mode, addr);
1618 MEM_COPY_ATTRIBUTES (new, memref);
1622 /* Return a memory reference like MEMREF, but with its mode changed
1623 to MODE and its address offset by OFFSET bytes. */
1626 adjust_address (memref, mode, offset)
1628 enum machine_mode mode;
1629 HOST_WIDE_INT offset;
1631 /* For now, this is just a wrapper for change_address, but eventually
1632 will do memref tracking. */
1633 rtx addr = XEXP (memref, 0);
1635 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1636 object, we can merge it into the LO_SUM. */
1637 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1639 && offset < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1640 addr = gen_rtx_LO_SUM (mode, XEXP (addr, 0),
1641 plus_constant (XEXP (addr, 1), offset));
1643 addr = plus_constant (addr, offset);
1645 return change_address (memref, mode, addr);
1648 /* Likewise, but the reference is not required to be valid. */
1651 adjust_address_nv (memref, mode, offset)
1653 enum machine_mode mode;
1654 HOST_WIDE_INT offset;
1656 /* For now, this is just a wrapper for change_address, but eventually
1657 will do memref tracking. */
1658 rtx addr = XEXP (memref, 0);
1660 /* If MEMREF is a LO_SUM and the offset is within the size of the
1661 object, we can merge it into the LO_SUM. */
1662 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1664 && offset < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1665 addr = gen_rtx_LO_SUM (mode, XEXP (addr, 0),
1666 plus_constant (XEXP (addr, 1), offset));
1668 addr = plus_constant (addr, offset);
1670 return change_address_1 (memref, mode, addr, 0);
1673 /* Return a memory reference like MEMREF, but with its address changed to
1674 ADDR. The caller is asserting that the actual piece of memory pointed
1675 to is the same, just the form of the address is being changed, such as
1676 by putting something into a register. */
1679 replace_equiv_address (memref, addr)
1683 /* For now, this is just a wrapper for change_address, but eventually
1684 will do memref tracking. */
1685 return change_address (memref, VOIDmode, addr);
1687 /* Likewise, but the reference is not required to be valid. */
1690 replace_equiv_address_nv (memref, addr)
1694 /* For now, this is just a wrapper for change_address, but eventually
1695 will do memref tracking. */
1696 return change_address_1 (memref, VOIDmode, addr, 0);
1699 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1706 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1707 NULL_RTX, label_num++, NULL, NULL);
1709 LABEL_NUSES (label) = 0;
1710 LABEL_ALTERNATE_NAME (label) = NULL;
1714 /* For procedure integration. */
1716 /* Install new pointers to the first and last insns in the chain.
1717 Also, set cur_insn_uid to one higher than the last in use.
1718 Used for an inline-procedure after copying the insn chain. */
1721 set_new_first_and_last_insn (first, last)
1730 for (insn = first; insn; insn = NEXT_INSN (insn))
1731 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1736 /* Set the range of label numbers found in the current function.
1737 This is used when belatedly compiling an inline function. */
1740 set_new_first_and_last_label_num (first, last)
1743 base_label_num = label_num;
1744 first_label_num = first;
1745 last_label_num = last;
1748 /* Set the last label number found in the current function.
1749 This is used when belatedly compiling an inline function. */
1752 set_new_last_label_num (last)
1755 base_label_num = label_num;
1756 last_label_num = last;
1759 /* Restore all variables describing the current status from the structure *P.
1760 This is used after a nested function. */
1763 restore_emit_status (p)
1764 struct function *p ATTRIBUTE_UNUSED;
1767 clear_emit_caches ();
1770 /* Clear out all parts of the state in F that can safely be discarded
1771 after the function has been compiled, to let garbage collection
1772 reclaim the memory. */
1775 free_emit_status (f)
1778 free (f->emit->x_regno_reg_rtx);
1779 free (f->emit->regno_pointer_align);
1784 /* Go through all the RTL insn bodies and copy any invalid shared
1785 structure. This routine should only be called once. */
1788 unshare_all_rtl (fndecl, insn)
1794 /* Make sure that virtual parameters are not shared. */
1795 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1796 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
1798 /* Make sure that virtual stack slots are not shared. */
1799 unshare_all_decls (DECL_INITIAL (fndecl));
1801 /* Unshare just about everything else. */
1802 unshare_all_rtl_1 (insn);
1804 /* Make sure the addresses of stack slots found outside the insn chain
1805 (such as, in DECL_RTL of a variable) are not shared
1806 with the insn chain.
1808 This special care is necessary when the stack slot MEM does not
1809 actually appear in the insn chain. If it does appear, its address
1810 is unshared from all else at that point. */
1811 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1814 /* Go through all the RTL insn bodies and copy any invalid shared
1815 structure, again. This is a fairly expensive thing to do so it
1816 should be done sparingly. */
1819 unshare_all_rtl_again (insn)
1825 for (p = insn; p; p = NEXT_INSN (p))
1828 reset_used_flags (PATTERN (p));
1829 reset_used_flags (REG_NOTES (p));
1830 reset_used_flags (LOG_LINKS (p));
1833 /* Make sure that virtual stack slots are not shared. */
1834 reset_used_decls (DECL_INITIAL (cfun->decl));
1836 /* Make sure that virtual parameters are not shared. */
1837 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1838 reset_used_flags (DECL_RTL (decl));
1840 reset_used_flags (stack_slot_list);
1842 unshare_all_rtl (cfun->decl, insn);
1845 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1846 Assumes the mark bits are cleared at entry. */
1849 unshare_all_rtl_1 (insn)
1852 for (; insn; insn = NEXT_INSN (insn))
1855 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1856 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1857 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1861 /* Go through all virtual stack slots of a function and copy any
1862 shared structure. */
1864 unshare_all_decls (blk)
1869 /* Copy shared decls. */
1870 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1871 if (DECL_RTL_SET_P (t))
1872 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
1874 /* Now process sub-blocks. */
1875 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1876 unshare_all_decls (t);
1879 /* Go through all virtual stack slots of a function and mark them as
1882 reset_used_decls (blk)
1888 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1889 if (DECL_RTL_SET_P (t))
1890 reset_used_flags (DECL_RTL (t));
1892 /* Now process sub-blocks. */
1893 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1894 reset_used_decls (t);
1897 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1898 Recursively does the same for subexpressions. */
1901 copy_rtx_if_shared (orig)
1904 register rtx x = orig;
1906 register enum rtx_code code;
1907 register const char *format_ptr;
1913 code = GET_CODE (x);
1915 /* These types may be freely shared. */
1928 /* SCRATCH must be shared because they represent distinct values. */
1932 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1933 a LABEL_REF, it isn't sharable. */
1934 if (GET_CODE (XEXP (x, 0)) == PLUS
1935 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1936 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1945 /* The chain of insns is not being copied. */
1949 /* A MEM is allowed to be shared if its address is constant.
1951 We used to allow sharing of MEMs which referenced
1952 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1953 that can lose. instantiate_virtual_regs will not unshare
1954 the MEMs, and combine may change the structure of the address
1955 because it looks safe and profitable in one context, but
1956 in some other context it creates unrecognizable RTL. */
1957 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1966 /* This rtx may not be shared. If it has already been seen,
1967 replace it with a copy of itself. */
1973 copy = rtx_alloc (code);
1975 (sizeof (*copy) - sizeof (copy->fld)
1976 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1982 /* Now scan the subexpressions recursively.
1983 We can store any replaced subexpressions directly into X
1984 since we know X is not shared! Any vectors in X
1985 must be copied if X was copied. */
1987 format_ptr = GET_RTX_FORMAT (code);
1989 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1991 switch (*format_ptr++)
1994 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1998 if (XVEC (x, i) != NULL)
2001 int len = XVECLEN (x, i);
2003 if (copied && len > 0)
2004 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2005 for (j = 0; j < len; j++)
2006 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2014 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2015 to look for shared sub-parts. */
2018 reset_used_flags (x)
2022 register enum rtx_code code;
2023 register const char *format_ptr;
2028 code = GET_CODE (x);
2030 /* These types may be freely shared so we needn't do any resetting
2051 /* The chain of insns is not being copied. */
2060 format_ptr = GET_RTX_FORMAT (code);
2061 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2063 switch (*format_ptr++)
2066 reset_used_flags (XEXP (x, i));
2070 for (j = 0; j < XVECLEN (x, i); j++)
2071 reset_used_flags (XVECEXP (x, i, j));
2077 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2078 Return X or the rtx for the pseudo reg the value of X was copied into.
2079 OTHER must be valid as a SET_DEST. */
2082 make_safe_from (x, other)
2086 switch (GET_CODE (other))
2089 other = SUBREG_REG (other);
2091 case STRICT_LOW_PART:
2094 other = XEXP (other, 0);
2100 if ((GET_CODE (other) == MEM
2102 && GET_CODE (x) != REG
2103 && GET_CODE (x) != SUBREG)
2104 || (GET_CODE (other) == REG
2105 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2106 || reg_mentioned_p (other, x))))
2108 rtx temp = gen_reg_rtx (GET_MODE (x));
2109 emit_move_insn (temp, x);
2115 /* Emission of insns (adding them to the doubly-linked list). */
2117 /* Return the first insn of the current sequence or current function. */
2125 /* Return the last insn emitted in current sequence or current function. */
2133 /* Specify a new insn as the last in the chain. */
2136 set_last_insn (insn)
2139 if (NEXT_INSN (insn) != 0)
2144 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2147 get_last_insn_anywhere ()
2149 struct sequence_stack *stack;
2152 for (stack = seq_stack; stack; stack = stack->next)
2153 if (stack->last != 0)
2158 /* Return a number larger than any instruction's uid in this function. */
2163 return cur_insn_uid;
2166 /* Renumber instructions so that no instruction UIDs are wasted. */
2169 renumber_insns (stream)
2174 /* If we're not supposed to renumber instructions, don't. */
2175 if (!flag_renumber_insns)
2178 /* If there aren't that many instructions, then it's not really
2179 worth renumbering them. */
2180 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2185 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2188 fprintf (stream, "Renumbering insn %d to %d\n",
2189 INSN_UID (insn), cur_insn_uid);
2190 INSN_UID (insn) = cur_insn_uid++;
2194 /* Return the next insn. If it is a SEQUENCE, return the first insn
2203 insn = NEXT_INSN (insn);
2204 if (insn && GET_CODE (insn) == INSN
2205 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2206 insn = XVECEXP (PATTERN (insn), 0, 0);
2212 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2216 previous_insn (insn)
2221 insn = PREV_INSN (insn);
2222 if (insn && GET_CODE (insn) == INSN
2223 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2224 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2230 /* Return the next insn after INSN that is not a NOTE. This routine does not
2231 look inside SEQUENCEs. */
2234 next_nonnote_insn (insn)
2239 insn = NEXT_INSN (insn);
2240 if (insn == 0 || GET_CODE (insn) != NOTE)
2247 /* Return the previous insn before INSN that is not a NOTE. This routine does
2248 not look inside SEQUENCEs. */
2251 prev_nonnote_insn (insn)
2256 insn = PREV_INSN (insn);
2257 if (insn == 0 || GET_CODE (insn) != NOTE)
2264 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2265 or 0, if there is none. This routine does not look inside
2269 next_real_insn (insn)
2274 insn = NEXT_INSN (insn);
2275 if (insn == 0 || GET_CODE (insn) == INSN
2276 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2283 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2284 or 0, if there is none. This routine does not look inside
2288 prev_real_insn (insn)
2293 insn = PREV_INSN (insn);
2294 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2295 || GET_CODE (insn) == JUMP_INSN)
2302 /* Find the next insn after INSN that really does something. This routine
2303 does not look inside SEQUENCEs. Until reload has completed, this is the
2304 same as next_real_insn. */
2307 active_insn_p (insn)
2310 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2311 || (GET_CODE (insn) == INSN
2312 && (! reload_completed
2313 || (GET_CODE (PATTERN (insn)) != USE
2314 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2318 next_active_insn (insn)
2323 insn = NEXT_INSN (insn);
2324 if (insn == 0 || active_insn_p (insn))
2331 /* Find the last insn before INSN that really does something. This routine
2332 does not look inside SEQUENCEs. Until reload has completed, this is the
2333 same as prev_real_insn. */
2336 prev_active_insn (insn)
2341 insn = PREV_INSN (insn);
2342 if (insn == 0 || active_insn_p (insn))
2349 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2357 insn = NEXT_INSN (insn);
2358 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2365 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2373 insn = PREV_INSN (insn);
2374 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2382 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2383 and REG_CC_USER notes so we can find it. */
2386 link_cc0_insns (insn)
2389 rtx user = next_nonnote_insn (insn);
2391 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2392 user = XVECEXP (PATTERN (user), 0, 0);
2394 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2396 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2399 /* Return the next insn that uses CC0 after INSN, which is assumed to
2400 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2401 applied to the result of this function should yield INSN).
2403 Normally, this is simply the next insn. However, if a REG_CC_USER note
2404 is present, it contains the insn that uses CC0.
2406 Return 0 if we can't find the insn. */
2409 next_cc0_user (insn)
2412 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2415 return XEXP (note, 0);
2417 insn = next_nonnote_insn (insn);
2418 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2419 insn = XVECEXP (PATTERN (insn), 0, 0);
2421 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2427 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2428 note, it is the previous insn. */
2431 prev_cc0_setter (insn)
2434 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2437 return XEXP (note, 0);
2439 insn = prev_nonnote_insn (insn);
2440 if (! sets_cc0_p (PATTERN (insn)))
2447 /* Increment the label uses for all labels present in rtx. */
2453 register enum rtx_code code;
2455 register const char *fmt;
2457 code = GET_CODE (x);
2458 if (code == LABEL_REF)
2459 LABEL_NUSES (XEXP (x, 0))++;
2461 fmt = GET_RTX_FORMAT (code);
2462 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2465 mark_label_nuses (XEXP (x, i));
2466 else if (fmt[i] == 'E')
2467 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2468 mark_label_nuses (XVECEXP (x, i, j));
2473 /* Try splitting insns that can be split for better scheduling.
2474 PAT is the pattern which might split.
2475 TRIAL is the insn providing PAT.
2476 LAST is non-zero if we should return the last insn of the sequence produced.
2478 If this routine succeeds in splitting, it returns the first or last
2479 replacement insn depending on the value of LAST. Otherwise, it
2480 returns TRIAL. If the insn to be returned can be split, it will be. */
2483 try_split (pat, trial, last)
2487 rtx before = PREV_INSN (trial);
2488 rtx after = NEXT_INSN (trial);
2489 rtx seq = split_insns (pat, trial);
2490 int has_barrier = 0;
2493 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2494 We may need to handle this specially. */
2495 if (after && GET_CODE (after) == BARRIER)
2498 after = NEXT_INSN (after);
2503 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2504 The latter case will normally arise only when being done so that
2505 it, in turn, will be split (SFmode on the 29k is an example). */
2506 if (GET_CODE (seq) == SEQUENCE)
2511 /* Avoid infinite loop if any insn of the result matches
2512 the original pattern. */
2513 for (i = 0; i < XVECLEN (seq, 0); i++)
2514 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2515 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2519 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2520 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2521 mark_jump_label (PATTERN (XVECEXP (seq, 0, i)),
2522 XVECEXP (seq, 0, i), 0);
2524 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2525 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2526 if (GET_CODE (trial) == CALL_INSN)
2527 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2528 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2529 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2530 = CALL_INSN_FUNCTION_USAGE (trial);
2532 /* Copy EH notes. */
2533 if ((eh_note = find_reg_note (trial, REG_EH_REGION, NULL_RTX)))
2534 for (i = 0; i < XVECLEN (seq, 0); i++)
2536 rtx insn = XVECEXP (seq, 0, i);
2537 if (GET_CODE (insn) == CALL_INSN
2538 || (flag_non_call_exceptions
2539 && may_trap_p (PATTERN (insn))))
2541 = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (eh_note, 0),
2545 /* If there are LABELS inside the split insns increment the
2546 usage count so we don't delete the label. */
2547 if (GET_CODE (trial) == INSN)
2548 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2549 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2550 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2552 tem = emit_insn_after (seq, before);
2554 delete_insn (trial);
2556 emit_barrier_after (tem);
2558 /* Recursively call try_split for each new insn created; by the
2559 time control returns here that insn will be fully split, so
2560 set LAST and continue from the insn after the one returned.
2561 We can't use next_active_insn here since AFTER may be a note.
2562 Ignore deleted insns, which can be occur if not optimizing. */
2563 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2564 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2565 tem = try_split (PATTERN (tem), tem, 1);
2567 /* Avoid infinite loop if the result matches the original pattern. */
2568 else if (rtx_equal_p (seq, pat))
2572 PATTERN (trial) = seq;
2573 INSN_CODE (trial) = -1;
2574 try_split (seq, trial, last);
2577 /* Return either the first or the last insn, depending on which was
2580 ? (after ? prev_active_insn (after) : last_insn)
2581 : next_active_insn (before);
2587 /* Make and return an INSN rtx, initializing all its slots.
2588 Store PATTERN in the pattern slots. */
2591 make_insn_raw (pattern)
2596 insn = rtx_alloc (INSN);
2598 INSN_UID (insn) = cur_insn_uid++;
2599 PATTERN (insn) = pattern;
2600 INSN_CODE (insn) = -1;
2601 LOG_LINKS (insn) = NULL;
2602 REG_NOTES (insn) = NULL;
2604 #ifdef ENABLE_RTL_CHECKING
2607 && (returnjump_p (insn)
2608 || (GET_CODE (insn) == SET
2609 && SET_DEST (insn) == pc_rtx)))
2611 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2619 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2622 make_jump_insn_raw (pattern)
2627 insn = rtx_alloc (JUMP_INSN);
2628 INSN_UID (insn) = cur_insn_uid++;
2630 PATTERN (insn) = pattern;
2631 INSN_CODE (insn) = -1;
2632 LOG_LINKS (insn) = NULL;
2633 REG_NOTES (insn) = NULL;
2634 JUMP_LABEL (insn) = NULL;
2639 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2642 make_call_insn_raw (pattern)
2647 insn = rtx_alloc (CALL_INSN);
2648 INSN_UID (insn) = cur_insn_uid++;
2650 PATTERN (insn) = pattern;
2651 INSN_CODE (insn) = -1;
2652 LOG_LINKS (insn) = NULL;
2653 REG_NOTES (insn) = NULL;
2654 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2659 /* Add INSN to the end of the doubly-linked list.
2660 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2666 PREV_INSN (insn) = last_insn;
2667 NEXT_INSN (insn) = 0;
2669 if (NULL != last_insn)
2670 NEXT_INSN (last_insn) = insn;
2672 if (NULL == first_insn)
2678 /* Add INSN into the doubly-linked list after insn AFTER. This and
2679 the next should be the only functions called to insert an insn once
2680 delay slots have been filled since only they know how to update a
2684 add_insn_after (insn, after)
2687 rtx next = NEXT_INSN (after);
2689 if (optimize && INSN_DELETED_P (after))
2692 NEXT_INSN (insn) = next;
2693 PREV_INSN (insn) = after;
2697 PREV_INSN (next) = insn;
2698 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2699 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2701 else if (last_insn == after)
2705 struct sequence_stack *stack = seq_stack;
2706 /* Scan all pending sequences too. */
2707 for (; stack; stack = stack->next)
2708 if (after == stack->last)
2718 NEXT_INSN (after) = insn;
2719 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2721 rtx sequence = PATTERN (after);
2722 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2726 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2727 the previous should be the only functions called to insert an insn once
2728 delay slots have been filled since only they know how to update a
2732 add_insn_before (insn, before)
2735 rtx prev = PREV_INSN (before);
2737 if (optimize && INSN_DELETED_P (before))
2740 PREV_INSN (insn) = prev;
2741 NEXT_INSN (insn) = before;
2745 NEXT_INSN (prev) = insn;
2746 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2748 rtx sequence = PATTERN (prev);
2749 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2752 else if (first_insn == before)
2756 struct sequence_stack *stack = seq_stack;
2757 /* Scan all pending sequences too. */
2758 for (; stack; stack = stack->next)
2759 if (before == stack->first)
2761 stack->first = insn;
2769 PREV_INSN (before) = insn;
2770 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2771 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2774 /* Remove an insn from its doubly-linked list. This function knows how
2775 to handle sequences. */
2780 rtx next = NEXT_INSN (insn);
2781 rtx prev = PREV_INSN (insn);
2784 NEXT_INSN (prev) = next;
2785 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2787 rtx sequence = PATTERN (prev);
2788 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2791 else if (first_insn == insn)
2795 struct sequence_stack *stack = seq_stack;
2796 /* Scan all pending sequences too. */
2797 for (; stack; stack = stack->next)
2798 if (insn == stack->first)
2800 stack->first = next;
2810 PREV_INSN (next) = prev;
2811 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2812 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2814 else if (last_insn == insn)
2818 struct sequence_stack *stack = seq_stack;
2819 /* Scan all pending sequences too. */
2820 for (; stack; stack = stack->next)
2821 if (insn == stack->last)
2832 /* Delete all insns made since FROM.
2833 FROM becomes the new last instruction. */
2836 delete_insns_since (from)
2842 NEXT_INSN (from) = 0;
2846 /* This function is deprecated, please use sequences instead.
2848 Move a consecutive bunch of insns to a different place in the chain.
2849 The insns to be moved are those between FROM and TO.
2850 They are moved to a new position after the insn AFTER.
2851 AFTER must not be FROM or TO or any insn in between.
2853 This function does not know about SEQUENCEs and hence should not be
2854 called after delay-slot filling has been done. */
2857 reorder_insns (from, to, after)
2858 rtx from, to, after;
2860 /* Splice this bunch out of where it is now. */
2861 if (PREV_INSN (from))
2862 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2864 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2865 if (last_insn == to)
2866 last_insn = PREV_INSN (from);
2867 if (first_insn == from)
2868 first_insn = NEXT_INSN (to);
2870 /* Make the new neighbors point to it and it to them. */
2871 if (NEXT_INSN (after))
2872 PREV_INSN (NEXT_INSN (after)) = to;
2874 NEXT_INSN (to) = NEXT_INSN (after);
2875 PREV_INSN (from) = after;
2876 NEXT_INSN (after) = from;
2877 if (after == last_insn)
2881 /* Return the line note insn preceding INSN. */
2884 find_line_note (insn)
2887 if (no_line_numbers)
2890 for (; insn; insn = PREV_INSN (insn))
2891 if (GET_CODE (insn) == NOTE
2892 && NOTE_LINE_NUMBER (insn) >= 0)
2898 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2899 of the moved insns when debugging. This may insert a note between AFTER
2900 and FROM, and another one after TO. */
2903 reorder_insns_with_line_notes (from, to, after)
2904 rtx from, to, after;
2906 rtx from_line = find_line_note (from);
2907 rtx after_line = find_line_note (after);
2909 reorder_insns (from, to, after);
2911 if (from_line == after_line)
2915 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2916 NOTE_LINE_NUMBER (from_line),
2919 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2920 NOTE_LINE_NUMBER (after_line),
2924 /* Remove unnecessary notes from the instruction stream. */
2927 remove_unnecessary_notes ()
2929 rtx block_stack = NULL_RTX;
2930 rtx eh_stack = NULL_RTX;
2935 /* We must not remove the first instruction in the function because
2936 the compiler depends on the first instruction being a note. */
2937 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2939 /* Remember what's next. */
2940 next = NEXT_INSN (insn);
2942 /* We're only interested in notes. */
2943 if (GET_CODE (insn) != NOTE)
2946 switch (NOTE_LINE_NUMBER (insn))
2948 case NOTE_INSN_DELETED:
2952 case NOTE_INSN_EH_REGION_BEG:
2953 eh_stack = alloc_INSN_LIST (insn, eh_stack);
2956 case NOTE_INSN_EH_REGION_END:
2957 /* Too many end notes. */
2958 if (eh_stack == NULL_RTX)
2960 /* Mismatched nesting. */
2961 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
2964 eh_stack = XEXP (eh_stack, 1);
2965 free_INSN_LIST_node (tmp);
2968 case NOTE_INSN_BLOCK_BEG:
2969 /* By now, all notes indicating lexical blocks should have
2970 NOTE_BLOCK filled in. */
2971 if (NOTE_BLOCK (insn) == NULL_TREE)
2973 block_stack = alloc_INSN_LIST (insn, block_stack);
2976 case NOTE_INSN_BLOCK_END:
2977 /* Too many end notes. */
2978 if (block_stack == NULL_RTX)
2980 /* Mismatched nesting. */
2981 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
2984 block_stack = XEXP (block_stack, 1);
2985 free_INSN_LIST_node (tmp);
2987 /* Scan back to see if there are any non-note instructions
2988 between INSN and the beginning of this block. If not,
2989 then there is no PC range in the generated code that will
2990 actually be in this block, so there's no point in
2991 remembering the existence of the block. */
2992 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
2994 /* This block contains a real instruction. Note that we
2995 don't include labels; if the only thing in the block
2996 is a label, then there are still no PC values that
2997 lie within the block. */
3001 /* We're only interested in NOTEs. */
3002 if (GET_CODE (tmp) != NOTE)
3005 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3007 /* We just verified that this BLOCK matches us with
3008 the block_stack check above. Never delete the
3009 BLOCK for the outermost scope of the function; we
3010 can refer to names from that scope even if the
3011 block notes are messed up. */
3012 if (! is_body_block (NOTE_BLOCK (insn))
3013 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3020 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3021 /* There's a nested block. We need to leave the
3022 current block in place since otherwise the debugger
3023 wouldn't be able to show symbols from our block in
3024 the nested block. */
3030 /* Too many begin notes. */
3031 if (block_stack || eh_stack)
3036 /* Emit an insn of given code and pattern
3037 at a specified place within the doubly-linked list. */
3039 /* Make an instruction with body PATTERN
3040 and output it before the instruction BEFORE. */
3043 emit_insn_before (pattern, before)
3044 register rtx pattern, before;
3046 register rtx insn = before;
3048 if (GET_CODE (pattern) == SEQUENCE)
3052 for (i = 0; i < XVECLEN (pattern, 0); i++)
3054 insn = XVECEXP (pattern, 0, i);
3055 add_insn_before (insn, before);
3060 insn = make_insn_raw (pattern);
3061 add_insn_before (insn, before);
3067 /* Similar to emit_insn_before, but update basic block boundaries as well. */
3070 emit_block_insn_before (pattern, before, block)
3071 rtx pattern, before;
3074 rtx prev = PREV_INSN (before);
3075 rtx r = emit_insn_before (pattern, before);
3076 if (block && block->head == before)
3077 block->head = NEXT_INSN (prev);
3081 /* Make an instruction with body PATTERN and code JUMP_INSN
3082 and output it before the instruction BEFORE. */
3085 emit_jump_insn_before (pattern, before)
3086 register rtx pattern, before;
3090 if (GET_CODE (pattern) == SEQUENCE)
3091 insn = emit_insn_before (pattern, before);
3094 insn = make_jump_insn_raw (pattern);
3095 add_insn_before (insn, before);
3101 /* Make an instruction with body PATTERN and code CALL_INSN
3102 and output it before the instruction BEFORE. */
3105 emit_call_insn_before (pattern, before)
3106 register rtx pattern, before;
3110 if (GET_CODE (pattern) == SEQUENCE)
3111 insn = emit_insn_before (pattern, before);
3114 insn = make_call_insn_raw (pattern);
3115 add_insn_before (insn, before);
3116 PUT_CODE (insn, CALL_INSN);
3122 /* Make an insn of code BARRIER
3123 and output it before the insn BEFORE. */
3126 emit_barrier_before (before)
3127 register rtx before;
3129 register rtx insn = rtx_alloc (BARRIER);
3131 INSN_UID (insn) = cur_insn_uid++;
3133 add_insn_before (insn, before);
3137 /* Emit the label LABEL before the insn BEFORE. */
3140 emit_label_before (label, before)
3143 /* This can be called twice for the same label as a result of the
3144 confusion that follows a syntax error! So make it harmless. */
3145 if (INSN_UID (label) == 0)
3147 INSN_UID (label) = cur_insn_uid++;
3148 add_insn_before (label, before);
3154 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3157 emit_note_before (subtype, before)
3161 register rtx note = rtx_alloc (NOTE);
3162 INSN_UID (note) = cur_insn_uid++;
3163 NOTE_SOURCE_FILE (note) = 0;
3164 NOTE_LINE_NUMBER (note) = subtype;
3166 add_insn_before (note, before);
3170 /* Make an insn of code INSN with body PATTERN
3171 and output it after the insn AFTER. */
3174 emit_insn_after (pattern, after)
3175 register rtx pattern, after;
3177 register rtx insn = after;
3179 if (GET_CODE (pattern) == SEQUENCE)
3183 for (i = 0; i < XVECLEN (pattern, 0); i++)
3185 insn = XVECEXP (pattern, 0, i);
3186 add_insn_after (insn, after);
3192 insn = make_insn_raw (pattern);
3193 add_insn_after (insn, after);
3199 /* Similar to emit_insn_after, except that line notes are to be inserted so
3200 as to act as if this insn were at FROM. */
3203 emit_insn_after_with_line_notes (pattern, after, from)
3204 rtx pattern, after, from;
3206 rtx from_line = find_line_note (from);
3207 rtx after_line = find_line_note (after);
3208 rtx insn = emit_insn_after (pattern, after);
3211 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3212 NOTE_LINE_NUMBER (from_line),
3216 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3217 NOTE_LINE_NUMBER (after_line),
3221 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3224 emit_block_insn_after (pattern, after, block)
3228 rtx r = emit_insn_after (pattern, after);
3229 if (block && block->end == after)
3234 /* Make an insn of code JUMP_INSN with body PATTERN
3235 and output it after the insn AFTER. */
3238 emit_jump_insn_after (pattern, after)
3239 register rtx pattern, after;
3243 if (GET_CODE (pattern) == SEQUENCE)
3244 insn = emit_insn_after (pattern, after);
3247 insn = make_jump_insn_raw (pattern);
3248 add_insn_after (insn, after);
3254 /* Make an insn of code BARRIER
3255 and output it after the insn AFTER. */
3258 emit_barrier_after (after)
3261 register rtx insn = rtx_alloc (BARRIER);
3263 INSN_UID (insn) = cur_insn_uid++;
3265 add_insn_after (insn, after);
3269 /* Emit the label LABEL after the insn AFTER. */
3272 emit_label_after (label, after)
3275 /* This can be called twice for the same label
3276 as a result of the confusion that follows a syntax error!
3277 So make it harmless. */
3278 if (INSN_UID (label) == 0)
3280 INSN_UID (label) = cur_insn_uid++;
3281 add_insn_after (label, after);
3287 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3290 emit_note_after (subtype, after)
3294 register rtx note = rtx_alloc (NOTE);
3295 INSN_UID (note) = cur_insn_uid++;
3296 NOTE_SOURCE_FILE (note) = 0;
3297 NOTE_LINE_NUMBER (note) = subtype;
3298 add_insn_after (note, after);
3302 /* Emit a line note for FILE and LINE after the insn AFTER. */
3305 emit_line_note_after (file, line, after)
3312 if (no_line_numbers && line > 0)
3318 note = rtx_alloc (NOTE);
3319 INSN_UID (note) = cur_insn_uid++;
3320 NOTE_SOURCE_FILE (note) = file;
3321 NOTE_LINE_NUMBER (note) = line;
3322 add_insn_after (note, after);
3326 /* Make an insn of code INSN with pattern PATTERN
3327 and add it to the end of the doubly-linked list.
3328 If PATTERN is a SEQUENCE, take the elements of it
3329 and emit an insn for each element.
3331 Returns the last insn emitted. */
3337 rtx insn = last_insn;
3339 if (GET_CODE (pattern) == SEQUENCE)
3343 for (i = 0; i < XVECLEN (pattern, 0); i++)
3345 insn = XVECEXP (pattern, 0, i);
3351 insn = make_insn_raw (pattern);
3358 /* Emit the insns in a chain starting with INSN.
3359 Return the last insn emitted. */
3369 rtx next = NEXT_INSN (insn);
3378 /* Emit the insns in a chain starting with INSN and place them in front of
3379 the insn BEFORE. Return the last insn emitted. */
3382 emit_insns_before (insn, before)
3390 rtx next = NEXT_INSN (insn);
3391 add_insn_before (insn, before);
3399 /* Emit the insns in a chain starting with FIRST and place them in back of
3400 the insn AFTER. Return the last insn emitted. */
3403 emit_insns_after (first, after)
3408 register rtx after_after;
3416 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3419 after_after = NEXT_INSN (after);
3421 NEXT_INSN (after) = first;
3422 PREV_INSN (first) = after;
3423 NEXT_INSN (last) = after_after;
3425 PREV_INSN (after_after) = last;
3427 if (after == last_insn)
3432 /* Make an insn of code JUMP_INSN with pattern PATTERN
3433 and add it to the end of the doubly-linked list. */
3436 emit_jump_insn (pattern)
3439 if (GET_CODE (pattern) == SEQUENCE)
3440 return emit_insn (pattern);
3443 register rtx insn = make_jump_insn_raw (pattern);
3449 /* Make an insn of code CALL_INSN with pattern PATTERN
3450 and add it to the end of the doubly-linked list. */
3453 emit_call_insn (pattern)
3456 if (GET_CODE (pattern) == SEQUENCE)
3457 return emit_insn (pattern);
3460 register rtx insn = make_call_insn_raw (pattern);
3462 PUT_CODE (insn, CALL_INSN);
3467 /* Add the label LABEL to the end of the doubly-linked list. */
3473 /* This can be called twice for the same label
3474 as a result of the confusion that follows a syntax error!
3475 So make it harmless. */
3476 if (INSN_UID (label) == 0)
3478 INSN_UID (label) = cur_insn_uid++;
3484 /* Make an insn of code BARRIER
3485 and add it to the end of the doubly-linked list. */
3490 register rtx barrier = rtx_alloc (BARRIER);
3491 INSN_UID (barrier) = cur_insn_uid++;
3496 /* Make an insn of code NOTE
3497 with data-fields specified by FILE and LINE
3498 and add it to the end of the doubly-linked list,
3499 but only if line-numbers are desired for debugging info. */
3502 emit_line_note (file, line)
3506 set_file_and_line_for_stmt (file, line);
3509 if (no_line_numbers)
3513 return emit_note (file, line);
3516 /* Make an insn of code NOTE
3517 with data-fields specified by FILE and LINE
3518 and add it to the end of the doubly-linked list.
3519 If it is a line-number NOTE, omit it if it matches the previous one. */
3522 emit_note (file, line)
3530 if (file && last_filename && !strcmp (file, last_filename)
3531 && line == last_linenum)
3533 last_filename = file;
3534 last_linenum = line;
3537 if (no_line_numbers && line > 0)
3543 note = rtx_alloc (NOTE);
3544 INSN_UID (note) = cur_insn_uid++;
3545 NOTE_SOURCE_FILE (note) = file;
3546 NOTE_LINE_NUMBER (note) = line;
3551 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3554 emit_line_note_force (file, line)
3559 return emit_line_note (file, line);
3562 /* Cause next statement to emit a line note even if the line number
3563 has not changed. This is used at the beginning of a function. */
3566 force_next_line_note ()
3571 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3572 note of this type already exists, remove it first. */
3575 set_unique_reg_note (insn, kind, datum)
3580 rtx note = find_reg_note (insn, kind, NULL_RTX);
3582 /* First remove the note if there already is one. */
3584 remove_note (insn, note);
3586 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3589 /* Return an indication of which type of insn should have X as a body.
3590 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3596 if (GET_CODE (x) == CODE_LABEL)
3598 if (GET_CODE (x) == CALL)
3600 if (GET_CODE (x) == RETURN)
3602 if (GET_CODE (x) == SET)
3604 if (SET_DEST (x) == pc_rtx)
3606 else if (GET_CODE (SET_SRC (x)) == CALL)
3611 if (GET_CODE (x) == PARALLEL)
3614 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3615 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3617 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3618 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3620 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3621 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3627 /* Emit the rtl pattern X as an appropriate kind of insn.
3628 If X is a label, it is simply added into the insn chain. */
3634 enum rtx_code code = classify_insn (x);
3636 if (code == CODE_LABEL)
3637 return emit_label (x);
3638 else if (code == INSN)
3639 return emit_insn (x);
3640 else if (code == JUMP_INSN)
3642 register rtx insn = emit_jump_insn (x);
3643 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3644 return emit_barrier ();
3647 else if (code == CALL_INSN)
3648 return emit_call_insn (x);
3653 /* Begin emitting insns to a sequence which can be packaged in an
3654 RTL_EXPR. If this sequence will contain something that might cause
3655 the compiler to pop arguments to function calls (because those
3656 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3657 details), use do_pending_stack_adjust before calling this function.
3658 That will ensure that the deferred pops are not accidentally
3659 emitted in the middle of this sequence. */
3664 struct sequence_stack *tem;
3666 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3668 tem->next = seq_stack;
3669 tem->first = first_insn;
3670 tem->last = last_insn;
3671 tem->sequence_rtl_expr = seq_rtl_expr;
3679 /* Similarly, but indicate that this sequence will be placed in T, an
3680 RTL_EXPR. See the documentation for start_sequence for more
3681 information about how to use this function. */
3684 start_sequence_for_rtl_expr (t)
3692 /* Set up the insn chain starting with FIRST as the current sequence,
3693 saving the previously current one. See the documentation for
3694 start_sequence for more information about how to use this function. */
3697 push_to_sequence (first)
3704 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3710 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3713 push_to_full_sequence (first, last)
3719 /* We really should have the end of the insn chain here. */
3720 if (last && NEXT_INSN (last))
3724 /* Set up the outer-level insn chain
3725 as the current sequence, saving the previously current one. */
3728 push_topmost_sequence ()
3730 struct sequence_stack *stack, *top = NULL;
3734 for (stack = seq_stack; stack; stack = stack->next)
3737 first_insn = top->first;
3738 last_insn = top->last;
3739 seq_rtl_expr = top->sequence_rtl_expr;
3742 /* After emitting to the outer-level insn chain, update the outer-level
3743 insn chain, and restore the previous saved state. */
3746 pop_topmost_sequence ()
3748 struct sequence_stack *stack, *top = NULL;
3750 for (stack = seq_stack; stack; stack = stack->next)
3753 top->first = first_insn;
3754 top->last = last_insn;
3755 /* ??? Why don't we save seq_rtl_expr here? */
3760 /* After emitting to a sequence, restore previous saved state.
3762 To get the contents of the sequence just made, you must call
3763 `gen_sequence' *before* calling here.
3765 If the compiler might have deferred popping arguments while
3766 generating this sequence, and this sequence will not be immediately
3767 inserted into the instruction stream, use do_pending_stack_adjust
3768 before calling gen_sequence. That will ensure that the deferred
3769 pops are inserted into this sequence, and not into some random
3770 location in the instruction stream. See INHIBIT_DEFER_POP for more
3771 information about deferred popping of arguments. */
3776 struct sequence_stack *tem = seq_stack;
3778 first_insn = tem->first;
3779 last_insn = tem->last;
3780 seq_rtl_expr = tem->sequence_rtl_expr;
3781 seq_stack = tem->next;
3786 /* This works like end_sequence, but records the old sequence in FIRST
3790 end_full_sequence (first, last)
3793 *first = first_insn;
3798 /* Return 1 if currently emitting into a sequence. */
3803 return seq_stack != 0;
3806 /* Generate a SEQUENCE rtx containing the insns already emitted
3807 to the current sequence.
3809 This is how the gen_... function from a DEFINE_EXPAND
3810 constructs the SEQUENCE that it returns. */
3820 /* Count the insns in the chain. */
3822 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3825 /* If only one insn, return it rather than a SEQUENCE.
3826 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3827 the case of an empty list.)
3828 We only return the pattern of an insn if its code is INSN and it
3829 has no notes. This ensures that no information gets lost. */
3831 && ! RTX_FRAME_RELATED_P (first_insn)
3832 && GET_CODE (first_insn) == INSN
3833 /* Don't throw away any reg notes. */
3834 && REG_NOTES (first_insn) == 0)
3835 return PATTERN (first_insn);
3837 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3839 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3840 XVECEXP (result, 0, i) = tem;
3845 /* Put the various virtual registers into REGNO_REG_RTX. */
3848 init_virtual_regs (es)
3849 struct emit_status *es;
3851 rtx *ptr = es->x_regno_reg_rtx;
3852 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3853 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3854 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3855 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3856 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3860 clear_emit_caches ()
3864 /* Clear the start_sequence/gen_sequence cache. */
3865 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3866 sequence_result[i] = 0;
3870 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3871 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3872 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3873 static int copy_insn_n_scratches;
3875 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3876 copied an ASM_OPERANDS.
3877 In that case, it is the original input-operand vector. */
3878 static rtvec orig_asm_operands_vector;
3880 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3881 copied an ASM_OPERANDS.
3882 In that case, it is the copied input-operand vector. */
3883 static rtvec copy_asm_operands_vector;
3885 /* Likewise for the constraints vector. */
3886 static rtvec orig_asm_constraints_vector;
3887 static rtvec copy_asm_constraints_vector;
3889 /* Recursively create a new copy of an rtx for copy_insn.
3890 This function differs from copy_rtx in that it handles SCRATCHes and
3891 ASM_OPERANDs properly.
3892 Normally, this function is not used directly; use copy_insn as front end.
3893 However, you could first copy an insn pattern with copy_insn and then use
3894 this function afterwards to properly copy any REG_NOTEs containing
3903 register RTX_CODE code;
3904 register const char *format_ptr;
3906 code = GET_CODE (orig);
3922 for (i = 0; i < copy_insn_n_scratches; i++)
3923 if (copy_insn_scratch_in[i] == orig)
3924 return copy_insn_scratch_out[i];
3928 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3929 a LABEL_REF, it isn't sharable. */
3930 if (GET_CODE (XEXP (orig, 0)) == PLUS
3931 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3932 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3936 /* A MEM with a constant address is not sharable. The problem is that
3937 the constant address may need to be reloaded. If the mem is shared,
3938 then reloading one copy of this mem will cause all copies to appear
3939 to have been reloaded. */
3945 copy = rtx_alloc (code);
3947 /* Copy the various flags, and other information. We assume that
3948 all fields need copying, and then clear the fields that should
3949 not be copied. That is the sensible default behavior, and forces
3950 us to explicitly document why we are *not* copying a flag. */
3951 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3953 /* We do not copy the USED flag, which is used as a mark bit during
3954 walks over the RTL. */
3957 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3958 if (GET_RTX_CLASS (code) == 'i')
3962 copy->frame_related = 0;
3965 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3967 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3969 copy->fld[i] = orig->fld[i];
3970 switch (*format_ptr++)
3973 if (XEXP (orig, i) != NULL)
3974 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3979 if (XVEC (orig, i) == orig_asm_constraints_vector)
3980 XVEC (copy, i) = copy_asm_constraints_vector;
3981 else if (XVEC (orig, i) == orig_asm_operands_vector)
3982 XVEC (copy, i) = copy_asm_operands_vector;
3983 else if (XVEC (orig, i) != NULL)
3985 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3986 for (j = 0; j < XVECLEN (copy, i); j++)
3987 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3998 /* These are left unchanged. */
4006 if (code == SCRATCH)
4008 i = copy_insn_n_scratches++;
4009 if (i >= MAX_RECOG_OPERANDS)
4011 copy_insn_scratch_in[i] = orig;
4012 copy_insn_scratch_out[i] = copy;
4014 else if (code == ASM_OPERANDS)
4016 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4017 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4018 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4019 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4025 /* Create a new copy of an rtx.
4026 This function differs from copy_rtx in that it handles SCRATCHes and
4027 ASM_OPERANDs properly.
4028 INSN doesn't really have to be a full INSN; it could be just the
4034 copy_insn_n_scratches = 0;
4035 orig_asm_operands_vector = 0;
4036 orig_asm_constraints_vector = 0;
4037 copy_asm_operands_vector = 0;
4038 copy_asm_constraints_vector = 0;
4039 return copy_insn_1 (insn);
4042 /* Initialize data structures and variables in this file
4043 before generating rtl for each function. */
4048 struct function *f = cfun;
4050 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4053 seq_rtl_expr = NULL;
4055 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4058 first_label_num = label_num;
4062 clear_emit_caches ();
4064 /* Init the tables that describe all the pseudo regs. */
4066 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4068 f->emit->regno_pointer_align
4069 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4070 sizeof (unsigned char));
4073 = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
4076 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4077 init_virtual_regs (f->emit);
4079 /* Indicate that the virtual registers and stack locations are
4081 REG_POINTER (stack_pointer_rtx) = 1;
4082 REG_POINTER (frame_pointer_rtx) = 1;
4083 REG_POINTER (hard_frame_pointer_rtx) = 1;
4084 REG_POINTER (arg_pointer_rtx) = 1;
4086 REG_POINTER (virtual_incoming_args_rtx) = 1;
4087 REG_POINTER (virtual_stack_vars_rtx) = 1;
4088 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4089 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4090 REG_POINTER (virtual_cfa_rtx) = 1;
4092 #ifdef STACK_BOUNDARY
4093 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4094 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4095 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4096 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4098 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4099 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4100 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4101 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4102 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4105 #ifdef INIT_EXPANDERS
4110 /* Mark SS for GC. */
4113 mark_sequence_stack (ss)
4114 struct sequence_stack *ss;
4118 ggc_mark_rtx (ss->first);
4119 ggc_mark_tree (ss->sequence_rtl_expr);
4124 /* Mark ES for GC. */
4127 mark_emit_status (es)
4128 struct emit_status *es;
4136 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
4140 mark_sequence_stack (es->sequence_stack);
4141 ggc_mark_tree (es->sequence_rtl_expr);
4142 ggc_mark_rtx (es->x_first_insn);
4145 /* Create some permanent unique rtl objects shared between all functions.
4146 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4149 init_emit_once (line_numbers)
4153 enum machine_mode mode;
4154 enum machine_mode double_mode;
4156 /* Initialize the CONST_INT hash table. */
4157 const_int_htab = htab_create (37, const_int_htab_hash,
4158 const_int_htab_eq, NULL);
4159 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4162 no_line_numbers = ! line_numbers;
4164 /* Compute the word and byte modes. */
4166 byte_mode = VOIDmode;
4167 word_mode = VOIDmode;
4168 double_mode = VOIDmode;
4170 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4171 mode = GET_MODE_WIDER_MODE (mode))
4173 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4174 && byte_mode == VOIDmode)
4177 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4178 && word_mode == VOIDmode)
4182 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4183 mode = GET_MODE_WIDER_MODE (mode))
4185 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4186 && double_mode == VOIDmode)
4190 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4192 /* Assign register numbers to the globally defined register rtx.
4193 This must be done at runtime because the register number field
4194 is in a union and some compilers can't initialize unions. */
4196 pc_rtx = gen_rtx (PC, VOIDmode);
4197 cc0_rtx = gen_rtx (CC0, VOIDmode);
4198 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4199 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4200 if (hard_frame_pointer_rtx == 0)
4201 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4202 HARD_FRAME_POINTER_REGNUM);
4203 if (arg_pointer_rtx == 0)
4204 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4205 virtual_incoming_args_rtx =
4206 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4207 virtual_stack_vars_rtx =
4208 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4209 virtual_stack_dynamic_rtx =
4210 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4211 virtual_outgoing_args_rtx =
4212 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4213 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4215 /* These rtx must be roots if GC is enabled. */
4216 ggc_add_rtx_root (global_rtl, GR_MAX);
4218 #ifdef INIT_EXPANDERS
4219 /* This is to initialize {init|mark|free}_machine_status before the first
4220 call to push_function_context_to. This is needed by the Chill front
4221 end which calls push_function_context_to before the first cal to
4222 init_function_start. */
4226 /* Create the unique rtx's for certain rtx codes and operand values. */
4228 /* Don't use gen_rtx here since gen_rtx in this case
4229 tries to use these variables. */
4230 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4231 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4232 gen_rtx_raw_CONST_INT (VOIDmode, i);
4233 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4235 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4236 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4237 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4239 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4241 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4242 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4243 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4244 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4246 for (i = 0; i <= 2; i++)
4248 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4249 mode = GET_MODE_WIDER_MODE (mode))
4251 rtx tem = rtx_alloc (CONST_DOUBLE);
4252 union real_extract u;
4254 /* Zero any holes in a structure. */
4255 memset ((char *) &u, 0, sizeof u);
4256 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4258 /* Avoid trailing garbage in the rtx. */
4259 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4260 CONST_DOUBLE_LOW (tem) = 0;
4261 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4262 CONST_DOUBLE_HIGH (tem) = 0;
4264 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4265 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4266 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4267 PUT_MODE (tem, mode);
4269 const_tiny_rtx[i][(int) mode] = tem;
4272 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4274 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4275 mode = GET_MODE_WIDER_MODE (mode))
4276 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4278 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4280 mode = GET_MODE_WIDER_MODE (mode))
4281 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4284 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4285 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4286 const_tiny_rtx[0][i] = const0_rtx;
4288 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4289 if (STORE_FLAG_VALUE == 1)
4290 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4292 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4293 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4294 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4295 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4296 ggc_add_rtx_root (&const_true_rtx, 1);
4298 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4299 return_address_pointer_rtx
4300 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4304 struct_value_rtx = STRUCT_VALUE;
4306 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4309 #ifdef STRUCT_VALUE_INCOMING
4310 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4312 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4313 struct_value_incoming_rtx
4314 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4316 struct_value_incoming_rtx = struct_value_rtx;
4320 #ifdef STATIC_CHAIN_REGNUM
4321 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4323 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4324 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4325 static_chain_incoming_rtx
4326 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4329 static_chain_incoming_rtx = static_chain_rtx;
4333 static_chain_rtx = STATIC_CHAIN;
4335 #ifdef STATIC_CHAIN_INCOMING
4336 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4338 static_chain_incoming_rtx = static_chain_rtx;
4342 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4343 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4345 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4346 ggc_add_rtx_root (&struct_value_rtx, 1);
4347 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4348 ggc_add_rtx_root (&static_chain_rtx, 1);
4349 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4350 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4353 /* Query and clear/ restore no_line_numbers. This is used by the
4354 switch / case handling in stmt.c to give proper line numbers in
4355 warnings about unreachable code. */
4358 force_line_numbers ()
4360 int old = no_line_numbers;
4362 no_line_numbers = 0;
4364 force_next_line_note ();
4369 restore_line_number_status (old_value)
4372 no_line_numbers = old_value;