1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains the functions `gen_rtx', `gen_reg_rtx'
24 and `gen_label_rtx' that are the usual ways of creating rtl
25 expressions for most purposes.
27 It also has the functions for creating insns and linking
28 them in the doubly-linked chain.
30 The patterns of the insns are created by machine-dependent
31 routines in insn-emit.c, which is generated automatically from
32 the machine description. These routines use `gen_rtx' to make
33 the individual rtx's of the pattern; what is machine dependent
34 is the kind of rtx's they make and what arguments they use. */
44 #include "insn-config.h"
47 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
48 After rtl generation, it is 1 plus the largest register number used. */
50 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
52 /* This is *not* reset after each function. It gives each CODE_LABEL
53 in the entire compilation a unique label number. */
55 static int label_num = 1;
57 /* Lowest label number in current function. */
59 static int first_label_num;
61 /* Highest label number in current function.
62 Zero means use the value of label_num instead.
63 This is nonzero only when belatedly compiling an inline function. */
65 static int last_label_num;
67 /* Value label_num had when set_new_first_and_last_label_number was called.
68 If label_num has not changed since then, last_label_num is valid. */
70 static int base_label_num;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these except perhaps the floating-point CONST_DOUBLEs
79 are unique; no other rtx-object will be equal to any of these. */
81 rtx pc_rtx; /* (PC) */
82 rtx cc0_rtx; /* (CC0) */
83 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
84 rtx const0_rtx; /* (CONST_INT 0) */
85 rtx const1_rtx; /* (CONST_INT 1) */
86 rtx const2_rtx; /* (CONST_INT 2) */
87 rtx constm1_rtx; /* (CONST_INT -1) */
88 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
96 REAL_VALUE_TYPE dconst0;
97 REAL_VALUE_TYPE dconst1;
98 REAL_VALUE_TYPE dconst2;
99 REAL_VALUE_TYPE dconstm1;
101 /* All references to the following fixed hard registers go through
102 these unique rtl objects. On machines where the frame-pointer and
103 arg-pointer are the same register, they use the same unique object.
105 After register allocation, other rtl objects which used to be pseudo-regs
106 may be clobbered to refer to the frame-pointer register.
107 But references that were originally to the frame-pointer can be
108 distinguished from the others because they contain frame_pointer_rtx.
110 In an inline procedure, the stack and frame pointer rtxs may not be
111 used for anything else. */
112 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
113 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
114 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
115 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
116 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
117 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
118 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
119 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
121 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
122 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
123 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
124 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
126 /* We make one copy of (const_int C) where C is in
127 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
128 to save space during the compilation and simplify comparisons of
131 #define MAX_SAVED_CONST_INT 64
133 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
135 /* The ends of the doubly-linked chain of rtl for the current function.
136 Both are reset to null at the start of rtl generation for the function.
138 start_sequence saves both of these on `sequence_stack' and then
139 starts a new, nested sequence of insns. */
141 static rtx first_insn = NULL;
142 static rtx last_insn = NULL;
144 /* INSN_UID for next insn emitted.
145 Reset to 1 for each function compiled. */
147 static int cur_insn_uid = 1;
149 /* Line number and source file of the last line-number NOTE emitted.
150 This is used to avoid generating duplicates. */
152 static int last_linenum = 0;
153 static char *last_filename = 0;
155 /* A vector indexed by pseudo reg number. The allocated length
156 of this vector is regno_pointer_flag_length. Since this
157 vector is needed during the expansion phase when the total
158 number of registers in the function is not yet known,
159 it is copied and made bigger when necessary. */
161 char *regno_pointer_flag;
162 int regno_pointer_flag_length;
164 /* Indexed by pseudo register number, gives the rtx for that pseudo.
165 Allocated in parallel with regno_pointer_flag. */
169 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
170 Each element describes one pending sequence.
171 The main insn-chain is saved in the last element of the chain,
172 unless the chain is empty. */
174 struct sequence_stack *sequence_stack;
176 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
177 shortly thrown away. We use two mechanisms to prevent this waste:
179 First, we keep a list of the expressions used to represent the sequence
180 stack in sequence_element_free_list.
182 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
183 rtvec for use by gen_sequence. One entry for each size is sufficient
184 because most cases are calls to gen_sequence followed by immediately
185 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
186 destructive on the insn in it anyway and hence can't be redone.
188 We do not bother to save this cached data over nested function calls.
189 Instead, we just reinitialize them. */
191 #define SEQUENCE_RESULT_SIZE 5
193 static struct sequence_stack *sequence_element_free_list;
194 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
196 extern int rtx_equal_function_value_matters;
198 /* Filename and line number of last line-number note,
199 whether we actually emitted it or not. */
200 extern char *emit_filename;
201 extern int emit_lineno;
203 rtx change_address ();
206 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
208 ** This routine generates an RTX of the size specified by
209 ** <code>, which is an RTX code. The RTX structure is initialized
210 ** from the arguments <element1> through <elementn>, which are
211 ** interpreted according to the specific RTX type's format. The
212 ** special machine mode associated with the rtx (if any) is specified
215 ** gen_rtx() can be invoked in a way which resembles the lisp-like
216 ** rtx it will generate. For example, the following rtx structure:
218 ** (plus:QI (mem:QI (reg:SI 1))
219 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
221 ** ...would be generated by the following C code:
223 ** gen_rtx (PLUS, QImode,
224 ** gen_rtx (MEM, QImode,
225 ** gen_rtx (REG, SImode, 1)),
226 ** gen_rtx (MEM, QImode,
227 ** gen_rtx (PLUS, SImode,
228 ** gen_rtx (REG, SImode, 2),
229 ** gen_rtx (REG, SImode, 3)))),
239 enum machine_mode mode;
240 register int i; /* Array indices... */
241 register char *fmt; /* Current rtx's format... */
242 register rtx rt_val; /* RTX to return to caller... */
245 code = va_arg (p, enum rtx_code);
246 mode = va_arg (p, enum machine_mode);
248 if (code == CONST_INT)
250 int arg = va_arg (p, int);
252 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
253 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
255 if (const_true_rtx && arg == STORE_FLAG_VALUE)
256 return const_true_rtx;
258 rt_val = rtx_alloc (code);
259 INTVAL (rt_val) = arg;
261 else if (code == REG)
263 int regno = va_arg (p, int);
265 /* In case the MD file explicitly references the frame pointer, have
266 all such references point to the same frame pointer. This is used
267 during frame pointer elimination to distinguish the explicit
268 references to these registers from pseudos that happened to be
271 If we have eliminated the frame pointer or arg pointer, we will
272 be using it as a normal register, for example as a spill register.
273 In such cases, we might be accessing it in a mode that is not
274 Pmode and therefore cannot use the pre-allocated rtx. */
276 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode)
277 return frame_pointer_rtx;
278 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
279 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode)
280 return arg_pointer_rtx;
282 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode)
283 return stack_pointer_rtx;
286 rt_val = rtx_alloc (code);
288 REGNO (rt_val) = regno;
294 rt_val = rtx_alloc (code); /* Allocate the storage space. */
295 rt_val->mode = mode; /* Store the machine mode... */
297 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
298 for (i = 0; i < GET_RTX_LENGTH (code); i++)
302 case '0': /* Unused field. */
305 case 'i': /* An integer? */
306 XINT (rt_val, i) = va_arg (p, int);
309 case 's': /* A string? */
310 XSTR (rt_val, i) = va_arg (p, char *);
313 case 'e': /* An expression? */
314 case 'u': /* An insn? Same except when printing. */
315 XEXP (rt_val, i) = va_arg (p, rtx);
318 case 'E': /* An RTX vector? */
319 XVEC (rt_val, i) = va_arg (p, rtvec);
328 return rt_val; /* Return the new RTX... */
331 /* gen_rtvec (n, [rt1, ..., rtn])
333 ** This routine creates an rtvec and stores within it the
334 ** pointers to rtx's which are its arguments.
350 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
352 vector = (rtx *) alloca (n * sizeof (rtx));
353 for (i = 0; i < n; i++)
354 vector[i] = va_arg (p, rtx);
357 return gen_rtvec_v (n, vector);
361 gen_rtvec_v (n, argp)
366 register rtvec rt_val;
369 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
371 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
373 for (i = 0; i < n; i++)
374 rt_val->elem[i].rtx = *argp++;
379 /* Generate a REG rtx for a new pseudo register of mode MODE.
380 This pseudo is assigned the next sequential register number. */
384 enum machine_mode mode;
388 /* Don't let anything called by or after reload create new registers
389 (actually, registers can't be created after flow, but this is a good
392 if (reload_in_progress || reload_completed)
395 /* Make sure regno_pointer_flag and regno_reg_rtx are large
396 enough to have an element for this pseudo reg number. */
398 if (reg_rtx_no == regno_pointer_flag_length)
402 (char *) oballoc (regno_pointer_flag_length * 2);
403 bzero (new, regno_pointer_flag_length * 2);
404 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
405 regno_pointer_flag = new;
407 new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx));
408 bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx));
409 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
410 regno_reg_rtx = new1;
412 regno_pointer_flag_length *= 2;
415 val = gen_rtx (REG, mode, reg_rtx_no);
416 regno_reg_rtx[reg_rtx_no++] = val;
420 /* Identify REG as a probable pointer register. */
423 mark_reg_pointer (reg)
426 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
429 /* Return 1 plus largest pseudo reg number used in the current function. */
437 /* Return 1 + the largest label number used so far in the current function. */
442 if (last_label_num && label_num == base_label_num)
443 return last_label_num;
447 /* Return first label number used in this function (if any were used). */
450 get_first_label_num ()
452 return first_label_num;
455 /* Return a value representing some low-order bits of X, where the number
456 of low-order bits is given by MODE. Note that no conversion is done
457 between floating-point and fixed-point values, rather, the bit
458 representation is returned.
460 This function handles the cases in common between gen_lowpart, below,
461 and two variants in cse.c and combine.c. These are the cases that can
462 be safely handled at all points in the compilation.
464 If this is not a case we can handle, return 0. */
467 gen_lowpart_common (mode, x)
468 enum machine_mode mode;
473 if (GET_MODE (x) == mode)
476 /* MODE must occupy no more words than the mode of X. */
477 if (GET_MODE (x) != VOIDmode
478 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
479 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
483 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
484 word = ((GET_MODE_SIZE (GET_MODE (x))
485 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
488 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
489 && GET_MODE_CLASS (mode) == MODE_INT)
491 /* If we are getting the low-order part of something that has been
492 sign- or zero-extended, we can either just use the object being
493 extended or make a narrower extension. If we want an even smaller
494 piece than the size of the object being extended, call ourselves
497 This case is used mostly by combine and cse. */
499 if (GET_MODE (XEXP (x, 0)) == mode)
501 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
502 return gen_lowpart_common (mode, XEXP (x, 0));
503 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
504 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
506 else if (GET_CODE (x) == SUBREG
507 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
508 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
509 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
511 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
512 else if (GET_CODE (x) == REG)
514 /* If the register is not valid for MODE, return 0. If we don't
515 do this, there is no way to fix up the resulting REG later. */
516 if (REGNO (x) < FIRST_PSEUDO_REGISTER
517 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode))
519 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
520 /* integrate.c can't handle parts of a return value register. */
521 && (! REG_FUNCTION_VALUE_P (x)
522 || ! rtx_equal_function_value_matters))
523 return gen_rtx (REG, mode, REGNO (x) + word);
525 return gen_rtx (SUBREG, mode, x, word);
528 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
529 from the low-order part of the constant. */
530 else if (GET_MODE_CLASS (mode) == MODE_INT && GET_MODE (x) == VOIDmode
531 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
533 /* If MODE is twice the host word size, X is already the desired
534 representation. Otherwise, if MODE is wider than a word, we can't
535 do this. If MODE is exactly a word, return just one CONST_INT.
536 If MODE is smaller than a word, clear the bits that don't belong
537 in our mode, unless they and our sign bit are all one. So we get
538 either a reasonable negative value or a reasonable unsigned value
541 if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_INT)
543 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_INT)
545 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_INT)
546 return (GET_CODE (x) == CONST_INT ? x
547 : gen_rtx (CONST_INT, VOIDmode, CONST_DOUBLE_LOW (x)));
550 /* MODE must be narrower than HOST_BITS_PER_INT. */
551 int width = GET_MODE_BITSIZE (mode);
552 int val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
553 : CONST_DOUBLE_LOW (x));
555 if (((val & ((-1) << (width - 1))) != ((-1) << (width - 1))))
556 val &= (1 << width) - 1;
558 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
559 : gen_rtx (CONST_INT, VOIDmode, val));
563 /* If X is an integral constant but we want it in floating-point, it
564 must be the case that we have a union of an integer and a floating-point
565 value. If the machine-parameters allow it, simulate that union here
566 and return the result. */
568 else if (HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
569 && HOST_BITS_PER_INT == BITS_PER_WORD
570 && GET_MODE_CLASS (mode) == MODE_FLOAT
571 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
572 && GET_MODE (x) == VOIDmode
573 && sizeof (double) * HOST_BITS_PER_CHAR == 2 * HOST_BITS_PER_INT)
575 union {int i[2]; double d; } u;
578 if (GET_CODE (x) == CONST_INT)
579 low = INTVAL (x), high = low >> (HOST_BITS_PER_INT -1);
581 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
583 #ifdef HOST_WORDS_BIG_ENDIAN
584 u.i[0] = high, u.i[1] = low;
586 u.i[0] = low, u.i[1] = high;
589 return immed_real_const_1 (u.d, mode);
592 /* Similarly, if this is converting a floating-point value into a
593 two-word integer, we can do this one word at a time and make an
594 integer. Only do this is the host and target parameters are
597 else if (HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
598 && HOST_BITS_PER_INT == BITS_PER_WORD
599 && GET_MODE_CLASS (mode) == MODE_INT
600 && GET_CODE (x) == CONST_DOUBLE
601 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
602 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
604 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
605 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
607 if (lowpart && GET_CODE (lowpart) == CONST_INT
608 && highpart && GET_CODE (highpart) == CONST_INT)
609 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
612 /* Otherwise, we can't do this. */
616 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
617 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
618 least-significant part of X.
619 MODE specifies how big a part of X to return;
620 it usually should not be larger than a word.
621 If X is a MEM whose address is a QUEUED, the value may be so also. */
624 gen_lowpart (mode, x)
625 enum machine_mode mode;
628 rtx result = gen_lowpart_common (mode, x);
632 else if (GET_CODE (x) == MEM)
634 /* The only additional case we can do is MEM. */
635 register int offset = 0;
636 if (WORDS_BIG_ENDIAN)
637 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
638 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
640 if (BYTES_BIG_ENDIAN)
641 /* Adjust the address so that the address-after-the-data
643 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
644 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
646 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
652 /* Return 1 iff X, assumed to be a SUBREG,
653 refers to the least significant part of its containing reg.
654 If X is not a SUBREG, always return 1 (it is its own low part!). */
660 if (GET_CODE (x) != SUBREG)
664 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
665 return (SUBREG_WORD (x)
666 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
667 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
670 return SUBREG_WORD (x) == 0;
673 /* Return subword I of operand OP.
674 The word number, I, is interpreted as the word number starting at the
675 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
676 otherwise it is the high-order word.
678 If we cannot extract the required word, we return zero. Otherwise, an
679 rtx corresponding to the requested word will be returned.
681 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
682 reload has completed, a valid address will always be returned. After
683 reload, if a valid address cannot be returned, we return zero.
685 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
686 it is the responsibility of the caller.
688 MODE is the mode of OP in case it is a CONST_INT. */
691 operand_subword (op, i, validate_address, mode)
694 int validate_address;
695 enum machine_mode mode;
698 int size_ratio = HOST_BITS_PER_INT / BITS_PER_WORD;
700 if (mode == VOIDmode)
701 mode = GET_MODE (op);
703 if (mode == VOIDmode)
706 /* If OP is narrower than a word or if we want a word outside OP, fail. */
708 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
709 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
712 /* If OP is already an integer word, return it. */
713 if (GET_MODE_CLASS (mode) == MODE_INT
714 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
717 /* If OP is a REG or SUBREG, we can handle it very simply. */
718 if (GET_CODE (op) == REG)
720 /* If the register is not valid for MODE, return 0. If we don't
721 do this, there is no way to fix up the resulting REG later. */
722 if (REGNO (op) < FIRST_PSEUDO_REGISTER
723 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
725 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
726 || (REG_FUNCTION_VALUE_P (op)
727 && rtx_equal_function_value_matters))
728 return gen_rtx (SUBREG, word_mode, op, i);
730 return gen_rtx (REG, word_mode, REGNO (op) + i);
732 else if (GET_CODE (op) == SUBREG)
733 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
735 /* Form a new MEM at the requested address. */
736 if (GET_CODE (op) == MEM)
738 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
741 if (validate_address)
743 if (reload_completed)
745 if (! strict_memory_address_p (word_mode, addr))
749 addr = memory_address (word_mode, addr);
752 new = gen_rtx (MEM, word_mode, addr);
754 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
755 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
756 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
761 /* The only remaining cases are when OP is a constant. If the host and
762 target floating formats are the same, handling two-word floating
763 constants are easy. */
764 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
765 && HOST_BITS_PER_INT == BITS_PER_WORD)
766 || flag_pretend_float)
767 && GET_MODE_CLASS (mode) == MODE_FLOAT
768 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
769 && GET_CODE (op) == CONST_DOUBLE)
770 return gen_rtx (CONST_INT, VOIDmode,
771 i ^ (WORDS_BIG_ENDIAN !=
772 /* The constant is stored in the host's word-ordering,
773 but we want to access it in the target's word-ordering. */
774 #ifdef HOST_WORDS_BIG_ENDIAN
779 ) ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
781 /* Single word float is a little harder, since single- and double-word
782 values often do not have the same high-order bits. We have already
783 verified that we want the only defined word of the single-word value. */
784 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
785 && HOST_BITS_PER_INT == BITS_PER_WORD)
786 || flag_pretend_float)
787 && GET_MODE_CLASS (mode) == MODE_FLOAT
788 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
789 && GET_CODE (op) == CONST_DOUBLE)
792 union {float f; int i; } u;
794 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
797 return gen_rtx (CONST_INT, VOIDmode, u.i);
800 /* The only remaining cases that we can handle are integers.
801 Convert to proper endianness now since these cases need it.
802 At this point, i == 0 means the low-order word.
804 Note that it must be that BITS_PER_WORD <= HOST_BITS_PER_INT.
805 This is because if it were greater, it could only have been two
806 times greater since we do not support making wider constants. In
807 that case, it MODE would have already been the proper size and
808 it would have been handled above. This means we do not have to
809 worry about the case where we would be returning a CONST_DOUBLE. */
811 if (GET_MODE_CLASS (mode) != MODE_INT
812 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE))
815 if (WORDS_BIG_ENDIAN)
816 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
818 /* Find out which word on the host machine this value is in and get
819 it from the constant. */
820 val = (i / size_ratio == 0
821 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
822 : (GET_CODE (op) == CONST_INT
823 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
825 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
826 if (BITS_PER_WORD < HOST_BITS_PER_INT)
827 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
828 & ((1 << (BITS_PER_WORD % HOST_BITS_PER_INT)) - 1));
830 return gen_rtx (CONST_INT, VOIDmode, val);
833 /* Similar to `operand_subword', but never return 0. If we can't extract
834 the required subword, put OP into a register and try again. If that fails,
835 abort. We always validate the address in this case. It is not valid
836 to call this function after reload; it is mostly meant for RTL
839 MODE is the mode of OP, in case it is CONST_INT. */
842 operand_subword_force (op, i, mode)
845 enum machine_mode mode;
847 rtx result = operand_subword (op, i, 1, mode);
852 if (mode != BLKmode && mode != VOIDmode)
853 op = force_reg (mode, op);
855 result = operand_subword (op, i, 1, mode);
862 /* Given a compare instruction, swap the operands.
863 A test instruction is changed into a compare of 0 against the operand. */
866 reverse_comparison (insn)
869 rtx body = PATTERN (insn);
872 if (GET_CODE (body) == SET)
873 comp = SET_SRC (body);
875 comp = SET_SRC (XVECEXP (body, 0, 0));
877 if (GET_CODE (comp) == COMPARE)
879 rtx op0 = XEXP (comp, 0);
880 rtx op1 = XEXP (comp, 1);
881 XEXP (comp, 0) = op1;
882 XEXP (comp, 1) = op0;
886 rtx new = gen_rtx (COMPARE, VOIDmode,
887 CONST0_RTX (GET_MODE (comp)), comp);
888 if (GET_CODE (body) == SET)
889 SET_SRC (body) = new;
891 SET_SRC (XVECEXP (body, 0, 0)) = new;
895 /* Return a memory reference like MEMREF, but with its mode changed
896 to MODE and its address changed to ADDR.
897 (VOIDmode means don't change the mode.
898 NULL for ADDR means don't change the address.) */
901 change_address (memref, mode, addr)
903 enum machine_mode mode;
908 if (GET_CODE (memref) != MEM)
910 if (mode == VOIDmode)
911 mode = GET_MODE (memref);
913 addr = XEXP (memref, 0);
915 /* If reload is in progress or has completed, ADDR must be valid.
916 Otherwise, we can call memory_address to make it valid. */
917 if (reload_completed || reload_in_progress)
919 if (! memory_address_p (mode, addr))
923 addr = memory_address (mode, addr);
925 new = gen_rtx (MEM, mode, addr);
926 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
927 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
928 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
932 /* Return a newly created CODE_LABEL rtx with a unique label number. */
937 register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, label_num++, 0);
938 LABEL_NUSES (label) = 0;
942 /* For procedure integration. */
944 /* Return a newly created INLINE_HEADER rtx. Should allocate this
945 from a permanent obstack when the opportunity arises. */
948 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
949 last_labelno, max_parm_regnum, max_regnum, args_size,
950 pops_args, stack_slots, function_flags,
951 outgoing_args_size, original_arg_vector,
952 original_decl_initial)
953 rtx first_insn, first_parm_insn;
954 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
958 int outgoing_args_size;
959 rtvec original_arg_vector;
960 rtx original_decl_initial;
962 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
963 cur_insn_uid++, NULL,
964 first_insn, first_parm_insn,
965 first_labelno, last_labelno,
966 max_parm_regnum, max_regnum, args_size, pops_args,
967 stack_slots, function_flags, outgoing_args_size,
968 original_arg_vector, original_decl_initial);
972 /* Install new pointers to the first and last insns in the chain.
973 Used for an inline-procedure after copying the insn chain. */
976 set_new_first_and_last_insn (first, last)
983 /* Set the range of label numbers found in the current function.
984 This is used when belatedly compiling an inline function. */
987 set_new_first_and_last_label_num (first, last)
990 base_label_num = label_num;
991 first_label_num = first;
992 last_label_num = last;
995 /* Save all variables describing the current status into the structure *P.
996 This is used before starting a nested function. */
1002 p->reg_rtx_no = reg_rtx_no;
1003 p->first_label_num = first_label_num;
1004 p->first_insn = first_insn;
1005 p->last_insn = last_insn;
1006 p->sequence_stack = sequence_stack;
1007 p->cur_insn_uid = cur_insn_uid;
1008 p->last_linenum = last_linenum;
1009 p->last_filename = last_filename;
1010 p->regno_pointer_flag = regno_pointer_flag;
1011 p->regno_pointer_flag_length = regno_pointer_flag_length;
1012 p->regno_reg_rtx = regno_reg_rtx;
1015 /* Restore all variables describing the current status from the structure *P.
1016 This is used after a nested function. */
1019 restore_emit_status (p)
1024 reg_rtx_no = p->reg_rtx_no;
1025 first_label_num = p->first_label_num;
1026 first_insn = p->first_insn;
1027 last_insn = p->last_insn;
1028 sequence_stack = p->sequence_stack;
1029 cur_insn_uid = p->cur_insn_uid;
1030 last_linenum = p->last_linenum;
1031 last_filename = p->last_filename;
1032 regno_pointer_flag = p->regno_pointer_flag;
1033 regno_pointer_flag_length = p->regno_pointer_flag_length;
1034 regno_reg_rtx = p->regno_reg_rtx;
1036 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1037 sequence_element_free_list = 0;
1038 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1039 sequence_result[i] = 0;
1042 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1043 It does not work to do this twice, because the mark bits set here
1044 are not cleared afterwards. */
1047 unshare_all_rtl (insn)
1050 for (; insn; insn = NEXT_INSN (insn))
1051 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1052 || GET_CODE (insn) == CALL_INSN)
1054 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1055 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1056 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1059 /* Make sure the addresses of stack slots found outside the insn chain
1060 (such as, in DECL_RTL of a variable) are not shared
1061 with the insn chain.
1063 This special care is necessary when the stack slot MEM does not
1064 actually appear in the insn chain. If it does appear, its address
1065 is unshared from all else at that point. */
1067 copy_rtx_if_shared (stack_slot_list);
1070 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1071 Recursively does the same for subexpressions. */
1074 copy_rtx_if_shared (orig)
1077 register rtx x = orig;
1079 register enum rtx_code code;
1080 register char *format_ptr;
1086 code = GET_CODE (x);
1088 /* These types may be freely shared. */
1101 /* SCRATCH must be shared because they represent distinct values. */
1110 /* The chain of insns is not being copied. */
1114 /* A MEM is allowed to be shared if its address is constant
1115 or is a constant plus one of the special registers. */
1116 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1117 || XEXP (x, 0) == virtual_stack_vars_rtx
1118 || XEXP (x, 0) == virtual_incoming_args_rtx)
1121 if (GET_CODE (XEXP (x, 0)) == PLUS
1122 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1123 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1124 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1126 /* This MEM can appear in more than one place,
1127 but its address better not be shared with anything else. */
1129 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1135 /* This rtx may not be shared. If it has already been seen,
1136 replace it with a copy of itself. */
1142 copy = rtx_alloc (code);
1143 bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld)
1144 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1150 /* Now scan the subexpressions recursively.
1151 We can store any replaced subexpressions directly into X
1152 since we know X is not shared! Any vectors in X
1153 must be copied if X was copied. */
1155 format_ptr = GET_RTX_FORMAT (code);
1157 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1159 switch (*format_ptr++)
1162 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1166 if (XVEC (x, i) != NULL)
1171 XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0));
1172 for (j = 0; j < XVECLEN (x, i); j++)
1174 = copy_rtx_if_shared (XVECEXP (x, i, j));
1182 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1183 to look for shared sub-parts. */
1186 reset_used_flags (x)
1190 register enum rtx_code code;
1191 register char *format_ptr;
1197 code = GET_CODE (x);
1199 /* These types may be freely shared so we needn't do any reseting
1220 /* The chain of insns is not being copied. */
1226 format_ptr = GET_RTX_FORMAT (code);
1227 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1229 switch (*format_ptr++)
1232 reset_used_flags (XEXP (x, i));
1236 for (j = 0; j < XVECLEN (x, i); j++)
1237 reset_used_flags (XVECEXP (x, i, j));
1243 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1244 Return X or the rtx for the pseudo reg the value of X was copied into.
1245 OTHER must be valid as a SET_DEST. */
1248 make_safe_from (x, other)
1252 switch (GET_CODE (other))
1255 other = SUBREG_REG (other);
1257 case STRICT_LOW_PART:
1260 other = XEXP (other, 0);
1266 if ((GET_CODE (other) == MEM
1268 && GET_CODE (x) != REG
1269 && GET_CODE (x) != SUBREG)
1270 || (GET_CODE (other) == REG
1271 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1272 || reg_mentioned_p (other, x))))
1274 rtx temp = gen_reg_rtx (GET_MODE (x));
1275 emit_move_insn (temp, x);
1281 /* Emission of insns (adding them to the doubly-linked list). */
1283 /* Return the first insn of the current sequence or current function. */
1291 /* Return the last insn emitted in current sequence or current function. */
1299 /* Specify a new insn as the last in the chain. */
1302 set_last_insn (insn)
1305 if (NEXT_INSN (insn) != 0)
1310 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1313 get_last_insn_anywhere ()
1315 struct sequence_stack *stack;
1318 for (stack = sequence_stack; stack; stack = stack->next)
1319 if (stack->last != 0)
1324 /* Return a number larger than any instruction's uid in this function. */
1329 return cur_insn_uid;
1332 /* Return the next insn. If it is a SEQUENCE, return the first insn
1341 insn = NEXT_INSN (insn);
1342 if (insn && GET_CODE (insn) == INSN
1343 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1344 insn = XVECEXP (PATTERN (insn), 0, 0);
1350 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1354 previous_insn (insn)
1359 insn = PREV_INSN (insn);
1360 if (insn && GET_CODE (insn) == INSN
1361 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1362 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1368 /* Return the next insn after INSN that is not a NOTE. This routine does not
1369 look inside SEQUENCEs. */
1372 next_nonnote_insn (insn)
1377 insn = NEXT_INSN (insn);
1378 if (insn == 0 || GET_CODE (insn) != NOTE)
1385 /* Return the previous insn before INSN that is not a NOTE. This routine does
1386 not look inside SEQUENCEs. */
1389 prev_nonnote_insn (insn)
1394 insn = PREV_INSN (insn);
1395 if (insn == 0 || GET_CODE (insn) != NOTE)
1402 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1403 or 0, if there is none. This routine does not look inside
1407 next_real_insn (insn)
1412 insn = NEXT_INSN (insn);
1413 if (insn == 0 || GET_CODE (insn) == INSN
1414 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1421 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1422 or 0, if there is none. This routine does not look inside
1426 prev_real_insn (insn)
1431 insn = PREV_INSN (insn);
1432 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1433 || GET_CODE (insn) == JUMP_INSN)
1440 /* Find the next insn after INSN that really does something. This routine
1441 does not look inside SEQUENCEs. Until reload has completed, this is the
1442 same as next_real_insn. */
1445 next_active_insn (insn)
1450 insn = NEXT_INSN (insn);
1452 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1453 || (GET_CODE (insn) == INSN
1454 && (! reload_completed
1455 || (GET_CODE (PATTERN (insn)) != USE
1456 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1463 /* Find the last insn before INSN that really does something. This routine
1464 does not look inside SEQUENCEs. Until reload has completed, this is the
1465 same as prev_real_insn. */
1468 prev_active_insn (insn)
1473 insn = PREV_INSN (insn);
1475 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1476 || (GET_CODE (insn) == INSN
1477 && (! reload_completed
1478 || (GET_CODE (PATTERN (insn)) != USE
1479 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1486 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1494 insn = NEXT_INSN (insn);
1495 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1502 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1510 insn = PREV_INSN (insn);
1511 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1519 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1520 and REG_CC_USER notes so we can find it. */
1523 link_cc0_insns (insn)
1526 rtx user = next_nonnote_insn (insn);
1528 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
1529 user = XVECEXP (PATTERN (user), 0, 0);
1531 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
1533 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
1536 /* Return the next insn that uses CC0 after INSN, which is assumed to
1537 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1538 applied to the result of this function should yield INSN).
1540 Normally, this is simply the next insn. However, if a REG_CC_USER note
1541 is present, it contains the insn that uses CC0.
1543 Return 0 if we can't find the insn. */
1546 next_cc0_user (insn)
1549 rtx note = find_reg_note (insn, REG_CC_USER, 0);
1552 return XEXP (note, 0);
1554 insn = next_nonnote_insn (insn);
1555 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1556 insn = XVECEXP (PATTERN (insn), 0, 0);
1558 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1559 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
1565 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1566 note, it is the previous insn. */
1569 prev_cc0_setter (insn)
1572 rtx note = find_reg_note (insn, REG_CC_SETTER, 0);
1576 return XEXP (note, 0);
1578 insn = prev_nonnote_insn (insn);
1579 if (! sets_cc0_p (PATTERN (insn)))
1586 /* Try splitting insns that can be split for better scheduling.
1587 PAT is the pattern which might split.
1588 TRIAL is the insn providing PAT.
1589 BACKWARDS is non-zero if we are scanning insns from last to first.
1591 If this routine succeeds in splitting, it returns the first or last
1592 replacement insn depending on the value of BACKWARDS. Otherwise, it
1593 returns TRIAL. If the insn to be returned can be split, it will be. */
1596 try_split (pat, trial, backwards)
1600 rtx before = PREV_INSN (trial);
1601 rtx after = NEXT_INSN (trial);
1602 rtx seq = split_insns (pat, trial);
1603 int has_barrier = 0;
1606 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
1607 We may need to handle this specially. */
1608 if (after && GET_CODE (after) == BARRIER)
1611 after = NEXT_INSN (after);
1616 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
1617 The latter case will normally arise only when being done so that
1618 it, in turn, will be split (SFmode on the 29k is an example). */
1619 if (GET_CODE (seq) == SEQUENCE)
1621 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
1622 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
1623 increment the usage count so we don't delete the label. */
1626 if (GET_CODE (trial) == JUMP_INSN)
1627 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
1628 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
1630 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
1632 if (JUMP_LABEL (trial))
1633 LABEL_NUSES (JUMP_LABEL (trial))++;
1636 tem = emit_insn_after (seq, before);
1638 delete_insn (trial);
1640 emit_barrier_after (tem);
1642 /* Avoid infinite loop if the result matches the original pattern. */
1643 else if (rtx_equal_p (seq, pat))
1647 PATTERN (trial) = seq;
1648 INSN_CODE (trial) = -1;
1651 /* Set TEM to the insn we should return. */
1652 tem = backwards ? prev_active_insn (after) : next_active_insn (before);
1653 return try_split (PATTERN (tem), tem, backwards);
1659 /* Make and return an INSN rtx, initializing all its slots.
1660 Store PATTERN in the pattern slots.
1661 PAT_FORMALS is an idea that never really went anywhere. */
1664 make_insn_raw (pattern, pat_formals)
1670 insn = rtx_alloc(INSN);
1671 INSN_UID(insn) = cur_insn_uid++;
1673 PATTERN (insn) = pattern;
1674 INSN_CODE (insn) = -1;
1675 LOG_LINKS(insn) = NULL;
1676 REG_NOTES(insn) = NULL;
1681 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
1684 make_jump_insn_raw (pattern, pat_formals)
1690 insn = rtx_alloc(JUMP_INSN);
1691 INSN_UID(insn) = cur_insn_uid++;
1693 PATTERN (insn) = pattern;
1694 INSN_CODE (insn) = -1;
1695 LOG_LINKS(insn) = NULL;
1696 REG_NOTES(insn) = NULL;
1697 JUMP_LABEL(insn) = NULL;
1702 /* Add INSN to the end of the doubly-linked list.
1703 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
1709 PREV_INSN (insn) = last_insn;
1710 NEXT_INSN (insn) = 0;
1712 if (NULL != last_insn)
1713 NEXT_INSN (last_insn) = insn;
1715 if (NULL == first_insn)
1721 /* Add INSN into the doubly-linked list after insn AFTER. This should be the
1722 only function called to insert an insn once delay slots have been filled
1723 since only it knows how to update a SEQUENCE. */
1726 add_insn_after (insn, after)
1729 rtx next = NEXT_INSN (after);
1731 NEXT_INSN (insn) = next;
1732 PREV_INSN (insn) = after;
1736 PREV_INSN (next) = insn;
1737 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
1738 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
1740 else if (last_insn == after)
1744 struct sequence_stack *stack = sequence_stack;
1745 /* Scan all pending sequences too. */
1746 for (; stack; stack = stack->next)
1747 if (after == stack->last)
1751 NEXT_INSN (after) = insn;
1752 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
1754 rtx sequence = PATTERN (after);
1755 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
1759 /* Delete all insns made since FROM.
1760 FROM becomes the new last instruction. */
1763 delete_insns_since (from)
1769 NEXT_INSN (from) = 0;
1773 /* Move a consecutive bunch of insns to a different place in the chain.
1774 The insns to be moved are those between FROM and TO.
1775 They are moved to a new position after the insn AFTER.
1776 AFTER must not be FROM or TO or any insn in between.
1778 This function does not know about SEQUENCEs and hence should not be
1779 called after delay-slot filling has been done. */
1782 reorder_insns (from, to, after)
1783 rtx from, to, after;
1785 /* Splice this bunch out of where it is now. */
1786 if (PREV_INSN (from))
1787 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
1789 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
1790 if (last_insn == to)
1791 last_insn = PREV_INSN (from);
1792 if (first_insn == from)
1793 first_insn = NEXT_INSN (to);
1795 /* Make the new neighbors point to it and it to them. */
1796 if (NEXT_INSN (after))
1797 PREV_INSN (NEXT_INSN (after)) = to;
1799 NEXT_INSN (to) = NEXT_INSN (after);
1800 PREV_INSN (from) = after;
1801 NEXT_INSN (after) = from;
1802 if (after == last_insn)
1806 /* Return the line note insn preceding INSN. */
1809 find_line_note (insn)
1812 if (no_line_numbers)
1815 for (; insn; insn = PREV_INSN (insn))
1816 if (GET_CODE (insn) == NOTE
1817 && NOTE_LINE_NUMBER (insn) >= 0)
1823 /* Like reorder_insns, but inserts line notes to preserve the line numbers
1824 of the moved insns when debugging. This may insert a note between AFTER
1825 and FROM, and another one after TO. */
1828 reorder_insns_with_line_notes (from, to, after)
1829 rtx from, to, after;
1831 rtx from_line = find_line_note (from);
1832 rtx after_line = find_line_note (after);
1834 reorder_insns (from, to, after);
1836 if (from_line == after_line)
1840 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
1841 NOTE_LINE_NUMBER (from_line),
1844 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
1845 NOTE_LINE_NUMBER (after_line),
1849 /* Emit an insn of given code and pattern
1850 at a specified place within the doubly-linked list. */
1852 /* Make an instruction with body PATTERN
1853 and output it before the instruction BEFORE. */
1856 emit_insn_before (pattern, before)
1857 register rtx pattern, before;
1859 register rtx insn = before;
1861 if (GET_CODE (pattern) == SEQUENCE)
1865 for (i = 0; i < XVECLEN (pattern, 0); i++)
1867 insn = XVECEXP (pattern, 0, i);
1868 add_insn_after (insn, PREV_INSN (before));
1870 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
1871 sequence_result[XVECLEN (pattern, 0)] = pattern;
1875 insn = make_insn_raw (pattern, 0);
1876 add_insn_after (insn, PREV_INSN (before));
1882 /* Make an instruction with body PATTERN and code JUMP_INSN
1883 and output it before the instruction BEFORE. */
1886 emit_jump_insn_before (pattern, before)
1887 register rtx pattern, before;
1891 if (GET_CODE (pattern) == SEQUENCE)
1892 insn = emit_insn_before (pattern, before);
1895 insn = make_jump_insn_raw (pattern, 0);
1896 add_insn_after (insn, PREV_INSN (before));
1902 /* Make an instruction with body PATTERN and code CALL_INSN
1903 and output it before the instruction BEFORE. */
1906 emit_call_insn_before (pattern, before)
1907 register rtx pattern, before;
1909 rtx insn = emit_insn_before (pattern, before);
1910 PUT_CODE (insn, CALL_INSN);
1914 /* Make an insn of code BARRIER
1915 and output it before the insn AFTER. */
1918 emit_barrier_before (before)
1919 register rtx before;
1921 register rtx insn = rtx_alloc (BARRIER);
1923 INSN_UID (insn) = cur_insn_uid++;
1925 add_insn_after (insn, PREV_INSN (before));
1929 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
1932 emit_note_before (subtype, before)
1936 register rtx note = rtx_alloc (NOTE);
1937 INSN_UID (note) = cur_insn_uid++;
1938 NOTE_SOURCE_FILE (note) = 0;
1939 NOTE_LINE_NUMBER (note) = subtype;
1941 add_insn_after (note, PREV_INSN (before));
1945 /* Make an insn of code INSN with body PATTERN
1946 and output it after the insn AFTER. */
1949 emit_insn_after (pattern, after)
1950 register rtx pattern, after;
1952 register rtx insn = after;
1954 if (GET_CODE (pattern) == SEQUENCE)
1958 for (i = 0; i < XVECLEN (pattern, 0); i++)
1960 insn = XVECEXP (pattern, 0, i);
1961 add_insn_after (insn, after);
1964 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
1965 sequence_result[XVECLEN (pattern, 0)] = pattern;
1969 insn = make_insn_raw (pattern, 0);
1970 add_insn_after (insn, after);
1976 /* Make an insn of code JUMP_INSN with body PATTERN
1977 and output it after the insn AFTER. */
1980 emit_jump_insn_after (pattern, after)
1981 register rtx pattern, after;
1985 if (GET_CODE (pattern) == SEQUENCE)
1986 insn = emit_insn_after (pattern, after);
1989 insn = make_jump_insn_raw (pattern, 0);
1990 add_insn_after (insn, after);
1996 /* Make an insn of code BARRIER
1997 and output it after the insn AFTER. */
2000 emit_barrier_after (after)
2003 register rtx insn = rtx_alloc (BARRIER);
2005 INSN_UID (insn) = cur_insn_uid++;
2007 add_insn_after (insn, after);
2011 /* Emit the label LABEL after the insn AFTER. */
2014 emit_label_after (label, after)
2017 /* This can be called twice for the same label
2018 as a result of the confusion that follows a syntax error!
2019 So make it harmless. */
2020 if (INSN_UID (label) == 0)
2022 INSN_UID (label) = cur_insn_uid++;
2023 add_insn_after (label, after);
2029 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2032 emit_note_after (subtype, after)
2036 register rtx note = rtx_alloc (NOTE);
2037 INSN_UID (note) = cur_insn_uid++;
2038 NOTE_SOURCE_FILE (note) = 0;
2039 NOTE_LINE_NUMBER (note) = subtype;
2040 add_insn_after (note, after);
2044 /* Emit a line note for FILE and LINE after the insn AFTER. */
2047 emit_line_note_after (file, line, after)
2054 if (no_line_numbers && line > 0)
2060 note = rtx_alloc (NOTE);
2061 INSN_UID (note) = cur_insn_uid++;
2062 NOTE_SOURCE_FILE (note) = file;
2063 NOTE_LINE_NUMBER (note) = line;
2064 add_insn_after (note, after);
2068 /* Make an insn of code INSN with pattern PATTERN
2069 and add it to the end of the doubly-linked list.
2070 If PATTERN is a SEQUENCE, take the elements of it
2071 and emit an insn for each element.
2073 Returns the last insn emitted. */
2079 rtx insn = last_insn;
2081 if (GET_CODE (pattern) == SEQUENCE)
2085 for (i = 0; i < XVECLEN (pattern, 0); i++)
2087 insn = XVECEXP (pattern, 0, i);
2090 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2091 sequence_result[XVECLEN (pattern, 0)] = pattern;
2095 insn = make_insn_raw (pattern, NULL);
2102 /* Emit the insns in a chain starting with INSN.
2103 Return the last insn emitted. */
2113 rtx next = NEXT_INSN (insn);
2122 /* Emit the insns in a chain starting with INSN and place them in front of
2123 the insn BEFORE. Return the last insn emitted. */
2126 emit_insns_before (insn, before)
2134 rtx next = NEXT_INSN (insn);
2135 add_insn_after (insn, PREV_INSN (before));
2143 /* Make an insn of code JUMP_INSN with pattern PATTERN
2144 and add it to the end of the doubly-linked list. */
2147 emit_jump_insn (pattern)
2150 if (GET_CODE (pattern) == SEQUENCE)
2151 return emit_insn (pattern);
2154 register rtx insn = make_jump_insn_raw (pattern, NULL);
2160 /* Make an insn of code CALL_INSN with pattern PATTERN
2161 and add it to the end of the doubly-linked list. */
2164 emit_call_insn (pattern)
2167 if (GET_CODE (pattern) == SEQUENCE)
2168 return emit_insn (pattern);
2171 register rtx insn = make_insn_raw (pattern, NULL);
2173 PUT_CODE (insn, CALL_INSN);
2178 /* Add the label LABEL to the end of the doubly-linked list. */
2184 /* This can be called twice for the same label
2185 as a result of the confusion that follows a syntax error!
2186 So make it harmless. */
2187 if (INSN_UID (label) == 0)
2189 INSN_UID (label) = cur_insn_uid++;
2195 /* Make an insn of code BARRIER
2196 and add it to the end of the doubly-linked list. */
2201 register rtx barrier = rtx_alloc (BARRIER);
2202 INSN_UID (barrier) = cur_insn_uid++;
2207 /* Make an insn of code NOTE
2208 with data-fields specified by FILE and LINE
2209 and add it to the end of the doubly-linked list,
2210 but only if line-numbers are desired for debugging info. */
2213 emit_line_note (file, line)
2217 emit_filename = file;
2221 if (no_line_numbers)
2225 return emit_note (file, line);
2228 /* Make an insn of code NOTE
2229 with data-fields specified by FILE and LINE
2230 and add it to the end of the doubly-linked list.
2231 If it is a line-number NOTE, omit it if it matches the previous one. */
2234 emit_note (file, line)
2242 if (file && last_filename && !strcmp (file, last_filename)
2243 && line == last_linenum)
2245 last_filename = file;
2246 last_linenum = line;
2249 if (no_line_numbers && line > 0)
2255 note = rtx_alloc (NOTE);
2256 INSN_UID (note) = cur_insn_uid++;
2257 NOTE_SOURCE_FILE (note) = file;
2258 NOTE_LINE_NUMBER (note) = line;
2263 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2266 emit_line_note_force (file, line)
2271 return emit_line_note (file, line);
2274 /* Cause next statement to emit a line note even if the line number
2275 has not changed. This is used at the beginning of a function. */
2278 force_next_line_note ()
2283 /* Return an indication of which type of insn should have X as a body.
2284 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2290 if (GET_CODE (x) == CODE_LABEL)
2292 if (GET_CODE (x) == CALL)
2294 if (GET_CODE (x) == RETURN)
2296 if (GET_CODE (x) == SET)
2298 if (SET_DEST (x) == pc_rtx)
2300 else if (GET_CODE (SET_SRC (x)) == CALL)
2305 if (GET_CODE (x) == PARALLEL)
2308 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2309 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2311 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2312 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2314 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2315 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2321 /* Emit the rtl pattern X as an appropriate kind of insn.
2322 If X is a label, it is simply added into the insn chain. */
2328 enum rtx_code code = classify_insn (x);
2330 if (code == CODE_LABEL)
2331 return emit_label (x);
2332 else if (code == INSN)
2333 return emit_insn (x);
2334 else if (code == JUMP_INSN)
2336 register rtx insn = emit_jump_insn (x);
2337 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2338 return emit_barrier ();
2341 else if (code == CALL_INSN)
2342 return emit_call_insn (x);
2347 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2352 struct sequence_stack *tem;
2354 if (sequence_element_free_list)
2356 /* Reuse a previously-saved struct sequence_stack. */
2357 tem = sequence_element_free_list;
2358 sequence_element_free_list = tem->next;
2361 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
2363 tem->next = sequence_stack;
2364 tem->first = first_insn;
2365 tem->last = last_insn;
2367 sequence_stack = tem;
2373 /* Set up the insn chain starting with FIRST
2374 as the current sequence, saving the previously current one. */
2377 push_to_sequence (first)
2384 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
2390 /* After emitting to a sequence, restore previous saved state.
2392 To get the contents of the sequence just made,
2393 you must call `gen_sequence' *before* calling here. */
2398 struct sequence_stack *tem = sequence_stack;
2400 first_insn = tem->first;
2401 last_insn = tem->last;
2402 sequence_stack = tem->next;
2404 tem->next = sequence_element_free_list;
2405 sequence_element_free_list = tem;
2408 /* Return 1 if currently emitting into a sequence. */
2413 return sequence_stack != 0;
2416 /* Generate a SEQUENCE rtx containing the insns already emitted
2417 to the current sequence.
2419 This is how the gen_... function from a DEFINE_EXPAND
2420 constructs the SEQUENCE that it returns. */
2431 /* Count the insns in the chain. */
2433 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
2436 /* If only one insn, return its pattern rather than a SEQUENCE.
2437 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
2438 the case of an empty list.) */
2440 && (GET_CODE (first_insn) == INSN
2441 || GET_CODE (first_insn) == JUMP_INSN
2442 || GET_CODE (first_insn) == CALL_INSN))
2443 return PATTERN (first_insn);
2445 /* Put them in a vector. See if we already have a SEQUENCE of the
2446 appropriate length around. */
2447 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
2448 sequence_result[len] = 0;
2451 /* Ensure that this rtl goes in saveable_obstack, since we may be
2453 int in_current_obstack = rtl_in_saveable_obstack ();
2454 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
2455 if (in_current_obstack)
2456 rtl_in_current_obstack ();
2459 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
2460 XVECEXP (result, 0, i) = tem;
2465 /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
2466 according to the chain of insns starting with FIRST.
2468 Also set cur_insn_uid to exceed the largest uid in that chain.
2470 This is used when an inline function's rtl is saved
2471 and passed to rest_of_compilation later. */
2473 static void restore_reg_data_1 ();
2476 restore_reg_data (first)
2481 register int max_uid = 0;
2483 for (insn = first; insn; insn = NEXT_INSN (insn))
2485 if (INSN_UID (insn) >= max_uid)
2486 max_uid = INSN_UID (insn);
2488 switch (GET_CODE (insn))
2498 restore_reg_data_1 (PATTERN (insn));
2503 /* Don't duplicate the uids already in use. */
2504 cur_insn_uid = max_uid + 1;
2506 /* If any regs are missing, make them up.
2508 ??? word_mode is not necessarily the right mode. Most likely these REGs
2509 are never used. At some point this should be checked. */
2511 for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++)
2512 if (regno_reg_rtx[i] == 0)
2513 regno_reg_rtx[i] = gen_rtx (REG, word_mode, i);
2517 restore_reg_data_1 (orig)
2520 register rtx x = orig;
2522 register enum rtx_code code;
2523 register char *format_ptr;
2525 code = GET_CODE (x);
2540 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
2542 /* Make sure regno_pointer_flag and regno_reg_rtx are large
2543 enough to have an element for this pseudo reg number. */
2544 if (REGNO (x) >= reg_rtx_no)
2546 reg_rtx_no = REGNO (x);
2548 if (reg_rtx_no >= regno_pointer_flag_length)
2550 int newlen = MAX (regno_pointer_flag_length * 2,
2553 char *new = (char *) oballoc (newlen);
2554 bzero (new, newlen);
2555 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
2557 new1 = (rtx *) oballoc (newlen * sizeof (rtx));
2558 bzero (new1, newlen * sizeof (rtx));
2559 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
2561 regno_pointer_flag = new;
2562 regno_reg_rtx = new1;
2563 regno_pointer_flag_length = newlen;
2567 regno_reg_rtx[REGNO (x)] = x;
2572 if (GET_CODE (XEXP (x, 0)) == REG)
2573 mark_reg_pointer (XEXP (x, 0));
2574 restore_reg_data_1 (XEXP (x, 0));
2578 /* Now scan the subexpressions recursively. */
2580 format_ptr = GET_RTX_FORMAT (code);
2582 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2584 switch (*format_ptr++)
2587 restore_reg_data_1 (XEXP (x, i));
2591 if (XVEC (x, i) != NULL)
2595 for (j = 0; j < XVECLEN (x, i); j++)
2596 restore_reg_data_1 (XVECEXP (x, i, j));
2603 /* Initialize data structures and variables in this file
2604 before generating rtl for each function. */
2614 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
2617 first_label_num = label_num;
2620 /* Clear the start_sequence/gen_sequence cache. */
2621 sequence_element_free_list = 0;
2622 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
2623 sequence_result[i] = 0;
2625 /* Init the tables that describe all the pseudo regs. */
2627 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
2630 = (char *) oballoc (regno_pointer_flag_length);
2631 bzero (regno_pointer_flag, regno_pointer_flag_length);
2634 = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx));
2635 bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
2637 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
2638 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
2639 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
2640 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
2641 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
2644 /* Create some permanent unique rtl objects shared between all functions.
2645 LINE_NUMBERS is nonzero if line numbers are to be generated. */
2648 init_emit_once (line_numbers)
2652 enum machine_mode mode;
2654 no_line_numbers = ! line_numbers;
2656 sequence_stack = NULL;
2658 /* Create the unique rtx's for certain rtx codes and operand values. */
2660 pc_rtx = gen_rtx (PC, VOIDmode);
2661 cc0_rtx = gen_rtx (CC0, VOIDmode);
2663 /* Don't use gen_rtx here since gen_rtx in this case
2664 tries to use these variables. */
2665 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
2667 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
2668 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
2669 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
2672 /* These four calls obtain some of the rtx expressions made above. */
2673 const0_rtx = gen_rtx (CONST_INT, VOIDmode, 0);
2674 const1_rtx = gen_rtx (CONST_INT, VOIDmode, 1);
2675 const2_rtx = gen_rtx (CONST_INT, VOIDmode, 2);
2676 constm1_rtx = gen_rtx (CONST_INT, VOIDmode, -1);
2678 /* This will usually be one of the above constants, but may be a new rtx. */
2679 const_true_rtx = gen_rtx (CONST_INT, VOIDmode, STORE_FLAG_VALUE);
2681 dconst0 = REAL_VALUE_ATOF ("0");
2682 dconst1 = REAL_VALUE_ATOF ("1");
2683 dconst2 = REAL_VALUE_ATOF ("2");
2684 dconstm1 = REAL_VALUE_ATOF ("-1");
2686 for (i = 0; i <= 2; i++)
2688 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
2689 mode = GET_MODE_WIDER_MODE (mode))
2691 rtx tem = rtx_alloc (CONST_DOUBLE);
2692 union real_extract u;
2694 bzero (&u, sizeof u); /* Zero any holes in a structure. */
2695 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
2697 bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u);
2698 CONST_DOUBLE_MEM (tem) = cc0_rtx;
2699 PUT_MODE (tem, mode);
2701 const_tiny_rtx[i][(int) mode] = tem;
2704 const_tiny_rtx[i][(int) VOIDmode] = gen_rtx (CONST_INT, VOIDmode, i);
2706 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2707 mode = GET_MODE_WIDER_MODE (mode))
2708 const_tiny_rtx[i][(int) mode] = gen_rtx (CONST_INT, VOIDmode, i);
2711 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
2712 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
2714 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
2715 arg_pointer_rtx = frame_pointer_rtx;
2716 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
2717 arg_pointer_rtx = stack_pointer_rtx;
2719 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
2721 /* Create the virtual registers. Do so here since the following objects
2722 might reference them. */
2724 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
2725 VIRTUAL_INCOMING_ARGS_REGNUM);
2726 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
2727 VIRTUAL_STACK_VARS_REGNUM);
2728 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
2729 VIRTUAL_STACK_DYNAMIC_REGNUM);
2730 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
2731 VIRTUAL_OUTGOING_ARGS_REGNUM);
2734 struct_value_rtx = STRUCT_VALUE;
2736 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
2739 #ifdef STRUCT_VALUE_INCOMING
2740 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
2742 #ifdef STRUCT_VALUE_INCOMING_REGNUM
2743 struct_value_incoming_rtx
2744 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
2746 struct_value_incoming_rtx = struct_value_rtx;
2750 #ifdef STATIC_CHAIN_REGNUM
2751 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
2753 #ifdef STATIC_CHAIN_INCOMING_REGNUM
2754 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
2755 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
2758 static_chain_incoming_rtx = static_chain_rtx;
2762 static_chain_rtx = STATIC_CHAIN;
2764 #ifdef STATIC_CHAIN_INCOMING
2765 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
2767 static_chain_incoming_rtx = static_chain_rtx;
2771 #ifdef PIC_OFFSET_TABLE_REGNUM
2772 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);