1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
51 #include "hard-reg-set.h"
52 #include "insn-config.h"
57 /* Commonly used modes. */
59 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
60 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
61 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
63 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
64 After rtl generation, it is 1 plus the largest register number used. */
66 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Lowest label number in current function. */
75 static int first_label_num;
77 /* Highest label number in current function.
78 Zero means use the value of label_num instead.
79 This is nonzero only when belatedly compiling an inline function. */
81 static int last_label_num;
83 /* Value label_num had when set_new_first_and_last_label_number was called.
84 If label_num has not changed since then, last_label_num is valid. */
86 static int base_label_num;
88 /* Nonzero means do not generate NOTEs for source line numbers. */
90 static int no_line_numbers;
92 /* Commonly used rtx's, so that we only need space for one copy.
93 These are initialized once for the entire compilation.
94 All of these except perhaps the floating-point CONST_DOUBLEs
95 are unique; no other rtx-object will be equal to any of these. */
97 struct _global_rtl global_rtl =
99 {PC, VOIDmode}, /* pc_rtx */
100 {CC0, VOIDmode}, /* cc0_rtx */
101 {REG}, /* stack_pointer_rtx */
102 {REG}, /* frame_pointer_rtx */
103 {REG}, /* hard_frame_pointer_rtx */
104 {REG}, /* arg_pointer_rtx */
105 {REG}, /* virtual_incoming_args_rtx */
106 {REG}, /* virtual_stack_vars_rtx */
107 {REG}, /* virtual_stack_dynamic_rtx */
108 {REG}, /* virtual_outgoing_args_rtx */
111 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
112 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
113 record a copy of const[012]_rtx. */
115 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
119 REAL_VALUE_TYPE dconst0;
120 REAL_VALUE_TYPE dconst1;
121 REAL_VALUE_TYPE dconst2;
122 REAL_VALUE_TYPE dconstm1;
124 /* All references to the following fixed hard registers go through
125 these unique rtl objects. On machines where the frame-pointer and
126 arg-pointer are the same register, they use the same unique object.
128 After register allocation, other rtl objects which used to be pseudo-regs
129 may be clobbered to refer to the frame-pointer register.
130 But references that were originally to the frame-pointer can be
131 distinguished from the others because they contain frame_pointer_rtx.
133 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
134 tricky: until register elimination has taken place hard_frame_pointer_rtx
135 should be used if it is being set, and frame_pointer_rtx otherwise. After
136 register elimination hard_frame_pointer_rtx should always be used.
137 On machines where the two registers are same (most) then these are the
140 In an inline procedure, the stack and frame pointer rtxs may not be
141 used for anything else. */
142 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
143 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
144 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
145 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
146 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
148 /* This is used to implement __builtin_return_address for some machines.
149 See for instance the MIPS port. */
150 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
152 /* We make one copy of (const_int C) where C is in
153 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
154 to save space during the compilation and simplify comparisons of
157 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
159 /* The ends of the doubly-linked chain of rtl for the current function.
160 Both are reset to null at the start of rtl generation for the function.
162 start_sequence saves both of these on `sequence_stack' along with
163 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
165 static rtx first_insn = NULL;
166 static rtx last_insn = NULL;
168 /* RTL_EXPR within which the current sequence will be placed. Use to
169 prevent reuse of any temporaries within the sequence until after the
170 RTL_EXPR is emitted. */
172 tree sequence_rtl_expr = NULL;
174 /* INSN_UID for next insn emitted.
175 Reset to 1 for each function compiled. */
177 static int cur_insn_uid = 1;
179 /* Line number and source file of the last line-number NOTE emitted.
180 This is used to avoid generating duplicates. */
182 static int last_linenum = 0;
183 static char *last_filename = 0;
185 /* A vector indexed by pseudo reg number. The allocated length
186 of this vector is regno_pointer_flag_length. Since this
187 vector is needed during the expansion phase when the total
188 number of registers in the function is not yet known,
189 it is copied and made bigger when necessary. */
191 char *regno_pointer_flag;
192 int regno_pointer_flag_length;
194 /* Indexed by pseudo register number, if nonzero gives the known alignment
195 for that pseudo (if regno_pointer_flag is set).
196 Allocated in parallel with regno_pointer_flag. */
197 char *regno_pointer_align;
199 /* Indexed by pseudo register number, gives the rtx for that pseudo.
200 Allocated in parallel with regno_pointer_flag. */
204 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
205 Each element describes one pending sequence.
206 The main insn-chain is saved in the last element of the chain,
207 unless the chain is empty. */
209 struct sequence_stack *sequence_stack;
211 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
212 shortly thrown away. We use two mechanisms to prevent this waste:
214 First, we keep a list of the expressions used to represent the sequence
215 stack in sequence_element_free_list.
217 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
218 rtvec for use by gen_sequence. One entry for each size is sufficient
219 because most cases are calls to gen_sequence followed by immediately
220 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
221 destructive on the insn in it anyway and hence can't be redone.
223 We do not bother to save this cached data over nested function calls.
224 Instead, we just reinitialize them. */
226 #define SEQUENCE_RESULT_SIZE 5
228 static struct sequence_stack *sequence_element_free_list;
229 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
231 /* During RTL generation, we also keep a list of free INSN rtl codes. */
232 static rtx free_insn;
234 extern int rtx_equal_function_value_matters;
236 /* Filename and line number of last line-number note,
237 whether we actually emitted it or not. */
238 extern char *emit_filename;
239 extern int emit_lineno;
241 static rtx make_jump_insn_raw PROTO((rtx));
242 static rtx make_call_insn_raw PROTO((rtx));
243 static rtx find_line_note PROTO((rtx));
246 gen_rtx_CONST_INT (mode, arg)
247 enum machine_mode mode;
250 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
251 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
253 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
254 if (const_true_rtx && arg == STORE_FLAG_VALUE)
255 return const_true_rtx;
258 return gen_rtx_raw_CONST_INT (mode, arg);
262 gen_rtx_REG (mode, regno)
263 enum machine_mode mode;
266 /* In case the MD file explicitly references the frame pointer, have
267 all such references point to the same frame pointer. This is
268 used during frame pointer elimination to distinguish the explicit
269 references to these registers from pseudos that happened to be
272 If we have eliminated the frame pointer or arg pointer, we will
273 be using it as a normal register, for example as a spill
274 register. In such cases, we might be accessing it in a mode that
275 is not Pmode and therefore cannot use the pre-allocated rtx.
277 Also don't do this when we are making new REGs in reload, since
278 we don't want to get confused with the real pointers. */
280 if (mode == Pmode && !reload_in_progress)
282 if (regno == FRAME_POINTER_REGNUM)
283 return frame_pointer_rtx;
284 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
285 if (regno == HARD_FRAME_POINTER_REGNUM)
286 return hard_frame_pointer_rtx;
288 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
289 if (regno == ARG_POINTER_REGNUM)
290 return arg_pointer_rtx;
292 #ifdef RETURN_ADDRESS_POINTER_REGNUM
293 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
294 return return_address_pointer_rtx;
296 if (regno == STACK_POINTER_REGNUM)
297 return stack_pointer_rtx;
300 return gen_rtx_raw_REG (mode, regno);
303 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
305 ** This routine generates an RTX of the size specified by
306 ** <code>, which is an RTX code. The RTX structure is initialized
307 ** from the arguments <element1> through <elementn>, which are
308 ** interpreted according to the specific RTX type's format. The
309 ** special machine mode associated with the rtx (if any) is specified
312 ** gen_rtx can be invoked in a way which resembles the lisp-like
313 ** rtx it will generate. For example, the following rtx structure:
315 ** (plus:QI (mem:QI (reg:SI 1))
316 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
318 ** ...would be generated by the following C code:
320 ** gen_rtx (PLUS, QImode,
321 ** gen_rtx (MEM, QImode,
322 ** gen_rtx (REG, SImode, 1)),
323 ** gen_rtx (MEM, QImode,
324 ** gen_rtx (PLUS, SImode,
325 ** gen_rtx (REG, SImode, 2),
326 ** gen_rtx (REG, SImode, 3)))),
331 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
335 enum machine_mode mode;
338 register int i; /* Array indices... */
339 register char *fmt; /* Current rtx's format... */
340 register rtx rt_val; /* RTX to return to caller... */
345 code = va_arg (p, enum rtx_code);
346 mode = va_arg (p, enum machine_mode);
349 if (code == CONST_INT)
350 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
351 else if (code == REG)
352 rt_val = gen_rtx_REG (mode, va_arg (p, int));
355 rt_val = rtx_alloc (code); /* Allocate the storage space. */
356 rt_val->mode = mode; /* Store the machine mode... */
358 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
359 for (i = 0; i < GET_RTX_LENGTH (code); i++)
363 case '0': /* Unused field. */
366 case 'i': /* An integer? */
367 XINT (rt_val, i) = va_arg (p, int);
370 case 'w': /* A wide integer? */
371 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
374 case 's': /* A string? */
375 XSTR (rt_val, i) = va_arg (p, char *);
378 case 'e': /* An expression? */
379 case 'u': /* An insn? Same except when printing. */
380 XEXP (rt_val, i) = va_arg (p, rtx);
383 case 'E': /* An RTX vector? */
384 XVEC (rt_val, i) = va_arg (p, rtvec);
393 return rt_val; /* Return the new RTX... */
396 /* gen_rtvec (n, [rt1, ..., rtn])
398 ** This routine creates an rtvec and stores within it the
399 ** pointers to rtx's which are its arguments.
404 gen_rtvec VPROTO((int n, ...))
420 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
422 vector = (rtx *) alloca (n * sizeof (rtx));
424 for (i = 0; i < n; i++)
425 vector[i] = va_arg (p, rtx);
428 return gen_rtvec_v (n, vector);
432 gen_rtvec_v (n, argp)
437 register rtvec rt_val;
440 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
442 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
444 for (i = 0; i < n; i++)
445 rt_val->elem[i].rtx = *argp++;
451 gen_rtvec_vv (n, argp)
456 register rtvec rt_val;
459 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
461 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
463 for (i = 0; i < n; i++)
464 rt_val->elem[i].rtx = (argp++)->rtx;
469 /* Generate a REG rtx for a new pseudo register of mode MODE.
470 This pseudo is assigned the next sequential register number. */
474 enum machine_mode mode;
478 /* Don't let anything called by or after reload create new registers
479 (actually, registers can't be created after flow, but this is a good
482 if (reload_in_progress || reload_completed)
485 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
486 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
488 /* For complex modes, don't make a single pseudo.
489 Instead, make a CONCAT of two pseudos.
490 This allows noncontiguous allocation of the real and imaginary parts,
491 which makes much better code. Besides, allocating DCmode
492 pseudos overstrains reload on some machines like the 386. */
493 rtx realpart, imagpart;
494 int size = GET_MODE_UNIT_SIZE (mode);
495 enum machine_mode partmode
496 = mode_for_size (size * BITS_PER_UNIT,
497 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
498 ? MODE_FLOAT : MODE_INT),
501 realpart = gen_reg_rtx (partmode);
502 imagpart = gen_reg_rtx (partmode);
503 return gen_rtx_CONCAT (mode, realpart, imagpart);
506 /* Make sure regno_pointer_flag and regno_reg_rtx are large
507 enough to have an element for this pseudo reg number. */
509 if (reg_rtx_no == regno_pointer_flag_length)
513 (char *) savealloc (regno_pointer_flag_length * 2);
514 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
515 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
516 regno_pointer_flag = new;
518 new = (char *) savealloc (regno_pointer_flag_length * 2);
519 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
520 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
521 regno_pointer_align = new;
523 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
524 bcopy ((char *) regno_reg_rtx, (char *) new1,
525 regno_pointer_flag_length * sizeof (rtx));
526 bzero ((char *) &new1[regno_pointer_flag_length],
527 regno_pointer_flag_length * sizeof (rtx));
528 regno_reg_rtx = new1;
530 regno_pointer_flag_length *= 2;
533 val = gen_rtx_raw_REG (mode, reg_rtx_no);
534 regno_reg_rtx[reg_rtx_no++] = val;
538 /* Identify REG (which may be a CONCAT) as a user register. */
544 if (GET_CODE (reg) == CONCAT)
546 REG_USERVAR_P (XEXP (reg, 0)) = 1;
547 REG_USERVAR_P (XEXP (reg, 1)) = 1;
549 else if (GET_CODE (reg) == REG)
550 REG_USERVAR_P (reg) = 1;
555 /* Identify REG as a probable pointer register and show its alignment
556 as ALIGN, if nonzero. */
559 mark_reg_pointer (reg, align)
563 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
566 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
569 /* Return 1 plus largest pseudo reg number used in the current function. */
577 /* Return 1 + the largest label number used so far in the current function. */
582 if (last_label_num && label_num == base_label_num)
583 return last_label_num;
587 /* Return first label number used in this function (if any were used). */
590 get_first_label_num ()
592 return first_label_num;
595 /* Return a value representing some low-order bits of X, where the number
596 of low-order bits is given by MODE. Note that no conversion is done
597 between floating-point and fixed-point values, rather, the bit
598 representation is returned.
600 This function handles the cases in common between gen_lowpart, below,
601 and two variants in cse.c and combine.c. These are the cases that can
602 be safely handled at all points in the compilation.
604 If this is not a case we can handle, return 0. */
607 gen_lowpart_common (mode, x)
608 enum machine_mode mode;
613 if (GET_MODE (x) == mode)
616 /* MODE must occupy no more words than the mode of X. */
617 if (GET_MODE (x) != VOIDmode
618 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
619 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
623 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
624 word = ((GET_MODE_SIZE (GET_MODE (x))
625 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
628 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
629 && (GET_MODE_CLASS (mode) == MODE_INT
630 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
632 /* If we are getting the low-order part of something that has been
633 sign- or zero-extended, we can either just use the object being
634 extended or make a narrower extension. If we want an even smaller
635 piece than the size of the object being extended, call ourselves
638 This case is used mostly by combine and cse. */
640 if (GET_MODE (XEXP (x, 0)) == mode)
642 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
643 return gen_lowpart_common (mode, XEXP (x, 0));
644 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
645 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
647 else if (GET_CODE (x) == SUBREG
648 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
649 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
650 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
652 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
653 else if (GET_CODE (x) == REG)
655 /* Let the backend decide how many registers to skip. This is needed
656 in particular for Sparc64 where fp regs are smaller than a word. */
657 /* ??? Note that subregs are now ambiguous, in that those against
658 pseudos are sized by the Word Size, while those against hard
659 regs are sized by the underlying register size. Better would be
660 to always interpret the subreg offset parameter as bytes or bits. */
662 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
663 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
664 - HARD_REGNO_NREGS (REGNO (x), mode));
666 /* If the register is not valid for MODE, return 0. If we don't
667 do this, there is no way to fix up the resulting REG later.
668 But we do do this if the current REG is not valid for its
669 mode. This latter is a kludge, but is required due to the
670 way that parameters are passed on some machines, most
672 if (REGNO (x) < FIRST_PSEUDO_REGISTER
673 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
674 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
676 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
677 /* integrate.c can't handle parts of a return value register. */
678 && (! REG_FUNCTION_VALUE_P (x)
679 || ! rtx_equal_function_value_matters)
680 #ifdef CLASS_CANNOT_CHANGE_SIZE
681 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
682 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
683 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
684 && (TEST_HARD_REG_BIT
685 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
688 /* We want to keep the stack, frame, and arg pointers
690 && x != frame_pointer_rtx
691 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
692 && x != arg_pointer_rtx
694 && x != stack_pointer_rtx)
695 return gen_rtx_REG (mode, REGNO (x) + word);
697 return gen_rtx_SUBREG (mode, x, word);
699 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
700 from the low-order part of the constant. */
701 else if ((GET_MODE_CLASS (mode) == MODE_INT
702 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
703 && GET_MODE (x) == VOIDmode
704 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
706 /* If MODE is twice the host word size, X is already the desired
707 representation. Otherwise, if MODE is wider than a word, we can't
708 do this. If MODE is exactly a word, return just one CONST_INT.
709 If MODE is smaller than a word, clear the bits that don't belong
710 in our mode, unless they and our sign bit are all one. So we get
711 either a reasonable negative value or a reasonable unsigned value
714 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
716 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
718 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
719 return (GET_CODE (x) == CONST_INT ? x
720 : GEN_INT (CONST_DOUBLE_LOW (x)));
723 /* MODE must be narrower than HOST_BITS_PER_INT. */
724 int width = GET_MODE_BITSIZE (mode);
725 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
726 : CONST_DOUBLE_LOW (x));
728 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
729 != ((HOST_WIDE_INT) (-1) << (width - 1))))
730 val &= ((HOST_WIDE_INT) 1 << width) - 1;
732 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
737 /* If X is an integral constant but we want it in floating-point, it
738 must be the case that we have a union of an integer and a floating-point
739 value. If the machine-parameters allow it, simulate that union here
740 and return the result. The two-word and single-word cases are
743 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
744 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
745 || flag_pretend_float)
746 && GET_MODE_CLASS (mode) == MODE_FLOAT
747 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
748 && GET_CODE (x) == CONST_INT
749 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
750 #ifdef REAL_ARITHMETIC
756 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
757 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
761 union {HOST_WIDE_INT i; float d; } u;
764 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
767 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
768 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
769 || flag_pretend_float)
770 && GET_MODE_CLASS (mode) == MODE_FLOAT
771 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
772 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
773 && GET_MODE (x) == VOIDmode
774 && (sizeof (double) * HOST_BITS_PER_CHAR
775 == 2 * HOST_BITS_PER_WIDE_INT))
776 #ifdef REAL_ARITHMETIC
780 HOST_WIDE_INT low, high;
782 if (GET_CODE (x) == CONST_INT)
783 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
785 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
787 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
789 if (WORDS_BIG_ENDIAN)
790 i[0] = high, i[1] = low;
792 i[0] = low, i[1] = high;
794 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
795 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
799 union {HOST_WIDE_INT i[2]; double d; } u;
800 HOST_WIDE_INT low, high;
802 if (GET_CODE (x) == CONST_INT)
803 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
805 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
807 #ifdef HOST_WORDS_BIG_ENDIAN
808 u.i[0] = high, u.i[1] = low;
810 u.i[0] = low, u.i[1] = high;
813 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
817 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
818 same as sizeof (double) or when sizeof (float) is larger than the
819 size of a word on the target machine. */
820 #ifdef REAL_ARITHMETIC
821 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
827 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
828 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
832 /* Similarly, if this is converting a floating-point value into a
833 single-word integer. Only do this is the host and target parameters are
836 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
837 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
838 || flag_pretend_float)
839 && (GET_MODE_CLASS (mode) == MODE_INT
840 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
841 && GET_CODE (x) == CONST_DOUBLE
842 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
843 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
844 return operand_subword (x, word, 0, GET_MODE (x));
846 /* Similarly, if this is converting a floating-point value into a
847 two-word integer, we can do this one word at a time and make an
848 integer. Only do this is the host and target parameters are
851 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
852 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
853 || flag_pretend_float)
854 && (GET_MODE_CLASS (mode) == MODE_INT
855 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
856 && GET_CODE (x) == CONST_DOUBLE
857 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
858 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
861 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
863 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
865 if (lowpart && GET_CODE (lowpart) == CONST_INT
866 && highpart && GET_CODE (highpart) == CONST_INT)
867 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
870 /* Otherwise, we can't do this. */
874 /* Return the real part (which has mode MODE) of a complex value X.
875 This always comes at the low address in memory. */
878 gen_realpart (mode, x)
879 enum machine_mode mode;
882 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
884 else if (WORDS_BIG_ENDIAN)
885 return gen_highpart (mode, x);
887 return gen_lowpart (mode, x);
890 /* Return the imaginary part (which has mode MODE) of a complex value X.
891 This always comes at the high address in memory. */
894 gen_imagpart (mode, x)
895 enum machine_mode mode;
898 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
900 else if (WORDS_BIG_ENDIAN)
901 return gen_lowpart (mode, x);
903 return gen_highpart (mode, x);
906 /* Return 1 iff X, assumed to be a SUBREG,
907 refers to the real part of the complex value in its containing reg.
908 Complex values are always stored with the real part in the first word,
909 regardless of WORDS_BIG_ENDIAN. */
912 subreg_realpart_p (x)
915 if (GET_CODE (x) != SUBREG)
918 return SUBREG_WORD (x) == 0;
921 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
922 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
923 least-significant part of X.
924 MODE specifies how big a part of X to return;
925 it usually should not be larger than a word.
926 If X is a MEM whose address is a QUEUED, the value may be so also. */
929 gen_lowpart (mode, x)
930 enum machine_mode mode;
933 rtx result = gen_lowpart_common (mode, x);
937 else if (GET_CODE (x) == REG)
939 /* Must be a hard reg that's not valid in MODE. */
940 result = gen_lowpart_common (mode, copy_to_reg (x));
945 else if (GET_CODE (x) == MEM)
947 /* The only additional case we can do is MEM. */
948 register int offset = 0;
949 if (WORDS_BIG_ENDIAN)
950 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
951 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
953 if (BYTES_BIG_ENDIAN)
954 /* Adjust the address so that the address-after-the-data
956 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
957 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
959 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
961 else if (GET_CODE (x) == ADDRESSOF)
962 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
967 /* Like `gen_lowpart', but refer to the most significant part.
968 This is used to access the imaginary part of a complex number. */
971 gen_highpart (mode, x)
972 enum machine_mode mode;
975 /* This case loses if X is a subreg. To catch bugs early,
976 complain if an invalid MODE is used even in other cases. */
977 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
978 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
980 if (GET_CODE (x) == CONST_DOUBLE
981 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
982 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
985 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
986 else if (GET_CODE (x) == CONST_INT)
988 else if (GET_CODE (x) == MEM)
990 register int offset = 0;
991 if (! WORDS_BIG_ENDIAN)
992 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
993 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
995 if (! BYTES_BIG_ENDIAN
996 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
997 offset -= (GET_MODE_SIZE (mode)
998 - MIN (UNITS_PER_WORD,
999 GET_MODE_SIZE (GET_MODE (x))));
1001 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1003 else if (GET_CODE (x) == SUBREG)
1005 /* The only time this should occur is when we are looking at a
1006 multi-word item with a SUBREG whose mode is the same as that of the
1007 item. It isn't clear what we would do if it wasn't. */
1008 if (SUBREG_WORD (x) != 0)
1010 return gen_highpart (mode, SUBREG_REG (x));
1012 else if (GET_CODE (x) == REG)
1016 /* Let the backend decide how many registers to skip. This is needed
1017 in particular for sparc64 where fp regs are smaller than a word. */
1018 /* ??? Note that subregs are now ambiguous, in that those against
1019 pseudos are sized by the Word Size, while those against hard
1020 regs are sized by the underlying register size. Better would be
1021 to always interpret the subreg offset parameter as bytes or bits. */
1023 if (! WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
1024 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1025 - HARD_REGNO_NREGS (REGNO (x), mode));
1027 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1028 /* integrate.c can't handle parts of a return value register. */
1029 && (! REG_FUNCTION_VALUE_P (x)
1030 || ! rtx_equal_function_value_matters)
1031 /* We want to keep the stack, frame, and arg pointers special. */
1032 && x != frame_pointer_rtx
1033 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1034 && x != arg_pointer_rtx
1036 && x != stack_pointer_rtx)
1037 return gen_rtx_REG (mode, REGNO (x) + word);
1039 return gen_rtx_SUBREG (mode, x, word);
1045 /* Return 1 iff X, assumed to be a SUBREG,
1046 refers to the least significant part of its containing reg.
1047 If X is not a SUBREG, always return 1 (it is its own low part!). */
1050 subreg_lowpart_p (x)
1053 if (GET_CODE (x) != SUBREG)
1055 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1058 if (WORDS_BIG_ENDIAN
1059 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1060 return (SUBREG_WORD (x)
1061 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1062 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1065 return SUBREG_WORD (x) == 0;
1068 /* Return subword I of operand OP.
1069 The word number, I, is interpreted as the word number starting at the
1070 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1071 otherwise it is the high-order word.
1073 If we cannot extract the required word, we return zero. Otherwise, an
1074 rtx corresponding to the requested word will be returned.
1076 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1077 reload has completed, a valid address will always be returned. After
1078 reload, if a valid address cannot be returned, we return zero.
1080 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1081 it is the responsibility of the caller.
1083 MODE is the mode of OP in case it is a CONST_INT. */
1086 operand_subword (op, i, validate_address, mode)
1089 int validate_address;
1090 enum machine_mode mode;
1093 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1094 int bits_per_word = BITS_PER_WORD;
1096 if (mode == VOIDmode)
1097 mode = GET_MODE (op);
1099 if (mode == VOIDmode)
1102 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1104 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1105 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1108 /* If OP is already an integer word, return it. */
1109 if (GET_MODE_CLASS (mode) == MODE_INT
1110 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1113 /* If OP is a REG or SUBREG, we can handle it very simply. */
1114 if (GET_CODE (op) == REG)
1116 /* If the register is not valid for MODE, return 0. If we don't
1117 do this, there is no way to fix up the resulting REG later. */
1118 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1119 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1121 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1122 || (REG_FUNCTION_VALUE_P (op)
1123 && rtx_equal_function_value_matters)
1124 /* We want to keep the stack, frame, and arg pointers
1126 || op == frame_pointer_rtx
1127 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1128 || op == arg_pointer_rtx
1130 || op == stack_pointer_rtx)
1131 return gen_rtx_SUBREG (word_mode, op, i);
1133 return gen_rtx_REG (word_mode, REGNO (op) + i);
1135 else if (GET_CODE (op) == SUBREG)
1136 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1137 else if (GET_CODE (op) == CONCAT)
1139 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1141 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1142 return operand_subword (XEXP (op, 1), i - partwords,
1143 validate_address, mode);
1146 /* Form a new MEM at the requested address. */
1147 if (GET_CODE (op) == MEM)
1149 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1152 if (validate_address)
1154 if (reload_completed)
1156 if (! strict_memory_address_p (word_mode, addr))
1160 addr = memory_address (word_mode, addr);
1163 new = gen_rtx_MEM (word_mode, addr);
1165 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1166 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1167 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1172 /* The only remaining cases are when OP is a constant. If the host and
1173 target floating formats are the same, handling two-word floating
1174 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1175 are defined as returning one or two 32 bit values, respectively,
1176 and not values of BITS_PER_WORD bits. */
1177 #ifdef REAL_ARITHMETIC
1178 /* The output is some bits, the width of the target machine's word.
1179 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1181 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1182 && GET_MODE_CLASS (mode) == MODE_FLOAT
1183 && GET_MODE_BITSIZE (mode) == 64
1184 && GET_CODE (op) == CONST_DOUBLE)
1189 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1190 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1192 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1193 which the words are written depends on the word endianness.
1195 ??? This is a potential portability problem and should
1196 be fixed at some point. */
1197 if (BITS_PER_WORD == 32)
1198 return GEN_INT ((HOST_WIDE_INT) k[i]);
1199 #if HOST_BITS_PER_WIDE_INT > 32
1200 else if (BITS_PER_WORD >= 64 && i == 0)
1201 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1202 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1204 else if (BITS_PER_WORD == 16)
1208 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1211 return GEN_INT ((HOST_WIDE_INT) value);
1216 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1217 && GET_MODE_CLASS (mode) == MODE_FLOAT
1218 && GET_MODE_BITSIZE (mode) > 64
1219 && GET_CODE (op) == CONST_DOUBLE)
1224 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1225 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1227 if (BITS_PER_WORD == 32)
1228 return GEN_INT ((HOST_WIDE_INT) k[i]);
1230 #else /* no REAL_ARITHMETIC */
1231 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1232 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1233 || flag_pretend_float)
1234 && GET_MODE_CLASS (mode) == MODE_FLOAT
1235 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1236 && GET_CODE (op) == CONST_DOUBLE)
1238 /* The constant is stored in the host's word-ordering,
1239 but we want to access it in the target's word-ordering. Some
1240 compilers don't like a conditional inside macro args, so we have two
1241 copies of the return. */
1242 #ifdef HOST_WORDS_BIG_ENDIAN
1243 return GEN_INT (i == WORDS_BIG_ENDIAN
1244 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1246 return GEN_INT (i != WORDS_BIG_ENDIAN
1247 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1250 #endif /* no REAL_ARITHMETIC */
1252 /* Single word float is a little harder, since single- and double-word
1253 values often do not have the same high-order bits. We have already
1254 verified that we want the only defined word of the single-word value. */
1255 #ifdef REAL_ARITHMETIC
1256 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1257 && GET_MODE_BITSIZE (mode) == 32
1258 && GET_CODE (op) == CONST_DOUBLE)
1263 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1264 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1266 if (BITS_PER_WORD == 16)
1268 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1272 return GEN_INT ((HOST_WIDE_INT) l);
1275 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1276 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1277 || flag_pretend_float)
1278 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1279 && GET_MODE_CLASS (mode) == MODE_FLOAT
1280 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1281 && GET_CODE (op) == CONST_DOUBLE)
1284 union {float f; HOST_WIDE_INT i; } u;
1286 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1289 return GEN_INT (u.i);
1291 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1292 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1293 || flag_pretend_float)
1294 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1295 && GET_MODE_CLASS (mode) == MODE_FLOAT
1296 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1297 && GET_CODE (op) == CONST_DOUBLE)
1300 union {double d; HOST_WIDE_INT i; } u;
1302 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1305 return GEN_INT (u.i);
1307 #endif /* no REAL_ARITHMETIC */
1309 /* The only remaining cases that we can handle are integers.
1310 Convert to proper endianness now since these cases need it.
1311 At this point, i == 0 means the low-order word.
1313 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1314 in general. However, if OP is (const_int 0), we can just return
1317 if (op == const0_rtx)
1320 if (GET_MODE_CLASS (mode) != MODE_INT
1321 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1322 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1325 if (WORDS_BIG_ENDIAN)
1326 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1328 /* Find out which word on the host machine this value is in and get
1329 it from the constant. */
1330 val = (i / size_ratio == 0
1331 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1332 : (GET_CODE (op) == CONST_INT
1333 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1335 /* Get the value we want into the low bits of val. */
1336 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1337 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1339 /* Clear the bits that don't belong in our mode, unless they and our sign
1340 bit are all one. So we get either a reasonable negative value or a
1341 reasonable unsigned value for this mode. */
1342 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1343 && ((val & ((HOST_WIDE_INT) (-1) << (bits_per_word - 1)))
1344 != ((HOST_WIDE_INT) (-1) << (bits_per_word - 1))))
1345 val &= ((HOST_WIDE_INT) 1 << bits_per_word) - 1;
1347 /* If this would be an entire word for the target, but is not for
1348 the host, then sign-extend on the host so that the number will look
1349 the same way on the host that it would on the target.
1351 For example, when building a 64 bit alpha hosted 32 bit sparc
1352 targeted compiler, then we want the 32 bit unsigned value -1 to be
1353 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1354 The later confuses the sparc backend. */
1356 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1357 && (val & ((HOST_WIDE_INT) 1 << (bits_per_word - 1))))
1358 val |= ((HOST_WIDE_INT) (-1) << bits_per_word);
1360 return GEN_INT (val);
1363 /* Similar to `operand_subword', but never return 0. If we can't extract
1364 the required subword, put OP into a register and try again. If that fails,
1365 abort. We always validate the address in this case. It is not valid
1366 to call this function after reload; it is mostly meant for RTL
1369 MODE is the mode of OP, in case it is CONST_INT. */
1372 operand_subword_force (op, i, mode)
1375 enum machine_mode mode;
1377 rtx result = operand_subword (op, i, 1, mode);
1382 if (mode != BLKmode && mode != VOIDmode)
1384 /* If this is a register which can not be accessed by words, copy it
1385 to a pseudo register. */
1386 if (GET_CODE (op) == REG)
1387 op = copy_to_reg (op);
1389 op = force_reg (mode, op);
1392 result = operand_subword (op, i, 1, mode);
1399 /* Given a compare instruction, swap the operands.
1400 A test instruction is changed into a compare of 0 against the operand. */
1403 reverse_comparison (insn)
1406 rtx body = PATTERN (insn);
1409 if (GET_CODE (body) == SET)
1410 comp = SET_SRC (body);
1412 comp = SET_SRC (XVECEXP (body, 0, 0));
1414 if (GET_CODE (comp) == COMPARE)
1416 rtx op0 = XEXP (comp, 0);
1417 rtx op1 = XEXP (comp, 1);
1418 XEXP (comp, 0) = op1;
1419 XEXP (comp, 1) = op0;
1423 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1424 if (GET_CODE (body) == SET)
1425 SET_SRC (body) = new;
1427 SET_SRC (XVECEXP (body, 0, 0)) = new;
1431 /* Return a memory reference like MEMREF, but with its mode changed
1432 to MODE and its address changed to ADDR.
1433 (VOIDmode means don't change the mode.
1434 NULL for ADDR means don't change the address.) */
1437 change_address (memref, mode, addr)
1439 enum machine_mode mode;
1444 if (GET_CODE (memref) != MEM)
1446 if (mode == VOIDmode)
1447 mode = GET_MODE (memref);
1449 addr = XEXP (memref, 0);
1451 /* If reload is in progress or has completed, ADDR must be valid.
1452 Otherwise, we can call memory_address to make it valid. */
1453 if (reload_completed || reload_in_progress)
1455 if (! memory_address_p (mode, addr))
1459 addr = memory_address (mode, addr);
1461 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1464 new = gen_rtx_MEM (mode, addr);
1465 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1466 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1467 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1471 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1478 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1479 NULL_RTX, label_num++, NULL_PTR);
1481 LABEL_NUSES (label) = 0;
1485 /* For procedure integration. */
1487 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1488 from a permanent obstack when the opportunity arises. */
1491 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1492 last_labelno, max_parm_regnum, max_regnum, args_size,
1493 pops_args, stack_slots, forced_labels, function_flags,
1494 outgoing_args_size, original_arg_vector,
1495 original_decl_initial, regno_rtx, regno_flag,
1496 regno_align, parm_reg_stack_loc)
1497 rtx first_insn, first_parm_insn;
1498 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1503 int outgoing_args_size;
1504 rtvec original_arg_vector;
1505 rtx original_decl_initial;
1509 rtvec parm_reg_stack_loc;
1511 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1512 cur_insn_uid++, NULL_RTX,
1513 first_insn, first_parm_insn,
1514 first_labelno, last_labelno,
1515 max_parm_regnum, max_regnum, args_size,
1516 pops_args, stack_slots, forced_labels,
1517 function_flags, outgoing_args_size,
1518 original_arg_vector,
1519 original_decl_initial,
1520 regno_rtx, regno_flag, regno_align,
1521 parm_reg_stack_loc);
1525 /* Install new pointers to the first and last insns in the chain.
1526 Also, set cur_insn_uid to one higher than the last in use.
1527 Used for an inline-procedure after copying the insn chain. */
1530 set_new_first_and_last_insn (first, last)
1539 for (insn = first; insn; insn = NEXT_INSN (insn))
1540 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1545 /* Set the range of label numbers found in the current function.
1546 This is used when belatedly compiling an inline function. */
1549 set_new_first_and_last_label_num (first, last)
1552 base_label_num = label_num;
1553 first_label_num = first;
1554 last_label_num = last;
1557 /* Save all variables describing the current status into the structure *P.
1558 This is used before starting a nested function. */
1561 save_emit_status (p)
1564 p->reg_rtx_no = reg_rtx_no;
1565 p->first_label_num = first_label_num;
1566 p->first_insn = first_insn;
1567 p->last_insn = last_insn;
1568 p->sequence_rtl_expr = sequence_rtl_expr;
1569 p->sequence_stack = sequence_stack;
1570 p->cur_insn_uid = cur_insn_uid;
1571 p->last_linenum = last_linenum;
1572 p->last_filename = last_filename;
1573 p->regno_pointer_flag = regno_pointer_flag;
1574 p->regno_pointer_align = regno_pointer_align;
1575 p->regno_pointer_flag_length = regno_pointer_flag_length;
1576 p->regno_reg_rtx = regno_reg_rtx;
1579 /* Restore all variables describing the current status from the structure *P.
1580 This is used after a nested function. */
1583 restore_emit_status (p)
1588 reg_rtx_no = p->reg_rtx_no;
1589 first_label_num = p->first_label_num;
1591 first_insn = p->first_insn;
1592 last_insn = p->last_insn;
1593 sequence_rtl_expr = p->sequence_rtl_expr;
1594 sequence_stack = p->sequence_stack;
1595 cur_insn_uid = p->cur_insn_uid;
1596 last_linenum = p->last_linenum;
1597 last_filename = p->last_filename;
1598 regno_pointer_flag = p->regno_pointer_flag;
1599 regno_pointer_align = p->regno_pointer_align;
1600 regno_pointer_flag_length = p->regno_pointer_flag_length;
1601 regno_reg_rtx = p->regno_reg_rtx;
1603 /* Clear our cache of rtx expressions for start_sequence and
1605 sequence_element_free_list = 0;
1606 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1607 sequence_result[i] = 0;
1612 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1613 It does not work to do this twice, because the mark bits set here
1614 are not cleared afterwards. */
1617 unshare_all_rtl (insn)
1620 for (; insn; insn = NEXT_INSN (insn))
1621 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1622 || GET_CODE (insn) == CALL_INSN)
1624 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1625 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1626 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1629 /* Make sure the addresses of stack slots found outside the insn chain
1630 (such as, in DECL_RTL of a variable) are not shared
1631 with the insn chain.
1633 This special care is necessary when the stack slot MEM does not
1634 actually appear in the insn chain. If it does appear, its address
1635 is unshared from all else at that point. */
1637 copy_rtx_if_shared (stack_slot_list);
1640 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1641 Recursively does the same for subexpressions. */
1644 copy_rtx_if_shared (orig)
1647 register rtx x = orig;
1649 register enum rtx_code code;
1650 register char *format_ptr;
1656 code = GET_CODE (x);
1658 /* These types may be freely shared. */
1671 /* SCRATCH must be shared because they represent distinct values. */
1675 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1676 a LABEL_REF, it isn't sharable. */
1677 if (GET_CODE (XEXP (x, 0)) == PLUS
1678 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1679 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1688 /* The chain of insns is not being copied. */
1692 /* A MEM is allowed to be shared if its address is constant
1693 or is a constant plus one of the special registers. */
1694 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1695 || XEXP (x, 0) == virtual_stack_vars_rtx
1696 || XEXP (x, 0) == virtual_incoming_args_rtx)
1699 if (GET_CODE (XEXP (x, 0)) == PLUS
1700 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1701 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1702 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1704 /* This MEM can appear in more than one place,
1705 but its address better not be shared with anything else. */
1707 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1717 /* This rtx may not be shared. If it has already been seen,
1718 replace it with a copy of itself. */
1724 copy = rtx_alloc (code);
1725 bcopy ((char *) x, (char *) copy,
1726 (sizeof (*copy) - sizeof (copy->fld)
1727 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1733 /* Now scan the subexpressions recursively.
1734 We can store any replaced subexpressions directly into X
1735 since we know X is not shared! Any vectors in X
1736 must be copied if X was copied. */
1738 format_ptr = GET_RTX_FORMAT (code);
1740 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1742 switch (*format_ptr++)
1745 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1749 if (XVEC (x, i) != NULL)
1752 int len = XVECLEN (x, i);
1754 if (copied && len > 0)
1755 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1756 for (j = 0; j < len; j++)
1757 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1765 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1766 to look for shared sub-parts. */
1769 reset_used_flags (x)
1773 register enum rtx_code code;
1774 register char *format_ptr;
1779 code = GET_CODE (x);
1781 /* These types may be freely shared so we needn't do any resetting
1802 /* The chain of insns is not being copied. */
1811 format_ptr = GET_RTX_FORMAT (code);
1812 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1814 switch (*format_ptr++)
1817 reset_used_flags (XEXP (x, i));
1821 for (j = 0; j < XVECLEN (x, i); j++)
1822 reset_used_flags (XVECEXP (x, i, j));
1828 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1829 Return X or the rtx for the pseudo reg the value of X was copied into.
1830 OTHER must be valid as a SET_DEST. */
1833 make_safe_from (x, other)
1837 switch (GET_CODE (other))
1840 other = SUBREG_REG (other);
1842 case STRICT_LOW_PART:
1845 other = XEXP (other, 0);
1851 if ((GET_CODE (other) == MEM
1853 && GET_CODE (x) != REG
1854 && GET_CODE (x) != SUBREG)
1855 || (GET_CODE (other) == REG
1856 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1857 || reg_mentioned_p (other, x))))
1859 rtx temp = gen_reg_rtx (GET_MODE (x));
1860 emit_move_insn (temp, x);
1866 /* Emission of insns (adding them to the doubly-linked list). */
1868 /* Return the first insn of the current sequence or current function. */
1876 /* Return the last insn emitted in current sequence or current function. */
1884 /* Specify a new insn as the last in the chain. */
1887 set_last_insn (insn)
1890 if (NEXT_INSN (insn) != 0)
1895 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1898 get_last_insn_anywhere ()
1900 struct sequence_stack *stack;
1903 for (stack = sequence_stack; stack; stack = stack->next)
1904 if (stack->last != 0)
1909 /* Return a number larger than any instruction's uid in this function. */
1914 return cur_insn_uid;
1917 /* Return the next insn. If it is a SEQUENCE, return the first insn
1926 insn = NEXT_INSN (insn);
1927 if (insn && GET_CODE (insn) == INSN
1928 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1929 insn = XVECEXP (PATTERN (insn), 0, 0);
1935 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1939 previous_insn (insn)
1944 insn = PREV_INSN (insn);
1945 if (insn && GET_CODE (insn) == INSN
1946 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1947 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1953 /* Return the next insn after INSN that is not a NOTE. This routine does not
1954 look inside SEQUENCEs. */
1957 next_nonnote_insn (insn)
1962 insn = NEXT_INSN (insn);
1963 if (insn == 0 || GET_CODE (insn) != NOTE)
1970 /* Return the previous insn before INSN that is not a NOTE. This routine does
1971 not look inside SEQUENCEs. */
1974 prev_nonnote_insn (insn)
1979 insn = PREV_INSN (insn);
1980 if (insn == 0 || GET_CODE (insn) != NOTE)
1987 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1988 or 0, if there is none. This routine does not look inside
1992 next_real_insn (insn)
1997 insn = NEXT_INSN (insn);
1998 if (insn == 0 || GET_CODE (insn) == INSN
1999 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2006 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2007 or 0, if there is none. This routine does not look inside
2011 prev_real_insn (insn)
2016 insn = PREV_INSN (insn);
2017 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2018 || GET_CODE (insn) == JUMP_INSN)
2025 /* Find the next insn after INSN that really does something. This routine
2026 does not look inside SEQUENCEs. Until reload has completed, this is the
2027 same as next_real_insn. */
2030 next_active_insn (insn)
2035 insn = NEXT_INSN (insn);
2037 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2038 || (GET_CODE (insn) == INSN
2039 && (! reload_completed
2040 || (GET_CODE (PATTERN (insn)) != USE
2041 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2048 /* Find the last insn before INSN that really does something. This routine
2049 does not look inside SEQUENCEs. Until reload has completed, this is the
2050 same as prev_real_insn. */
2053 prev_active_insn (insn)
2058 insn = PREV_INSN (insn);
2060 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2061 || (GET_CODE (insn) == INSN
2062 && (! reload_completed
2063 || (GET_CODE (PATTERN (insn)) != USE
2064 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2071 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2079 insn = NEXT_INSN (insn);
2080 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2087 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2095 insn = PREV_INSN (insn);
2096 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2104 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2105 and REG_CC_USER notes so we can find it. */
2108 link_cc0_insns (insn)
2111 rtx user = next_nonnote_insn (insn);
2113 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2114 user = XVECEXP (PATTERN (user), 0, 0);
2116 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2117 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2120 /* Return the next insn that uses CC0 after INSN, which is assumed to
2121 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2122 applied to the result of this function should yield INSN).
2124 Normally, this is simply the next insn. However, if a REG_CC_USER note
2125 is present, it contains the insn that uses CC0.
2127 Return 0 if we can't find the insn. */
2130 next_cc0_user (insn)
2133 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2136 return XEXP (note, 0);
2138 insn = next_nonnote_insn (insn);
2139 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2140 insn = XVECEXP (PATTERN (insn), 0, 0);
2142 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2143 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2149 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2150 note, it is the previous insn. */
2153 prev_cc0_setter (insn)
2156 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2159 return XEXP (note, 0);
2161 insn = prev_nonnote_insn (insn);
2162 if (! sets_cc0_p (PATTERN (insn)))
2169 /* Try splitting insns that can be split for better scheduling.
2170 PAT is the pattern which might split.
2171 TRIAL is the insn providing PAT.
2172 LAST is non-zero if we should return the last insn of the sequence produced.
2174 If this routine succeeds in splitting, it returns the first or last
2175 replacement insn depending on the value of LAST. Otherwise, it
2176 returns TRIAL. If the insn to be returned can be split, it will be. */
2179 try_split (pat, trial, last)
2183 rtx before = PREV_INSN (trial);
2184 rtx after = NEXT_INSN (trial);
2185 rtx seq = split_insns (pat, trial);
2186 int has_barrier = 0;
2189 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2190 We may need to handle this specially. */
2191 if (after && GET_CODE (after) == BARRIER)
2194 after = NEXT_INSN (after);
2199 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2200 The latter case will normally arise only when being done so that
2201 it, in turn, will be split (SFmode on the 29k is an example). */
2202 if (GET_CODE (seq) == SEQUENCE)
2204 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2205 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2206 increment the usage count so we don't delete the label. */
2209 if (GET_CODE (trial) == JUMP_INSN)
2210 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2211 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2213 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2215 if (JUMP_LABEL (trial))
2216 LABEL_NUSES (JUMP_LABEL (trial))++;
2219 tem = emit_insn_after (seq, before);
2221 delete_insn (trial);
2223 emit_barrier_after (tem);
2225 /* Recursively call try_split for each new insn created; by the
2226 time control returns here that insn will be fully split, so
2227 set LAST and continue from the insn after the one returned.
2228 We can't use next_active_insn here since AFTER may be a note.
2229 Ignore deleted insns, which can be occur if not optimizing. */
2230 for (tem = NEXT_INSN (before); tem != after;
2231 tem = NEXT_INSN (tem))
2232 if (! INSN_DELETED_P (tem))
2233 tem = try_split (PATTERN (tem), tem, 1);
2235 /* Avoid infinite loop if the result matches the original pattern. */
2236 else if (rtx_equal_p (seq, pat))
2240 PATTERN (trial) = seq;
2241 INSN_CODE (trial) = -1;
2242 try_split (seq, trial, last);
2245 /* Return either the first or the last insn, depending on which was
2247 return last ? prev_active_insn (after) : next_active_insn (before);
2253 /* Make and return an INSN rtx, initializing all its slots.
2254 Store PATTERN in the pattern slots. */
2257 make_insn_raw (pattern)
2262 /* If in RTL generation phase, see if FREE_INSN can be used. */
2263 if (free_insn != 0 && rtx_equal_function_value_matters)
2266 free_insn = NEXT_INSN (free_insn);
2267 PUT_CODE (insn, INSN);
2270 insn = rtx_alloc (INSN);
2272 INSN_UID (insn) = cur_insn_uid++;
2273 PATTERN (insn) = pattern;
2274 INSN_CODE (insn) = -1;
2275 LOG_LINKS (insn) = NULL;
2276 REG_NOTES (insn) = NULL;
2281 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2284 make_jump_insn_raw (pattern)
2289 insn = rtx_alloc (JUMP_INSN);
2290 INSN_UID (insn) = cur_insn_uid++;
2292 PATTERN (insn) = pattern;
2293 INSN_CODE (insn) = -1;
2294 LOG_LINKS (insn) = NULL;
2295 REG_NOTES (insn) = NULL;
2296 JUMP_LABEL (insn) = NULL;
2301 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2304 make_call_insn_raw (pattern)
2309 insn = rtx_alloc (CALL_INSN);
2310 INSN_UID (insn) = cur_insn_uid++;
2312 PATTERN (insn) = pattern;
2313 INSN_CODE (insn) = -1;
2314 LOG_LINKS (insn) = NULL;
2315 REG_NOTES (insn) = NULL;
2316 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2321 /* Add INSN to the end of the doubly-linked list.
2322 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2328 PREV_INSN (insn) = last_insn;
2329 NEXT_INSN (insn) = 0;
2331 if (NULL != last_insn)
2332 NEXT_INSN (last_insn) = insn;
2334 if (NULL == first_insn)
2340 /* Add INSN into the doubly-linked list after insn AFTER. This and
2341 the next should be the only functions called to insert an insn once
2342 delay slots have been filled since only they know how to update a
2346 add_insn_after (insn, after)
2349 rtx next = NEXT_INSN (after);
2351 if (optimize && INSN_DELETED_P (after))
2354 NEXT_INSN (insn) = next;
2355 PREV_INSN (insn) = after;
2359 PREV_INSN (next) = insn;
2360 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2361 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2363 else if (last_insn == after)
2367 struct sequence_stack *stack = sequence_stack;
2368 /* Scan all pending sequences too. */
2369 for (; stack; stack = stack->next)
2370 if (after == stack->last)
2380 NEXT_INSN (after) = insn;
2381 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2383 rtx sequence = PATTERN (after);
2384 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2388 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2389 the previous should be the only functions called to insert an insn once
2390 delay slots have been filled since only they know how to update a
2394 add_insn_before (insn, before)
2397 rtx prev = PREV_INSN (before);
2399 if (optimize && INSN_DELETED_P (before))
2402 PREV_INSN (insn) = prev;
2403 NEXT_INSN (insn) = before;
2407 NEXT_INSN (prev) = insn;
2408 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2410 rtx sequence = PATTERN (prev);
2411 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2414 else if (first_insn == before)
2418 struct sequence_stack *stack = sequence_stack;
2419 /* Scan all pending sequences too. */
2420 for (; stack; stack = stack->next)
2421 if (before == stack->first)
2423 stack->first = insn;
2431 PREV_INSN (before) = insn;
2432 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2433 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2436 /* Delete all insns made since FROM.
2437 FROM becomes the new last instruction. */
2440 delete_insns_since (from)
2446 NEXT_INSN (from) = 0;
2450 /* This function is deprecated, please use sequences instead.
2452 Move a consecutive bunch of insns to a different place in the chain.
2453 The insns to be moved are those between FROM and TO.
2454 They are moved to a new position after the insn AFTER.
2455 AFTER must not be FROM or TO or any insn in between.
2457 This function does not know about SEQUENCEs and hence should not be
2458 called after delay-slot filling has been done. */
2461 reorder_insns (from, to, after)
2462 rtx from, to, after;
2464 /* Splice this bunch out of where it is now. */
2465 if (PREV_INSN (from))
2466 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2468 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2469 if (last_insn == to)
2470 last_insn = PREV_INSN (from);
2471 if (first_insn == from)
2472 first_insn = NEXT_INSN (to);
2474 /* Make the new neighbors point to it and it to them. */
2475 if (NEXT_INSN (after))
2476 PREV_INSN (NEXT_INSN (after)) = to;
2478 NEXT_INSN (to) = NEXT_INSN (after);
2479 PREV_INSN (from) = after;
2480 NEXT_INSN (after) = from;
2481 if (after == last_insn)
2485 /* Return the line note insn preceding INSN. */
2488 find_line_note (insn)
2491 if (no_line_numbers)
2494 for (; insn; insn = PREV_INSN (insn))
2495 if (GET_CODE (insn) == NOTE
2496 && NOTE_LINE_NUMBER (insn) >= 0)
2502 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2503 of the moved insns when debugging. This may insert a note between AFTER
2504 and FROM, and another one after TO. */
2507 reorder_insns_with_line_notes (from, to, after)
2508 rtx from, to, after;
2510 rtx from_line = find_line_note (from);
2511 rtx after_line = find_line_note (after);
2513 reorder_insns (from, to, after);
2515 if (from_line == after_line)
2519 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2520 NOTE_LINE_NUMBER (from_line),
2523 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2524 NOTE_LINE_NUMBER (after_line),
2528 /* Emit an insn of given code and pattern
2529 at a specified place within the doubly-linked list. */
2531 /* Make an instruction with body PATTERN
2532 and output it before the instruction BEFORE. */
2535 emit_insn_before (pattern, before)
2536 register rtx pattern, before;
2538 register rtx insn = before;
2540 if (GET_CODE (pattern) == SEQUENCE)
2544 for (i = 0; i < XVECLEN (pattern, 0); i++)
2546 insn = XVECEXP (pattern, 0, i);
2547 add_insn_before (insn, before);
2549 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2550 sequence_result[XVECLEN (pattern, 0)] = pattern;
2554 insn = make_insn_raw (pattern);
2555 add_insn_before (insn, before);
2561 /* Make an instruction with body PATTERN and code JUMP_INSN
2562 and output it before the instruction BEFORE. */
2565 emit_jump_insn_before (pattern, before)
2566 register rtx pattern, before;
2570 if (GET_CODE (pattern) == SEQUENCE)
2571 insn = emit_insn_before (pattern, before);
2574 insn = make_jump_insn_raw (pattern);
2575 add_insn_before (insn, before);
2581 /* Make an instruction with body PATTERN and code CALL_INSN
2582 and output it before the instruction BEFORE. */
2585 emit_call_insn_before (pattern, before)
2586 register rtx pattern, before;
2590 if (GET_CODE (pattern) == SEQUENCE)
2591 insn = emit_insn_before (pattern, before);
2594 insn = make_call_insn_raw (pattern);
2595 add_insn_before (insn, before);
2596 PUT_CODE (insn, CALL_INSN);
2602 /* Make an insn of code BARRIER
2603 and output it before the insn AFTER. */
2606 emit_barrier_before (before)
2607 register rtx before;
2609 register rtx insn = rtx_alloc (BARRIER);
2611 INSN_UID (insn) = cur_insn_uid++;
2613 add_insn_before (insn, before);
2617 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2620 emit_note_before (subtype, before)
2624 register rtx note = rtx_alloc (NOTE);
2625 INSN_UID (note) = cur_insn_uid++;
2626 NOTE_SOURCE_FILE (note) = 0;
2627 NOTE_LINE_NUMBER (note) = subtype;
2629 add_insn_before (note, before);
2633 /* Make an insn of code INSN with body PATTERN
2634 and output it after the insn AFTER. */
2637 emit_insn_after (pattern, after)
2638 register rtx pattern, after;
2640 register rtx insn = after;
2642 if (GET_CODE (pattern) == SEQUENCE)
2646 for (i = 0; i < XVECLEN (pattern, 0); i++)
2648 insn = XVECEXP (pattern, 0, i);
2649 add_insn_after (insn, after);
2652 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2653 sequence_result[XVECLEN (pattern, 0)] = pattern;
2657 insn = make_insn_raw (pattern);
2658 add_insn_after (insn, after);
2664 /* Similar to emit_insn_after, except that line notes are to be inserted so
2665 as to act as if this insn were at FROM. */
2668 emit_insn_after_with_line_notes (pattern, after, from)
2669 rtx pattern, after, from;
2671 rtx from_line = find_line_note (from);
2672 rtx after_line = find_line_note (after);
2673 rtx insn = emit_insn_after (pattern, after);
2676 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2677 NOTE_LINE_NUMBER (from_line),
2681 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2682 NOTE_LINE_NUMBER (after_line),
2686 /* Make an insn of code JUMP_INSN with body PATTERN
2687 and output it after the insn AFTER. */
2690 emit_jump_insn_after (pattern, after)
2691 register rtx pattern, after;
2695 if (GET_CODE (pattern) == SEQUENCE)
2696 insn = emit_insn_after (pattern, after);
2699 insn = make_jump_insn_raw (pattern);
2700 add_insn_after (insn, after);
2706 /* Make an insn of code BARRIER
2707 and output it after the insn AFTER. */
2710 emit_barrier_after (after)
2713 register rtx insn = rtx_alloc (BARRIER);
2715 INSN_UID (insn) = cur_insn_uid++;
2717 add_insn_after (insn, after);
2721 /* Emit the label LABEL after the insn AFTER. */
2724 emit_label_after (label, after)
2727 /* This can be called twice for the same label
2728 as a result of the confusion that follows a syntax error!
2729 So make it harmless. */
2730 if (INSN_UID (label) == 0)
2732 INSN_UID (label) = cur_insn_uid++;
2733 add_insn_after (label, after);
2739 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2742 emit_note_after (subtype, after)
2746 register rtx note = rtx_alloc (NOTE);
2747 INSN_UID (note) = cur_insn_uid++;
2748 NOTE_SOURCE_FILE (note) = 0;
2749 NOTE_LINE_NUMBER (note) = subtype;
2750 add_insn_after (note, after);
2754 /* Emit a line note for FILE and LINE after the insn AFTER. */
2757 emit_line_note_after (file, line, after)
2764 if (no_line_numbers && line > 0)
2770 note = rtx_alloc (NOTE);
2771 INSN_UID (note) = cur_insn_uid++;
2772 NOTE_SOURCE_FILE (note) = file;
2773 NOTE_LINE_NUMBER (note) = line;
2774 add_insn_after (note, after);
2778 /* Make an insn of code INSN with pattern PATTERN
2779 and add it to the end of the doubly-linked list.
2780 If PATTERN is a SEQUENCE, take the elements of it
2781 and emit an insn for each element.
2783 Returns the last insn emitted. */
2789 rtx insn = last_insn;
2791 if (GET_CODE (pattern) == SEQUENCE)
2795 for (i = 0; i < XVECLEN (pattern, 0); i++)
2797 insn = XVECEXP (pattern, 0, i);
2800 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2801 sequence_result[XVECLEN (pattern, 0)] = pattern;
2805 insn = make_insn_raw (pattern);
2812 /* Emit the insns in a chain starting with INSN.
2813 Return the last insn emitted. */
2823 rtx next = NEXT_INSN (insn);
2832 /* Emit the insns in a chain starting with INSN and place them in front of
2833 the insn BEFORE. Return the last insn emitted. */
2836 emit_insns_before (insn, before)
2844 rtx next = NEXT_INSN (insn);
2845 add_insn_before (insn, before);
2853 /* Emit the insns in a chain starting with FIRST and place them in back of
2854 the insn AFTER. Return the last insn emitted. */
2857 emit_insns_after (first, after)
2862 register rtx after_after;
2870 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2873 after_after = NEXT_INSN (after);
2875 NEXT_INSN (after) = first;
2876 PREV_INSN (first) = after;
2877 NEXT_INSN (last) = after_after;
2879 PREV_INSN (after_after) = last;
2881 if (after == last_insn)
2886 /* Make an insn of code JUMP_INSN with pattern PATTERN
2887 and add it to the end of the doubly-linked list. */
2890 emit_jump_insn (pattern)
2893 if (GET_CODE (pattern) == SEQUENCE)
2894 return emit_insn (pattern);
2897 register rtx insn = make_jump_insn_raw (pattern);
2903 /* Make an insn of code CALL_INSN with pattern PATTERN
2904 and add it to the end of the doubly-linked list. */
2907 emit_call_insn (pattern)
2910 if (GET_CODE (pattern) == SEQUENCE)
2911 return emit_insn (pattern);
2914 register rtx insn = make_call_insn_raw (pattern);
2916 PUT_CODE (insn, CALL_INSN);
2921 /* Add the label LABEL to the end of the doubly-linked list. */
2927 /* This can be called twice for the same label
2928 as a result of the confusion that follows a syntax error!
2929 So make it harmless. */
2930 if (INSN_UID (label) == 0)
2932 INSN_UID (label) = cur_insn_uid++;
2938 /* Make an insn of code BARRIER
2939 and add it to the end of the doubly-linked list. */
2944 register rtx barrier = rtx_alloc (BARRIER);
2945 INSN_UID (barrier) = cur_insn_uid++;
2950 /* Make an insn of code NOTE
2951 with data-fields specified by FILE and LINE
2952 and add it to the end of the doubly-linked list,
2953 but only if line-numbers are desired for debugging info. */
2956 emit_line_note (file, line)
2960 emit_filename = file;
2964 if (no_line_numbers)
2968 return emit_note (file, line);
2971 /* Make an insn of code NOTE
2972 with data-fields specified by FILE and LINE
2973 and add it to the end of the doubly-linked list.
2974 If it is a line-number NOTE, omit it if it matches the previous one. */
2977 emit_note (file, line)
2985 if (file && last_filename && !strcmp (file, last_filename)
2986 && line == last_linenum)
2988 last_filename = file;
2989 last_linenum = line;
2992 if (no_line_numbers && line > 0)
2998 note = rtx_alloc (NOTE);
2999 INSN_UID (note) = cur_insn_uid++;
3000 NOTE_SOURCE_FILE (note) = file;
3001 NOTE_LINE_NUMBER (note) = line;
3006 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
3009 emit_line_note_force (file, line)
3014 return emit_line_note (file, line);
3017 /* Cause next statement to emit a line note even if the line number
3018 has not changed. This is used at the beginning of a function. */
3021 force_next_line_note ()
3026 /* Return an indication of which type of insn should have X as a body.
3027 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3033 if (GET_CODE (x) == CODE_LABEL)
3035 if (GET_CODE (x) == CALL)
3037 if (GET_CODE (x) == RETURN)
3039 if (GET_CODE (x) == SET)
3041 if (SET_DEST (x) == pc_rtx)
3043 else if (GET_CODE (SET_SRC (x)) == CALL)
3048 if (GET_CODE (x) == PARALLEL)
3051 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3052 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3054 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3055 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3057 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3058 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3064 /* Emit the rtl pattern X as an appropriate kind of insn.
3065 If X is a label, it is simply added into the insn chain. */
3071 enum rtx_code code = classify_insn (x);
3073 if (code == CODE_LABEL)
3074 return emit_label (x);
3075 else if (code == INSN)
3076 return emit_insn (x);
3077 else if (code == JUMP_INSN)
3079 register rtx insn = emit_jump_insn (x);
3080 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3081 return emit_barrier ();
3084 else if (code == CALL_INSN)
3085 return emit_call_insn (x);
3090 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3095 struct sequence_stack *tem;
3097 if (sequence_element_free_list)
3099 /* Reuse a previously-saved struct sequence_stack. */
3100 tem = sequence_element_free_list;
3101 sequence_element_free_list = tem->next;
3104 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3106 tem->next = sequence_stack;
3107 tem->first = first_insn;
3108 tem->last = last_insn;
3109 tem->sequence_rtl_expr = sequence_rtl_expr;
3111 sequence_stack = tem;
3117 /* Similarly, but indicate that this sequence will be placed in
3121 start_sequence_for_rtl_expr (t)
3126 sequence_rtl_expr = t;
3129 /* Set up the insn chain starting with FIRST
3130 as the current sequence, saving the previously current one. */
3133 push_to_sequence (first)
3140 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3146 /* Set up the outer-level insn chain
3147 as the current sequence, saving the previously current one. */
3150 push_topmost_sequence ()
3152 struct sequence_stack *stack, *top = NULL;
3156 for (stack = sequence_stack; stack; stack = stack->next)
3159 first_insn = top->first;
3160 last_insn = top->last;
3161 sequence_rtl_expr = top->sequence_rtl_expr;
3164 /* After emitting to the outer-level insn chain, update the outer-level
3165 insn chain, and restore the previous saved state. */
3168 pop_topmost_sequence ()
3170 struct sequence_stack *stack, *top = NULL;
3172 for (stack = sequence_stack; stack; stack = stack->next)
3175 top->first = first_insn;
3176 top->last = last_insn;
3177 /* ??? Why don't we save sequence_rtl_expr here? */
3182 /* After emitting to a sequence, restore previous saved state.
3184 To get the contents of the sequence just made,
3185 you must call `gen_sequence' *before* calling here. */
3190 struct sequence_stack *tem = sequence_stack;
3192 first_insn = tem->first;
3193 last_insn = tem->last;
3194 sequence_rtl_expr = tem->sequence_rtl_expr;
3195 sequence_stack = tem->next;
3197 tem->next = sequence_element_free_list;
3198 sequence_element_free_list = tem;
3201 /* Return 1 if currently emitting into a sequence. */
3206 return sequence_stack != 0;
3209 /* Generate a SEQUENCE rtx containing the insns already emitted
3210 to the current sequence.
3212 This is how the gen_... function from a DEFINE_EXPAND
3213 constructs the SEQUENCE that it returns. */
3223 /* Count the insns in the chain. */
3225 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3228 /* If only one insn, return its pattern rather than a SEQUENCE.
3229 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3230 the case of an empty list.) */
3232 && ! RTX_FRAME_RELATED_P (first_insn)
3233 && (GET_CODE (first_insn) == INSN
3234 || GET_CODE (first_insn) == JUMP_INSN
3235 /* Don't discard the call usage field. */
3236 || (GET_CODE (first_insn) == CALL_INSN
3237 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3239 NEXT_INSN (first_insn) = free_insn;
3240 free_insn = first_insn;
3241 return PATTERN (first_insn);
3244 /* Put them in a vector. See if we already have a SEQUENCE of the
3245 appropriate length around. */
3246 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3247 sequence_result[len] = 0;
3250 /* Ensure that this rtl goes in saveable_obstack, since we may
3252 push_obstacks_nochange ();
3253 rtl_in_saveable_obstack ();
3254 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3258 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3259 XVECEXP (result, 0, i) = tem;
3264 /* Initialize data structures and variables in this file
3265 before generating rtl for each function. */
3274 sequence_rtl_expr = NULL;
3276 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3279 first_label_num = label_num;
3281 sequence_stack = NULL;
3283 /* Clear the start_sequence/gen_sequence cache. */
3284 sequence_element_free_list = 0;
3285 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3286 sequence_result[i] = 0;
3289 /* Init the tables that describe all the pseudo regs. */
3291 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3294 = (char *) savealloc (regno_pointer_flag_length);
3295 bzero (regno_pointer_flag, regno_pointer_flag_length);
3298 = (char *) savealloc (regno_pointer_flag_length);
3299 bzero (regno_pointer_align, regno_pointer_flag_length);
3302 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3303 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3305 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3306 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3307 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3308 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3309 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3311 /* Indicate that the virtual registers and stack locations are
3313 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3314 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3315 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3316 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3318 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3319 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3320 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3321 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3323 #ifdef STACK_BOUNDARY
3324 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3325 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3326 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3327 = STACK_BOUNDARY / BITS_PER_UNIT;
3328 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3330 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3331 = STACK_BOUNDARY / BITS_PER_UNIT;
3332 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3333 = STACK_BOUNDARY / BITS_PER_UNIT;
3334 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3335 = STACK_BOUNDARY / BITS_PER_UNIT;
3336 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3337 = STACK_BOUNDARY / BITS_PER_UNIT;
3340 #ifdef INIT_EXPANDERS
3345 /* Create some permanent unique rtl objects shared between all functions.
3346 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3349 init_emit_once (line_numbers)
3353 enum machine_mode mode;
3355 no_line_numbers = ! line_numbers;
3357 sequence_stack = NULL;
3359 /* Compute the word and byte modes. */
3361 byte_mode = VOIDmode;
3362 word_mode = VOIDmode;
3364 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3365 mode = GET_MODE_WIDER_MODE (mode))
3367 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3368 && byte_mode == VOIDmode)
3371 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3372 && word_mode == VOIDmode)
3376 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3378 /* Create the unique rtx's for certain rtx codes and operand values. */
3380 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3382 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3383 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3384 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3387 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3388 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3389 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3391 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3393 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3394 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3395 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3396 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3398 for (i = 0; i <= 2; i++)
3400 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3401 mode = GET_MODE_WIDER_MODE (mode))
3403 rtx tem = rtx_alloc (CONST_DOUBLE);
3404 union real_extract u;
3406 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3407 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3409 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3410 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3411 PUT_MODE (tem, mode);
3413 const_tiny_rtx[i][(int) mode] = tem;
3416 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3418 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3419 mode = GET_MODE_WIDER_MODE (mode))
3420 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3422 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3424 mode = GET_MODE_WIDER_MODE (mode))
3425 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3428 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3429 mode = GET_MODE_WIDER_MODE (mode))
3430 const_tiny_rtx[0][(int) mode] = const0_rtx;
3433 /* Assign register numbers to the globally defined register rtx.
3434 This must be done at runtime because the register number field
3435 is in a union and some compilers can't initialize unions. */
3437 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3438 PUT_MODE (stack_pointer_rtx, Pmode);
3439 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3440 PUT_MODE (frame_pointer_rtx, Pmode);
3441 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3442 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3443 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3445 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3446 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3447 PUT_MODE (arg_pointer_rtx, Pmode);
3450 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3451 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3452 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3453 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3454 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3455 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3456 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3457 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3459 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3460 return_address_pointer_rtx
3461 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3465 struct_value_rtx = STRUCT_VALUE;
3467 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3470 #ifdef STRUCT_VALUE_INCOMING
3471 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3473 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3474 struct_value_incoming_rtx
3475 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3477 struct_value_incoming_rtx = struct_value_rtx;
3481 #ifdef STATIC_CHAIN_REGNUM
3482 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3484 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3485 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3486 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3489 static_chain_incoming_rtx = static_chain_rtx;
3493 static_chain_rtx = STATIC_CHAIN;
3495 #ifdef STATIC_CHAIN_INCOMING
3496 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3498 static_chain_incoming_rtx = static_chain_rtx;
3502 #ifdef PIC_OFFSET_TABLE_REGNUM
3503 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3507 /* Query and clear/ restore no_line_numbers. This is used by the
3508 switch / case handling in stmt.c to give proper line numbers in
3509 warnings about unreachable code. */
3512 force_line_numbers ()
3514 int old = no_line_numbers;
3516 no_line_numbers = 0;
3518 force_next_line_note ();
3523 restore_line_number_status (old_value)
3526 no_line_numbers = old_value;