1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
64 /* Commonly used modes. */
66 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
67 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
68 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
69 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
71 /* Datastructures maintained for currently processed function in RTL form. */
73 struct rtl_data x_rtl;
75 /* Indexed by pseudo register number, gives the rtx for that pseudo.
76 Allocated in parallel with regno_pointer_align.
77 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
78 with length attribute nested in top level structures. */
82 /* This is *not* reset after each function. It gives each CODE_LABEL
83 in the entire compilation a unique label number. */
85 static GTY(()) int label_num = 1;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl[GR_MAX];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
108 REAL_VALUE_TYPE dconst0;
109 REAL_VALUE_TYPE dconst1;
110 REAL_VALUE_TYPE dconst2;
111 REAL_VALUE_TYPE dconstm1;
112 REAL_VALUE_TYPE dconsthalf;
114 /* Record fixed-point constant 0 and 1. */
115 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
116 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
118 /* All references to the following fixed hard registers go through
119 these unique rtl objects. On machines where the frame-pointer and
120 arg-pointer are the same register, they use the same unique object.
122 After register allocation, other rtl objects which used to be pseudo-regs
123 may be clobbered to refer to the frame-pointer register.
124 But references that were originally to the frame-pointer can be
125 distinguished from the others because they contain frame_pointer_rtx.
127 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
128 tricky: until register elimination has taken place hard_frame_pointer_rtx
129 should be used if it is being set, and frame_pointer_rtx otherwise. After
130 register elimination hard_frame_pointer_rtx should always be used.
131 On machines where the two registers are same (most) then these are the
134 In an inline procedure, the stack and frame pointer rtxs may not be
135 used for anything else. */
136 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
138 /* This is used to implement __builtin_return_address for some machines.
139 See for instance the MIPS port. */
140 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
142 /* We make one copy of (const_int C) where C is in
143 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
144 to save space during the compilation and simplify comparisons of
147 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
149 /* A hash table storing CONST_INTs whose absolute value is greater
150 than MAX_SAVED_CONST_INT. */
152 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
153 htab_t const_int_htab;
155 /* A hash table storing memory attribute structures. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
157 htab_t mem_attrs_htab;
159 /* A hash table storing register attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
161 htab_t reg_attrs_htab;
163 /* A hash table storing all CONST_DOUBLEs. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
165 htab_t const_double_htab;
167 /* A hash table storing all CONST_FIXEDs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_fixed_htab;
171 #define first_insn (crtl->emit.x_first_insn)
172 #define last_insn (crtl->emit.x_last_insn)
173 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
174 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
175 #define last_location (crtl->emit.x_last_location)
176 #define first_label_num (crtl->emit.x_first_label_num)
178 static rtx make_call_insn_raw (rtx);
179 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
180 static void set_used_decls (tree);
181 static void mark_label_nuses (rtx);
182 static hashval_t const_int_htab_hash (const void *);
183 static int const_int_htab_eq (const void *, const void *);
184 static hashval_t const_double_htab_hash (const void *);
185 static int const_double_htab_eq (const void *, const void *);
186 static rtx lookup_const_double (rtx);
187 static hashval_t const_fixed_htab_hash (const void *);
188 static int const_fixed_htab_eq (const void *, const void *);
189 static rtx lookup_const_fixed (rtx);
190 static hashval_t mem_attrs_htab_hash (const void *);
191 static int mem_attrs_htab_eq (const void *, const void *);
192 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
193 addr_space_t, enum machine_mode);
194 static hashval_t reg_attrs_htab_hash (const void *);
195 static int reg_attrs_htab_eq (const void *, const void *);
196 static reg_attrs *get_reg_attrs (tree, int);
197 static rtx gen_const_vector (enum machine_mode, int);
198 static void copy_rtx_if_shared_1 (rtx *orig);
200 /* Probability of the conditional branch currently proceeded by try_split.
201 Set to -1 otherwise. */
202 int split_branch_probability = -1;
204 /* Returns a hash code for X (which is a really a CONST_INT). */
207 const_int_htab_hash (const void *x)
209 return (hashval_t) INTVAL ((const_rtx) x);
212 /* Returns nonzero if the value represented by X (which is really a
213 CONST_INT) is the same as that given by Y (which is really a
217 const_int_htab_eq (const void *x, const void *y)
219 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
222 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
224 const_double_htab_hash (const void *x)
226 const_rtx const value = (const_rtx) x;
229 if (GET_MODE (value) == VOIDmode)
230 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
233 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
234 /* MODE is used in the comparison, so it should be in the hash. */
235 h ^= GET_MODE (value);
240 /* Returns nonzero if the value represented by X (really a ...)
241 is the same as that represented by Y (really a ...) */
243 const_double_htab_eq (const void *x, const void *y)
245 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
247 if (GET_MODE (a) != GET_MODE (b))
249 if (GET_MODE (a) == VOIDmode)
250 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
251 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
253 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
254 CONST_DOUBLE_REAL_VALUE (b));
257 /* Returns a hash code for X (which is really a CONST_FIXED). */
260 const_fixed_htab_hash (const void *x)
262 const_rtx const value = (const_rtx) x;
265 h = fixed_hash (CONST_FIXED_VALUE (value));
266 /* MODE is used in the comparison, so it should be in the hash. */
267 h ^= GET_MODE (value);
271 /* Returns nonzero if the value represented by X (really a ...)
272 is the same as that represented by Y (really a ...). */
275 const_fixed_htab_eq (const void *x, const void *y)
277 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
279 if (GET_MODE (a) != GET_MODE (b))
281 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
284 /* Returns a hash code for X (which is a really a mem_attrs *). */
287 mem_attrs_htab_hash (const void *x)
289 const mem_attrs *const p = (const mem_attrs *) x;
291 return (p->alias ^ (p->align * 1000)
292 ^ (p->addrspace * 4000)
293 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
294 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
295 ^ (size_t) iterative_hash_expr (p->expr, 0));
298 /* Returns nonzero if the value represented by X (which is really a
299 mem_attrs *) is the same as that given by Y (which is also really a
303 mem_attrs_htab_eq (const void *x, const void *y)
305 const mem_attrs *const p = (const mem_attrs *) x;
306 const mem_attrs *const q = (const mem_attrs *) y;
308 return (p->alias == q->alias && p->offset == q->offset
309 && p->size == q->size && p->align == q->align
310 && p->addrspace == q->addrspace
311 && (p->expr == q->expr
312 || (p->expr != NULL_TREE && q->expr != NULL_TREE
313 && operand_equal_p (p->expr, q->expr, 0))));
316 /* Allocate a new mem_attrs structure and insert it into the hash table if
317 one identical to it is not already in the table. We are doing this for
321 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
322 unsigned int align, addr_space_t addrspace, enum machine_mode mode)
327 /* If everything is the default, we can just return zero.
328 This must match what the corresponding MEM_* macros return when the
329 field is not present. */
330 if (alias == 0 && expr == 0 && offset == 0 && addrspace == 0
332 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
333 && (STRICT_ALIGNMENT && mode != BLKmode
334 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
339 attrs.offset = offset;
342 attrs.addrspace = addrspace;
344 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
347 *slot = ggc_alloc (sizeof (mem_attrs));
348 memcpy (*slot, &attrs, sizeof (mem_attrs));
351 return (mem_attrs *) *slot;
354 /* Returns a hash code for X (which is a really a reg_attrs *). */
357 reg_attrs_htab_hash (const void *x)
359 const reg_attrs *const p = (const reg_attrs *) x;
361 return ((p->offset * 1000) ^ (long) p->decl);
364 /* Returns nonzero if the value represented by X (which is really a
365 reg_attrs *) is the same as that given by Y (which is also really a
369 reg_attrs_htab_eq (const void *x, const void *y)
371 const reg_attrs *const p = (const reg_attrs *) x;
372 const reg_attrs *const q = (const reg_attrs *) y;
374 return (p->decl == q->decl && p->offset == q->offset);
376 /* Allocate a new reg_attrs structure and insert it into the hash table if
377 one identical to it is not already in the table. We are doing this for
381 get_reg_attrs (tree decl, int offset)
386 /* If everything is the default, we can just return zero. */
387 if (decl == 0 && offset == 0)
391 attrs.offset = offset;
393 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
396 *slot = ggc_alloc (sizeof (reg_attrs));
397 memcpy (*slot, &attrs, sizeof (reg_attrs));
400 return (reg_attrs *) *slot;
405 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
411 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
412 MEM_VOLATILE_P (x) = true;
418 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
419 don't attempt to share with the various global pieces of rtl (such as
420 frame_pointer_rtx). */
423 gen_raw_REG (enum machine_mode mode, int regno)
425 rtx x = gen_rtx_raw_REG (mode, regno);
426 ORIGINAL_REGNO (x) = regno;
430 /* There are some RTL codes that require special attention; the generation
431 functions do the raw handling. If you add to this list, modify
432 special_rtx in gengenrtl.c as well. */
435 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
439 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
440 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
442 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
443 if (const_true_rtx && arg == STORE_FLAG_VALUE)
444 return const_true_rtx;
447 /* Look up the CONST_INT in the hash table. */
448 slot = htab_find_slot_with_hash (const_int_htab, &arg,
449 (hashval_t) arg, INSERT);
451 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
457 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
459 return GEN_INT (trunc_int_for_mode (c, mode));
462 /* CONST_DOUBLEs might be created from pairs of integers, or from
463 REAL_VALUE_TYPEs. Also, their length is known only at run time,
464 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
466 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
467 hash table. If so, return its counterpart; otherwise add it
468 to the hash table and return it. */
470 lookup_const_double (rtx real)
472 void **slot = htab_find_slot (const_double_htab, real, INSERT);
479 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
480 VALUE in mode MODE. */
482 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
484 rtx real = rtx_alloc (CONST_DOUBLE);
485 PUT_MODE (real, mode);
489 return lookup_const_double (real);
492 /* Determine whether FIXED, a CONST_FIXED, already exists in the
493 hash table. If so, return its counterpart; otherwise add it
494 to the hash table and return it. */
497 lookup_const_fixed (rtx fixed)
499 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
506 /* Return a CONST_FIXED rtx for a fixed-point value specified by
507 VALUE in mode MODE. */
510 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
512 rtx fixed = rtx_alloc (CONST_FIXED);
513 PUT_MODE (fixed, mode);
517 return lookup_const_fixed (fixed);
520 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
521 of ints: I0 is the low-order word and I1 is the high-order word.
522 Do not use this routine for non-integer modes; convert to
523 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
526 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
531 /* There are the following cases (note that there are no modes with
532 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
534 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
536 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
537 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
538 from copies of the sign bit, and sign of i0 and i1 are the same), then
539 we return a CONST_INT for i0.
540 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
541 if (mode != VOIDmode)
543 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
544 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
545 /* We can get a 0 for an error mark. */
546 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
547 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
549 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
550 return gen_int_mode (i0, mode);
552 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
555 /* If this integer fits in one word, return a CONST_INT. */
556 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
559 /* We use VOIDmode for integers. */
560 value = rtx_alloc (CONST_DOUBLE);
561 PUT_MODE (value, VOIDmode);
563 CONST_DOUBLE_LOW (value) = i0;
564 CONST_DOUBLE_HIGH (value) = i1;
566 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
567 XWINT (value, i) = 0;
569 return lookup_const_double (value);
573 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
575 /* In case the MD file explicitly references the frame pointer, have
576 all such references point to the same frame pointer. This is
577 used during frame pointer elimination to distinguish the explicit
578 references to these registers from pseudos that happened to be
581 If we have eliminated the frame pointer or arg pointer, we will
582 be using it as a normal register, for example as a spill
583 register. In such cases, we might be accessing it in a mode that
584 is not Pmode and therefore cannot use the pre-allocated rtx.
586 Also don't do this when we are making new REGs in reload, since
587 we don't want to get confused with the real pointers. */
589 if (mode == Pmode && !reload_in_progress)
591 if (regno == FRAME_POINTER_REGNUM
592 && (!reload_completed || frame_pointer_needed))
593 return frame_pointer_rtx;
594 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
595 if (regno == HARD_FRAME_POINTER_REGNUM
596 && (!reload_completed || frame_pointer_needed))
597 return hard_frame_pointer_rtx;
599 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
600 if (regno == ARG_POINTER_REGNUM)
601 return arg_pointer_rtx;
603 #ifdef RETURN_ADDRESS_POINTER_REGNUM
604 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
605 return return_address_pointer_rtx;
607 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
608 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
609 return pic_offset_table_rtx;
610 if (regno == STACK_POINTER_REGNUM)
611 return stack_pointer_rtx;
615 /* If the per-function register table has been set up, try to re-use
616 an existing entry in that table to avoid useless generation of RTL.
618 This code is disabled for now until we can fix the various backends
619 which depend on having non-shared hard registers in some cases. Long
620 term we want to re-enable this code as it can significantly cut down
621 on the amount of useless RTL that gets generated.
623 We'll also need to fix some code that runs after reload that wants to
624 set ORIGINAL_REGNO. */
629 && regno < FIRST_PSEUDO_REGISTER
630 && reg_raw_mode[regno] == mode)
631 return regno_reg_rtx[regno];
634 return gen_raw_REG (mode, regno);
638 gen_rtx_MEM (enum machine_mode mode, rtx addr)
640 rtx rt = gen_rtx_raw_MEM (mode, addr);
642 /* This field is not cleared by the mere allocation of the rtx, so
649 /* Generate a memory referring to non-trapping constant memory. */
652 gen_const_mem (enum machine_mode mode, rtx addr)
654 rtx mem = gen_rtx_MEM (mode, addr);
655 MEM_READONLY_P (mem) = 1;
656 MEM_NOTRAP_P (mem) = 1;
660 /* Generate a MEM referring to fixed portions of the frame, e.g., register
664 gen_frame_mem (enum machine_mode mode, rtx addr)
666 rtx mem = gen_rtx_MEM (mode, addr);
667 MEM_NOTRAP_P (mem) = 1;
668 set_mem_alias_set (mem, get_frame_alias_set ());
672 /* Generate a MEM referring to a temporary use of the stack, not part
673 of the fixed stack frame. For example, something which is pushed
674 by a target splitter. */
676 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
678 rtx mem = gen_rtx_MEM (mode, addr);
679 MEM_NOTRAP_P (mem) = 1;
680 if (!cfun->calls_alloca)
681 set_mem_alias_set (mem, get_frame_alias_set ());
685 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
686 this construct would be valid, and false otherwise. */
689 validate_subreg (enum machine_mode omode, enum machine_mode imode,
690 const_rtx reg, unsigned int offset)
692 unsigned int isize = GET_MODE_SIZE (imode);
693 unsigned int osize = GET_MODE_SIZE (omode);
695 /* All subregs must be aligned. */
696 if (offset % osize != 0)
699 /* The subreg offset cannot be outside the inner object. */
703 /* ??? This should not be here. Temporarily continue to allow word_mode
704 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
705 Generally, backends are doing something sketchy but it'll take time to
707 if (omode == word_mode)
709 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
710 is the culprit here, and not the backends. */
711 else if (osize >= UNITS_PER_WORD && isize >= osize)
713 /* Allow component subregs of complex and vector. Though given the below
714 extraction rules, it's not always clear what that means. */
715 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
716 && GET_MODE_INNER (imode) == omode)
718 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
719 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
720 represent this. It's questionable if this ought to be represented at
721 all -- why can't this all be hidden in post-reload splitters that make
722 arbitrarily mode changes to the registers themselves. */
723 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
725 /* Subregs involving floating point modes are not allowed to
726 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
727 (subreg:SI (reg:DF) 0) isn't. */
728 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
734 /* Paradoxical subregs must have offset zero. */
738 /* This is a normal subreg. Verify that the offset is representable. */
740 /* For hard registers, we already have most of these rules collected in
741 subreg_offset_representable_p. */
742 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
744 unsigned int regno = REGNO (reg);
746 #ifdef CANNOT_CHANGE_MODE_CLASS
747 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
748 && GET_MODE_INNER (imode) == omode)
750 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
754 return subreg_offset_representable_p (regno, imode, offset, omode);
757 /* For pseudo registers, we want most of the same checks. Namely:
758 If the register no larger than a word, the subreg must be lowpart.
759 If the register is larger than a word, the subreg must be the lowpart
760 of a subword. A subreg does *not* perform arbitrary bit extraction.
761 Given that we've already checked mode/offset alignment, we only have
762 to check subword subregs here. */
763 if (osize < UNITS_PER_WORD)
765 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
766 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
767 if (offset % UNITS_PER_WORD != low_off)
774 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
776 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
777 return gen_rtx_raw_SUBREG (mode, reg, offset);
780 /* Generate a SUBREG representing the least-significant part of REG if MODE
781 is smaller than mode of REG, otherwise paradoxical SUBREG. */
784 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
786 enum machine_mode inmode;
788 inmode = GET_MODE (reg);
789 if (inmode == VOIDmode)
791 return gen_rtx_SUBREG (mode, reg,
792 subreg_lowpart_offset (mode, inmode));
796 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
799 gen_rtvec (int n, ...)
807 /* Don't allocate an empty rtvec... */
811 rt_val = rtvec_alloc (n);
813 for (i = 0; i < n; i++)
814 rt_val->elem[i] = va_arg (p, rtx);
821 gen_rtvec_v (int n, rtx *argp)
826 /* Don't allocate an empty rtvec... */
830 rt_val = rtvec_alloc (n);
832 for (i = 0; i < n; i++)
833 rt_val->elem[i] = *argp++;
838 /* Return the number of bytes between the start of an OUTER_MODE
839 in-memory value and the start of an INNER_MODE in-memory value,
840 given that the former is a lowpart of the latter. It may be a
841 paradoxical lowpart, in which case the offset will be negative
842 on big-endian targets. */
845 byte_lowpart_offset (enum machine_mode outer_mode,
846 enum machine_mode inner_mode)
848 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
849 return subreg_lowpart_offset (outer_mode, inner_mode);
851 return -subreg_lowpart_offset (inner_mode, outer_mode);
854 /* Generate a REG rtx for a new pseudo register of mode MODE.
855 This pseudo is assigned the next sequential register number. */
858 gen_reg_rtx (enum machine_mode mode)
861 unsigned int align = GET_MODE_ALIGNMENT (mode);
863 gcc_assert (can_create_pseudo_p ());
865 /* If a virtual register with bigger mode alignment is generated,
866 increase stack alignment estimation because it might be spilled
868 if (SUPPORTS_STACK_ALIGNMENT
869 && crtl->stack_alignment_estimated < align
870 && !crtl->stack_realign_processed)
872 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
873 if (crtl->stack_alignment_estimated < min_align)
874 crtl->stack_alignment_estimated = min_align;
877 if (generating_concat_p
878 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
879 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
881 /* For complex modes, don't make a single pseudo.
882 Instead, make a CONCAT of two pseudos.
883 This allows noncontiguous allocation of the real and imaginary parts,
884 which makes much better code. Besides, allocating DCmode
885 pseudos overstrains reload on some machines like the 386. */
886 rtx realpart, imagpart;
887 enum machine_mode partmode = GET_MODE_INNER (mode);
889 realpart = gen_reg_rtx (partmode);
890 imagpart = gen_reg_rtx (partmode);
891 return gen_rtx_CONCAT (mode, realpart, imagpart);
894 /* Make sure regno_pointer_align, and regno_reg_rtx are large
895 enough to have an element for this pseudo reg number. */
897 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
899 int old_size = crtl->emit.regno_pointer_align_length;
903 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
904 memset (tmp + old_size, 0, old_size);
905 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
907 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
908 memset (new1 + old_size, 0, old_size * sizeof (rtx));
909 regno_reg_rtx = new1;
911 crtl->emit.regno_pointer_align_length = old_size * 2;
914 val = gen_raw_REG (mode, reg_rtx_no);
915 regno_reg_rtx[reg_rtx_no++] = val;
919 /* Update NEW with the same attributes as REG, but with OFFSET added
920 to the REG_OFFSET. */
923 update_reg_offset (rtx new_rtx, rtx reg, int offset)
925 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
926 REG_OFFSET (reg) + offset);
929 /* Generate a register with same attributes as REG, but with OFFSET
930 added to the REG_OFFSET. */
933 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
936 rtx new_rtx = gen_rtx_REG (mode, regno);
938 update_reg_offset (new_rtx, reg, offset);
942 /* Generate a new pseudo-register with the same attributes as REG, but
943 with OFFSET added to the REG_OFFSET. */
946 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
948 rtx new_rtx = gen_reg_rtx (mode);
950 update_reg_offset (new_rtx, reg, offset);
954 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
955 new register is a (possibly paradoxical) lowpart of the old one. */
958 adjust_reg_mode (rtx reg, enum machine_mode mode)
960 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
961 PUT_MODE (reg, mode);
964 /* Copy REG's attributes from X, if X has any attributes. If REG and X
965 have different modes, REG is a (possibly paradoxical) lowpart of X. */
968 set_reg_attrs_from_value (rtx reg, rtx x)
972 /* Hard registers can be reused for multiple purposes within the same
973 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
975 if (HARD_REGISTER_P (reg))
978 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
981 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
983 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
985 mark_reg_pointer (reg, 0);
990 update_reg_offset (reg, x, offset);
992 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
996 /* Generate a REG rtx for a new pseudo register, copying the mode
997 and attributes from X. */
1000 gen_reg_rtx_and_attrs (rtx x)
1002 rtx reg = gen_reg_rtx (GET_MODE (x));
1003 set_reg_attrs_from_value (reg, x);
1007 /* Set the register attributes for registers contained in PARM_RTX.
1008 Use needed values from memory attributes of MEM. */
1011 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1013 if (REG_P (parm_rtx))
1014 set_reg_attrs_from_value (parm_rtx, mem);
1015 else if (GET_CODE (parm_rtx) == PARALLEL)
1017 /* Check for a NULL entry in the first slot, used to indicate that the
1018 parameter goes both on the stack and in registers. */
1019 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1020 for (; i < XVECLEN (parm_rtx, 0); i++)
1022 rtx x = XVECEXP (parm_rtx, 0, i);
1023 if (REG_P (XEXP (x, 0)))
1024 REG_ATTRS (XEXP (x, 0))
1025 = get_reg_attrs (MEM_EXPR (mem),
1026 INTVAL (XEXP (x, 1)));
1031 /* Set the REG_ATTRS for registers in value X, given that X represents
1035 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1037 if (GET_CODE (x) == SUBREG)
1039 gcc_assert (subreg_lowpart_p (x));
1044 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1046 if (GET_CODE (x) == CONCAT)
1048 if (REG_P (XEXP (x, 0)))
1049 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1050 if (REG_P (XEXP (x, 1)))
1051 REG_ATTRS (XEXP (x, 1))
1052 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1054 if (GET_CODE (x) == PARALLEL)
1058 /* Check for a NULL entry, used to indicate that the parameter goes
1059 both on the stack and in registers. */
1060 if (XEXP (XVECEXP (x, 0, 0), 0))
1065 for (i = start; i < XVECLEN (x, 0); i++)
1067 rtx y = XVECEXP (x, 0, i);
1068 if (REG_P (XEXP (y, 0)))
1069 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1074 /* Assign the RTX X to declaration T. */
1077 set_decl_rtl (tree t, rtx x)
1079 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1081 set_reg_attrs_for_decl_rtl (t, x);
1084 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1085 if the ABI requires the parameter to be passed by reference. */
1088 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1090 DECL_INCOMING_RTL (t) = x;
1091 if (x && !by_reference_p)
1092 set_reg_attrs_for_decl_rtl (t, x);
1095 /* Identify REG (which may be a CONCAT) as a user register. */
1098 mark_user_reg (rtx reg)
1100 if (GET_CODE (reg) == CONCAT)
1102 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1103 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1107 gcc_assert (REG_P (reg));
1108 REG_USERVAR_P (reg) = 1;
1112 /* Identify REG as a probable pointer register and show its alignment
1113 as ALIGN, if nonzero. */
1116 mark_reg_pointer (rtx reg, int align)
1118 if (! REG_POINTER (reg))
1120 REG_POINTER (reg) = 1;
1123 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1125 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1126 /* We can no-longer be sure just how aligned this pointer is. */
1127 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1130 /* Return 1 plus largest pseudo reg number used in the current function. */
1138 /* Return 1 + the largest label number used so far in the current function. */
1141 max_label_num (void)
1146 /* Return first label number used in this function (if any were used). */
1149 get_first_label_num (void)
1151 return first_label_num;
1154 /* If the rtx for label was created during the expansion of a nested
1155 function, then first_label_num won't include this label number.
1156 Fix this now so that array indices work later. */
1159 maybe_set_first_label_num (rtx x)
1161 if (CODE_LABEL_NUMBER (x) < first_label_num)
1162 first_label_num = CODE_LABEL_NUMBER (x);
1165 /* Return a value representing some low-order bits of X, where the number
1166 of low-order bits is given by MODE. Note that no conversion is done
1167 between floating-point and fixed-point values, rather, the bit
1168 representation is returned.
1170 This function handles the cases in common between gen_lowpart, below,
1171 and two variants in cse.c and combine.c. These are the cases that can
1172 be safely handled at all points in the compilation.
1174 If this is not a case we can handle, return 0. */
1177 gen_lowpart_common (enum machine_mode mode, rtx x)
1179 int msize = GET_MODE_SIZE (mode);
1182 enum machine_mode innermode;
1184 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1185 so we have to make one up. Yuk. */
1186 innermode = GET_MODE (x);
1188 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1189 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1190 else if (innermode == VOIDmode)
1191 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1193 xsize = GET_MODE_SIZE (innermode);
1195 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1197 if (innermode == mode)
1200 /* MODE must occupy no more words than the mode of X. */
1201 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1202 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1205 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1206 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1209 offset = subreg_lowpart_offset (mode, innermode);
1211 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1212 && (GET_MODE_CLASS (mode) == MODE_INT
1213 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1215 /* If we are getting the low-order part of something that has been
1216 sign- or zero-extended, we can either just use the object being
1217 extended or make a narrower extension. If we want an even smaller
1218 piece than the size of the object being extended, call ourselves
1221 This case is used mostly by combine and cse. */
1223 if (GET_MODE (XEXP (x, 0)) == mode)
1225 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1226 return gen_lowpart_common (mode, XEXP (x, 0));
1227 else if (msize < xsize)
1228 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1230 else if (GET_CODE (x) == SUBREG || REG_P (x)
1231 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1232 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1233 return simplify_gen_subreg (mode, x, innermode, offset);
1235 /* Otherwise, we can't do this. */
1240 gen_highpart (enum machine_mode mode, rtx x)
1242 unsigned int msize = GET_MODE_SIZE (mode);
1245 /* This case loses if X is a subreg. To catch bugs early,
1246 complain if an invalid MODE is used even in other cases. */
1247 gcc_assert (msize <= UNITS_PER_WORD
1248 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1250 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1251 subreg_highpart_offset (mode, GET_MODE (x)));
1252 gcc_assert (result);
1254 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1255 the target if we have a MEM. gen_highpart must return a valid operand,
1256 emitting code if necessary to do so. */
1259 result = validize_mem (result);
1260 gcc_assert (result);
1266 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1267 be VOIDmode constant. */
1269 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1271 if (GET_MODE (exp) != VOIDmode)
1273 gcc_assert (GET_MODE (exp) == innermode);
1274 return gen_highpart (outermode, exp);
1276 return simplify_gen_subreg (outermode, exp, innermode,
1277 subreg_highpart_offset (outermode, innermode));
1280 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1283 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1285 unsigned int offset = 0;
1286 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1290 if (WORDS_BIG_ENDIAN)
1291 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1292 if (BYTES_BIG_ENDIAN)
1293 offset += difference % UNITS_PER_WORD;
1299 /* Return offset in bytes to get OUTERMODE high part
1300 of the value in mode INNERMODE stored in memory in target format. */
1302 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1304 unsigned int offset = 0;
1305 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1307 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1311 if (! WORDS_BIG_ENDIAN)
1312 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1313 if (! BYTES_BIG_ENDIAN)
1314 offset += difference % UNITS_PER_WORD;
1320 /* Return 1 iff X, assumed to be a SUBREG,
1321 refers to the least significant part of its containing reg.
1322 If X is not a SUBREG, always return 1 (it is its own low part!). */
1325 subreg_lowpart_p (const_rtx x)
1327 if (GET_CODE (x) != SUBREG)
1329 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1332 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1333 == SUBREG_BYTE (x));
1336 /* Return subword OFFSET of operand OP.
1337 The word number, OFFSET, is interpreted as the word number starting
1338 at the low-order address. OFFSET 0 is the low-order word if not
1339 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1341 If we cannot extract the required word, we return zero. Otherwise,
1342 an rtx corresponding to the requested word will be returned.
1344 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1345 reload has completed, a valid address will always be returned. After
1346 reload, if a valid address cannot be returned, we return zero.
1348 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1349 it is the responsibility of the caller.
1351 MODE is the mode of OP in case it is a CONST_INT.
1353 ??? This is still rather broken for some cases. The problem for the
1354 moment is that all callers of this thing provide no 'goal mode' to
1355 tell us to work with. This exists because all callers were written
1356 in a word based SUBREG world.
1357 Now use of this function can be deprecated by simplify_subreg in most
1362 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1364 if (mode == VOIDmode)
1365 mode = GET_MODE (op);
1367 gcc_assert (mode != VOIDmode);
1369 /* If OP is narrower than a word, fail. */
1371 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1374 /* If we want a word outside OP, return zero. */
1376 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1379 /* Form a new MEM at the requested address. */
1382 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1384 if (! validate_address)
1387 else if (reload_completed)
1389 if (! strict_memory_address_addr_space_p (word_mode,
1391 MEM_ADDR_SPACE (op)))
1395 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1398 /* Rest can be handled by simplify_subreg. */
1399 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1402 /* Similar to `operand_subword', but never return 0. If we can't
1403 extract the required subword, put OP into a register and try again.
1404 The second attempt must succeed. We always validate the address in
1407 MODE is the mode of OP, in case it is CONST_INT. */
1410 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1412 rtx result = operand_subword (op, offset, 1, mode);
1417 if (mode != BLKmode && mode != VOIDmode)
1419 /* If this is a register which can not be accessed by words, copy it
1420 to a pseudo register. */
1422 op = copy_to_reg (op);
1424 op = force_reg (mode, op);
1427 result = operand_subword (op, offset, 1, mode);
1428 gcc_assert (result);
1433 /* Returns 1 if both MEM_EXPR can be considered equal
1437 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1442 if (! expr1 || ! expr2)
1445 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1448 return operand_equal_p (expr1, expr2, 0);
1451 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1452 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1456 get_mem_align_offset (rtx mem, unsigned int align)
1459 unsigned HOST_WIDE_INT offset;
1461 /* This function can't use
1462 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1463 || !CONST_INT_P (MEM_OFFSET (mem))
1464 || (get_object_alignment (MEM_EXPR (mem), MEM_ALIGN (mem), align)
1468 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1470 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1471 for <variable>. get_inner_reference doesn't handle it and
1472 even if it did, the alignment in that case needs to be determined
1473 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1474 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1475 isn't sufficiently aligned, the object it is in might be. */
1476 gcc_assert (MEM_P (mem));
1477 expr = MEM_EXPR (mem);
1478 if (expr == NULL_TREE
1479 || MEM_OFFSET (mem) == NULL_RTX
1480 || !CONST_INT_P (MEM_OFFSET (mem)))
1483 offset = INTVAL (MEM_OFFSET (mem));
1486 if (DECL_ALIGN (expr) < align)
1489 else if (INDIRECT_REF_P (expr))
1491 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1494 else if (TREE_CODE (expr) == COMPONENT_REF)
1498 tree inner = TREE_OPERAND (expr, 0);
1499 tree field = TREE_OPERAND (expr, 1);
1500 tree byte_offset = component_ref_field_offset (expr);
1501 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1504 || !host_integerp (byte_offset, 1)
1505 || !host_integerp (bit_offset, 1))
1508 offset += tree_low_cst (byte_offset, 1);
1509 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1511 if (inner == NULL_TREE)
1513 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1514 < (unsigned int) align)
1518 else if (DECL_P (inner))
1520 if (DECL_ALIGN (inner) < align)
1524 else if (TREE_CODE (inner) != COMPONENT_REF)
1532 return offset & ((align / BITS_PER_UNIT) - 1);
1535 /* Given REF (a MEM) and T, either the type of X or the expression
1536 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1537 if we are making a new object of this type. BITPOS is nonzero if
1538 there is an offset outstanding on T that will be applied later. */
1541 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1542 HOST_WIDE_INT bitpos)
1544 alias_set_type alias = MEM_ALIAS_SET (ref);
1545 tree expr = MEM_EXPR (ref);
1546 rtx offset = MEM_OFFSET (ref);
1547 rtx size = MEM_SIZE (ref);
1548 unsigned int align = MEM_ALIGN (ref);
1549 HOST_WIDE_INT apply_bitpos = 0;
1552 /* It can happen that type_for_mode was given a mode for which there
1553 is no language-level type. In which case it returns NULL, which
1558 type = TYPE_P (t) ? t : TREE_TYPE (t);
1559 if (type == error_mark_node)
1562 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1563 wrong answer, as it assumes that DECL_RTL already has the right alias
1564 info. Callers should not set DECL_RTL until after the call to
1565 set_mem_attributes. */
1566 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1568 /* Get the alias set from the expression or type (perhaps using a
1569 front-end routine) and use it. */
1570 alias = get_alias_set (t);
1572 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1573 MEM_IN_STRUCT_P (ref)
1574 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1575 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1577 /* If we are making an object of this type, or if this is a DECL, we know
1578 that it is a scalar if the type is not an aggregate. */
1579 if ((objectp || DECL_P (t))
1580 && ! AGGREGATE_TYPE_P (type)
1581 && TREE_CODE (type) != COMPLEX_TYPE)
1582 MEM_SCALAR_P (ref) = 1;
1584 /* We can set the alignment from the type if we are making an object,
1585 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1586 if (objectp || TREE_CODE (t) == INDIRECT_REF
1587 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1588 || TYPE_ALIGN_OK (type))
1589 align = MAX (align, TYPE_ALIGN (type));
1591 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1593 if (integer_zerop (TREE_OPERAND (t, 1)))
1594 /* We don't know anything about the alignment. */
1595 align = BITS_PER_UNIT;
1597 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1600 /* If the size is known, we can set that. */
1601 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1602 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1604 /* If T is not a type, we may be able to deduce some more information about
1609 bool align_computed = false;
1611 if (TREE_THIS_VOLATILE (t))
1612 MEM_VOLATILE_P (ref) = 1;
1614 /* Now remove any conversions: they don't change what the underlying
1615 object is. Likewise for SAVE_EXPR. */
1616 while (CONVERT_EXPR_P (t)
1617 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1618 || TREE_CODE (t) == SAVE_EXPR)
1619 t = TREE_OPERAND (t, 0);
1621 /* We may look through structure-like accesses for the purposes of
1622 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1624 while (TREE_CODE (base) == COMPONENT_REF
1625 || TREE_CODE (base) == REALPART_EXPR
1626 || TREE_CODE (base) == IMAGPART_EXPR
1627 || TREE_CODE (base) == BIT_FIELD_REF)
1628 base = TREE_OPERAND (base, 0);
1632 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1633 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1635 MEM_NOTRAP_P (ref) = 1;
1638 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1640 base = get_base_address (base);
1641 if (base && DECL_P (base)
1642 && TREE_READONLY (base)
1643 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1645 tree base_type = TREE_TYPE (base);
1646 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1647 || DECL_ARTIFICIAL (base));
1648 MEM_READONLY_P (ref) = 1;
1651 /* If this expression uses it's parent's alias set, mark it such
1652 that we won't change it. */
1653 if (component_uses_parent_alias_set (t))
1654 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1656 /* If this is a decl, set the attributes of the MEM from it. */
1660 offset = const0_rtx;
1661 apply_bitpos = bitpos;
1662 size = (DECL_SIZE_UNIT (t)
1663 && host_integerp (DECL_SIZE_UNIT (t), 1)
1664 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1665 align = DECL_ALIGN (t);
1666 align_computed = true;
1669 /* If this is a constant, we know the alignment. */
1670 else if (CONSTANT_CLASS_P (t))
1672 align = TYPE_ALIGN (type);
1673 #ifdef CONSTANT_ALIGNMENT
1674 align = CONSTANT_ALIGNMENT (t, align);
1676 align_computed = true;
1679 /* If this is a field reference and not a bit-field, record it. */
1680 /* ??? There is some information that can be gleaned from bit-fields,
1681 such as the word offset in the structure that might be modified.
1682 But skip it for now. */
1683 else if (TREE_CODE (t) == COMPONENT_REF
1684 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1687 offset = const0_rtx;
1688 apply_bitpos = bitpos;
1689 /* ??? Any reason the field size would be different than
1690 the size we got from the type? */
1693 /* If this is an array reference, look for an outer field reference. */
1694 else if (TREE_CODE (t) == ARRAY_REF)
1696 tree off_tree = size_zero_node;
1697 /* We can't modify t, because we use it at the end of the
1703 tree index = TREE_OPERAND (t2, 1);
1704 tree low_bound = array_ref_low_bound (t2);
1705 tree unit_size = array_ref_element_size (t2);
1707 /* We assume all arrays have sizes that are a multiple of a byte.
1708 First subtract the lower bound, if any, in the type of the
1709 index, then convert to sizetype and multiply by the size of
1710 the array element. */
1711 if (! integer_zerop (low_bound))
1712 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1715 off_tree = size_binop (PLUS_EXPR,
1716 size_binop (MULT_EXPR,
1717 fold_convert (sizetype,
1721 t2 = TREE_OPERAND (t2, 0);
1723 while (TREE_CODE (t2) == ARRAY_REF);
1729 if (host_integerp (off_tree, 1))
1731 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1732 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1733 align = DECL_ALIGN (t2);
1734 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1736 align_computed = true;
1737 offset = GEN_INT (ioff);
1738 apply_bitpos = bitpos;
1741 else if (TREE_CODE (t2) == COMPONENT_REF)
1745 if (host_integerp (off_tree, 1))
1747 offset = GEN_INT (tree_low_cst (off_tree, 1));
1748 apply_bitpos = bitpos;
1750 /* ??? Any reason the field size would be different than
1751 the size we got from the type? */
1754 else if (flag_argument_noalias > 1
1755 && (INDIRECT_REF_P (t2))
1756 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1762 /* If this is an indirect reference, record it. */
1763 else if (TREE_CODE (t) == INDIRECT_REF
1764 || TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1767 offset = const0_rtx;
1768 apply_bitpos = bitpos;
1772 /* If this is a Fortran indirect argument reference, record the
1774 else if (flag_argument_noalias > 1
1775 && (INDIRECT_REF_P (t))
1776 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1782 /* If this is an indirect reference, record it. */
1783 else if (TREE_CODE (t) == INDIRECT_REF
1784 || TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1787 offset = const0_rtx;
1788 apply_bitpos = bitpos;
1791 if (!align_computed && !INDIRECT_REF_P (t))
1793 unsigned int obj_align
1794 = get_object_alignment (t, align, BIGGEST_ALIGNMENT);
1795 align = MAX (align, obj_align);
1799 /* If we modified OFFSET based on T, then subtract the outstanding
1800 bit position offset. Similarly, increase the size of the accessed
1801 object to contain the negative offset. */
1804 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1806 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1809 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1811 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1812 we're overlapping. */
1817 /* Now set the attributes we computed above. */
1819 = get_mem_attrs (alias, expr, offset, size, align,
1820 TYPE_ADDR_SPACE (type), GET_MODE (ref));
1822 /* If this is already known to be a scalar or aggregate, we are done. */
1823 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1826 /* If it is a reference into an aggregate, this is part of an aggregate.
1827 Otherwise we don't know. */
1828 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1829 || TREE_CODE (t) == ARRAY_RANGE_REF
1830 || TREE_CODE (t) == BIT_FIELD_REF)
1831 MEM_IN_STRUCT_P (ref) = 1;
1835 set_mem_attributes (rtx ref, tree t, int objectp)
1837 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1840 /* Set the alias set of MEM to SET. */
1843 set_mem_alias_set (rtx mem, alias_set_type set)
1845 #ifdef ENABLE_CHECKING
1846 /* If the new and old alias sets don't conflict, something is wrong. */
1847 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1850 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1851 MEM_SIZE (mem), MEM_ALIGN (mem),
1852 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1855 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1858 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1860 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1861 MEM_OFFSET (mem), MEM_SIZE (mem),
1862 MEM_ALIGN (mem), addrspace, GET_MODE (mem));
1865 /* Set the alignment of MEM to ALIGN bits. */
1868 set_mem_align (rtx mem, unsigned int align)
1870 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1871 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1872 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1875 /* Set the expr for MEM to EXPR. */
1878 set_mem_expr (rtx mem, tree expr)
1881 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1882 MEM_SIZE (mem), MEM_ALIGN (mem),
1883 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1886 /* Set the offset of MEM to OFFSET. */
1889 set_mem_offset (rtx mem, rtx offset)
1891 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1892 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1893 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1896 /* Set the size of MEM to SIZE. */
1899 set_mem_size (rtx mem, rtx size)
1901 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1902 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1903 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1906 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1907 and its address changed to ADDR. (VOIDmode means don't change the mode.
1908 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1909 returned memory location is required to be valid. The memory
1910 attributes are not changed. */
1913 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1918 gcc_assert (MEM_P (memref));
1919 as = MEM_ADDR_SPACE (memref);
1920 if (mode == VOIDmode)
1921 mode = GET_MODE (memref);
1923 addr = XEXP (memref, 0);
1924 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1925 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1930 if (reload_in_progress || reload_completed)
1931 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1933 addr = memory_address_addr_space (mode, addr, as);
1936 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1939 new_rtx = gen_rtx_MEM (mode, addr);
1940 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1944 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1945 way we are changing MEMREF, so we only preserve the alias set. */
1948 change_address (rtx memref, enum machine_mode mode, rtx addr)
1950 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1951 enum machine_mode mmode = GET_MODE (new_rtx);
1954 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1955 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1957 /* If there are no changes, just return the original memory reference. */
1958 if (new_rtx == memref)
1960 if (MEM_ATTRS (memref) == 0
1961 || (MEM_EXPR (memref) == NULL
1962 && MEM_OFFSET (memref) == NULL
1963 && MEM_SIZE (memref) == size
1964 && MEM_ALIGN (memref) == align))
1967 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1968 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1972 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align,
1973 MEM_ADDR_SPACE (memref), mmode);
1978 /* Return a memory reference like MEMREF, but with its mode changed
1979 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1980 nonzero, the memory address is forced to be valid.
1981 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1982 and caller is responsible for adjusting MEMREF base register. */
1985 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1986 int validate, int adjust)
1988 rtx addr = XEXP (memref, 0);
1990 rtx memoffset = MEM_OFFSET (memref);
1992 unsigned int memalign = MEM_ALIGN (memref);
1993 addr_space_t as = MEM_ADDR_SPACE (memref);
1994 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
1997 /* If there are no changes, just return the original memory reference. */
1998 if (mode == GET_MODE (memref) && !offset
1999 && (!validate || memory_address_addr_space_p (mode, addr, as)))
2002 /* ??? Prefer to create garbage instead of creating shared rtl.
2003 This may happen even if offset is nonzero -- consider
2004 (plus (plus reg reg) const_int) -- so do this always. */
2005 addr = copy_rtx (addr);
2007 /* Convert a possibly large offset to a signed value within the
2008 range of the target address space. */
2009 pbits = GET_MODE_BITSIZE (address_mode);
2010 if (HOST_BITS_PER_WIDE_INT > pbits)
2012 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2013 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2019 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2020 object, we can merge it into the LO_SUM. */
2021 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2023 && (unsigned HOST_WIDE_INT) offset
2024 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2025 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2026 plus_constant (XEXP (addr, 1), offset));
2028 addr = plus_constant (addr, offset);
2031 new_rtx = change_address_1 (memref, mode, addr, validate);
2033 /* If the address is a REG, change_address_1 rightfully returns memref,
2034 but this would destroy memref's MEM_ATTRS. */
2035 if (new_rtx == memref && offset != 0)
2036 new_rtx = copy_rtx (new_rtx);
2038 /* Compute the new values of the memory attributes due to this adjustment.
2039 We add the offsets and update the alignment. */
2041 memoffset = GEN_INT (offset + INTVAL (memoffset));
2043 /* Compute the new alignment by taking the MIN of the alignment and the
2044 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2049 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2051 /* We can compute the size in a number of ways. */
2052 if (GET_MODE (new_rtx) != BLKmode)
2053 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2054 else if (MEM_SIZE (memref))
2055 size = plus_constant (MEM_SIZE (memref), -offset);
2057 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2058 memoffset, size, memalign, as,
2059 GET_MODE (new_rtx));
2061 /* At some point, we should validate that this offset is within the object,
2062 if all the appropriate values are known. */
2066 /* Return a memory reference like MEMREF, but with its mode changed
2067 to MODE and its address changed to ADDR, which is assumed to be
2068 MEMREF offset by OFFSET bytes. If VALIDATE is
2069 nonzero, the memory address is forced to be valid. */
2072 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2073 HOST_WIDE_INT offset, int validate)
2075 memref = change_address_1 (memref, VOIDmode, addr, validate);
2076 return adjust_address_1 (memref, mode, offset, validate, 0);
2079 /* Return a memory reference like MEMREF, but whose address is changed by
2080 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2081 known to be in OFFSET (possibly 1). */
2084 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2086 rtx new_rtx, addr = XEXP (memref, 0);
2087 addr_space_t as = MEM_ADDR_SPACE (memref);
2088 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
2090 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2092 /* At this point we don't know _why_ the address is invalid. It
2093 could have secondary memory references, multiplies or anything.
2095 However, if we did go and rearrange things, we can wind up not
2096 being able to recognize the magic around pic_offset_table_rtx.
2097 This stuff is fragile, and is yet another example of why it is
2098 bad to expose PIC machinery too early. */
2099 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx, as)
2100 && GET_CODE (addr) == PLUS
2101 && XEXP (addr, 0) == pic_offset_table_rtx)
2103 addr = force_reg (GET_MODE (addr), addr);
2104 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2107 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2108 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2110 /* If there are no changes, just return the original memory reference. */
2111 if (new_rtx == memref)
2114 /* Update the alignment to reflect the offset. Reset the offset, which
2117 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2118 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2119 as, GET_MODE (new_rtx));
2123 /* Return a memory reference like MEMREF, but with its address changed to
2124 ADDR. The caller is asserting that the actual piece of memory pointed
2125 to is the same, just the form of the address is being changed, such as
2126 by putting something into a register. */
2129 replace_equiv_address (rtx memref, rtx addr)
2131 /* change_address_1 copies the memory attribute structure without change
2132 and that's exactly what we want here. */
2133 update_temp_slot_address (XEXP (memref, 0), addr);
2134 return change_address_1 (memref, VOIDmode, addr, 1);
2137 /* Likewise, but the reference is not required to be valid. */
2140 replace_equiv_address_nv (rtx memref, rtx addr)
2142 return change_address_1 (memref, VOIDmode, addr, 0);
2145 /* Return a memory reference like MEMREF, but with its mode widened to
2146 MODE and offset by OFFSET. This would be used by targets that e.g.
2147 cannot issue QImode memory operations and have to use SImode memory
2148 operations plus masking logic. */
2151 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2153 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2154 tree expr = MEM_EXPR (new_rtx);
2155 rtx memoffset = MEM_OFFSET (new_rtx);
2156 unsigned int size = GET_MODE_SIZE (mode);
2158 /* If there are no changes, just return the original memory reference. */
2159 if (new_rtx == memref)
2162 /* If we don't know what offset we were at within the expression, then
2163 we can't know if we've overstepped the bounds. */
2169 if (TREE_CODE (expr) == COMPONENT_REF)
2171 tree field = TREE_OPERAND (expr, 1);
2172 tree offset = component_ref_field_offset (expr);
2174 if (! DECL_SIZE_UNIT (field))
2180 /* Is the field at least as large as the access? If so, ok,
2181 otherwise strip back to the containing structure. */
2182 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2183 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2184 && INTVAL (memoffset) >= 0)
2187 if (! host_integerp (offset, 1))
2193 expr = TREE_OPERAND (expr, 0);
2195 = (GEN_INT (INTVAL (memoffset)
2196 + tree_low_cst (offset, 1)
2197 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2200 /* Similarly for the decl. */
2201 else if (DECL_P (expr)
2202 && DECL_SIZE_UNIT (expr)
2203 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2204 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2205 && (! memoffset || INTVAL (memoffset) >= 0))
2209 /* The widened memory access overflows the expression, which means
2210 that it could alias another expression. Zap it. */
2217 memoffset = NULL_RTX;
2219 /* The widened memory may alias other stuff, so zap the alias set. */
2220 /* ??? Maybe use get_alias_set on any remaining expression. */
2222 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2223 MEM_ALIGN (new_rtx),
2224 MEM_ADDR_SPACE (new_rtx), mode);
2229 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2230 static GTY(()) tree spill_slot_decl;
2233 get_spill_slot_decl (bool force_build_p)
2235 tree d = spill_slot_decl;
2238 if (d || !force_build_p)
2241 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2242 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2243 DECL_ARTIFICIAL (d) = 1;
2244 DECL_IGNORED_P (d) = 1;
2246 TREE_THIS_NOTRAP (d) = 1;
2247 spill_slot_decl = d;
2249 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2250 MEM_NOTRAP_P (rd) = 1;
2251 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2252 NULL_RTX, 0, ADDR_SPACE_GENERIC, BLKmode);
2253 SET_DECL_RTL (d, rd);
2258 /* Given MEM, a result from assign_stack_local, fill in the memory
2259 attributes as appropriate for a register allocator spill slot.
2260 These slots are not aliasable by other memory. We arrange for
2261 them all to use a single MEM_EXPR, so that the aliasing code can
2262 work properly in the case of shared spill slots. */
2265 set_mem_attrs_for_spill (rtx mem)
2267 alias_set_type alias;
2271 expr = get_spill_slot_decl (true);
2272 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2274 /* We expect the incoming memory to be of the form:
2275 (mem:MODE (plus (reg sfp) (const_int offset)))
2276 with perhaps the plus missing for offset = 0. */
2277 addr = XEXP (mem, 0);
2278 offset = const0_rtx;
2279 if (GET_CODE (addr) == PLUS
2280 && CONST_INT_P (XEXP (addr, 1)))
2281 offset = XEXP (addr, 1);
2283 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2284 MEM_SIZE (mem), MEM_ALIGN (mem),
2285 ADDR_SPACE_GENERIC, GET_MODE (mem));
2286 MEM_NOTRAP_P (mem) = 1;
2289 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2292 gen_label_rtx (void)
2294 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2295 NULL, label_num++, NULL);
2298 /* For procedure integration. */
2300 /* Install new pointers to the first and last insns in the chain.
2301 Also, set cur_insn_uid to one higher than the last in use.
2302 Used for an inline-procedure after copying the insn chain. */
2305 set_new_first_and_last_insn (rtx first, rtx last)
2313 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2315 int debug_count = 0;
2317 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2318 cur_debug_insn_uid = 0;
2320 for (insn = first; insn; insn = NEXT_INSN (insn))
2321 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2322 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2325 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2326 if (DEBUG_INSN_P (insn))
2331 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2333 cur_debug_insn_uid++;
2336 for (insn = first; insn; insn = NEXT_INSN (insn))
2337 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2342 /* Go through all the RTL insn bodies and copy any invalid shared
2343 structure. This routine should only be called once. */
2346 unshare_all_rtl_1 (rtx insn)
2348 /* Unshare just about everything else. */
2349 unshare_all_rtl_in_chain (insn);
2351 /* Make sure the addresses of stack slots found outside the insn chain
2352 (such as, in DECL_RTL of a variable) are not shared
2353 with the insn chain.
2355 This special care is necessary when the stack slot MEM does not
2356 actually appear in the insn chain. If it does appear, its address
2357 is unshared from all else at that point. */
2358 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2361 /* Go through all the RTL insn bodies and copy any invalid shared
2362 structure, again. This is a fairly expensive thing to do so it
2363 should be done sparingly. */
2366 unshare_all_rtl_again (rtx insn)
2371 for (p = insn; p; p = NEXT_INSN (p))
2374 reset_used_flags (PATTERN (p));
2375 reset_used_flags (REG_NOTES (p));
2378 /* Make sure that virtual stack slots are not shared. */
2379 set_used_decls (DECL_INITIAL (cfun->decl));
2381 /* Make sure that virtual parameters are not shared. */
2382 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2383 set_used_flags (DECL_RTL (decl));
2385 reset_used_flags (stack_slot_list);
2387 unshare_all_rtl_1 (insn);
2391 unshare_all_rtl (void)
2393 unshare_all_rtl_1 (get_insns ());
2397 struct rtl_opt_pass pass_unshare_all_rtl =
2401 "unshare", /* name */
2403 unshare_all_rtl, /* execute */
2406 0, /* static_pass_number */
2407 TV_NONE, /* tv_id */
2408 0, /* properties_required */
2409 0, /* properties_provided */
2410 0, /* properties_destroyed */
2411 0, /* todo_flags_start */
2412 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2417 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2418 Recursively does the same for subexpressions. */
2421 verify_rtx_sharing (rtx orig, rtx insn)
2426 const char *format_ptr;
2431 code = GET_CODE (x);
2433 /* These types may be freely shared. */
2451 /* SCRATCH must be shared because they represent distinct values. */
2453 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2458 if (shared_const_p (orig))
2463 /* A MEM is allowed to be shared if its address is constant. */
2464 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2465 || reload_completed || reload_in_progress)
2474 /* This rtx may not be shared. If it has already been seen,
2475 replace it with a copy of itself. */
2476 #ifdef ENABLE_CHECKING
2477 if (RTX_FLAG (x, used))
2479 error ("invalid rtl sharing found in the insn");
2481 error ("shared rtx");
2483 internal_error ("internal consistency failure");
2486 gcc_assert (!RTX_FLAG (x, used));
2488 RTX_FLAG (x, used) = 1;
2490 /* Now scan the subexpressions recursively. */
2492 format_ptr = GET_RTX_FORMAT (code);
2494 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2496 switch (*format_ptr++)
2499 verify_rtx_sharing (XEXP (x, i), insn);
2503 if (XVEC (x, i) != NULL)
2506 int len = XVECLEN (x, i);
2508 for (j = 0; j < len; j++)
2510 /* We allow sharing of ASM_OPERANDS inside single
2512 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2513 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2515 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2517 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2526 /* Go through all the RTL insn bodies and check that there is no unexpected
2527 sharing in between the subexpressions. */
2530 verify_rtl_sharing (void)
2534 for (p = get_insns (); p; p = NEXT_INSN (p))
2537 reset_used_flags (PATTERN (p));
2538 reset_used_flags (REG_NOTES (p));
2539 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2542 rtx q, sequence = PATTERN (p);
2544 for (i = 0; i < XVECLEN (sequence, 0); i++)
2546 q = XVECEXP (sequence, 0, i);
2547 gcc_assert (INSN_P (q));
2548 reset_used_flags (PATTERN (q));
2549 reset_used_flags (REG_NOTES (q));
2554 for (p = get_insns (); p; p = NEXT_INSN (p))
2557 verify_rtx_sharing (PATTERN (p), p);
2558 verify_rtx_sharing (REG_NOTES (p), p);
2562 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2563 Assumes the mark bits are cleared at entry. */
2566 unshare_all_rtl_in_chain (rtx insn)
2568 for (; insn; insn = NEXT_INSN (insn))
2571 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2572 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2576 /* Go through all virtual stack slots of a function and mark them as
2577 shared. We never replace the DECL_RTLs themselves with a copy,
2578 but expressions mentioned into a DECL_RTL cannot be shared with
2579 expressions in the instruction stream.
2581 Note that reload may convert pseudo registers into memories in-place.
2582 Pseudo registers are always shared, but MEMs never are. Thus if we
2583 reset the used flags on MEMs in the instruction stream, we must set
2584 them again on MEMs that appear in DECL_RTLs. */
2587 set_used_decls (tree blk)
2592 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2593 if (DECL_RTL_SET_P (t))
2594 set_used_flags (DECL_RTL (t));
2596 /* Now process sub-blocks. */
2597 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2601 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2602 Recursively does the same for subexpressions. Uses
2603 copy_rtx_if_shared_1 to reduce stack space. */
2606 copy_rtx_if_shared (rtx orig)
2608 copy_rtx_if_shared_1 (&orig);
2612 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2613 use. Recursively does the same for subexpressions. */
2616 copy_rtx_if_shared_1 (rtx *orig1)
2622 const char *format_ptr;
2626 /* Repeat is used to turn tail-recursion into iteration. */
2633 code = GET_CODE (x);
2635 /* These types may be freely shared. */
2652 /* SCRATCH must be shared because they represent distinct values. */
2655 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2660 if (shared_const_p (x))
2670 /* The chain of insns is not being copied. */
2677 /* This rtx may not be shared. If it has already been seen,
2678 replace it with a copy of itself. */
2680 if (RTX_FLAG (x, used))
2682 x = shallow_copy_rtx (x);
2685 RTX_FLAG (x, used) = 1;
2687 /* Now scan the subexpressions recursively.
2688 We can store any replaced subexpressions directly into X
2689 since we know X is not shared! Any vectors in X
2690 must be copied if X was copied. */
2692 format_ptr = GET_RTX_FORMAT (code);
2693 length = GET_RTX_LENGTH (code);
2696 for (i = 0; i < length; i++)
2698 switch (*format_ptr++)
2702 copy_rtx_if_shared_1 (last_ptr);
2703 last_ptr = &XEXP (x, i);
2707 if (XVEC (x, i) != NULL)
2710 int len = XVECLEN (x, i);
2712 /* Copy the vector iff I copied the rtx and the length
2714 if (copied && len > 0)
2715 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2717 /* Call recursively on all inside the vector. */
2718 for (j = 0; j < len; j++)
2721 copy_rtx_if_shared_1 (last_ptr);
2722 last_ptr = &XVECEXP (x, i, j);
2737 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2738 to look for shared sub-parts. */
2741 reset_used_flags (rtx x)
2745 const char *format_ptr;
2748 /* Repeat is used to turn tail-recursion into iteration. */
2753 code = GET_CODE (x);
2755 /* These types may be freely shared so we needn't do any resetting
2780 /* The chain of insns is not being copied. */
2787 RTX_FLAG (x, used) = 0;
2789 format_ptr = GET_RTX_FORMAT (code);
2790 length = GET_RTX_LENGTH (code);
2792 for (i = 0; i < length; i++)
2794 switch (*format_ptr++)
2802 reset_used_flags (XEXP (x, i));
2806 for (j = 0; j < XVECLEN (x, i); j++)
2807 reset_used_flags (XVECEXP (x, i, j));
2813 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2814 to look for shared sub-parts. */
2817 set_used_flags (rtx x)
2821 const char *format_ptr;
2826 code = GET_CODE (x);
2828 /* These types may be freely shared so we needn't do any resetting
2853 /* The chain of insns is not being copied. */
2860 RTX_FLAG (x, used) = 1;
2862 format_ptr = GET_RTX_FORMAT (code);
2863 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2865 switch (*format_ptr++)
2868 set_used_flags (XEXP (x, i));
2872 for (j = 0; j < XVECLEN (x, i); j++)
2873 set_used_flags (XVECEXP (x, i, j));
2879 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2880 Return X or the rtx for the pseudo reg the value of X was copied into.
2881 OTHER must be valid as a SET_DEST. */
2884 make_safe_from (rtx x, rtx other)
2887 switch (GET_CODE (other))
2890 other = SUBREG_REG (other);
2892 case STRICT_LOW_PART:
2895 other = XEXP (other, 0);
2904 && GET_CODE (x) != SUBREG)
2906 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2907 || reg_mentioned_p (other, x))))
2909 rtx temp = gen_reg_rtx (GET_MODE (x));
2910 emit_move_insn (temp, x);
2916 /* Emission of insns (adding them to the doubly-linked list). */
2918 /* Return the first insn of the current sequence or current function. */
2926 /* Specify a new insn as the first in the chain. */
2929 set_first_insn (rtx insn)
2931 gcc_assert (!PREV_INSN (insn));
2935 /* Return the last insn emitted in current sequence or current function. */
2938 get_last_insn (void)
2943 /* Specify a new insn as the last in the chain. */
2946 set_last_insn (rtx insn)
2948 gcc_assert (!NEXT_INSN (insn));
2952 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2955 get_last_insn_anywhere (void)
2957 struct sequence_stack *stack;
2960 for (stack = seq_stack; stack; stack = stack->next)
2961 if (stack->last != 0)
2966 /* Return the first nonnote insn emitted in current sequence or current
2967 function. This routine looks inside SEQUENCEs. */
2970 get_first_nonnote_insn (void)
2972 rtx insn = first_insn;
2977 for (insn = next_insn (insn);
2978 insn && NOTE_P (insn);
2979 insn = next_insn (insn))
2983 if (NONJUMP_INSN_P (insn)
2984 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2985 insn = XVECEXP (PATTERN (insn), 0, 0);
2992 /* Return the last nonnote insn emitted in current sequence or current
2993 function. This routine looks inside SEQUENCEs. */
2996 get_last_nonnote_insn (void)
2998 rtx insn = last_insn;
3003 for (insn = previous_insn (insn);
3004 insn && NOTE_P (insn);
3005 insn = previous_insn (insn))
3009 if (NONJUMP_INSN_P (insn)
3010 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3011 insn = XVECEXP (PATTERN (insn), 0,
3012 XVECLEN (PATTERN (insn), 0) - 1);
3019 /* Return a number larger than any instruction's uid in this function. */
3024 return cur_insn_uid;
3027 /* Return the number of actual (non-debug) insns emitted in this
3031 get_max_insn_count (void)
3033 int n = cur_insn_uid;
3035 /* The table size must be stable across -g, to avoid codegen
3036 differences due to debug insns, and not be affected by
3037 -fmin-insn-uid, to avoid excessive table size and to simplify
3038 debugging of -fcompare-debug failures. */
3039 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3040 n -= cur_debug_insn_uid;
3042 n -= MIN_NONDEBUG_INSN_UID;
3048 /* Return the next insn. If it is a SEQUENCE, return the first insn
3052 next_insn (rtx insn)
3056 insn = NEXT_INSN (insn);
3057 if (insn && NONJUMP_INSN_P (insn)
3058 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3059 insn = XVECEXP (PATTERN (insn), 0, 0);
3065 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3069 previous_insn (rtx insn)
3073 insn = PREV_INSN (insn);
3074 if (insn && NONJUMP_INSN_P (insn)
3075 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3076 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3082 /* Return the next insn after INSN that is not a NOTE. This routine does not
3083 look inside SEQUENCEs. */
3086 next_nonnote_insn (rtx insn)
3090 insn = NEXT_INSN (insn);
3091 if (insn == 0 || !NOTE_P (insn))
3098 /* Return the next insn after INSN that is not a NOTE, but stop the
3099 search before we enter another basic block. This routine does not
3100 look inside SEQUENCEs. */
3103 next_nonnote_insn_bb (rtx insn)
3107 insn = NEXT_INSN (insn);
3108 if (insn == 0 || !NOTE_P (insn))
3110 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3117 /* Return the previous insn before INSN that is not a NOTE. This routine does
3118 not look inside SEQUENCEs. */
3121 prev_nonnote_insn (rtx insn)
3125 insn = PREV_INSN (insn);
3126 if (insn == 0 || !NOTE_P (insn))
3133 /* Return the previous insn before INSN that is not a NOTE, but stop
3134 the search before we enter another basic block. This routine does
3135 not look inside SEQUENCEs. */
3138 prev_nonnote_insn_bb (rtx insn)
3142 insn = PREV_INSN (insn);
3143 if (insn == 0 || !NOTE_P (insn))
3145 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3152 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3153 routine does not look inside SEQUENCEs. */
3156 next_nondebug_insn (rtx insn)
3160 insn = NEXT_INSN (insn);
3161 if (insn == 0 || !DEBUG_INSN_P (insn))
3168 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3169 This routine does not look inside SEQUENCEs. */
3172 prev_nondebug_insn (rtx insn)
3176 insn = PREV_INSN (insn);
3177 if (insn == 0 || !DEBUG_INSN_P (insn))
3184 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3185 or 0, if there is none. This routine does not look inside
3189 next_real_insn (rtx insn)
3193 insn = NEXT_INSN (insn);
3194 if (insn == 0 || INSN_P (insn))
3201 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3202 or 0, if there is none. This routine does not look inside
3206 prev_real_insn (rtx insn)
3210 insn = PREV_INSN (insn);
3211 if (insn == 0 || INSN_P (insn))
3218 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3219 This routine does not look inside SEQUENCEs. */
3222 last_call_insn (void)
3226 for (insn = get_last_insn ();
3227 insn && !CALL_P (insn);
3228 insn = PREV_INSN (insn))
3234 /* Find the next insn after INSN that really does something. This routine
3235 does not look inside SEQUENCEs. After reload this also skips over
3236 standalone USE and CLOBBER insn. */
3239 active_insn_p (const_rtx insn)
3241 return (CALL_P (insn) || JUMP_P (insn)
3242 || (NONJUMP_INSN_P (insn)
3243 && (! reload_completed
3244 || (GET_CODE (PATTERN (insn)) != USE
3245 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3249 next_active_insn (rtx insn)
3253 insn = NEXT_INSN (insn);
3254 if (insn == 0 || active_insn_p (insn))
3261 /* Find the last insn before INSN that really does something. This routine
3262 does not look inside SEQUENCEs. After reload this also skips over
3263 standalone USE and CLOBBER insn. */
3266 prev_active_insn (rtx insn)
3270 insn = PREV_INSN (insn);
3271 if (insn == 0 || active_insn_p (insn))
3278 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3281 next_label (rtx insn)
3285 insn = NEXT_INSN (insn);
3286 if (insn == 0 || LABEL_P (insn))
3293 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3296 prev_label (rtx insn)
3300 insn = PREV_INSN (insn);
3301 if (insn == 0 || LABEL_P (insn))
3308 /* Return the last label to mark the same position as LABEL. Return null
3309 if LABEL itself is null. */
3312 skip_consecutive_labels (rtx label)
3316 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3324 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3325 and REG_CC_USER notes so we can find it. */
3328 link_cc0_insns (rtx insn)
3330 rtx user = next_nonnote_insn (insn);
3332 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3333 user = XVECEXP (PATTERN (user), 0, 0);
3335 add_reg_note (user, REG_CC_SETTER, insn);
3336 add_reg_note (insn, REG_CC_USER, user);
3339 /* Return the next insn that uses CC0 after INSN, which is assumed to
3340 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3341 applied to the result of this function should yield INSN).
3343 Normally, this is simply the next insn. However, if a REG_CC_USER note
3344 is present, it contains the insn that uses CC0.
3346 Return 0 if we can't find the insn. */
3349 next_cc0_user (rtx insn)
3351 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3354 return XEXP (note, 0);
3356 insn = next_nonnote_insn (insn);
3357 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3358 insn = XVECEXP (PATTERN (insn), 0, 0);
3360 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3366 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3367 note, it is the previous insn. */
3370 prev_cc0_setter (rtx insn)
3372 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3375 return XEXP (note, 0);
3377 insn = prev_nonnote_insn (insn);
3378 gcc_assert (sets_cc0_p (PATTERN (insn)));
3385 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3388 find_auto_inc (rtx *xp, void *data)
3391 rtx reg = (rtx) data;
3393 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3396 switch (GET_CODE (x))
3404 if (rtx_equal_p (reg, XEXP (x, 0)))
3415 /* Increment the label uses for all labels present in rtx. */
3418 mark_label_nuses (rtx x)
3424 code = GET_CODE (x);
3425 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3426 LABEL_NUSES (XEXP (x, 0))++;
3428 fmt = GET_RTX_FORMAT (code);
3429 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3432 mark_label_nuses (XEXP (x, i));
3433 else if (fmt[i] == 'E')
3434 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3435 mark_label_nuses (XVECEXP (x, i, j));
3440 /* Try splitting insns that can be split for better scheduling.
3441 PAT is the pattern which might split.
3442 TRIAL is the insn providing PAT.
3443 LAST is nonzero if we should return the last insn of the sequence produced.
3445 If this routine succeeds in splitting, it returns the first or last
3446 replacement insn depending on the value of LAST. Otherwise, it
3447 returns TRIAL. If the insn to be returned can be split, it will be. */
3450 try_split (rtx pat, rtx trial, int last)
3452 rtx before = PREV_INSN (trial);
3453 rtx after = NEXT_INSN (trial);
3454 int has_barrier = 0;
3457 rtx insn_last, insn;
3460 /* We're not good at redistributing frame information. */
3461 if (RTX_FRAME_RELATED_P (trial))
3464 if (any_condjump_p (trial)
3465 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3466 split_branch_probability = INTVAL (XEXP (note, 0));
3467 probability = split_branch_probability;
3469 seq = split_insns (pat, trial);
3471 split_branch_probability = -1;
3473 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3474 We may need to handle this specially. */
3475 if (after && BARRIER_P (after))
3478 after = NEXT_INSN (after);
3484 /* Avoid infinite loop if any insn of the result matches
3485 the original pattern. */
3489 if (INSN_P (insn_last)
3490 && rtx_equal_p (PATTERN (insn_last), pat))
3492 if (!NEXT_INSN (insn_last))
3494 insn_last = NEXT_INSN (insn_last);
3497 /* We will be adding the new sequence to the function. The splitters
3498 may have introduced invalid RTL sharing, so unshare the sequence now. */
3499 unshare_all_rtl_in_chain (seq);
3502 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3506 mark_jump_label (PATTERN (insn), insn, 0);
3508 if (probability != -1
3509 && any_condjump_p (insn)
3510 && !find_reg_note (insn, REG_BR_PROB, 0))
3512 /* We can preserve the REG_BR_PROB notes only if exactly
3513 one jump is created, otherwise the machine description
3514 is responsible for this step using
3515 split_branch_probability variable. */
3516 gcc_assert (njumps == 1);
3517 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3522 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3523 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3526 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3529 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3532 *p = CALL_INSN_FUNCTION_USAGE (trial);
3533 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3535 /* Update the debug information for the CALL_INSN. */
3536 if (flag_enable_icf_debug)
3537 (*debug_hooks->copy_call_info) (trial, insn);
3541 /* Copy notes, particularly those related to the CFG. */
3542 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3544 switch (REG_NOTE_KIND (note))
3547 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3552 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3555 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3559 case REG_NON_LOCAL_GOTO:
3560 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3563 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3569 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3571 rtx reg = XEXP (note, 0);
3572 if (!FIND_REG_INC_NOTE (insn, reg)
3573 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3574 add_reg_note (insn, REG_INC, reg);
3584 /* If there are LABELS inside the split insns increment the
3585 usage count so we don't delete the label. */
3589 while (insn != NULL_RTX)
3591 /* JUMP_P insns have already been "marked" above. */
3592 if (NONJUMP_INSN_P (insn))
3593 mark_label_nuses (PATTERN (insn));
3595 insn = PREV_INSN (insn);
3599 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3601 delete_insn (trial);
3603 emit_barrier_after (tem);
3605 /* Recursively call try_split for each new insn created; by the
3606 time control returns here that insn will be fully split, so
3607 set LAST and continue from the insn after the one returned.
3608 We can't use next_active_insn here since AFTER may be a note.
3609 Ignore deleted insns, which can be occur if not optimizing. */
3610 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3611 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3612 tem = try_split (PATTERN (tem), tem, 1);
3614 /* Return either the first or the last insn, depending on which was
3617 ? (after ? PREV_INSN (after) : last_insn)
3618 : NEXT_INSN (before);
3621 /* Make and return an INSN rtx, initializing all its slots.
3622 Store PATTERN in the pattern slots. */
3625 make_insn_raw (rtx pattern)
3629 insn = rtx_alloc (INSN);
3631 INSN_UID (insn) = cur_insn_uid++;
3632 PATTERN (insn) = pattern;
3633 INSN_CODE (insn) = -1;
3634 REG_NOTES (insn) = NULL;
3635 INSN_LOCATOR (insn) = curr_insn_locator ();
3636 BLOCK_FOR_INSN (insn) = NULL;
3638 #ifdef ENABLE_RTL_CHECKING
3641 && (returnjump_p (insn)
3642 || (GET_CODE (insn) == SET
3643 && SET_DEST (insn) == pc_rtx)))
3645 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3653 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3656 make_debug_insn_raw (rtx pattern)
3660 insn = rtx_alloc (DEBUG_INSN);
3661 INSN_UID (insn) = cur_debug_insn_uid++;
3662 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3663 INSN_UID (insn) = cur_insn_uid++;
3665 PATTERN (insn) = pattern;
3666 INSN_CODE (insn) = -1;
3667 REG_NOTES (insn) = NULL;
3668 INSN_LOCATOR (insn) = curr_insn_locator ();
3669 BLOCK_FOR_INSN (insn) = NULL;
3674 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3677 make_jump_insn_raw (rtx pattern)
3681 insn = rtx_alloc (JUMP_INSN);
3682 INSN_UID (insn) = cur_insn_uid++;
3684 PATTERN (insn) = pattern;
3685 INSN_CODE (insn) = -1;
3686 REG_NOTES (insn) = NULL;
3687 JUMP_LABEL (insn) = NULL;
3688 INSN_LOCATOR (insn) = curr_insn_locator ();
3689 BLOCK_FOR_INSN (insn) = NULL;
3694 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3697 make_call_insn_raw (rtx pattern)
3701 insn = rtx_alloc (CALL_INSN);
3702 INSN_UID (insn) = cur_insn_uid++;
3704 PATTERN (insn) = pattern;
3705 INSN_CODE (insn) = -1;
3706 REG_NOTES (insn) = NULL;
3707 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3708 INSN_LOCATOR (insn) = curr_insn_locator ();
3709 BLOCK_FOR_INSN (insn) = NULL;
3714 /* Add INSN to the end of the doubly-linked list.
3715 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3720 PREV_INSN (insn) = last_insn;
3721 NEXT_INSN (insn) = 0;
3723 if (NULL != last_insn)
3724 NEXT_INSN (last_insn) = insn;
3726 if (NULL == first_insn)
3732 /* Add INSN into the doubly-linked list after insn AFTER. This and
3733 the next should be the only functions called to insert an insn once
3734 delay slots have been filled since only they know how to update a
3738 add_insn_after (rtx insn, rtx after, basic_block bb)
3740 rtx next = NEXT_INSN (after);
3742 gcc_assert (!optimize || !INSN_DELETED_P (after));
3744 NEXT_INSN (insn) = next;
3745 PREV_INSN (insn) = after;
3749 PREV_INSN (next) = insn;
3750 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3751 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3753 else if (last_insn == after)
3757 struct sequence_stack *stack = seq_stack;
3758 /* Scan all pending sequences too. */
3759 for (; stack; stack = stack->next)
3760 if (after == stack->last)
3769 if (!BARRIER_P (after)
3770 && !BARRIER_P (insn)
3771 && (bb = BLOCK_FOR_INSN (after)))
3773 set_block_for_insn (insn, bb);
3775 df_insn_rescan (insn);
3776 /* Should not happen as first in the BB is always
3777 either NOTE or LABEL. */
3778 if (BB_END (bb) == after
3779 /* Avoid clobbering of structure when creating new BB. */
3780 && !BARRIER_P (insn)
3781 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3785 NEXT_INSN (after) = insn;
3786 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3788 rtx sequence = PATTERN (after);
3789 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3793 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3794 the previous should be the only functions called to insert an insn
3795 once delay slots have been filled since only they know how to
3796 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3800 add_insn_before (rtx insn, rtx before, basic_block bb)
3802 rtx prev = PREV_INSN (before);
3804 gcc_assert (!optimize || !INSN_DELETED_P (before));
3806 PREV_INSN (insn) = prev;
3807 NEXT_INSN (insn) = before;
3811 NEXT_INSN (prev) = insn;
3812 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3814 rtx sequence = PATTERN (prev);
3815 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3818 else if (first_insn == before)
3822 struct sequence_stack *stack = seq_stack;
3823 /* Scan all pending sequences too. */
3824 for (; stack; stack = stack->next)
3825 if (before == stack->first)
3827 stack->first = insn;
3835 && !BARRIER_P (before)
3836 && !BARRIER_P (insn))
3837 bb = BLOCK_FOR_INSN (before);
3841 set_block_for_insn (insn, bb);
3843 df_insn_rescan (insn);
3844 /* Should not happen as first in the BB is always either NOTE or
3846 gcc_assert (BB_HEAD (bb) != insn
3847 /* Avoid clobbering of structure when creating new BB. */
3849 || NOTE_INSN_BASIC_BLOCK_P (insn));
3852 PREV_INSN (before) = insn;
3853 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3854 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3858 /* Replace insn with an deleted instruction note. */
3861 set_insn_deleted (rtx insn)
3863 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3864 PUT_CODE (insn, NOTE);
3865 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3869 /* Remove an insn from its doubly-linked list. This function knows how
3870 to handle sequences. */
3872 remove_insn (rtx insn)
3874 rtx next = NEXT_INSN (insn);
3875 rtx prev = PREV_INSN (insn);
3878 /* Later in the code, the block will be marked dirty. */
3879 df_insn_delete (NULL, INSN_UID (insn));
3883 NEXT_INSN (prev) = next;
3884 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3886 rtx sequence = PATTERN (prev);
3887 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3890 else if (first_insn == insn)
3894 struct sequence_stack *stack = seq_stack;
3895 /* Scan all pending sequences too. */
3896 for (; stack; stack = stack->next)
3897 if (insn == stack->first)
3899 stack->first = next;
3908 PREV_INSN (next) = prev;
3909 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3910 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3912 else if (last_insn == insn)
3916 struct sequence_stack *stack = seq_stack;
3917 /* Scan all pending sequences too. */
3918 for (; stack; stack = stack->next)
3919 if (insn == stack->last)
3927 if (!BARRIER_P (insn)
3928 && (bb = BLOCK_FOR_INSN (insn)))
3931 df_set_bb_dirty (bb);
3932 if (BB_HEAD (bb) == insn)
3934 /* Never ever delete the basic block note without deleting whole
3936 gcc_assert (!NOTE_P (insn));
3937 BB_HEAD (bb) = next;
3939 if (BB_END (bb) == insn)
3944 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3947 add_function_usage_to (rtx call_insn, rtx call_fusage)
3949 gcc_assert (call_insn && CALL_P (call_insn));
3951 /* Put the register usage information on the CALL. If there is already
3952 some usage information, put ours at the end. */
3953 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3957 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3958 link = XEXP (link, 1))
3961 XEXP (link, 1) = call_fusage;
3964 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3967 /* Delete all insns made since FROM.
3968 FROM becomes the new last instruction. */
3971 delete_insns_since (rtx from)
3976 NEXT_INSN (from) = 0;
3980 /* This function is deprecated, please use sequences instead.
3982 Move a consecutive bunch of insns to a different place in the chain.
3983 The insns to be moved are those between FROM and TO.
3984 They are moved to a new position after the insn AFTER.
3985 AFTER must not be FROM or TO or any insn in between.
3987 This function does not know about SEQUENCEs and hence should not be
3988 called after delay-slot filling has been done. */
3991 reorder_insns_nobb (rtx from, rtx to, rtx after)
3993 /* Splice this bunch out of where it is now. */
3994 if (PREV_INSN (from))
3995 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3997 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3998 if (last_insn == to)
3999 last_insn = PREV_INSN (from);
4000 if (first_insn == from)
4001 first_insn = NEXT_INSN (to);
4003 /* Make the new neighbors point to it and it to them. */
4004 if (NEXT_INSN (after))
4005 PREV_INSN (NEXT_INSN (after)) = to;
4007 NEXT_INSN (to) = NEXT_INSN (after);
4008 PREV_INSN (from) = after;
4009 NEXT_INSN (after) = from;
4010 if (after == last_insn)
4014 /* Same as function above, but take care to update BB boundaries. */
4016 reorder_insns (rtx from, rtx to, rtx after)
4018 rtx prev = PREV_INSN (from);
4019 basic_block bb, bb2;
4021 reorder_insns_nobb (from, to, after);
4023 if (!BARRIER_P (after)
4024 && (bb = BLOCK_FOR_INSN (after)))
4027 df_set_bb_dirty (bb);
4029 if (!BARRIER_P (from)
4030 && (bb2 = BLOCK_FOR_INSN (from)))
4032 if (BB_END (bb2) == to)
4033 BB_END (bb2) = prev;
4034 df_set_bb_dirty (bb2);
4037 if (BB_END (bb) == after)
4040 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4042 df_insn_change_bb (x, bb);
4047 /* Emit insn(s) of given code and pattern
4048 at a specified place within the doubly-linked list.
4050 All of the emit_foo global entry points accept an object
4051 X which is either an insn list or a PATTERN of a single
4054 There are thus a few canonical ways to generate code and
4055 emit it at a specific place in the instruction stream. For
4056 example, consider the instruction named SPOT and the fact that
4057 we would like to emit some instructions before SPOT. We might
4061 ... emit the new instructions ...
4062 insns_head = get_insns ();
4065 emit_insn_before (insns_head, SPOT);
4067 It used to be common to generate SEQUENCE rtl instead, but that
4068 is a relic of the past which no longer occurs. The reason is that
4069 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4070 generated would almost certainly die right after it was created. */
4072 /* Make X be output before the instruction BEFORE. */
4075 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4080 gcc_assert (before);
4085 switch (GET_CODE (x))
4097 rtx next = NEXT_INSN (insn);
4098 add_insn_before (insn, before, bb);
4104 #ifdef ENABLE_RTL_CHECKING
4111 last = make_insn_raw (x);
4112 add_insn_before (last, before, bb);
4119 /* Make an instruction with body X and code JUMP_INSN
4120 and output it before the instruction BEFORE. */
4123 emit_jump_insn_before_noloc (rtx x, rtx before)
4125 rtx insn, last = NULL_RTX;
4127 gcc_assert (before);
4129 switch (GET_CODE (x))
4141 rtx next = NEXT_INSN (insn);
4142 add_insn_before (insn, before, NULL);
4148 #ifdef ENABLE_RTL_CHECKING
4155 last = make_jump_insn_raw (x);
4156 add_insn_before (last, before, NULL);
4163 /* Make an instruction with body X and code CALL_INSN
4164 and output it before the instruction BEFORE. */
4167 emit_call_insn_before_noloc (rtx x, rtx before)
4169 rtx last = NULL_RTX, insn;
4171 gcc_assert (before);
4173 switch (GET_CODE (x))
4185 rtx next = NEXT_INSN (insn);
4186 add_insn_before (insn, before, NULL);
4192 #ifdef ENABLE_RTL_CHECKING
4199 last = make_call_insn_raw (x);
4200 add_insn_before (last, before, NULL);
4207 /* Make an instruction with body X and code DEBUG_INSN
4208 and output it before the instruction BEFORE. */
4211 emit_debug_insn_before_noloc (rtx x, rtx before)
4213 rtx last = NULL_RTX, insn;
4215 gcc_assert (before);
4217 switch (GET_CODE (x))
4229 rtx next = NEXT_INSN (insn);
4230 add_insn_before (insn, before, NULL);
4236 #ifdef ENABLE_RTL_CHECKING
4243 last = make_debug_insn_raw (x);
4244 add_insn_before (last, before, NULL);
4251 /* Make an insn of code BARRIER
4252 and output it before the insn BEFORE. */
4255 emit_barrier_before (rtx before)
4257 rtx insn = rtx_alloc (BARRIER);
4259 INSN_UID (insn) = cur_insn_uid++;
4261 add_insn_before (insn, before, NULL);
4265 /* Emit the label LABEL before the insn BEFORE. */
4268 emit_label_before (rtx label, rtx before)
4270 /* This can be called twice for the same label as a result of the
4271 confusion that follows a syntax error! So make it harmless. */
4272 if (INSN_UID (label) == 0)
4274 INSN_UID (label) = cur_insn_uid++;
4275 add_insn_before (label, before, NULL);
4281 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4284 emit_note_before (enum insn_note subtype, rtx before)
4286 rtx note = rtx_alloc (NOTE);
4287 INSN_UID (note) = cur_insn_uid++;
4288 NOTE_KIND (note) = subtype;
4289 BLOCK_FOR_INSN (note) = NULL;
4290 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4292 add_insn_before (note, before, NULL);
4296 /* Helper for emit_insn_after, handles lists of instructions
4300 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4304 if (!bb && !BARRIER_P (after))
4305 bb = BLOCK_FOR_INSN (after);
4309 df_set_bb_dirty (bb);
4310 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4311 if (!BARRIER_P (last))
4313 set_block_for_insn (last, bb);
4314 df_insn_rescan (last);
4316 if (!BARRIER_P (last))
4318 set_block_for_insn (last, bb);
4319 df_insn_rescan (last);
4321 if (BB_END (bb) == after)
4325 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4328 after_after = NEXT_INSN (after);
4330 NEXT_INSN (after) = first;
4331 PREV_INSN (first) = after;
4332 NEXT_INSN (last) = after_after;
4334 PREV_INSN (after_after) = last;
4336 if (after == last_insn)
4342 /* Make X be output after the insn AFTER and set the BB of insn. If
4343 BB is NULL, an attempt is made to infer the BB from AFTER. */
4346 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4355 switch (GET_CODE (x))
4364 last = emit_insn_after_1 (x, after, bb);
4367 #ifdef ENABLE_RTL_CHECKING
4374 last = make_insn_raw (x);
4375 add_insn_after (last, after, bb);
4383 /* Make an insn of code JUMP_INSN with body X
4384 and output it after the insn AFTER. */
4387 emit_jump_insn_after_noloc (rtx x, rtx after)
4393 switch (GET_CODE (x))
4402 last = emit_insn_after_1 (x, after, NULL);
4405 #ifdef ENABLE_RTL_CHECKING
4412 last = make_jump_insn_raw (x);
4413 add_insn_after (last, after, NULL);
4420 /* Make an instruction with body X and code CALL_INSN
4421 and output it after the instruction AFTER. */
4424 emit_call_insn_after_noloc (rtx x, rtx after)
4430 switch (GET_CODE (x))
4439 last = emit_insn_after_1 (x, after, NULL);
4442 #ifdef ENABLE_RTL_CHECKING
4449 last = make_call_insn_raw (x);
4450 add_insn_after (last, after, NULL);
4457 /* Make an instruction with body X and code CALL_INSN
4458 and output it after the instruction AFTER. */
4461 emit_debug_insn_after_noloc (rtx x, rtx after)
4467 switch (GET_CODE (x))
4476 last = emit_insn_after_1 (x, after, NULL);
4479 #ifdef ENABLE_RTL_CHECKING
4486 last = make_debug_insn_raw (x);
4487 add_insn_after (last, after, NULL);
4494 /* Make an insn of code BARRIER
4495 and output it after the insn AFTER. */
4498 emit_barrier_after (rtx after)
4500 rtx insn = rtx_alloc (BARRIER);
4502 INSN_UID (insn) = cur_insn_uid++;
4504 add_insn_after (insn, after, NULL);
4508 /* Emit the label LABEL after the insn AFTER. */
4511 emit_label_after (rtx label, rtx after)
4513 /* This can be called twice for the same label
4514 as a result of the confusion that follows a syntax error!
4515 So make it harmless. */
4516 if (INSN_UID (label) == 0)
4518 INSN_UID (label) = cur_insn_uid++;
4519 add_insn_after (label, after, NULL);
4525 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4528 emit_note_after (enum insn_note subtype, rtx after)
4530 rtx note = rtx_alloc (NOTE);
4531 INSN_UID (note) = cur_insn_uid++;
4532 NOTE_KIND (note) = subtype;
4533 BLOCK_FOR_INSN (note) = NULL;
4534 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4535 add_insn_after (note, after, NULL);
4539 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4541 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4543 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4545 if (pattern == NULL_RTX || !loc)
4548 after = NEXT_INSN (after);
4551 if (active_insn_p (after) && !INSN_LOCATOR (after))
4552 INSN_LOCATOR (after) = loc;
4555 after = NEXT_INSN (after);
4560 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4562 emit_insn_after (rtx pattern, rtx after)
4566 while (DEBUG_INSN_P (prev))
4567 prev = PREV_INSN (prev);
4570 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4572 return emit_insn_after_noloc (pattern, after, NULL);
4575 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4577 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4579 rtx last = emit_jump_insn_after_noloc (pattern, after);
4581 if (pattern == NULL_RTX || !loc)
4584 after = NEXT_INSN (after);
4587 if (active_insn_p (after) && !INSN_LOCATOR (after))
4588 INSN_LOCATOR (after) = loc;
4591 after = NEXT_INSN (after);
4596 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4598 emit_jump_insn_after (rtx pattern, rtx after)
4602 while (DEBUG_INSN_P (prev))
4603 prev = PREV_INSN (prev);
4606 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4608 return emit_jump_insn_after_noloc (pattern, after);
4611 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4613 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4615 rtx last = emit_call_insn_after_noloc (pattern, after);
4617 if (pattern == NULL_RTX || !loc)
4620 after = NEXT_INSN (after);
4623 if (active_insn_p (after) && !INSN_LOCATOR (after))
4624 INSN_LOCATOR (after) = loc;
4627 after = NEXT_INSN (after);
4632 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4634 emit_call_insn_after (rtx pattern, rtx after)
4638 while (DEBUG_INSN_P (prev))
4639 prev = PREV_INSN (prev);
4642 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4644 return emit_call_insn_after_noloc (pattern, after);
4647 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4649 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4651 rtx last = emit_debug_insn_after_noloc (pattern, after);
4653 if (pattern == NULL_RTX || !loc)
4656 after = NEXT_INSN (after);
4659 if (active_insn_p (after) && !INSN_LOCATOR (after))
4660 INSN_LOCATOR (after) = loc;
4663 after = NEXT_INSN (after);
4668 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4670 emit_debug_insn_after (rtx pattern, rtx after)
4673 return emit_debug_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4675 return emit_debug_insn_after_noloc (pattern, after);
4678 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4680 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4682 rtx first = PREV_INSN (before);
4683 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4685 if (pattern == NULL_RTX || !loc)
4689 first = get_insns ();
4691 first = NEXT_INSN (first);
4694 if (active_insn_p (first) && !INSN_LOCATOR (first))
4695 INSN_LOCATOR (first) = loc;
4698 first = NEXT_INSN (first);
4703 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4705 emit_insn_before (rtx pattern, rtx before)
4709 while (DEBUG_INSN_P (next))
4710 next = PREV_INSN (next);
4713 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4715 return emit_insn_before_noloc (pattern, before, NULL);
4718 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4720 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4722 rtx first = PREV_INSN (before);
4723 rtx last = emit_jump_insn_before_noloc (pattern, before);
4725 if (pattern == NULL_RTX)
4728 first = NEXT_INSN (first);
4731 if (active_insn_p (first) && !INSN_LOCATOR (first))
4732 INSN_LOCATOR (first) = loc;
4735 first = NEXT_INSN (first);
4740 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4742 emit_jump_insn_before (rtx pattern, rtx before)
4746 while (DEBUG_INSN_P (next))
4747 next = PREV_INSN (next);
4750 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4752 return emit_jump_insn_before_noloc (pattern, before);
4755 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4757 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4759 rtx first = PREV_INSN (before);
4760 rtx last = emit_call_insn_before_noloc (pattern, before);
4762 if (pattern == NULL_RTX)
4765 first = NEXT_INSN (first);
4768 if (active_insn_p (first) && !INSN_LOCATOR (first))
4769 INSN_LOCATOR (first) = loc;
4772 first = NEXT_INSN (first);
4777 /* like emit_call_insn_before_noloc,
4778 but set insn_locator according to before. */
4780 emit_call_insn_before (rtx pattern, rtx before)
4784 while (DEBUG_INSN_P (next))
4785 next = PREV_INSN (next);
4788 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4790 return emit_call_insn_before_noloc (pattern, before);
4793 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4795 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4797 rtx first = PREV_INSN (before);
4798 rtx last = emit_debug_insn_before_noloc (pattern, before);
4800 if (pattern == NULL_RTX)
4803 first = NEXT_INSN (first);
4806 if (active_insn_p (first) && !INSN_LOCATOR (first))
4807 INSN_LOCATOR (first) = loc;
4810 first = NEXT_INSN (first);
4815 /* like emit_debug_insn_before_noloc,
4816 but set insn_locator according to before. */
4818 emit_debug_insn_before (rtx pattern, rtx before)
4820 if (INSN_P (before))
4821 return emit_debug_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4823 return emit_debug_insn_before_noloc (pattern, before);
4826 /* Take X and emit it at the end of the doubly-linked
4829 Returns the last insn emitted. */
4834 rtx last = last_insn;
4840 switch (GET_CODE (x))
4852 rtx next = NEXT_INSN (insn);
4859 #ifdef ENABLE_RTL_CHECKING
4866 last = make_insn_raw (x);
4874 /* Make an insn of code DEBUG_INSN with pattern X
4875 and add it to the end of the doubly-linked list. */
4878 emit_debug_insn (rtx x)
4880 rtx last = last_insn;
4886 switch (GET_CODE (x))
4898 rtx next = NEXT_INSN (insn);
4905 #ifdef ENABLE_RTL_CHECKING
4912 last = make_debug_insn_raw (x);
4920 /* Make an insn of code JUMP_INSN with pattern X
4921 and add it to the end of the doubly-linked list. */
4924 emit_jump_insn (rtx x)
4926 rtx last = NULL_RTX, insn;
4928 switch (GET_CODE (x))
4940 rtx next = NEXT_INSN (insn);
4947 #ifdef ENABLE_RTL_CHECKING
4954 last = make_jump_insn_raw (x);
4962 /* Make an insn of code CALL_INSN with pattern X
4963 and add it to the end of the doubly-linked list. */
4966 emit_call_insn (rtx x)
4970 switch (GET_CODE (x))
4979 insn = emit_insn (x);
4982 #ifdef ENABLE_RTL_CHECKING
4989 insn = make_call_insn_raw (x);
4997 /* Add the label LABEL to the end of the doubly-linked list. */
5000 emit_label (rtx label)
5002 /* This can be called twice for the same label
5003 as a result of the confusion that follows a syntax error!
5004 So make it harmless. */
5005 if (INSN_UID (label) == 0)
5007 INSN_UID (label) = cur_insn_uid++;
5013 /* Make an insn of code BARRIER
5014 and add it to the end of the doubly-linked list. */
5019 rtx barrier = rtx_alloc (BARRIER);
5020 INSN_UID (barrier) = cur_insn_uid++;
5025 /* Emit a copy of note ORIG. */
5028 emit_note_copy (rtx orig)
5032 note = rtx_alloc (NOTE);
5034 INSN_UID (note) = cur_insn_uid++;
5035 NOTE_DATA (note) = NOTE_DATA (orig);
5036 NOTE_KIND (note) = NOTE_KIND (orig);
5037 BLOCK_FOR_INSN (note) = NULL;
5043 /* Make an insn of code NOTE or type NOTE_NO
5044 and add it to the end of the doubly-linked list. */
5047 emit_note (enum insn_note kind)
5051 note = rtx_alloc (NOTE);
5052 INSN_UID (note) = cur_insn_uid++;
5053 NOTE_KIND (note) = kind;
5054 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
5055 BLOCK_FOR_INSN (note) = NULL;
5060 /* Emit a clobber of lvalue X. */
5063 emit_clobber (rtx x)
5065 /* CONCATs should not appear in the insn stream. */
5066 if (GET_CODE (x) == CONCAT)
5068 emit_clobber (XEXP (x, 0));
5069 return emit_clobber (XEXP (x, 1));
5071 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5074 /* Return a sequence of insns to clobber lvalue X. */
5088 /* Emit a use of rvalue X. */
5093 /* CONCATs should not appear in the insn stream. */
5094 if (GET_CODE (x) == CONCAT)
5096 emit_use (XEXP (x, 0));
5097 return emit_use (XEXP (x, 1));
5099 return emit_insn (gen_rtx_USE (VOIDmode, x));
5102 /* Return a sequence of insns to use rvalue X. */
5116 /* Cause next statement to emit a line note even if the line number
5120 force_next_line_note (void)
5125 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5126 note of this type already exists, remove it first. */
5129 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5131 rtx note = find_reg_note (insn, kind, NULL_RTX);
5137 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5138 has multiple sets (some callers assume single_set
5139 means the insn only has one set, when in fact it
5140 means the insn only has one * useful * set). */
5141 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
5147 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5148 It serves no useful purpose and breaks eliminate_regs. */
5149 if (GET_CODE (datum) == ASM_OPERANDS)
5154 XEXP (note, 0) = datum;
5155 df_notes_rescan (insn);
5163 XEXP (note, 0) = datum;
5169 add_reg_note (insn, kind, datum);
5175 df_notes_rescan (insn);
5181 return REG_NOTES (insn);
5184 /* Return an indication of which type of insn should have X as a body.
5185 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5187 static enum rtx_code
5188 classify_insn (rtx x)
5192 if (GET_CODE (x) == CALL)
5194 if (GET_CODE (x) == RETURN)
5196 if (GET_CODE (x) == SET)
5198 if (SET_DEST (x) == pc_rtx)
5200 else if (GET_CODE (SET_SRC (x)) == CALL)
5205 if (GET_CODE (x) == PARALLEL)
5208 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5209 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5211 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5212 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5214 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5215 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5221 /* Emit the rtl pattern X as an appropriate kind of insn.
5222 If X is a label, it is simply added into the insn chain. */
5227 enum rtx_code code = classify_insn (x);
5232 return emit_label (x);
5234 return emit_insn (x);
5237 rtx insn = emit_jump_insn (x);
5238 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5239 return emit_barrier ();
5243 return emit_call_insn (x);
5245 return emit_debug_insn (x);
5251 /* Space for free sequence stack entries. */
5252 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5254 /* Begin emitting insns to a sequence. If this sequence will contain
5255 something that might cause the compiler to pop arguments to function
5256 calls (because those pops have previously been deferred; see
5257 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5258 before calling this function. That will ensure that the deferred
5259 pops are not accidentally emitted in the middle of this sequence. */
5262 start_sequence (void)
5264 struct sequence_stack *tem;
5266 if (free_sequence_stack != NULL)
5268 tem = free_sequence_stack;
5269 free_sequence_stack = tem->next;
5272 tem = GGC_NEW (struct sequence_stack);
5274 tem->next = seq_stack;
5275 tem->first = first_insn;
5276 tem->last = last_insn;
5284 /* Set up the insn chain starting with FIRST as the current sequence,
5285 saving the previously current one. See the documentation for
5286 start_sequence for more information about how to use this function. */
5289 push_to_sequence (rtx first)
5295 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5301 /* Like push_to_sequence, but take the last insn as an argument to avoid
5302 looping through the list. */
5305 push_to_sequence2 (rtx first, rtx last)
5313 /* Set up the outer-level insn chain
5314 as the current sequence, saving the previously current one. */
5317 push_topmost_sequence (void)
5319 struct sequence_stack *stack, *top = NULL;
5323 for (stack = seq_stack; stack; stack = stack->next)
5326 first_insn = top->first;
5327 last_insn = top->last;
5330 /* After emitting to the outer-level insn chain, update the outer-level
5331 insn chain, and restore the previous saved state. */
5334 pop_topmost_sequence (void)
5336 struct sequence_stack *stack, *top = NULL;
5338 for (stack = seq_stack; stack; stack = stack->next)
5341 top->first = first_insn;
5342 top->last = last_insn;
5347 /* After emitting to a sequence, restore previous saved state.
5349 To get the contents of the sequence just made, you must call
5350 `get_insns' *before* calling here.
5352 If the compiler might have deferred popping arguments while
5353 generating this sequence, and this sequence will not be immediately
5354 inserted into the instruction stream, use do_pending_stack_adjust
5355 before calling get_insns. That will ensure that the deferred
5356 pops are inserted into this sequence, and not into some random
5357 location in the instruction stream. See INHIBIT_DEFER_POP for more
5358 information about deferred popping of arguments. */
5363 struct sequence_stack *tem = seq_stack;
5365 first_insn = tem->first;
5366 last_insn = tem->last;
5367 seq_stack = tem->next;
5369 memset (tem, 0, sizeof (*tem));
5370 tem->next = free_sequence_stack;
5371 free_sequence_stack = tem;
5374 /* Return 1 if currently emitting into a sequence. */
5377 in_sequence_p (void)
5379 return seq_stack != 0;
5382 /* Put the various virtual registers into REGNO_REG_RTX. */
5385 init_virtual_regs (void)
5387 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5388 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5389 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5390 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5391 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5395 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5396 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5397 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5398 static int copy_insn_n_scratches;
5400 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5401 copied an ASM_OPERANDS.
5402 In that case, it is the original input-operand vector. */
5403 static rtvec orig_asm_operands_vector;
5405 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5406 copied an ASM_OPERANDS.
5407 In that case, it is the copied input-operand vector. */
5408 static rtvec copy_asm_operands_vector;
5410 /* Likewise for the constraints vector. */
5411 static rtvec orig_asm_constraints_vector;
5412 static rtvec copy_asm_constraints_vector;
5414 /* Recursively create a new copy of an rtx for copy_insn.
5415 This function differs from copy_rtx in that it handles SCRATCHes and
5416 ASM_OPERANDs properly.
5417 Normally, this function is not used directly; use copy_insn as front end.
5418 However, you could first copy an insn pattern with copy_insn and then use
5419 this function afterwards to properly copy any REG_NOTEs containing
5423 copy_insn_1 (rtx orig)
5428 const char *format_ptr;
5433 code = GET_CODE (orig);
5448 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5453 for (i = 0; i < copy_insn_n_scratches; i++)
5454 if (copy_insn_scratch_in[i] == orig)
5455 return copy_insn_scratch_out[i];
5459 if (shared_const_p (orig))
5463 /* A MEM with a constant address is not sharable. The problem is that
5464 the constant address may need to be reloaded. If the mem is shared,
5465 then reloading one copy of this mem will cause all copies to appear
5466 to have been reloaded. */
5472 /* Copy the various flags, fields, and other information. We assume
5473 that all fields need copying, and then clear the fields that should
5474 not be copied. That is the sensible default behavior, and forces
5475 us to explicitly document why we are *not* copying a flag. */
5476 copy = shallow_copy_rtx (orig);
5478 /* We do not copy the USED flag, which is used as a mark bit during
5479 walks over the RTL. */
5480 RTX_FLAG (copy, used) = 0;
5482 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5485 RTX_FLAG (copy, jump) = 0;
5486 RTX_FLAG (copy, call) = 0;
5487 RTX_FLAG (copy, frame_related) = 0;
5490 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5492 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5493 switch (*format_ptr++)
5496 if (XEXP (orig, i) != NULL)
5497 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5502 if (XVEC (orig, i) == orig_asm_constraints_vector)
5503 XVEC (copy, i) = copy_asm_constraints_vector;
5504 else if (XVEC (orig, i) == orig_asm_operands_vector)
5505 XVEC (copy, i) = copy_asm_operands_vector;
5506 else if (XVEC (orig, i) != NULL)
5508 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5509 for (j = 0; j < XVECLEN (copy, i); j++)
5510 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5521 /* These are left unchanged. */
5528 if (code == SCRATCH)
5530 i = copy_insn_n_scratches++;
5531 gcc_assert (i < MAX_RECOG_OPERANDS);
5532 copy_insn_scratch_in[i] = orig;
5533 copy_insn_scratch_out[i] = copy;
5535 else if (code == ASM_OPERANDS)
5537 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5538 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5539 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5540 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5546 /* Create a new copy of an rtx.
5547 This function differs from copy_rtx in that it handles SCRATCHes and
5548 ASM_OPERANDs properly.
5549 INSN doesn't really have to be a full INSN; it could be just the
5552 copy_insn (rtx insn)
5554 copy_insn_n_scratches = 0;
5555 orig_asm_operands_vector = 0;
5556 orig_asm_constraints_vector = 0;
5557 copy_asm_operands_vector = 0;
5558 copy_asm_constraints_vector = 0;
5559 return copy_insn_1 (insn);
5562 /* Initialize data structures and variables in this file
5563 before generating rtl for each function. */
5570 if (MIN_NONDEBUG_INSN_UID)
5571 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5574 cur_debug_insn_uid = 1;
5575 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5576 last_location = UNKNOWN_LOCATION;
5577 first_label_num = label_num;
5580 /* Init the tables that describe all the pseudo regs. */
5582 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5584 crtl->emit.regno_pointer_align
5585 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5588 = GGC_NEWVEC (rtx, crtl->emit.regno_pointer_align_length);
5590 /* Put copies of all the hard registers into regno_reg_rtx. */
5591 memcpy (regno_reg_rtx,
5592 static_regno_reg_rtx,
5593 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5595 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5596 init_virtual_regs ();
5598 /* Indicate that the virtual registers and stack locations are
5600 REG_POINTER (stack_pointer_rtx) = 1;
5601 REG_POINTER (frame_pointer_rtx) = 1;
5602 REG_POINTER (hard_frame_pointer_rtx) = 1;
5603 REG_POINTER (arg_pointer_rtx) = 1;
5605 REG_POINTER (virtual_incoming_args_rtx) = 1;
5606 REG_POINTER (virtual_stack_vars_rtx) = 1;
5607 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5608 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5609 REG_POINTER (virtual_cfa_rtx) = 1;
5611 #ifdef STACK_BOUNDARY
5612 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5613 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5614 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5615 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5617 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5618 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5619 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5620 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5621 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5624 #ifdef INIT_EXPANDERS
5629 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5632 gen_const_vector (enum machine_mode mode, int constant)
5637 enum machine_mode inner;
5639 units = GET_MODE_NUNITS (mode);
5640 inner = GET_MODE_INNER (mode);
5642 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5644 v = rtvec_alloc (units);
5646 /* We need to call this function after we set the scalar const_tiny_rtx
5648 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5650 for (i = 0; i < units; ++i)
5651 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5653 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5657 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5658 all elements are zero, and the one vector when all elements are one. */
5660 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5662 enum machine_mode inner = GET_MODE_INNER (mode);
5663 int nunits = GET_MODE_NUNITS (mode);
5667 /* Check to see if all of the elements have the same value. */
5668 x = RTVEC_ELT (v, nunits - 1);
5669 for (i = nunits - 2; i >= 0; i--)
5670 if (RTVEC_ELT (v, i) != x)
5673 /* If the values are all the same, check to see if we can use one of the
5674 standard constant vectors. */
5677 if (x == CONST0_RTX (inner))
5678 return CONST0_RTX (mode);
5679 else if (x == CONST1_RTX (inner))
5680 return CONST1_RTX (mode);
5683 return gen_rtx_raw_CONST_VECTOR (mode, v);
5686 /* Initialise global register information required by all functions. */
5689 init_emit_regs (void)
5693 /* Reset register attributes */
5694 htab_empty (reg_attrs_htab);
5696 /* We need reg_raw_mode, so initialize the modes now. */
5697 init_reg_modes_target ();
5699 /* Assign register numbers to the globally defined register rtx. */
5700 pc_rtx = gen_rtx_PC (VOIDmode);
5701 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5702 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5703 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5704 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5705 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5706 virtual_incoming_args_rtx =
5707 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5708 virtual_stack_vars_rtx =
5709 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5710 virtual_stack_dynamic_rtx =
5711 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5712 virtual_outgoing_args_rtx =
5713 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5714 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5716 /* Initialize RTL for commonly used hard registers. These are
5717 copied into regno_reg_rtx as we begin to compile each function. */
5718 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5719 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5721 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5722 return_address_pointer_rtx
5723 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5726 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5727 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5729 pic_offset_table_rtx = NULL_RTX;
5732 /* Create some permanent unique rtl objects shared between all functions. */
5735 init_emit_once (void)
5738 enum machine_mode mode;
5739 enum machine_mode double_mode;
5741 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5743 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5744 const_int_htab_eq, NULL);
5746 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5747 const_double_htab_eq, NULL);
5749 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5750 const_fixed_htab_eq, NULL);
5752 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5753 mem_attrs_htab_eq, NULL);
5754 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5755 reg_attrs_htab_eq, NULL);
5757 /* Compute the word and byte modes. */
5759 byte_mode = VOIDmode;
5760 word_mode = VOIDmode;
5761 double_mode = VOIDmode;
5763 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5765 mode = GET_MODE_WIDER_MODE (mode))
5767 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5768 && byte_mode == VOIDmode)
5771 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5772 && word_mode == VOIDmode)
5776 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5778 mode = GET_MODE_WIDER_MODE (mode))
5780 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5781 && double_mode == VOIDmode)
5785 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5787 #ifdef INIT_EXPANDERS
5788 /* This is to initialize {init|mark|free}_machine_status before the first
5789 call to push_function_context_to. This is needed by the Chill front
5790 end which calls push_function_context_to before the first call to
5791 init_function_start. */
5795 /* Create the unique rtx's for certain rtx codes and operand values. */
5797 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5798 tries to use these variables. */
5799 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5800 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5801 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5803 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5804 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5805 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5807 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5809 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5810 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5811 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5816 dconsthalf = dconst1;
5817 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5819 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5821 const REAL_VALUE_TYPE *const r =
5822 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5824 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5826 mode = GET_MODE_WIDER_MODE (mode))
5827 const_tiny_rtx[i][(int) mode] =
5828 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5830 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5832 mode = GET_MODE_WIDER_MODE (mode))
5833 const_tiny_rtx[i][(int) mode] =
5834 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5836 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5838 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5840 mode = GET_MODE_WIDER_MODE (mode))
5841 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5843 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5845 mode = GET_MODE_WIDER_MODE (mode))
5846 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5849 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5851 mode = GET_MODE_WIDER_MODE (mode))
5853 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5854 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5857 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5859 mode = GET_MODE_WIDER_MODE (mode))
5861 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5862 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5865 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5867 mode = GET_MODE_WIDER_MODE (mode))
5869 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5870 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5873 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5875 mode = GET_MODE_WIDER_MODE (mode))
5877 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5878 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5881 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5883 mode = GET_MODE_WIDER_MODE (mode))
5885 FCONST0(mode).data.high = 0;
5886 FCONST0(mode).data.low = 0;
5887 FCONST0(mode).mode = mode;
5888 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5889 FCONST0 (mode), mode);
5892 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5894 mode = GET_MODE_WIDER_MODE (mode))
5896 FCONST0(mode).data.high = 0;
5897 FCONST0(mode).data.low = 0;
5898 FCONST0(mode).mode = mode;
5899 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5900 FCONST0 (mode), mode);
5903 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5905 mode = GET_MODE_WIDER_MODE (mode))
5907 FCONST0(mode).data.high = 0;
5908 FCONST0(mode).data.low = 0;
5909 FCONST0(mode).mode = mode;
5910 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5911 FCONST0 (mode), mode);
5913 /* We store the value 1. */
5914 FCONST1(mode).data.high = 0;
5915 FCONST1(mode).data.low = 0;
5916 FCONST1(mode).mode = mode;
5917 lshift_double (1, 0, GET_MODE_FBIT (mode),
5918 2 * HOST_BITS_PER_WIDE_INT,
5919 &FCONST1(mode).data.low,
5920 &FCONST1(mode).data.high,
5921 SIGNED_FIXED_POINT_MODE_P (mode));
5922 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5923 FCONST1 (mode), mode);
5926 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5928 mode = GET_MODE_WIDER_MODE (mode))
5930 FCONST0(mode).data.high = 0;
5931 FCONST0(mode).data.low = 0;
5932 FCONST0(mode).mode = mode;
5933 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5934 FCONST0 (mode), mode);
5936 /* We store the value 1. */
5937 FCONST1(mode).data.high = 0;
5938 FCONST1(mode).data.low = 0;
5939 FCONST1(mode).mode = mode;
5940 lshift_double (1, 0, GET_MODE_FBIT (mode),
5941 2 * HOST_BITS_PER_WIDE_INT,
5942 &FCONST1(mode).data.low,
5943 &FCONST1(mode).data.high,
5944 SIGNED_FIXED_POINT_MODE_P (mode));
5945 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5946 FCONST1 (mode), mode);
5949 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5951 mode = GET_MODE_WIDER_MODE (mode))
5953 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5956 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5958 mode = GET_MODE_WIDER_MODE (mode))
5960 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5963 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5965 mode = GET_MODE_WIDER_MODE (mode))
5967 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5968 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5971 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5973 mode = GET_MODE_WIDER_MODE (mode))
5975 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5976 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5979 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5980 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5981 const_tiny_rtx[0][i] = const0_rtx;
5983 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5984 if (STORE_FLAG_VALUE == 1)
5985 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5988 /* Produce exact duplicate of insn INSN after AFTER.
5989 Care updating of libcall regions if present. */
5992 emit_copy_of_insn_after (rtx insn, rtx after)
5996 switch (GET_CODE (insn))
5999 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
6003 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
6007 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
6011 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
6012 if (CALL_INSN_FUNCTION_USAGE (insn))
6013 CALL_INSN_FUNCTION_USAGE (new_rtx)
6014 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
6015 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6016 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6017 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6018 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6019 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6026 /* Update LABEL_NUSES. */
6027 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6029 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
6031 /* If the old insn is frame related, then so is the new one. This is
6032 primarily needed for IA-64 unwind info which marks epilogue insns,
6033 which may be duplicated by the basic block reordering code. */
6034 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6036 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6037 will make them. REG_LABEL_TARGETs are created there too, but are
6038 supposed to be sticky, so we copy them. */
6039 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6040 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6042 if (GET_CODE (link) == EXPR_LIST)
6043 add_reg_note (new_rtx, REG_NOTE_KIND (link),
6044 copy_insn_1 (XEXP (link, 0)));
6046 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
6049 INSN_CODE (new_rtx) = INSN_CODE (insn);
6053 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6055 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
6057 if (hard_reg_clobbers[mode][regno])
6058 return hard_reg_clobbers[mode][regno];
6060 return (hard_reg_clobbers[mode][regno] =
6061 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6064 #include "gt-emit-rtl.h"