1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* Datastructures maintained for currently processed function in RTL form. */
71 struct rtl_data x_rtl;
73 /* Indexed by pseudo register number, gives the rtx for that pseudo.
74 Allocated in parallel with regno_pointer_align.
75 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
76 with length attribute nested in top level structures. */
80 /* This is *not* reset after each function. It gives each CODE_LABEL
81 in the entire compilation a unique label number. */
83 static GTY(()) int label_num = 1;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconsthalf;
116 /* Record fixed-point constant 0 and 1. */
117 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
118 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
157 htab_t const_int_htab;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
161 htab_t mem_attrs_htab;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
165 htab_t reg_attrs_htab;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_double_htab;
171 /* A hash table storing all CONST_FIXEDs. */
172 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
173 htab_t const_fixed_htab;
175 #define first_insn (crtl->emit.x_first_insn)
176 #define last_insn (crtl->emit.x_last_insn)
177 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
178 #define last_location (crtl->emit.x_last_location)
179 #define first_label_num (crtl->emit.x_first_label_num)
181 static rtx make_call_insn_raw (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void set_used_decls (tree);
184 static void mark_label_nuses (rtx);
185 static hashval_t const_int_htab_hash (const void *);
186 static int const_int_htab_eq (const void *, const void *);
187 static hashval_t const_double_htab_hash (const void *);
188 static int const_double_htab_eq (const void *, const void *);
189 static rtx lookup_const_double (rtx);
190 static hashval_t const_fixed_htab_hash (const void *);
191 static int const_fixed_htab_eq (const void *, const void *);
192 static rtx lookup_const_fixed (rtx);
193 static hashval_t mem_attrs_htab_hash (const void *);
194 static int mem_attrs_htab_eq (const void *, const void *);
195 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
197 static hashval_t reg_attrs_htab_hash (const void *);
198 static int reg_attrs_htab_eq (const void *, const void *);
199 static reg_attrs *get_reg_attrs (tree, int);
200 static tree component_ref_for_mem_expr (tree);
201 static rtx gen_const_vector (enum machine_mode, int);
202 static void copy_rtx_if_shared_1 (rtx *orig);
204 /* Probability of the conditional branch currently proceeded by try_split.
205 Set to -1 otherwise. */
206 int split_branch_probability = -1;
208 /* Returns a hash code for X (which is a really a CONST_INT). */
211 const_int_htab_hash (const void *x)
213 return (hashval_t) INTVAL ((const_rtx) x);
216 /* Returns nonzero if the value represented by X (which is really a
217 CONST_INT) is the same as that given by Y (which is really a
221 const_int_htab_eq (const void *x, const void *y)
223 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
226 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
228 const_double_htab_hash (const void *x)
230 const_rtx const value = (const_rtx) x;
233 if (GET_MODE (value) == VOIDmode)
234 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
237 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
238 /* MODE is used in the comparison, so it should be in the hash. */
239 h ^= GET_MODE (value);
244 /* Returns nonzero if the value represented by X (really a ...)
245 is the same as that represented by Y (really a ...) */
247 const_double_htab_eq (const void *x, const void *y)
249 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
251 if (GET_MODE (a) != GET_MODE (b))
253 if (GET_MODE (a) == VOIDmode)
254 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
255 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
257 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
258 CONST_DOUBLE_REAL_VALUE (b));
261 /* Returns a hash code for X (which is really a CONST_FIXED). */
264 const_fixed_htab_hash (const void *x)
266 const_rtx const value = (const_rtx) x;
269 h = fixed_hash (CONST_FIXED_VALUE (value));
270 /* MODE is used in the comparison, so it should be in the hash. */
271 h ^= GET_MODE (value);
275 /* Returns nonzero if the value represented by X (really a ...)
276 is the same as that represented by Y (really a ...). */
279 const_fixed_htab_eq (const void *x, const void *y)
281 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
283 if (GET_MODE (a) != GET_MODE (b))
285 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
288 /* Returns a hash code for X (which is a really a mem_attrs *). */
291 mem_attrs_htab_hash (const void *x)
293 const mem_attrs *const p = (const mem_attrs *) x;
295 return (p->alias ^ (p->align * 1000)
296 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
297 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
298 ^ (size_t) iterative_hash_expr (p->expr, 0));
301 /* Returns nonzero if the value represented by X (which is really a
302 mem_attrs *) is the same as that given by Y (which is also really a
306 mem_attrs_htab_eq (const void *x, const void *y)
308 const mem_attrs *const p = (const mem_attrs *) x;
309 const mem_attrs *const q = (const mem_attrs *) y;
311 return (p->alias == q->alias && p->offset == q->offset
312 && p->size == q->size && p->align == q->align
313 && (p->expr == q->expr
314 || (p->expr != NULL_TREE && q->expr != NULL_TREE
315 && operand_equal_p (p->expr, q->expr, 0))));
318 /* Allocate a new mem_attrs structure and insert it into the hash table if
319 one identical to it is not already in the table. We are doing this for
323 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
324 unsigned int align, enum machine_mode mode)
329 /* If everything is the default, we can just return zero.
330 This must match what the corresponding MEM_* macros return when the
331 field is not present. */
332 if (alias == 0 && expr == 0 && offset == 0
334 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
335 && (STRICT_ALIGNMENT && mode != BLKmode
336 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
341 attrs.offset = offset;
345 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
348 *slot = ggc_alloc (sizeof (mem_attrs));
349 memcpy (*slot, &attrs, sizeof (mem_attrs));
355 /* Returns a hash code for X (which is a really a reg_attrs *). */
358 reg_attrs_htab_hash (const void *x)
360 const reg_attrs *const p = (const reg_attrs *) x;
362 return ((p->offset * 1000) ^ (long) p->decl);
365 /* Returns nonzero if the value represented by X (which is really a
366 reg_attrs *) is the same as that given by Y (which is also really a
370 reg_attrs_htab_eq (const void *x, const void *y)
372 const reg_attrs *const p = (const reg_attrs *) x;
373 const reg_attrs *const q = (const reg_attrs *) y;
375 return (p->decl == q->decl && p->offset == q->offset);
377 /* Allocate a new reg_attrs structure and insert it into the hash table if
378 one identical to it is not already in the table. We are doing this for
382 get_reg_attrs (tree decl, int offset)
387 /* If everything is the default, we can just return zero. */
388 if (decl == 0 && offset == 0)
392 attrs.offset = offset;
394 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
397 *slot = ggc_alloc (sizeof (reg_attrs));
398 memcpy (*slot, &attrs, sizeof (reg_attrs));
406 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
412 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
413 MEM_VOLATILE_P (x) = true;
419 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
420 don't attempt to share with the various global pieces of rtl (such as
421 frame_pointer_rtx). */
424 gen_raw_REG (enum machine_mode mode, int regno)
426 rtx x = gen_rtx_raw_REG (mode, regno);
427 ORIGINAL_REGNO (x) = regno;
431 /* There are some RTL codes that require special attention; the generation
432 functions do the raw handling. If you add to this list, modify
433 special_rtx in gengenrtl.c as well. */
436 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
440 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
441 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
443 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
444 if (const_true_rtx && arg == STORE_FLAG_VALUE)
445 return const_true_rtx;
448 /* Look up the CONST_INT in the hash table. */
449 slot = htab_find_slot_with_hash (const_int_htab, &arg,
450 (hashval_t) arg, INSERT);
452 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
458 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
460 return GEN_INT (trunc_int_for_mode (c, mode));
463 /* CONST_DOUBLEs might be created from pairs of integers, or from
464 REAL_VALUE_TYPEs. Also, their length is known only at run time,
465 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
467 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
468 hash table. If so, return its counterpart; otherwise add it
469 to the hash table and return it. */
471 lookup_const_double (rtx real)
473 void **slot = htab_find_slot (const_double_htab, real, INSERT);
480 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
481 VALUE in mode MODE. */
483 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
485 rtx real = rtx_alloc (CONST_DOUBLE);
486 PUT_MODE (real, mode);
490 return lookup_const_double (real);
493 /* Determine whether FIXED, a CONST_FIXED, already exists in the
494 hash table. If so, return its counterpart; otherwise add it
495 to the hash table and return it. */
498 lookup_const_fixed (rtx fixed)
500 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
507 /* Return a CONST_FIXED rtx for a fixed-point value specified by
508 VALUE in mode MODE. */
511 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
513 rtx fixed = rtx_alloc (CONST_FIXED);
514 PUT_MODE (fixed, mode);
518 return lookup_const_fixed (fixed);
521 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
522 of ints: I0 is the low-order word and I1 is the high-order word.
523 Do not use this routine for non-integer modes; convert to
524 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
527 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
532 /* There are the following cases (note that there are no modes with
533 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
535 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
537 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
538 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
539 from copies of the sign bit, and sign of i0 and i1 are the same), then
540 we return a CONST_INT for i0.
541 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
542 if (mode != VOIDmode)
544 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
545 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
546 /* We can get a 0 for an error mark. */
547 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
548 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
550 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
551 return gen_int_mode (i0, mode);
553 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
556 /* If this integer fits in one word, return a CONST_INT. */
557 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
560 /* We use VOIDmode for integers. */
561 value = rtx_alloc (CONST_DOUBLE);
562 PUT_MODE (value, VOIDmode);
564 CONST_DOUBLE_LOW (value) = i0;
565 CONST_DOUBLE_HIGH (value) = i1;
567 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
568 XWINT (value, i) = 0;
570 return lookup_const_double (value);
574 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
576 /* In case the MD file explicitly references the frame pointer, have
577 all such references point to the same frame pointer. This is
578 used during frame pointer elimination to distinguish the explicit
579 references to these registers from pseudos that happened to be
582 If we have eliminated the frame pointer or arg pointer, we will
583 be using it as a normal register, for example as a spill
584 register. In such cases, we might be accessing it in a mode that
585 is not Pmode and therefore cannot use the pre-allocated rtx.
587 Also don't do this when we are making new REGs in reload, since
588 we don't want to get confused with the real pointers. */
590 if (mode == Pmode && !reload_in_progress)
592 if (regno == FRAME_POINTER_REGNUM
593 && (!reload_completed || frame_pointer_needed))
594 return frame_pointer_rtx;
595 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
596 if (regno == HARD_FRAME_POINTER_REGNUM
597 && (!reload_completed || frame_pointer_needed))
598 return hard_frame_pointer_rtx;
600 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
601 if (regno == ARG_POINTER_REGNUM)
602 return arg_pointer_rtx;
604 #ifdef RETURN_ADDRESS_POINTER_REGNUM
605 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
606 return return_address_pointer_rtx;
608 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
609 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
610 return pic_offset_table_rtx;
611 if (regno == STACK_POINTER_REGNUM)
612 return stack_pointer_rtx;
616 /* If the per-function register table has been set up, try to re-use
617 an existing entry in that table to avoid useless generation of RTL.
619 This code is disabled for now until we can fix the various backends
620 which depend on having non-shared hard registers in some cases. Long
621 term we want to re-enable this code as it can significantly cut down
622 on the amount of useless RTL that gets generated.
624 We'll also need to fix some code that runs after reload that wants to
625 set ORIGINAL_REGNO. */
630 && regno < FIRST_PSEUDO_REGISTER
631 && reg_raw_mode[regno] == mode)
632 return regno_reg_rtx[regno];
635 return gen_raw_REG (mode, regno);
639 gen_rtx_MEM (enum machine_mode mode, rtx addr)
641 rtx rt = gen_rtx_raw_MEM (mode, addr);
643 /* This field is not cleared by the mere allocation of the rtx, so
650 /* Generate a memory referring to non-trapping constant memory. */
653 gen_const_mem (enum machine_mode mode, rtx addr)
655 rtx mem = gen_rtx_MEM (mode, addr);
656 MEM_READONLY_P (mem) = 1;
657 MEM_NOTRAP_P (mem) = 1;
661 /* Generate a MEM referring to fixed portions of the frame, e.g., register
665 gen_frame_mem (enum machine_mode mode, rtx addr)
667 rtx mem = gen_rtx_MEM (mode, addr);
668 MEM_NOTRAP_P (mem) = 1;
669 set_mem_alias_set (mem, get_frame_alias_set ());
673 /* Generate a MEM referring to a temporary use of the stack, not part
674 of the fixed stack frame. For example, something which is pushed
675 by a target splitter. */
677 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
679 rtx mem = gen_rtx_MEM (mode, addr);
680 MEM_NOTRAP_P (mem) = 1;
681 if (!cfun->calls_alloca)
682 set_mem_alias_set (mem, get_frame_alias_set ());
686 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
687 this construct would be valid, and false otherwise. */
690 validate_subreg (enum machine_mode omode, enum machine_mode imode,
691 const_rtx reg, unsigned int offset)
693 unsigned int isize = GET_MODE_SIZE (imode);
694 unsigned int osize = GET_MODE_SIZE (omode);
696 /* All subregs must be aligned. */
697 if (offset % osize != 0)
700 /* The subreg offset cannot be outside the inner object. */
704 /* ??? This should not be here. Temporarily continue to allow word_mode
705 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
706 Generally, backends are doing something sketchy but it'll take time to
708 if (omode == word_mode)
710 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
711 is the culprit here, and not the backends. */
712 else if (osize >= UNITS_PER_WORD && isize >= osize)
714 /* Allow component subregs of complex and vector. Though given the below
715 extraction rules, it's not always clear what that means. */
716 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
717 && GET_MODE_INNER (imode) == omode)
719 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
720 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
721 represent this. It's questionable if this ought to be represented at
722 all -- why can't this all be hidden in post-reload splitters that make
723 arbitrarily mode changes to the registers themselves. */
724 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
726 /* Subregs involving floating point modes are not allowed to
727 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
728 (subreg:SI (reg:DF) 0) isn't. */
729 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
735 /* Paradoxical subregs must have offset zero. */
739 /* This is a normal subreg. Verify that the offset is representable. */
741 /* For hard registers, we already have most of these rules collected in
742 subreg_offset_representable_p. */
743 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
745 unsigned int regno = REGNO (reg);
747 #ifdef CANNOT_CHANGE_MODE_CLASS
748 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
749 && GET_MODE_INNER (imode) == omode)
751 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
755 return subreg_offset_representable_p (regno, imode, offset, omode);
758 /* For pseudo registers, we want most of the same checks. Namely:
759 If the register no larger than a word, the subreg must be lowpart.
760 If the register is larger than a word, the subreg must be the lowpart
761 of a subword. A subreg does *not* perform arbitrary bit extraction.
762 Given that we've already checked mode/offset alignment, we only have
763 to check subword subregs here. */
764 if (osize < UNITS_PER_WORD)
766 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
767 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
768 if (offset % UNITS_PER_WORD != low_off)
775 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
777 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
778 return gen_rtx_raw_SUBREG (mode, reg, offset);
781 /* Generate a SUBREG representing the least-significant part of REG if MODE
782 is smaller than mode of REG, otherwise paradoxical SUBREG. */
785 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
787 enum machine_mode inmode;
789 inmode = GET_MODE (reg);
790 if (inmode == VOIDmode)
792 return gen_rtx_SUBREG (mode, reg,
793 subreg_lowpart_offset (mode, inmode));
796 /* gen_rtvec (n, [rt1, ..., rtn])
798 ** This routine creates an rtvec and stores within it the
799 ** pointers to rtx's which are its arguments.
804 gen_rtvec (int n, ...)
813 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
815 vector = alloca (n * sizeof (rtx));
817 for (i = 0; i < n; i++)
818 vector[i] = va_arg (p, rtx);
820 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
824 return gen_rtvec_v (save_n, vector);
828 gen_rtvec_v (int n, rtx *argp)
834 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
836 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
838 for (i = 0; i < n; i++)
839 rt_val->elem[i] = *argp++;
844 /* Return the number of bytes between the start of an OUTER_MODE
845 in-memory value and the start of an INNER_MODE in-memory value,
846 given that the former is a lowpart of the latter. It may be a
847 paradoxical lowpart, in which case the offset will be negative
848 on big-endian targets. */
851 byte_lowpart_offset (enum machine_mode outer_mode,
852 enum machine_mode inner_mode)
854 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
855 return subreg_lowpart_offset (outer_mode, inner_mode);
857 return -subreg_lowpart_offset (inner_mode, outer_mode);
860 /* Generate a REG rtx for a new pseudo register of mode MODE.
861 This pseudo is assigned the next sequential register number. */
864 gen_reg_rtx (enum machine_mode mode)
868 gcc_assert (can_create_pseudo_p ());
870 if (generating_concat_p
871 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
872 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
874 /* For complex modes, don't make a single pseudo.
875 Instead, make a CONCAT of two pseudos.
876 This allows noncontiguous allocation of the real and imaginary parts,
877 which makes much better code. Besides, allocating DCmode
878 pseudos overstrains reload on some machines like the 386. */
879 rtx realpart, imagpart;
880 enum machine_mode partmode = GET_MODE_INNER (mode);
882 realpart = gen_reg_rtx (partmode);
883 imagpart = gen_reg_rtx (partmode);
884 return gen_rtx_CONCAT (mode, realpart, imagpart);
887 /* Make sure regno_pointer_align, and regno_reg_rtx are large
888 enough to have an element for this pseudo reg number. */
890 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
892 int old_size = crtl->emit.regno_pointer_align_length;
896 new = xrealloc (crtl->emit.regno_pointer_align, old_size * 2);
897 memset (new + old_size, 0, old_size);
898 crtl->emit.regno_pointer_align = (unsigned char *) new;
900 new1 = ggc_realloc (regno_reg_rtx,
901 old_size * 2 * sizeof (rtx));
902 memset (new1 + old_size, 0, old_size * sizeof (rtx));
903 regno_reg_rtx = new1;
905 crtl->emit.regno_pointer_align_length = old_size * 2;
908 val = gen_raw_REG (mode, reg_rtx_no);
909 regno_reg_rtx[reg_rtx_no++] = val;
913 /* Update NEW with the same attributes as REG, but with OFFSET added
914 to the REG_OFFSET. */
917 update_reg_offset (rtx new, rtx reg, int offset)
919 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
920 REG_OFFSET (reg) + offset);
923 /* Generate a register with same attributes as REG, but with OFFSET
924 added to the REG_OFFSET. */
927 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
930 rtx new = gen_rtx_REG (mode, regno);
932 update_reg_offset (new, reg, offset);
936 /* Generate a new pseudo-register with the same attributes as REG, but
937 with OFFSET added to the REG_OFFSET. */
940 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
942 rtx new = gen_reg_rtx (mode);
944 update_reg_offset (new, reg, offset);
948 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
949 new register is a (possibly paradoxical) lowpart of the old one. */
952 adjust_reg_mode (rtx reg, enum machine_mode mode)
954 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
955 PUT_MODE (reg, mode);
958 /* Copy REG's attributes from X, if X has any attributes. If REG and X
959 have different modes, REG is a (possibly paradoxical) lowpart of X. */
962 set_reg_attrs_from_value (rtx reg, rtx x)
966 /* Hard registers can be reused for multiple purposes within the same
967 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
969 if (HARD_REGISTER_P (reg))
972 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
975 if (MEM_OFFSET (x) && GET_CODE (MEM_OFFSET (x)) == CONST_INT)
977 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
979 mark_reg_pointer (reg, MEM_ALIGN (x));
984 update_reg_offset (reg, x, offset);
986 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
990 /* Generate a REG rtx for a new pseudo register, copying the mode
991 and attributes from X. */
994 gen_reg_rtx_and_attrs (rtx x)
996 rtx reg = gen_reg_rtx (GET_MODE (x));
997 set_reg_attrs_from_value (reg, x);
1001 /* Set the register attributes for registers contained in PARM_RTX.
1002 Use needed values from memory attributes of MEM. */
1005 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1007 if (REG_P (parm_rtx))
1008 set_reg_attrs_from_value (parm_rtx, mem);
1009 else if (GET_CODE (parm_rtx) == PARALLEL)
1011 /* Check for a NULL entry in the first slot, used to indicate that the
1012 parameter goes both on the stack and in registers. */
1013 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1014 for (; i < XVECLEN (parm_rtx, 0); i++)
1016 rtx x = XVECEXP (parm_rtx, 0, i);
1017 if (REG_P (XEXP (x, 0)))
1018 REG_ATTRS (XEXP (x, 0))
1019 = get_reg_attrs (MEM_EXPR (mem),
1020 INTVAL (XEXP (x, 1)));
1025 /* Set the REG_ATTRS for registers in value X, given that X represents
1029 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1031 if (GET_CODE (x) == SUBREG)
1033 gcc_assert (subreg_lowpart_p (x));
1038 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1040 if (GET_CODE (x) == CONCAT)
1042 if (REG_P (XEXP (x, 0)))
1043 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1044 if (REG_P (XEXP (x, 1)))
1045 REG_ATTRS (XEXP (x, 1))
1046 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1048 if (GET_CODE (x) == PARALLEL)
1052 /* Check for a NULL entry, used to indicate that the parameter goes
1053 both on the stack and in registers. */
1054 if (XEXP (XVECEXP (x, 0, 0), 0))
1059 for (i = start; i < XVECLEN (x, 0); i++)
1061 rtx y = XVECEXP (x, 0, i);
1062 if (REG_P (XEXP (y, 0)))
1063 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1068 /* Assign the RTX X to declaration T. */
1071 set_decl_rtl (tree t, rtx x)
1073 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1075 set_reg_attrs_for_decl_rtl (t, x);
1078 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1079 if the ABI requires the parameter to be passed by reference. */
1082 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1084 DECL_INCOMING_RTL (t) = x;
1085 if (x && !by_reference_p)
1086 set_reg_attrs_for_decl_rtl (t, x);
1089 /* Identify REG (which may be a CONCAT) as a user register. */
1092 mark_user_reg (rtx reg)
1094 if (GET_CODE (reg) == CONCAT)
1096 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1097 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1101 gcc_assert (REG_P (reg));
1102 REG_USERVAR_P (reg) = 1;
1106 /* Identify REG as a probable pointer register and show its alignment
1107 as ALIGN, if nonzero. */
1110 mark_reg_pointer (rtx reg, int align)
1112 if (! REG_POINTER (reg))
1114 REG_POINTER (reg) = 1;
1117 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1119 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1120 /* We can no-longer be sure just how aligned this pointer is. */
1121 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1124 /* Return 1 plus largest pseudo reg number used in the current function. */
1132 /* Return 1 + the largest label number used so far in the current function. */
1135 max_label_num (void)
1140 /* Return first label number used in this function (if any were used). */
1143 get_first_label_num (void)
1145 return first_label_num;
1148 /* If the rtx for label was created during the expansion of a nested
1149 function, then first_label_num won't include this label number.
1150 Fix this now so that array indices work later. */
1153 maybe_set_first_label_num (rtx x)
1155 if (CODE_LABEL_NUMBER (x) < first_label_num)
1156 first_label_num = CODE_LABEL_NUMBER (x);
1159 /* Return a value representing some low-order bits of X, where the number
1160 of low-order bits is given by MODE. Note that no conversion is done
1161 between floating-point and fixed-point values, rather, the bit
1162 representation is returned.
1164 This function handles the cases in common between gen_lowpart, below,
1165 and two variants in cse.c and combine.c. These are the cases that can
1166 be safely handled at all points in the compilation.
1168 If this is not a case we can handle, return 0. */
1171 gen_lowpart_common (enum machine_mode mode, rtx x)
1173 int msize = GET_MODE_SIZE (mode);
1176 enum machine_mode innermode;
1178 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1179 so we have to make one up. Yuk. */
1180 innermode = GET_MODE (x);
1181 if (GET_CODE (x) == CONST_INT
1182 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1183 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1184 else if (innermode == VOIDmode)
1185 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1187 xsize = GET_MODE_SIZE (innermode);
1189 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1191 if (innermode == mode)
1194 /* MODE must occupy no more words than the mode of X. */
1195 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1196 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1199 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1200 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1203 offset = subreg_lowpart_offset (mode, innermode);
1205 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1206 && (GET_MODE_CLASS (mode) == MODE_INT
1207 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1209 /* If we are getting the low-order part of something that has been
1210 sign- or zero-extended, we can either just use the object being
1211 extended or make a narrower extension. If we want an even smaller
1212 piece than the size of the object being extended, call ourselves
1215 This case is used mostly by combine and cse. */
1217 if (GET_MODE (XEXP (x, 0)) == mode)
1219 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1220 return gen_lowpart_common (mode, XEXP (x, 0));
1221 else if (msize < xsize)
1222 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1224 else if (GET_CODE (x) == SUBREG || REG_P (x)
1225 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1226 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1227 return simplify_gen_subreg (mode, x, innermode, offset);
1229 /* Otherwise, we can't do this. */
1234 gen_highpart (enum machine_mode mode, rtx x)
1236 unsigned int msize = GET_MODE_SIZE (mode);
1239 /* This case loses if X is a subreg. To catch bugs early,
1240 complain if an invalid MODE is used even in other cases. */
1241 gcc_assert (msize <= UNITS_PER_WORD
1242 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1244 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1245 subreg_highpart_offset (mode, GET_MODE (x)));
1246 gcc_assert (result);
1248 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1249 the target if we have a MEM. gen_highpart must return a valid operand,
1250 emitting code if necessary to do so. */
1253 result = validize_mem (result);
1254 gcc_assert (result);
1260 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1261 be VOIDmode constant. */
1263 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1265 if (GET_MODE (exp) != VOIDmode)
1267 gcc_assert (GET_MODE (exp) == innermode);
1268 return gen_highpart (outermode, exp);
1270 return simplify_gen_subreg (outermode, exp, innermode,
1271 subreg_highpart_offset (outermode, innermode));
1274 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1277 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1279 unsigned int offset = 0;
1280 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1284 if (WORDS_BIG_ENDIAN)
1285 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1286 if (BYTES_BIG_ENDIAN)
1287 offset += difference % UNITS_PER_WORD;
1293 /* Return offset in bytes to get OUTERMODE high part
1294 of the value in mode INNERMODE stored in memory in target format. */
1296 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1298 unsigned int offset = 0;
1299 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1301 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1305 if (! WORDS_BIG_ENDIAN)
1306 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1307 if (! BYTES_BIG_ENDIAN)
1308 offset += difference % UNITS_PER_WORD;
1314 /* Return 1 iff X, assumed to be a SUBREG,
1315 refers to the least significant part of its containing reg.
1316 If X is not a SUBREG, always return 1 (it is its own low part!). */
1319 subreg_lowpart_p (const_rtx x)
1321 if (GET_CODE (x) != SUBREG)
1323 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1326 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1327 == SUBREG_BYTE (x));
1330 /* Return subword OFFSET of operand OP.
1331 The word number, OFFSET, is interpreted as the word number starting
1332 at the low-order address. OFFSET 0 is the low-order word if not
1333 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1335 If we cannot extract the required word, we return zero. Otherwise,
1336 an rtx corresponding to the requested word will be returned.
1338 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1339 reload has completed, a valid address will always be returned. After
1340 reload, if a valid address cannot be returned, we return zero.
1342 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1343 it is the responsibility of the caller.
1345 MODE is the mode of OP in case it is a CONST_INT.
1347 ??? This is still rather broken for some cases. The problem for the
1348 moment is that all callers of this thing provide no 'goal mode' to
1349 tell us to work with. This exists because all callers were written
1350 in a word based SUBREG world.
1351 Now use of this function can be deprecated by simplify_subreg in most
1356 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1358 if (mode == VOIDmode)
1359 mode = GET_MODE (op);
1361 gcc_assert (mode != VOIDmode);
1363 /* If OP is narrower than a word, fail. */
1365 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1368 /* If we want a word outside OP, return zero. */
1370 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1373 /* Form a new MEM at the requested address. */
1376 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1378 if (! validate_address)
1381 else if (reload_completed)
1383 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1387 return replace_equiv_address (new, XEXP (new, 0));
1390 /* Rest can be handled by simplify_subreg. */
1391 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1394 /* Similar to `operand_subword', but never return 0. If we can't
1395 extract the required subword, put OP into a register and try again.
1396 The second attempt must succeed. We always validate the address in
1399 MODE is the mode of OP, in case it is CONST_INT. */
1402 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1404 rtx result = operand_subword (op, offset, 1, mode);
1409 if (mode != BLKmode && mode != VOIDmode)
1411 /* If this is a register which can not be accessed by words, copy it
1412 to a pseudo register. */
1414 op = copy_to_reg (op);
1416 op = force_reg (mode, op);
1419 result = operand_subword (op, offset, 1, mode);
1420 gcc_assert (result);
1425 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1426 or (2) a component ref of something variable. Represent the later with
1427 a NULL expression. */
1430 component_ref_for_mem_expr (tree ref)
1432 tree inner = TREE_OPERAND (ref, 0);
1434 if (TREE_CODE (inner) == COMPONENT_REF)
1435 inner = component_ref_for_mem_expr (inner);
1438 /* Now remove any conversions: they don't change what the underlying
1439 object is. Likewise for SAVE_EXPR. */
1440 while (CONVERT_EXPR_P (inner)
1441 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1442 || TREE_CODE (inner) == SAVE_EXPR)
1443 inner = TREE_OPERAND (inner, 0);
1445 if (! DECL_P (inner))
1449 if (inner == TREE_OPERAND (ref, 0))
1452 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1453 TREE_OPERAND (ref, 1), NULL_TREE);
1456 /* Returns 1 if both MEM_EXPR can be considered equal
1460 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1465 if (! expr1 || ! expr2)
1468 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1471 if (TREE_CODE (expr1) == COMPONENT_REF)
1473 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1474 TREE_OPERAND (expr2, 0))
1475 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1476 TREE_OPERAND (expr2, 1));
1478 if (INDIRECT_REF_P (expr1))
1479 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1480 TREE_OPERAND (expr2, 0));
1482 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1483 have been resolved here. */
1484 gcc_assert (DECL_P (expr1));
1486 /* Decls with different pointers can't be equal. */
1490 /* Given REF, a MEM, and T, either the type of X or the expression
1491 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1492 if we are making a new object of this type. BITPOS is nonzero if
1493 there is an offset outstanding on T that will be applied later. */
1496 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1497 HOST_WIDE_INT bitpos)
1499 alias_set_type alias = MEM_ALIAS_SET (ref);
1500 tree expr = MEM_EXPR (ref);
1501 rtx offset = MEM_OFFSET (ref);
1502 rtx size = MEM_SIZE (ref);
1503 unsigned int align = MEM_ALIGN (ref);
1504 HOST_WIDE_INT apply_bitpos = 0;
1507 /* It can happen that type_for_mode was given a mode for which there
1508 is no language-level type. In which case it returns NULL, which
1513 type = TYPE_P (t) ? t : TREE_TYPE (t);
1514 if (type == error_mark_node)
1517 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1518 wrong answer, as it assumes that DECL_RTL already has the right alias
1519 info. Callers should not set DECL_RTL until after the call to
1520 set_mem_attributes. */
1521 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1523 /* Get the alias set from the expression or type (perhaps using a
1524 front-end routine) and use it. */
1525 alias = get_alias_set (t);
1527 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1528 MEM_IN_STRUCT_P (ref)
1529 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1530 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1532 /* If we are making an object of this type, or if this is a DECL, we know
1533 that it is a scalar if the type is not an aggregate. */
1534 if ((objectp || DECL_P (t))
1535 && ! AGGREGATE_TYPE_P (type)
1536 && TREE_CODE (type) != COMPLEX_TYPE)
1537 MEM_SCALAR_P (ref) = 1;
1539 /* We can set the alignment from the type if we are making an object,
1540 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1541 if (objectp || TREE_CODE (t) == INDIRECT_REF
1542 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1543 || TYPE_ALIGN_OK (type))
1544 align = MAX (align, TYPE_ALIGN (type));
1546 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1548 if (integer_zerop (TREE_OPERAND (t, 1)))
1549 /* We don't know anything about the alignment. */
1550 align = BITS_PER_UNIT;
1552 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1555 /* If the size is known, we can set that. */
1556 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1557 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1559 /* If T is not a type, we may be able to deduce some more information about
1565 if (TREE_THIS_VOLATILE (t))
1566 MEM_VOLATILE_P (ref) = 1;
1568 /* Now remove any conversions: they don't change what the underlying
1569 object is. Likewise for SAVE_EXPR. */
1570 while (CONVERT_EXPR_P (t)
1571 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1572 || TREE_CODE (t) == SAVE_EXPR)
1573 t = TREE_OPERAND (t, 0);
1575 /* We may look through structure-like accesses for the purposes of
1576 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1578 while (TREE_CODE (base) == COMPONENT_REF
1579 || TREE_CODE (base) == REALPART_EXPR
1580 || TREE_CODE (base) == IMAGPART_EXPR
1581 || TREE_CODE (base) == BIT_FIELD_REF)
1582 base = TREE_OPERAND (base, 0);
1586 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1587 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1589 MEM_NOTRAP_P (ref) = 1;
1592 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1594 base = get_base_address (base);
1595 if (base && DECL_P (base)
1596 && TREE_READONLY (base)
1597 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1599 tree base_type = TREE_TYPE (base);
1600 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1601 || DECL_ARTIFICIAL (base));
1602 MEM_READONLY_P (ref) = 1;
1605 /* If this expression uses it's parent's alias set, mark it such
1606 that we won't change it. */
1607 if (component_uses_parent_alias_set (t))
1608 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1610 /* If this is a decl, set the attributes of the MEM from it. */
1614 offset = const0_rtx;
1615 apply_bitpos = bitpos;
1616 size = (DECL_SIZE_UNIT (t)
1617 && host_integerp (DECL_SIZE_UNIT (t), 1)
1618 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1619 align = DECL_ALIGN (t);
1622 /* If this is a constant, we know the alignment. */
1623 else if (CONSTANT_CLASS_P (t))
1625 align = TYPE_ALIGN (type);
1626 #ifdef CONSTANT_ALIGNMENT
1627 align = CONSTANT_ALIGNMENT (t, align);
1631 /* If this is a field reference and not a bit-field, record it. */
1632 /* ??? There is some information that can be gleaned from bit-fields,
1633 such as the word offset in the structure that might be modified.
1634 But skip it for now. */
1635 else if (TREE_CODE (t) == COMPONENT_REF
1636 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1638 expr = component_ref_for_mem_expr (t);
1639 offset = const0_rtx;
1640 apply_bitpos = bitpos;
1641 /* ??? Any reason the field size would be different than
1642 the size we got from the type? */
1645 /* If this is an array reference, look for an outer field reference. */
1646 else if (TREE_CODE (t) == ARRAY_REF)
1648 tree off_tree = size_zero_node;
1649 /* We can't modify t, because we use it at the end of the
1655 tree index = TREE_OPERAND (t2, 1);
1656 tree low_bound = array_ref_low_bound (t2);
1657 tree unit_size = array_ref_element_size (t2);
1659 /* We assume all arrays have sizes that are a multiple of a byte.
1660 First subtract the lower bound, if any, in the type of the
1661 index, then convert to sizetype and multiply by the size of
1662 the array element. */
1663 if (! integer_zerop (low_bound))
1664 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1667 off_tree = size_binop (PLUS_EXPR,
1668 size_binop (MULT_EXPR,
1669 fold_convert (sizetype,
1673 t2 = TREE_OPERAND (t2, 0);
1675 while (TREE_CODE (t2) == ARRAY_REF);
1681 if (host_integerp (off_tree, 1))
1683 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1684 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1685 align = DECL_ALIGN (t2);
1686 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1688 offset = GEN_INT (ioff);
1689 apply_bitpos = bitpos;
1692 else if (TREE_CODE (t2) == COMPONENT_REF)
1694 expr = component_ref_for_mem_expr (t2);
1695 if (host_integerp (off_tree, 1))
1697 offset = GEN_INT (tree_low_cst (off_tree, 1));
1698 apply_bitpos = bitpos;
1700 /* ??? Any reason the field size would be different than
1701 the size we got from the type? */
1703 else if (flag_argument_noalias > 1
1704 && (INDIRECT_REF_P (t2))
1705 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1712 /* If this is a Fortran indirect argument reference, record the
1714 else if (flag_argument_noalias > 1
1715 && (INDIRECT_REF_P (t))
1716 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1723 /* If we modified OFFSET based on T, then subtract the outstanding
1724 bit position offset. Similarly, increase the size of the accessed
1725 object to contain the negative offset. */
1728 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1730 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1733 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1735 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1736 we're overlapping. */
1741 /* Now set the attributes we computed above. */
1743 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1745 /* If this is already known to be a scalar or aggregate, we are done. */
1746 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1749 /* If it is a reference into an aggregate, this is part of an aggregate.
1750 Otherwise we don't know. */
1751 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1752 || TREE_CODE (t) == ARRAY_RANGE_REF
1753 || TREE_CODE (t) == BIT_FIELD_REF)
1754 MEM_IN_STRUCT_P (ref) = 1;
1758 set_mem_attributes (rtx ref, tree t, int objectp)
1760 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1763 /* Set MEM to the decl that REG refers to. */
1766 set_mem_attrs_from_reg (rtx mem, rtx reg)
1769 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1770 GEN_INT (REG_OFFSET (reg)),
1771 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1774 /* Set the alias set of MEM to SET. */
1777 set_mem_alias_set (rtx mem, alias_set_type set)
1779 #ifdef ENABLE_CHECKING
1780 /* If the new and old alias sets don't conflict, something is wrong. */
1781 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1784 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1785 MEM_SIZE (mem), MEM_ALIGN (mem),
1789 /* Set the alignment of MEM to ALIGN bits. */
1792 set_mem_align (rtx mem, unsigned int align)
1794 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1795 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1799 /* Set the expr for MEM to EXPR. */
1802 set_mem_expr (rtx mem, tree expr)
1805 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1806 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1809 /* Set the offset of MEM to OFFSET. */
1812 set_mem_offset (rtx mem, rtx offset)
1814 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1815 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1819 /* Set the size of MEM to SIZE. */
1822 set_mem_size (rtx mem, rtx size)
1824 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1825 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1829 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1830 and its address changed to ADDR. (VOIDmode means don't change the mode.
1831 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1832 returned memory location is required to be valid. The memory
1833 attributes are not changed. */
1836 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1840 gcc_assert (MEM_P (memref));
1841 if (mode == VOIDmode)
1842 mode = GET_MODE (memref);
1844 addr = XEXP (memref, 0);
1845 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1846 && (!validate || memory_address_p (mode, addr)))
1851 if (reload_in_progress || reload_completed)
1852 gcc_assert (memory_address_p (mode, addr));
1854 addr = memory_address (mode, addr);
1857 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1860 new = gen_rtx_MEM (mode, addr);
1861 MEM_COPY_ATTRIBUTES (new, memref);
1865 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1866 way we are changing MEMREF, so we only preserve the alias set. */
1869 change_address (rtx memref, enum machine_mode mode, rtx addr)
1871 rtx new = change_address_1 (memref, mode, addr, 1), size;
1872 enum machine_mode mmode = GET_MODE (new);
1875 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1876 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1878 /* If there are no changes, just return the original memory reference. */
1881 if (MEM_ATTRS (memref) == 0
1882 || (MEM_EXPR (memref) == NULL
1883 && MEM_OFFSET (memref) == NULL
1884 && MEM_SIZE (memref) == size
1885 && MEM_ALIGN (memref) == align))
1888 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1889 MEM_COPY_ATTRIBUTES (new, memref);
1893 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1898 /* Return a memory reference like MEMREF, but with its mode changed
1899 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1900 nonzero, the memory address is forced to be valid.
1901 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1902 and caller is responsible for adjusting MEMREF base register. */
1905 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1906 int validate, int adjust)
1908 rtx addr = XEXP (memref, 0);
1910 rtx memoffset = MEM_OFFSET (memref);
1912 unsigned int memalign = MEM_ALIGN (memref);
1914 /* If there are no changes, just return the original memory reference. */
1915 if (mode == GET_MODE (memref) && !offset
1916 && (!validate || memory_address_p (mode, addr)))
1919 /* ??? Prefer to create garbage instead of creating shared rtl.
1920 This may happen even if offset is nonzero -- consider
1921 (plus (plus reg reg) const_int) -- so do this always. */
1922 addr = copy_rtx (addr);
1926 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1927 object, we can merge it into the LO_SUM. */
1928 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1930 && (unsigned HOST_WIDE_INT) offset
1931 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1932 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1933 plus_constant (XEXP (addr, 1), offset));
1935 addr = plus_constant (addr, offset);
1938 new = change_address_1 (memref, mode, addr, validate);
1940 /* Compute the new values of the memory attributes due to this adjustment.
1941 We add the offsets and update the alignment. */
1943 memoffset = GEN_INT (offset + INTVAL (memoffset));
1945 /* Compute the new alignment by taking the MIN of the alignment and the
1946 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1951 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1953 /* We can compute the size in a number of ways. */
1954 if (GET_MODE (new) != BLKmode)
1955 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1956 else if (MEM_SIZE (memref))
1957 size = plus_constant (MEM_SIZE (memref), -offset);
1959 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1960 memoffset, size, memalign, GET_MODE (new));
1962 /* At some point, we should validate that this offset is within the object,
1963 if all the appropriate values are known. */
1967 /* Return a memory reference like MEMREF, but with its mode changed
1968 to MODE and its address changed to ADDR, which is assumed to be
1969 MEMREF offset by OFFSET bytes. If VALIDATE is
1970 nonzero, the memory address is forced to be valid. */
1973 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1974 HOST_WIDE_INT offset, int validate)
1976 memref = change_address_1 (memref, VOIDmode, addr, validate);
1977 return adjust_address_1 (memref, mode, offset, validate, 0);
1980 /* Return a memory reference like MEMREF, but whose address is changed by
1981 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1982 known to be in OFFSET (possibly 1). */
1985 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1987 rtx new, addr = XEXP (memref, 0);
1989 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1991 /* At this point we don't know _why_ the address is invalid. It
1992 could have secondary memory references, multiplies or anything.
1994 However, if we did go and rearrange things, we can wind up not
1995 being able to recognize the magic around pic_offset_table_rtx.
1996 This stuff is fragile, and is yet another example of why it is
1997 bad to expose PIC machinery too early. */
1998 if (! memory_address_p (GET_MODE (memref), new)
1999 && GET_CODE (addr) == PLUS
2000 && XEXP (addr, 0) == pic_offset_table_rtx)
2002 addr = force_reg (GET_MODE (addr), addr);
2003 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2006 update_temp_slot_address (XEXP (memref, 0), new);
2007 new = change_address_1 (memref, VOIDmode, new, 1);
2009 /* If there are no changes, just return the original memory reference. */
2013 /* Update the alignment to reflect the offset. Reset the offset, which
2016 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2017 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2022 /* Return a memory reference like MEMREF, but with its address changed to
2023 ADDR. The caller is asserting that the actual piece of memory pointed
2024 to is the same, just the form of the address is being changed, such as
2025 by putting something into a register. */
2028 replace_equiv_address (rtx memref, rtx addr)
2030 /* change_address_1 copies the memory attribute structure without change
2031 and that's exactly what we want here. */
2032 update_temp_slot_address (XEXP (memref, 0), addr);
2033 return change_address_1 (memref, VOIDmode, addr, 1);
2036 /* Likewise, but the reference is not required to be valid. */
2039 replace_equiv_address_nv (rtx memref, rtx addr)
2041 return change_address_1 (memref, VOIDmode, addr, 0);
2044 /* Return a memory reference like MEMREF, but with its mode widened to
2045 MODE and offset by OFFSET. This would be used by targets that e.g.
2046 cannot issue QImode memory operations and have to use SImode memory
2047 operations plus masking logic. */
2050 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2052 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2053 tree expr = MEM_EXPR (new);
2054 rtx memoffset = MEM_OFFSET (new);
2055 unsigned int size = GET_MODE_SIZE (mode);
2057 /* If there are no changes, just return the original memory reference. */
2061 /* If we don't know what offset we were at within the expression, then
2062 we can't know if we've overstepped the bounds. */
2068 if (TREE_CODE (expr) == COMPONENT_REF)
2070 tree field = TREE_OPERAND (expr, 1);
2071 tree offset = component_ref_field_offset (expr);
2073 if (! DECL_SIZE_UNIT (field))
2079 /* Is the field at least as large as the access? If so, ok,
2080 otherwise strip back to the containing structure. */
2081 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2082 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2083 && INTVAL (memoffset) >= 0)
2086 if (! host_integerp (offset, 1))
2092 expr = TREE_OPERAND (expr, 0);
2094 = (GEN_INT (INTVAL (memoffset)
2095 + tree_low_cst (offset, 1)
2096 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2099 /* Similarly for the decl. */
2100 else if (DECL_P (expr)
2101 && DECL_SIZE_UNIT (expr)
2102 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2103 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2104 && (! memoffset || INTVAL (memoffset) >= 0))
2108 /* The widened memory access overflows the expression, which means
2109 that it could alias another expression. Zap it. */
2116 memoffset = NULL_RTX;
2118 /* The widened memory may alias other stuff, so zap the alias set. */
2119 /* ??? Maybe use get_alias_set on any remaining expression. */
2121 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2122 MEM_ALIGN (new), mode);
2127 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2130 gen_label_rtx (void)
2132 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2133 NULL, label_num++, NULL);
2136 /* For procedure integration. */
2138 /* Install new pointers to the first and last insns in the chain.
2139 Also, set cur_insn_uid to one higher than the last in use.
2140 Used for an inline-procedure after copying the insn chain. */
2143 set_new_first_and_last_insn (rtx first, rtx last)
2151 for (insn = first; insn; insn = NEXT_INSN (insn))
2152 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2157 /* Go through all the RTL insn bodies and copy any invalid shared
2158 structure. This routine should only be called once. */
2161 unshare_all_rtl_1 (rtx insn)
2163 /* Unshare just about everything else. */
2164 unshare_all_rtl_in_chain (insn);
2166 /* Make sure the addresses of stack slots found outside the insn chain
2167 (such as, in DECL_RTL of a variable) are not shared
2168 with the insn chain.
2170 This special care is necessary when the stack slot MEM does not
2171 actually appear in the insn chain. If it does appear, its address
2172 is unshared from all else at that point. */
2173 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2176 /* Go through all the RTL insn bodies and copy any invalid shared
2177 structure, again. This is a fairly expensive thing to do so it
2178 should be done sparingly. */
2181 unshare_all_rtl_again (rtx insn)
2186 for (p = insn; p; p = NEXT_INSN (p))
2189 reset_used_flags (PATTERN (p));
2190 reset_used_flags (REG_NOTES (p));
2193 /* Make sure that virtual stack slots are not shared. */
2194 set_used_decls (DECL_INITIAL (cfun->decl));
2196 /* Make sure that virtual parameters are not shared. */
2197 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2198 set_used_flags (DECL_RTL (decl));
2200 reset_used_flags (stack_slot_list);
2202 unshare_all_rtl_1 (insn);
2206 unshare_all_rtl (void)
2208 unshare_all_rtl_1 (get_insns ());
2212 struct rtl_opt_pass pass_unshare_all_rtl =
2216 "unshare", /* name */
2218 unshare_all_rtl, /* execute */
2221 0, /* static_pass_number */
2223 0, /* properties_required */
2224 0, /* properties_provided */
2225 0, /* properties_destroyed */
2226 0, /* todo_flags_start */
2227 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2232 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2233 Recursively does the same for subexpressions. */
2236 verify_rtx_sharing (rtx orig, rtx insn)
2241 const char *format_ptr;
2246 code = GET_CODE (x);
2248 /* These types may be freely shared. */
2264 /* SCRATCH must be shared because they represent distinct values. */
2266 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2271 if (shared_const_p (orig))
2276 /* A MEM is allowed to be shared if its address is constant. */
2277 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2278 || reload_completed || reload_in_progress)
2287 /* This rtx may not be shared. If it has already been seen,
2288 replace it with a copy of itself. */
2289 #ifdef ENABLE_CHECKING
2290 if (RTX_FLAG (x, used))
2292 error ("invalid rtl sharing found in the insn");
2294 error ("shared rtx");
2296 internal_error ("internal consistency failure");
2299 gcc_assert (!RTX_FLAG (x, used));
2301 RTX_FLAG (x, used) = 1;
2303 /* Now scan the subexpressions recursively. */
2305 format_ptr = GET_RTX_FORMAT (code);
2307 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2309 switch (*format_ptr++)
2312 verify_rtx_sharing (XEXP (x, i), insn);
2316 if (XVEC (x, i) != NULL)
2319 int len = XVECLEN (x, i);
2321 for (j = 0; j < len; j++)
2323 /* We allow sharing of ASM_OPERANDS inside single
2325 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2326 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2328 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2330 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2339 /* Go through all the RTL insn bodies and check that there is no unexpected
2340 sharing in between the subexpressions. */
2343 verify_rtl_sharing (void)
2347 for (p = get_insns (); p; p = NEXT_INSN (p))
2350 reset_used_flags (PATTERN (p));
2351 reset_used_flags (REG_NOTES (p));
2352 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2355 rtx q, sequence = PATTERN (p);
2357 for (i = 0; i < XVECLEN (sequence, 0); i++)
2359 q = XVECEXP (sequence, 0, i);
2360 gcc_assert (INSN_P (q));
2361 reset_used_flags (PATTERN (q));
2362 reset_used_flags (REG_NOTES (q));
2367 for (p = get_insns (); p; p = NEXT_INSN (p))
2370 verify_rtx_sharing (PATTERN (p), p);
2371 verify_rtx_sharing (REG_NOTES (p), p);
2375 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2376 Assumes the mark bits are cleared at entry. */
2379 unshare_all_rtl_in_chain (rtx insn)
2381 for (; insn; insn = NEXT_INSN (insn))
2384 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2385 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2389 /* Go through all virtual stack slots of a function and mark them as
2390 shared. We never replace the DECL_RTLs themselves with a copy,
2391 but expressions mentioned into a DECL_RTL cannot be shared with
2392 expressions in the instruction stream.
2394 Note that reload may convert pseudo registers into memories in-place.
2395 Pseudo registers are always shared, but MEMs never are. Thus if we
2396 reset the used flags on MEMs in the instruction stream, we must set
2397 them again on MEMs that appear in DECL_RTLs. */
2400 set_used_decls (tree blk)
2405 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2406 if (DECL_RTL_SET_P (t))
2407 set_used_flags (DECL_RTL (t));
2409 /* Now process sub-blocks. */
2410 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2414 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2415 Recursively does the same for subexpressions. Uses
2416 copy_rtx_if_shared_1 to reduce stack space. */
2419 copy_rtx_if_shared (rtx orig)
2421 copy_rtx_if_shared_1 (&orig);
2425 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2426 use. Recursively does the same for subexpressions. */
2429 copy_rtx_if_shared_1 (rtx *orig1)
2435 const char *format_ptr;
2439 /* Repeat is used to turn tail-recursion into iteration. */
2446 code = GET_CODE (x);
2448 /* These types may be freely shared. */
2463 /* SCRATCH must be shared because they represent distinct values. */
2466 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2471 if (shared_const_p (x))
2480 /* The chain of insns is not being copied. */
2487 /* This rtx may not be shared. If it has already been seen,
2488 replace it with a copy of itself. */
2490 if (RTX_FLAG (x, used))
2492 x = shallow_copy_rtx (x);
2495 RTX_FLAG (x, used) = 1;
2497 /* Now scan the subexpressions recursively.
2498 We can store any replaced subexpressions directly into X
2499 since we know X is not shared! Any vectors in X
2500 must be copied if X was copied. */
2502 format_ptr = GET_RTX_FORMAT (code);
2503 length = GET_RTX_LENGTH (code);
2506 for (i = 0; i < length; i++)
2508 switch (*format_ptr++)
2512 copy_rtx_if_shared_1 (last_ptr);
2513 last_ptr = &XEXP (x, i);
2517 if (XVEC (x, i) != NULL)
2520 int len = XVECLEN (x, i);
2522 /* Copy the vector iff I copied the rtx and the length
2524 if (copied && len > 0)
2525 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2527 /* Call recursively on all inside the vector. */
2528 for (j = 0; j < len; j++)
2531 copy_rtx_if_shared_1 (last_ptr);
2532 last_ptr = &XVECEXP (x, i, j);
2547 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2548 to look for shared sub-parts. */
2551 reset_used_flags (rtx x)
2555 const char *format_ptr;
2558 /* Repeat is used to turn tail-recursion into iteration. */
2563 code = GET_CODE (x);
2565 /* These types may be freely shared so we needn't do any resetting
2587 /* The chain of insns is not being copied. */
2594 RTX_FLAG (x, used) = 0;
2596 format_ptr = GET_RTX_FORMAT (code);
2597 length = GET_RTX_LENGTH (code);
2599 for (i = 0; i < length; i++)
2601 switch (*format_ptr++)
2609 reset_used_flags (XEXP (x, i));
2613 for (j = 0; j < XVECLEN (x, i); j++)
2614 reset_used_flags (XVECEXP (x, i, j));
2620 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2621 to look for shared sub-parts. */
2624 set_used_flags (rtx x)
2628 const char *format_ptr;
2633 code = GET_CODE (x);
2635 /* These types may be freely shared so we needn't do any resetting
2657 /* The chain of insns is not being copied. */
2664 RTX_FLAG (x, used) = 1;
2666 format_ptr = GET_RTX_FORMAT (code);
2667 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2669 switch (*format_ptr++)
2672 set_used_flags (XEXP (x, i));
2676 for (j = 0; j < XVECLEN (x, i); j++)
2677 set_used_flags (XVECEXP (x, i, j));
2683 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2684 Return X or the rtx for the pseudo reg the value of X was copied into.
2685 OTHER must be valid as a SET_DEST. */
2688 make_safe_from (rtx x, rtx other)
2691 switch (GET_CODE (other))
2694 other = SUBREG_REG (other);
2696 case STRICT_LOW_PART:
2699 other = XEXP (other, 0);
2708 && GET_CODE (x) != SUBREG)
2710 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2711 || reg_mentioned_p (other, x))))
2713 rtx temp = gen_reg_rtx (GET_MODE (x));
2714 emit_move_insn (temp, x);
2720 /* Emission of insns (adding them to the doubly-linked list). */
2722 /* Return the first insn of the current sequence or current function. */
2730 /* Specify a new insn as the first in the chain. */
2733 set_first_insn (rtx insn)
2735 gcc_assert (!PREV_INSN (insn));
2739 /* Return the last insn emitted in current sequence or current function. */
2742 get_last_insn (void)
2747 /* Specify a new insn as the last in the chain. */
2750 set_last_insn (rtx insn)
2752 gcc_assert (!NEXT_INSN (insn));
2756 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2759 get_last_insn_anywhere (void)
2761 struct sequence_stack *stack;
2764 for (stack = seq_stack; stack; stack = stack->next)
2765 if (stack->last != 0)
2770 /* Return the first nonnote insn emitted in current sequence or current
2771 function. This routine looks inside SEQUENCEs. */
2774 get_first_nonnote_insn (void)
2776 rtx insn = first_insn;
2781 for (insn = next_insn (insn);
2782 insn && NOTE_P (insn);
2783 insn = next_insn (insn))
2787 if (NONJUMP_INSN_P (insn)
2788 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2789 insn = XVECEXP (PATTERN (insn), 0, 0);
2796 /* Return the last nonnote insn emitted in current sequence or current
2797 function. This routine looks inside SEQUENCEs. */
2800 get_last_nonnote_insn (void)
2802 rtx insn = last_insn;
2807 for (insn = previous_insn (insn);
2808 insn && NOTE_P (insn);
2809 insn = previous_insn (insn))
2813 if (NONJUMP_INSN_P (insn)
2814 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2815 insn = XVECEXP (PATTERN (insn), 0,
2816 XVECLEN (PATTERN (insn), 0) - 1);
2823 /* Return a number larger than any instruction's uid in this function. */
2828 return cur_insn_uid;
2831 /* Return the next insn. If it is a SEQUENCE, return the first insn
2835 next_insn (rtx insn)
2839 insn = NEXT_INSN (insn);
2840 if (insn && NONJUMP_INSN_P (insn)
2841 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2842 insn = XVECEXP (PATTERN (insn), 0, 0);
2848 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2852 previous_insn (rtx insn)
2856 insn = PREV_INSN (insn);
2857 if (insn && NONJUMP_INSN_P (insn)
2858 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2859 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2865 /* Return the next insn after INSN that is not a NOTE. This routine does not
2866 look inside SEQUENCEs. */
2869 next_nonnote_insn (rtx insn)
2873 insn = NEXT_INSN (insn);
2874 if (insn == 0 || !NOTE_P (insn))
2881 /* Return the previous insn before INSN that is not a NOTE. This routine does
2882 not look inside SEQUENCEs. */
2885 prev_nonnote_insn (rtx insn)
2889 insn = PREV_INSN (insn);
2890 if (insn == 0 || !NOTE_P (insn))
2897 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2898 or 0, if there is none. This routine does not look inside
2902 next_real_insn (rtx insn)
2906 insn = NEXT_INSN (insn);
2907 if (insn == 0 || INSN_P (insn))
2914 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2915 or 0, if there is none. This routine does not look inside
2919 prev_real_insn (rtx insn)
2923 insn = PREV_INSN (insn);
2924 if (insn == 0 || INSN_P (insn))
2931 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2932 This routine does not look inside SEQUENCEs. */
2935 last_call_insn (void)
2939 for (insn = get_last_insn ();
2940 insn && !CALL_P (insn);
2941 insn = PREV_INSN (insn))
2947 /* Find the next insn after INSN that really does something. This routine
2948 does not look inside SEQUENCEs. Until reload has completed, this is the
2949 same as next_real_insn. */
2952 active_insn_p (const_rtx insn)
2954 return (CALL_P (insn) || JUMP_P (insn)
2955 || (NONJUMP_INSN_P (insn)
2956 && (! reload_completed
2957 || (GET_CODE (PATTERN (insn)) != USE
2958 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2962 next_active_insn (rtx insn)
2966 insn = NEXT_INSN (insn);
2967 if (insn == 0 || active_insn_p (insn))
2974 /* Find the last insn before INSN that really does something. This routine
2975 does not look inside SEQUENCEs. Until reload has completed, this is the
2976 same as prev_real_insn. */
2979 prev_active_insn (rtx insn)
2983 insn = PREV_INSN (insn);
2984 if (insn == 0 || active_insn_p (insn))
2991 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2994 next_label (rtx insn)
2998 insn = NEXT_INSN (insn);
2999 if (insn == 0 || LABEL_P (insn))
3006 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3009 prev_label (rtx insn)
3013 insn = PREV_INSN (insn);
3014 if (insn == 0 || LABEL_P (insn))
3021 /* Return the last label to mark the same position as LABEL. Return null
3022 if LABEL itself is null. */
3025 skip_consecutive_labels (rtx label)
3029 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3037 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3038 and REG_CC_USER notes so we can find it. */
3041 link_cc0_insns (rtx insn)
3043 rtx user = next_nonnote_insn (insn);
3045 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3046 user = XVECEXP (PATTERN (user), 0, 0);
3048 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3050 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3053 /* Return the next insn that uses CC0 after INSN, which is assumed to
3054 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3055 applied to the result of this function should yield INSN).
3057 Normally, this is simply the next insn. However, if a REG_CC_USER note
3058 is present, it contains the insn that uses CC0.
3060 Return 0 if we can't find the insn. */
3063 next_cc0_user (rtx insn)
3065 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3068 return XEXP (note, 0);
3070 insn = next_nonnote_insn (insn);
3071 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3072 insn = XVECEXP (PATTERN (insn), 0, 0);
3074 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3080 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3081 note, it is the previous insn. */
3084 prev_cc0_setter (rtx insn)
3086 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3089 return XEXP (note, 0);
3091 insn = prev_nonnote_insn (insn);
3092 gcc_assert (sets_cc0_p (PATTERN (insn)));
3099 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3102 find_auto_inc (rtx *xp, void *data)
3107 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3110 switch (GET_CODE (x))
3118 if (rtx_equal_p (reg, XEXP (x, 0)))
3129 /* Increment the label uses for all labels present in rtx. */
3132 mark_label_nuses (rtx x)
3138 code = GET_CODE (x);
3139 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3140 LABEL_NUSES (XEXP (x, 0))++;
3142 fmt = GET_RTX_FORMAT (code);
3143 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3146 mark_label_nuses (XEXP (x, i));
3147 else if (fmt[i] == 'E')
3148 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3149 mark_label_nuses (XVECEXP (x, i, j));
3154 /* Try splitting insns that can be split for better scheduling.
3155 PAT is the pattern which might split.
3156 TRIAL is the insn providing PAT.
3157 LAST is nonzero if we should return the last insn of the sequence produced.
3159 If this routine succeeds in splitting, it returns the first or last
3160 replacement insn depending on the value of LAST. Otherwise, it
3161 returns TRIAL. If the insn to be returned can be split, it will be. */
3164 try_split (rtx pat, rtx trial, int last)
3166 rtx before = PREV_INSN (trial);
3167 rtx after = NEXT_INSN (trial);
3168 int has_barrier = 0;
3171 rtx insn_last, insn;
3174 if (any_condjump_p (trial)
3175 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3176 split_branch_probability = INTVAL (XEXP (note, 0));
3177 probability = split_branch_probability;
3179 seq = split_insns (pat, trial);
3181 split_branch_probability = -1;
3183 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3184 We may need to handle this specially. */
3185 if (after && BARRIER_P (after))
3188 after = NEXT_INSN (after);
3194 /* Avoid infinite loop if any insn of the result matches
3195 the original pattern. */
3199 if (INSN_P (insn_last)
3200 && rtx_equal_p (PATTERN (insn_last), pat))
3202 if (!NEXT_INSN (insn_last))
3204 insn_last = NEXT_INSN (insn_last);
3207 /* We will be adding the new sequence to the function. The splitters
3208 may have introduced invalid RTL sharing, so unshare the sequence now. */
3209 unshare_all_rtl_in_chain (seq);
3212 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3216 mark_jump_label (PATTERN (insn), insn, 0);
3218 if (probability != -1
3219 && any_condjump_p (insn)
3220 && !find_reg_note (insn, REG_BR_PROB, 0))
3222 /* We can preserve the REG_BR_PROB notes only if exactly
3223 one jump is created, otherwise the machine description
3224 is responsible for this step using
3225 split_branch_probability variable. */
3226 gcc_assert (njumps == 1);
3228 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3229 GEN_INT (probability),
3235 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3236 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3239 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3242 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3245 *p = CALL_INSN_FUNCTION_USAGE (trial);
3246 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3250 /* Copy notes, particularly those related to the CFG. */
3251 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3253 switch (REG_NOTE_KIND (note))
3256 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3259 || (flag_non_call_exceptions && INSN_P (insn)
3260 && may_trap_p (PATTERN (insn))))
3262 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3270 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3274 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3280 case REG_NON_LOCAL_GOTO:
3281 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3285 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3293 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3295 rtx reg = XEXP (note, 0);
3296 if (!FIND_REG_INC_NOTE (insn, reg)
3297 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3298 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, reg,
3309 /* If there are LABELS inside the split insns increment the
3310 usage count so we don't delete the label. */
3314 while (insn != NULL_RTX)
3316 /* JUMP_P insns have already been "marked" above. */
3317 if (NONJUMP_INSN_P (insn))
3318 mark_label_nuses (PATTERN (insn));
3320 insn = PREV_INSN (insn);
3324 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3326 delete_insn (trial);
3328 emit_barrier_after (tem);
3330 /* Recursively call try_split for each new insn created; by the
3331 time control returns here that insn will be fully split, so
3332 set LAST and continue from the insn after the one returned.
3333 We can't use next_active_insn here since AFTER may be a note.
3334 Ignore deleted insns, which can be occur if not optimizing. */
3335 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3336 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3337 tem = try_split (PATTERN (tem), tem, 1);
3339 /* Return either the first or the last insn, depending on which was
3342 ? (after ? PREV_INSN (after) : last_insn)
3343 : NEXT_INSN (before);
3346 /* Make and return an INSN rtx, initializing all its slots.
3347 Store PATTERN in the pattern slots. */
3350 make_insn_raw (rtx pattern)
3354 insn = rtx_alloc (INSN);
3356 INSN_UID (insn) = cur_insn_uid++;
3357 PATTERN (insn) = pattern;
3358 INSN_CODE (insn) = -1;
3359 REG_NOTES (insn) = NULL;
3360 INSN_LOCATOR (insn) = curr_insn_locator ();
3361 BLOCK_FOR_INSN (insn) = NULL;
3363 #ifdef ENABLE_RTL_CHECKING
3366 && (returnjump_p (insn)
3367 || (GET_CODE (insn) == SET
3368 && SET_DEST (insn) == pc_rtx)))
3370 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3378 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3381 make_jump_insn_raw (rtx pattern)
3385 insn = rtx_alloc (JUMP_INSN);
3386 INSN_UID (insn) = cur_insn_uid++;
3388 PATTERN (insn) = pattern;
3389 INSN_CODE (insn) = -1;
3390 REG_NOTES (insn) = NULL;
3391 JUMP_LABEL (insn) = NULL;
3392 INSN_LOCATOR (insn) = curr_insn_locator ();
3393 BLOCK_FOR_INSN (insn) = NULL;
3398 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3401 make_call_insn_raw (rtx pattern)
3405 insn = rtx_alloc (CALL_INSN);
3406 INSN_UID (insn) = cur_insn_uid++;
3408 PATTERN (insn) = pattern;
3409 INSN_CODE (insn) = -1;
3410 REG_NOTES (insn) = NULL;
3411 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3412 INSN_LOCATOR (insn) = curr_insn_locator ();
3413 BLOCK_FOR_INSN (insn) = NULL;
3418 /* Add INSN to the end of the doubly-linked list.
3419 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3424 PREV_INSN (insn) = last_insn;
3425 NEXT_INSN (insn) = 0;
3427 if (NULL != last_insn)
3428 NEXT_INSN (last_insn) = insn;
3430 if (NULL == first_insn)
3436 /* Add INSN into the doubly-linked list after insn AFTER. This and
3437 the next should be the only functions called to insert an insn once
3438 delay slots have been filled since only they know how to update a
3442 add_insn_after (rtx insn, rtx after, basic_block bb)
3444 rtx next = NEXT_INSN (after);
3446 gcc_assert (!optimize || !INSN_DELETED_P (after));
3448 NEXT_INSN (insn) = next;
3449 PREV_INSN (insn) = after;
3453 PREV_INSN (next) = insn;
3454 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3455 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3457 else if (last_insn == after)
3461 struct sequence_stack *stack = seq_stack;
3462 /* Scan all pending sequences too. */
3463 for (; stack; stack = stack->next)
3464 if (after == stack->last)
3473 if (!BARRIER_P (after)
3474 && !BARRIER_P (insn)
3475 && (bb = BLOCK_FOR_INSN (after)))
3477 set_block_for_insn (insn, bb);
3479 df_insn_rescan (insn);
3480 /* Should not happen as first in the BB is always
3481 either NOTE or LABEL. */
3482 if (BB_END (bb) == after
3483 /* Avoid clobbering of structure when creating new BB. */
3484 && !BARRIER_P (insn)
3485 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3489 NEXT_INSN (after) = insn;
3490 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3492 rtx sequence = PATTERN (after);
3493 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3497 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3498 the previous should be the only functions called to insert an insn
3499 once delay slots have been filled since only they know how to
3500 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3504 add_insn_before (rtx insn, rtx before, basic_block bb)
3506 rtx prev = PREV_INSN (before);
3508 gcc_assert (!optimize || !INSN_DELETED_P (before));
3510 PREV_INSN (insn) = prev;
3511 NEXT_INSN (insn) = before;
3515 NEXT_INSN (prev) = insn;
3516 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3518 rtx sequence = PATTERN (prev);
3519 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3522 else if (first_insn == before)
3526 struct sequence_stack *stack = seq_stack;
3527 /* Scan all pending sequences too. */
3528 for (; stack; stack = stack->next)
3529 if (before == stack->first)
3531 stack->first = insn;
3539 && !BARRIER_P (before)
3540 && !BARRIER_P (insn))
3541 bb = BLOCK_FOR_INSN (before);
3545 set_block_for_insn (insn, bb);
3547 df_insn_rescan (insn);
3548 /* Should not happen as first in the BB is always either NOTE or
3550 gcc_assert (BB_HEAD (bb) != insn
3551 /* Avoid clobbering of structure when creating new BB. */
3553 || NOTE_INSN_BASIC_BLOCK_P (insn));
3556 PREV_INSN (before) = insn;
3557 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3558 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3562 /* Replace insn with an deleted instruction note. */
3564 void set_insn_deleted (rtx insn)
3566 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3567 PUT_CODE (insn, NOTE);
3568 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3572 /* Remove an insn from its doubly-linked list. This function knows how
3573 to handle sequences. */
3575 remove_insn (rtx insn)
3577 rtx next = NEXT_INSN (insn);
3578 rtx prev = PREV_INSN (insn);
3581 /* Later in the code, the block will be marked dirty. */
3582 df_insn_delete (NULL, INSN_UID (insn));
3586 NEXT_INSN (prev) = next;
3587 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3589 rtx sequence = PATTERN (prev);
3590 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3593 else if (first_insn == insn)
3597 struct sequence_stack *stack = seq_stack;
3598 /* Scan all pending sequences too. */
3599 for (; stack; stack = stack->next)
3600 if (insn == stack->first)
3602 stack->first = next;
3611 PREV_INSN (next) = prev;
3612 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3613 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3615 else if (last_insn == insn)
3619 struct sequence_stack *stack = seq_stack;
3620 /* Scan all pending sequences too. */
3621 for (; stack; stack = stack->next)
3622 if (insn == stack->last)
3630 if (!BARRIER_P (insn)
3631 && (bb = BLOCK_FOR_INSN (insn)))
3634 df_set_bb_dirty (bb);
3635 if (BB_HEAD (bb) == insn)
3637 /* Never ever delete the basic block note without deleting whole
3639 gcc_assert (!NOTE_P (insn));
3640 BB_HEAD (bb) = next;
3642 if (BB_END (bb) == insn)
3647 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3650 add_function_usage_to (rtx call_insn, rtx call_fusage)
3652 gcc_assert (call_insn && CALL_P (call_insn));
3654 /* Put the register usage information on the CALL. If there is already
3655 some usage information, put ours at the end. */
3656 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3660 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3661 link = XEXP (link, 1))
3664 XEXP (link, 1) = call_fusage;
3667 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3670 /* Delete all insns made since FROM.
3671 FROM becomes the new last instruction. */
3674 delete_insns_since (rtx from)
3679 NEXT_INSN (from) = 0;
3683 /* This function is deprecated, please use sequences instead.
3685 Move a consecutive bunch of insns to a different place in the chain.
3686 The insns to be moved are those between FROM and TO.
3687 They are moved to a new position after the insn AFTER.
3688 AFTER must not be FROM or TO or any insn in between.
3690 This function does not know about SEQUENCEs and hence should not be
3691 called after delay-slot filling has been done. */
3694 reorder_insns_nobb (rtx from, rtx to, rtx after)
3696 /* Splice this bunch out of where it is now. */
3697 if (PREV_INSN (from))
3698 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3700 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3701 if (last_insn == to)
3702 last_insn = PREV_INSN (from);
3703 if (first_insn == from)
3704 first_insn = NEXT_INSN (to);
3706 /* Make the new neighbors point to it and it to them. */
3707 if (NEXT_INSN (after))
3708 PREV_INSN (NEXT_INSN (after)) = to;
3710 NEXT_INSN (to) = NEXT_INSN (after);
3711 PREV_INSN (from) = after;
3712 NEXT_INSN (after) = from;
3713 if (after == last_insn)
3717 /* Same as function above, but take care to update BB boundaries. */
3719 reorder_insns (rtx from, rtx to, rtx after)
3721 rtx prev = PREV_INSN (from);
3722 basic_block bb, bb2;
3724 reorder_insns_nobb (from, to, after);
3726 if (!BARRIER_P (after)
3727 && (bb = BLOCK_FOR_INSN (after)))
3730 df_set_bb_dirty (bb);
3732 if (!BARRIER_P (from)
3733 && (bb2 = BLOCK_FOR_INSN (from)))
3735 if (BB_END (bb2) == to)
3736 BB_END (bb2) = prev;
3737 df_set_bb_dirty (bb2);
3740 if (BB_END (bb) == after)
3743 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3745 df_insn_change_bb (x, bb);
3750 /* Emit insn(s) of given code and pattern
3751 at a specified place within the doubly-linked list.
3753 All of the emit_foo global entry points accept an object
3754 X which is either an insn list or a PATTERN of a single
3757 There are thus a few canonical ways to generate code and
3758 emit it at a specific place in the instruction stream. For
3759 example, consider the instruction named SPOT and the fact that
3760 we would like to emit some instructions before SPOT. We might
3764 ... emit the new instructions ...
3765 insns_head = get_insns ();
3768 emit_insn_before (insns_head, SPOT);
3770 It used to be common to generate SEQUENCE rtl instead, but that
3771 is a relic of the past which no longer occurs. The reason is that
3772 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3773 generated would almost certainly die right after it was created. */
3775 /* Make X be output before the instruction BEFORE. */
3778 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
3783 gcc_assert (before);
3788 switch (GET_CODE (x))
3799 rtx next = NEXT_INSN (insn);
3800 add_insn_before (insn, before, bb);
3806 #ifdef ENABLE_RTL_CHECKING
3813 last = make_insn_raw (x);
3814 add_insn_before (last, before, bb);
3821 /* Make an instruction with body X and code JUMP_INSN
3822 and output it before the instruction BEFORE. */
3825 emit_jump_insn_before_noloc (rtx x, rtx before)
3827 rtx insn, last = NULL_RTX;
3829 gcc_assert (before);
3831 switch (GET_CODE (x))
3842 rtx next = NEXT_INSN (insn);
3843 add_insn_before (insn, before, NULL);
3849 #ifdef ENABLE_RTL_CHECKING
3856 last = make_jump_insn_raw (x);
3857 add_insn_before (last, before, NULL);
3864 /* Make an instruction with body X and code CALL_INSN
3865 and output it before the instruction BEFORE. */
3868 emit_call_insn_before_noloc (rtx x, rtx before)
3870 rtx last = NULL_RTX, insn;
3872 gcc_assert (before);
3874 switch (GET_CODE (x))
3885 rtx next = NEXT_INSN (insn);
3886 add_insn_before (insn, before, NULL);
3892 #ifdef ENABLE_RTL_CHECKING
3899 last = make_call_insn_raw (x);
3900 add_insn_before (last, before, NULL);
3907 /* Make an insn of code BARRIER
3908 and output it before the insn BEFORE. */
3911 emit_barrier_before (rtx before)
3913 rtx insn = rtx_alloc (BARRIER);
3915 INSN_UID (insn) = cur_insn_uid++;
3917 add_insn_before (insn, before, NULL);
3921 /* Emit the label LABEL before the insn BEFORE. */
3924 emit_label_before (rtx label, rtx before)
3926 /* This can be called twice for the same label as a result of the
3927 confusion that follows a syntax error! So make it harmless. */
3928 if (INSN_UID (label) == 0)
3930 INSN_UID (label) = cur_insn_uid++;
3931 add_insn_before (label, before, NULL);
3937 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3940 emit_note_before (enum insn_note subtype, rtx before)
3942 rtx note = rtx_alloc (NOTE);
3943 INSN_UID (note) = cur_insn_uid++;
3944 NOTE_KIND (note) = subtype;
3945 BLOCK_FOR_INSN (note) = NULL;
3946 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
3948 add_insn_before (note, before, NULL);
3952 /* Helper for emit_insn_after, handles lists of instructions
3956 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
3960 if (!bb && !BARRIER_P (after))
3961 bb = BLOCK_FOR_INSN (after);
3965 df_set_bb_dirty (bb);
3966 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3967 if (!BARRIER_P (last))
3969 set_block_for_insn (last, bb);
3970 df_insn_rescan (last);
3972 if (!BARRIER_P (last))
3974 set_block_for_insn (last, bb);
3975 df_insn_rescan (last);
3977 if (BB_END (bb) == after)
3981 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3984 after_after = NEXT_INSN (after);
3986 NEXT_INSN (after) = first;
3987 PREV_INSN (first) = after;
3988 NEXT_INSN (last) = after_after;
3990 PREV_INSN (after_after) = last;
3992 if (after == last_insn)
3997 /* Make X be output after the insn AFTER and set the BB of insn. If
3998 BB is NULL, an attempt is made to infer the BB from AFTER. */
4001 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4010 switch (GET_CODE (x))
4018 last = emit_insn_after_1 (x, after, bb);
4021 #ifdef ENABLE_RTL_CHECKING
4028 last = make_insn_raw (x);
4029 add_insn_after (last, after, bb);
4037 /* Make an insn of code JUMP_INSN with body X
4038 and output it after the insn AFTER. */
4041 emit_jump_insn_after_noloc (rtx x, rtx after)
4047 switch (GET_CODE (x))
4055 last = emit_insn_after_1 (x, after, NULL);
4058 #ifdef ENABLE_RTL_CHECKING
4065 last = make_jump_insn_raw (x);
4066 add_insn_after (last, after, NULL);
4073 /* Make an instruction with body X and code CALL_INSN
4074 and output it after the instruction AFTER. */
4077 emit_call_insn_after_noloc (rtx x, rtx after)
4083 switch (GET_CODE (x))
4091 last = emit_insn_after_1 (x, after, NULL);
4094 #ifdef ENABLE_RTL_CHECKING
4101 last = make_call_insn_raw (x);
4102 add_insn_after (last, after, NULL);
4109 /* Make an insn of code BARRIER
4110 and output it after the insn AFTER. */
4113 emit_barrier_after (rtx after)
4115 rtx insn = rtx_alloc (BARRIER);
4117 INSN_UID (insn) = cur_insn_uid++;
4119 add_insn_after (insn, after, NULL);
4123 /* Emit the label LABEL after the insn AFTER. */
4126 emit_label_after (rtx label, rtx after)
4128 /* This can be called twice for the same label
4129 as a result of the confusion that follows a syntax error!
4130 So make it harmless. */
4131 if (INSN_UID (label) == 0)
4133 INSN_UID (label) = cur_insn_uid++;
4134 add_insn_after (label, after, NULL);
4140 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4143 emit_note_after (enum insn_note subtype, rtx after)
4145 rtx note = rtx_alloc (NOTE);
4146 INSN_UID (note) = cur_insn_uid++;
4147 NOTE_KIND (note) = subtype;
4148 BLOCK_FOR_INSN (note) = NULL;
4149 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4150 add_insn_after (note, after, NULL);
4154 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4156 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4158 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4160 if (pattern == NULL_RTX || !loc)
4163 after = NEXT_INSN (after);
4166 if (active_insn_p (after) && !INSN_LOCATOR (after))
4167 INSN_LOCATOR (after) = loc;
4170 after = NEXT_INSN (after);
4175 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4177 emit_insn_after (rtx pattern, rtx after)
4180 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4182 return emit_insn_after_noloc (pattern, after, NULL);
4185 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4187 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4189 rtx last = emit_jump_insn_after_noloc (pattern, after);
4191 if (pattern == NULL_RTX || !loc)
4194 after = NEXT_INSN (after);
4197 if (active_insn_p (after) && !INSN_LOCATOR (after))
4198 INSN_LOCATOR (after) = loc;
4201 after = NEXT_INSN (after);
4206 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4208 emit_jump_insn_after (rtx pattern, rtx after)
4211 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4213 return emit_jump_insn_after_noloc (pattern, after);
4216 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4218 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4220 rtx last = emit_call_insn_after_noloc (pattern, after);
4222 if (pattern == NULL_RTX || !loc)
4225 after = NEXT_INSN (after);
4228 if (active_insn_p (after) && !INSN_LOCATOR (after))
4229 INSN_LOCATOR (after) = loc;
4232 after = NEXT_INSN (after);
4237 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4239 emit_call_insn_after (rtx pattern, rtx after)
4242 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4244 return emit_call_insn_after_noloc (pattern, after);
4247 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4249 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4251 rtx first = PREV_INSN (before);
4252 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4254 if (pattern == NULL_RTX || !loc)
4258 first = get_insns ();
4260 first = NEXT_INSN (first);
4263 if (active_insn_p (first) && !INSN_LOCATOR (first))
4264 INSN_LOCATOR (first) = loc;
4267 first = NEXT_INSN (first);
4272 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4274 emit_insn_before (rtx pattern, rtx before)
4276 if (INSN_P (before))
4277 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4279 return emit_insn_before_noloc (pattern, before, NULL);
4282 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4284 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4286 rtx first = PREV_INSN (before);
4287 rtx last = emit_jump_insn_before_noloc (pattern, before);
4289 if (pattern == NULL_RTX)
4292 first = NEXT_INSN (first);
4295 if (active_insn_p (first) && !INSN_LOCATOR (first))
4296 INSN_LOCATOR (first) = loc;
4299 first = NEXT_INSN (first);
4304 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4306 emit_jump_insn_before (rtx pattern, rtx before)
4308 if (INSN_P (before))
4309 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4311 return emit_jump_insn_before_noloc (pattern, before);
4314 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4316 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4318 rtx first = PREV_INSN (before);
4319 rtx last = emit_call_insn_before_noloc (pattern, before);
4321 if (pattern == NULL_RTX)
4324 first = NEXT_INSN (first);
4327 if (active_insn_p (first) && !INSN_LOCATOR (first))
4328 INSN_LOCATOR (first) = loc;
4331 first = NEXT_INSN (first);
4336 /* like emit_call_insn_before_noloc,
4337 but set insn_locator according to before. */
4339 emit_call_insn_before (rtx pattern, rtx before)
4341 if (INSN_P (before))
4342 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4344 return emit_call_insn_before_noloc (pattern, before);
4347 /* Take X and emit it at the end of the doubly-linked
4350 Returns the last insn emitted. */
4355 rtx last = last_insn;
4361 switch (GET_CODE (x))
4372 rtx next = NEXT_INSN (insn);
4379 #ifdef ENABLE_RTL_CHECKING
4386 last = make_insn_raw (x);
4394 /* Make an insn of code JUMP_INSN with pattern X
4395 and add it to the end of the doubly-linked list. */
4398 emit_jump_insn (rtx x)
4400 rtx last = NULL_RTX, insn;
4402 switch (GET_CODE (x))
4413 rtx next = NEXT_INSN (insn);
4420 #ifdef ENABLE_RTL_CHECKING
4427 last = make_jump_insn_raw (x);
4435 /* Make an insn of code CALL_INSN with pattern X
4436 and add it to the end of the doubly-linked list. */
4439 emit_call_insn (rtx x)
4443 switch (GET_CODE (x))
4451 insn = emit_insn (x);
4454 #ifdef ENABLE_RTL_CHECKING
4461 insn = make_call_insn_raw (x);
4469 /* Add the label LABEL to the end of the doubly-linked list. */
4472 emit_label (rtx label)
4474 /* This can be called twice for the same label
4475 as a result of the confusion that follows a syntax error!
4476 So make it harmless. */
4477 if (INSN_UID (label) == 0)
4479 INSN_UID (label) = cur_insn_uid++;
4485 /* Make an insn of code BARRIER
4486 and add it to the end of the doubly-linked list. */
4491 rtx barrier = rtx_alloc (BARRIER);
4492 INSN_UID (barrier) = cur_insn_uid++;
4497 /* Emit a copy of note ORIG. */
4500 emit_note_copy (rtx orig)
4504 note = rtx_alloc (NOTE);
4506 INSN_UID (note) = cur_insn_uid++;
4507 NOTE_DATA (note) = NOTE_DATA (orig);
4508 NOTE_KIND (note) = NOTE_KIND (orig);
4509 BLOCK_FOR_INSN (note) = NULL;
4515 /* Make an insn of code NOTE or type NOTE_NO
4516 and add it to the end of the doubly-linked list. */
4519 emit_note (enum insn_note kind)
4523 note = rtx_alloc (NOTE);
4524 INSN_UID (note) = cur_insn_uid++;
4525 NOTE_KIND (note) = kind;
4526 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4527 BLOCK_FOR_INSN (note) = NULL;
4532 /* Emit a clobber of lvalue X. */
4535 emit_clobber (rtx x)
4537 /* CONCATs should not appear in the insn stream. */
4538 if (GET_CODE (x) == CONCAT)
4540 emit_clobber (XEXP (x, 0));
4541 return emit_clobber (XEXP (x, 1));
4543 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4546 /* Return a sequence of insns to clobber lvalue X. */
4560 /* Emit a use of rvalue X. */
4565 /* CONCATs should not appear in the insn stream. */
4566 if (GET_CODE (x) == CONCAT)
4568 emit_use (XEXP (x, 0));
4569 return emit_use (XEXP (x, 1));
4571 return emit_insn (gen_rtx_USE (VOIDmode, x));
4574 /* Return a sequence of insns to use rvalue X. */
4588 /* Cause next statement to emit a line note even if the line number
4592 force_next_line_note (void)
4597 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4598 note of this type already exists, remove it first. */
4601 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4603 rtx note = find_reg_note (insn, kind, NULL_RTX);
4604 rtx new_note = NULL;
4610 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4611 has multiple sets (some callers assume single_set
4612 means the insn only has one set, when in fact it
4613 means the insn only has one * useful * set). */
4614 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4620 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4621 It serves no useful purpose and breaks eliminate_regs. */
4622 if (GET_CODE (datum) == ASM_OPERANDS)
4627 XEXP (note, 0) = datum;
4628 df_notes_rescan (insn);
4636 XEXP (note, 0) = datum;
4642 new_note = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4643 REG_NOTES (insn) = new_note;
4649 df_notes_rescan (insn);
4655 return REG_NOTES (insn);
4658 /* Return an indication of which type of insn should have X as a body.
4659 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4661 static enum rtx_code
4662 classify_insn (rtx x)
4666 if (GET_CODE (x) == CALL)
4668 if (GET_CODE (x) == RETURN)
4670 if (GET_CODE (x) == SET)
4672 if (SET_DEST (x) == pc_rtx)
4674 else if (GET_CODE (SET_SRC (x)) == CALL)
4679 if (GET_CODE (x) == PARALLEL)
4682 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4683 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4685 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4686 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4688 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4689 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4695 /* Emit the rtl pattern X as an appropriate kind of insn.
4696 If X is a label, it is simply added into the insn chain. */
4701 enum rtx_code code = classify_insn (x);
4706 return emit_label (x);
4708 return emit_insn (x);
4711 rtx insn = emit_jump_insn (x);
4712 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4713 return emit_barrier ();
4717 return emit_call_insn (x);
4723 /* Space for free sequence stack entries. */
4724 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4726 /* Begin emitting insns to a sequence. If this sequence will contain
4727 something that might cause the compiler to pop arguments to function
4728 calls (because those pops have previously been deferred; see
4729 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4730 before calling this function. That will ensure that the deferred
4731 pops are not accidentally emitted in the middle of this sequence. */
4734 start_sequence (void)
4736 struct sequence_stack *tem;
4738 if (free_sequence_stack != NULL)
4740 tem = free_sequence_stack;
4741 free_sequence_stack = tem->next;
4744 tem = ggc_alloc (sizeof (struct sequence_stack));
4746 tem->next = seq_stack;
4747 tem->first = first_insn;
4748 tem->last = last_insn;
4756 /* Set up the insn chain starting with FIRST as the current sequence,
4757 saving the previously current one. See the documentation for
4758 start_sequence for more information about how to use this function. */
4761 push_to_sequence (rtx first)
4767 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4773 /* Like push_to_sequence, but take the last insn as an argument to avoid
4774 looping through the list. */
4777 push_to_sequence2 (rtx first, rtx last)
4785 /* Set up the outer-level insn chain
4786 as the current sequence, saving the previously current one. */
4789 push_topmost_sequence (void)
4791 struct sequence_stack *stack, *top = NULL;
4795 for (stack = seq_stack; stack; stack = stack->next)
4798 first_insn = top->first;
4799 last_insn = top->last;
4802 /* After emitting to the outer-level insn chain, update the outer-level
4803 insn chain, and restore the previous saved state. */
4806 pop_topmost_sequence (void)
4808 struct sequence_stack *stack, *top = NULL;
4810 for (stack = seq_stack; stack; stack = stack->next)
4813 top->first = first_insn;
4814 top->last = last_insn;
4819 /* After emitting to a sequence, restore previous saved state.
4821 To get the contents of the sequence just made, you must call
4822 `get_insns' *before* calling here.
4824 If the compiler might have deferred popping arguments while
4825 generating this sequence, and this sequence will not be immediately
4826 inserted into the instruction stream, use do_pending_stack_adjust
4827 before calling get_insns. That will ensure that the deferred
4828 pops are inserted into this sequence, and not into some random
4829 location in the instruction stream. See INHIBIT_DEFER_POP for more
4830 information about deferred popping of arguments. */
4835 struct sequence_stack *tem = seq_stack;
4837 first_insn = tem->first;
4838 last_insn = tem->last;
4839 seq_stack = tem->next;
4841 memset (tem, 0, sizeof (*tem));
4842 tem->next = free_sequence_stack;
4843 free_sequence_stack = tem;
4846 /* Return 1 if currently emitting into a sequence. */
4849 in_sequence_p (void)
4851 return seq_stack != 0;
4854 /* Put the various virtual registers into REGNO_REG_RTX. */
4857 init_virtual_regs (void)
4859 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4860 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4861 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4862 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4863 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4867 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4868 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4869 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4870 static int copy_insn_n_scratches;
4872 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4873 copied an ASM_OPERANDS.
4874 In that case, it is the original input-operand vector. */
4875 static rtvec orig_asm_operands_vector;
4877 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4878 copied an ASM_OPERANDS.
4879 In that case, it is the copied input-operand vector. */
4880 static rtvec copy_asm_operands_vector;
4882 /* Likewise for the constraints vector. */
4883 static rtvec orig_asm_constraints_vector;
4884 static rtvec copy_asm_constraints_vector;
4886 /* Recursively create a new copy of an rtx for copy_insn.
4887 This function differs from copy_rtx in that it handles SCRATCHes and
4888 ASM_OPERANDs properly.
4889 Normally, this function is not used directly; use copy_insn as front end.
4890 However, you could first copy an insn pattern with copy_insn and then use
4891 this function afterwards to properly copy any REG_NOTEs containing
4895 copy_insn_1 (rtx orig)
4900 const char *format_ptr;
4902 code = GET_CODE (orig);
4917 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4922 for (i = 0; i < copy_insn_n_scratches; i++)
4923 if (copy_insn_scratch_in[i] == orig)
4924 return copy_insn_scratch_out[i];
4928 if (shared_const_p (orig))
4932 /* A MEM with a constant address is not sharable. The problem is that
4933 the constant address may need to be reloaded. If the mem is shared,
4934 then reloading one copy of this mem will cause all copies to appear
4935 to have been reloaded. */
4941 /* Copy the various flags, fields, and other information. We assume
4942 that all fields need copying, and then clear the fields that should
4943 not be copied. That is the sensible default behavior, and forces
4944 us to explicitly document why we are *not* copying a flag. */
4945 copy = shallow_copy_rtx (orig);
4947 /* We do not copy the USED flag, which is used as a mark bit during
4948 walks over the RTL. */
4949 RTX_FLAG (copy, used) = 0;
4951 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4954 RTX_FLAG (copy, jump) = 0;
4955 RTX_FLAG (copy, call) = 0;
4956 RTX_FLAG (copy, frame_related) = 0;
4959 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4961 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4962 switch (*format_ptr++)
4965 if (XEXP (orig, i) != NULL)
4966 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4971 if (XVEC (orig, i) == orig_asm_constraints_vector)
4972 XVEC (copy, i) = copy_asm_constraints_vector;
4973 else if (XVEC (orig, i) == orig_asm_operands_vector)
4974 XVEC (copy, i) = copy_asm_operands_vector;
4975 else if (XVEC (orig, i) != NULL)
4977 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4978 for (j = 0; j < XVECLEN (copy, i); j++)
4979 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4990 /* These are left unchanged. */
4997 if (code == SCRATCH)
4999 i = copy_insn_n_scratches++;
5000 gcc_assert (i < MAX_RECOG_OPERANDS);
5001 copy_insn_scratch_in[i] = orig;
5002 copy_insn_scratch_out[i] = copy;
5004 else if (code == ASM_OPERANDS)
5006 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5007 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5008 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5009 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5015 /* Create a new copy of an rtx.
5016 This function differs from copy_rtx in that it handles SCRATCHes and
5017 ASM_OPERANDs properly.
5018 INSN doesn't really have to be a full INSN; it could be just the
5021 copy_insn (rtx insn)
5023 copy_insn_n_scratches = 0;
5024 orig_asm_operands_vector = 0;
5025 orig_asm_constraints_vector = 0;
5026 copy_asm_operands_vector = 0;
5027 copy_asm_constraints_vector = 0;
5028 return copy_insn_1 (insn);
5031 /* Initialize data structures and variables in this file
5032 before generating rtl for each function. */
5040 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5041 last_location = UNKNOWN_LOCATION;
5042 first_label_num = label_num;
5045 /* Init the tables that describe all the pseudo regs. */
5047 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5049 crtl->emit.regno_pointer_align
5050 = xcalloc (crtl->emit.regno_pointer_align_length
5051 * sizeof (unsigned char), 1);
5054 = ggc_alloc (crtl->emit.regno_pointer_align_length * sizeof (rtx));
5056 /* Put copies of all the hard registers into regno_reg_rtx. */
5057 memcpy (regno_reg_rtx,
5058 static_regno_reg_rtx,
5059 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5061 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5062 init_virtual_regs ();
5064 /* Indicate that the virtual registers and stack locations are
5066 REG_POINTER (stack_pointer_rtx) = 1;
5067 REG_POINTER (frame_pointer_rtx) = 1;
5068 REG_POINTER (hard_frame_pointer_rtx) = 1;
5069 REG_POINTER (arg_pointer_rtx) = 1;
5071 REG_POINTER (virtual_incoming_args_rtx) = 1;
5072 REG_POINTER (virtual_stack_vars_rtx) = 1;
5073 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5074 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5075 REG_POINTER (virtual_cfa_rtx) = 1;
5077 #ifdef STACK_BOUNDARY
5078 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5079 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5080 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5081 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5083 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5084 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5085 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5086 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5087 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5090 #ifdef INIT_EXPANDERS
5095 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5098 gen_const_vector (enum machine_mode mode, int constant)
5103 enum machine_mode inner;
5105 units = GET_MODE_NUNITS (mode);
5106 inner = GET_MODE_INNER (mode);
5108 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5110 v = rtvec_alloc (units);
5112 /* We need to call this function after we set the scalar const_tiny_rtx
5114 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5116 for (i = 0; i < units; ++i)
5117 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5119 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5123 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5124 all elements are zero, and the one vector when all elements are one. */
5126 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5128 enum machine_mode inner = GET_MODE_INNER (mode);
5129 int nunits = GET_MODE_NUNITS (mode);
5133 /* Check to see if all of the elements have the same value. */
5134 x = RTVEC_ELT (v, nunits - 1);
5135 for (i = nunits - 2; i >= 0; i--)
5136 if (RTVEC_ELT (v, i) != x)
5139 /* If the values are all the same, check to see if we can use one of the
5140 standard constant vectors. */
5143 if (x == CONST0_RTX (inner))
5144 return CONST0_RTX (mode);
5145 else if (x == CONST1_RTX (inner))
5146 return CONST1_RTX (mode);
5149 return gen_rtx_raw_CONST_VECTOR (mode, v);
5152 /* Initialise global register information required by all functions. */
5155 init_emit_regs (void)
5159 /* Reset register attributes */
5160 htab_empty (reg_attrs_htab);
5162 /* We need reg_raw_mode, so initialize the modes now. */
5163 init_reg_modes_target ();
5165 /* Assign register numbers to the globally defined register rtx. */
5166 pc_rtx = gen_rtx_PC (VOIDmode);
5167 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5168 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5169 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5170 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5171 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5172 virtual_incoming_args_rtx =
5173 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5174 virtual_stack_vars_rtx =
5175 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5176 virtual_stack_dynamic_rtx =
5177 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5178 virtual_outgoing_args_rtx =
5179 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5180 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5182 /* Initialize RTL for commonly used hard registers. These are
5183 copied into regno_reg_rtx as we begin to compile each function. */
5184 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5185 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5187 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5188 return_address_pointer_rtx
5189 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5192 #ifdef STATIC_CHAIN_REGNUM
5193 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5195 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5196 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5197 static_chain_incoming_rtx
5198 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5201 static_chain_incoming_rtx = static_chain_rtx;
5205 static_chain_rtx = STATIC_CHAIN;
5207 #ifdef STATIC_CHAIN_INCOMING
5208 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5210 static_chain_incoming_rtx = static_chain_rtx;
5214 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5215 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5217 pic_offset_table_rtx = NULL_RTX;
5220 /* Create some permanent unique rtl objects shared between all functions.
5221 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5224 init_emit_once (int line_numbers)
5227 enum machine_mode mode;
5228 enum machine_mode double_mode;
5230 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5232 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5233 const_int_htab_eq, NULL);
5235 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5236 const_double_htab_eq, NULL);
5238 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5239 const_fixed_htab_eq, NULL);
5241 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5242 mem_attrs_htab_eq, NULL);
5243 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5244 reg_attrs_htab_eq, NULL);
5246 no_line_numbers = ! line_numbers;
5248 /* Compute the word and byte modes. */
5250 byte_mode = VOIDmode;
5251 word_mode = VOIDmode;
5252 double_mode = VOIDmode;
5254 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5256 mode = GET_MODE_WIDER_MODE (mode))
5258 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5259 && byte_mode == VOIDmode)
5262 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5263 && word_mode == VOIDmode)
5267 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5269 mode = GET_MODE_WIDER_MODE (mode))
5271 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5272 && double_mode == VOIDmode)
5276 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5278 #ifdef INIT_EXPANDERS
5279 /* This is to initialize {init|mark|free}_machine_status before the first
5280 call to push_function_context_to. This is needed by the Chill front
5281 end which calls push_function_context_to before the first call to
5282 init_function_start. */
5286 /* Create the unique rtx's for certain rtx codes and operand values. */
5288 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5289 tries to use these variables. */
5290 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5291 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5292 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5294 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5295 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5296 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5298 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5300 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5301 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5302 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5307 dconsthalf = dconst1;
5308 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5310 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5312 const REAL_VALUE_TYPE *const r =
5313 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5315 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5317 mode = GET_MODE_WIDER_MODE (mode))
5318 const_tiny_rtx[i][(int) mode] =
5319 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5321 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5323 mode = GET_MODE_WIDER_MODE (mode))
5324 const_tiny_rtx[i][(int) mode] =
5325 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5327 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5329 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5331 mode = GET_MODE_WIDER_MODE (mode))
5332 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5334 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5336 mode = GET_MODE_WIDER_MODE (mode))
5337 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5340 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5342 mode = GET_MODE_WIDER_MODE (mode))
5344 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5345 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5348 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5350 mode = GET_MODE_WIDER_MODE (mode))
5352 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5353 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5356 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5358 mode = GET_MODE_WIDER_MODE (mode))
5360 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5361 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5364 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5366 mode = GET_MODE_WIDER_MODE (mode))
5368 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5369 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5372 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5374 mode = GET_MODE_WIDER_MODE (mode))
5376 FCONST0(mode).data.high = 0;
5377 FCONST0(mode).data.low = 0;
5378 FCONST0(mode).mode = mode;
5379 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5380 FCONST0 (mode), mode);
5383 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5385 mode = GET_MODE_WIDER_MODE (mode))
5387 FCONST0(mode).data.high = 0;
5388 FCONST0(mode).data.low = 0;
5389 FCONST0(mode).mode = mode;
5390 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5391 FCONST0 (mode), mode);
5394 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5396 mode = GET_MODE_WIDER_MODE (mode))
5398 FCONST0(mode).data.high = 0;
5399 FCONST0(mode).data.low = 0;
5400 FCONST0(mode).mode = mode;
5401 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5402 FCONST0 (mode), mode);
5404 /* We store the value 1. */
5405 FCONST1(mode).data.high = 0;
5406 FCONST1(mode).data.low = 0;
5407 FCONST1(mode).mode = mode;
5408 lshift_double (1, 0, GET_MODE_FBIT (mode),
5409 2 * HOST_BITS_PER_WIDE_INT,
5410 &FCONST1(mode).data.low,
5411 &FCONST1(mode).data.high,
5412 SIGNED_FIXED_POINT_MODE_P (mode));
5413 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5414 FCONST1 (mode), mode);
5417 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5419 mode = GET_MODE_WIDER_MODE (mode))
5421 FCONST0(mode).data.high = 0;
5422 FCONST0(mode).data.low = 0;
5423 FCONST0(mode).mode = mode;
5424 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5425 FCONST0 (mode), mode);
5427 /* We store the value 1. */
5428 FCONST1(mode).data.high = 0;
5429 FCONST1(mode).data.low = 0;
5430 FCONST1(mode).mode = mode;
5431 lshift_double (1, 0, GET_MODE_FBIT (mode),
5432 2 * HOST_BITS_PER_WIDE_INT,
5433 &FCONST1(mode).data.low,
5434 &FCONST1(mode).data.high,
5435 SIGNED_FIXED_POINT_MODE_P (mode));
5436 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5437 FCONST1 (mode), mode);
5440 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5442 mode = GET_MODE_WIDER_MODE (mode))
5444 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5447 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5449 mode = GET_MODE_WIDER_MODE (mode))
5451 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5454 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5456 mode = GET_MODE_WIDER_MODE (mode))
5458 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5459 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5462 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5464 mode = GET_MODE_WIDER_MODE (mode))
5466 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5467 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5470 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5471 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5472 const_tiny_rtx[0][i] = const0_rtx;
5474 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5475 if (STORE_FLAG_VALUE == 1)
5476 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5479 /* Produce exact duplicate of insn INSN after AFTER.
5480 Care updating of libcall regions if present. */
5483 emit_copy_of_insn_after (rtx insn, rtx after)
5487 switch (GET_CODE (insn))
5490 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5494 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5498 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5499 if (CALL_INSN_FUNCTION_USAGE (insn))
5500 CALL_INSN_FUNCTION_USAGE (new)
5501 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5502 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5503 RTL_CONST_CALL_P (new) = RTL_CONST_CALL_P (insn);
5504 RTL_PURE_CALL_P (new) = RTL_PURE_CALL_P (insn);
5505 RTL_LOOPING_CONST_OR_PURE_CALL_P (new)
5506 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5513 /* Update LABEL_NUSES. */
5514 mark_jump_label (PATTERN (new), new, 0);
5516 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5518 /* If the old insn is frame related, then so is the new one. This is
5519 primarily needed for IA-64 unwind info which marks epilogue insns,
5520 which may be duplicated by the basic block reordering code. */
5521 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn);
5523 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5524 will make them. REG_LABEL_TARGETs are created there too, but are
5525 supposed to be sticky, so we copy them. */
5526 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5527 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5529 if (GET_CODE (link) == EXPR_LIST)
5531 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5532 copy_insn_1 (XEXP (link, 0)), REG_NOTES (new));
5535 = gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5536 XEXP (link, 0), REG_NOTES (new));
5539 INSN_CODE (new) = INSN_CODE (insn);
5543 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5545 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5547 if (hard_reg_clobbers[mode][regno])
5548 return hard_reg_clobbers[mode][regno];
5550 return (hard_reg_clobbers[mode][regno] =
5551 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5554 #include "gt-emit-rtl.h"