1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num = 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl[GR_MAX];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
101 REAL_VALUE_TYPE dconst0;
102 REAL_VALUE_TYPE dconst1;
103 REAL_VALUE_TYPE dconst2;
104 REAL_VALUE_TYPE dconstm1;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 static rtx make_jump_insn_raw PARAMS ((rtx));
174 static rtx make_call_insn_raw PARAMS ((rtx));
175 static rtx find_line_note PARAMS ((rtx));
176 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
177 static void unshare_all_rtl_1 PARAMS ((rtx));
178 static void unshare_all_decls PARAMS ((tree));
179 static void reset_used_decls PARAMS ((tree));
180 static void mark_label_nuses PARAMS ((rtx));
181 static hashval_t const_int_htab_hash PARAMS ((const void *));
182 static int const_int_htab_eq PARAMS ((const void *,
184 static int rtx_htab_mark_1 PARAMS ((void **, void *));
185 static void rtx_htab_mark PARAMS ((void *));
188 /* Returns a hash code for X (which is a really a CONST_INT). */
191 const_int_htab_hash (x)
194 return (hashval_t) INTVAL ((const struct rtx_def *) x);
197 /* Returns non-zero if the value represented by X (which is really a
198 CONST_INT) is the same as that given by Y (which is really a
202 const_int_htab_eq (x, y)
206 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
209 /* Mark the hash-table element X (which is really a pointer to an
213 rtx_htab_mark_1 (x, data)
215 void *data ATTRIBUTE_UNUSED;
221 /* Mark all the elements of HTAB (which is really an htab_t full of
228 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
231 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
232 don't attempt to share with the various global pieces of rtl (such as
233 frame_pointer_rtx). */
236 gen_raw_REG (mode, regno)
237 enum machine_mode mode;
240 rtx x = gen_rtx_raw_REG (mode, regno);
241 ORIGINAL_REGNO (x) = regno;
245 /* There are some RTL codes that require special attention; the generation
246 functions do the raw handling. If you add to this list, modify
247 special_rtx in gengenrtl.c as well. */
250 gen_rtx_CONST_INT (mode, arg)
251 enum machine_mode mode ATTRIBUTE_UNUSED;
256 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
257 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx && arg == STORE_FLAG_VALUE)
261 return const_true_rtx;
264 /* Look up the CONST_INT in the hash table. */
265 slot = htab_find_slot_with_hash (const_int_htab, &arg,
266 (hashval_t) arg, INSERT);
268 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
273 /* CONST_DOUBLEs needs special handling because their length is known
277 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
278 enum machine_mode mode;
280 HOST_WIDE_INT arg1, arg2;
282 rtx r = rtx_alloc (CONST_DOUBLE);
287 X0EXP (r, 1) = NULL_RTX;
291 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
298 gen_rtx_REG (mode, regno)
299 enum machine_mode mode;
302 /* In case the MD file explicitly references the frame pointer, have
303 all such references point to the same frame pointer. This is
304 used during frame pointer elimination to distinguish the explicit
305 references to these registers from pseudos that happened to be
308 If we have eliminated the frame pointer or arg pointer, we will
309 be using it as a normal register, for example as a spill
310 register. In such cases, we might be accessing it in a mode that
311 is not Pmode and therefore cannot use the pre-allocated rtx.
313 Also don't do this when we are making new REGs in reload, since
314 we don't want to get confused with the real pointers. */
316 if (mode == Pmode && !reload_in_progress)
318 if (regno == FRAME_POINTER_REGNUM)
319 return frame_pointer_rtx;
320 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
321 if (regno == HARD_FRAME_POINTER_REGNUM)
322 return hard_frame_pointer_rtx;
324 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
325 if (regno == ARG_POINTER_REGNUM)
326 return arg_pointer_rtx;
328 #ifdef RETURN_ADDRESS_POINTER_REGNUM
329 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
330 return return_address_pointer_rtx;
332 if (regno == STACK_POINTER_REGNUM)
333 return stack_pointer_rtx;
336 return gen_raw_REG (mode, regno);
340 gen_rtx_MEM (mode, addr)
341 enum machine_mode mode;
344 rtx rt = gen_rtx_raw_MEM (mode, addr);
346 /* This field is not cleared by the mere allocation of the rtx, so
348 MEM_ALIAS_SET (rt) = 0;
354 gen_rtx_SUBREG (mode, reg, offset)
355 enum machine_mode mode;
359 /* This is the most common failure type.
360 Catch it early so we can see who does it. */
361 if ((offset % GET_MODE_SIZE (mode)) != 0)
364 /* This check isn't usable right now because combine will
365 throw arbitrary crap like a CALL into a SUBREG in
366 gen_lowpart_for_combine so we must just eat it. */
368 /* Check for this too. */
369 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
372 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
375 /* Generate a SUBREG representing the least-significant part
376 * of REG if MODE is smaller than mode of REG, otherwise
377 * paradoxical SUBREG. */
379 gen_lowpart_SUBREG (mode, reg)
380 enum machine_mode mode;
383 enum machine_mode inmode;
385 inmode = GET_MODE (reg);
386 if (inmode == VOIDmode)
388 return gen_rtx_SUBREG (mode, reg,
389 subreg_lowpart_offset (mode, inmode));
392 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
394 ** This routine generates an RTX of the size specified by
395 ** <code>, which is an RTX code. The RTX structure is initialized
396 ** from the arguments <element1> through <elementn>, which are
397 ** interpreted according to the specific RTX type's format. The
398 ** special machine mode associated with the rtx (if any) is specified
401 ** gen_rtx can be invoked in a way which resembles the lisp-like
402 ** rtx it will generate. For example, the following rtx structure:
404 ** (plus:QI (mem:QI (reg:SI 1))
405 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
407 ** ...would be generated by the following C code:
409 ** gen_rtx (PLUS, QImode,
410 ** gen_rtx (MEM, QImode,
411 ** gen_rtx (REG, SImode, 1)),
412 ** gen_rtx (MEM, QImode,
413 ** gen_rtx (PLUS, SImode,
414 ** gen_rtx (REG, SImode, 2),
415 ** gen_rtx (REG, SImode, 3)))),
420 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
422 #ifndef ANSI_PROTOTYPES
424 enum machine_mode mode;
427 register int i; /* Array indices... */
428 register const char *fmt; /* Current rtx's format... */
429 register rtx rt_val; /* RTX to return to caller... */
433 #ifndef ANSI_PROTOTYPES
434 code = va_arg (p, enum rtx_code);
435 mode = va_arg (p, enum machine_mode);
441 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
446 rtx arg0 = va_arg (p, rtx);
447 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
448 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
449 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
454 rt_val = gen_rtx_REG (mode, va_arg (p, int));
458 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
462 rt_val = rtx_alloc (code); /* Allocate the storage space. */
463 rt_val->mode = mode; /* Store the machine mode... */
465 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
466 for (i = 0; i < GET_RTX_LENGTH (code); i++)
470 case '0': /* Unused field. */
473 case 'i': /* An integer? */
474 XINT (rt_val, i) = va_arg (p, int);
477 case 'w': /* A wide integer? */
478 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
481 case 's': /* A string? */
482 XSTR (rt_val, i) = va_arg (p, char *);
485 case 'e': /* An expression? */
486 case 'u': /* An insn? Same except when printing. */
487 XEXP (rt_val, i) = va_arg (p, rtx);
490 case 'E': /* An RTX vector? */
491 XVEC (rt_val, i) = va_arg (p, rtvec);
494 case 'b': /* A bitmap? */
495 XBITMAP (rt_val, i) = va_arg (p, bitmap);
498 case 't': /* A tree? */
499 XTREE (rt_val, i) = va_arg (p, tree);
513 /* gen_rtvec (n, [rt1, ..., rtn])
515 ** This routine creates an rtvec and stores within it the
516 ** pointers to rtx's which are its arguments.
521 gen_rtvec VPARAMS ((int n, ...))
523 #ifndef ANSI_PROTOTYPES
532 #ifndef ANSI_PROTOTYPES
537 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
539 vector = (rtx *) alloca (n * sizeof (rtx));
541 for (i = 0; i < n; i++)
542 vector[i] = va_arg (p, rtx);
545 return gen_rtvec_v (n, vector);
549 gen_rtvec_v (n, argp)
554 register rtvec rt_val;
557 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
559 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
561 for (i = 0; i < n; i++)
562 rt_val->elem[i] = *argp++;
568 /* Generate a REG rtx for a new pseudo register of mode MODE.
569 This pseudo is assigned the next sequential register number. */
573 enum machine_mode mode;
575 struct function *f = cfun;
578 /* Don't let anything called after initial flow analysis create new
583 if (generating_concat_p
584 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
585 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
587 /* For complex modes, don't make a single pseudo.
588 Instead, make a CONCAT of two pseudos.
589 This allows noncontiguous allocation of the real and imaginary parts,
590 which makes much better code. Besides, allocating DCmode
591 pseudos overstrains reload on some machines like the 386. */
592 rtx realpart, imagpart;
593 int size = GET_MODE_UNIT_SIZE (mode);
594 enum machine_mode partmode
595 = mode_for_size (size * BITS_PER_UNIT,
596 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
597 ? MODE_FLOAT : MODE_INT),
600 realpart = gen_reg_rtx (partmode);
601 imagpart = gen_reg_rtx (partmode);
602 return gen_rtx_CONCAT (mode, realpart, imagpart);
605 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
606 to have an element for this pseudo reg number. */
608 if (reg_rtx_no == f->emit->regno_pointer_align_length)
610 int old_size = f->emit->regno_pointer_align_length;
613 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
614 memset (new + old_size, 0, old_size);
615 f->emit->regno_pointer_align = (unsigned char *) new;
617 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
618 old_size * 2 * sizeof (rtx));
619 memset (new1 + old_size, 0, old_size * sizeof (rtx));
620 regno_reg_rtx = new1;
622 f->emit->regno_pointer_align_length = old_size * 2;
625 val = gen_raw_REG (mode, reg_rtx_no);
626 regno_reg_rtx[reg_rtx_no++] = val;
630 /* Identify REG (which may be a CONCAT) as a user register. */
636 if (GET_CODE (reg) == CONCAT)
638 REG_USERVAR_P (XEXP (reg, 0)) = 1;
639 REG_USERVAR_P (XEXP (reg, 1)) = 1;
641 else if (GET_CODE (reg) == REG)
642 REG_USERVAR_P (reg) = 1;
647 /* Identify REG as a probable pointer register and show its alignment
648 as ALIGN, if nonzero. */
651 mark_reg_pointer (reg, align)
655 if (! REG_POINTER (reg))
657 REG_POINTER (reg) = 1;
660 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
662 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
663 /* We can no-longer be sure just how aligned this pointer is */
664 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
667 /* Return 1 plus largest pseudo reg number used in the current function. */
675 /* Return 1 + the largest label number used so far in the current function. */
680 if (last_label_num && label_num == base_label_num)
681 return last_label_num;
685 /* Return first label number used in this function (if any were used). */
688 get_first_label_num ()
690 return first_label_num;
693 /* Return the final regno of X, which is a SUBREG of a hard
696 subreg_hard_regno (x, check_mode)
700 enum machine_mode mode = GET_MODE (x);
701 unsigned int byte_offset, base_regno, final_regno;
702 rtx reg = SUBREG_REG (x);
704 /* This is where we attempt to catch illegal subregs
705 created by the compiler. */
706 if (GET_CODE (x) != SUBREG
707 || GET_CODE (reg) != REG)
709 base_regno = REGNO (reg);
710 if (base_regno >= FIRST_PSEUDO_REGISTER)
712 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
715 /* Catch non-congruent offsets too. */
716 byte_offset = SUBREG_BYTE (x);
717 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
720 final_regno = subreg_regno (x);
725 /* Return a value representing some low-order bits of X, where the number
726 of low-order bits is given by MODE. Note that no conversion is done
727 between floating-point and fixed-point values, rather, the bit
728 representation is returned.
730 This function handles the cases in common between gen_lowpart, below,
731 and two variants in cse.c and combine.c. These are the cases that can
732 be safely handled at all points in the compilation.
734 If this is not a case we can handle, return 0. */
737 gen_lowpart_common (mode, x)
738 enum machine_mode mode;
741 int msize = GET_MODE_SIZE (mode);
742 int xsize = GET_MODE_SIZE (GET_MODE (x));
745 if (GET_MODE (x) == mode)
748 /* MODE must occupy no more words than the mode of X. */
749 if (GET_MODE (x) != VOIDmode
750 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
751 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
754 offset = subreg_lowpart_offset (mode, GET_MODE (x));
756 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
757 && (GET_MODE_CLASS (mode) == MODE_INT
758 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
760 /* If we are getting the low-order part of something that has been
761 sign- or zero-extended, we can either just use the object being
762 extended or make a narrower extension. If we want an even smaller
763 piece than the size of the object being extended, call ourselves
766 This case is used mostly by combine and cse. */
768 if (GET_MODE (XEXP (x, 0)) == mode)
770 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
771 return gen_lowpart_common (mode, XEXP (x, 0));
772 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
773 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
775 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
776 || GET_CODE (x) == CONCAT)
777 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
778 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
779 from the low-order part of the constant. */
780 else if ((GET_MODE_CLASS (mode) == MODE_INT
781 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
782 && GET_MODE (x) == VOIDmode
783 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
785 /* If MODE is twice the host word size, X is already the desired
786 representation. Otherwise, if MODE is wider than a word, we can't
787 do this. If MODE is exactly a word, return just one CONST_INT. */
789 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
791 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
793 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
794 return (GET_CODE (x) == CONST_INT ? x
795 : GEN_INT (CONST_DOUBLE_LOW (x)));
798 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
799 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
800 : CONST_DOUBLE_LOW (x));
802 /* Sign extend to HOST_WIDE_INT. */
803 val = trunc_int_for_mode (val, mode);
805 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
810 #ifndef REAL_ARITHMETIC
811 /* If X is an integral constant but we want it in floating-point, it
812 must be the case that we have a union of an integer and a floating-point
813 value. If the machine-parameters allow it, simulate that union here
814 and return the result. The two-word and single-word cases are
817 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
818 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
819 || flag_pretend_float)
820 && GET_MODE_CLASS (mode) == MODE_FLOAT
821 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
822 && GET_CODE (x) == CONST_INT
823 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
825 union {HOST_WIDE_INT i; float d; } u;
828 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
830 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
831 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
832 || flag_pretend_float)
833 && GET_MODE_CLASS (mode) == MODE_FLOAT
834 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
835 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
836 && GET_MODE (x) == VOIDmode
837 && (sizeof (double) * HOST_BITS_PER_CHAR
838 == 2 * HOST_BITS_PER_WIDE_INT))
840 union {HOST_WIDE_INT i[2]; double d; } u;
841 HOST_WIDE_INT low, high;
843 if (GET_CODE (x) == CONST_INT)
844 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
846 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
848 #ifdef HOST_WORDS_BIG_ENDIAN
849 u.i[0] = high, u.i[1] = low;
851 u.i[0] = low, u.i[1] = high;
854 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
857 /* Similarly, if this is converting a floating-point value into a
858 single-word integer. Only do this is the host and target parameters are
861 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
862 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
863 || flag_pretend_float)
864 && (GET_MODE_CLASS (mode) == MODE_INT
865 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
866 && GET_CODE (x) == CONST_DOUBLE
867 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
868 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
869 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
871 /* Similarly, if this is converting a floating-point value into a
872 two-word integer, we can do this one word at a time and make an
873 integer. Only do this is the host and target parameters are
876 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
877 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
878 || flag_pretend_float)
879 && (GET_MODE_CLASS (mode) == MODE_INT
880 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
881 && GET_CODE (x) == CONST_DOUBLE
882 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
883 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
885 rtx lowpart, highpart;
887 lowpart = constant_subword (x,
888 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
890 highpart = constant_subword (x,
891 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
893 if (lowpart && GET_CODE (lowpart) == CONST_INT
894 && highpart && GET_CODE (highpart) == CONST_INT)
895 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
897 #else /* ifndef REAL_ARITHMETIC */
899 /* When we have a FP emulator, we can handle all conversions between
900 FP and integer operands. This simplifies reload because it
901 doesn't have to deal with constructs like (subreg:DI
902 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
903 /* Single-precision floats are always 32-bits and double-precision
904 floats are always 64-bits. */
906 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
907 && GET_MODE_BITSIZE (mode) == 32
908 && GET_CODE (x) == CONST_INT)
914 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
915 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
917 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
918 && GET_MODE_BITSIZE (mode) == 64
919 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
920 && GET_MODE (x) == VOIDmode)
924 HOST_WIDE_INT low, high;
926 if (GET_CODE (x) == CONST_INT)
929 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
933 low = CONST_DOUBLE_LOW (x);
934 high = CONST_DOUBLE_HIGH (x);
937 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
939 if (WORDS_BIG_ENDIAN)
940 i[0] = high, i[1] = low;
942 i[0] = low, i[1] = high;
944 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
945 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
947 else if ((GET_MODE_CLASS (mode) == MODE_INT
948 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
949 && GET_CODE (x) == CONST_DOUBLE
950 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
953 long i[4]; /* Only the low 32 bits of each 'long' are used. */
954 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
956 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
957 switch (GET_MODE_BITSIZE (GET_MODE (x)))
960 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
964 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
967 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
971 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
977 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
979 #if HOST_BITS_PER_WIDE_INT == 32
980 return immed_double_const (i[endian], i[1 - endian], mode);
985 if (HOST_BITS_PER_WIDE_INT != 64)
988 for (c = 0; c < 4; c++)
991 switch (GET_MODE_BITSIZE (GET_MODE (x)))
995 return immed_double_const (((unsigned long) i[endian]) |
996 (((HOST_WIDE_INT) i[1-endian]) << 32),
1000 return immed_double_const (((unsigned long) i[endian*3]) |
1001 (((HOST_WIDE_INT) i[1+endian]) << 32),
1002 ((unsigned long) i[2-endian]) |
1003 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1011 #endif /* ifndef REAL_ARITHMETIC */
1013 /* Otherwise, we can't do this. */
1017 /* Return the real part (which has mode MODE) of a complex value X.
1018 This always comes at the low address in memory. */
1021 gen_realpart (mode, x)
1022 enum machine_mode mode;
1025 if (WORDS_BIG_ENDIAN
1026 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1028 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1030 ("Can't access real part of complex value in hard register");
1031 else if (WORDS_BIG_ENDIAN)
1032 return gen_highpart (mode, x);
1034 return gen_lowpart (mode, x);
1037 /* Return the imaginary part (which has mode MODE) of a complex value X.
1038 This always comes at the high address in memory. */
1041 gen_imagpart (mode, x)
1042 enum machine_mode mode;
1045 if (WORDS_BIG_ENDIAN)
1046 return gen_lowpart (mode, x);
1047 else if (! WORDS_BIG_ENDIAN
1048 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1050 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1052 ("can't access imaginary part of complex value in hard register");
1054 return gen_highpart (mode, x);
1057 /* Return 1 iff X, assumed to be a SUBREG,
1058 refers to the real part of the complex value in its containing reg.
1059 Complex values are always stored with the real part in the first word,
1060 regardless of WORDS_BIG_ENDIAN. */
1063 subreg_realpart_p (x)
1066 if (GET_CODE (x) != SUBREG)
1069 return ((unsigned int) SUBREG_BYTE (x)
1070 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1073 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1074 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1075 least-significant part of X.
1076 MODE specifies how big a part of X to return;
1077 it usually should not be larger than a word.
1078 If X is a MEM whose address is a QUEUED, the value may be so also. */
1081 gen_lowpart (mode, x)
1082 enum machine_mode mode;
1085 rtx result = gen_lowpart_common (mode, x);
1089 else if (GET_CODE (x) == REG)
1091 /* Must be a hard reg that's not valid in MODE. */
1092 result = gen_lowpart_common (mode, copy_to_reg (x));
1097 else if (GET_CODE (x) == MEM)
1099 /* The only additional case we can do is MEM. */
1100 register int offset = 0;
1101 if (WORDS_BIG_ENDIAN)
1102 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1103 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1105 if (BYTES_BIG_ENDIAN)
1106 /* Adjust the address so that the address-after-the-data
1108 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1109 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1111 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1113 else if (GET_CODE (x) == ADDRESSOF)
1114 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1119 /* Like `gen_lowpart', but refer to the most significant part.
1120 This is used to access the imaginary part of a complex number. */
1123 gen_highpart (mode, x)
1124 enum machine_mode mode;
1127 unsigned int msize = GET_MODE_SIZE (mode);
1130 /* This case loses if X is a subreg. To catch bugs early,
1131 complain if an invalid MODE is used even in other cases. */
1132 if (msize > UNITS_PER_WORD
1133 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1136 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1137 subreg_highpart_offset (mode, GET_MODE (x)));
1139 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1140 the target if we have a MEM. gen_highpart must return a valid operand,
1141 emitting code if necessary to do so. */
1142 if (GET_CODE (result) == MEM)
1143 result = validize_mem (result);
1149 /* Return offset in bytes to get OUTERMODE low part
1150 of the value in mode INNERMODE stored in memory in target format. */
1153 subreg_lowpart_offset (outermode, innermode)
1154 enum machine_mode outermode, innermode;
1156 unsigned int offset = 0;
1157 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1161 if (WORDS_BIG_ENDIAN)
1162 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1163 if (BYTES_BIG_ENDIAN)
1164 offset += difference % UNITS_PER_WORD;
1170 /* Return offset in bytes to get OUTERMODE high part
1171 of the value in mode INNERMODE stored in memory in target format. */
1173 subreg_highpart_offset (outermode, innermode)
1174 enum machine_mode outermode, innermode;
1176 unsigned int offset = 0;
1177 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1179 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1184 if (! WORDS_BIG_ENDIAN)
1185 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1186 if (! BYTES_BIG_ENDIAN)
1187 offset += difference % UNITS_PER_WORD;
1193 /* Return 1 iff X, assumed to be a SUBREG,
1194 refers to the least significant part of its containing reg.
1195 If X is not a SUBREG, always return 1 (it is its own low part!). */
1198 subreg_lowpart_p (x)
1201 if (GET_CODE (x) != SUBREG)
1203 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1206 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1207 == SUBREG_BYTE (x));
1211 /* Helper routine for all the constant cases of operand_subword.
1212 Some places invoke this directly. */
1215 constant_subword (op, offset, mode)
1218 enum machine_mode mode;
1220 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1223 /* If OP is already an integer word, return it. */
1224 if (GET_MODE_CLASS (mode) == MODE_INT
1225 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1228 #ifdef REAL_ARITHMETIC
1229 /* The output is some bits, the width of the target machine's word.
1230 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1232 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1233 && GET_MODE_CLASS (mode) == MODE_FLOAT
1234 && GET_MODE_BITSIZE (mode) == 64
1235 && GET_CODE (op) == CONST_DOUBLE)
1240 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1241 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1243 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1244 which the words are written depends on the word endianness.
1245 ??? This is a potential portability problem and should
1246 be fixed at some point.
1248 We must excercise caution with the sign bit. By definition there
1249 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1250 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1251 So we explicitly mask and sign-extend as necessary. */
1252 if (BITS_PER_WORD == 32)
1255 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1256 return GEN_INT (val);
1258 #if HOST_BITS_PER_WIDE_INT >= 64
1259 else if (BITS_PER_WORD >= 64 && offset == 0)
1261 val = k[! WORDS_BIG_ENDIAN];
1262 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1263 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1264 return GEN_INT (val);
1267 else if (BITS_PER_WORD == 16)
1269 val = k[offset >> 1];
1270 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1272 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1273 return GEN_INT (val);
1278 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1279 && GET_MODE_CLASS (mode) == MODE_FLOAT
1280 && GET_MODE_BITSIZE (mode) > 64
1281 && GET_CODE (op) == CONST_DOUBLE)
1286 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1287 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1289 if (BITS_PER_WORD == 32)
1292 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1293 return GEN_INT (val);
1295 #if HOST_BITS_PER_WIDE_INT >= 64
1296 else if (BITS_PER_WORD >= 64 && offset <= 1)
1298 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1299 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1300 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1301 return GEN_INT (val);
1307 #else /* no REAL_ARITHMETIC */
1308 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1309 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1310 || flag_pretend_float)
1311 && GET_MODE_CLASS (mode) == MODE_FLOAT
1312 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1313 && GET_CODE (op) == CONST_DOUBLE)
1315 /* The constant is stored in the host's word-ordering,
1316 but we want to access it in the target's word-ordering. Some
1317 compilers don't like a conditional inside macro args, so we have two
1318 copies of the return. */
1319 #ifdef HOST_WORDS_BIG_ENDIAN
1320 return GEN_INT (offset == WORDS_BIG_ENDIAN
1321 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1323 return GEN_INT (offset != WORDS_BIG_ENDIAN
1324 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1327 #endif /* no REAL_ARITHMETIC */
1329 /* Single word float is a little harder, since single- and double-word
1330 values often do not have the same high-order bits. We have already
1331 verified that we want the only defined word of the single-word value. */
1332 #ifdef REAL_ARITHMETIC
1333 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1334 && GET_MODE_BITSIZE (mode) == 32
1335 && GET_CODE (op) == CONST_DOUBLE)
1340 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1341 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1343 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1345 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1347 if (BITS_PER_WORD == 16)
1349 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1351 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1354 return GEN_INT (val);
1357 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1358 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1359 || flag_pretend_float)
1360 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1361 && GET_MODE_CLASS (mode) == MODE_FLOAT
1362 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1363 && GET_CODE (op) == CONST_DOUBLE)
1366 union {float f; HOST_WIDE_INT i; } u;
1368 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1371 return GEN_INT (u.i);
1373 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1374 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1375 || flag_pretend_float)
1376 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1377 && GET_MODE_CLASS (mode) == MODE_FLOAT
1378 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1379 && GET_CODE (op) == CONST_DOUBLE)
1382 union {double d; HOST_WIDE_INT i; } u;
1384 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1387 return GEN_INT (u.i);
1389 #endif /* no REAL_ARITHMETIC */
1391 /* The only remaining cases that we can handle are integers.
1392 Convert to proper endianness now since these cases need it.
1393 At this point, offset == 0 means the low-order word.
1395 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1396 in general. However, if OP is (const_int 0), we can just return
1399 if (op == const0_rtx)
1402 if (GET_MODE_CLASS (mode) != MODE_INT
1403 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1404 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1407 if (WORDS_BIG_ENDIAN)
1408 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1410 /* Find out which word on the host machine this value is in and get
1411 it from the constant. */
1412 val = (offset / size_ratio == 0
1413 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1414 : (GET_CODE (op) == CONST_INT
1415 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1417 /* Get the value we want into the low bits of val. */
1418 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1419 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1421 val = trunc_int_for_mode (val, word_mode);
1423 return GEN_INT (val);
1426 /* Return subword OFFSET of operand OP.
1427 The word number, OFFSET, is interpreted as the word number starting
1428 at the low-order address. OFFSET 0 is the low-order word if not
1429 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1431 If we cannot extract the required word, we return zero. Otherwise,
1432 an rtx corresponding to the requested word will be returned.
1434 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1435 reload has completed, a valid address will always be returned. After
1436 reload, if a valid address cannot be returned, we return zero.
1438 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1439 it is the responsibility of the caller.
1441 MODE is the mode of OP in case it is a CONST_INT.
1443 ??? This is still rather broken for some cases. The problem for the
1444 moment is that all callers of this thing provide no 'goal mode' to
1445 tell us to work with. This exists because all callers were written
1446 in a word based SUBREG world.
1447 Now use of this function can be deprecated by simplify_subreg in most
1452 operand_subword (op, offset, validate_address, mode)
1454 unsigned int offset;
1455 int validate_address;
1456 enum machine_mode mode;
1458 if (mode == VOIDmode)
1459 mode = GET_MODE (op);
1461 if (mode == VOIDmode)
1464 /* If OP is narrower than a word, fail. */
1466 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1469 /* If we want a word outside OP, return zero. */
1471 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1474 /* Form a new MEM at the requested address. */
1475 if (GET_CODE (op) == MEM)
1477 rtx addr = plus_constant (XEXP (op, 0), (offset * UNITS_PER_WORD));
1480 if (validate_address)
1482 if (reload_completed)
1484 if (! strict_memory_address_p (word_mode, addr))
1488 addr = memory_address (word_mode, addr);
1491 new = gen_rtx_MEM (word_mode, addr);
1492 MEM_COPY_ATTRIBUTES (new, op);
1496 /* Rest can be handled by simplify_subreg. */
1497 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1500 /* Similar to `operand_subword', but never return 0. If we can't extract
1501 the required subword, put OP into a register and try again. If that fails,
1502 abort. We always validate the address in this case.
1504 MODE is the mode of OP, in case it is CONST_INT. */
1507 operand_subword_force (op, offset, mode)
1509 unsigned int offset;
1510 enum machine_mode mode;
1512 rtx result = operand_subword (op, offset, 1, mode);
1517 if (mode != BLKmode && mode != VOIDmode)
1519 /* If this is a register which can not be accessed by words, copy it
1520 to a pseudo register. */
1521 if (GET_CODE (op) == REG)
1522 op = copy_to_reg (op);
1524 op = force_reg (mode, op);
1527 result = operand_subword (op, offset, 1, mode);
1534 /* Given a compare instruction, swap the operands.
1535 A test instruction is changed into a compare of 0 against the operand. */
1538 reverse_comparison (insn)
1541 rtx body = PATTERN (insn);
1544 if (GET_CODE (body) == SET)
1545 comp = SET_SRC (body);
1547 comp = SET_SRC (XVECEXP (body, 0, 0));
1549 if (GET_CODE (comp) == COMPARE)
1551 rtx op0 = XEXP (comp, 0);
1552 rtx op1 = XEXP (comp, 1);
1553 XEXP (comp, 0) = op1;
1554 XEXP (comp, 1) = op0;
1558 rtx new = gen_rtx_COMPARE (VOIDmode,
1559 CONST0_RTX (GET_MODE (comp)), comp);
1560 if (GET_CODE (body) == SET)
1561 SET_SRC (body) = new;
1563 SET_SRC (XVECEXP (body, 0, 0)) = new;
1567 /* Return a memory reference like MEMREF, but with its mode changed
1568 to MODE and its address changed to ADDR.
1569 (VOIDmode means don't change the mode.
1570 NULL for ADDR means don't change the address.) */
1573 change_address (memref, mode, addr)
1575 enum machine_mode mode;
1580 if (GET_CODE (memref) != MEM)
1582 if (mode == VOIDmode)
1583 mode = GET_MODE (memref);
1585 addr = XEXP (memref, 0);
1587 /* If reload is in progress or has completed, ADDR must be valid.
1588 Otherwise, we can call memory_address to make it valid. */
1589 if (reload_completed || reload_in_progress)
1591 if (! memory_address_p (mode, addr))
1595 addr = memory_address (mode, addr);
1597 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1600 new = gen_rtx_MEM (mode, addr);
1601 MEM_COPY_ATTRIBUTES (new, memref);
1605 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1612 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1613 NULL_RTX, label_num++, NULL, NULL);
1615 LABEL_NUSES (label) = 0;
1616 LABEL_ALTERNATE_NAME (label) = NULL;
1620 /* For procedure integration. */
1622 /* Install new pointers to the first and last insns in the chain.
1623 Also, set cur_insn_uid to one higher than the last in use.
1624 Used for an inline-procedure after copying the insn chain. */
1627 set_new_first_and_last_insn (first, last)
1636 for (insn = first; insn; insn = NEXT_INSN (insn))
1637 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1642 /* Set the range of label numbers found in the current function.
1643 This is used when belatedly compiling an inline function. */
1646 set_new_first_and_last_label_num (first, last)
1649 base_label_num = label_num;
1650 first_label_num = first;
1651 last_label_num = last;
1654 /* Set the last label number found in the current function.
1655 This is used when belatedly compiling an inline function. */
1658 set_new_last_label_num (last)
1661 base_label_num = label_num;
1662 last_label_num = last;
1665 /* Restore all variables describing the current status from the structure *P.
1666 This is used after a nested function. */
1669 restore_emit_status (p)
1670 struct function *p ATTRIBUTE_UNUSED;
1673 clear_emit_caches ();
1676 /* Clear out all parts of the state in F that can safely be discarded
1677 after the function has been compiled, to let garbage collection
1678 reclaim the memory. */
1681 free_emit_status (f)
1684 free (f->emit->x_regno_reg_rtx);
1685 free (f->emit->regno_pointer_align);
1690 /* Go through all the RTL insn bodies and copy any invalid shared
1691 structure. This routine should only be called once. */
1694 unshare_all_rtl (fndecl, insn)
1700 /* Make sure that virtual parameters are not shared. */
1701 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1702 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
1704 /* Make sure that virtual stack slots are not shared. */
1705 unshare_all_decls (DECL_INITIAL (fndecl));
1707 /* Unshare just about everything else. */
1708 unshare_all_rtl_1 (insn);
1710 /* Make sure the addresses of stack slots found outside the insn chain
1711 (such as, in DECL_RTL of a variable) are not shared
1712 with the insn chain.
1714 This special care is necessary when the stack slot MEM does not
1715 actually appear in the insn chain. If it does appear, its address
1716 is unshared from all else at that point. */
1717 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1720 /* Go through all the RTL insn bodies and copy any invalid shared
1721 structure, again. This is a fairly expensive thing to do so it
1722 should be done sparingly. */
1725 unshare_all_rtl_again (insn)
1731 for (p = insn; p; p = NEXT_INSN (p))
1734 reset_used_flags (PATTERN (p));
1735 reset_used_flags (REG_NOTES (p));
1736 reset_used_flags (LOG_LINKS (p));
1739 /* Make sure that virtual stack slots are not shared. */
1740 reset_used_decls (DECL_INITIAL (cfun->decl));
1742 /* Make sure that virtual parameters are not shared. */
1743 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1744 reset_used_flags (DECL_RTL (decl));
1746 reset_used_flags (stack_slot_list);
1748 unshare_all_rtl (cfun->decl, insn);
1751 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1752 Assumes the mark bits are cleared at entry. */
1755 unshare_all_rtl_1 (insn)
1758 for (; insn; insn = NEXT_INSN (insn))
1761 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1762 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1763 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1767 /* Go through all virtual stack slots of a function and copy any
1768 shared structure. */
1770 unshare_all_decls (blk)
1775 /* Copy shared decls. */
1776 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1777 if (DECL_RTL_SET_P (t))
1778 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
1780 /* Now process sub-blocks. */
1781 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1782 unshare_all_decls (t);
1785 /* Go through all virtual stack slots of a function and mark them as
1788 reset_used_decls (blk)
1794 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1795 if (DECL_RTL_SET_P (t))
1796 reset_used_flags (DECL_RTL (t));
1798 /* Now process sub-blocks. */
1799 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1800 reset_used_decls (t);
1803 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1804 Recursively does the same for subexpressions. */
1807 copy_rtx_if_shared (orig)
1810 register rtx x = orig;
1812 register enum rtx_code code;
1813 register const char *format_ptr;
1819 code = GET_CODE (x);
1821 /* These types may be freely shared. */
1834 /* SCRATCH must be shared because they represent distinct values. */
1838 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1839 a LABEL_REF, it isn't sharable. */
1840 if (GET_CODE (XEXP (x, 0)) == PLUS
1841 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1842 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1851 /* The chain of insns is not being copied. */
1855 /* A MEM is allowed to be shared if its address is constant.
1857 We used to allow sharing of MEMs which referenced
1858 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1859 that can lose. instantiate_virtual_regs will not unshare
1860 the MEMs, and combine may change the structure of the address
1861 because it looks safe and profitable in one context, but
1862 in some other context it creates unrecognizable RTL. */
1863 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1872 /* This rtx may not be shared. If it has already been seen,
1873 replace it with a copy of itself. */
1879 copy = rtx_alloc (code);
1881 (sizeof (*copy) - sizeof (copy->fld)
1882 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1888 /* Now scan the subexpressions recursively.
1889 We can store any replaced subexpressions directly into X
1890 since we know X is not shared! Any vectors in X
1891 must be copied if X was copied. */
1893 format_ptr = GET_RTX_FORMAT (code);
1895 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1897 switch (*format_ptr++)
1900 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1904 if (XVEC (x, i) != NULL)
1907 int len = XVECLEN (x, i);
1909 if (copied && len > 0)
1910 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1911 for (j = 0; j < len; j++)
1912 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1920 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1921 to look for shared sub-parts. */
1924 reset_used_flags (x)
1928 register enum rtx_code code;
1929 register const char *format_ptr;
1934 code = GET_CODE (x);
1936 /* These types may be freely shared so we needn't do any resetting
1957 /* The chain of insns is not being copied. */
1966 format_ptr = GET_RTX_FORMAT (code);
1967 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1969 switch (*format_ptr++)
1972 reset_used_flags (XEXP (x, i));
1976 for (j = 0; j < XVECLEN (x, i); j++)
1977 reset_used_flags (XVECEXP (x, i, j));
1983 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1984 Return X or the rtx for the pseudo reg the value of X was copied into.
1985 OTHER must be valid as a SET_DEST. */
1988 make_safe_from (x, other)
1992 switch (GET_CODE (other))
1995 other = SUBREG_REG (other);
1997 case STRICT_LOW_PART:
2000 other = XEXP (other, 0);
2006 if ((GET_CODE (other) == MEM
2008 && GET_CODE (x) != REG
2009 && GET_CODE (x) != SUBREG)
2010 || (GET_CODE (other) == REG
2011 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2012 || reg_mentioned_p (other, x))))
2014 rtx temp = gen_reg_rtx (GET_MODE (x));
2015 emit_move_insn (temp, x);
2021 /* Emission of insns (adding them to the doubly-linked list). */
2023 /* Return the first insn of the current sequence or current function. */
2031 /* Return the last insn emitted in current sequence or current function. */
2039 /* Specify a new insn as the last in the chain. */
2042 set_last_insn (insn)
2045 if (NEXT_INSN (insn) != 0)
2050 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2053 get_last_insn_anywhere ()
2055 struct sequence_stack *stack;
2058 for (stack = seq_stack; stack; stack = stack->next)
2059 if (stack->last != 0)
2064 /* Return a number larger than any instruction's uid in this function. */
2069 return cur_insn_uid;
2072 /* Renumber instructions so that no instruction UIDs are wasted. */
2075 renumber_insns (stream)
2080 /* If we're not supposed to renumber instructions, don't. */
2081 if (!flag_renumber_insns)
2084 /* If there aren't that many instructions, then it's not really
2085 worth renumbering them. */
2086 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2091 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2094 fprintf (stream, "Renumbering insn %d to %d\n",
2095 INSN_UID (insn), cur_insn_uid);
2096 INSN_UID (insn) = cur_insn_uid++;
2100 /* Return the next insn. If it is a SEQUENCE, return the first insn
2109 insn = NEXT_INSN (insn);
2110 if (insn && GET_CODE (insn) == INSN
2111 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2112 insn = XVECEXP (PATTERN (insn), 0, 0);
2118 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2122 previous_insn (insn)
2127 insn = PREV_INSN (insn);
2128 if (insn && GET_CODE (insn) == INSN
2129 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2130 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2136 /* Return the next insn after INSN that is not a NOTE. This routine does not
2137 look inside SEQUENCEs. */
2140 next_nonnote_insn (insn)
2145 insn = NEXT_INSN (insn);
2146 if (insn == 0 || GET_CODE (insn) != NOTE)
2153 /* Return the previous insn before INSN that is not a NOTE. This routine does
2154 not look inside SEQUENCEs. */
2157 prev_nonnote_insn (insn)
2162 insn = PREV_INSN (insn);
2163 if (insn == 0 || GET_CODE (insn) != NOTE)
2170 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2171 or 0, if there is none. This routine does not look inside
2175 next_real_insn (insn)
2180 insn = NEXT_INSN (insn);
2181 if (insn == 0 || GET_CODE (insn) == INSN
2182 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2189 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2190 or 0, if there is none. This routine does not look inside
2194 prev_real_insn (insn)
2199 insn = PREV_INSN (insn);
2200 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2201 || GET_CODE (insn) == JUMP_INSN)
2208 /* Find the next insn after INSN that really does something. This routine
2209 does not look inside SEQUENCEs. Until reload has completed, this is the
2210 same as next_real_insn. */
2213 active_insn_p (insn)
2216 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2217 || (GET_CODE (insn) == INSN
2218 && (! reload_completed
2219 || (GET_CODE (PATTERN (insn)) != USE
2220 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2224 next_active_insn (insn)
2229 insn = NEXT_INSN (insn);
2230 if (insn == 0 || active_insn_p (insn))
2237 /* Find the last insn before INSN that really does something. This routine
2238 does not look inside SEQUENCEs. Until reload has completed, this is the
2239 same as prev_real_insn. */
2242 prev_active_insn (insn)
2247 insn = PREV_INSN (insn);
2248 if (insn == 0 || active_insn_p (insn))
2255 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2263 insn = NEXT_INSN (insn);
2264 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2271 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2279 insn = PREV_INSN (insn);
2280 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2288 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2289 and REG_CC_USER notes so we can find it. */
2292 link_cc0_insns (insn)
2295 rtx user = next_nonnote_insn (insn);
2297 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2298 user = XVECEXP (PATTERN (user), 0, 0);
2300 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2302 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2305 /* Return the next insn that uses CC0 after INSN, which is assumed to
2306 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2307 applied to the result of this function should yield INSN).
2309 Normally, this is simply the next insn. However, if a REG_CC_USER note
2310 is present, it contains the insn that uses CC0.
2312 Return 0 if we can't find the insn. */
2315 next_cc0_user (insn)
2318 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2321 return XEXP (note, 0);
2323 insn = next_nonnote_insn (insn);
2324 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2325 insn = XVECEXP (PATTERN (insn), 0, 0);
2327 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2333 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2334 note, it is the previous insn. */
2337 prev_cc0_setter (insn)
2340 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2343 return XEXP (note, 0);
2345 insn = prev_nonnote_insn (insn);
2346 if (! sets_cc0_p (PATTERN (insn)))
2353 /* Increment the label uses for all labels present in rtx. */
2359 register enum rtx_code code;
2361 register const char *fmt;
2363 code = GET_CODE (x);
2364 if (code == LABEL_REF)
2365 LABEL_NUSES (XEXP (x, 0))++;
2367 fmt = GET_RTX_FORMAT (code);
2368 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2371 mark_label_nuses (XEXP (x, i));
2372 else if (fmt[i] == 'E')
2373 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2374 mark_label_nuses (XVECEXP (x, i, j));
2379 /* Try splitting insns that can be split for better scheduling.
2380 PAT is the pattern which might split.
2381 TRIAL is the insn providing PAT.
2382 LAST is non-zero if we should return the last insn of the sequence produced.
2384 If this routine succeeds in splitting, it returns the first or last
2385 replacement insn depending on the value of LAST. Otherwise, it
2386 returns TRIAL. If the insn to be returned can be split, it will be. */
2389 try_split (pat, trial, last)
2393 rtx before = PREV_INSN (trial);
2394 rtx after = NEXT_INSN (trial);
2395 rtx seq = split_insns (pat, trial);
2396 int has_barrier = 0;
2399 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2400 We may need to handle this specially. */
2401 if (after && GET_CODE (after) == BARRIER)
2404 after = NEXT_INSN (after);
2409 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2410 The latter case will normally arise only when being done so that
2411 it, in turn, will be split (SFmode on the 29k is an example). */
2412 if (GET_CODE (seq) == SEQUENCE)
2417 /* Avoid infinite loop if any insn of the result matches
2418 the original pattern. */
2419 for (i = 0; i < XVECLEN (seq, 0); i++)
2420 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2421 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2425 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2426 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2427 mark_jump_label (PATTERN (XVECEXP (seq, 0, i)),
2428 XVECEXP (seq, 0, i), 0, 0);
2430 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2431 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2432 if (GET_CODE (trial) == CALL_INSN)
2433 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2434 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2435 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2436 = CALL_INSN_FUNCTION_USAGE (trial);
2438 /* Copy EH notes. */
2439 if ((eh_note = find_reg_note (trial, REG_EH_REGION, NULL_RTX)))
2440 for (i = 0; i < XVECLEN (seq, 0); i++)
2442 rtx insn = XVECEXP (seq, 0, i);
2443 if (GET_CODE (insn) == CALL_INSN
2444 || (flag_non_call_exceptions
2445 && may_trap_p (PATTERN (insn))))
2447 = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (eh_note, 0),
2451 /* If there are LABELS inside the split insns increment the
2452 usage count so we don't delete the label. */
2453 if (GET_CODE (trial) == INSN)
2454 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2455 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2456 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2458 tem = emit_insn_after (seq, before);
2460 delete_insn (trial);
2462 emit_barrier_after (tem);
2464 /* Recursively call try_split for each new insn created; by the
2465 time control returns here that insn will be fully split, so
2466 set LAST and continue from the insn after the one returned.
2467 We can't use next_active_insn here since AFTER may be a note.
2468 Ignore deleted insns, which can be occur if not optimizing. */
2469 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2470 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2471 tem = try_split (PATTERN (tem), tem, 1);
2473 /* Avoid infinite loop if the result matches the original pattern. */
2474 else if (rtx_equal_p (seq, pat))
2478 PATTERN (trial) = seq;
2479 INSN_CODE (trial) = -1;
2480 try_split (seq, trial, last);
2483 /* Return either the first or the last insn, depending on which was
2486 ? (after ? prev_active_insn (after) : last_insn)
2487 : next_active_insn (before);
2493 /* Make and return an INSN rtx, initializing all its slots.
2494 Store PATTERN in the pattern slots. */
2497 make_insn_raw (pattern)
2502 insn = rtx_alloc (INSN);
2504 INSN_UID (insn) = cur_insn_uid++;
2505 PATTERN (insn) = pattern;
2506 INSN_CODE (insn) = -1;
2507 LOG_LINKS (insn) = NULL;
2508 REG_NOTES (insn) = NULL;
2510 #ifdef ENABLE_RTL_CHECKING
2513 && (returnjump_p (insn)
2514 || (GET_CODE (insn) == SET
2515 && SET_DEST (insn) == pc_rtx)))
2517 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2525 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2528 make_jump_insn_raw (pattern)
2533 insn = rtx_alloc (JUMP_INSN);
2534 INSN_UID (insn) = cur_insn_uid++;
2536 PATTERN (insn) = pattern;
2537 INSN_CODE (insn) = -1;
2538 LOG_LINKS (insn) = NULL;
2539 REG_NOTES (insn) = NULL;
2540 JUMP_LABEL (insn) = NULL;
2545 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2548 make_call_insn_raw (pattern)
2553 insn = rtx_alloc (CALL_INSN);
2554 INSN_UID (insn) = cur_insn_uid++;
2556 PATTERN (insn) = pattern;
2557 INSN_CODE (insn) = -1;
2558 LOG_LINKS (insn) = NULL;
2559 REG_NOTES (insn) = NULL;
2560 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2565 /* Add INSN to the end of the doubly-linked list.
2566 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2572 PREV_INSN (insn) = last_insn;
2573 NEXT_INSN (insn) = 0;
2575 if (NULL != last_insn)
2576 NEXT_INSN (last_insn) = insn;
2578 if (NULL == first_insn)
2584 /* Add INSN into the doubly-linked list after insn AFTER. This and
2585 the next should be the only functions called to insert an insn once
2586 delay slots have been filled since only they know how to update a
2590 add_insn_after (insn, after)
2593 rtx next = NEXT_INSN (after);
2595 if (optimize && INSN_DELETED_P (after))
2598 NEXT_INSN (insn) = next;
2599 PREV_INSN (insn) = after;
2603 PREV_INSN (next) = insn;
2604 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2605 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2607 else if (last_insn == after)
2611 struct sequence_stack *stack = seq_stack;
2612 /* Scan all pending sequences too. */
2613 for (; stack; stack = stack->next)
2614 if (after == stack->last)
2624 NEXT_INSN (after) = insn;
2625 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2627 rtx sequence = PATTERN (after);
2628 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2632 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2633 the previous should be the only functions called to insert an insn once
2634 delay slots have been filled since only they know how to update a
2638 add_insn_before (insn, before)
2641 rtx prev = PREV_INSN (before);
2643 if (optimize && INSN_DELETED_P (before))
2646 PREV_INSN (insn) = prev;
2647 NEXT_INSN (insn) = before;
2651 NEXT_INSN (prev) = insn;
2652 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2654 rtx sequence = PATTERN (prev);
2655 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2658 else if (first_insn == before)
2662 struct sequence_stack *stack = seq_stack;
2663 /* Scan all pending sequences too. */
2664 for (; stack; stack = stack->next)
2665 if (before == stack->first)
2667 stack->first = insn;
2675 PREV_INSN (before) = insn;
2676 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2677 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2680 /* Remove an insn from its doubly-linked list. This function knows how
2681 to handle sequences. */
2686 rtx next = NEXT_INSN (insn);
2687 rtx prev = PREV_INSN (insn);
2690 NEXT_INSN (prev) = next;
2691 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2693 rtx sequence = PATTERN (prev);
2694 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2697 else if (first_insn == insn)
2701 struct sequence_stack *stack = seq_stack;
2702 /* Scan all pending sequences too. */
2703 for (; stack; stack = stack->next)
2704 if (insn == stack->first)
2706 stack->first = next;
2716 PREV_INSN (next) = prev;
2717 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2718 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2720 else if (last_insn == insn)
2724 struct sequence_stack *stack = seq_stack;
2725 /* Scan all pending sequences too. */
2726 for (; stack; stack = stack->next)
2727 if (insn == stack->last)
2738 /* Delete all insns made since FROM.
2739 FROM becomes the new last instruction. */
2742 delete_insns_since (from)
2748 NEXT_INSN (from) = 0;
2752 /* This function is deprecated, please use sequences instead.
2754 Move a consecutive bunch of insns to a different place in the chain.
2755 The insns to be moved are those between FROM and TO.
2756 They are moved to a new position after the insn AFTER.
2757 AFTER must not be FROM or TO or any insn in between.
2759 This function does not know about SEQUENCEs and hence should not be
2760 called after delay-slot filling has been done. */
2763 reorder_insns (from, to, after)
2764 rtx from, to, after;
2766 /* Splice this bunch out of where it is now. */
2767 if (PREV_INSN (from))
2768 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2770 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2771 if (last_insn == to)
2772 last_insn = PREV_INSN (from);
2773 if (first_insn == from)
2774 first_insn = NEXT_INSN (to);
2776 /* Make the new neighbors point to it and it to them. */
2777 if (NEXT_INSN (after))
2778 PREV_INSN (NEXT_INSN (after)) = to;
2780 NEXT_INSN (to) = NEXT_INSN (after);
2781 PREV_INSN (from) = after;
2782 NEXT_INSN (after) = from;
2783 if (after == last_insn)
2787 /* Return the line note insn preceding INSN. */
2790 find_line_note (insn)
2793 if (no_line_numbers)
2796 for (; insn; insn = PREV_INSN (insn))
2797 if (GET_CODE (insn) == NOTE
2798 && NOTE_LINE_NUMBER (insn) >= 0)
2804 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2805 of the moved insns when debugging. This may insert a note between AFTER
2806 and FROM, and another one after TO. */
2809 reorder_insns_with_line_notes (from, to, after)
2810 rtx from, to, after;
2812 rtx from_line = find_line_note (from);
2813 rtx after_line = find_line_note (after);
2815 reorder_insns (from, to, after);
2817 if (from_line == after_line)
2821 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2822 NOTE_LINE_NUMBER (from_line),
2825 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2826 NOTE_LINE_NUMBER (after_line),
2830 /* Remove unnecessary notes from the instruction stream. */
2833 remove_unnecessary_notes ()
2835 rtx block_stack = NULL_RTX;
2836 rtx eh_stack = NULL_RTX;
2841 /* We must not remove the first instruction in the function because
2842 the compiler depends on the first instruction being a note. */
2843 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2845 /* Remember what's next. */
2846 next = NEXT_INSN (insn);
2848 /* We're only interested in notes. */
2849 if (GET_CODE (insn) != NOTE)
2852 switch (NOTE_LINE_NUMBER (insn))
2854 case NOTE_INSN_DELETED:
2858 case NOTE_INSN_EH_REGION_BEG:
2859 eh_stack = alloc_INSN_LIST (insn, eh_stack);
2862 case NOTE_INSN_EH_REGION_END:
2863 /* Too many end notes. */
2864 if (eh_stack == NULL_RTX)
2866 /* Mismatched nesting. */
2867 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
2870 eh_stack = XEXP (eh_stack, 1);
2871 free_INSN_LIST_node (tmp);
2874 case NOTE_INSN_BLOCK_BEG:
2875 /* By now, all notes indicating lexical blocks should have
2876 NOTE_BLOCK filled in. */
2877 if (NOTE_BLOCK (insn) == NULL_TREE)
2879 block_stack = alloc_INSN_LIST (insn, block_stack);
2882 case NOTE_INSN_BLOCK_END:
2883 /* Too many end notes. */
2884 if (block_stack == NULL_RTX)
2886 /* Mismatched nesting. */
2887 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
2890 block_stack = XEXP (block_stack, 1);
2891 free_INSN_LIST_node (tmp);
2893 /* Scan back to see if there are any non-note instructions
2894 between INSN and the beginning of this block. If not,
2895 then there is no PC range in the generated code that will
2896 actually be in this block, so there's no point in
2897 remembering the existence of the block. */
2898 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
2900 /* This block contains a real instruction. Note that we
2901 don't include labels; if the only thing in the block
2902 is a label, then there are still no PC values that
2903 lie within the block. */
2907 /* We're only interested in NOTEs. */
2908 if (GET_CODE (tmp) != NOTE)
2911 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
2913 /* We just verified that this BLOCK matches us
2914 with the block_stack check above. */
2915 if (debug_ignore_block (NOTE_BLOCK (insn)))
2922 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
2923 /* There's a nested block. We need to leave the
2924 current block in place since otherwise the debugger
2925 wouldn't be able to show symbols from our block in
2926 the nested block. */
2932 /* Too many begin notes. */
2933 if (block_stack || eh_stack)
2938 /* Emit an insn of given code and pattern
2939 at a specified place within the doubly-linked list. */
2941 /* Make an instruction with body PATTERN
2942 and output it before the instruction BEFORE. */
2945 emit_insn_before (pattern, before)
2946 register rtx pattern, before;
2948 register rtx insn = before;
2950 if (GET_CODE (pattern) == SEQUENCE)
2954 for (i = 0; i < XVECLEN (pattern, 0); i++)
2956 insn = XVECEXP (pattern, 0, i);
2957 add_insn_before (insn, before);
2962 insn = make_insn_raw (pattern);
2963 add_insn_before (insn, before);
2969 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2972 emit_block_insn_before (pattern, before, block)
2973 rtx pattern, before;
2976 rtx prev = PREV_INSN (before);
2977 rtx r = emit_insn_before (pattern, before);
2978 if (block && block->head == before)
2979 block->head = NEXT_INSN (prev);
2983 /* Make an instruction with body PATTERN and code JUMP_INSN
2984 and output it before the instruction BEFORE. */
2987 emit_jump_insn_before (pattern, before)
2988 register rtx pattern, before;
2992 if (GET_CODE (pattern) == SEQUENCE)
2993 insn = emit_insn_before (pattern, before);
2996 insn = make_jump_insn_raw (pattern);
2997 add_insn_before (insn, before);
3003 /* Make an instruction with body PATTERN and code CALL_INSN
3004 and output it before the instruction BEFORE. */
3007 emit_call_insn_before (pattern, before)
3008 register rtx pattern, before;
3012 if (GET_CODE (pattern) == SEQUENCE)
3013 insn = emit_insn_before (pattern, before);
3016 insn = make_call_insn_raw (pattern);
3017 add_insn_before (insn, before);
3018 PUT_CODE (insn, CALL_INSN);
3024 /* Make an insn of code BARRIER
3025 and output it before the insn BEFORE. */
3028 emit_barrier_before (before)
3029 register rtx before;
3031 register rtx insn = rtx_alloc (BARRIER);
3033 INSN_UID (insn) = cur_insn_uid++;
3035 add_insn_before (insn, before);
3039 /* Emit the label LABEL before the insn BEFORE. */
3042 emit_label_before (label, before)
3045 /* This can be called twice for the same label as a result of the
3046 confusion that follows a syntax error! So make it harmless. */
3047 if (INSN_UID (label) == 0)
3049 INSN_UID (label) = cur_insn_uid++;
3050 add_insn_before (label, before);
3056 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3059 emit_note_before (subtype, before)
3063 register rtx note = rtx_alloc (NOTE);
3064 INSN_UID (note) = cur_insn_uid++;
3065 NOTE_SOURCE_FILE (note) = 0;
3066 NOTE_LINE_NUMBER (note) = subtype;
3068 add_insn_before (note, before);
3072 /* Make an insn of code INSN with body PATTERN
3073 and output it after the insn AFTER. */
3076 emit_insn_after (pattern, after)
3077 register rtx pattern, after;
3079 register rtx insn = after;
3081 if (GET_CODE (pattern) == SEQUENCE)
3085 for (i = 0; i < XVECLEN (pattern, 0); i++)
3087 insn = XVECEXP (pattern, 0, i);
3088 add_insn_after (insn, after);
3094 insn = make_insn_raw (pattern);
3095 add_insn_after (insn, after);
3101 /* Similar to emit_insn_after, except that line notes are to be inserted so
3102 as to act as if this insn were at FROM. */
3105 emit_insn_after_with_line_notes (pattern, after, from)
3106 rtx pattern, after, from;
3108 rtx from_line = find_line_note (from);
3109 rtx after_line = find_line_note (after);
3110 rtx insn = emit_insn_after (pattern, after);
3113 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3114 NOTE_LINE_NUMBER (from_line),
3118 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3119 NOTE_LINE_NUMBER (after_line),
3123 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3126 emit_block_insn_after (pattern, after, block)
3130 rtx r = emit_insn_after (pattern, after);
3131 if (block && block->end == after)
3136 /* Make an insn of code JUMP_INSN with body PATTERN
3137 and output it after the insn AFTER. */
3140 emit_jump_insn_after (pattern, after)
3141 register rtx pattern, after;
3145 if (GET_CODE (pattern) == SEQUENCE)
3146 insn = emit_insn_after (pattern, after);
3149 insn = make_jump_insn_raw (pattern);
3150 add_insn_after (insn, after);
3156 /* Make an insn of code BARRIER
3157 and output it after the insn AFTER. */
3160 emit_barrier_after (after)
3163 register rtx insn = rtx_alloc (BARRIER);
3165 INSN_UID (insn) = cur_insn_uid++;
3167 add_insn_after (insn, after);
3171 /* Emit the label LABEL after the insn AFTER. */
3174 emit_label_after (label, after)
3177 /* This can be called twice for the same label
3178 as a result of the confusion that follows a syntax error!
3179 So make it harmless. */
3180 if (INSN_UID (label) == 0)
3182 INSN_UID (label) = cur_insn_uid++;
3183 add_insn_after (label, after);
3189 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3192 emit_note_after (subtype, after)
3196 register rtx note = rtx_alloc (NOTE);
3197 INSN_UID (note) = cur_insn_uid++;
3198 NOTE_SOURCE_FILE (note) = 0;
3199 NOTE_LINE_NUMBER (note) = subtype;
3200 add_insn_after (note, after);
3204 /* Emit a line note for FILE and LINE after the insn AFTER. */
3207 emit_line_note_after (file, line, after)
3214 if (no_line_numbers && line > 0)
3220 note = rtx_alloc (NOTE);
3221 INSN_UID (note) = cur_insn_uid++;
3222 NOTE_SOURCE_FILE (note) = file;
3223 NOTE_LINE_NUMBER (note) = line;
3224 add_insn_after (note, after);
3228 /* Make an insn of code INSN with pattern PATTERN
3229 and add it to the end of the doubly-linked list.
3230 If PATTERN is a SEQUENCE, take the elements of it
3231 and emit an insn for each element.
3233 Returns the last insn emitted. */
3239 rtx insn = last_insn;
3241 if (GET_CODE (pattern) == SEQUENCE)
3245 for (i = 0; i < XVECLEN (pattern, 0); i++)
3247 insn = XVECEXP (pattern, 0, i);
3253 insn = make_insn_raw (pattern);
3260 /* Emit the insns in a chain starting with INSN.
3261 Return the last insn emitted. */
3271 rtx next = NEXT_INSN (insn);
3280 /* Emit the insns in a chain starting with INSN and place them in front of
3281 the insn BEFORE. Return the last insn emitted. */
3284 emit_insns_before (insn, before)
3292 rtx next = NEXT_INSN (insn);
3293 add_insn_before (insn, before);
3301 /* Emit the insns in a chain starting with FIRST and place them in back of
3302 the insn AFTER. Return the last insn emitted. */
3305 emit_insns_after (first, after)
3310 register rtx after_after;
3318 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3321 after_after = NEXT_INSN (after);
3323 NEXT_INSN (after) = first;
3324 PREV_INSN (first) = after;
3325 NEXT_INSN (last) = after_after;
3327 PREV_INSN (after_after) = last;
3329 if (after == last_insn)
3334 /* Make an insn of code JUMP_INSN with pattern PATTERN
3335 and add it to the end of the doubly-linked list. */
3338 emit_jump_insn (pattern)
3341 if (GET_CODE (pattern) == SEQUENCE)
3342 return emit_insn (pattern);
3345 register rtx insn = make_jump_insn_raw (pattern);
3351 /* Make an insn of code CALL_INSN with pattern PATTERN
3352 and add it to the end of the doubly-linked list. */
3355 emit_call_insn (pattern)
3358 if (GET_CODE (pattern) == SEQUENCE)
3359 return emit_insn (pattern);
3362 register rtx insn = make_call_insn_raw (pattern);
3364 PUT_CODE (insn, CALL_INSN);
3369 /* Add the label LABEL to the end of the doubly-linked list. */
3375 /* This can be called twice for the same label
3376 as a result of the confusion that follows a syntax error!
3377 So make it harmless. */
3378 if (INSN_UID (label) == 0)
3380 INSN_UID (label) = cur_insn_uid++;
3386 /* Make an insn of code BARRIER
3387 and add it to the end of the doubly-linked list. */
3392 register rtx barrier = rtx_alloc (BARRIER);
3393 INSN_UID (barrier) = cur_insn_uid++;
3398 /* Make an insn of code NOTE
3399 with data-fields specified by FILE and LINE
3400 and add it to the end of the doubly-linked list,
3401 but only if line-numbers are desired for debugging info. */
3404 emit_line_note (file, line)
3408 set_file_and_line_for_stmt (file, line);
3411 if (no_line_numbers)
3415 return emit_note (file, line);
3418 /* Make an insn of code NOTE
3419 with data-fields specified by FILE and LINE
3420 and add it to the end of the doubly-linked list.
3421 If it is a line-number NOTE, omit it if it matches the previous one. */
3424 emit_note (file, line)
3432 if (file && last_filename && !strcmp (file, last_filename)
3433 && line == last_linenum)
3435 last_filename = file;
3436 last_linenum = line;
3439 if (no_line_numbers && line > 0)
3445 note = rtx_alloc (NOTE);
3446 INSN_UID (note) = cur_insn_uid++;
3447 NOTE_SOURCE_FILE (note) = file;
3448 NOTE_LINE_NUMBER (note) = line;
3453 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3456 emit_line_note_force (file, line)
3461 return emit_line_note (file, line);
3464 /* Cause next statement to emit a line note even if the line number
3465 has not changed. This is used at the beginning of a function. */
3468 force_next_line_note ()
3473 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3474 note of this type already exists, remove it first. */
3477 set_unique_reg_note (insn, kind, datum)
3482 rtx note = find_reg_note (insn, kind, NULL_RTX);
3484 /* First remove the note if there already is one. */
3486 remove_note (insn, note);
3488 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3491 /* Return an indication of which type of insn should have X as a body.
3492 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3498 if (GET_CODE (x) == CODE_LABEL)
3500 if (GET_CODE (x) == CALL)
3502 if (GET_CODE (x) == RETURN)
3504 if (GET_CODE (x) == SET)
3506 if (SET_DEST (x) == pc_rtx)
3508 else if (GET_CODE (SET_SRC (x)) == CALL)
3513 if (GET_CODE (x) == PARALLEL)
3516 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3517 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3519 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3520 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3522 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3523 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3529 /* Emit the rtl pattern X as an appropriate kind of insn.
3530 If X is a label, it is simply added into the insn chain. */
3536 enum rtx_code code = classify_insn (x);
3538 if (code == CODE_LABEL)
3539 return emit_label (x);
3540 else if (code == INSN)
3541 return emit_insn (x);
3542 else if (code == JUMP_INSN)
3544 register rtx insn = emit_jump_insn (x);
3545 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3546 return emit_barrier ();
3549 else if (code == CALL_INSN)
3550 return emit_call_insn (x);
3555 /* Begin emitting insns to a sequence which can be packaged in an
3556 RTL_EXPR. If this sequence will contain something that might cause
3557 the compiler to pop arguments to function calls (because those
3558 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3559 details), use do_pending_stack_adjust before calling this function.
3560 That will ensure that the deferred pops are not accidentally
3561 emitted in the middle of this sequence. */
3566 struct sequence_stack *tem;
3568 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3570 tem->next = seq_stack;
3571 tem->first = first_insn;
3572 tem->last = last_insn;
3573 tem->sequence_rtl_expr = seq_rtl_expr;
3581 /* Similarly, but indicate that this sequence will be placed in T, an
3582 RTL_EXPR. See the documentation for start_sequence for more
3583 information about how to use this function. */
3586 start_sequence_for_rtl_expr (t)
3594 /* Set up the insn chain starting with FIRST as the current sequence,
3595 saving the previously current one. See the documentation for
3596 start_sequence for more information about how to use this function. */
3599 push_to_sequence (first)
3606 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3612 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3615 push_to_full_sequence (first, last)
3621 /* We really should have the end of the insn chain here. */
3622 if (last && NEXT_INSN (last))
3626 /* Set up the outer-level insn chain
3627 as the current sequence, saving the previously current one. */
3630 push_topmost_sequence ()
3632 struct sequence_stack *stack, *top = NULL;
3636 for (stack = seq_stack; stack; stack = stack->next)
3639 first_insn = top->first;
3640 last_insn = top->last;
3641 seq_rtl_expr = top->sequence_rtl_expr;
3644 /* After emitting to the outer-level insn chain, update the outer-level
3645 insn chain, and restore the previous saved state. */
3648 pop_topmost_sequence ()
3650 struct sequence_stack *stack, *top = NULL;
3652 for (stack = seq_stack; stack; stack = stack->next)
3655 top->first = first_insn;
3656 top->last = last_insn;
3657 /* ??? Why don't we save seq_rtl_expr here? */
3662 /* After emitting to a sequence, restore previous saved state.
3664 To get the contents of the sequence just made, you must call
3665 `gen_sequence' *before* calling here.
3667 If the compiler might have deferred popping arguments while
3668 generating this sequence, and this sequence will not be immediately
3669 inserted into the instruction stream, use do_pending_stack_adjust
3670 before calling gen_sequence. That will ensure that the deferred
3671 pops are inserted into this sequence, and not into some random
3672 location in the instruction stream. See INHIBIT_DEFER_POP for more
3673 information about deferred popping of arguments. */
3678 struct sequence_stack *tem = seq_stack;
3680 first_insn = tem->first;
3681 last_insn = tem->last;
3682 seq_rtl_expr = tem->sequence_rtl_expr;
3683 seq_stack = tem->next;
3688 /* This works like end_sequence, but records the old sequence in FIRST
3692 end_full_sequence (first, last)
3695 *first = first_insn;
3700 /* Return 1 if currently emitting into a sequence. */
3705 return seq_stack != 0;
3708 /* Generate a SEQUENCE rtx containing the insns already emitted
3709 to the current sequence.
3711 This is how the gen_... function from a DEFINE_EXPAND
3712 constructs the SEQUENCE that it returns. */
3722 /* Count the insns in the chain. */
3724 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3727 /* If only one insn, return it rather than a SEQUENCE.
3728 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3729 the case of an empty list.)
3730 We only return the pattern of an insn if its code is INSN and it
3731 has no notes. This ensures that no information gets lost. */
3733 && ! RTX_FRAME_RELATED_P (first_insn)
3734 && GET_CODE (first_insn) == INSN
3735 /* Don't throw away any reg notes. */
3736 && REG_NOTES (first_insn) == 0)
3737 return PATTERN (first_insn);
3739 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3741 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3742 XVECEXP (result, 0, i) = tem;
3747 /* Put the various virtual registers into REGNO_REG_RTX. */
3750 init_virtual_regs (es)
3751 struct emit_status *es;
3753 rtx *ptr = es->x_regno_reg_rtx;
3754 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3755 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3756 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3757 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3758 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3762 clear_emit_caches ()
3766 /* Clear the start_sequence/gen_sequence cache. */
3767 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3768 sequence_result[i] = 0;
3772 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3773 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3774 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3775 static int copy_insn_n_scratches;
3777 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3778 copied an ASM_OPERANDS.
3779 In that case, it is the original input-operand vector. */
3780 static rtvec orig_asm_operands_vector;
3782 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3783 copied an ASM_OPERANDS.
3784 In that case, it is the copied input-operand vector. */
3785 static rtvec copy_asm_operands_vector;
3787 /* Likewise for the constraints vector. */
3788 static rtvec orig_asm_constraints_vector;
3789 static rtvec copy_asm_constraints_vector;
3791 /* Recursively create a new copy of an rtx for copy_insn.
3792 This function differs from copy_rtx in that it handles SCRATCHes and
3793 ASM_OPERANDs properly.
3794 Normally, this function is not used directly; use copy_insn as front end.
3795 However, you could first copy an insn pattern with copy_insn and then use
3796 this function afterwards to properly copy any REG_NOTEs containing
3805 register RTX_CODE code;
3806 register const char *format_ptr;
3808 code = GET_CODE (orig);
3824 for (i = 0; i < copy_insn_n_scratches; i++)
3825 if (copy_insn_scratch_in[i] == orig)
3826 return copy_insn_scratch_out[i];
3830 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3831 a LABEL_REF, it isn't sharable. */
3832 if (GET_CODE (XEXP (orig, 0)) == PLUS
3833 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3834 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3838 /* A MEM with a constant address is not sharable. The problem is that
3839 the constant address may need to be reloaded. If the mem is shared,
3840 then reloading one copy of this mem will cause all copies to appear
3841 to have been reloaded. */
3847 copy = rtx_alloc (code);
3849 /* Copy the various flags, and other information. We assume that
3850 all fields need copying, and then clear the fields that should
3851 not be copied. That is the sensible default behavior, and forces
3852 us to explicitly document why we are *not* copying a flag. */
3853 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3855 /* We do not copy the USED flag, which is used as a mark bit during
3856 walks over the RTL. */
3859 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3860 if (GET_RTX_CLASS (code) == 'i')
3864 copy->frame_related = 0;
3867 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3869 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3871 copy->fld[i] = orig->fld[i];
3872 switch (*format_ptr++)
3875 if (XEXP (orig, i) != NULL)
3876 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3881 if (XVEC (orig, i) == orig_asm_constraints_vector)
3882 XVEC (copy, i) = copy_asm_constraints_vector;
3883 else if (XVEC (orig, i) == orig_asm_operands_vector)
3884 XVEC (copy, i) = copy_asm_operands_vector;
3885 else if (XVEC (orig, i) != NULL)
3887 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3888 for (j = 0; j < XVECLEN (copy, i); j++)
3889 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3900 /* These are left unchanged. */
3908 if (code == SCRATCH)
3910 i = copy_insn_n_scratches++;
3911 if (i >= MAX_RECOG_OPERANDS)
3913 copy_insn_scratch_in[i] = orig;
3914 copy_insn_scratch_out[i] = copy;
3916 else if (code == ASM_OPERANDS)
3918 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
3919 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
3920 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
3921 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
3927 /* Create a new copy of an rtx.
3928 This function differs from copy_rtx in that it handles SCRATCHes and
3929 ASM_OPERANDs properly.
3930 INSN doesn't really have to be a full INSN; it could be just the
3936 copy_insn_n_scratches = 0;
3937 orig_asm_operands_vector = 0;
3938 orig_asm_constraints_vector = 0;
3939 copy_asm_operands_vector = 0;
3940 copy_asm_constraints_vector = 0;
3941 return copy_insn_1 (insn);
3944 /* Initialize data structures and variables in this file
3945 before generating rtl for each function. */
3950 struct function *f = cfun;
3952 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3955 seq_rtl_expr = NULL;
3957 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3960 first_label_num = label_num;
3964 clear_emit_caches ();
3966 /* Init the tables that describe all the pseudo regs. */
3968 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
3970 f->emit->regno_pointer_align
3971 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
3972 sizeof (unsigned char));
3975 = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
3978 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3979 init_virtual_regs (f->emit);
3981 /* Indicate that the virtual registers and stack locations are
3983 REG_POINTER (stack_pointer_rtx) = 1;
3984 REG_POINTER (frame_pointer_rtx) = 1;
3985 REG_POINTER (hard_frame_pointer_rtx) = 1;
3986 REG_POINTER (arg_pointer_rtx) = 1;
3988 REG_POINTER (virtual_incoming_args_rtx) = 1;
3989 REG_POINTER (virtual_stack_vars_rtx) = 1;
3990 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
3991 REG_POINTER (virtual_outgoing_args_rtx) = 1;
3992 REG_POINTER (virtual_cfa_rtx) = 1;
3994 #ifdef STACK_BOUNDARY
3995 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3996 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3997 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3998 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4000 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4001 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4002 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4003 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4004 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4007 #ifdef INIT_EXPANDERS
4012 /* Mark SS for GC. */
4015 mark_sequence_stack (ss)
4016 struct sequence_stack *ss;
4020 ggc_mark_rtx (ss->first);
4021 ggc_mark_tree (ss->sequence_rtl_expr);
4026 /* Mark ES for GC. */
4029 mark_emit_status (es)
4030 struct emit_status *es;
4038 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
4042 mark_sequence_stack (es->sequence_stack);
4043 ggc_mark_tree (es->sequence_rtl_expr);
4044 ggc_mark_rtx (es->x_first_insn);
4047 /* Create some permanent unique rtl objects shared between all functions.
4048 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4051 init_emit_once (line_numbers)
4055 enum machine_mode mode;
4056 enum machine_mode double_mode;
4058 /* Initialize the CONST_INT hash table. */
4059 const_int_htab = htab_create (37, const_int_htab_hash,
4060 const_int_htab_eq, NULL);
4061 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4064 no_line_numbers = ! line_numbers;
4066 /* Compute the word and byte modes. */
4068 byte_mode = VOIDmode;
4069 word_mode = VOIDmode;
4070 double_mode = VOIDmode;
4072 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4073 mode = GET_MODE_WIDER_MODE (mode))
4075 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4076 && byte_mode == VOIDmode)
4079 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4080 && word_mode == VOIDmode)
4084 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4085 mode = GET_MODE_WIDER_MODE (mode))
4087 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4088 && double_mode == VOIDmode)
4092 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4094 /* Assign register numbers to the globally defined register rtx.
4095 This must be done at runtime because the register number field
4096 is in a union and some compilers can't initialize unions. */
4098 pc_rtx = gen_rtx (PC, VOIDmode);
4099 cc0_rtx = gen_rtx (CC0, VOIDmode);
4100 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4101 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4102 if (hard_frame_pointer_rtx == 0)
4103 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4104 HARD_FRAME_POINTER_REGNUM);
4105 if (arg_pointer_rtx == 0)
4106 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4107 virtual_incoming_args_rtx =
4108 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4109 virtual_stack_vars_rtx =
4110 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4111 virtual_stack_dynamic_rtx =
4112 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4113 virtual_outgoing_args_rtx =
4114 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4115 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4117 /* These rtx must be roots if GC is enabled. */
4118 ggc_add_rtx_root (global_rtl, GR_MAX);
4120 #ifdef INIT_EXPANDERS
4121 /* This is to initialize {init|mark|free}_machine_status before the first
4122 call to push_function_context_to. This is needed by the Chill front
4123 end which calls push_function_context_to before the first cal to
4124 init_function_start. */
4128 /* Create the unique rtx's for certain rtx codes and operand values. */
4130 /* Don't use gen_rtx here since gen_rtx in this case
4131 tries to use these variables. */
4132 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4133 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4134 gen_rtx_raw_CONST_INT (VOIDmode, i);
4135 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4137 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4138 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4139 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4141 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4143 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4144 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4145 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4146 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4148 for (i = 0; i <= 2; i++)
4150 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4151 mode = GET_MODE_WIDER_MODE (mode))
4153 rtx tem = rtx_alloc (CONST_DOUBLE);
4154 union real_extract u;
4156 /* Zero any holes in a structure. */
4157 memset ((char *) &u, 0, sizeof u);
4158 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4160 /* Avoid trailing garbage in the rtx. */
4161 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4162 CONST_DOUBLE_LOW (tem) = 0;
4163 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4164 CONST_DOUBLE_HIGH (tem) = 0;
4166 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4167 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4168 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4169 PUT_MODE (tem, mode);
4171 const_tiny_rtx[i][(int) mode] = tem;
4174 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4176 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4177 mode = GET_MODE_WIDER_MODE (mode))
4178 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4180 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4182 mode = GET_MODE_WIDER_MODE (mode))
4183 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4186 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4187 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4188 const_tiny_rtx[0][i] = const0_rtx;
4190 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4191 if (STORE_FLAG_VALUE == 1)
4192 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4194 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4195 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4196 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4197 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4198 ggc_add_rtx_root (&const_true_rtx, 1);
4200 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4201 return_address_pointer_rtx
4202 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4206 struct_value_rtx = STRUCT_VALUE;
4208 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4211 #ifdef STRUCT_VALUE_INCOMING
4212 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4214 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4215 struct_value_incoming_rtx
4216 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4218 struct_value_incoming_rtx = struct_value_rtx;
4222 #ifdef STATIC_CHAIN_REGNUM
4223 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4225 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4226 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4227 static_chain_incoming_rtx
4228 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4231 static_chain_incoming_rtx = static_chain_rtx;
4235 static_chain_rtx = STATIC_CHAIN;
4237 #ifdef STATIC_CHAIN_INCOMING
4238 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4240 static_chain_incoming_rtx = static_chain_rtx;
4244 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4245 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4247 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4248 ggc_add_rtx_root (&struct_value_rtx, 1);
4249 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4250 ggc_add_rtx_root (&static_chain_rtx, 1);
4251 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4252 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4255 /* Query and clear/ restore no_line_numbers. This is used by the
4256 switch / case handling in stmt.c to give proper line numbers in
4257 warnings about unreachable code. */
4260 force_line_numbers ()
4262 int old = no_line_numbers;
4264 no_line_numbers = 0;
4266 force_next_line_note ();
4271 restore_line_number_status (old_value)
4274 no_line_numbers = old_value;