1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_last_label_num was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl[GR_MAX];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
108 REAL_VALUE_TYPE dconst0;
109 REAL_VALUE_TYPE dconst1;
110 REAL_VALUE_TYPE dconst2;
111 REAL_VALUE_TYPE dconst3;
112 REAL_VALUE_TYPE dconst10;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconstm2;
115 REAL_VALUE_TYPE dconsthalf;
116 REAL_VALUE_TYPE dconstthird;
117 REAL_VALUE_TYPE dconstpi;
118 REAL_VALUE_TYPE dconste;
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
157 htab_t const_int_htab;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
161 htab_t mem_attrs_htab;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
165 htab_t reg_attrs_htab;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_double_htab;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_location (cfun->emit->x_last_location)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw (rtx);
178 static rtx make_call_insn_raw (rtx);
179 static rtx find_line_note (rtx);
180 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
181 static void unshare_all_decls (tree);
182 static void reset_used_decls (tree);
183 static void mark_label_nuses (rtx);
184 static hashval_t const_int_htab_hash (const void *);
185 static int const_int_htab_eq (const void *, const void *);
186 static hashval_t const_double_htab_hash (const void *);
187 static int const_double_htab_eq (const void *, const void *);
188 static rtx lookup_const_double (rtx);
189 static hashval_t mem_attrs_htab_hash (const void *);
190 static int mem_attrs_htab_eq (const void *, const void *);
191 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
193 static hashval_t reg_attrs_htab_hash (const void *);
194 static int reg_attrs_htab_eq (const void *, const void *);
195 static reg_attrs *get_reg_attrs (tree, int);
196 static tree component_ref_for_mem_expr (tree);
197 static rtx gen_const_vector_0 (enum machine_mode);
198 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
199 static void copy_rtx_if_shared_1 (rtx *orig);
201 /* Probability of the conditional branch currently proceeded by try_split.
202 Set to -1 otherwise. */
203 int split_branch_probability = -1;
205 /* Returns a hash code for X (which is a really a CONST_INT). */
208 const_int_htab_hash (const void *x)
210 return (hashval_t) INTVAL ((rtx) x);
213 /* Returns nonzero if the value represented by X (which is really a
214 CONST_INT) is the same as that given by Y (which is really a
218 const_int_htab_eq (const void *x, const void *y)
220 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
223 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
225 const_double_htab_hash (const void *x)
230 if (GET_MODE (value) == VOIDmode)
231 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
234 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
235 /* MODE is used in the comparison, so it should be in the hash. */
236 h ^= GET_MODE (value);
241 /* Returns nonzero if the value represented by X (really a ...)
242 is the same as that represented by Y (really a ...) */
244 const_double_htab_eq (const void *x, const void *y)
246 rtx a = (rtx)x, b = (rtx)y;
248 if (GET_MODE (a) != GET_MODE (b))
250 if (GET_MODE (a) == VOIDmode)
251 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
252 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
254 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
255 CONST_DOUBLE_REAL_VALUE (b));
258 /* Returns a hash code for X (which is a really a mem_attrs *). */
261 mem_attrs_htab_hash (const void *x)
263 mem_attrs *p = (mem_attrs *) x;
265 return (p->alias ^ (p->align * 1000)
266 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
267 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
271 /* Returns nonzero if the value represented by X (which is really a
272 mem_attrs *) is the same as that given by Y (which is also really a
276 mem_attrs_htab_eq (const void *x, const void *y)
278 mem_attrs *p = (mem_attrs *) x;
279 mem_attrs *q = (mem_attrs *) y;
281 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
282 && p->size == q->size && p->align == q->align);
285 /* Allocate a new mem_attrs structure and insert it into the hash table if
286 one identical to it is not already in the table. We are doing this for
290 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
291 unsigned int align, enum machine_mode mode)
296 /* If everything is the default, we can just return zero.
297 This must match what the corresponding MEM_* macros return when the
298 field is not present. */
299 if (alias == 0 && expr == 0 && offset == 0
301 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
302 && (STRICT_ALIGNMENT && mode != BLKmode
303 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
308 attrs.offset = offset;
312 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
315 *slot = ggc_alloc (sizeof (mem_attrs));
316 memcpy (*slot, &attrs, sizeof (mem_attrs));
322 /* Returns a hash code for X (which is a really a reg_attrs *). */
325 reg_attrs_htab_hash (const void *x)
327 reg_attrs *p = (reg_attrs *) x;
329 return ((p->offset * 1000) ^ (long) p->decl);
332 /* Returns nonzero if the value represented by X (which is really a
333 reg_attrs *) is the same as that given by Y (which is also really a
337 reg_attrs_htab_eq (const void *x, const void *y)
339 reg_attrs *p = (reg_attrs *) x;
340 reg_attrs *q = (reg_attrs *) y;
342 return (p->decl == q->decl && p->offset == q->offset);
344 /* Allocate a new reg_attrs structure and insert it into the hash table if
345 one identical to it is not already in the table. We are doing this for
349 get_reg_attrs (tree decl, int offset)
354 /* If everything is the default, we can just return zero. */
355 if (decl == 0 && offset == 0)
359 attrs.offset = offset;
361 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
364 *slot = ggc_alloc (sizeof (reg_attrs));
365 memcpy (*slot, &attrs, sizeof (reg_attrs));
371 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
372 don't attempt to share with the various global pieces of rtl (such as
373 frame_pointer_rtx). */
376 gen_raw_REG (enum machine_mode mode, int regno)
378 rtx x = gen_rtx_raw_REG (mode, regno);
379 ORIGINAL_REGNO (x) = regno;
383 /* There are some RTL codes that require special attention; the generation
384 functions do the raw handling. If you add to this list, modify
385 special_rtx in gengenrtl.c as well. */
388 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
392 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
393 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
395 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
396 if (const_true_rtx && arg == STORE_FLAG_VALUE)
397 return const_true_rtx;
400 /* Look up the CONST_INT in the hash table. */
401 slot = htab_find_slot_with_hash (const_int_htab, &arg,
402 (hashval_t) arg, INSERT);
404 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
410 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
412 return GEN_INT (trunc_int_for_mode (c, mode));
415 /* CONST_DOUBLEs might be created from pairs of integers, or from
416 REAL_VALUE_TYPEs. Also, their length is known only at run time,
417 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
419 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
420 hash table. If so, return its counterpart; otherwise add it
421 to the hash table and return it. */
423 lookup_const_double (rtx real)
425 void **slot = htab_find_slot (const_double_htab, real, INSERT);
432 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
433 VALUE in mode MODE. */
435 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
437 rtx real = rtx_alloc (CONST_DOUBLE);
438 PUT_MODE (real, mode);
440 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
442 return lookup_const_double (real);
445 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
446 of ints: I0 is the low-order word and I1 is the high-order word.
447 Do not use this routine for non-integer modes; convert to
448 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
451 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
456 if (mode != VOIDmode)
459 if (GET_MODE_CLASS (mode) != MODE_INT
460 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
461 /* We can get a 0 for an error mark. */
462 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
463 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
466 /* We clear out all bits that don't belong in MODE, unless they and
467 our sign bit are all one. So we get either a reasonable negative
468 value or a reasonable unsigned value for this mode. */
469 width = GET_MODE_BITSIZE (mode);
470 if (width < HOST_BITS_PER_WIDE_INT
471 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
472 != ((HOST_WIDE_INT) (-1) << (width - 1))))
473 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
474 else if (width == HOST_BITS_PER_WIDE_INT
475 && ! (i1 == ~0 && i0 < 0))
477 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
478 /* We cannot represent this value as a constant. */
481 /* If this would be an entire word for the target, but is not for
482 the host, then sign-extend on the host so that the number will
483 look the same way on the host that it would on the target.
485 For example, when building a 64 bit alpha hosted 32 bit sparc
486 targeted compiler, then we want the 32 bit unsigned value -1 to be
487 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
488 The latter confuses the sparc backend. */
490 if (width < HOST_BITS_PER_WIDE_INT
491 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
492 i0 |= ((HOST_WIDE_INT) (-1) << width);
494 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
497 ??? Strictly speaking, this is wrong if we create a CONST_INT for
498 a large unsigned constant with the size of MODE being
499 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
500 in a wider mode. In that case we will mis-interpret it as a
503 Unfortunately, the only alternative is to make a CONST_DOUBLE for
504 any constant in any mode if it is an unsigned constant larger
505 than the maximum signed integer in an int on the host. However,
506 doing this will break everyone that always expects to see a
507 CONST_INT for SImode and smaller.
509 We have always been making CONST_INTs in this case, so nothing
510 new is being broken. */
512 if (width <= HOST_BITS_PER_WIDE_INT)
513 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
516 /* If this integer fits in one word, return a CONST_INT. */
517 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
520 /* We use VOIDmode for integers. */
521 value = rtx_alloc (CONST_DOUBLE);
522 PUT_MODE (value, VOIDmode);
524 CONST_DOUBLE_LOW (value) = i0;
525 CONST_DOUBLE_HIGH (value) = i1;
527 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
528 XWINT (value, i) = 0;
530 return lookup_const_double (value);
534 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
536 /* In case the MD file explicitly references the frame pointer, have
537 all such references point to the same frame pointer. This is
538 used during frame pointer elimination to distinguish the explicit
539 references to these registers from pseudos that happened to be
542 If we have eliminated the frame pointer or arg pointer, we will
543 be using it as a normal register, for example as a spill
544 register. In such cases, we might be accessing it in a mode that
545 is not Pmode and therefore cannot use the pre-allocated rtx.
547 Also don't do this when we are making new REGs in reload, since
548 we don't want to get confused with the real pointers. */
550 if (mode == Pmode && !reload_in_progress)
552 if (regno == FRAME_POINTER_REGNUM
553 && (!reload_completed || frame_pointer_needed))
554 return frame_pointer_rtx;
555 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
556 if (regno == HARD_FRAME_POINTER_REGNUM
557 && (!reload_completed || frame_pointer_needed))
558 return hard_frame_pointer_rtx;
560 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
561 if (regno == ARG_POINTER_REGNUM)
562 return arg_pointer_rtx;
564 #ifdef RETURN_ADDRESS_POINTER_REGNUM
565 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
566 return return_address_pointer_rtx;
568 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
569 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
570 return pic_offset_table_rtx;
571 if (regno == STACK_POINTER_REGNUM)
572 return stack_pointer_rtx;
576 /* If the per-function register table has been set up, try to re-use
577 an existing entry in that table to avoid useless generation of RTL.
579 This code is disabled for now until we can fix the various backends
580 which depend on having non-shared hard registers in some cases. Long
581 term we want to re-enable this code as it can significantly cut down
582 on the amount of useless RTL that gets generated.
584 We'll also need to fix some code that runs after reload that wants to
585 set ORIGINAL_REGNO. */
590 && regno < FIRST_PSEUDO_REGISTER
591 && reg_raw_mode[regno] == mode)
592 return regno_reg_rtx[regno];
595 return gen_raw_REG (mode, regno);
599 gen_rtx_MEM (enum machine_mode mode, rtx addr)
601 rtx rt = gen_rtx_raw_MEM (mode, addr);
603 /* This field is not cleared by the mere allocation of the rtx, so
611 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
613 /* This is the most common failure type.
614 Catch it early so we can see who does it. */
615 if ((offset % GET_MODE_SIZE (mode)) != 0)
618 /* This check isn't usable right now because combine will
619 throw arbitrary crap like a CALL into a SUBREG in
620 gen_lowpart_for_combine so we must just eat it. */
622 /* Check for this too. */
623 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
626 return gen_rtx_raw_SUBREG (mode, reg, offset);
629 /* Generate a SUBREG representing the least-significant part of REG if MODE
630 is smaller than mode of REG, otherwise paradoxical SUBREG. */
633 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
635 enum machine_mode inmode;
637 inmode = GET_MODE (reg);
638 if (inmode == VOIDmode)
640 return gen_rtx_SUBREG (mode, reg,
641 subreg_lowpart_offset (mode, inmode));
644 /* gen_rtvec (n, [rt1, ..., rtn])
646 ** This routine creates an rtvec and stores within it the
647 ** pointers to rtx's which are its arguments.
652 gen_rtvec (int n, ...)
661 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
663 vector = alloca (n * sizeof (rtx));
665 for (i = 0; i < n; i++)
666 vector[i] = va_arg (p, rtx);
668 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
672 return gen_rtvec_v (save_n, vector);
676 gen_rtvec_v (int n, rtx *argp)
682 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
684 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
686 for (i = 0; i < n; i++)
687 rt_val->elem[i] = *argp++;
692 /* Generate a REG rtx for a new pseudo register of mode MODE.
693 This pseudo is assigned the next sequential register number. */
696 gen_reg_rtx (enum machine_mode mode)
698 struct function *f = cfun;
701 /* Don't let anything called after initial flow analysis create new
706 if (generating_concat_p
707 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
708 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
710 /* For complex modes, don't make a single pseudo.
711 Instead, make a CONCAT of two pseudos.
712 This allows noncontiguous allocation of the real and imaginary parts,
713 which makes much better code. Besides, allocating DCmode
714 pseudos overstrains reload on some machines like the 386. */
715 rtx realpart, imagpart;
716 enum machine_mode partmode = GET_MODE_INNER (mode);
718 realpart = gen_reg_rtx (partmode);
719 imagpart = gen_reg_rtx (partmode);
720 return gen_rtx_CONCAT (mode, realpart, imagpart);
723 /* Make sure regno_pointer_align, and regno_reg_rtx are large
724 enough to have an element for this pseudo reg number. */
726 if (reg_rtx_no == f->emit->regno_pointer_align_length)
728 int old_size = f->emit->regno_pointer_align_length;
732 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
733 memset (new + old_size, 0, old_size);
734 f->emit->regno_pointer_align = (unsigned char *) new;
736 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
737 old_size * 2 * sizeof (rtx));
738 memset (new1 + old_size, 0, old_size * sizeof (rtx));
739 regno_reg_rtx = new1;
741 f->emit->regno_pointer_align_length = old_size * 2;
744 val = gen_raw_REG (mode, reg_rtx_no);
745 regno_reg_rtx[reg_rtx_no++] = val;
749 /* Generate a register with same attributes as REG, but offsetted by OFFSET.
750 Do the big endian correction if needed. */
753 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
755 rtx new = gen_rtx_REG (mode, regno);
757 HOST_WIDE_INT var_size;
759 /* PR middle-end/14084
760 The problem appears when a variable is stored in a larger register
761 and later it is used in the original mode or some mode in between
762 or some part of variable is accessed.
764 On little endian machines there is no problem because
765 the REG_OFFSET of the start of the variable is the same when
766 accessed in any mode (it is 0).
768 However, this is not true on big endian machines.
769 The offset of the start of the variable is different when accessed
771 When we are taking a part of the REG we have to change the OFFSET
772 from offset WRT size of mode of REG to offset WRT size of variable.
774 If we would not do the big endian correction the resulting REG_OFFSET
775 would be larger than the size of the DECL.
777 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
779 REG.mode MODE DECL size old offset new offset description
780 DI SI 4 4 0 int32 in SImode
781 DI SI 1 4 0 char in SImode
782 DI QI 1 7 0 char in QImode
783 DI QI 4 5 1 1st element in QImode
785 DI HI 4 6 2 1st element in HImode
788 If the size of DECL is equal or greater than the size of REG
789 we can't do this correction because the register holds the
790 whole variable or a part of the variable and thus the REG_OFFSET
791 is already correct. */
793 decl = REG_EXPR (reg);
794 if ((BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
797 && GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode)
798 && ((var_size = int_size_in_bytes (TREE_TYPE (decl))) > 0
799 && var_size < GET_MODE_SIZE (GET_MODE (reg))))
803 /* Convert machine endian to little endian WRT size of mode of REG. */
804 if (WORDS_BIG_ENDIAN)
805 offset_le = ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
806 / UNITS_PER_WORD) * UNITS_PER_WORD;
808 offset_le = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
810 if (BYTES_BIG_ENDIAN)
811 offset_le += ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
814 offset_le += offset % UNITS_PER_WORD;
816 if (offset_le >= var_size)
818 /* MODE is wider than the variable so the new reg will cover
819 the whole variable so the resulting OFFSET should be 0. */
824 /* Convert little endian to machine endian WRT size of variable. */
825 if (WORDS_BIG_ENDIAN)
826 offset = ((var_size - 1 - offset_le)
827 / UNITS_PER_WORD) * UNITS_PER_WORD;
829 offset = (offset_le / UNITS_PER_WORD) * UNITS_PER_WORD;
831 if (BYTES_BIG_ENDIAN)
832 offset += ((var_size - 1 - offset_le)
835 offset += offset_le % UNITS_PER_WORD;
839 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
840 REG_OFFSET (reg) + offset);
844 /* Set the decl for MEM to DECL. */
847 set_reg_attrs_from_mem (rtx reg, rtx mem)
849 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
851 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
854 /* Set the register attributes for registers contained in PARM_RTX.
855 Use needed values from memory attributes of MEM. */
858 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
860 if (REG_P (parm_rtx))
861 set_reg_attrs_from_mem (parm_rtx, mem);
862 else if (GET_CODE (parm_rtx) == PARALLEL)
864 /* Check for a NULL entry in the first slot, used to indicate that the
865 parameter goes both on the stack and in registers. */
866 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
867 for (; i < XVECLEN (parm_rtx, 0); i++)
869 rtx x = XVECEXP (parm_rtx, 0, i);
870 if (REG_P (XEXP (x, 0)))
871 REG_ATTRS (XEXP (x, 0))
872 = get_reg_attrs (MEM_EXPR (mem),
873 INTVAL (XEXP (x, 1)));
878 /* Assign the RTX X to declaration T. */
880 set_decl_rtl (tree t, rtx x)
882 DECL_CHECK (t)->decl.rtl = x;
886 /* For register, we maintain the reverse information too. */
888 REG_ATTRS (x) = get_reg_attrs (t, 0);
889 else if (GET_CODE (x) == SUBREG)
890 REG_ATTRS (SUBREG_REG (x))
891 = get_reg_attrs (t, -SUBREG_BYTE (x));
892 if (GET_CODE (x) == CONCAT)
894 if (REG_P (XEXP (x, 0)))
895 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
896 if (REG_P (XEXP (x, 1)))
897 REG_ATTRS (XEXP (x, 1))
898 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
900 if (GET_CODE (x) == PARALLEL)
903 for (i = 0; i < XVECLEN (x, 0); i++)
905 rtx y = XVECEXP (x, 0, i);
906 if (REG_P (XEXP (y, 0)))
907 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
912 /* Assign the RTX X to parameter declaration T. */
914 set_decl_incoming_rtl (tree t, rtx x)
916 DECL_INCOMING_RTL (t) = x;
920 /* For register, we maintain the reverse information too. */
922 REG_ATTRS (x) = get_reg_attrs (t, 0);
923 else if (GET_CODE (x) == SUBREG)
924 REG_ATTRS (SUBREG_REG (x))
925 = get_reg_attrs (t, -SUBREG_BYTE (x));
926 if (GET_CODE (x) == CONCAT)
928 if (REG_P (XEXP (x, 0)))
929 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
930 if (REG_P (XEXP (x, 1)))
931 REG_ATTRS (XEXP (x, 1))
932 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
934 if (GET_CODE (x) == PARALLEL)
938 /* Check for a NULL entry, used to indicate that the parameter goes
939 both on the stack and in registers. */
940 if (XEXP (XVECEXP (x, 0, 0), 0))
945 for (i = start; i < XVECLEN (x, 0); i++)
947 rtx y = XVECEXP (x, 0, i);
948 if (REG_P (XEXP (y, 0)))
949 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
954 /* Identify REG (which may be a CONCAT) as a user register. */
957 mark_user_reg (rtx reg)
959 if (GET_CODE (reg) == CONCAT)
961 REG_USERVAR_P (XEXP (reg, 0)) = 1;
962 REG_USERVAR_P (XEXP (reg, 1)) = 1;
964 else if (REG_P (reg))
965 REG_USERVAR_P (reg) = 1;
970 /* Identify REG as a probable pointer register and show its alignment
971 as ALIGN, if nonzero. */
974 mark_reg_pointer (rtx reg, int align)
976 if (! REG_POINTER (reg))
978 REG_POINTER (reg) = 1;
981 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
983 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
984 /* We can no-longer be sure just how aligned this pointer is. */
985 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
988 /* Return 1 plus largest pseudo reg number used in the current function. */
996 /* Return 1 + the largest label number used so far in the current function. */
1001 if (last_label_num && label_num == base_label_num)
1002 return last_label_num;
1006 /* Return first label number used in this function (if any were used). */
1009 get_first_label_num (void)
1011 return first_label_num;
1014 /* If the rtx for label was created during the expansion of a nested
1015 function, then first_label_num won't include this label number.
1016 Fix this now so that array indicies work later. */
1019 maybe_set_first_label_num (rtx x)
1021 if (CODE_LABEL_NUMBER (x) < first_label_num)
1022 first_label_num = CODE_LABEL_NUMBER (x);
1025 /* Return the final regno of X, which is a SUBREG of a hard
1028 subreg_hard_regno (rtx x, int check_mode)
1030 enum machine_mode mode = GET_MODE (x);
1031 unsigned int byte_offset, base_regno, final_regno;
1032 rtx reg = SUBREG_REG (x);
1034 /* This is where we attempt to catch illegal subregs
1035 created by the compiler. */
1036 if (GET_CODE (x) != SUBREG
1039 base_regno = REGNO (reg);
1040 if (base_regno >= FIRST_PSEUDO_REGISTER)
1042 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1044 #ifdef ENABLE_CHECKING
1045 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1046 SUBREG_BYTE (x), mode))
1049 /* Catch non-congruent offsets too. */
1050 byte_offset = SUBREG_BYTE (x);
1051 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1054 final_regno = subreg_regno (x);
1059 /* Return a value representing some low-order bits of X, where the number
1060 of low-order bits is given by MODE. Note that no conversion is done
1061 between floating-point and fixed-point values, rather, the bit
1062 representation is returned.
1064 This function handles the cases in common between gen_lowpart, below,
1065 and two variants in cse.c and combine.c. These are the cases that can
1066 be safely handled at all points in the compilation.
1068 If this is not a case we can handle, return 0. */
1071 gen_lowpart_common (enum machine_mode mode, rtx x)
1073 int msize = GET_MODE_SIZE (mode);
1076 enum machine_mode innermode;
1078 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1079 so we have to make one up. Yuk. */
1080 innermode = GET_MODE (x);
1081 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
1082 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1083 else if (innermode == VOIDmode)
1084 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1086 xsize = GET_MODE_SIZE (innermode);
1088 if (innermode == VOIDmode || innermode == BLKmode)
1091 if (innermode == mode)
1094 /* MODE must occupy no more words than the mode of X. */
1095 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1096 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1099 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1100 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1103 offset = subreg_lowpart_offset (mode, innermode);
1105 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1106 && (GET_MODE_CLASS (mode) == MODE_INT
1107 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1109 /* If we are getting the low-order part of something that has been
1110 sign- or zero-extended, we can either just use the object being
1111 extended or make a narrower extension. If we want an even smaller
1112 piece than the size of the object being extended, call ourselves
1115 This case is used mostly by combine and cse. */
1117 if (GET_MODE (XEXP (x, 0)) == mode)
1119 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1120 return gen_lowpart_common (mode, XEXP (x, 0));
1121 else if (msize < xsize)
1122 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1124 else if (GET_CODE (x) == SUBREG || REG_P (x)
1125 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1126 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1127 return simplify_gen_subreg (mode, x, innermode, offset);
1129 /* Otherwise, we can't do this. */
1133 /* Return the constant real or imaginary part (which has mode MODE)
1134 of a complex value X. The IMAGPART_P argument determines whether
1135 the real or complex component should be returned. This function
1136 returns NULL_RTX if the component isn't a constant. */
1139 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1143 if (GET_CODE (x) == MEM
1144 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1146 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1147 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1149 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1150 if (TREE_CODE (part) == REAL_CST
1151 || TREE_CODE (part) == INTEGER_CST)
1152 return expand_expr (part, NULL_RTX, mode, 0);
1158 /* Return the real part (which has mode MODE) of a complex value X.
1159 This always comes at the low address in memory. */
1162 gen_realpart (enum machine_mode mode, rtx x)
1166 /* Handle complex constants. */
1167 part = gen_complex_constant_part (mode, x, 0);
1168 if (part != NULL_RTX)
1171 if (WORDS_BIG_ENDIAN
1172 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1174 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1176 ("can't access real part of complex value in hard register");
1177 else if (WORDS_BIG_ENDIAN)
1178 return gen_highpart (mode, x);
1180 return gen_lowpart (mode, x);
1183 /* Return the imaginary part (which has mode MODE) of a complex value X.
1184 This always comes at the high address in memory. */
1187 gen_imagpart (enum machine_mode mode, rtx x)
1191 /* Handle complex constants. */
1192 part = gen_complex_constant_part (mode, x, 1);
1193 if (part != NULL_RTX)
1196 if (WORDS_BIG_ENDIAN)
1197 return gen_lowpart (mode, x);
1198 else if (! WORDS_BIG_ENDIAN
1199 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1201 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1203 ("can't access imaginary part of complex value in hard register");
1205 return gen_highpart (mode, x);
1209 gen_highpart (enum machine_mode mode, rtx x)
1211 unsigned int msize = GET_MODE_SIZE (mode);
1214 /* This case loses if X is a subreg. To catch bugs early,
1215 complain if an invalid MODE is used even in other cases. */
1216 if (msize > UNITS_PER_WORD
1217 && msize != (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)))
1220 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1221 subreg_highpart_offset (mode, GET_MODE (x)));
1223 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1224 the target if we have a MEM. gen_highpart must return a valid operand,
1225 emitting code if necessary to do so. */
1226 if (result != NULL_RTX && GET_CODE (result) == MEM)
1227 result = validize_mem (result);
1234 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1235 be VOIDmode constant. */
1237 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1239 if (GET_MODE (exp) != VOIDmode)
1241 if (GET_MODE (exp) != innermode)
1243 return gen_highpart (outermode, exp);
1245 return simplify_gen_subreg (outermode, exp, innermode,
1246 subreg_highpart_offset (outermode, innermode));
1249 /* Return offset in bytes to get OUTERMODE low part
1250 of the value in mode INNERMODE stored in memory in target format. */
1253 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1255 unsigned int offset = 0;
1256 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1260 if (WORDS_BIG_ENDIAN)
1261 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1262 if (BYTES_BIG_ENDIAN)
1263 offset += difference % UNITS_PER_WORD;
1269 /* Return offset in bytes to get OUTERMODE high part
1270 of the value in mode INNERMODE stored in memory in target format. */
1272 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1274 unsigned int offset = 0;
1275 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1277 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1282 if (! WORDS_BIG_ENDIAN)
1283 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1284 if (! BYTES_BIG_ENDIAN)
1285 offset += difference % UNITS_PER_WORD;
1291 /* Return 1 iff X, assumed to be a SUBREG,
1292 refers to the least significant part of its containing reg.
1293 If X is not a SUBREG, always return 1 (it is its own low part!). */
1296 subreg_lowpart_p (rtx x)
1298 if (GET_CODE (x) != SUBREG)
1300 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1303 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1304 == SUBREG_BYTE (x));
1307 /* Return subword OFFSET of operand OP.
1308 The word number, OFFSET, is interpreted as the word number starting
1309 at the low-order address. OFFSET 0 is the low-order word if not
1310 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1312 If we cannot extract the required word, we return zero. Otherwise,
1313 an rtx corresponding to the requested word will be returned.
1315 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1316 reload has completed, a valid address will always be returned. After
1317 reload, if a valid address cannot be returned, we return zero.
1319 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1320 it is the responsibility of the caller.
1322 MODE is the mode of OP in case it is a CONST_INT.
1324 ??? This is still rather broken for some cases. The problem for the
1325 moment is that all callers of this thing provide no 'goal mode' to
1326 tell us to work with. This exists because all callers were written
1327 in a word based SUBREG world.
1328 Now use of this function can be deprecated by simplify_subreg in most
1333 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1335 if (mode == VOIDmode)
1336 mode = GET_MODE (op);
1338 if (mode == VOIDmode)
1341 /* If OP is narrower than a word, fail. */
1343 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1346 /* If we want a word outside OP, return zero. */
1348 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1351 /* Form a new MEM at the requested address. */
1352 if (GET_CODE (op) == MEM)
1354 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1356 if (! validate_address)
1359 else if (reload_completed)
1361 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1365 return replace_equiv_address (new, XEXP (new, 0));
1368 /* Rest can be handled by simplify_subreg. */
1369 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1372 /* Similar to `operand_subword', but never return 0. If we can't extract
1373 the required subword, put OP into a register and try again. If that fails,
1374 abort. We always validate the address in this case.
1376 MODE is the mode of OP, in case it is CONST_INT. */
1379 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1381 rtx result = operand_subword (op, offset, 1, mode);
1386 if (mode != BLKmode && mode != VOIDmode)
1388 /* If this is a register which can not be accessed by words, copy it
1389 to a pseudo register. */
1391 op = copy_to_reg (op);
1393 op = force_reg (mode, op);
1396 result = operand_subword (op, offset, 1, mode);
1403 /* Given a compare instruction, swap the operands.
1404 A test instruction is changed into a compare of 0 against the operand. */
1407 reverse_comparison (rtx insn)
1409 rtx body = PATTERN (insn);
1412 if (GET_CODE (body) == SET)
1413 comp = SET_SRC (body);
1415 comp = SET_SRC (XVECEXP (body, 0, 0));
1417 if (GET_CODE (comp) == COMPARE)
1419 rtx op0 = XEXP (comp, 0);
1420 rtx op1 = XEXP (comp, 1);
1421 XEXP (comp, 0) = op1;
1422 XEXP (comp, 1) = op0;
1426 rtx new = gen_rtx_COMPARE (VOIDmode,
1427 CONST0_RTX (GET_MODE (comp)), comp);
1428 if (GET_CODE (body) == SET)
1429 SET_SRC (body) = new;
1431 SET_SRC (XVECEXP (body, 0, 0)) = new;
1435 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1436 or (2) a component ref of something variable. Represent the later with
1437 a NULL expression. */
1440 component_ref_for_mem_expr (tree ref)
1442 tree inner = TREE_OPERAND (ref, 0);
1444 if (TREE_CODE (inner) == COMPONENT_REF)
1445 inner = component_ref_for_mem_expr (inner);
1448 /* Now remove any conversions: they don't change what the underlying
1449 object is. Likewise for SAVE_EXPR. */
1450 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1451 || TREE_CODE (inner) == NON_LVALUE_EXPR
1452 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1453 || TREE_CODE (inner) == SAVE_EXPR)
1454 inner = TREE_OPERAND (inner, 0);
1456 if (! DECL_P (inner))
1460 if (inner == TREE_OPERAND (ref, 0))
1463 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1464 TREE_OPERAND (ref, 1));
1467 /* Returns 1 if both MEM_EXPR can be considered equal
1471 mem_expr_equal_p (tree expr1, tree expr2)
1476 if (! expr1 || ! expr2)
1479 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1482 if (TREE_CODE (expr1) == COMPONENT_REF)
1484 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1485 TREE_OPERAND (expr2, 0))
1486 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1487 TREE_OPERAND (expr2, 1));
1489 if (TREE_CODE (expr1) == INDIRECT_REF)
1490 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1491 TREE_OPERAND (expr2, 0));
1493 /* Decls with different pointers can't be equal. */
1497 abort(); /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1498 have been resolved here. */
1501 /* Given REF, a MEM, and T, either the type of X or the expression
1502 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1503 if we are making a new object of this type. BITPOS is nonzero if
1504 there is an offset outstanding on T that will be applied later. */
1507 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1508 HOST_WIDE_INT bitpos)
1510 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1511 tree expr = MEM_EXPR (ref);
1512 rtx offset = MEM_OFFSET (ref);
1513 rtx size = MEM_SIZE (ref);
1514 unsigned int align = MEM_ALIGN (ref);
1515 HOST_WIDE_INT apply_bitpos = 0;
1518 /* It can happen that type_for_mode was given a mode for which there
1519 is no language-level type. In which case it returns NULL, which
1524 type = TYPE_P (t) ? t : TREE_TYPE (t);
1525 if (type == error_mark_node)
1528 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1529 wrong answer, as it assumes that DECL_RTL already has the right alias
1530 info. Callers should not set DECL_RTL until after the call to
1531 set_mem_attributes. */
1532 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1535 /* Get the alias set from the expression or type (perhaps using a
1536 front-end routine) and use it. */
1537 alias = get_alias_set (t);
1539 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1540 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1541 RTX_UNCHANGING_P (ref)
1542 |= ((lang_hooks.honor_readonly
1543 && (TYPE_READONLY (type) || (t != type && TREE_READONLY (t))))
1544 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1545 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1547 /* If we are making an object of this type, or if this is a DECL, we know
1548 that it is a scalar if the type is not an aggregate. */
1549 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1550 MEM_SCALAR_P (ref) = 1;
1552 /* We can set the alignment from the type if we are making an object,
1553 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1554 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1555 align = MAX (align, TYPE_ALIGN (type));
1557 /* If the size is known, we can set that. */
1558 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1559 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1561 /* If T is not a type, we may be able to deduce some more information about
1565 maybe_set_unchanging (ref, t);
1566 if (TREE_THIS_VOLATILE (t))
1567 MEM_VOLATILE_P (ref) = 1;
1569 /* Now remove any conversions: they don't change what the underlying
1570 object is. Likewise for SAVE_EXPR. */
1571 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1572 || TREE_CODE (t) == NON_LVALUE_EXPR
1573 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1574 || TREE_CODE (t) == SAVE_EXPR)
1575 t = TREE_OPERAND (t, 0);
1577 /* If this expression can't be addressed (e.g., it contains a reference
1578 to a non-addressable field), show we don't change its alias set. */
1579 if (! can_address_p (t))
1580 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1582 /* If this is a decl, set the attributes of the MEM from it. */
1586 offset = const0_rtx;
1587 apply_bitpos = bitpos;
1588 size = (DECL_SIZE_UNIT (t)
1589 && host_integerp (DECL_SIZE_UNIT (t), 1)
1590 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1591 align = DECL_ALIGN (t);
1594 /* If this is a constant, we know the alignment. */
1595 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1597 align = TYPE_ALIGN (type);
1598 #ifdef CONSTANT_ALIGNMENT
1599 align = CONSTANT_ALIGNMENT (t, align);
1603 /* If this is a field reference and not a bit-field, record it. */
1604 /* ??? There is some information that can be gleened from bit-fields,
1605 such as the word offset in the structure that might be modified.
1606 But skip it for now. */
1607 else if (TREE_CODE (t) == COMPONENT_REF
1608 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1610 expr = component_ref_for_mem_expr (t);
1611 offset = const0_rtx;
1612 apply_bitpos = bitpos;
1613 /* ??? Any reason the field size would be different than
1614 the size we got from the type? */
1617 /* If this is an array reference, look for an outer field reference. */
1618 else if (TREE_CODE (t) == ARRAY_REF)
1620 tree off_tree = size_zero_node;
1621 /* We can't modify t, because we use it at the end of the
1627 tree index = TREE_OPERAND (t2, 1);
1628 tree array = TREE_OPERAND (t2, 0);
1629 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1630 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1631 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1633 /* We assume all arrays have sizes that are a multiple of a byte.
1634 First subtract the lower bound, if any, in the type of the
1635 index, then convert to sizetype and multiply by the size of the
1637 if (low_bound != 0 && ! integer_zerop (low_bound))
1638 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1641 /* If the index has a self-referential type, instantiate it;
1642 likewise for the component size. */
1643 index = SUBSTITUTE_PLACEHOLDER_IN_EXPR (index, t2);
1644 unit_size = SUBSTITUTE_PLACEHOLDER_IN_EXPR (unit_size, array);
1646 = fold (build (PLUS_EXPR, sizetype,
1647 fold (build (MULT_EXPR, sizetype,
1650 t2 = TREE_OPERAND (t2, 0);
1652 while (TREE_CODE (t2) == ARRAY_REF);
1658 if (host_integerp (off_tree, 1))
1660 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1661 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1662 align = DECL_ALIGN (t2);
1663 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1665 offset = GEN_INT (ioff);
1666 apply_bitpos = bitpos;
1669 else if (TREE_CODE (t2) == COMPONENT_REF)
1671 expr = component_ref_for_mem_expr (t2);
1672 if (host_integerp (off_tree, 1))
1674 offset = GEN_INT (tree_low_cst (off_tree, 1));
1675 apply_bitpos = bitpos;
1677 /* ??? Any reason the field size would be different than
1678 the size we got from the type? */
1680 else if (flag_argument_noalias > 1
1681 && TREE_CODE (t2) == INDIRECT_REF
1682 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1689 /* If this is a Fortran indirect argument reference, record the
1691 else if (flag_argument_noalias > 1
1692 && TREE_CODE (t) == INDIRECT_REF
1693 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1700 /* If we modified OFFSET based on T, then subtract the outstanding
1701 bit position offset. Similarly, increase the size of the accessed
1702 object to contain the negative offset. */
1705 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1707 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1710 /* Now set the attributes we computed above. */
1712 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1714 /* If this is already known to be a scalar or aggregate, we are done. */
1715 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1718 /* If it is a reference into an aggregate, this is part of an aggregate.
1719 Otherwise we don't know. */
1720 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1721 || TREE_CODE (t) == ARRAY_RANGE_REF
1722 || TREE_CODE (t) == BIT_FIELD_REF)
1723 MEM_IN_STRUCT_P (ref) = 1;
1727 set_mem_attributes (rtx ref, tree t, int objectp)
1729 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1732 /* Set the decl for MEM to DECL. */
1735 set_mem_attrs_from_reg (rtx mem, rtx reg)
1738 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1739 GEN_INT (REG_OFFSET (reg)),
1740 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1743 /* Set the alias set of MEM to SET. */
1746 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1748 #ifdef ENABLE_CHECKING
1749 /* If the new and old alias sets don't conflict, something is wrong. */
1750 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1754 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1755 MEM_SIZE (mem), MEM_ALIGN (mem),
1759 /* Set the alignment of MEM to ALIGN bits. */
1762 set_mem_align (rtx mem, unsigned int align)
1764 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1765 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1769 /* Set the expr for MEM to EXPR. */
1772 set_mem_expr (rtx mem, tree expr)
1775 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1776 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1779 /* Set the offset of MEM to OFFSET. */
1782 set_mem_offset (rtx mem, rtx offset)
1784 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1785 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1789 /* Set the size of MEM to SIZE. */
1792 set_mem_size (rtx mem, rtx size)
1794 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1795 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1799 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1800 and its address changed to ADDR. (VOIDmode means don't change the mode.
1801 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1802 returned memory location is required to be valid. The memory
1803 attributes are not changed. */
1806 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1810 if (GET_CODE (memref) != MEM)
1812 if (mode == VOIDmode)
1813 mode = GET_MODE (memref);
1815 addr = XEXP (memref, 0);
1816 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1817 && (!validate || memory_address_p (mode, addr)))
1822 if (reload_in_progress || reload_completed)
1824 if (! memory_address_p (mode, addr))
1828 addr = memory_address (mode, addr);
1831 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1834 new = gen_rtx_MEM (mode, addr);
1835 MEM_COPY_ATTRIBUTES (new, memref);
1839 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1840 way we are changing MEMREF, so we only preserve the alias set. */
1843 change_address (rtx memref, enum machine_mode mode, rtx addr)
1845 rtx new = change_address_1 (memref, mode, addr, 1), size;
1846 enum machine_mode mmode = GET_MODE (new);
1849 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1850 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1852 /* If there are no changes, just return the original memory reference. */
1855 if (MEM_ATTRS (memref) == 0
1856 || (MEM_EXPR (memref) == NULL
1857 && MEM_OFFSET (memref) == NULL
1858 && MEM_SIZE (memref) == size
1859 && MEM_ALIGN (memref) == align))
1862 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1863 MEM_COPY_ATTRIBUTES (new, memref);
1867 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1872 /* Return a memory reference like MEMREF, but with its mode changed
1873 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1874 nonzero, the memory address is forced to be valid.
1875 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1876 and caller is responsible for adjusting MEMREF base register. */
1879 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1880 int validate, int adjust)
1882 rtx addr = XEXP (memref, 0);
1884 rtx memoffset = MEM_OFFSET (memref);
1886 unsigned int memalign = MEM_ALIGN (memref);
1888 /* If there are no changes, just return the original memory reference. */
1889 if (mode == GET_MODE (memref) && !offset
1890 && (!validate || memory_address_p (mode, addr)))
1893 /* ??? Prefer to create garbage instead of creating shared rtl.
1894 This may happen even if offset is nonzero -- consider
1895 (plus (plus reg reg) const_int) -- so do this always. */
1896 addr = copy_rtx (addr);
1900 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1901 object, we can merge it into the LO_SUM. */
1902 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1904 && (unsigned HOST_WIDE_INT) offset
1905 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1906 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1907 plus_constant (XEXP (addr, 1), offset));
1909 addr = plus_constant (addr, offset);
1912 new = change_address_1 (memref, mode, addr, validate);
1914 /* Compute the new values of the memory attributes due to this adjustment.
1915 We add the offsets and update the alignment. */
1917 memoffset = GEN_INT (offset + INTVAL (memoffset));
1919 /* Compute the new alignment by taking the MIN of the alignment and the
1920 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1925 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1927 /* We can compute the size in a number of ways. */
1928 if (GET_MODE (new) != BLKmode)
1929 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1930 else if (MEM_SIZE (memref))
1931 size = plus_constant (MEM_SIZE (memref), -offset);
1933 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1934 memoffset, size, memalign, GET_MODE (new));
1936 /* At some point, we should validate that this offset is within the object,
1937 if all the appropriate values are known. */
1941 /* Return a memory reference like MEMREF, but with its mode changed
1942 to MODE and its address changed to ADDR, which is assumed to be
1943 MEMREF offseted by OFFSET bytes. If VALIDATE is
1944 nonzero, the memory address is forced to be valid. */
1947 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1948 HOST_WIDE_INT offset, int validate)
1950 memref = change_address_1 (memref, VOIDmode, addr, validate);
1951 return adjust_address_1 (memref, mode, offset, validate, 0);
1954 /* Return a memory reference like MEMREF, but whose address is changed by
1955 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1956 known to be in OFFSET (possibly 1). */
1959 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1961 rtx new, addr = XEXP (memref, 0);
1963 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1965 /* At this point we don't know _why_ the address is invalid. It
1966 could have secondary memory references, multiplies or anything.
1968 However, if we did go and rearrange things, we can wind up not
1969 being able to recognize the magic around pic_offset_table_rtx.
1970 This stuff is fragile, and is yet another example of why it is
1971 bad to expose PIC machinery too early. */
1972 if (! memory_address_p (GET_MODE (memref), new)
1973 && GET_CODE (addr) == PLUS
1974 && XEXP (addr, 0) == pic_offset_table_rtx)
1976 addr = force_reg (GET_MODE (addr), addr);
1977 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1980 update_temp_slot_address (XEXP (memref, 0), new);
1981 new = change_address_1 (memref, VOIDmode, new, 1);
1983 /* If there are no changes, just return the original memory reference. */
1987 /* Update the alignment to reflect the offset. Reset the offset, which
1990 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1991 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1996 /* Return a memory reference like MEMREF, but with its address changed to
1997 ADDR. The caller is asserting that the actual piece of memory pointed
1998 to is the same, just the form of the address is being changed, such as
1999 by putting something into a register. */
2002 replace_equiv_address (rtx memref, rtx addr)
2004 /* change_address_1 copies the memory attribute structure without change
2005 and that's exactly what we want here. */
2006 update_temp_slot_address (XEXP (memref, 0), addr);
2007 return change_address_1 (memref, VOIDmode, addr, 1);
2010 /* Likewise, but the reference is not required to be valid. */
2013 replace_equiv_address_nv (rtx memref, rtx addr)
2015 return change_address_1 (memref, VOIDmode, addr, 0);
2018 /* Return a memory reference like MEMREF, but with its mode widened to
2019 MODE and offset by OFFSET. This would be used by targets that e.g.
2020 cannot issue QImode memory operations and have to use SImode memory
2021 operations plus masking logic. */
2024 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2026 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2027 tree expr = MEM_EXPR (new);
2028 rtx memoffset = MEM_OFFSET (new);
2029 unsigned int size = GET_MODE_SIZE (mode);
2031 /* If there are no changes, just return the original memory reference. */
2035 /* If we don't know what offset we were at within the expression, then
2036 we can't know if we've overstepped the bounds. */
2042 if (TREE_CODE (expr) == COMPONENT_REF)
2044 tree field = TREE_OPERAND (expr, 1);
2046 if (! DECL_SIZE_UNIT (field))
2052 /* Is the field at least as large as the access? If so, ok,
2053 otherwise strip back to the containing structure. */
2054 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2055 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2056 && INTVAL (memoffset) >= 0)
2059 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2065 expr = TREE_OPERAND (expr, 0);
2066 memoffset = (GEN_INT (INTVAL (memoffset)
2067 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2068 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2071 /* Similarly for the decl. */
2072 else if (DECL_P (expr)
2073 && DECL_SIZE_UNIT (expr)
2074 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2075 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2076 && (! memoffset || INTVAL (memoffset) >= 0))
2080 /* The widened memory access overflows the expression, which means
2081 that it could alias another expression. Zap it. */
2088 memoffset = NULL_RTX;
2090 /* The widened memory may alias other stuff, so zap the alias set. */
2091 /* ??? Maybe use get_alias_set on any remaining expression. */
2093 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2094 MEM_ALIGN (new), mode);
2099 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2102 gen_label_rtx (void)
2104 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2105 NULL, label_num++, NULL);
2108 /* For procedure integration. */
2110 /* Install new pointers to the first and last insns in the chain.
2111 Also, set cur_insn_uid to one higher than the last in use.
2112 Used for an inline-procedure after copying the insn chain. */
2115 set_new_first_and_last_insn (rtx first, rtx last)
2123 for (insn = first; insn; insn = NEXT_INSN (insn))
2124 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2129 /* Set the last label number found in the current function.
2130 This is used when belatedly compiling an inline function. */
2133 set_new_last_label_num (int last)
2135 base_label_num = label_num;
2136 last_label_num = last;
2139 /* Restore all variables describing the current status from the structure *P.
2140 This is used after a nested function. */
2143 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2148 /* Go through all the RTL insn bodies and copy any invalid shared
2149 structure. This routine should only be called once. */
2152 unshare_all_rtl_1 (tree fndecl, rtx insn)
2156 /* Make sure that virtual parameters are not shared. */
2157 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2158 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2160 /* Make sure that virtual stack slots are not shared. */
2161 unshare_all_decls (DECL_INITIAL (fndecl));
2163 /* Unshare just about everything else. */
2164 unshare_all_rtl_in_chain (insn);
2166 /* Make sure the addresses of stack slots found outside the insn chain
2167 (such as, in DECL_RTL of a variable) are not shared
2168 with the insn chain.
2170 This special care is necessary when the stack slot MEM does not
2171 actually appear in the insn chain. If it does appear, its address
2172 is unshared from all else at that point. */
2173 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2176 /* Go through all the RTL insn bodies and copy any invalid shared
2177 structure, again. This is a fairly expensive thing to do so it
2178 should be done sparingly. */
2181 unshare_all_rtl_again (rtx insn)
2186 for (p = insn; p; p = NEXT_INSN (p))
2189 reset_used_flags (PATTERN (p));
2190 reset_used_flags (REG_NOTES (p));
2191 reset_used_flags (LOG_LINKS (p));
2194 /* Make sure that virtual stack slots are not shared. */
2195 reset_used_decls (DECL_INITIAL (cfun->decl));
2197 /* Make sure that virtual parameters are not shared. */
2198 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2199 reset_used_flags (DECL_RTL (decl));
2201 reset_used_flags (stack_slot_list);
2203 unshare_all_rtl_1 (cfun->decl, insn);
2207 unshare_all_rtl (void)
2209 unshare_all_rtl_1 (current_function_decl, get_insns ());
2212 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2213 Recursively does the same for subexpressions. */
2216 verify_rtx_sharing (rtx orig, rtx insn)
2221 const char *format_ptr;
2226 code = GET_CODE (x);
2228 /* These types may be freely shared. */
2244 /* SCRATCH must be shared because they represent distinct values. */
2246 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2251 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2252 a LABEL_REF, it isn't sharable. */
2253 if (GET_CODE (XEXP (x, 0)) == PLUS
2254 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2255 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2260 /* A MEM is allowed to be shared if its address is constant. */
2261 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2262 || reload_completed || reload_in_progress)
2271 /* This rtx may not be shared. If it has already been seen,
2272 replace it with a copy of itself. */
2274 if (RTX_FLAG (x, used))
2276 error ("Invalid rtl sharing found in the insn");
2278 error ("Shared rtx");
2282 RTX_FLAG (x, used) = 1;
2284 /* Now scan the subexpressions recursively. */
2286 format_ptr = GET_RTX_FORMAT (code);
2288 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2290 switch (*format_ptr++)
2293 verify_rtx_sharing (XEXP (x, i), insn);
2297 if (XVEC (x, i) != NULL)
2300 int len = XVECLEN (x, i);
2302 for (j = 0; j < len; j++)
2304 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2305 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2306 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2307 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2309 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2318 /* Go through all the RTL insn bodies and check that there is no unexpected
2319 sharing in between the subexpressions. */
2322 verify_rtl_sharing (void)
2326 for (p = get_insns (); p; p = NEXT_INSN (p))
2329 reset_used_flags (PATTERN (p));
2330 reset_used_flags (REG_NOTES (p));
2331 reset_used_flags (LOG_LINKS (p));
2334 for (p = get_insns (); p; p = NEXT_INSN (p))
2337 verify_rtx_sharing (PATTERN (p), p);
2338 verify_rtx_sharing (REG_NOTES (p), p);
2339 verify_rtx_sharing (LOG_LINKS (p), p);
2343 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2344 Assumes the mark bits are cleared at entry. */
2347 unshare_all_rtl_in_chain (rtx insn)
2349 for (; insn; insn = NEXT_INSN (insn))
2352 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2353 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2354 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2358 /* Go through all virtual stack slots of a function and copy any
2359 shared structure. */
2361 unshare_all_decls (tree blk)
2365 /* Copy shared decls. */
2366 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2367 if (DECL_RTL_SET_P (t))
2368 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2370 /* Now process sub-blocks. */
2371 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2372 unshare_all_decls (t);
2375 /* Go through all virtual stack slots of a function and mark them as
2378 reset_used_decls (tree blk)
2383 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2384 if (DECL_RTL_SET_P (t))
2385 reset_used_flags (DECL_RTL (t));
2387 /* Now process sub-blocks. */
2388 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2389 reset_used_decls (t);
2392 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2393 placed in the result directly, rather than being copied. MAY_SHARE is
2394 either a MEM of an EXPR_LIST of MEMs. */
2397 copy_most_rtx (rtx orig, rtx may_share)
2402 const char *format_ptr;
2404 if (orig == may_share
2405 || (GET_CODE (may_share) == EXPR_LIST
2406 && in_expr_list_p (may_share, orig)))
2409 code = GET_CODE (orig);
2427 copy = rtx_alloc (code);
2428 PUT_MODE (copy, GET_MODE (orig));
2429 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2430 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2431 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2432 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2433 RTX_FLAG (copy, return_val) = RTX_FLAG (orig, return_val);
2435 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2437 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2439 switch (*format_ptr++)
2442 XEXP (copy, i) = XEXP (orig, i);
2443 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2444 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2448 XEXP (copy, i) = XEXP (orig, i);
2453 XVEC (copy, i) = XVEC (orig, i);
2454 if (XVEC (orig, i) != NULL)
2456 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2457 for (j = 0; j < XVECLEN (copy, i); j++)
2458 XVECEXP (copy, i, j)
2459 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2464 XWINT (copy, i) = XWINT (orig, i);
2469 XINT (copy, i) = XINT (orig, i);
2473 XTREE (copy, i) = XTREE (orig, i);
2478 XSTR (copy, i) = XSTR (orig, i);
2482 X0ANY (copy, i) = X0ANY (orig, i);
2492 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2493 Recursively does the same for subexpressions. Uses
2494 copy_rtx_if_shared_1 to reduce stack space. */
2497 copy_rtx_if_shared (rtx orig)
2499 copy_rtx_if_shared_1 (&orig);
2503 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2504 use. Recursively does the same for subexpressions. */
2507 copy_rtx_if_shared_1 (rtx *orig1)
2513 const char *format_ptr;
2517 /* Repeat is used to turn tail-recursion into iteration. */
2524 code = GET_CODE (x);
2526 /* These types may be freely shared. */
2541 /* SCRATCH must be shared because they represent distinct values. */
2544 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2549 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2550 a LABEL_REF, it isn't sharable. */
2551 if (GET_CODE (XEXP (x, 0)) == PLUS
2552 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2553 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2562 /* The chain of insns is not being copied. */
2569 /* This rtx may not be shared. If it has already been seen,
2570 replace it with a copy of itself. */
2572 if (RTX_FLAG (x, used))
2576 copy = rtx_alloc (code);
2577 memcpy (copy, x, RTX_SIZE (code));
2581 RTX_FLAG (x, used) = 1;
2583 /* Now scan the subexpressions recursively.
2584 We can store any replaced subexpressions directly into X
2585 since we know X is not shared! Any vectors in X
2586 must be copied if X was copied. */
2588 format_ptr = GET_RTX_FORMAT (code);
2589 length = GET_RTX_LENGTH (code);
2592 for (i = 0; i < length; i++)
2594 switch (*format_ptr++)
2598 copy_rtx_if_shared_1 (last_ptr);
2599 last_ptr = &XEXP (x, i);
2603 if (XVEC (x, i) != NULL)
2606 int len = XVECLEN (x, i);
2608 /* Copy the vector iff I copied the rtx and the length
2610 if (copied && len > 0)
2611 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2613 /* Call recursively on all inside the vector. */
2614 for (j = 0; j < len; j++)
2617 copy_rtx_if_shared_1 (last_ptr);
2618 last_ptr = &XVECEXP (x, i, j);
2633 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2634 to look for shared sub-parts. */
2637 reset_used_flags (rtx x)
2641 const char *format_ptr;
2644 /* Repeat is used to turn tail-recursion into iteration. */
2649 code = GET_CODE (x);
2651 /* These types may be freely shared so we needn't do any resetting
2673 /* The chain of insns is not being copied. */
2680 RTX_FLAG (x, used) = 0;
2682 format_ptr = GET_RTX_FORMAT (code);
2683 length = GET_RTX_LENGTH (code);
2685 for (i = 0; i < length; i++)
2687 switch (*format_ptr++)
2695 reset_used_flags (XEXP (x, i));
2699 for (j = 0; j < XVECLEN (x, i); j++)
2700 reset_used_flags (XVECEXP (x, i, j));
2706 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2707 to look for shared sub-parts. */
2710 set_used_flags (rtx x)
2714 const char *format_ptr;
2719 code = GET_CODE (x);
2721 /* These types may be freely shared so we needn't do any resetting
2743 /* The chain of insns is not being copied. */
2750 RTX_FLAG (x, used) = 1;
2752 format_ptr = GET_RTX_FORMAT (code);
2753 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2755 switch (*format_ptr++)
2758 set_used_flags (XEXP (x, i));
2762 for (j = 0; j < XVECLEN (x, i); j++)
2763 set_used_flags (XVECEXP (x, i, j));
2769 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2770 Return X or the rtx for the pseudo reg the value of X was copied into.
2771 OTHER must be valid as a SET_DEST. */
2774 make_safe_from (rtx x, rtx other)
2777 switch (GET_CODE (other))
2780 other = SUBREG_REG (other);
2782 case STRICT_LOW_PART:
2785 other = XEXP (other, 0);
2791 if ((GET_CODE (other) == MEM
2794 && GET_CODE (x) != SUBREG)
2796 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2797 || reg_mentioned_p (other, x))))
2799 rtx temp = gen_reg_rtx (GET_MODE (x));
2800 emit_move_insn (temp, x);
2806 /* Emission of insns (adding them to the doubly-linked list). */
2808 /* Return the first insn of the current sequence or current function. */
2816 /* Specify a new insn as the first in the chain. */
2819 set_first_insn (rtx insn)
2821 if (PREV_INSN (insn) != 0)
2826 /* Return the last insn emitted in current sequence or current function. */
2829 get_last_insn (void)
2834 /* Specify a new insn as the last in the chain. */
2837 set_last_insn (rtx insn)
2839 if (NEXT_INSN (insn) != 0)
2844 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2847 get_last_insn_anywhere (void)
2849 struct sequence_stack *stack;
2852 for (stack = seq_stack; stack; stack = stack->next)
2853 if (stack->last != 0)
2858 /* Return the first nonnote insn emitted in current sequence or current
2859 function. This routine looks inside SEQUENCEs. */
2862 get_first_nonnote_insn (void)
2864 rtx insn = first_insn;
2868 insn = next_insn (insn);
2869 if (insn == 0 || GET_CODE (insn) != NOTE)
2876 /* Return the last nonnote insn emitted in current sequence or current
2877 function. This routine looks inside SEQUENCEs. */
2880 get_last_nonnote_insn (void)
2882 rtx insn = last_insn;
2886 insn = previous_insn (insn);
2887 if (insn == 0 || GET_CODE (insn) != NOTE)
2894 /* Return a number larger than any instruction's uid in this function. */
2899 return cur_insn_uid;
2902 /* Renumber instructions so that no instruction UIDs are wasted. */
2905 renumber_insns (FILE *stream)
2909 /* If we're not supposed to renumber instructions, don't. */
2910 if (!flag_renumber_insns)
2913 /* If there aren't that many instructions, then it's not really
2914 worth renumbering them. */
2915 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2920 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2923 fprintf (stream, "Renumbering insn %d to %d\n",
2924 INSN_UID (insn), cur_insn_uid);
2925 INSN_UID (insn) = cur_insn_uid++;
2929 /* Return the next insn. If it is a SEQUENCE, return the first insn
2933 next_insn (rtx insn)
2937 insn = NEXT_INSN (insn);
2938 if (insn && GET_CODE (insn) == INSN
2939 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2940 insn = XVECEXP (PATTERN (insn), 0, 0);
2946 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2950 previous_insn (rtx insn)
2954 insn = PREV_INSN (insn);
2955 if (insn && GET_CODE (insn) == INSN
2956 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2957 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2963 /* Return the next insn after INSN that is not a NOTE. This routine does not
2964 look inside SEQUENCEs. */
2967 next_nonnote_insn (rtx insn)
2971 insn = NEXT_INSN (insn);
2972 if (insn == 0 || GET_CODE (insn) != NOTE)
2979 /* Return the previous insn before INSN that is not a NOTE. This routine does
2980 not look inside SEQUENCEs. */
2983 prev_nonnote_insn (rtx insn)
2987 insn = PREV_INSN (insn);
2988 if (insn == 0 || GET_CODE (insn) != NOTE)
2995 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2996 or 0, if there is none. This routine does not look inside
3000 next_real_insn (rtx insn)
3004 insn = NEXT_INSN (insn);
3005 if (insn == 0 || INSN_P (insn))
3012 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3013 or 0, if there is none. This routine does not look inside
3017 prev_real_insn (rtx insn)
3021 insn = PREV_INSN (insn);
3022 if (insn == 0 || INSN_P (insn))
3029 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3030 This routine does not look inside SEQUENCEs. */
3033 last_call_insn (void)
3037 for (insn = get_last_insn ();
3038 insn && GET_CODE (insn) != CALL_INSN;
3039 insn = PREV_INSN (insn))
3045 /* Find the next insn after INSN that really does something. This routine
3046 does not look inside SEQUENCEs. Until reload has completed, this is the
3047 same as next_real_insn. */
3050 active_insn_p (rtx insn)
3052 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3053 || (GET_CODE (insn) == INSN
3054 && (! reload_completed
3055 || (GET_CODE (PATTERN (insn)) != USE
3056 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3060 next_active_insn (rtx insn)
3064 insn = NEXT_INSN (insn);
3065 if (insn == 0 || active_insn_p (insn))
3072 /* Find the last insn before INSN that really does something. This routine
3073 does not look inside SEQUENCEs. Until reload has completed, this is the
3074 same as prev_real_insn. */
3077 prev_active_insn (rtx insn)
3081 insn = PREV_INSN (insn);
3082 if (insn == 0 || active_insn_p (insn))
3089 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3092 next_label (rtx insn)
3096 insn = NEXT_INSN (insn);
3097 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3104 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3107 prev_label (rtx insn)
3111 insn = PREV_INSN (insn);
3112 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3119 /* Return the last label to mark the same position as LABEL. Return null
3120 if LABEL itself is null. */
3123 skip_consecutive_labels (rtx label)
3127 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3135 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3136 and REG_CC_USER notes so we can find it. */
3139 link_cc0_insns (rtx insn)
3141 rtx user = next_nonnote_insn (insn);
3143 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3144 user = XVECEXP (PATTERN (user), 0, 0);
3146 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3148 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3151 /* Return the next insn that uses CC0 after INSN, which is assumed to
3152 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3153 applied to the result of this function should yield INSN).
3155 Normally, this is simply the next insn. However, if a REG_CC_USER note
3156 is present, it contains the insn that uses CC0.
3158 Return 0 if we can't find the insn. */
3161 next_cc0_user (rtx insn)
3163 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3166 return XEXP (note, 0);
3168 insn = next_nonnote_insn (insn);
3169 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3170 insn = XVECEXP (PATTERN (insn), 0, 0);
3172 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3178 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3179 note, it is the previous insn. */
3182 prev_cc0_setter (rtx insn)
3184 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3187 return XEXP (note, 0);
3189 insn = prev_nonnote_insn (insn);
3190 if (! sets_cc0_p (PATTERN (insn)))
3197 /* Increment the label uses for all labels present in rtx. */
3200 mark_label_nuses (rtx x)
3206 code = GET_CODE (x);
3207 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3208 LABEL_NUSES (XEXP (x, 0))++;
3210 fmt = GET_RTX_FORMAT (code);
3211 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3214 mark_label_nuses (XEXP (x, i));
3215 else if (fmt[i] == 'E')
3216 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3217 mark_label_nuses (XVECEXP (x, i, j));
3222 /* Try splitting insns that can be split for better scheduling.
3223 PAT is the pattern which might split.
3224 TRIAL is the insn providing PAT.
3225 LAST is nonzero if we should return the last insn of the sequence produced.
3227 If this routine succeeds in splitting, it returns the first or last
3228 replacement insn depending on the value of LAST. Otherwise, it
3229 returns TRIAL. If the insn to be returned can be split, it will be. */
3232 try_split (rtx pat, rtx trial, int last)
3234 rtx before = PREV_INSN (trial);
3235 rtx after = NEXT_INSN (trial);
3236 int has_barrier = 0;
3240 rtx insn_last, insn;
3243 if (any_condjump_p (trial)
3244 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3245 split_branch_probability = INTVAL (XEXP (note, 0));
3246 probability = split_branch_probability;
3248 seq = split_insns (pat, trial);
3250 split_branch_probability = -1;
3252 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3253 We may need to handle this specially. */
3254 if (after && GET_CODE (after) == BARRIER)
3257 after = NEXT_INSN (after);
3263 /* Avoid infinite loop if any insn of the result matches
3264 the original pattern. */
3268 if (INSN_P (insn_last)
3269 && rtx_equal_p (PATTERN (insn_last), pat))
3271 if (!NEXT_INSN (insn_last))
3273 insn_last = NEXT_INSN (insn_last);
3277 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3279 if (GET_CODE (insn) == JUMP_INSN)
3281 mark_jump_label (PATTERN (insn), insn, 0);
3283 if (probability != -1
3284 && any_condjump_p (insn)
3285 && !find_reg_note (insn, REG_BR_PROB, 0))
3287 /* We can preserve the REG_BR_PROB notes only if exactly
3288 one jump is created, otherwise the machine description
3289 is responsible for this step using
3290 split_branch_probability variable. */
3294 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3295 GEN_INT (probability),
3301 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3302 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3303 if (GET_CODE (trial) == CALL_INSN)
3305 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3306 if (GET_CODE (insn) == CALL_INSN)
3308 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3311 *p = CALL_INSN_FUNCTION_USAGE (trial);
3312 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3316 /* Copy notes, particularly those related to the CFG. */
3317 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3319 switch (REG_NOTE_KIND (note))
3323 while (insn != NULL_RTX)
3325 if (GET_CODE (insn) == CALL_INSN
3326 || (flag_non_call_exceptions
3327 && may_trap_p (PATTERN (insn))))
3329 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3332 insn = PREV_INSN (insn);
3338 case REG_ALWAYS_RETURN:
3340 while (insn != NULL_RTX)
3342 if (GET_CODE (insn) == CALL_INSN)
3344 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3347 insn = PREV_INSN (insn);
3351 case REG_NON_LOCAL_GOTO:
3353 while (insn != NULL_RTX)
3355 if (GET_CODE (insn) == JUMP_INSN)
3357 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3360 insn = PREV_INSN (insn);
3369 /* If there are LABELS inside the split insns increment the
3370 usage count so we don't delete the label. */
3371 if (GET_CODE (trial) == INSN)
3374 while (insn != NULL_RTX)
3376 if (GET_CODE (insn) == INSN)
3377 mark_label_nuses (PATTERN (insn));
3379 insn = PREV_INSN (insn);
3383 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3385 delete_insn (trial);
3387 emit_barrier_after (tem);
3389 /* Recursively call try_split for each new insn created; by the
3390 time control returns here that insn will be fully split, so
3391 set LAST and continue from the insn after the one returned.
3392 We can't use next_active_insn here since AFTER may be a note.
3393 Ignore deleted insns, which can be occur if not optimizing. */
3394 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3395 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3396 tem = try_split (PATTERN (tem), tem, 1);
3398 /* Return either the first or the last insn, depending on which was
3401 ? (after ? PREV_INSN (after) : last_insn)
3402 : NEXT_INSN (before);
3405 /* Make and return an INSN rtx, initializing all its slots.
3406 Store PATTERN in the pattern slots. */
3409 make_insn_raw (rtx pattern)
3413 insn = rtx_alloc (INSN);
3415 INSN_UID (insn) = cur_insn_uid++;
3416 PATTERN (insn) = pattern;
3417 INSN_CODE (insn) = -1;
3418 LOG_LINKS (insn) = NULL;
3419 REG_NOTES (insn) = NULL;
3420 INSN_LOCATOR (insn) = 0;
3421 BLOCK_FOR_INSN (insn) = NULL;
3423 #ifdef ENABLE_RTL_CHECKING
3426 && (returnjump_p (insn)
3427 || (GET_CODE (insn) == SET
3428 && SET_DEST (insn) == pc_rtx)))
3430 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3438 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3441 make_jump_insn_raw (rtx pattern)
3445 insn = rtx_alloc (JUMP_INSN);
3446 INSN_UID (insn) = cur_insn_uid++;
3448 PATTERN (insn) = pattern;
3449 INSN_CODE (insn) = -1;
3450 LOG_LINKS (insn) = NULL;
3451 REG_NOTES (insn) = NULL;
3452 JUMP_LABEL (insn) = NULL;
3453 INSN_LOCATOR (insn) = 0;
3454 BLOCK_FOR_INSN (insn) = NULL;
3459 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3462 make_call_insn_raw (rtx pattern)
3466 insn = rtx_alloc (CALL_INSN);
3467 INSN_UID (insn) = cur_insn_uid++;
3469 PATTERN (insn) = pattern;
3470 INSN_CODE (insn) = -1;
3471 LOG_LINKS (insn) = NULL;
3472 REG_NOTES (insn) = NULL;
3473 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3474 INSN_LOCATOR (insn) = 0;
3475 BLOCK_FOR_INSN (insn) = NULL;
3480 /* Add INSN to the end of the doubly-linked list.
3481 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3486 PREV_INSN (insn) = last_insn;
3487 NEXT_INSN (insn) = 0;
3489 if (NULL != last_insn)
3490 NEXT_INSN (last_insn) = insn;
3492 if (NULL == first_insn)
3498 /* Add INSN into the doubly-linked list after insn AFTER. This and
3499 the next should be the only functions called to insert an insn once
3500 delay slots have been filled since only they know how to update a
3504 add_insn_after (rtx insn, rtx after)
3506 rtx next = NEXT_INSN (after);
3509 if (optimize && INSN_DELETED_P (after))
3512 NEXT_INSN (insn) = next;
3513 PREV_INSN (insn) = after;
3517 PREV_INSN (next) = insn;
3518 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3519 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3521 else if (last_insn == after)
3525 struct sequence_stack *stack = seq_stack;
3526 /* Scan all pending sequences too. */
3527 for (; stack; stack = stack->next)
3528 if (after == stack->last)
3538 if (GET_CODE (after) != BARRIER
3539 && GET_CODE (insn) != BARRIER
3540 && (bb = BLOCK_FOR_INSN (after)))
3542 set_block_for_insn (insn, bb);
3544 bb->flags |= BB_DIRTY;
3545 /* Should not happen as first in the BB is always
3546 either NOTE or LABEL. */
3547 if (BB_END (bb) == after
3548 /* Avoid clobbering of structure when creating new BB. */
3549 && GET_CODE (insn) != BARRIER
3550 && (GET_CODE (insn) != NOTE
3551 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3555 NEXT_INSN (after) = insn;
3556 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3558 rtx sequence = PATTERN (after);
3559 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3563 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3564 the previous should be the only functions called to insert an insn once
3565 delay slots have been filled since only they know how to update a
3569 add_insn_before (rtx insn, rtx before)
3571 rtx prev = PREV_INSN (before);
3574 if (optimize && INSN_DELETED_P (before))
3577 PREV_INSN (insn) = prev;
3578 NEXT_INSN (insn) = before;
3582 NEXT_INSN (prev) = insn;
3583 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3585 rtx sequence = PATTERN (prev);
3586 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3589 else if (first_insn == before)
3593 struct sequence_stack *stack = seq_stack;
3594 /* Scan all pending sequences too. */
3595 for (; stack; stack = stack->next)
3596 if (before == stack->first)
3598 stack->first = insn;
3606 if (GET_CODE (before) != BARRIER
3607 && GET_CODE (insn) != BARRIER
3608 && (bb = BLOCK_FOR_INSN (before)))
3610 set_block_for_insn (insn, bb);
3612 bb->flags |= BB_DIRTY;
3613 /* Should not happen as first in the BB is always
3614 either NOTE or LABEl. */
3615 if (BB_HEAD (bb) == insn
3616 /* Avoid clobbering of structure when creating new BB. */
3617 && GET_CODE (insn) != BARRIER
3618 && (GET_CODE (insn) != NOTE
3619 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3623 PREV_INSN (before) = insn;
3624 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3625 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3628 /* Remove an insn from its doubly-linked list. This function knows how
3629 to handle sequences. */
3631 remove_insn (rtx insn)
3633 rtx next = NEXT_INSN (insn);
3634 rtx prev = PREV_INSN (insn);
3639 NEXT_INSN (prev) = next;
3640 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3642 rtx sequence = PATTERN (prev);
3643 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3646 else if (first_insn == insn)
3650 struct sequence_stack *stack = seq_stack;
3651 /* Scan all pending sequences too. */
3652 for (; stack; stack = stack->next)
3653 if (insn == stack->first)
3655 stack->first = next;
3665 PREV_INSN (next) = prev;
3666 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3667 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3669 else if (last_insn == insn)
3673 struct sequence_stack *stack = seq_stack;
3674 /* Scan all pending sequences too. */
3675 for (; stack; stack = stack->next)
3676 if (insn == stack->last)
3685 if (GET_CODE (insn) != BARRIER
3686 && (bb = BLOCK_FOR_INSN (insn)))
3689 bb->flags |= BB_DIRTY;
3690 if (BB_HEAD (bb) == insn)
3692 /* Never ever delete the basic block note without deleting whole
3694 if (GET_CODE (insn) == NOTE)
3696 BB_HEAD (bb) = next;
3698 if (BB_END (bb) == insn)
3703 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3706 add_function_usage_to (rtx call_insn, rtx call_fusage)
3708 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3711 /* Put the register usage information on the CALL. If there is already
3712 some usage information, put ours at the end. */
3713 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3717 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3718 link = XEXP (link, 1))
3721 XEXP (link, 1) = call_fusage;
3724 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3727 /* Delete all insns made since FROM.
3728 FROM becomes the new last instruction. */
3731 delete_insns_since (rtx from)
3736 NEXT_INSN (from) = 0;
3740 /* This function is deprecated, please use sequences instead.
3742 Move a consecutive bunch of insns to a different place in the chain.
3743 The insns to be moved are those between FROM and TO.
3744 They are moved to a new position after the insn AFTER.
3745 AFTER must not be FROM or TO or any insn in between.
3747 This function does not know about SEQUENCEs and hence should not be
3748 called after delay-slot filling has been done. */
3751 reorder_insns_nobb (rtx from, rtx to, rtx after)
3753 /* Splice this bunch out of where it is now. */
3754 if (PREV_INSN (from))
3755 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3757 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3758 if (last_insn == to)
3759 last_insn = PREV_INSN (from);
3760 if (first_insn == from)
3761 first_insn = NEXT_INSN (to);
3763 /* Make the new neighbors point to it and it to them. */
3764 if (NEXT_INSN (after))
3765 PREV_INSN (NEXT_INSN (after)) = to;
3767 NEXT_INSN (to) = NEXT_INSN (after);
3768 PREV_INSN (from) = after;
3769 NEXT_INSN (after) = from;
3770 if (after == last_insn)
3774 /* Same as function above, but take care to update BB boundaries. */
3776 reorder_insns (rtx from, rtx to, rtx after)
3778 rtx prev = PREV_INSN (from);
3779 basic_block bb, bb2;
3781 reorder_insns_nobb (from, to, after);
3783 if (GET_CODE (after) != BARRIER
3784 && (bb = BLOCK_FOR_INSN (after)))
3787 bb->flags |= BB_DIRTY;
3789 if (GET_CODE (from) != BARRIER
3790 && (bb2 = BLOCK_FOR_INSN (from)))
3792 if (BB_END (bb2) == to)
3793 BB_END (bb2) = prev;
3794 bb2->flags |= BB_DIRTY;
3797 if (BB_END (bb) == after)
3800 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3801 set_block_for_insn (x, bb);
3805 /* Return the line note insn preceding INSN. */
3808 find_line_note (rtx insn)
3810 if (no_line_numbers)
3813 for (; insn; insn = PREV_INSN (insn))
3814 if (GET_CODE (insn) == NOTE
3815 && NOTE_LINE_NUMBER (insn) >= 0)
3821 /* Remove unnecessary notes from the instruction stream. */
3824 remove_unnecessary_notes (void)
3826 rtx block_stack = NULL_RTX;
3827 rtx eh_stack = NULL_RTX;
3832 /* We must not remove the first instruction in the function because
3833 the compiler depends on the first instruction being a note. */
3834 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3836 /* Remember what's next. */
3837 next = NEXT_INSN (insn);
3839 /* We're only interested in notes. */
3840 if (GET_CODE (insn) != NOTE)
3843 switch (NOTE_LINE_NUMBER (insn))
3845 case NOTE_INSN_DELETED:
3846 case NOTE_INSN_LOOP_END_TOP_COND:
3850 case NOTE_INSN_EH_REGION_BEG:
3851 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3854 case NOTE_INSN_EH_REGION_END:
3855 /* Too many end notes. */
3856 if (eh_stack == NULL_RTX)
3858 /* Mismatched nesting. */
3859 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3862 eh_stack = XEXP (eh_stack, 1);
3863 free_INSN_LIST_node (tmp);
3866 case NOTE_INSN_BLOCK_BEG:
3867 /* By now, all notes indicating lexical blocks should have
3868 NOTE_BLOCK filled in. */
3869 if (NOTE_BLOCK (insn) == NULL_TREE)
3871 block_stack = alloc_INSN_LIST (insn, block_stack);
3874 case NOTE_INSN_BLOCK_END:
3875 /* Too many end notes. */
3876 if (block_stack == NULL_RTX)
3878 /* Mismatched nesting. */
3879 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3882 block_stack = XEXP (block_stack, 1);
3883 free_INSN_LIST_node (tmp);
3885 /* Scan back to see if there are any non-note instructions
3886 between INSN and the beginning of this block. If not,
3887 then there is no PC range in the generated code that will
3888 actually be in this block, so there's no point in
3889 remembering the existence of the block. */
3890 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3892 /* This block contains a real instruction. Note that we
3893 don't include labels; if the only thing in the block
3894 is a label, then there are still no PC values that
3895 lie within the block. */
3899 /* We're only interested in NOTEs. */
3900 if (GET_CODE (tmp) != NOTE)
3903 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3905 /* We just verified that this BLOCK matches us with
3906 the block_stack check above. Never delete the
3907 BLOCK for the outermost scope of the function; we
3908 can refer to names from that scope even if the
3909 block notes are messed up. */
3910 if (! is_body_block (NOTE_BLOCK (insn))
3911 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3918 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3919 /* There's a nested block. We need to leave the
3920 current block in place since otherwise the debugger
3921 wouldn't be able to show symbols from our block in
3922 the nested block. */
3928 /* Too many begin notes. */
3929 if (block_stack || eh_stack)
3934 /* Emit insn(s) of given code and pattern
3935 at a specified place within the doubly-linked list.
3937 All of the emit_foo global entry points accept an object
3938 X which is either an insn list or a PATTERN of a single
3941 There are thus a few canonical ways to generate code and
3942 emit it at a specific place in the instruction stream. For
3943 example, consider the instruction named SPOT and the fact that
3944 we would like to emit some instructions before SPOT. We might
3948 ... emit the new instructions ...
3949 insns_head = get_insns ();
3952 emit_insn_before (insns_head, SPOT);
3954 It used to be common to generate SEQUENCE rtl instead, but that
3955 is a relic of the past which no longer occurs. The reason is that
3956 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3957 generated would almost certainly die right after it was created. */
3959 /* Make X be output before the instruction BEFORE. */
3962 emit_insn_before (rtx x, rtx before)
3967 #ifdef ENABLE_RTL_CHECKING
3968 if (before == NULL_RTX)
3975 switch (GET_CODE (x))
3986 rtx next = NEXT_INSN (insn);
3987 add_insn_before (insn, before);
3993 #ifdef ENABLE_RTL_CHECKING
4000 last = make_insn_raw (x);
4001 add_insn_before (last, before);
4008 /* Make an instruction with body X and code JUMP_INSN
4009 and output it before the instruction BEFORE. */
4012 emit_jump_insn_before (rtx x, rtx before)
4014 rtx insn, last = NULL_RTX;
4016 #ifdef ENABLE_RTL_CHECKING
4017 if (before == NULL_RTX)
4021 switch (GET_CODE (x))
4032 rtx next = NEXT_INSN (insn);
4033 add_insn_before (insn, before);
4039 #ifdef ENABLE_RTL_CHECKING
4046 last = make_jump_insn_raw (x);
4047 add_insn_before (last, before);
4054 /* Make an instruction with body X and code CALL_INSN
4055 and output it before the instruction BEFORE. */
4058 emit_call_insn_before (rtx x, rtx before)
4060 rtx last = NULL_RTX, insn;
4062 #ifdef ENABLE_RTL_CHECKING
4063 if (before == NULL_RTX)
4067 switch (GET_CODE (x))
4078 rtx next = NEXT_INSN (insn);
4079 add_insn_before (insn, before);
4085 #ifdef ENABLE_RTL_CHECKING
4092 last = make_call_insn_raw (x);
4093 add_insn_before (last, before);
4100 /* Make an insn of code BARRIER
4101 and output it before the insn BEFORE. */
4104 emit_barrier_before (rtx before)
4106 rtx insn = rtx_alloc (BARRIER);
4108 INSN_UID (insn) = cur_insn_uid++;
4110 add_insn_before (insn, before);
4114 /* Emit the label LABEL before the insn BEFORE. */
4117 emit_label_before (rtx label, rtx before)
4119 /* This can be called twice for the same label as a result of the
4120 confusion that follows a syntax error! So make it harmless. */
4121 if (INSN_UID (label) == 0)
4123 INSN_UID (label) = cur_insn_uid++;
4124 add_insn_before (label, before);
4130 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4133 emit_note_before (int subtype, rtx before)
4135 rtx note = rtx_alloc (NOTE);
4136 INSN_UID (note) = cur_insn_uid++;
4137 NOTE_SOURCE_FILE (note) = 0;
4138 NOTE_LINE_NUMBER (note) = subtype;
4139 BLOCK_FOR_INSN (note) = NULL;
4141 add_insn_before (note, before);
4145 /* Helper for emit_insn_after, handles lists of instructions
4148 static rtx emit_insn_after_1 (rtx, rtx);
4151 emit_insn_after_1 (rtx first, rtx after)
4157 if (GET_CODE (after) != BARRIER
4158 && (bb = BLOCK_FOR_INSN (after)))
4160 bb->flags |= BB_DIRTY;
4161 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4162 if (GET_CODE (last) != BARRIER)
4163 set_block_for_insn (last, bb);
4164 if (GET_CODE (last) != BARRIER)
4165 set_block_for_insn (last, bb);
4166 if (BB_END (bb) == after)
4170 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4173 after_after = NEXT_INSN (after);
4175 NEXT_INSN (after) = first;
4176 PREV_INSN (first) = after;
4177 NEXT_INSN (last) = after_after;
4179 PREV_INSN (after_after) = last;
4181 if (after == last_insn)
4186 /* Make X be output after the insn AFTER. */
4189 emit_insn_after (rtx x, rtx after)
4193 #ifdef ENABLE_RTL_CHECKING
4194 if (after == NULL_RTX)
4201 switch (GET_CODE (x))
4209 last = emit_insn_after_1 (x, after);
4212 #ifdef ENABLE_RTL_CHECKING
4219 last = make_insn_raw (x);
4220 add_insn_after (last, after);
4227 /* Similar to emit_insn_after, except that line notes are to be inserted so
4228 as to act as if this insn were at FROM. */
4231 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4233 rtx from_line = find_line_note (from);
4234 rtx after_line = find_line_note (after);
4235 rtx insn = emit_insn_after (x, after);
4238 emit_note_copy_after (from_line, after);
4241 emit_note_copy_after (after_line, insn);
4244 /* Make an insn of code JUMP_INSN with body X
4245 and output it after the insn AFTER. */
4248 emit_jump_insn_after (rtx x, rtx after)
4252 #ifdef ENABLE_RTL_CHECKING
4253 if (after == NULL_RTX)
4257 switch (GET_CODE (x))
4265 last = emit_insn_after_1 (x, after);
4268 #ifdef ENABLE_RTL_CHECKING
4275 last = make_jump_insn_raw (x);
4276 add_insn_after (last, after);
4283 /* Make an instruction with body X and code CALL_INSN
4284 and output it after the instruction AFTER. */
4287 emit_call_insn_after (rtx x, rtx after)
4291 #ifdef ENABLE_RTL_CHECKING
4292 if (after == NULL_RTX)
4296 switch (GET_CODE (x))
4304 last = emit_insn_after_1 (x, after);
4307 #ifdef ENABLE_RTL_CHECKING
4314 last = make_call_insn_raw (x);
4315 add_insn_after (last, after);
4322 /* Make an insn of code BARRIER
4323 and output it after the insn AFTER. */
4326 emit_barrier_after (rtx after)
4328 rtx insn = rtx_alloc (BARRIER);
4330 INSN_UID (insn) = cur_insn_uid++;
4332 add_insn_after (insn, after);
4336 /* Emit the label LABEL after the insn AFTER. */
4339 emit_label_after (rtx label, rtx after)
4341 /* This can be called twice for the same label
4342 as a result of the confusion that follows a syntax error!
4343 So make it harmless. */
4344 if (INSN_UID (label) == 0)
4346 INSN_UID (label) = cur_insn_uid++;
4347 add_insn_after (label, after);
4353 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4356 emit_note_after (int subtype, rtx after)
4358 rtx note = rtx_alloc (NOTE);
4359 INSN_UID (note) = cur_insn_uid++;
4360 NOTE_SOURCE_FILE (note) = 0;
4361 NOTE_LINE_NUMBER (note) = subtype;
4362 BLOCK_FOR_INSN (note) = NULL;
4363 add_insn_after (note, after);
4367 /* Emit a copy of note ORIG after the insn AFTER. */
4370 emit_note_copy_after (rtx orig, rtx after)
4374 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4380 note = rtx_alloc (NOTE);
4381 INSN_UID (note) = cur_insn_uid++;
4382 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4383 NOTE_DATA (note) = NOTE_DATA (orig);
4384 BLOCK_FOR_INSN (note) = NULL;
4385 add_insn_after (note, after);
4389 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4391 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4393 rtx last = emit_insn_after (pattern, after);
4395 if (pattern == NULL_RTX)
4398 after = NEXT_INSN (after);
4401 if (active_insn_p (after))
4402 INSN_LOCATOR (after) = loc;
4405 after = NEXT_INSN (after);
4410 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4412 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4414 rtx last = emit_jump_insn_after (pattern, after);
4416 if (pattern == NULL_RTX)
4419 after = NEXT_INSN (after);
4422 if (active_insn_p (after))
4423 INSN_LOCATOR (after) = loc;
4426 after = NEXT_INSN (after);
4431 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4433 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4435 rtx last = emit_call_insn_after (pattern, after);
4437 if (pattern == NULL_RTX)
4440 after = NEXT_INSN (after);
4443 if (active_insn_p (after))
4444 INSN_LOCATOR (after) = loc;
4447 after = NEXT_INSN (after);
4452 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4454 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4456 rtx first = PREV_INSN (before);
4457 rtx last = emit_insn_before (pattern, before);
4459 if (pattern == NULL_RTX)
4462 first = NEXT_INSN (first);
4465 if (active_insn_p (first))
4466 INSN_LOCATOR (first) = loc;
4469 first = NEXT_INSN (first);
4474 /* Take X and emit it at the end of the doubly-linked
4477 Returns the last insn emitted. */
4482 rtx last = last_insn;
4488 switch (GET_CODE (x))
4499 rtx next = NEXT_INSN (insn);
4506 #ifdef ENABLE_RTL_CHECKING
4513 last = make_insn_raw (x);
4521 /* Make an insn of code JUMP_INSN with pattern X
4522 and add it to the end of the doubly-linked list. */
4525 emit_jump_insn (rtx x)
4527 rtx last = NULL_RTX, insn;
4529 switch (GET_CODE (x))
4540 rtx next = NEXT_INSN (insn);
4547 #ifdef ENABLE_RTL_CHECKING
4554 last = make_jump_insn_raw (x);
4562 /* Make an insn of code CALL_INSN with pattern X
4563 and add it to the end of the doubly-linked list. */
4566 emit_call_insn (rtx x)
4570 switch (GET_CODE (x))
4578 insn = emit_insn (x);
4581 #ifdef ENABLE_RTL_CHECKING
4588 insn = make_call_insn_raw (x);
4596 /* Add the label LABEL to the end of the doubly-linked list. */
4599 emit_label (rtx label)
4601 /* This can be called twice for the same label
4602 as a result of the confusion that follows a syntax error!
4603 So make it harmless. */
4604 if (INSN_UID (label) == 0)
4606 INSN_UID (label) = cur_insn_uid++;
4612 /* Make an insn of code BARRIER
4613 and add it to the end of the doubly-linked list. */
4618 rtx barrier = rtx_alloc (BARRIER);
4619 INSN_UID (barrier) = cur_insn_uid++;
4624 /* Make line numbering NOTE insn for LOCATION add it to the end
4625 of the doubly-linked list, but only if line-numbers are desired for
4626 debugging info and it doesn't match the previous one. */
4629 emit_line_note (location_t location)
4633 set_file_and_line_for_stmt (location);
4635 if (location.file && last_location.file
4636 && !strcmp (location.file, last_location.file)
4637 && location.line == last_location.line)
4639 last_location = location;
4641 if (no_line_numbers)
4647 note = emit_note (location.line);
4648 NOTE_SOURCE_FILE (note) = location.file;
4653 /* Emit a copy of note ORIG. */
4656 emit_note_copy (rtx orig)
4660 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4666 note = rtx_alloc (NOTE);
4668 INSN_UID (note) = cur_insn_uid++;
4669 NOTE_DATA (note) = NOTE_DATA (orig);
4670 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4671 BLOCK_FOR_INSN (note) = NULL;
4677 /* Make an insn of code NOTE or type NOTE_NO
4678 and add it to the end of the doubly-linked list. */
4681 emit_note (int note_no)
4685 note = rtx_alloc (NOTE);
4686 INSN_UID (note) = cur_insn_uid++;
4687 NOTE_LINE_NUMBER (note) = note_no;
4688 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4689 BLOCK_FOR_INSN (note) = NULL;
4694 /* Cause next statement to emit a line note even if the line number
4698 force_next_line_note (void)
4700 last_location.line = -1;
4703 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4704 note of this type already exists, remove it first. */
4707 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4709 rtx note = find_reg_note (insn, kind, NULL_RTX);
4715 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4716 has multiple sets (some callers assume single_set
4717 means the insn only has one set, when in fact it
4718 means the insn only has one * useful * set). */
4719 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4726 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4727 It serves no useful purpose and breaks eliminate_regs. */
4728 if (GET_CODE (datum) == ASM_OPERANDS)
4738 XEXP (note, 0) = datum;
4742 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4743 return REG_NOTES (insn);
4746 /* Return an indication of which type of insn should have X as a body.
4747 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4750 classify_insn (rtx x)
4752 if (GET_CODE (x) == CODE_LABEL)
4754 if (GET_CODE (x) == CALL)
4756 if (GET_CODE (x) == RETURN)
4758 if (GET_CODE (x) == SET)
4760 if (SET_DEST (x) == pc_rtx)
4762 else if (GET_CODE (SET_SRC (x)) == CALL)
4767 if (GET_CODE (x) == PARALLEL)
4770 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4771 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4773 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4774 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4776 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4777 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4783 /* Emit the rtl pattern X as an appropriate kind of insn.
4784 If X is a label, it is simply added into the insn chain. */
4789 enum rtx_code code = classify_insn (x);
4791 if (code == CODE_LABEL)
4792 return emit_label (x);
4793 else if (code == INSN)
4794 return emit_insn (x);
4795 else if (code == JUMP_INSN)
4797 rtx insn = emit_jump_insn (x);
4798 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4799 return emit_barrier ();
4802 else if (code == CALL_INSN)
4803 return emit_call_insn (x);
4808 /* Space for free sequence stack entries. */
4809 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4811 /* Begin emitting insns to a sequence which can be packaged in an
4812 RTL_EXPR. If this sequence will contain something that might cause
4813 the compiler to pop arguments to function calls (because those
4814 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4815 details), use do_pending_stack_adjust before calling this function.
4816 That will ensure that the deferred pops are not accidentally
4817 emitted in the middle of this sequence. */
4820 start_sequence (void)
4822 struct sequence_stack *tem;
4824 if (free_sequence_stack != NULL)
4826 tem = free_sequence_stack;
4827 free_sequence_stack = tem->next;
4830 tem = ggc_alloc (sizeof (struct sequence_stack));
4832 tem->next = seq_stack;
4833 tem->first = first_insn;
4834 tem->last = last_insn;
4835 tem->sequence_rtl_expr = seq_rtl_expr;
4843 /* Similarly, but indicate that this sequence will be placed in T, an
4844 RTL_EXPR. See the documentation for start_sequence for more
4845 information about how to use this function. */
4848 start_sequence_for_rtl_expr (tree t)
4855 /* Set up the insn chain starting with FIRST as the current sequence,
4856 saving the previously current one. See the documentation for
4857 start_sequence for more information about how to use this function. */
4860 push_to_sequence (rtx first)
4866 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4872 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4875 push_to_full_sequence (rtx first, rtx last)
4880 /* We really should have the end of the insn chain here. */
4881 if (last && NEXT_INSN (last))
4885 /* Set up the outer-level insn chain
4886 as the current sequence, saving the previously current one. */
4889 push_topmost_sequence (void)
4891 struct sequence_stack *stack, *top = NULL;
4895 for (stack = seq_stack; stack; stack = stack->next)
4898 first_insn = top->first;
4899 last_insn = top->last;
4900 seq_rtl_expr = top->sequence_rtl_expr;
4903 /* After emitting to the outer-level insn chain, update the outer-level
4904 insn chain, and restore the previous saved state. */
4907 pop_topmost_sequence (void)
4909 struct sequence_stack *stack, *top = NULL;
4911 for (stack = seq_stack; stack; stack = stack->next)
4914 top->first = first_insn;
4915 top->last = last_insn;
4916 /* ??? Why don't we save seq_rtl_expr here? */
4921 /* After emitting to a sequence, restore previous saved state.
4923 To get the contents of the sequence just made, you must call
4924 `get_insns' *before* calling here.
4926 If the compiler might have deferred popping arguments while
4927 generating this sequence, and this sequence will not be immediately
4928 inserted into the instruction stream, use do_pending_stack_adjust
4929 before calling get_insns. That will ensure that the deferred
4930 pops are inserted into this sequence, and not into some random
4931 location in the instruction stream. See INHIBIT_DEFER_POP for more
4932 information about deferred popping of arguments. */
4937 struct sequence_stack *tem = seq_stack;
4939 first_insn = tem->first;
4940 last_insn = tem->last;
4941 seq_rtl_expr = tem->sequence_rtl_expr;
4942 seq_stack = tem->next;
4944 memset (tem, 0, sizeof (*tem));
4945 tem->next = free_sequence_stack;
4946 free_sequence_stack = tem;
4949 /* Return 1 if currently emitting into a sequence. */
4952 in_sequence_p (void)
4954 return seq_stack != 0;
4957 /* Put the various virtual registers into REGNO_REG_RTX. */
4960 init_virtual_regs (struct emit_status *es)
4962 rtx *ptr = es->x_regno_reg_rtx;
4963 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4964 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4965 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4966 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4967 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4971 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4972 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4973 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4974 static int copy_insn_n_scratches;
4976 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4977 copied an ASM_OPERANDS.
4978 In that case, it is the original input-operand vector. */
4979 static rtvec orig_asm_operands_vector;
4981 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4982 copied an ASM_OPERANDS.
4983 In that case, it is the copied input-operand vector. */
4984 static rtvec copy_asm_operands_vector;
4986 /* Likewise for the constraints vector. */
4987 static rtvec orig_asm_constraints_vector;
4988 static rtvec copy_asm_constraints_vector;
4990 /* Recursively create a new copy of an rtx for copy_insn.
4991 This function differs from copy_rtx in that it handles SCRATCHes and
4992 ASM_OPERANDs properly.
4993 Normally, this function is not used directly; use copy_insn as front end.
4994 However, you could first copy an insn pattern with copy_insn and then use
4995 this function afterwards to properly copy any REG_NOTEs containing
4999 copy_insn_1 (rtx orig)
5004 const char *format_ptr;
5006 code = GET_CODE (orig);
5022 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5027 for (i = 0; i < copy_insn_n_scratches; i++)
5028 if (copy_insn_scratch_in[i] == orig)
5029 return copy_insn_scratch_out[i];
5033 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5034 a LABEL_REF, it isn't sharable. */
5035 if (GET_CODE (XEXP (orig, 0)) == PLUS
5036 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5037 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5041 /* A MEM with a constant address is not sharable. The problem is that
5042 the constant address may need to be reloaded. If the mem is shared,
5043 then reloading one copy of this mem will cause all copies to appear
5044 to have been reloaded. */
5050 copy = rtx_alloc (code);
5052 /* Copy the various flags, and other information. We assume that
5053 all fields need copying, and then clear the fields that should
5054 not be copied. That is the sensible default behavior, and forces
5055 us to explicitly document why we are *not* copying a flag. */
5056 memcpy (copy, orig, RTX_HDR_SIZE);
5058 /* We do not copy the USED flag, which is used as a mark bit during
5059 walks over the RTL. */
5060 RTX_FLAG (copy, used) = 0;
5062 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5065 RTX_FLAG (copy, jump) = 0;
5066 RTX_FLAG (copy, call) = 0;
5067 RTX_FLAG (copy, frame_related) = 0;
5070 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5072 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5074 copy->u.fld[i] = orig->u.fld[i];
5075 switch (*format_ptr++)
5078 if (XEXP (orig, i) != NULL)
5079 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5084 if (XVEC (orig, i) == orig_asm_constraints_vector)
5085 XVEC (copy, i) = copy_asm_constraints_vector;
5086 else if (XVEC (orig, i) == orig_asm_operands_vector)
5087 XVEC (copy, i) = copy_asm_operands_vector;
5088 else if (XVEC (orig, i) != NULL)
5090 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5091 for (j = 0; j < XVECLEN (copy, i); j++)
5092 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5103 /* These are left unchanged. */
5111 if (code == SCRATCH)
5113 i = copy_insn_n_scratches++;
5114 if (i >= MAX_RECOG_OPERANDS)
5116 copy_insn_scratch_in[i] = orig;
5117 copy_insn_scratch_out[i] = copy;
5119 else if (code == ASM_OPERANDS)
5121 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5122 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5123 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5124 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5130 /* Create a new copy of an rtx.
5131 This function differs from copy_rtx in that it handles SCRATCHes and
5132 ASM_OPERANDs properly.
5133 INSN doesn't really have to be a full INSN; it could be just the
5136 copy_insn (rtx insn)
5138 copy_insn_n_scratches = 0;
5139 orig_asm_operands_vector = 0;
5140 orig_asm_constraints_vector = 0;
5141 copy_asm_operands_vector = 0;
5142 copy_asm_constraints_vector = 0;
5143 return copy_insn_1 (insn);
5146 /* Initialize data structures and variables in this file
5147 before generating rtl for each function. */
5152 struct function *f = cfun;
5154 f->emit = ggc_alloc (sizeof (struct emit_status));
5157 seq_rtl_expr = NULL;
5159 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5160 last_location.line = 0;
5161 last_location.file = 0;
5162 first_label_num = label_num;
5166 /* Init the tables that describe all the pseudo regs. */
5168 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5170 f->emit->regno_pointer_align
5171 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5172 * sizeof (unsigned char));
5175 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5177 /* Put copies of all the hard registers into regno_reg_rtx. */
5178 memcpy (regno_reg_rtx,
5179 static_regno_reg_rtx,
5180 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5182 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5183 init_virtual_regs (f->emit);
5185 /* Indicate that the virtual registers and stack locations are
5187 REG_POINTER (stack_pointer_rtx) = 1;
5188 REG_POINTER (frame_pointer_rtx) = 1;
5189 REG_POINTER (hard_frame_pointer_rtx) = 1;
5190 REG_POINTER (arg_pointer_rtx) = 1;
5192 REG_POINTER (virtual_incoming_args_rtx) = 1;
5193 REG_POINTER (virtual_stack_vars_rtx) = 1;
5194 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5195 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5196 REG_POINTER (virtual_cfa_rtx) = 1;
5198 #ifdef STACK_BOUNDARY
5199 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5200 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5201 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5202 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5204 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5205 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5206 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5207 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5208 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5211 #ifdef INIT_EXPANDERS
5216 /* Generate the constant 0. */
5219 gen_const_vector_0 (enum machine_mode mode)
5224 enum machine_mode inner;
5226 units = GET_MODE_NUNITS (mode);
5227 inner = GET_MODE_INNER (mode);
5229 v = rtvec_alloc (units);
5231 /* We need to call this function after we to set CONST0_RTX first. */
5232 if (!CONST0_RTX (inner))
5235 for (i = 0; i < units; ++i)
5236 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5238 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5242 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5243 all elements are zero. */
5245 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5247 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5250 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5251 if (RTVEC_ELT (v, i) != inner_zero)
5252 return gen_rtx_raw_CONST_VECTOR (mode, v);
5253 return CONST0_RTX (mode);
5256 /* Create some permanent unique rtl objects shared between all functions.
5257 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5260 init_emit_once (int line_numbers)
5263 enum machine_mode mode;
5264 enum machine_mode double_mode;
5266 /* We need reg_raw_mode, so initialize the modes now. */
5267 init_reg_modes_once ();
5269 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5271 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5272 const_int_htab_eq, NULL);
5274 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5275 const_double_htab_eq, NULL);
5277 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5278 mem_attrs_htab_eq, NULL);
5279 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5280 reg_attrs_htab_eq, NULL);
5282 no_line_numbers = ! line_numbers;
5284 /* Compute the word and byte modes. */
5286 byte_mode = VOIDmode;
5287 word_mode = VOIDmode;
5288 double_mode = VOIDmode;
5290 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5291 mode = GET_MODE_WIDER_MODE (mode))
5293 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5294 && byte_mode == VOIDmode)
5297 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5298 && word_mode == VOIDmode)
5302 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5303 mode = GET_MODE_WIDER_MODE (mode))
5305 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5306 && double_mode == VOIDmode)
5310 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5312 /* Assign register numbers to the globally defined register rtx.
5313 This must be done at runtime because the register number field
5314 is in a union and some compilers can't initialize unions. */
5316 pc_rtx = gen_rtx_PC (VOIDmode);
5317 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5318 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5319 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5320 if (hard_frame_pointer_rtx == 0)
5321 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5322 HARD_FRAME_POINTER_REGNUM);
5323 if (arg_pointer_rtx == 0)
5324 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5325 virtual_incoming_args_rtx =
5326 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5327 virtual_stack_vars_rtx =
5328 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5329 virtual_stack_dynamic_rtx =
5330 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5331 virtual_outgoing_args_rtx =
5332 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5333 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5335 /* Initialize RTL for commonly used hard registers. These are
5336 copied into regno_reg_rtx as we begin to compile each function. */
5337 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5338 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5340 #ifdef INIT_EXPANDERS
5341 /* This is to initialize {init|mark|free}_machine_status before the first
5342 call to push_function_context_to. This is needed by the Chill front
5343 end which calls push_function_context_to before the first call to
5344 init_function_start. */
5348 /* Create the unique rtx's for certain rtx codes and operand values. */
5350 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5351 tries to use these variables. */
5352 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5353 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5354 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5356 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5357 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5358 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5360 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5362 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5363 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5364 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5365 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5366 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5367 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5368 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5370 dconsthalf = dconst1;
5371 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5373 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5375 /* Initialize mathematical constants for constant folding builtins.
5376 These constants need to be given to at least 160 bits precision. */
5377 real_from_string (&dconstpi,
5378 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5379 real_from_string (&dconste,
5380 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5382 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5384 REAL_VALUE_TYPE *r =
5385 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5387 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5388 mode = GET_MODE_WIDER_MODE (mode))
5389 const_tiny_rtx[i][(int) mode] =
5390 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5392 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5394 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5395 mode = GET_MODE_WIDER_MODE (mode))
5396 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5398 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5400 mode = GET_MODE_WIDER_MODE (mode))
5401 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5404 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5406 mode = GET_MODE_WIDER_MODE (mode))
5407 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5409 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5411 mode = GET_MODE_WIDER_MODE (mode))
5412 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5414 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5415 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5416 const_tiny_rtx[0][i] = const0_rtx;
5418 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5419 if (STORE_FLAG_VALUE == 1)
5420 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5422 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5423 return_address_pointer_rtx
5424 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5427 #ifdef STATIC_CHAIN_REGNUM
5428 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5430 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5431 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5432 static_chain_incoming_rtx
5433 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5436 static_chain_incoming_rtx = static_chain_rtx;
5440 static_chain_rtx = STATIC_CHAIN;
5442 #ifdef STATIC_CHAIN_INCOMING
5443 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5445 static_chain_incoming_rtx = static_chain_rtx;
5449 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5450 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5453 /* Query and clear/ restore no_line_numbers. This is used by the
5454 switch / case handling in stmt.c to give proper line numbers in
5455 warnings about unreachable code. */
5458 force_line_numbers (void)
5460 int old = no_line_numbers;
5462 no_line_numbers = 0;
5464 force_next_line_note ();
5469 restore_line_number_status (int old_value)
5471 no_line_numbers = old_value;
5474 /* Produce exact duplicate of insn INSN after AFTER.
5475 Care updating of libcall regions if present. */
5478 emit_copy_of_insn_after (rtx insn, rtx after)
5481 rtx note1, note2, link;
5483 switch (GET_CODE (insn))
5486 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5490 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5494 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5495 if (CALL_INSN_FUNCTION_USAGE (insn))
5496 CALL_INSN_FUNCTION_USAGE (new)
5497 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5498 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5499 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5506 /* Update LABEL_NUSES. */
5507 mark_jump_label (PATTERN (new), new, 0);
5509 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5511 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5513 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5514 if (REG_NOTE_KIND (link) != REG_LABEL)
5516 if (GET_CODE (link) == EXPR_LIST)
5518 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5523 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5528 /* Fix the libcall sequences. */
5529 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5532 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5534 XEXP (note1, 0) = p;
5535 XEXP (note2, 0) = new;
5537 INSN_CODE (new) = INSN_CODE (insn);
5541 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5543 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5545 if (hard_reg_clobbers[mode][regno])
5546 return hard_reg_clobbers[mode][regno];
5548 return (hard_reg_clobbers[mode][regno] =
5549 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5552 #include "gt-emit-rtl.h"