1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains the functions `gen_rtx', `gen_reg_rtx'
24 and `gen_label_rtx' that are the usual ways of creating rtl
25 expressions for most purposes.
27 It also has the functions for creating insns and linking
28 them in the doubly-linked chain.
30 The patterns of the insns are created by machine-dependent
31 routines in insn-emit.c, which is generated automatically from
32 the machine description. These routines use `gen_rtx' to make
33 the individual rtx's of the pattern; what is machine dependent
34 is the kind of rtx's they make and what arguments they use. */
44 #include "insn-config.h"
47 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
48 After rtl generation, it is 1 plus the largest register number used. */
50 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
52 /* This is *not* reset after each function. It gives each CODE_LABEL
53 in the entire compilation a unique label number. */
55 static int label_num = 1;
57 /* Lowest label number in current function. */
59 static int first_label_num;
61 /* Highest label number in current function.
62 Zero means use the value of label_num instead.
63 This is nonzero only when belatedly compiling an inline function. */
65 static int last_label_num;
67 /* Value label_num had when set_new_first_and_last_label_number was called.
68 If label_num has not changed since then, last_label_num is valid. */
70 static int base_label_num;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these except perhaps the floating-point CONST_DOUBLEs
79 are unique; no other rtx-object will be equal to any of these. */
81 rtx pc_rtx; /* (PC) */
82 rtx cc0_rtx; /* (CC0) */
83 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
84 rtx const0_rtx; /* (CONST_INT 0) */
85 rtx const1_rtx; /* (CONST_INT 1) */
86 rtx const2_rtx; /* (CONST_INT 2) */
87 rtx constm1_rtx; /* (CONST_INT -1) */
88 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
96 REAL_VALUE_TYPE dconst0;
97 REAL_VALUE_TYPE dconst1;
98 REAL_VALUE_TYPE dconst2;
99 REAL_VALUE_TYPE dconstm1;
101 /* All references to the following fixed hard registers go through
102 these unique rtl objects. On machines where the frame-pointer and
103 arg-pointer are the same register, they use the same unique object.
105 After register allocation, other rtl objects which used to be pseudo-regs
106 may be clobbered to refer to the frame-pointer register.
107 But references that were originally to the frame-pointer can be
108 distinguished from the others because they contain frame_pointer_rtx.
110 In an inline procedure, the stack and frame pointer rtxs may not be
111 used for anything else. */
112 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
113 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
114 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
115 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
116 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
117 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
118 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
119 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
121 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
122 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
123 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
124 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
126 /* We make one copy of (const_int C) where C is in
127 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
128 to save space during the compilation and simplify comparisons of
131 #define MAX_SAVED_CONST_INT 64
133 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
135 /* The ends of the doubly-linked chain of rtl for the current function.
136 Both are reset to null at the start of rtl generation for the function.
138 start_sequence saves both of these on `sequence_stack' and then
139 starts a new, nested sequence of insns. */
141 static rtx first_insn = NULL;
142 static rtx last_insn = NULL;
144 /* INSN_UID for next insn emitted.
145 Reset to 1 for each function compiled. */
147 static int cur_insn_uid = 1;
149 /* Line number and source file of the last line-number NOTE emitted.
150 This is used to avoid generating duplicates. */
152 static int last_linenum = 0;
153 static char *last_filename = 0;
155 /* A vector indexed by pseudo reg number. The allocated length
156 of this vector is regno_pointer_flag_length. Since this
157 vector is needed during the expansion phase when the total
158 number of registers in the function is not yet known,
159 it is copied and made bigger when necessary. */
161 char *regno_pointer_flag;
162 int regno_pointer_flag_length;
164 /* Indexed by pseudo register number, gives the rtx for that pseudo.
165 Allocated in parallel with regno_pointer_flag. */
169 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
170 Each element describes one pending sequence.
171 The main insn-chain is saved in the last element of the chain,
172 unless the chain is empty. */
174 struct sequence_stack *sequence_stack;
176 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
177 shortly thrown away. We use two mechanisms to prevent this waste:
179 First, we keep a list of the expressions used to represent the sequence
180 stack in sequence_element_free_list.
182 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
183 rtvec for use by gen_sequence. One entry for each size is sufficient
184 because most cases are calls to gen_sequence followed by immediately
185 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
186 destructive on the insn in it anyway and hence can't be redone.
188 We do not bother to save this cached data over nested function calls.
189 Instead, we just reinitialize them. */
191 #define SEQUENCE_RESULT_SIZE 5
193 static struct sequence_stack *sequence_element_free_list;
194 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
196 extern int rtx_equal_function_value_matters;
198 /* Filename and line number of last line-number note,
199 whether we actually emitted it or not. */
200 extern char *emit_filename;
201 extern int emit_lineno;
203 rtx change_address ();
206 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
208 ** This routine generates an RTX of the size specified by
209 ** <code>, which is an RTX code. The RTX structure is initialized
210 ** from the arguments <element1> through <elementn>, which are
211 ** interpreted according to the specific RTX type's format. The
212 ** special machine mode associated with the rtx (if any) is specified
215 ** gen_rtx() can be invoked in a way which resembles the lisp-like
216 ** rtx it will generate. For example, the following rtx structure:
218 ** (plus:QI (mem:QI (reg:SI 1))
219 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
221 ** ...would be generated by the following C code:
223 ** gen_rtx (PLUS, QImode,
224 ** gen_rtx (MEM, QImode,
225 ** gen_rtx (REG, SImode, 1)),
226 ** gen_rtx (MEM, QImode,
227 ** gen_rtx (PLUS, SImode,
228 ** gen_rtx (REG, SImode, 2),
229 ** gen_rtx (REG, SImode, 3)))),
239 enum machine_mode mode;
240 register int i; /* Array indices... */
241 register char *fmt; /* Current rtx's format... */
242 register rtx rt_val; /* RTX to return to caller... */
245 code = va_arg (p, enum rtx_code);
246 mode = va_arg (p, enum machine_mode);
248 if (code == CONST_INT)
250 int arg = va_arg (p, int);
252 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
253 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
255 if (const_true_rtx && arg == STORE_FLAG_VALUE)
256 return const_true_rtx;
258 rt_val = rtx_alloc (code);
259 INTVAL (rt_val) = arg;
261 else if (code == REG)
263 int regno = va_arg (p, int);
265 /* In case the MD file explicitly references the frame pointer, have
266 all such references point to the same frame pointer. This is used
267 during frame pointer elimination to distinguish the explicit
268 references to these registers from pseudos that happened to be
271 If we have eliminated the frame pointer or arg pointer, we will
272 be using it as a normal register, for example as a spill register.
273 In such cases, we might be accessing it in a mode that is not
274 Pmode and therefore cannot use the pre-allocated rtx. */
276 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode)
277 return frame_pointer_rtx;
278 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
279 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode)
280 return arg_pointer_rtx;
282 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode)
283 return stack_pointer_rtx;
286 rt_val = rtx_alloc (code);
288 REGNO (rt_val) = regno;
294 rt_val = rtx_alloc (code); /* Allocate the storage space. */
295 rt_val->mode = mode; /* Store the machine mode... */
297 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
298 for (i = 0; i < GET_RTX_LENGTH (code); i++)
302 case '0': /* Unused field. */
305 case 'i': /* An integer? */
306 XINT (rt_val, i) = va_arg (p, int);
309 case 's': /* A string? */
310 XSTR (rt_val, i) = va_arg (p, char *);
313 case 'e': /* An expression? */
314 case 'u': /* An insn? Same except when printing. */
315 XEXP (rt_val, i) = va_arg (p, rtx);
318 case 'E': /* An RTX vector? */
319 XVEC (rt_val, i) = va_arg (p, rtvec);
328 return rt_val; /* Return the new RTX... */
331 /* gen_rtvec (n, [rt1, ..., rtn])
333 ** This routine creates an rtvec and stores within it the
334 ** pointers to rtx's which are its arguments.
350 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
352 vector = (rtx *) alloca (n * sizeof (rtx));
353 for (i = 0; i < n; i++)
354 vector[i] = va_arg (p, rtx);
357 return gen_rtvec_v (n, vector);
361 gen_rtvec_v (n, argp)
366 register rtvec rt_val;
369 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
371 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
373 for (i = 0; i < n; i++)
374 rt_val->elem[i].rtx = *argp++;
379 /* Generate a REG rtx for a new pseudo register of mode MODE.
380 This pseudo is assigned the next sequential register number. */
384 enum machine_mode mode;
388 /* Don't let anything called by or after reload create new registers
389 (actually, registers can't be created after flow, but this is a good
392 if (reload_in_progress || reload_completed)
395 /* Make sure regno_pointer_flag and regno_reg_rtx are large
396 enough to have an element for this pseudo reg number. */
398 if (reg_rtx_no == regno_pointer_flag_length)
402 (char *) oballoc (regno_pointer_flag_length * 2);
403 bzero (new, regno_pointer_flag_length * 2);
404 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
405 regno_pointer_flag = new;
407 new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx));
408 bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx));
409 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
410 regno_reg_rtx = new1;
412 regno_pointer_flag_length *= 2;
415 val = gen_rtx (REG, mode, reg_rtx_no);
416 regno_reg_rtx[reg_rtx_no++] = val;
420 /* Identify REG as a probable pointer register. */
423 mark_reg_pointer (reg)
426 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
429 /* Return 1 plus largest pseudo reg number used in the current function. */
437 /* Return 1 + the largest label number used so far in the current function. */
442 if (last_label_num && label_num == base_label_num)
443 return last_label_num;
447 /* Return first label number used in this function (if any were used). */
450 get_first_label_num ()
452 return first_label_num;
455 /* Return a value representing some low-order bits of X, where the number
456 of low-order bits is given by MODE. Note that no conversion is done
457 between floating-point and fixed-point values, rather, the bit
458 representation is returned.
460 This function handles the cases in common between gen_lowpart, below,
461 and two variants in cse.c and combine.c. These are the cases that can
462 be safely handled at all points in the compilation.
464 If this is not a case we can handle, return 0. */
467 gen_lowpart_common (mode, x)
468 enum machine_mode mode;
473 if (GET_MODE (x) == mode)
476 /* MODE must occupy no more words than the mode of X. */
477 if (GET_MODE (x) != VOIDmode
478 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
479 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
483 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
484 word = ((GET_MODE_SIZE (GET_MODE (x))
485 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
488 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
489 && GET_MODE_CLASS (mode) == MODE_INT)
491 /* If we are getting the low-order part of something that has been
492 sign- or zero-extended, we can either just use the object being
493 extended or make a narrower extension. If we want an even smaller
494 piece than the size of the object being extended, call ourselves
497 This case is used mostly by combine and cse. */
499 if (GET_MODE (XEXP (x, 0)) == mode)
501 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
502 return gen_lowpart_common (mode, XEXP (x, 0));
503 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
504 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
506 else if (GET_CODE (x) == SUBREG
507 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
508 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
509 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
511 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
512 else if (GET_CODE (x) == REG)
514 /* If the register is not valid for MODE, return 0. If we don't
515 do this, there is no way to fix up the resulting REG later. */
516 if (REGNO (x) < FIRST_PSEUDO_REGISTER
517 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode))
519 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
520 /* integrate.c can't handle parts of a return value register. */
521 && (! REG_FUNCTION_VALUE_P (x)
522 || ! rtx_equal_function_value_matters))
523 return gen_rtx (REG, mode, REGNO (x) + word);
525 return gen_rtx (SUBREG, mode, x, word);
528 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
529 from the low-order part of the constant. */
530 else if (GET_MODE_CLASS (mode) == MODE_INT && GET_MODE (x) == VOIDmode
531 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
533 /* If MODE is twice the host word size, X is already the desired
534 representation. Otherwise, if MODE is wider than a word, we can't
535 do this. If MODE is exactly a word, return just one CONST_INT.
536 If MODE is smaller than a word, clear the bits that don't belong
537 in our mode, unless they and our sign bit are all one. So we get
538 either a reasonable negative value or a reasonable unsigned value
541 if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_INT)
543 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_INT)
545 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_INT)
546 return (GET_CODE (x) == CONST_INT ? x
547 : gen_rtx (CONST_INT, VOIDmode, CONST_DOUBLE_LOW (x)));
550 /* MODE must be narrower than HOST_BITS_PER_INT. */
551 int width = GET_MODE_BITSIZE (mode);
552 int val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
553 : CONST_DOUBLE_LOW (x));
555 if (((val & ((-1) << (width - 1))) != ((-1) << (width - 1))))
556 val &= (1 << width) - 1;
558 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
559 : gen_rtx (CONST_INT, VOIDmode, val));
563 /* Otherwise, we can't do this. */
567 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
568 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
569 least-significant part of X.
570 MODE specifies how big a part of X to return;
571 it usually should not be larger than a word.
572 If X is a MEM whose address is a QUEUED, the value may be so also. */
575 gen_lowpart (mode, x)
576 enum machine_mode mode;
579 rtx result = gen_lowpart_common (mode, x);
583 else if (GET_CODE (x) == MEM)
585 /* The only additional case we can do is MEM. */
586 register int offset = 0;
587 if (WORDS_BIG_ENDIAN)
588 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
589 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
591 if (BYTES_BIG_ENDIAN)
592 /* Adjust the address so that the address-after-the-data
594 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
595 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
597 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
603 /* Return 1 iff X, assumed to be a SUBREG,
604 refers to the least significant part of its containing reg.
605 If X is not a SUBREG, always return 1 (it is its own low part!). */
611 if (GET_CODE (x) != SUBREG)
615 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
616 return (SUBREG_WORD (x)
617 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
618 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
621 return SUBREG_WORD (x) == 0;
624 /* Return subword I of operand OP.
625 The word number, I, is interpreted as the word number starting at the
626 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
627 otherwise it is the high-order word.
629 If we cannot extract the required word, we return zero. Otherwise, an
630 rtx corresponding to the requested word will be returned.
632 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
633 reload has completed, a valid address will always be returned. After
634 reload, if a valid address cannot be returned, we return zero.
636 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
637 it is the responsibility of the caller.
639 MODE is the mode of OP in case it is a CONST_INT. */
642 operand_subword (op, i, validate_address, mode)
645 int validate_address;
646 enum machine_mode mode;
649 int size_ratio = HOST_BITS_PER_INT / BITS_PER_WORD;
651 if (mode == VOIDmode)
652 mode = GET_MODE (op);
654 if (mode == VOIDmode)
657 /* If OP is narrower than a word or if we want a word outside OP, fail. */
659 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
660 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
663 /* If OP is already an integer word, return it. */
664 if (GET_MODE_CLASS (mode) == MODE_INT
665 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
668 /* If OP is a REG or SUBREG, we can handle it very simply. */
669 if (GET_CODE (op) == REG)
671 /* If the register is not valid for MODE, return 0. If we don't
672 do this, there is no way to fix up the resulting REG later. */
673 if (REGNO (op) < FIRST_PSEUDO_REGISTER
674 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
676 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
677 || (REG_FUNCTION_VALUE_P (op)
678 && rtx_equal_function_value_matters))
679 return gen_rtx (SUBREG, word_mode, op, i);
681 return gen_rtx (REG, word_mode, REGNO (op) + i);
683 else if (GET_CODE (op) == SUBREG)
684 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
686 /* Form a new MEM at the requested address. */
687 if (GET_CODE (op) == MEM)
689 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
692 if (validate_address)
694 if (reload_completed)
696 if (! strict_memory_address_p (word_mode, addr))
700 addr = memory_address (word_mode, addr);
703 new = gen_rtx (MEM, word_mode, addr);
705 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
706 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
707 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
712 /* The only remaining cases are when OP is a constant. If the host and
713 target floating formats are the same, handling two-word floating
714 constants are easy. */
715 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
716 && HOST_BITS_PER_INT == BITS_PER_WORD)
717 || flag_pretend_float)
718 && GET_MODE_CLASS (mode) == MODE_FLOAT
719 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
720 && GET_CODE (op) == CONST_DOUBLE)
721 return gen_rtx (CONST_INT, VOIDmode,
722 i ^ (WORDS_BIG_ENDIAN !=
723 /* The constant is stored in the host's word-ordering,
724 but we want to access it in the target's word-ordering. */
725 #ifdef HOST_WORDS_BIG_ENDIAN
730 ) ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
732 /* Single word float is a little harder, since single- and double-word
733 values often do not have the same high-order bits. We have already
734 verified that we want the only defined word of the single-word value. */
735 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
736 && HOST_BITS_PER_INT == BITS_PER_WORD)
737 || flag_pretend_float)
738 && GET_MODE_CLASS (mode) == MODE_FLOAT
739 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
740 && GET_CODE (op) == CONST_DOUBLE)
743 union {float f; int i; } u;
745 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
748 return gen_rtx (CONST_INT, VOIDmode, u.i);
751 /* The only remaining cases that we can handle are integers.
752 Convert to proper endianness now since these cases need it.
753 At this point, i == 0 means the low-order word.
755 Note that it must be that BITS_PER_WORD <= HOST_BITS_PER_INT.
756 This is because if it were greater, it could only have been two
757 times greater since we do not support making wider constants. In
758 that case, it MODE would have already been the proper size and
759 it would have been handled above. This means we do not have to
760 worry about the case where we would be returning a CONST_DOUBLE. */
762 if (GET_MODE_CLASS (mode) != MODE_INT
763 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE))
766 if (WORDS_BIG_ENDIAN)
767 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
769 /* Find out which word on the host machine this value is in and get
770 it from the constant. */
771 val = (i / size_ratio == 0
772 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
773 : (GET_CODE (op) == CONST_INT
774 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
776 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
777 if (BITS_PER_WORD < HOST_BITS_PER_INT)
778 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
779 & ((1 << (BITS_PER_WORD % HOST_BITS_PER_INT)) - 1));
781 return gen_rtx (CONST_INT, VOIDmode, val);
784 /* Similar to `operand_subword', but never return 0. If we can't extract
785 the required subword, put OP into a register and try again. If that fails,
786 abort. We always validate the address in this case. It is not valid
787 to call this function after reload; it is mostly meant for RTL
790 MODE is the mode of OP, in case it is CONST_INT. */
793 operand_subword_force (op, i, mode)
796 enum machine_mode mode;
798 rtx result = operand_subword (op, i, 1, mode);
803 if (mode != BLKmode && mode != VOIDmode)
804 op = force_reg (mode, op);
806 result = operand_subword (op, i, 1, mode);
813 /* Given a compare instruction, swap the operands.
814 A test instruction is changed into a compare of 0 against the operand. */
817 reverse_comparison (insn)
820 rtx body = PATTERN (insn);
823 if (GET_CODE (body) == SET)
824 comp = SET_SRC (body);
826 comp = SET_SRC (XVECEXP (body, 0, 0));
828 if (GET_CODE (comp) == COMPARE)
830 rtx op0 = XEXP (comp, 0);
831 rtx op1 = XEXP (comp, 1);
832 XEXP (comp, 0) = op1;
833 XEXP (comp, 1) = op0;
837 rtx new = gen_rtx (COMPARE, VOIDmode,
838 CONST0_RTX (GET_MODE (comp)), comp);
839 if (GET_CODE (body) == SET)
840 SET_SRC (body) = new;
842 SET_SRC (XVECEXP (body, 0, 0)) = new;
846 /* Return a memory reference like MEMREF, but with its mode changed
847 to MODE and its address changed to ADDR.
848 (VOIDmode means don't change the mode.
849 NULL for ADDR means don't change the address.) */
852 change_address (memref, mode, addr)
854 enum machine_mode mode;
859 if (GET_CODE (memref) != MEM)
861 if (mode == VOIDmode)
862 mode = GET_MODE (memref);
864 addr = XEXP (memref, 0);
866 /* If reload is in progress or has completed, ADDR must be valid.
867 Otherwise, we can call memory_address to make it valid. */
868 if (reload_completed || reload_in_progress)
870 if (! memory_address_p (mode, addr))
874 addr = memory_address (mode, addr);
876 new = gen_rtx (MEM, mode, addr);
877 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
878 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
879 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
883 /* Return a newly created CODE_LABEL rtx with a unique label number. */
888 register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, label_num++, 0);
889 LABEL_NUSES (label) = 0;
893 /* For procedure integration. */
895 /* Return a newly created INLINE_HEADER rtx. Should allocate this
896 from a permanent obstack when the opportunity arises. */
899 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
900 last_labelno, max_parm_regnum, max_regnum, args_size,
901 pops_args, stack_slots, function_flags,
902 outgoing_args_size, original_arg_vector,
903 original_decl_initial)
904 rtx first_insn, first_parm_insn;
905 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
909 int outgoing_args_size;
910 rtvec original_arg_vector;
911 rtx original_decl_initial;
913 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
914 cur_insn_uid++, NULL,
915 first_insn, first_parm_insn,
916 first_labelno, last_labelno,
917 max_parm_regnum, max_regnum, args_size, pops_args,
918 stack_slots, function_flags, outgoing_args_size,
919 original_arg_vector, original_decl_initial);
923 /* Install new pointers to the first and last insns in the chain.
924 Used for an inline-procedure after copying the insn chain. */
927 set_new_first_and_last_insn (first, last)
934 /* Set the range of label numbers found in the current function.
935 This is used when belatedly compiling an inline function. */
938 set_new_first_and_last_label_num (first, last)
941 base_label_num = label_num;
942 first_label_num = first;
943 last_label_num = last;
946 /* Save all variables describing the current status into the structure *P.
947 This is used before starting a nested function. */
953 p->reg_rtx_no = reg_rtx_no;
954 p->first_label_num = first_label_num;
955 p->first_insn = first_insn;
956 p->last_insn = last_insn;
957 p->sequence_stack = sequence_stack;
958 p->cur_insn_uid = cur_insn_uid;
959 p->last_linenum = last_linenum;
960 p->last_filename = last_filename;
961 p->regno_pointer_flag = regno_pointer_flag;
962 p->regno_pointer_flag_length = regno_pointer_flag_length;
963 p->regno_reg_rtx = regno_reg_rtx;
966 /* Restore all variables describing the current status from the structure *P.
967 This is used after a nested function. */
970 restore_emit_status (p)
975 reg_rtx_no = p->reg_rtx_no;
976 first_label_num = p->first_label_num;
977 first_insn = p->first_insn;
978 last_insn = p->last_insn;
979 sequence_stack = p->sequence_stack;
980 cur_insn_uid = p->cur_insn_uid;
981 last_linenum = p->last_linenum;
982 last_filename = p->last_filename;
983 regno_pointer_flag = p->regno_pointer_flag;
984 regno_pointer_flag_length = p->regno_pointer_flag_length;
985 regno_reg_rtx = p->regno_reg_rtx;
987 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
988 sequence_element_free_list = 0;
989 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
990 sequence_result[i] = 0;
993 /* Go through all the RTL insn bodies and copy any invalid shared structure.
994 It does not work to do this twice, because the mark bits set here
995 are not cleared afterwards. */
998 unshare_all_rtl (insn)
1001 for (; insn; insn = NEXT_INSN (insn))
1002 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1003 || GET_CODE (insn) == CALL_INSN)
1005 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1006 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1007 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1010 /* Make sure the addresses of stack slots found outside the insn chain
1011 (such as, in DECL_RTL of a variable) are not shared
1012 with the insn chain.
1014 This special care is necessary when the stack slot MEM does not
1015 actually appear in the insn chain. If it does appear, its address
1016 is unshared from all else at that point. */
1018 copy_rtx_if_shared (stack_slot_list);
1021 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1022 Recursively does the same for subexpressions. */
1025 copy_rtx_if_shared (orig)
1028 register rtx x = orig;
1030 register enum rtx_code code;
1031 register char *format_ptr;
1037 code = GET_CODE (x);
1039 /* These types may be freely shared. */
1052 /* SCRATCH must be shared because they represent distinct values. */
1061 /* The chain of insns is not being copied. */
1065 /* A MEM is allowed to be shared if its address is constant
1066 or is a constant plus one of the special registers. */
1067 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1068 || XEXP (x, 0) == virtual_stack_vars_rtx
1069 || XEXP (x, 0) == virtual_incoming_args_rtx)
1072 if (GET_CODE (XEXP (x, 0)) == PLUS
1073 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1074 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1075 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1077 /* This MEM can appear in more than one place,
1078 but its address better not be shared with anything else. */
1080 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1086 /* This rtx may not be shared. If it has already been seen,
1087 replace it with a copy of itself. */
1093 copy = rtx_alloc (code);
1094 bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld)
1095 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1101 /* Now scan the subexpressions recursively.
1102 We can store any replaced subexpressions directly into X
1103 since we know X is not shared! Any vectors in X
1104 must be copied if X was copied. */
1106 format_ptr = GET_RTX_FORMAT (code);
1108 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1110 switch (*format_ptr++)
1113 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1117 if (XVEC (x, i) != NULL)
1122 XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0));
1123 for (j = 0; j < XVECLEN (x, i); j++)
1125 = copy_rtx_if_shared (XVECEXP (x, i, j));
1133 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1134 to look for shared sub-parts. */
1137 reset_used_flags (x)
1141 register enum rtx_code code;
1142 register char *format_ptr;
1148 code = GET_CODE (x);
1150 /* These types may be freely shared so we needn't do any reseting
1171 /* The chain of insns is not being copied. */
1177 format_ptr = GET_RTX_FORMAT (code);
1178 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1180 switch (*format_ptr++)
1183 reset_used_flags (XEXP (x, i));
1187 for (j = 0; j < XVECLEN (x, i); j++)
1188 reset_used_flags (XVECEXP (x, i, j));
1194 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1195 Return X or the rtx for the pseudo reg the value of X was copied into.
1196 OTHER must be valid as a SET_DEST. */
1199 make_safe_from (x, other)
1203 switch (GET_CODE (other))
1206 other = SUBREG_REG (other);
1208 case STRICT_LOW_PART:
1211 other = XEXP (other, 0);
1217 if ((GET_CODE (other) == MEM
1219 && GET_CODE (x) != REG
1220 && GET_CODE (x) != SUBREG)
1221 || (GET_CODE (other) == REG
1222 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1223 || reg_mentioned_p (other, x))))
1225 rtx temp = gen_reg_rtx (GET_MODE (x));
1226 emit_move_insn (temp, x);
1232 /* Emission of insns (adding them to the doubly-linked list). */
1234 /* Return the first insn of the current sequence or current function. */
1242 /* Return the last insn emitted in current sequence or current function. */
1250 /* Specify a new insn as the last in the chain. */
1253 set_last_insn (insn)
1256 if (NEXT_INSN (insn) != 0)
1261 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1264 get_last_insn_anywhere ()
1266 struct sequence_stack *stack;
1269 for (stack = sequence_stack; stack; stack = stack->next)
1270 if (stack->last != 0)
1275 /* Return a number larger than any instruction's uid in this function. */
1280 return cur_insn_uid;
1283 /* Return the next insn. If it is a SEQUENCE, return the first insn
1292 insn = NEXT_INSN (insn);
1293 if (insn && GET_CODE (insn) == INSN
1294 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1295 insn = XVECEXP (PATTERN (insn), 0, 0);
1301 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1305 previous_insn (insn)
1310 insn = PREV_INSN (insn);
1311 if (insn && GET_CODE (insn) == INSN
1312 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1313 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1319 /* Return the next insn after INSN that is not a NOTE. This routine does not
1320 look inside SEQUENCEs. */
1323 next_nonnote_insn (insn)
1328 insn = NEXT_INSN (insn);
1329 if (insn == 0 || GET_CODE (insn) != NOTE)
1336 /* Return the previous insn before INSN that is not a NOTE. This routine does
1337 not look inside SEQUENCEs. */
1340 prev_nonnote_insn (insn)
1345 insn = PREV_INSN (insn);
1346 if (insn == 0 || GET_CODE (insn) != NOTE)
1353 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1354 or 0, if there is none. This routine does not look inside
1358 next_real_insn (insn)
1363 insn = NEXT_INSN (insn);
1364 if (insn == 0 || GET_CODE (insn) == INSN
1365 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1372 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1373 or 0, if there is none. This routine does not look inside
1377 prev_real_insn (insn)
1382 insn = PREV_INSN (insn);
1383 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1384 || GET_CODE (insn) == JUMP_INSN)
1391 /* Find the next insn after INSN that really does something. This routine
1392 does not look inside SEQUENCEs. Until reload has completed, this is the
1393 same as next_real_insn. */
1396 next_active_insn (insn)
1401 insn = NEXT_INSN (insn);
1403 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1404 || (GET_CODE (insn) == INSN
1405 && (! reload_completed
1406 || (GET_CODE (PATTERN (insn)) != USE
1407 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1414 /* Find the last insn before INSN that really does something. This routine
1415 does not look inside SEQUENCEs. Until reload has completed, this is the
1416 same as prev_real_insn. */
1419 prev_active_insn (insn)
1424 insn = PREV_INSN (insn);
1426 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1427 || (GET_CODE (insn) == INSN
1428 && (! reload_completed
1429 || (GET_CODE (PATTERN (insn)) != USE
1430 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1437 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1445 insn = NEXT_INSN (insn);
1446 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1453 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1461 insn = PREV_INSN (insn);
1462 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1470 /* Return the next insn that uses CC0 after INSN, which is assumed to
1471 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1472 applied to the result of this function should yield INSN).
1474 Normally, this is simply the next insn. However, if a REG_CC_USER note
1475 is present, it contains the insn that uses CC0.
1477 Return 0 if we can't find the insn. */
1480 next_cc0_user (insn)
1483 rtx note = find_reg_note (insn, REG_CC_USER, 0);
1486 return XEXP (note, 0);
1488 insn = next_nonnote_insn (insn);
1489 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1490 insn = XVECEXP (PATTERN (insn), 0, 0);
1492 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1493 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
1499 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1500 note, it is the previous insn. */
1503 prev_cc0_setter (insn)
1506 rtx note = find_reg_note (insn, REG_CC_SETTER, 0);
1510 return XEXP (note, 0);
1512 insn = prev_nonnote_insn (insn);
1513 if (! sets_cc0_p (PATTERN (insn)))
1520 /* Try splitting insns that can be split for better scheduling.
1521 PAT is the pattern which might split.
1522 TRIAL is the insn providing PAT.
1523 BACKWARDS is non-zero if we are scanning insns from last to first.
1525 If this routine succeeds in splitting, it returns the first or last
1526 replacement insn depending on the value of BACKWARDS. Otherwise, it
1527 returns TRIAL. If the insn to be returned can be split, it will be. */
1530 try_split (pat, trial, backwards)
1534 rtx before = PREV_INSN (trial);
1535 rtx after = NEXT_INSN (trial);
1536 rtx seq = split_insns (pat, trial);
1537 int has_barrier = 0;
1540 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
1541 We may need to handle this specially. */
1542 if (after && GET_CODE (after) == BARRIER)
1545 after = NEXT_INSN (after);
1550 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
1551 The latter case will normally arise only when being done so that
1552 it, in turn, will be split (SFmode on the 29k is an example). */
1553 if (GET_CODE (seq) == SEQUENCE)
1555 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
1556 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
1557 increment the usage count so we don't delete the label. */
1560 if (GET_CODE (trial) == JUMP_INSN)
1561 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
1562 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
1564 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
1566 if (JUMP_LABEL (trial))
1567 LABEL_NUSES (JUMP_LABEL (trial))++;
1570 tem = emit_insn_after (seq, before);
1572 delete_insn (trial);
1574 emit_barrier_after (tem);
1576 /* Avoid infinite loop if the result matches the original pattern. */
1577 else if (rtx_equal_p (seq, pat))
1581 PATTERN (trial) = seq;
1582 INSN_CODE (trial) = -1;
1585 /* Set TEM to the insn we should return. */
1586 tem = backwards ? prev_active_insn (after) : next_active_insn (before);
1587 return try_split (PATTERN (tem), tem, backwards);
1593 /* Make and return an INSN rtx, initializing all its slots.
1594 Store PATTERN in the pattern slots.
1595 PAT_FORMALS is an idea that never really went anywhere. */
1598 make_insn_raw (pattern, pat_formals)
1604 insn = rtx_alloc(INSN);
1605 INSN_UID(insn) = cur_insn_uid++;
1607 PATTERN (insn) = pattern;
1608 INSN_CODE (insn) = -1;
1609 LOG_LINKS(insn) = NULL;
1610 REG_NOTES(insn) = NULL;
1615 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
1618 make_jump_insn_raw (pattern, pat_formals)
1624 insn = rtx_alloc(JUMP_INSN);
1625 INSN_UID(insn) = cur_insn_uid++;
1627 PATTERN (insn) = pattern;
1628 INSN_CODE (insn) = -1;
1629 LOG_LINKS(insn) = NULL;
1630 REG_NOTES(insn) = NULL;
1631 JUMP_LABEL(insn) = NULL;
1636 /* Add INSN to the end of the doubly-linked list.
1637 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
1643 PREV_INSN (insn) = last_insn;
1644 NEXT_INSN (insn) = 0;
1646 if (NULL != last_insn)
1647 NEXT_INSN (last_insn) = insn;
1649 if (NULL == first_insn)
1655 /* Add INSN into the doubly-linked list after insn AFTER. This should be the
1656 only function called to insert an insn once delay slots have been filled
1657 since only it knows how to update a SEQUENCE. */
1660 add_insn_after (insn, after)
1663 rtx next = NEXT_INSN (after);
1665 NEXT_INSN (insn) = next;
1666 PREV_INSN (insn) = after;
1670 PREV_INSN (next) = insn;
1671 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
1672 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
1674 else if (last_insn == after)
1678 struct sequence_stack *stack = sequence_stack;
1679 /* Scan all pending sequences too. */
1680 for (; stack; stack = stack->next)
1681 if (after == stack->last)
1685 NEXT_INSN (after) = insn;
1686 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
1688 rtx sequence = PATTERN (after);
1689 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
1693 /* Delete all insns made since FROM.
1694 FROM becomes the new last instruction. */
1697 delete_insns_since (from)
1703 NEXT_INSN (from) = 0;
1707 /* Move a consecutive bunch of insns to a different place in the chain.
1708 The insns to be moved are those between FROM and TO.
1709 They are moved to a new position after the insn AFTER.
1710 AFTER must not be FROM or TO or any insn in between.
1712 This function does not know about SEQUENCEs and hence should not be
1713 called after delay-slot filling has been done. */
1716 reorder_insns (from, to, after)
1717 rtx from, to, after;
1719 /* Splice this bunch out of where it is now. */
1720 if (PREV_INSN (from))
1721 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
1723 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
1724 if (last_insn == to)
1725 last_insn = PREV_INSN (from);
1726 if (first_insn == from)
1727 first_insn = NEXT_INSN (to);
1729 /* Make the new neighbors point to it and it to them. */
1730 if (NEXT_INSN (after))
1731 PREV_INSN (NEXT_INSN (after)) = to;
1733 NEXT_INSN (to) = NEXT_INSN (after);
1734 PREV_INSN (from) = after;
1735 NEXT_INSN (after) = from;
1736 if (after == last_insn)
1740 /* Return the line note insn preceding INSN. */
1743 find_line_note (insn)
1746 if (no_line_numbers)
1749 for (; insn; insn = PREV_INSN (insn))
1750 if (GET_CODE (insn) == NOTE
1751 && NOTE_LINE_NUMBER (insn) >= 0)
1757 /* Like reorder_insns, but inserts line notes to preserve the line numbers
1758 of the moved insns when debugging. This may insert a note between AFTER
1759 and FROM, and another one after TO. */
1762 reorder_insns_with_line_notes (from, to, after)
1763 rtx from, to, after;
1765 rtx from_line = find_line_note (from);
1766 rtx after_line = find_line_note (after);
1768 reorder_insns (from, to, after);
1770 if (from_line == after_line)
1774 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
1775 NOTE_LINE_NUMBER (from_line),
1778 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
1779 NOTE_LINE_NUMBER (after_line),
1783 /* Emit an insn of given code and pattern
1784 at a specified place within the doubly-linked list. */
1786 /* Make an instruction with body PATTERN
1787 and output it before the instruction BEFORE. */
1790 emit_insn_before (pattern, before)
1791 register rtx pattern, before;
1793 register rtx insn = before;
1795 if (GET_CODE (pattern) == SEQUENCE)
1799 for (i = 0; i < XVECLEN (pattern, 0); i++)
1801 insn = XVECEXP (pattern, 0, i);
1802 add_insn_after (insn, PREV_INSN (before));
1804 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
1805 sequence_result[XVECLEN (pattern, 0)] = pattern;
1809 insn = make_insn_raw (pattern, 0);
1810 add_insn_after (insn, PREV_INSN (before));
1816 /* Make an instruction with body PATTERN and code JUMP_INSN
1817 and output it before the instruction BEFORE. */
1820 emit_jump_insn_before (pattern, before)
1821 register rtx pattern, before;
1825 if (GET_CODE (pattern) == SEQUENCE)
1826 insn = emit_insn_before (pattern, before);
1829 insn = make_jump_insn_raw (pattern, 0);
1830 add_insn_after (insn, PREV_INSN (before));
1836 /* Make an instruction with body PATTERN and code CALL_INSN
1837 and output it before the instruction BEFORE. */
1840 emit_call_insn_before (pattern, before)
1841 register rtx pattern, before;
1843 rtx insn = emit_insn_before (pattern, before);
1844 PUT_CODE (insn, CALL_INSN);
1848 /* Make an insn of code BARRIER
1849 and output it before the insn AFTER. */
1852 emit_barrier_before (before)
1853 register rtx before;
1855 register rtx insn = rtx_alloc (BARRIER);
1857 INSN_UID (insn) = cur_insn_uid++;
1859 add_insn_after (insn, PREV_INSN (before));
1863 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
1866 emit_note_before (subtype, before)
1870 register rtx note = rtx_alloc (NOTE);
1871 INSN_UID (note) = cur_insn_uid++;
1872 NOTE_SOURCE_FILE (note) = 0;
1873 NOTE_LINE_NUMBER (note) = subtype;
1875 add_insn_after (note, PREV_INSN (before));
1879 /* Make an insn of code INSN with body PATTERN
1880 and output it after the insn AFTER. */
1883 emit_insn_after (pattern, after)
1884 register rtx pattern, after;
1886 register rtx insn = after;
1888 if (GET_CODE (pattern) == SEQUENCE)
1892 for (i = 0; i < XVECLEN (pattern, 0); i++)
1894 insn = XVECEXP (pattern, 0, i);
1895 add_insn_after (insn, after);
1898 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
1899 sequence_result[XVECLEN (pattern, 0)] = pattern;
1903 insn = make_insn_raw (pattern, 0);
1904 add_insn_after (insn, after);
1910 /* Make an insn of code JUMP_INSN with body PATTERN
1911 and output it after the insn AFTER. */
1914 emit_jump_insn_after (pattern, after)
1915 register rtx pattern, after;
1919 if (GET_CODE (pattern) == SEQUENCE)
1920 insn = emit_insn_after (pattern, after);
1923 insn = make_jump_insn_raw (pattern, 0);
1924 add_insn_after (insn, after);
1930 /* Make an insn of code BARRIER
1931 and output it after the insn AFTER. */
1934 emit_barrier_after (after)
1937 register rtx insn = rtx_alloc (BARRIER);
1939 INSN_UID (insn) = cur_insn_uid++;
1941 add_insn_after (insn, after);
1945 /* Emit the label LABEL after the insn AFTER. */
1948 emit_label_after (label, after)
1951 /* This can be called twice for the same label
1952 as a result of the confusion that follows a syntax error!
1953 So make it harmless. */
1954 if (INSN_UID (label) == 0)
1956 INSN_UID (label) = cur_insn_uid++;
1957 add_insn_after (label, after);
1963 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
1966 emit_note_after (subtype, after)
1970 register rtx note = rtx_alloc (NOTE);
1971 INSN_UID (note) = cur_insn_uid++;
1972 NOTE_SOURCE_FILE (note) = 0;
1973 NOTE_LINE_NUMBER (note) = subtype;
1974 add_insn_after (note, after);
1978 /* Emit a line note for FILE and LINE after the insn AFTER. */
1981 emit_line_note_after (file, line, after)
1988 if (no_line_numbers && line > 0)
1994 note = rtx_alloc (NOTE);
1995 INSN_UID (note) = cur_insn_uid++;
1996 NOTE_SOURCE_FILE (note) = file;
1997 NOTE_LINE_NUMBER (note) = line;
1998 add_insn_after (note, after);
2002 /* Make an insn of code INSN with pattern PATTERN
2003 and add it to the end of the doubly-linked list.
2004 If PATTERN is a SEQUENCE, take the elements of it
2005 and emit an insn for each element.
2007 Returns the last insn emitted. */
2013 rtx insn = last_insn;
2015 if (GET_CODE (pattern) == SEQUENCE)
2019 for (i = 0; i < XVECLEN (pattern, 0); i++)
2021 insn = XVECEXP (pattern, 0, i);
2024 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2025 sequence_result[XVECLEN (pattern, 0)] = pattern;
2029 insn = make_insn_raw (pattern, NULL);
2036 /* Emit the insns in a chain starting with INSN.
2037 Return the last insn emitted. */
2047 rtx next = NEXT_INSN (insn);
2056 /* Emit the insns in a chain starting with INSN and place them in front of
2057 the insn BEFORE. Return the last insn emitted. */
2060 emit_insns_before (insn, before)
2068 rtx next = NEXT_INSN (insn);
2069 add_insn_after (insn, PREV_INSN (before));
2077 /* Make an insn of code JUMP_INSN with pattern PATTERN
2078 and add it to the end of the doubly-linked list. */
2081 emit_jump_insn (pattern)
2084 if (GET_CODE (pattern) == SEQUENCE)
2085 return emit_insn (pattern);
2088 register rtx insn = make_jump_insn_raw (pattern, NULL);
2094 /* Make an insn of code CALL_INSN with pattern PATTERN
2095 and add it to the end of the doubly-linked list. */
2098 emit_call_insn (pattern)
2101 if (GET_CODE (pattern) == SEQUENCE)
2102 return emit_insn (pattern);
2105 register rtx insn = make_insn_raw (pattern, NULL);
2107 PUT_CODE (insn, CALL_INSN);
2112 /* Add the label LABEL to the end of the doubly-linked list. */
2118 /* This can be called twice for the same label
2119 as a result of the confusion that follows a syntax error!
2120 So make it harmless. */
2121 if (INSN_UID (label) == 0)
2123 INSN_UID (label) = cur_insn_uid++;
2129 /* Make an insn of code BARRIER
2130 and add it to the end of the doubly-linked list. */
2135 register rtx barrier = rtx_alloc (BARRIER);
2136 INSN_UID (barrier) = cur_insn_uid++;
2141 /* Make an insn of code NOTE
2142 with data-fields specified by FILE and LINE
2143 and add it to the end of the doubly-linked list,
2144 but only if line-numbers are desired for debugging info. */
2147 emit_line_note (file, line)
2151 emit_filename = file;
2155 if (no_line_numbers)
2159 return emit_note (file, line);
2162 /* Make an insn of code NOTE
2163 with data-fields specified by FILE and LINE
2164 and add it to the end of the doubly-linked list.
2165 If it is a line-number NOTE, omit it if it matches the previous one. */
2168 emit_note (file, line)
2176 if (file && last_filename && !strcmp (file, last_filename)
2177 && line == last_linenum)
2179 last_filename = file;
2180 last_linenum = line;
2183 if (no_line_numbers && line > 0)
2189 note = rtx_alloc (NOTE);
2190 INSN_UID (note) = cur_insn_uid++;
2191 NOTE_SOURCE_FILE (note) = file;
2192 NOTE_LINE_NUMBER (note) = line;
2197 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2200 emit_line_note_force (file, line)
2205 return emit_line_note (file, line);
2208 /* Cause next statement to emit a line note even if the line number
2209 has not changed. This is used at the beginning of a function. */
2212 force_next_line_note ()
2217 /* Return an indication of which type of insn should have X as a body.
2218 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2224 if (GET_CODE (x) == CODE_LABEL)
2226 if (GET_CODE (x) == CALL)
2228 if (GET_CODE (x) == RETURN)
2230 if (GET_CODE (x) == SET)
2232 if (SET_DEST (x) == pc_rtx)
2234 else if (GET_CODE (SET_SRC (x)) == CALL)
2239 if (GET_CODE (x) == PARALLEL)
2242 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2243 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2245 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2246 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2248 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2249 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2255 /* Emit the rtl pattern X as an appropriate kind of insn.
2256 If X is a label, it is simply added into the insn chain. */
2262 enum rtx_code code = classify_insn (x);
2264 if (code == CODE_LABEL)
2265 return emit_label (x);
2266 else if (code == INSN)
2267 return emit_insn (x);
2268 else if (code == JUMP_INSN)
2270 register rtx insn = emit_jump_insn (x);
2271 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2272 return emit_barrier ();
2275 else if (code == CALL_INSN)
2276 return emit_call_insn (x);
2281 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2286 struct sequence_stack *tem;
2288 if (sequence_element_free_list)
2290 /* Reuse a previously-saved struct sequence_stack. */
2291 tem = sequence_element_free_list;
2292 sequence_element_free_list = tem->next;
2295 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
2297 tem->next = sequence_stack;
2298 tem->first = first_insn;
2299 tem->last = last_insn;
2301 sequence_stack = tem;
2307 /* Set up the insn chain starting with FIRST
2308 as the current sequence, saving the previously current one. */
2311 push_to_sequence (first)
2318 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
2324 /* After emitting to a sequence, restore previous saved state.
2326 To get the contents of the sequence just made,
2327 you must call `gen_sequence' *before* calling here. */
2332 struct sequence_stack *tem = sequence_stack;
2334 first_insn = tem->first;
2335 last_insn = tem->last;
2336 sequence_stack = tem->next;
2338 tem->next = sequence_element_free_list;
2339 sequence_element_free_list = tem;
2342 /* Return 1 if currently emitting into a sequence. */
2347 return sequence_stack != 0;
2350 /* Generate a SEQUENCE rtx containing the insns already emitted
2351 to the current sequence.
2353 This is how the gen_... function from a DEFINE_EXPAND
2354 constructs the SEQUENCE that it returns. */
2365 /* Count the insns in the chain. */
2367 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
2370 /* If only one insn, return its pattern rather than a SEQUENCE.
2371 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
2372 the case of an empty list.) */
2374 && (GET_CODE (first_insn) == INSN
2375 || GET_CODE (first_insn) == JUMP_INSN
2376 || GET_CODE (first_insn) == CALL_INSN))
2377 return PATTERN (first_insn);
2379 /* Put them in a vector. See if we already have a SEQUENCE of the
2380 appropriate length around. */
2381 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
2382 sequence_result[len] = 0;
2385 /* Ensure that this rtl goes in saveable_obstack, since we may be
2387 int in_current_obstack = rtl_in_saveable_obstack ();
2388 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
2389 if (in_current_obstack)
2390 rtl_in_current_obstack ();
2393 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
2394 XVECEXP (result, 0, i) = tem;
2399 /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
2400 according to the chain of insns starting with FIRST.
2402 Also set cur_insn_uid to exceed the largest uid in that chain.
2404 This is used when an inline function's rtl is saved
2405 and passed to rest_of_compilation later. */
2407 static void restore_reg_data_1 ();
2410 restore_reg_data (first)
2415 register int max_uid = 0;
2417 for (insn = first; insn; insn = NEXT_INSN (insn))
2419 if (INSN_UID (insn) >= max_uid)
2420 max_uid = INSN_UID (insn);
2422 switch (GET_CODE (insn))
2432 restore_reg_data_1 (PATTERN (insn));
2437 /* Don't duplicate the uids already in use. */
2438 cur_insn_uid = max_uid + 1;
2440 /* If any regs are missing, make them up.
2442 ??? word_mode is not necessarily the right mode. Most likely these REGs
2443 are never used. At some point this should be checked. */
2445 for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++)
2446 if (regno_reg_rtx[i] == 0)
2447 regno_reg_rtx[i] = gen_rtx (REG, word_mode, i);
2451 restore_reg_data_1 (orig)
2454 register rtx x = orig;
2456 register enum rtx_code code;
2457 register char *format_ptr;
2459 code = GET_CODE (x);
2474 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
2476 /* Make sure regno_pointer_flag and regno_reg_rtx are large
2477 enough to have an element for this pseudo reg number. */
2478 if (REGNO (x) >= reg_rtx_no)
2480 reg_rtx_no = REGNO (x);
2482 if (reg_rtx_no >= regno_pointer_flag_length)
2484 int newlen = MAX (regno_pointer_flag_length * 2,
2487 char *new = (char *) oballoc (newlen);
2488 bzero (new, newlen);
2489 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
2491 new1 = (rtx *) oballoc (newlen * sizeof (rtx));
2492 bzero (new1, newlen * sizeof (rtx));
2493 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
2495 regno_pointer_flag = new;
2496 regno_reg_rtx = new1;
2497 regno_pointer_flag_length = newlen;
2501 regno_reg_rtx[REGNO (x)] = x;
2506 if (GET_CODE (XEXP (x, 0)) == REG)
2507 mark_reg_pointer (XEXP (x, 0));
2508 restore_reg_data_1 (XEXP (x, 0));
2512 /* Now scan the subexpressions recursively. */
2514 format_ptr = GET_RTX_FORMAT (code);
2516 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2518 switch (*format_ptr++)
2521 restore_reg_data_1 (XEXP (x, i));
2525 if (XVEC (x, i) != NULL)
2529 for (j = 0; j < XVECLEN (x, i); j++)
2530 restore_reg_data_1 (XVECEXP (x, i, j));
2537 /* Initialize data structures and variables in this file
2538 before generating rtl for each function. */
2548 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
2551 first_label_num = label_num;
2554 /* Clear the start_sequence/gen_sequence cache. */
2555 sequence_element_free_list = 0;
2556 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
2557 sequence_result[i] = 0;
2559 /* Init the tables that describe all the pseudo regs. */
2561 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
2564 = (char *) oballoc (regno_pointer_flag_length);
2565 bzero (regno_pointer_flag, regno_pointer_flag_length);
2568 = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx));
2569 bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
2571 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
2572 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
2573 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
2574 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
2575 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
2578 /* Create some permanent unique rtl objects shared between all functions.
2579 LINE_NUMBERS is nonzero if line numbers are to be generated. */
2582 init_emit_once (line_numbers)
2586 enum machine_mode mode;
2588 no_line_numbers = ! line_numbers;
2590 sequence_stack = NULL;
2592 /* Create the unique rtx's for certain rtx codes and operand values. */
2594 pc_rtx = gen_rtx (PC, VOIDmode);
2595 cc0_rtx = gen_rtx (CC0, VOIDmode);
2597 /* Don't use gen_rtx here since gen_rtx in this case
2598 tries to use these variables. */
2599 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
2601 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
2602 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
2603 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
2606 /* These four calls obtain some of the rtx expressions made above. */
2607 const0_rtx = gen_rtx (CONST_INT, VOIDmode, 0);
2608 const1_rtx = gen_rtx (CONST_INT, VOIDmode, 1);
2609 const2_rtx = gen_rtx (CONST_INT, VOIDmode, 2);
2610 constm1_rtx = gen_rtx (CONST_INT, VOIDmode, -1);
2612 /* This will usually be one of the above constants, but may be a new rtx. */
2613 const_true_rtx = gen_rtx (CONST_INT, VOIDmode, STORE_FLAG_VALUE);
2615 dconst0 = REAL_VALUE_ATOF ("0");
2616 dconst1 = REAL_VALUE_ATOF ("1");
2617 dconst2 = REAL_VALUE_ATOF ("2");
2618 dconstm1 = REAL_VALUE_ATOF ("-1");
2620 for (i = 0; i <= 2; i++)
2622 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
2623 mode = GET_MODE_WIDER_MODE (mode))
2625 rtx tem = rtx_alloc (CONST_DOUBLE);
2626 union real_extract u;
2628 bzero (&u, sizeof u); /* Zero any holes in a structure. */
2629 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
2631 bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u);
2632 CONST_DOUBLE_MEM (tem) = cc0_rtx;
2633 PUT_MODE (tem, mode);
2635 const_tiny_rtx[i][(int) mode] = tem;
2638 const_tiny_rtx[i][(int) VOIDmode] = gen_rtx (CONST_INT, VOIDmode, i);
2640 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2641 mode = GET_MODE_WIDER_MODE (mode))
2642 const_tiny_rtx[i][(int) mode] = gen_rtx (CONST_INT, VOIDmode, i);
2645 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
2646 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
2648 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
2649 arg_pointer_rtx = frame_pointer_rtx;
2650 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
2651 arg_pointer_rtx = stack_pointer_rtx;
2653 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
2655 /* Create the virtual registers. Do so here since the following objects
2656 might reference them. */
2658 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
2659 VIRTUAL_INCOMING_ARGS_REGNUM);
2660 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
2661 VIRTUAL_STACK_VARS_REGNUM);
2662 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
2663 VIRTUAL_STACK_DYNAMIC_REGNUM);
2664 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
2665 VIRTUAL_OUTGOING_ARGS_REGNUM);
2668 struct_value_rtx = STRUCT_VALUE;
2670 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
2673 #ifdef STRUCT_VALUE_INCOMING
2674 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
2676 #ifdef STRUCT_VALUE_INCOMING_REGNUM
2677 struct_value_incoming_rtx
2678 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
2680 struct_value_incoming_rtx = struct_value_rtx;
2684 #ifdef STATIC_CHAIN_REGNUM
2685 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
2687 #ifdef STATIC_CHAIN_INCOMING_REGNUM
2688 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
2689 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
2692 static_chain_incoming_rtx = static_chain_rtx;
2696 static_chain_rtx = STATIC_CHAIN;
2698 #ifdef STATIC_CHAIN_INCOMING
2699 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
2701 static_chain_incoming_rtx = static_chain_rtx;
2705 #ifdef PIC_OFFSET_TABLE_REGNUM
2706 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);