1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl[GR_MAX];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab;
147 /* A hash table storing memory attribute structures. */
148 static htab_t mem_attrs_htab;
150 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
151 shortly thrown away. We use two mechanisms to prevent this waste:
153 For sizes up to 5 elements, we keep a SEQUENCE and its associated
154 rtvec for use by gen_sequence. One entry for each size is
155 sufficient because most cases are calls to gen_sequence followed by
156 immediately emitting the SEQUENCE. Reuse is safe since emitting a
157 sequence is destructive on the insn in it anyway and hence can't be
160 We do not bother to save this cached data over nested function calls.
161 Instead, we just reinitialize them. */
163 #define SEQUENCE_RESULT_SIZE 5
165 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
167 /* During RTL generation, we also keep a list of free INSN rtl codes. */
168 static rtx free_insn;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_linenum (cfun->emit->x_last_linenum)
174 #define last_filename (cfun->emit->x_last_filename)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw PARAMS ((rtx));
178 static rtx make_call_insn_raw PARAMS ((rtx));
179 static rtx find_line_note PARAMS ((rtx));
180 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
181 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
183 static void unshare_all_rtl_1 PARAMS ((rtx));
184 static void unshare_all_decls PARAMS ((tree));
185 static void reset_used_decls PARAMS ((tree));
186 static void mark_label_nuses PARAMS ((rtx));
187 static hashval_t const_int_htab_hash PARAMS ((const void *));
188 static int const_int_htab_eq PARAMS ((const void *,
190 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
191 static int mem_attrs_htab_eq PARAMS ((const void *,
193 static void mem_attrs_mark PARAMS ((const void *));
194 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
197 /* Probability of the conditional branch currently proceeded by try_split.
198 Set to -1 otherwise. */
199 int split_branch_probability = -1;
201 /* Returns a hash code for X (which is a really a CONST_INT). */
204 const_int_htab_hash (x)
207 return (hashval_t) INTVAL ((const struct rtx_def *) x);
210 /* Returns non-zero if the value represented by X (which is really a
211 CONST_INT) is the same as that given by Y (which is really a
215 const_int_htab_eq (x, y)
219 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
222 /* Returns a hash code for X (which is a really a mem_attrs *). */
225 mem_attrs_htab_hash (x)
228 mem_attrs *p = (mem_attrs *) x;
230 return (p->alias ^ (p->align * 1000)
231 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
232 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
236 /* Returns non-zero if the value represented by X (which is really a
237 mem_attrs *) is the same as that given by Y (which is also really a
241 mem_attrs_htab_eq (x, y)
245 mem_attrs *p = (mem_attrs *) x;
246 mem_attrs *q = (mem_attrs *) y;
248 return (p->alias == q->alias && p->decl == q->decl && p->offset == q->offset
249 && p->size == q->size && p->align == q->align);
252 /* This routine is called when we determine that we need a mem_attrs entry.
253 It marks the associated decl and RTL as being used, if present. */
259 mem_attrs *p = (mem_attrs *) x;
262 ggc_mark_tree (p->decl);
265 ggc_mark_rtx (p->offset);
268 ggc_mark_rtx (p->size);
271 /* Allocate a new mem_attrs structure and insert it into the hash table if
272 one identical to it is not already in the table. */
275 get_mem_attrs (alias, decl, offset, size, align)
287 attrs.offset = offset;
291 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
294 *slot = ggc_alloc (sizeof (mem_attrs));
295 memcpy (*slot, &attrs, sizeof (mem_attrs));
301 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
302 don't attempt to share with the various global pieces of rtl (such as
303 frame_pointer_rtx). */
306 gen_raw_REG (mode, regno)
307 enum machine_mode mode;
310 rtx x = gen_rtx_raw_REG (mode, regno);
311 ORIGINAL_REGNO (x) = regno;
315 /* There are some RTL codes that require special attention; the generation
316 functions do the raw handling. If you add to this list, modify
317 special_rtx in gengenrtl.c as well. */
320 gen_rtx_CONST_INT (mode, arg)
321 enum machine_mode mode ATTRIBUTE_UNUSED;
326 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
327 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
329 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
330 if (const_true_rtx && arg == STORE_FLAG_VALUE)
331 return const_true_rtx;
334 /* Look up the CONST_INT in the hash table. */
335 slot = htab_find_slot_with_hash (const_int_htab, &arg,
336 (hashval_t) arg, INSERT);
338 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
343 /* CONST_DOUBLEs needs special handling because their length is known
347 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
348 enum machine_mode mode;
350 HOST_WIDE_INT arg1, arg2;
352 rtx r = rtx_alloc (CONST_DOUBLE);
357 X0EXP (r, 1) = NULL_RTX;
361 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
368 gen_rtx_REG (mode, regno)
369 enum machine_mode mode;
372 /* In case the MD file explicitly references the frame pointer, have
373 all such references point to the same frame pointer. This is
374 used during frame pointer elimination to distinguish the explicit
375 references to these registers from pseudos that happened to be
378 If we have eliminated the frame pointer or arg pointer, we will
379 be using it as a normal register, for example as a spill
380 register. In such cases, we might be accessing it in a mode that
381 is not Pmode and therefore cannot use the pre-allocated rtx.
383 Also don't do this when we are making new REGs in reload, since
384 we don't want to get confused with the real pointers. */
386 if (mode == Pmode && !reload_in_progress)
388 if (regno == FRAME_POINTER_REGNUM)
389 return frame_pointer_rtx;
390 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
391 if (regno == HARD_FRAME_POINTER_REGNUM)
392 return hard_frame_pointer_rtx;
394 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
395 if (regno == ARG_POINTER_REGNUM)
396 return arg_pointer_rtx;
398 #ifdef RETURN_ADDRESS_POINTER_REGNUM
399 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
400 return return_address_pointer_rtx;
402 if (regno == STACK_POINTER_REGNUM)
403 return stack_pointer_rtx;
406 return gen_raw_REG (mode, regno);
410 gen_rtx_MEM (mode, addr)
411 enum machine_mode mode;
414 rtx rt = gen_rtx_raw_MEM (mode, addr);
416 /* This field is not cleared by the mere allocation of the rtx, so
424 gen_rtx_SUBREG (mode, reg, offset)
425 enum machine_mode mode;
429 /* This is the most common failure type.
430 Catch it early so we can see who does it. */
431 if ((offset % GET_MODE_SIZE (mode)) != 0)
434 /* This check isn't usable right now because combine will
435 throw arbitrary crap like a CALL into a SUBREG in
436 gen_lowpart_for_combine so we must just eat it. */
438 /* Check for this too. */
439 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
442 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
445 /* Generate a SUBREG representing the least-significant part of REG if MODE
446 is smaller than mode of REG, otherwise paradoxical SUBREG. */
449 gen_lowpart_SUBREG (mode, reg)
450 enum machine_mode mode;
453 enum machine_mode inmode;
455 inmode = GET_MODE (reg);
456 if (inmode == VOIDmode)
458 return gen_rtx_SUBREG (mode, reg,
459 subreg_lowpart_offset (mode, inmode));
462 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
464 ** This routine generates an RTX of the size specified by
465 ** <code>, which is an RTX code. The RTX structure is initialized
466 ** from the arguments <element1> through <elementn>, which are
467 ** interpreted according to the specific RTX type's format. The
468 ** special machine mode associated with the rtx (if any) is specified
471 ** gen_rtx can be invoked in a way which resembles the lisp-like
472 ** rtx it will generate. For example, the following rtx structure:
474 ** (plus:QI (mem:QI (reg:SI 1))
475 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
477 ** ...would be generated by the following C code:
479 ** gen_rtx (PLUS, QImode,
480 ** gen_rtx (MEM, QImode,
481 ** gen_rtx (REG, SImode, 1)),
482 ** gen_rtx (MEM, QImode,
483 ** gen_rtx (PLUS, SImode,
484 ** gen_rtx (REG, SImode, 2),
485 ** gen_rtx (REG, SImode, 3)))),
490 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
492 int i; /* Array indices... */
493 const char *fmt; /* Current rtx's format... */
494 rtx rt_val; /* RTX to return to caller... */
497 VA_FIXEDARG (p, enum rtx_code, code);
498 VA_FIXEDARG (p, enum machine_mode, mode);
503 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
508 rtx arg0 = va_arg (p, rtx);
509 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
510 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
511 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
516 rt_val = gen_rtx_REG (mode, va_arg (p, int));
520 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
524 rt_val = rtx_alloc (code); /* Allocate the storage space. */
525 rt_val->mode = mode; /* Store the machine mode... */
527 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
528 for (i = 0; i < GET_RTX_LENGTH (code); i++)
532 case '0': /* Unused field. */
535 case 'i': /* An integer? */
536 XINT (rt_val, i) = va_arg (p, int);
539 case 'w': /* A wide integer? */
540 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
543 case 's': /* A string? */
544 XSTR (rt_val, i) = va_arg (p, char *);
547 case 'e': /* An expression? */
548 case 'u': /* An insn? Same except when printing. */
549 XEXP (rt_val, i) = va_arg (p, rtx);
552 case 'E': /* An RTX vector? */
553 XVEC (rt_val, i) = va_arg (p, rtvec);
556 case 'b': /* A bitmap? */
557 XBITMAP (rt_val, i) = va_arg (p, bitmap);
560 case 't': /* A tree? */
561 XTREE (rt_val, i) = va_arg (p, tree);
575 /* gen_rtvec (n, [rt1, ..., rtn])
577 ** This routine creates an rtvec and stores within it the
578 ** pointers to rtx's which are its arguments.
583 gen_rtvec VPARAMS ((int n, ...))
589 VA_FIXEDARG (p, int, n);
592 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
594 vector = (rtx *) alloca (n * sizeof (rtx));
596 for (i = 0; i < n; i++)
597 vector[i] = va_arg (p, rtx);
599 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
603 return gen_rtvec_v (save_n, vector);
607 gen_rtvec_v (n, argp)
615 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
617 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
619 for (i = 0; i < n; i++)
620 rt_val->elem[i] = *argp++;
625 /* Generate a REG rtx for a new pseudo register of mode MODE.
626 This pseudo is assigned the next sequential register number. */
630 enum machine_mode mode;
632 struct function *f = cfun;
635 /* Don't let anything called after initial flow analysis create new
640 if (generating_concat_p
641 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
642 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
644 /* For complex modes, don't make a single pseudo.
645 Instead, make a CONCAT of two pseudos.
646 This allows noncontiguous allocation of the real and imaginary parts,
647 which makes much better code. Besides, allocating DCmode
648 pseudos overstrains reload on some machines like the 386. */
649 rtx realpart, imagpart;
650 int size = GET_MODE_UNIT_SIZE (mode);
651 enum machine_mode partmode
652 = mode_for_size (size * BITS_PER_UNIT,
653 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
654 ? MODE_FLOAT : MODE_INT),
657 realpart = gen_reg_rtx (partmode);
658 imagpart = gen_reg_rtx (partmode);
659 return gen_rtx_CONCAT (mode, realpart, imagpart);
662 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
663 to have an element for this pseudo reg number. */
665 if (reg_rtx_no == f->emit->regno_pointer_align_length)
667 int old_size = f->emit->regno_pointer_align_length;
670 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
671 memset (new + old_size, 0, old_size);
672 f->emit->regno_pointer_align = (unsigned char *) new;
674 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
675 old_size * 2 * sizeof (rtx));
676 memset (new1 + old_size, 0, old_size * sizeof (rtx));
677 regno_reg_rtx = new1;
679 f->emit->regno_pointer_align_length = old_size * 2;
682 val = gen_raw_REG (mode, reg_rtx_no);
683 regno_reg_rtx[reg_rtx_no++] = val;
687 /* Identify REG (which may be a CONCAT) as a user register. */
693 if (GET_CODE (reg) == CONCAT)
695 REG_USERVAR_P (XEXP (reg, 0)) = 1;
696 REG_USERVAR_P (XEXP (reg, 1)) = 1;
698 else if (GET_CODE (reg) == REG)
699 REG_USERVAR_P (reg) = 1;
704 /* Identify REG as a probable pointer register and show its alignment
705 as ALIGN, if nonzero. */
708 mark_reg_pointer (reg, align)
712 if (! REG_POINTER (reg))
714 REG_POINTER (reg) = 1;
717 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
719 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
720 /* We can no-longer be sure just how aligned this pointer is */
721 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
724 /* Return 1 plus largest pseudo reg number used in the current function. */
732 /* Return 1 + the largest label number used so far in the current function. */
737 if (last_label_num && label_num == base_label_num)
738 return last_label_num;
742 /* Return first label number used in this function (if any were used). */
745 get_first_label_num ()
747 return first_label_num;
750 /* Return the final regno of X, which is a SUBREG of a hard
753 subreg_hard_regno (x, check_mode)
757 enum machine_mode mode = GET_MODE (x);
758 unsigned int byte_offset, base_regno, final_regno;
759 rtx reg = SUBREG_REG (x);
761 /* This is where we attempt to catch illegal subregs
762 created by the compiler. */
763 if (GET_CODE (x) != SUBREG
764 || GET_CODE (reg) != REG)
766 base_regno = REGNO (reg);
767 if (base_regno >= FIRST_PSEUDO_REGISTER)
769 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
772 /* Catch non-congruent offsets too. */
773 byte_offset = SUBREG_BYTE (x);
774 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
777 final_regno = subreg_regno (x);
782 /* Return a value representing some low-order bits of X, where the number
783 of low-order bits is given by MODE. Note that no conversion is done
784 between floating-point and fixed-point values, rather, the bit
785 representation is returned.
787 This function handles the cases in common between gen_lowpart, below,
788 and two variants in cse.c and combine.c. These are the cases that can
789 be safely handled at all points in the compilation.
791 If this is not a case we can handle, return 0. */
794 gen_lowpart_common (mode, x)
795 enum machine_mode mode;
798 int msize = GET_MODE_SIZE (mode);
799 int xsize = GET_MODE_SIZE (GET_MODE (x));
802 if (GET_MODE (x) == mode)
805 /* MODE must occupy no more words than the mode of X. */
806 if (GET_MODE (x) != VOIDmode
807 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
808 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
811 offset = subreg_lowpart_offset (mode, GET_MODE (x));
813 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
814 && (GET_MODE_CLASS (mode) == MODE_INT
815 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
817 /* If we are getting the low-order part of something that has been
818 sign- or zero-extended, we can either just use the object being
819 extended or make a narrower extension. If we want an even smaller
820 piece than the size of the object being extended, call ourselves
823 This case is used mostly by combine and cse. */
825 if (GET_MODE (XEXP (x, 0)) == mode)
827 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
828 return gen_lowpart_common (mode, XEXP (x, 0));
829 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
830 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
832 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
833 || GET_CODE (x) == CONCAT)
834 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
835 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
836 from the low-order part of the constant. */
837 else if ((GET_MODE_CLASS (mode) == MODE_INT
838 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
839 && GET_MODE (x) == VOIDmode
840 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
842 /* If MODE is twice the host word size, X is already the desired
843 representation. Otherwise, if MODE is wider than a word, we can't
844 do this. If MODE is exactly a word, return just one CONST_INT. */
846 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
848 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
850 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
851 return (GET_CODE (x) == CONST_INT ? x
852 : GEN_INT (CONST_DOUBLE_LOW (x)));
855 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
856 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
857 : CONST_DOUBLE_LOW (x));
859 /* Sign extend to HOST_WIDE_INT. */
860 val = trunc_int_for_mode (val, mode);
862 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
867 #ifndef REAL_ARITHMETIC
868 /* If X is an integral constant but we want it in floating-point, it
869 must be the case that we have a union of an integer and a floating-point
870 value. If the machine-parameters allow it, simulate that union here
871 and return the result. The two-word and single-word cases are
874 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
875 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
876 || flag_pretend_float)
877 && GET_MODE_CLASS (mode) == MODE_FLOAT
878 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
879 && GET_CODE (x) == CONST_INT
880 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
882 union {HOST_WIDE_INT i; float d; } u;
885 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
887 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
888 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
889 || flag_pretend_float)
890 && GET_MODE_CLASS (mode) == MODE_FLOAT
891 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
892 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
893 && GET_MODE (x) == VOIDmode
894 && (sizeof (double) * HOST_BITS_PER_CHAR
895 == 2 * HOST_BITS_PER_WIDE_INT))
897 union {HOST_WIDE_INT i[2]; double d; } u;
898 HOST_WIDE_INT low, high;
900 if (GET_CODE (x) == CONST_INT)
901 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
903 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
905 #ifdef HOST_WORDS_BIG_ENDIAN
906 u.i[0] = high, u.i[1] = low;
908 u.i[0] = low, u.i[1] = high;
911 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
914 /* Similarly, if this is converting a floating-point value into a
915 single-word integer. Only do this is the host and target parameters are
918 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
919 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
920 || flag_pretend_float)
921 && (GET_MODE_CLASS (mode) == MODE_INT
922 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
923 && GET_CODE (x) == CONST_DOUBLE
924 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
925 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
926 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
928 /* Similarly, if this is converting a floating-point value into a
929 two-word integer, we can do this one word at a time and make an
930 integer. Only do this is the host and target parameters are
933 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
934 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
935 || flag_pretend_float)
936 && (GET_MODE_CLASS (mode) == MODE_INT
937 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
938 && GET_CODE (x) == CONST_DOUBLE
939 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
940 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
942 rtx lowpart, highpart;
944 lowpart = constant_subword (x,
945 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
947 highpart = constant_subword (x,
948 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
950 if (lowpart && GET_CODE (lowpart) == CONST_INT
951 && highpart && GET_CODE (highpart) == CONST_INT)
952 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
954 #else /* ifndef REAL_ARITHMETIC */
956 /* When we have a FP emulator, we can handle all conversions between
957 FP and integer operands. This simplifies reload because it
958 doesn't have to deal with constructs like (subreg:DI
959 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
960 /* Single-precision floats are always 32-bits and double-precision
961 floats are always 64-bits. */
963 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
964 && GET_MODE_BITSIZE (mode) == 32
965 && GET_CODE (x) == CONST_INT)
971 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
972 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
974 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
975 && GET_MODE_BITSIZE (mode) == 64
976 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
977 && GET_MODE (x) == VOIDmode)
981 HOST_WIDE_INT low, high;
983 if (GET_CODE (x) == CONST_INT)
986 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
990 low = CONST_DOUBLE_LOW (x);
991 high = CONST_DOUBLE_HIGH (x);
994 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
996 if (WORDS_BIG_ENDIAN)
997 i[0] = high, i[1] = low;
999 i[0] = low, i[1] = high;
1001 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1002 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1004 else if ((GET_MODE_CLASS (mode) == MODE_INT
1005 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1006 && GET_CODE (x) == CONST_DOUBLE
1007 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1010 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1011 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1013 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1014 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1017 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
1021 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
1024 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1028 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1034 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1036 #if HOST_BITS_PER_WIDE_INT == 32
1037 return immed_double_const (i[endian], i[1 - endian], mode);
1042 if (HOST_BITS_PER_WIDE_INT != 64)
1045 for (c = 0; c < 4; c++)
1048 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1052 return immed_double_const (((unsigned long) i[endian]) |
1053 (((HOST_WIDE_INT) i[1-endian]) << 32),
1057 return immed_double_const (((unsigned long) i[endian*3]) |
1058 (((HOST_WIDE_INT) i[1+endian]) << 32),
1059 ((unsigned long) i[2-endian]) |
1060 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1068 #endif /* ifndef REAL_ARITHMETIC */
1070 /* Otherwise, we can't do this. */
1074 /* Return the real part (which has mode MODE) of a complex value X.
1075 This always comes at the low address in memory. */
1078 gen_realpart (mode, x)
1079 enum machine_mode mode;
1082 if (WORDS_BIG_ENDIAN
1083 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1085 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1087 ("Can't access real part of complex value in hard register");
1088 else if (WORDS_BIG_ENDIAN)
1089 return gen_highpart (mode, x);
1091 return gen_lowpart (mode, x);
1094 /* Return the imaginary part (which has mode MODE) of a complex value X.
1095 This always comes at the high address in memory. */
1098 gen_imagpart (mode, x)
1099 enum machine_mode mode;
1102 if (WORDS_BIG_ENDIAN)
1103 return gen_lowpart (mode, x);
1104 else if (! WORDS_BIG_ENDIAN
1105 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1107 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1109 ("can't access imaginary part of complex value in hard register");
1111 return gen_highpart (mode, x);
1114 /* Return 1 iff X, assumed to be a SUBREG,
1115 refers to the real part of the complex value in its containing reg.
1116 Complex values are always stored with the real part in the first word,
1117 regardless of WORDS_BIG_ENDIAN. */
1120 subreg_realpart_p (x)
1123 if (GET_CODE (x) != SUBREG)
1126 return ((unsigned int) SUBREG_BYTE (x)
1127 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1130 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1131 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1132 least-significant part of X.
1133 MODE specifies how big a part of X to return;
1134 it usually should not be larger than a word.
1135 If X is a MEM whose address is a QUEUED, the value may be so also. */
1138 gen_lowpart (mode, x)
1139 enum machine_mode mode;
1142 rtx result = gen_lowpart_common (mode, x);
1146 else if (GET_CODE (x) == REG)
1148 /* Must be a hard reg that's not valid in MODE. */
1149 result = gen_lowpart_common (mode, copy_to_reg (x));
1154 else if (GET_CODE (x) == MEM)
1156 /* The only additional case we can do is MEM. */
1158 if (WORDS_BIG_ENDIAN)
1159 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1160 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1162 if (BYTES_BIG_ENDIAN)
1163 /* Adjust the address so that the address-after-the-data
1165 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1166 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1168 return adjust_address (x, mode, offset);
1170 else if (GET_CODE (x) == ADDRESSOF)
1171 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1176 /* Like `gen_lowpart', but refer to the most significant part.
1177 This is used to access the imaginary part of a complex number. */
1180 gen_highpart (mode, x)
1181 enum machine_mode mode;
1184 unsigned int msize = GET_MODE_SIZE (mode);
1187 /* This case loses if X is a subreg. To catch bugs early,
1188 complain if an invalid MODE is used even in other cases. */
1189 if (msize > UNITS_PER_WORD
1190 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1193 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1194 subreg_highpart_offset (mode, GET_MODE (x)));
1196 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1197 the target if we have a MEM. gen_highpart must return a valid operand,
1198 emitting code if necessary to do so. */
1199 if (GET_CODE (result) == MEM)
1200 result = validize_mem (result);
1207 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1208 be VOIDmode constant. */
1210 gen_highpart_mode (outermode, innermode, exp)
1211 enum machine_mode outermode, innermode;
1214 if (GET_MODE (exp) != VOIDmode)
1216 if (GET_MODE (exp) != innermode)
1218 return gen_highpart (outermode, exp);
1220 return simplify_gen_subreg (outermode, exp, innermode,
1221 subreg_highpart_offset (outermode, innermode));
1223 /* Return offset in bytes to get OUTERMODE low part
1224 of the value in mode INNERMODE stored in memory in target format. */
1227 subreg_lowpart_offset (outermode, innermode)
1228 enum machine_mode outermode, innermode;
1230 unsigned int offset = 0;
1231 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1235 if (WORDS_BIG_ENDIAN)
1236 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1237 if (BYTES_BIG_ENDIAN)
1238 offset += difference % UNITS_PER_WORD;
1244 /* Return offset in bytes to get OUTERMODE high part
1245 of the value in mode INNERMODE stored in memory in target format. */
1247 subreg_highpart_offset (outermode, innermode)
1248 enum machine_mode outermode, innermode;
1250 unsigned int offset = 0;
1251 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1253 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1258 if (! WORDS_BIG_ENDIAN)
1259 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1260 if (! BYTES_BIG_ENDIAN)
1261 offset += difference % UNITS_PER_WORD;
1267 /* Return 1 iff X, assumed to be a SUBREG,
1268 refers to the least significant part of its containing reg.
1269 If X is not a SUBREG, always return 1 (it is its own low part!). */
1272 subreg_lowpart_p (x)
1275 if (GET_CODE (x) != SUBREG)
1277 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1280 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1281 == SUBREG_BYTE (x));
1285 /* Helper routine for all the constant cases of operand_subword.
1286 Some places invoke this directly. */
1289 constant_subword (op, offset, mode)
1292 enum machine_mode mode;
1294 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1297 /* If OP is already an integer word, return it. */
1298 if (GET_MODE_CLASS (mode) == MODE_INT
1299 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1302 #ifdef REAL_ARITHMETIC
1303 /* The output is some bits, the width of the target machine's word.
1304 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1306 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1307 && GET_MODE_CLASS (mode) == MODE_FLOAT
1308 && GET_MODE_BITSIZE (mode) == 64
1309 && GET_CODE (op) == CONST_DOUBLE)
1314 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1315 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1317 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1318 which the words are written depends on the word endianness.
1319 ??? This is a potential portability problem and should
1320 be fixed at some point.
1322 We must excercise caution with the sign bit. By definition there
1323 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1324 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1325 So we explicitly mask and sign-extend as necessary. */
1326 if (BITS_PER_WORD == 32)
1329 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1330 return GEN_INT (val);
1332 #if HOST_BITS_PER_WIDE_INT >= 64
1333 else if (BITS_PER_WORD >= 64 && offset == 0)
1335 val = k[! WORDS_BIG_ENDIAN];
1336 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1337 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1338 return GEN_INT (val);
1341 else if (BITS_PER_WORD == 16)
1343 val = k[offset >> 1];
1344 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1346 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1347 return GEN_INT (val);
1352 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1353 && GET_MODE_CLASS (mode) == MODE_FLOAT
1354 && GET_MODE_BITSIZE (mode) > 64
1355 && GET_CODE (op) == CONST_DOUBLE)
1360 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1361 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1363 if (BITS_PER_WORD == 32)
1366 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1367 return GEN_INT (val);
1369 #if HOST_BITS_PER_WIDE_INT >= 64
1370 else if (BITS_PER_WORD >= 64 && offset <= 1)
1372 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1373 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1374 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1375 return GEN_INT (val);
1381 #else /* no REAL_ARITHMETIC */
1382 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1383 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1384 || flag_pretend_float)
1385 && GET_MODE_CLASS (mode) == MODE_FLOAT
1386 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1387 && GET_CODE (op) == CONST_DOUBLE)
1389 /* The constant is stored in the host's word-ordering,
1390 but we want to access it in the target's word-ordering. Some
1391 compilers don't like a conditional inside macro args, so we have two
1392 copies of the return. */
1393 #ifdef HOST_WORDS_BIG_ENDIAN
1394 return GEN_INT (offset == WORDS_BIG_ENDIAN
1395 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1397 return GEN_INT (offset != WORDS_BIG_ENDIAN
1398 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1401 #endif /* no REAL_ARITHMETIC */
1403 /* Single word float is a little harder, since single- and double-word
1404 values often do not have the same high-order bits. We have already
1405 verified that we want the only defined word of the single-word value. */
1406 #ifdef REAL_ARITHMETIC
1407 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1408 && GET_MODE_BITSIZE (mode) == 32
1409 && GET_CODE (op) == CONST_DOUBLE)
1414 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1415 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1417 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1419 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1421 if (BITS_PER_WORD == 16)
1423 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1425 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1428 return GEN_INT (val);
1431 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1432 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1433 || flag_pretend_float)
1434 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1435 && GET_MODE_CLASS (mode) == MODE_FLOAT
1436 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1437 && GET_CODE (op) == CONST_DOUBLE)
1440 union {float f; HOST_WIDE_INT i; } u;
1442 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1445 return GEN_INT (u.i);
1447 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1448 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1449 || flag_pretend_float)
1450 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1451 && GET_MODE_CLASS (mode) == MODE_FLOAT
1452 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1453 && GET_CODE (op) == CONST_DOUBLE)
1456 union {double d; HOST_WIDE_INT i; } u;
1458 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1461 return GEN_INT (u.i);
1463 #endif /* no REAL_ARITHMETIC */
1465 /* The only remaining cases that we can handle are integers.
1466 Convert to proper endianness now since these cases need it.
1467 At this point, offset == 0 means the low-order word.
1469 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1470 in general. However, if OP is (const_int 0), we can just return
1473 if (op == const0_rtx)
1476 if (GET_MODE_CLASS (mode) != MODE_INT
1477 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1478 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1481 if (WORDS_BIG_ENDIAN)
1482 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1484 /* Find out which word on the host machine this value is in and get
1485 it from the constant. */
1486 val = (offset / size_ratio == 0
1487 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1488 : (GET_CODE (op) == CONST_INT
1489 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1491 /* Get the value we want into the low bits of val. */
1492 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1493 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1495 val = trunc_int_for_mode (val, word_mode);
1497 return GEN_INT (val);
1500 /* Return subword OFFSET of operand OP.
1501 The word number, OFFSET, is interpreted as the word number starting
1502 at the low-order address. OFFSET 0 is the low-order word if not
1503 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1505 If we cannot extract the required word, we return zero. Otherwise,
1506 an rtx corresponding to the requested word will be returned.
1508 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1509 reload has completed, a valid address will always be returned. After
1510 reload, if a valid address cannot be returned, we return zero.
1512 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1513 it is the responsibility of the caller.
1515 MODE is the mode of OP in case it is a CONST_INT.
1517 ??? This is still rather broken for some cases. The problem for the
1518 moment is that all callers of this thing provide no 'goal mode' to
1519 tell us to work with. This exists because all callers were written
1520 in a word based SUBREG world.
1521 Now use of this function can be deprecated by simplify_subreg in most
1526 operand_subword (op, offset, validate_address, mode)
1528 unsigned int offset;
1529 int validate_address;
1530 enum machine_mode mode;
1532 if (mode == VOIDmode)
1533 mode = GET_MODE (op);
1535 if (mode == VOIDmode)
1538 /* If OP is narrower than a word, fail. */
1540 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1543 /* If we want a word outside OP, return zero. */
1545 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1548 /* Form a new MEM at the requested address. */
1549 if (GET_CODE (op) == MEM)
1551 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1553 if (! validate_address)
1556 else if (reload_completed)
1558 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1562 return replace_equiv_address (new, XEXP (new, 0));
1565 /* Rest can be handled by simplify_subreg. */
1566 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1569 /* Similar to `operand_subword', but never return 0. If we can't extract
1570 the required subword, put OP into a register and try again. If that fails,
1571 abort. We always validate the address in this case.
1573 MODE is the mode of OP, in case it is CONST_INT. */
1576 operand_subword_force (op, offset, mode)
1578 unsigned int offset;
1579 enum machine_mode mode;
1581 rtx result = operand_subword (op, offset, 1, mode);
1586 if (mode != BLKmode && mode != VOIDmode)
1588 /* If this is a register which can not be accessed by words, copy it
1589 to a pseudo register. */
1590 if (GET_CODE (op) == REG)
1591 op = copy_to_reg (op);
1593 op = force_reg (mode, op);
1596 result = operand_subword (op, offset, 1, mode);
1603 /* Given a compare instruction, swap the operands.
1604 A test instruction is changed into a compare of 0 against the operand. */
1607 reverse_comparison (insn)
1610 rtx body = PATTERN (insn);
1613 if (GET_CODE (body) == SET)
1614 comp = SET_SRC (body);
1616 comp = SET_SRC (XVECEXP (body, 0, 0));
1618 if (GET_CODE (comp) == COMPARE)
1620 rtx op0 = XEXP (comp, 0);
1621 rtx op1 = XEXP (comp, 1);
1622 XEXP (comp, 0) = op1;
1623 XEXP (comp, 1) = op0;
1627 rtx new = gen_rtx_COMPARE (VOIDmode,
1628 CONST0_RTX (GET_MODE (comp)), comp);
1629 if (GET_CODE (body) == SET)
1630 SET_SRC (body) = new;
1632 SET_SRC (XVECEXP (body, 0, 0)) = new;
1637 /* Given REF, a MEM, and T, either the type of X or the expression
1638 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1639 if we are making a new object of this type. */
1642 set_mem_attributes (ref, t, objectp)
1649 /* It can happen that type_for_mode was given a mode for which there
1650 is no language-level type. In which case it returns NULL, which
1655 type = TYPE_P (t) ? t : TREE_TYPE (t);
1657 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1658 wrong answer, as it assumes that DECL_RTL already has the right alias
1659 info. Callers should not set DECL_RTL until after the call to
1660 set_mem_attributes. */
1661 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1664 /* Get the alias set from the expression or type (perhaps using a
1665 front-end routine). */
1666 set_mem_alias_set (ref, get_alias_set (t));
1668 /* It is incorrect to set RTX_UNCHANGING_P from TREE_READONLY (type)
1669 here, because, in C and C++, the fact that a location is accessed
1670 through a const expression does not mean that the value there can
1673 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1674 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1676 /* If we are making an object of this type, we know that it is a scalar if
1677 the type is not an aggregate. */
1678 if (objectp && ! AGGREGATE_TYPE_P (type))
1679 MEM_SCALAR_P (ref) = 1;
1681 /* If the size is known, we can set that. */
1682 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1684 = get_mem_attrs (MEM_ALIAS_SET (ref), MEM_DECL (ref), MEM_OFFSET (ref),
1685 GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1)),
1688 /* If T is a type, there's nothing more we can do. Otherwise, we may be able
1689 to deduce some more information about the expression. */
1693 maybe_set_unchanging (ref, t);
1694 if (TREE_THIS_VOLATILE (t))
1695 MEM_VOLATILE_P (ref) = 1;
1697 /* Now remove any NOPs: they don't change what the underlying object is.
1698 Likewise for SAVE_EXPR. */
1699 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1700 || TREE_CODE (t) == NON_LVALUE_EXPR || TREE_CODE (t) == SAVE_EXPR)
1701 t = TREE_OPERAND (t, 0);
1703 /* If this is a decl, set the attributes of the MEM from it. */
1707 (MEM_ALIAS_SET (ref), t, GEN_INT (0),
1708 (TYPE_SIZE_UNIT (TREE_TYPE (t))
1709 && host_integerp (TYPE_SIZE_UNIT (TREE_TYPE (t)), 1))
1710 ? GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (TREE_TYPE (t)), 1))
1711 : 0, DECL_ALIGN (t) / BITS_PER_UNIT);
1713 /* Now see if we can say more about whether it's an aggregate or
1714 scalar. If we already know it's an aggregate, don't bother. */
1715 if (MEM_IN_STRUCT_P (ref))
1718 /* Since we already know the type isn't an aggregate, if this is a decl,
1719 it must be a scalar. Or if it is a reference into an aggregate,
1720 this is part of an aggregate. Otherwise we don't know. */
1722 MEM_SCALAR_P (ref) = 1;
1723 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1724 || TREE_CODE (t) == ARRAY_RANGE_REF
1725 || TREE_CODE (t) == BIT_FIELD_REF)
1726 MEM_IN_STRUCT_P (ref) = 1;
1729 /* Set the alias set of MEM to SET. */
1732 set_mem_alias_set (mem, set)
1736 #ifdef ENABLE_CHECKING
1737 /* If the new and old alias sets don't conflict, something is wrong. */
1738 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1742 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_DECL (mem), MEM_OFFSET (mem),
1743 MEM_SIZE (mem), MEM_ALIGN (mem));
1746 /* Set the alignment of MEM to ALIGN. */
1749 set_mem_align (mem, align)
1753 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_DECL (mem),
1754 MEM_OFFSET (mem), MEM_SIZE (mem), align);
1757 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1758 and its address changed to ADDR. (VOIDmode means don't change the mode.
1759 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1760 returned memory location is required to be valid. The memory
1761 attributes are not changed. */
1764 change_address_1 (memref, mode, addr, validate)
1766 enum machine_mode mode;
1772 if (GET_CODE (memref) != MEM)
1774 if (mode == VOIDmode)
1775 mode = GET_MODE (memref);
1777 addr = XEXP (memref, 0);
1781 if (reload_in_progress || reload_completed)
1783 if (! memory_address_p (mode, addr))
1787 addr = memory_address (mode, addr);
1790 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1793 new = gen_rtx_MEM (mode, addr);
1794 MEM_COPY_ATTRIBUTES (new, memref);
1798 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1799 way we are changing MEMREF, so we only preserve the alias set. */
1802 change_address (memref, mode, addr)
1804 enum machine_mode mode;
1807 rtx new = change_address_1 (memref, mode, addr, 1);
1808 enum machine_mode mmode = GET_MODE (new);
1811 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1812 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1813 (mmode == BLKmode ? 1
1814 : GET_MODE_ALIGNMENT (mmode) / BITS_PER_UNIT));
1819 /* Return a memory reference like MEMREF, but with its mode changed
1820 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1821 nonzero, the memory address is forced to be valid. */
1824 adjust_address_1 (memref, mode, offset, validate)
1826 enum machine_mode mode;
1827 HOST_WIDE_INT offset;
1830 rtx addr = XEXP (memref, 0);
1832 rtx memoffset = MEM_OFFSET (memref);
1833 unsigned int memalign = MEM_ALIGN (memref);
1835 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1836 object, we can merge it into the LO_SUM. */
1837 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1839 && (unsigned HOST_WIDE_INT) offset
1840 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1841 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1842 plus_constant (XEXP (addr, 1), offset));
1843 else if (offset == 0)
1844 /* ??? Prefer to create garbage instead of creating shared rtl. */
1845 addr = copy_rtx (addr);
1847 addr = plus_constant (addr, offset);
1849 new = change_address_1 (memref, mode, addr, validate);
1851 /* Compute the new values of the memory attributes due to this adjustment.
1852 We add the offsets and update the alignment. */
1854 memoffset = GEN_INT (offset + INTVAL (memoffset));
1856 /* If the offset is negative, don't try to update the alignment. If it's
1857 zero, the alignment hasn't changed. Otherwise, the known alignment may
1862 while (offset > 0 && (offset % memalign) != 0)
1866 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref), memoffset,
1868 ? 0 : GEN_INT (GET_MODE_SIZE (mode)), memalign);
1870 /* At some point, we should validate that this offset is within the object,
1871 if all the appropriate values are known. */
1875 /* Return a memory reference like MEMREF, but with its address changed to
1876 ADDR. The caller is asserting that the actual piece of memory pointed
1877 to is the same, just the form of the address is being changed, such as
1878 by putting something into a register. */
1881 replace_equiv_address (memref, addr)
1885 /* change_address_1 copies the memory attribute structure without change
1886 and that's exactly what we want here. */
1887 return change_address_1 (memref, VOIDmode, addr, 1);
1890 /* Likewise, but the reference is not required to be valid. */
1893 replace_equiv_address_nv (memref, addr)
1897 return change_address_1 (memref, VOIDmode, addr, 0);
1900 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1907 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1908 NULL_RTX, label_num++, NULL, NULL);
1910 LABEL_NUSES (label) = 0;
1911 LABEL_ALTERNATE_NAME (label) = NULL;
1915 /* For procedure integration. */
1917 /* Install new pointers to the first and last insns in the chain.
1918 Also, set cur_insn_uid to one higher than the last in use.
1919 Used for an inline-procedure after copying the insn chain. */
1922 set_new_first_and_last_insn (first, last)
1931 for (insn = first; insn; insn = NEXT_INSN (insn))
1932 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1937 /* Set the range of label numbers found in the current function.
1938 This is used when belatedly compiling an inline function. */
1941 set_new_first_and_last_label_num (first, last)
1944 base_label_num = label_num;
1945 first_label_num = first;
1946 last_label_num = last;
1949 /* Set the last label number found in the current function.
1950 This is used when belatedly compiling an inline function. */
1953 set_new_last_label_num (last)
1956 base_label_num = label_num;
1957 last_label_num = last;
1960 /* Restore all variables describing the current status from the structure *P.
1961 This is used after a nested function. */
1964 restore_emit_status (p)
1965 struct function *p ATTRIBUTE_UNUSED;
1968 clear_emit_caches ();
1971 /* Clear out all parts of the state in F that can safely be discarded
1972 after the function has been compiled, to let garbage collection
1973 reclaim the memory. */
1976 free_emit_status (f)
1979 free (f->emit->x_regno_reg_rtx);
1980 free (f->emit->regno_pointer_align);
1985 /* Go through all the RTL insn bodies and copy any invalid shared
1986 structure. This routine should only be called once. */
1989 unshare_all_rtl (fndecl, insn)
1995 /* Make sure that virtual parameters are not shared. */
1996 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1997 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
1999 /* Make sure that virtual stack slots are not shared. */
2000 unshare_all_decls (DECL_INITIAL (fndecl));
2002 /* Unshare just about everything else. */
2003 unshare_all_rtl_1 (insn);
2005 /* Make sure the addresses of stack slots found outside the insn chain
2006 (such as, in DECL_RTL of a variable) are not shared
2007 with the insn chain.
2009 This special care is necessary when the stack slot MEM does not
2010 actually appear in the insn chain. If it does appear, its address
2011 is unshared from all else at that point. */
2012 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2015 /* Go through all the RTL insn bodies and copy any invalid shared
2016 structure, again. This is a fairly expensive thing to do so it
2017 should be done sparingly. */
2020 unshare_all_rtl_again (insn)
2026 for (p = insn; p; p = NEXT_INSN (p))
2029 reset_used_flags (PATTERN (p));
2030 reset_used_flags (REG_NOTES (p));
2031 reset_used_flags (LOG_LINKS (p));
2034 /* Make sure that virtual stack slots are not shared. */
2035 reset_used_decls (DECL_INITIAL (cfun->decl));
2037 /* Make sure that virtual parameters are not shared. */
2038 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2039 reset_used_flags (DECL_RTL (decl));
2041 reset_used_flags (stack_slot_list);
2043 unshare_all_rtl (cfun->decl, insn);
2046 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2047 Assumes the mark bits are cleared at entry. */
2050 unshare_all_rtl_1 (insn)
2053 for (; insn; insn = NEXT_INSN (insn))
2056 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2057 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2058 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2062 /* Go through all virtual stack slots of a function and copy any
2063 shared structure. */
2065 unshare_all_decls (blk)
2070 /* Copy shared decls. */
2071 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2072 if (DECL_RTL_SET_P (t))
2073 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2075 /* Now process sub-blocks. */
2076 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2077 unshare_all_decls (t);
2080 /* Go through all virtual stack slots of a function and mark them as
2083 reset_used_decls (blk)
2089 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2090 if (DECL_RTL_SET_P (t))
2091 reset_used_flags (DECL_RTL (t));
2093 /* Now process sub-blocks. */
2094 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2095 reset_used_decls (t);
2098 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2099 Recursively does the same for subexpressions. */
2102 copy_rtx_if_shared (orig)
2108 const char *format_ptr;
2114 code = GET_CODE (x);
2116 /* These types may be freely shared. */
2129 /* SCRATCH must be shared because they represent distinct values. */
2133 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2134 a LABEL_REF, it isn't sharable. */
2135 if (GET_CODE (XEXP (x, 0)) == PLUS
2136 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2137 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2146 /* The chain of insns is not being copied. */
2150 /* A MEM is allowed to be shared if its address is constant.
2152 We used to allow sharing of MEMs which referenced
2153 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2154 that can lose. instantiate_virtual_regs will not unshare
2155 the MEMs, and combine may change the structure of the address
2156 because it looks safe and profitable in one context, but
2157 in some other context it creates unrecognizable RTL. */
2158 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2167 /* This rtx may not be shared. If it has already been seen,
2168 replace it with a copy of itself. */
2174 copy = rtx_alloc (code);
2176 (sizeof (*copy) - sizeof (copy->fld)
2177 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2183 /* Now scan the subexpressions recursively.
2184 We can store any replaced subexpressions directly into X
2185 since we know X is not shared! Any vectors in X
2186 must be copied if X was copied. */
2188 format_ptr = GET_RTX_FORMAT (code);
2190 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2192 switch (*format_ptr++)
2195 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2199 if (XVEC (x, i) != NULL)
2202 int len = XVECLEN (x, i);
2204 if (copied && len > 0)
2205 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2206 for (j = 0; j < len; j++)
2207 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2215 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2216 to look for shared sub-parts. */
2219 reset_used_flags (x)
2224 const char *format_ptr;
2229 code = GET_CODE (x);
2231 /* These types may be freely shared so we needn't do any resetting
2252 /* The chain of insns is not being copied. */
2261 format_ptr = GET_RTX_FORMAT (code);
2262 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2264 switch (*format_ptr++)
2267 reset_used_flags (XEXP (x, i));
2271 for (j = 0; j < XVECLEN (x, i); j++)
2272 reset_used_flags (XVECEXP (x, i, j));
2278 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2279 Return X or the rtx for the pseudo reg the value of X was copied into.
2280 OTHER must be valid as a SET_DEST. */
2283 make_safe_from (x, other)
2287 switch (GET_CODE (other))
2290 other = SUBREG_REG (other);
2292 case STRICT_LOW_PART:
2295 other = XEXP (other, 0);
2301 if ((GET_CODE (other) == MEM
2303 && GET_CODE (x) != REG
2304 && GET_CODE (x) != SUBREG)
2305 || (GET_CODE (other) == REG
2306 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2307 || reg_mentioned_p (other, x))))
2309 rtx temp = gen_reg_rtx (GET_MODE (x));
2310 emit_move_insn (temp, x);
2316 /* Emission of insns (adding them to the doubly-linked list). */
2318 /* Return the first insn of the current sequence or current function. */
2326 /* Return the last insn emitted in current sequence or current function. */
2334 /* Specify a new insn as the last in the chain. */
2337 set_last_insn (insn)
2340 if (NEXT_INSN (insn) != 0)
2345 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2348 get_last_insn_anywhere ()
2350 struct sequence_stack *stack;
2353 for (stack = seq_stack; stack; stack = stack->next)
2354 if (stack->last != 0)
2359 /* Return a number larger than any instruction's uid in this function. */
2364 return cur_insn_uid;
2367 /* Renumber instructions so that no instruction UIDs are wasted. */
2370 renumber_insns (stream)
2375 /* If we're not supposed to renumber instructions, don't. */
2376 if (!flag_renumber_insns)
2379 /* If there aren't that many instructions, then it's not really
2380 worth renumbering them. */
2381 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2386 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2389 fprintf (stream, "Renumbering insn %d to %d\n",
2390 INSN_UID (insn), cur_insn_uid);
2391 INSN_UID (insn) = cur_insn_uid++;
2395 /* Return the next insn. If it is a SEQUENCE, return the first insn
2404 insn = NEXT_INSN (insn);
2405 if (insn && GET_CODE (insn) == INSN
2406 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2407 insn = XVECEXP (PATTERN (insn), 0, 0);
2413 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2417 previous_insn (insn)
2422 insn = PREV_INSN (insn);
2423 if (insn && GET_CODE (insn) == INSN
2424 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2425 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2431 /* Return the next insn after INSN that is not a NOTE. This routine does not
2432 look inside SEQUENCEs. */
2435 next_nonnote_insn (insn)
2440 insn = NEXT_INSN (insn);
2441 if (insn == 0 || GET_CODE (insn) != NOTE)
2448 /* Return the previous insn before INSN that is not a NOTE. This routine does
2449 not look inside SEQUENCEs. */
2452 prev_nonnote_insn (insn)
2457 insn = PREV_INSN (insn);
2458 if (insn == 0 || GET_CODE (insn) != NOTE)
2465 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2466 or 0, if there is none. This routine does not look inside
2470 next_real_insn (insn)
2475 insn = NEXT_INSN (insn);
2476 if (insn == 0 || GET_CODE (insn) == INSN
2477 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2484 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2485 or 0, if there is none. This routine does not look inside
2489 prev_real_insn (insn)
2494 insn = PREV_INSN (insn);
2495 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2496 || GET_CODE (insn) == JUMP_INSN)
2503 /* Find the next insn after INSN that really does something. This routine
2504 does not look inside SEQUENCEs. Until reload has completed, this is the
2505 same as next_real_insn. */
2508 active_insn_p (insn)
2511 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2512 || (GET_CODE (insn) == INSN
2513 && (! reload_completed
2514 || (GET_CODE (PATTERN (insn)) != USE
2515 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2519 next_active_insn (insn)
2524 insn = NEXT_INSN (insn);
2525 if (insn == 0 || active_insn_p (insn))
2532 /* Find the last insn before INSN that really does something. This routine
2533 does not look inside SEQUENCEs. Until reload has completed, this is the
2534 same as prev_real_insn. */
2537 prev_active_insn (insn)
2542 insn = PREV_INSN (insn);
2543 if (insn == 0 || active_insn_p (insn))
2550 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2558 insn = NEXT_INSN (insn);
2559 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2566 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2574 insn = PREV_INSN (insn);
2575 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2583 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2584 and REG_CC_USER notes so we can find it. */
2587 link_cc0_insns (insn)
2590 rtx user = next_nonnote_insn (insn);
2592 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2593 user = XVECEXP (PATTERN (user), 0, 0);
2595 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2597 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2600 /* Return the next insn that uses CC0 after INSN, which is assumed to
2601 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2602 applied to the result of this function should yield INSN).
2604 Normally, this is simply the next insn. However, if a REG_CC_USER note
2605 is present, it contains the insn that uses CC0.
2607 Return 0 if we can't find the insn. */
2610 next_cc0_user (insn)
2613 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2616 return XEXP (note, 0);
2618 insn = next_nonnote_insn (insn);
2619 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2620 insn = XVECEXP (PATTERN (insn), 0, 0);
2622 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2628 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2629 note, it is the previous insn. */
2632 prev_cc0_setter (insn)
2635 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2638 return XEXP (note, 0);
2640 insn = prev_nonnote_insn (insn);
2641 if (! sets_cc0_p (PATTERN (insn)))
2648 /* Increment the label uses for all labels present in rtx. */
2658 code = GET_CODE (x);
2659 if (code == LABEL_REF)
2660 LABEL_NUSES (XEXP (x, 0))++;
2662 fmt = GET_RTX_FORMAT (code);
2663 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2666 mark_label_nuses (XEXP (x, i));
2667 else if (fmt[i] == 'E')
2668 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2669 mark_label_nuses (XVECEXP (x, i, j));
2674 /* Try splitting insns that can be split for better scheduling.
2675 PAT is the pattern which might split.
2676 TRIAL is the insn providing PAT.
2677 LAST is non-zero if we should return the last insn of the sequence produced.
2679 If this routine succeeds in splitting, it returns the first or last
2680 replacement insn depending on the value of LAST. Otherwise, it
2681 returns TRIAL. If the insn to be returned can be split, it will be. */
2684 try_split (pat, trial, last)
2688 rtx before = PREV_INSN (trial);
2689 rtx after = NEXT_INSN (trial);
2690 int has_barrier = 0;
2695 if (any_condjump_p (trial)
2696 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2697 split_branch_probability = INTVAL (XEXP (note, 0));
2698 probability = split_branch_probability;
2700 seq = split_insns (pat, trial);
2702 split_branch_probability = -1;
2704 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2705 We may need to handle this specially. */
2706 if (after && GET_CODE (after) == BARRIER)
2709 after = NEXT_INSN (after);
2714 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2715 The latter case will normally arise only when being done so that
2716 it, in turn, will be split (SFmode on the 29k is an example). */
2717 if (GET_CODE (seq) == SEQUENCE)
2721 /* Avoid infinite loop if any insn of the result matches
2722 the original pattern. */
2723 for (i = 0; i < XVECLEN (seq, 0); i++)
2724 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2725 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2729 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2730 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2732 rtx insn = XVECEXP (seq, 0, i);
2733 mark_jump_label (PATTERN (insn),
2734 XVECEXP (seq, 0, i), 0);
2736 if (probability != -1
2737 && any_condjump_p (insn)
2738 && !find_reg_note (insn, REG_BR_PROB, 0))
2740 /* We can preserve the REG_BR_PROB notes only if exactly
2741 one jump is created, otherwise the machinde description
2742 is responsible for this step using
2743 split_branch_probability variable. */
2747 = gen_rtx_EXPR_LIST (REG_BR_PROB,
2748 GEN_INT (probability),
2753 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2754 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2755 if (GET_CODE (trial) == CALL_INSN)
2756 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2757 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2758 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2759 = CALL_INSN_FUNCTION_USAGE (trial);
2761 /* Copy notes, particularly those related to the CFG. */
2762 for (note = REG_NOTES (trial); note ; note = XEXP (note, 1))
2764 switch (REG_NOTE_KIND (note))
2767 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2769 rtx insn = XVECEXP (seq, 0, i);
2770 if (GET_CODE (insn) == CALL_INSN
2771 || (flag_non_call_exceptions
2772 && may_trap_p (PATTERN (insn))))
2774 = gen_rtx_EXPR_LIST (REG_EH_REGION,
2782 case REG_ALWAYS_RETURN:
2783 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2785 rtx insn = XVECEXP (seq, 0, i);
2786 if (GET_CODE (insn) == CALL_INSN)
2788 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2794 case REG_NON_LOCAL_GOTO:
2795 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2797 rtx insn = XVECEXP (seq, 0, i);
2798 if (GET_CODE (insn) == JUMP_INSN)
2800 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2811 /* If there are LABELS inside the split insns increment the
2812 usage count so we don't delete the label. */
2813 if (GET_CODE (trial) == INSN)
2814 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2815 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2816 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2818 tem = emit_insn_after (seq, trial);
2820 delete_related_insns (trial);
2822 emit_barrier_after (tem);
2824 /* Recursively call try_split for each new insn created; by the
2825 time control returns here that insn will be fully split, so
2826 set LAST and continue from the insn after the one returned.
2827 We can't use next_active_insn here since AFTER may be a note.
2828 Ignore deleted insns, which can be occur if not optimizing. */
2829 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2830 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2831 tem = try_split (PATTERN (tem), tem, 1);
2833 /* Avoid infinite loop if the result matches the original pattern. */
2834 else if (rtx_equal_p (seq, pat))
2838 PATTERN (trial) = seq;
2839 INSN_CODE (trial) = -1;
2840 try_split (seq, trial, last);
2843 /* Return either the first or the last insn, depending on which was
2846 ? (after ? PREV_INSN (after) : last_insn)
2847 : NEXT_INSN (before);
2853 /* Make and return an INSN rtx, initializing all its slots.
2854 Store PATTERN in the pattern slots. */
2857 make_insn_raw (pattern)
2862 insn = rtx_alloc (INSN);
2864 INSN_UID (insn) = cur_insn_uid++;
2865 PATTERN (insn) = pattern;
2866 INSN_CODE (insn) = -1;
2867 LOG_LINKS (insn) = NULL;
2868 REG_NOTES (insn) = NULL;
2870 #ifdef ENABLE_RTL_CHECKING
2873 && (returnjump_p (insn)
2874 || (GET_CODE (insn) == SET
2875 && SET_DEST (insn) == pc_rtx)))
2877 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2885 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2888 make_jump_insn_raw (pattern)
2893 insn = rtx_alloc (JUMP_INSN);
2894 INSN_UID (insn) = cur_insn_uid++;
2896 PATTERN (insn) = pattern;
2897 INSN_CODE (insn) = -1;
2898 LOG_LINKS (insn) = NULL;
2899 REG_NOTES (insn) = NULL;
2900 JUMP_LABEL (insn) = NULL;
2905 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2908 make_call_insn_raw (pattern)
2913 insn = rtx_alloc (CALL_INSN);
2914 INSN_UID (insn) = cur_insn_uid++;
2916 PATTERN (insn) = pattern;
2917 INSN_CODE (insn) = -1;
2918 LOG_LINKS (insn) = NULL;
2919 REG_NOTES (insn) = NULL;
2920 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2925 /* Add INSN to the end of the doubly-linked list.
2926 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2932 PREV_INSN (insn) = last_insn;
2933 NEXT_INSN (insn) = 0;
2935 if (NULL != last_insn)
2936 NEXT_INSN (last_insn) = insn;
2938 if (NULL == first_insn)
2944 /* Add INSN into the doubly-linked list after insn AFTER. This and
2945 the next should be the only functions called to insert an insn once
2946 delay slots have been filled since only they know how to update a
2950 add_insn_after (insn, after)
2953 rtx next = NEXT_INSN (after);
2956 if (optimize && INSN_DELETED_P (after))
2959 NEXT_INSN (insn) = next;
2960 PREV_INSN (insn) = after;
2964 PREV_INSN (next) = insn;
2965 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2966 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2968 else if (last_insn == after)
2972 struct sequence_stack *stack = seq_stack;
2973 /* Scan all pending sequences too. */
2974 for (; stack; stack = stack->next)
2975 if (after == stack->last)
2985 if (basic_block_for_insn
2986 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
2987 && (bb = BLOCK_FOR_INSN (after)))
2989 set_block_for_insn (insn, bb);
2990 /* Should not happen as first in the BB is always
2991 eigther NOTE or LABEL. */
2992 if (bb->end == after
2993 /* Avoid clobbering of structure when creating new BB. */
2994 && GET_CODE (insn) != BARRIER
2995 && (GET_CODE (insn) != NOTE
2996 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3000 NEXT_INSN (after) = insn;
3001 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3003 rtx sequence = PATTERN (after);
3004 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3008 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3009 the previous should be the only functions called to insert an insn once
3010 delay slots have been filled since only they know how to update a
3014 add_insn_before (insn, before)
3017 rtx prev = PREV_INSN (before);
3020 if (optimize && INSN_DELETED_P (before))
3023 PREV_INSN (insn) = prev;
3024 NEXT_INSN (insn) = before;
3028 NEXT_INSN (prev) = insn;
3029 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3031 rtx sequence = PATTERN (prev);
3032 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3035 else if (first_insn == before)
3039 struct sequence_stack *stack = seq_stack;
3040 /* Scan all pending sequences too. */
3041 for (; stack; stack = stack->next)
3042 if (before == stack->first)
3044 stack->first = insn;
3052 if (basic_block_for_insn
3053 && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements
3054 && (bb = BLOCK_FOR_INSN (before)))
3056 set_block_for_insn (insn, bb);
3057 /* Should not happen as first in the BB is always
3058 eigther NOTE or LABEl. */
3059 if (bb->head == insn
3060 /* Avoid clobbering of structure when creating new BB. */
3061 && GET_CODE (insn) != BARRIER
3062 && (GET_CODE (insn) != NOTE
3063 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3067 PREV_INSN (before) = insn;
3068 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3069 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3072 /* Remove an insn from its doubly-linked list. This function knows how
3073 to handle sequences. */
3078 rtx next = NEXT_INSN (insn);
3079 rtx prev = PREV_INSN (insn);
3084 NEXT_INSN (prev) = next;
3085 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3087 rtx sequence = PATTERN (prev);
3088 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3091 else if (first_insn == insn)
3095 struct sequence_stack *stack = seq_stack;
3096 /* Scan all pending sequences too. */
3097 for (; stack; stack = stack->next)
3098 if (insn == stack->first)
3100 stack->first = next;
3110 PREV_INSN (next) = prev;
3111 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3112 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3114 else if (last_insn == insn)
3118 struct sequence_stack *stack = seq_stack;
3119 /* Scan all pending sequences too. */
3120 for (; stack; stack = stack->next)
3121 if (insn == stack->last)
3130 if (basic_block_for_insn
3131 && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements
3132 && (bb = BLOCK_FOR_INSN (insn)))
3134 if (bb->head == insn)
3136 /* Never ever delete the basic block note without deleting whole basic
3138 if (GET_CODE (insn) == NOTE)
3142 if (bb->end == insn)
3147 /* Delete all insns made since FROM.
3148 FROM becomes the new last instruction. */
3151 delete_insns_since (from)
3157 NEXT_INSN (from) = 0;
3161 /* This function is deprecated, please use sequences instead.
3163 Move a consecutive bunch of insns to a different place in the chain.
3164 The insns to be moved are those between FROM and TO.
3165 They are moved to a new position after the insn AFTER.
3166 AFTER must not be FROM or TO or any insn in between.
3168 This function does not know about SEQUENCEs and hence should not be
3169 called after delay-slot filling has been done. */
3172 reorder_insns_nobb (from, to, after)
3173 rtx from, to, after;
3175 /* Splice this bunch out of where it is now. */
3176 if (PREV_INSN (from))
3177 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3179 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3180 if (last_insn == to)
3181 last_insn = PREV_INSN (from);
3182 if (first_insn == from)
3183 first_insn = NEXT_INSN (to);
3185 /* Make the new neighbors point to it and it to them. */
3186 if (NEXT_INSN (after))
3187 PREV_INSN (NEXT_INSN (after)) = to;
3189 NEXT_INSN (to) = NEXT_INSN (after);
3190 PREV_INSN (from) = after;
3191 NEXT_INSN (after) = from;
3192 if (after == last_insn)
3196 /* Same as function above, but take care to update BB boundaries. */
3198 reorder_insns (from, to, after)
3199 rtx from, to, after;
3201 rtx prev = PREV_INSN (from);
3202 basic_block bb, bb2;
3204 reorder_insns_nobb (from, to, after);
3206 if (basic_block_for_insn
3207 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3208 && (bb = BLOCK_FOR_INSN (after)))
3212 if (basic_block_for_insn
3213 && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements
3214 && (bb2 = BLOCK_FOR_INSN (from)))
3220 if (bb->end == after)
3223 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3224 set_block_for_insn (x, bb);
3228 /* Return the line note insn preceding INSN. */
3231 find_line_note (insn)
3234 if (no_line_numbers)
3237 for (; insn; insn = PREV_INSN (insn))
3238 if (GET_CODE (insn) == NOTE
3239 && NOTE_LINE_NUMBER (insn) >= 0)
3245 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3246 of the moved insns when debugging. This may insert a note between AFTER
3247 and FROM, and another one after TO. */
3250 reorder_insns_with_line_notes (from, to, after)
3251 rtx from, to, after;
3253 rtx from_line = find_line_note (from);
3254 rtx after_line = find_line_note (after);
3256 reorder_insns (from, to, after);
3258 if (from_line == after_line)
3262 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3263 NOTE_LINE_NUMBER (from_line),
3266 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3267 NOTE_LINE_NUMBER (after_line),
3271 /* Remove unnecessary notes from the instruction stream. */
3274 remove_unnecessary_notes ()
3276 rtx block_stack = NULL_RTX;
3277 rtx eh_stack = NULL_RTX;
3282 /* We must not remove the first instruction in the function because
3283 the compiler depends on the first instruction being a note. */
3284 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3286 /* Remember what's next. */
3287 next = NEXT_INSN (insn);
3289 /* We're only interested in notes. */
3290 if (GET_CODE (insn) != NOTE)
3293 switch (NOTE_LINE_NUMBER (insn))
3295 case NOTE_INSN_DELETED:
3299 case NOTE_INSN_EH_REGION_BEG:
3300 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3303 case NOTE_INSN_EH_REGION_END:
3304 /* Too many end notes. */
3305 if (eh_stack == NULL_RTX)
3307 /* Mismatched nesting. */
3308 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3311 eh_stack = XEXP (eh_stack, 1);
3312 free_INSN_LIST_node (tmp);
3315 case NOTE_INSN_BLOCK_BEG:
3316 /* By now, all notes indicating lexical blocks should have
3317 NOTE_BLOCK filled in. */
3318 if (NOTE_BLOCK (insn) == NULL_TREE)
3320 block_stack = alloc_INSN_LIST (insn, block_stack);
3323 case NOTE_INSN_BLOCK_END:
3324 /* Too many end notes. */
3325 if (block_stack == NULL_RTX)
3327 /* Mismatched nesting. */
3328 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3331 block_stack = XEXP (block_stack, 1);
3332 free_INSN_LIST_node (tmp);
3334 /* Scan back to see if there are any non-note instructions
3335 between INSN and the beginning of this block. If not,
3336 then there is no PC range in the generated code that will
3337 actually be in this block, so there's no point in
3338 remembering the existence of the block. */
3339 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3341 /* This block contains a real instruction. Note that we
3342 don't include labels; if the only thing in the block
3343 is a label, then there are still no PC values that
3344 lie within the block. */
3348 /* We're only interested in NOTEs. */
3349 if (GET_CODE (tmp) != NOTE)
3352 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3354 /* We just verified that this BLOCK matches us with
3355 the block_stack check above. Never delete the
3356 BLOCK for the outermost scope of the function; we
3357 can refer to names from that scope even if the
3358 block notes are messed up. */
3359 if (! is_body_block (NOTE_BLOCK (insn))
3360 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3367 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3368 /* There's a nested block. We need to leave the
3369 current block in place since otherwise the debugger
3370 wouldn't be able to show symbols from our block in
3371 the nested block. */
3377 /* Too many begin notes. */
3378 if (block_stack || eh_stack)
3383 /* Emit an insn of given code and pattern
3384 at a specified place within the doubly-linked list. */
3386 /* Make an instruction with body PATTERN
3387 and output it before the instruction BEFORE. */
3390 emit_insn_before (pattern, before)
3391 rtx pattern, before;
3395 if (GET_CODE (pattern) == SEQUENCE)
3399 for (i = 0; i < XVECLEN (pattern, 0); i++)
3401 insn = XVECEXP (pattern, 0, i);
3402 add_insn_before (insn, before);
3407 insn = make_insn_raw (pattern);
3408 add_insn_before (insn, before);
3414 /* Make an instruction with body PATTERN and code JUMP_INSN
3415 and output it before the instruction BEFORE. */
3418 emit_jump_insn_before (pattern, before)
3419 rtx pattern, before;
3423 if (GET_CODE (pattern) == SEQUENCE)
3424 insn = emit_insn_before (pattern, before);
3427 insn = make_jump_insn_raw (pattern);
3428 add_insn_before (insn, before);
3434 /* Make an instruction with body PATTERN and code CALL_INSN
3435 and output it before the instruction BEFORE. */
3438 emit_call_insn_before (pattern, before)
3439 rtx pattern, before;
3443 if (GET_CODE (pattern) == SEQUENCE)
3444 insn = emit_insn_before (pattern, before);
3447 insn = make_call_insn_raw (pattern);
3448 add_insn_before (insn, before);
3449 PUT_CODE (insn, CALL_INSN);
3455 /* Make an insn of code BARRIER
3456 and output it before the insn BEFORE. */
3459 emit_barrier_before (before)
3462 rtx insn = rtx_alloc (BARRIER);
3464 INSN_UID (insn) = cur_insn_uid++;
3466 add_insn_before (insn, before);
3470 /* Emit the label LABEL before the insn BEFORE. */
3473 emit_label_before (label, before)
3476 /* This can be called twice for the same label as a result of the
3477 confusion that follows a syntax error! So make it harmless. */
3478 if (INSN_UID (label) == 0)
3480 INSN_UID (label) = cur_insn_uid++;
3481 add_insn_before (label, before);
3487 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3490 emit_note_before (subtype, before)
3494 rtx note = rtx_alloc (NOTE);
3495 INSN_UID (note) = cur_insn_uid++;
3496 NOTE_SOURCE_FILE (note) = 0;
3497 NOTE_LINE_NUMBER (note) = subtype;
3499 add_insn_before (note, before);
3503 /* Make an insn of code INSN with body PATTERN
3504 and output it after the insn AFTER. */
3507 emit_insn_after (pattern, after)
3512 if (GET_CODE (pattern) == SEQUENCE)
3516 for (i = 0; i < XVECLEN (pattern, 0); i++)
3518 insn = XVECEXP (pattern, 0, i);
3519 add_insn_after (insn, after);
3525 insn = make_insn_raw (pattern);
3526 add_insn_after (insn, after);
3532 /* Similar to emit_insn_after, except that line notes are to be inserted so
3533 as to act as if this insn were at FROM. */
3536 emit_insn_after_with_line_notes (pattern, after, from)
3537 rtx pattern, after, from;
3539 rtx from_line = find_line_note (from);
3540 rtx after_line = find_line_note (after);
3541 rtx insn = emit_insn_after (pattern, after);
3544 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3545 NOTE_LINE_NUMBER (from_line),
3549 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3550 NOTE_LINE_NUMBER (after_line),
3554 /* Make an insn of code JUMP_INSN with body PATTERN
3555 and output it after the insn AFTER. */
3558 emit_jump_insn_after (pattern, after)
3563 if (GET_CODE (pattern) == SEQUENCE)
3564 insn = emit_insn_after (pattern, after);
3567 insn = make_jump_insn_raw (pattern);
3568 add_insn_after (insn, after);
3574 /* Make an insn of code BARRIER
3575 and output it after the insn AFTER. */
3578 emit_barrier_after (after)
3581 rtx insn = rtx_alloc (BARRIER);
3583 INSN_UID (insn) = cur_insn_uid++;
3585 add_insn_after (insn, after);
3589 /* Emit the label LABEL after the insn AFTER. */
3592 emit_label_after (label, after)
3595 /* This can be called twice for the same label
3596 as a result of the confusion that follows a syntax error!
3597 So make it harmless. */
3598 if (INSN_UID (label) == 0)
3600 INSN_UID (label) = cur_insn_uid++;
3601 add_insn_after (label, after);
3607 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3610 emit_note_after (subtype, after)
3614 rtx note = rtx_alloc (NOTE);
3615 INSN_UID (note) = cur_insn_uid++;
3616 NOTE_SOURCE_FILE (note) = 0;
3617 NOTE_LINE_NUMBER (note) = subtype;
3618 add_insn_after (note, after);
3622 /* Emit a line note for FILE and LINE after the insn AFTER. */
3625 emit_line_note_after (file, line, after)
3632 if (no_line_numbers && line > 0)
3638 note = rtx_alloc (NOTE);
3639 INSN_UID (note) = cur_insn_uid++;
3640 NOTE_SOURCE_FILE (note) = file;
3641 NOTE_LINE_NUMBER (note) = line;
3642 add_insn_after (note, after);
3646 /* Make an insn of code INSN with pattern PATTERN
3647 and add it to the end of the doubly-linked list.
3648 If PATTERN is a SEQUENCE, take the elements of it
3649 and emit an insn for each element.
3651 Returns the last insn emitted. */
3657 rtx insn = last_insn;
3659 if (GET_CODE (pattern) == SEQUENCE)
3663 for (i = 0; i < XVECLEN (pattern, 0); i++)
3665 insn = XVECEXP (pattern, 0, i);
3671 insn = make_insn_raw (pattern);
3678 /* Emit the insns in a chain starting with INSN.
3679 Return the last insn emitted. */
3689 rtx next = NEXT_INSN (insn);
3698 /* Emit the insns in a chain starting with INSN and place them in front of
3699 the insn BEFORE. Return the last insn emitted. */
3702 emit_insns_before (insn, before)
3710 rtx next = NEXT_INSN (insn);
3711 add_insn_before (insn, before);
3719 /* Emit the insns in a chain starting with FIRST and place them in back of
3720 the insn AFTER. Return the last insn emitted. */
3723 emit_insns_after (first, after)
3737 if (basic_block_for_insn
3738 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3739 && (bb = BLOCK_FOR_INSN (after)))
3741 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3742 set_block_for_insn (last, bb);
3743 set_block_for_insn (last, bb);
3744 if (bb->end == after)
3748 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3751 after_after = NEXT_INSN (after);
3753 NEXT_INSN (after) = first;
3754 PREV_INSN (first) = after;
3755 NEXT_INSN (last) = after_after;
3757 PREV_INSN (after_after) = last;
3759 if (after == last_insn)
3764 /* Make an insn of code JUMP_INSN with pattern PATTERN
3765 and add it to the end of the doubly-linked list. */
3768 emit_jump_insn (pattern)
3771 if (GET_CODE (pattern) == SEQUENCE)
3772 return emit_insn (pattern);
3775 rtx insn = make_jump_insn_raw (pattern);
3781 /* Make an insn of code CALL_INSN with pattern PATTERN
3782 and add it to the end of the doubly-linked list. */
3785 emit_call_insn (pattern)
3788 if (GET_CODE (pattern) == SEQUENCE)
3789 return emit_insn (pattern);
3792 rtx insn = make_call_insn_raw (pattern);
3794 PUT_CODE (insn, CALL_INSN);
3799 /* Add the label LABEL to the end of the doubly-linked list. */
3805 /* This can be called twice for the same label
3806 as a result of the confusion that follows a syntax error!
3807 So make it harmless. */
3808 if (INSN_UID (label) == 0)
3810 INSN_UID (label) = cur_insn_uid++;
3816 /* Make an insn of code BARRIER
3817 and add it to the end of the doubly-linked list. */
3822 rtx barrier = rtx_alloc (BARRIER);
3823 INSN_UID (barrier) = cur_insn_uid++;
3828 /* Make an insn of code NOTE
3829 with data-fields specified by FILE and LINE
3830 and add it to the end of the doubly-linked list,
3831 but only if line-numbers are desired for debugging info. */
3834 emit_line_note (file, line)
3838 set_file_and_line_for_stmt (file, line);
3841 if (no_line_numbers)
3845 return emit_note (file, line);
3848 /* Make an insn of code NOTE
3849 with data-fields specified by FILE and LINE
3850 and add it to the end of the doubly-linked list.
3851 If it is a line-number NOTE, omit it if it matches the previous one. */
3854 emit_note (file, line)
3862 if (file && last_filename && !strcmp (file, last_filename)
3863 && line == last_linenum)
3865 last_filename = file;
3866 last_linenum = line;
3869 if (no_line_numbers && line > 0)
3875 note = rtx_alloc (NOTE);
3876 INSN_UID (note) = cur_insn_uid++;
3877 NOTE_SOURCE_FILE (note) = file;
3878 NOTE_LINE_NUMBER (note) = line;
3883 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3886 emit_line_note_force (file, line)
3891 return emit_line_note (file, line);
3894 /* Cause next statement to emit a line note even if the line number
3895 has not changed. This is used at the beginning of a function. */
3898 force_next_line_note ()
3903 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3904 note of this type already exists, remove it first. */
3907 set_unique_reg_note (insn, kind, datum)
3912 rtx note = find_reg_note (insn, kind, NULL_RTX);
3914 /* First remove the note if there already is one. */
3916 remove_note (insn, note);
3918 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3921 /* Return an indication of which type of insn should have X as a body.
3922 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3928 if (GET_CODE (x) == CODE_LABEL)
3930 if (GET_CODE (x) == CALL)
3932 if (GET_CODE (x) == RETURN)
3934 if (GET_CODE (x) == SET)
3936 if (SET_DEST (x) == pc_rtx)
3938 else if (GET_CODE (SET_SRC (x)) == CALL)
3943 if (GET_CODE (x) == PARALLEL)
3946 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3947 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3949 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3950 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3952 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3953 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3959 /* Emit the rtl pattern X as an appropriate kind of insn.
3960 If X is a label, it is simply added into the insn chain. */
3966 enum rtx_code code = classify_insn (x);
3968 if (code == CODE_LABEL)
3969 return emit_label (x);
3970 else if (code == INSN)
3971 return emit_insn (x);
3972 else if (code == JUMP_INSN)
3974 rtx insn = emit_jump_insn (x);
3975 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3976 return emit_barrier ();
3979 else if (code == CALL_INSN)
3980 return emit_call_insn (x);
3985 /* Begin emitting insns to a sequence which can be packaged in an
3986 RTL_EXPR. If this sequence will contain something that might cause
3987 the compiler to pop arguments to function calls (because those
3988 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3989 details), use do_pending_stack_adjust before calling this function.
3990 That will ensure that the deferred pops are not accidentally
3991 emitted in the middle of this sequence. */
3996 struct sequence_stack *tem;
3998 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4000 tem->next = seq_stack;
4001 tem->first = first_insn;
4002 tem->last = last_insn;
4003 tem->sequence_rtl_expr = seq_rtl_expr;
4011 /* Similarly, but indicate that this sequence will be placed in T, an
4012 RTL_EXPR. See the documentation for start_sequence for more
4013 information about how to use this function. */
4016 start_sequence_for_rtl_expr (t)
4024 /* Set up the insn chain starting with FIRST as the current sequence,
4025 saving the previously current one. See the documentation for
4026 start_sequence for more information about how to use this function. */
4029 push_to_sequence (first)
4036 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4042 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4045 push_to_full_sequence (first, last)
4051 /* We really should have the end of the insn chain here. */
4052 if (last && NEXT_INSN (last))
4056 /* Set up the outer-level insn chain
4057 as the current sequence, saving the previously current one. */
4060 push_topmost_sequence ()
4062 struct sequence_stack *stack, *top = NULL;
4066 for (stack = seq_stack; stack; stack = stack->next)
4069 first_insn = top->first;
4070 last_insn = top->last;
4071 seq_rtl_expr = top->sequence_rtl_expr;
4074 /* After emitting to the outer-level insn chain, update the outer-level
4075 insn chain, and restore the previous saved state. */
4078 pop_topmost_sequence ()
4080 struct sequence_stack *stack, *top = NULL;
4082 for (stack = seq_stack; stack; stack = stack->next)
4085 top->first = first_insn;
4086 top->last = last_insn;
4087 /* ??? Why don't we save seq_rtl_expr here? */
4092 /* After emitting to a sequence, restore previous saved state.
4094 To get the contents of the sequence just made, you must call
4095 `gen_sequence' *before* calling here.
4097 If the compiler might have deferred popping arguments while
4098 generating this sequence, and this sequence will not be immediately
4099 inserted into the instruction stream, use do_pending_stack_adjust
4100 before calling gen_sequence. That will ensure that the deferred
4101 pops are inserted into this sequence, and not into some random
4102 location in the instruction stream. See INHIBIT_DEFER_POP for more
4103 information about deferred popping of arguments. */
4108 struct sequence_stack *tem = seq_stack;
4110 first_insn = tem->first;
4111 last_insn = tem->last;
4112 seq_rtl_expr = tem->sequence_rtl_expr;
4113 seq_stack = tem->next;
4118 /* This works like end_sequence, but records the old sequence in FIRST
4122 end_full_sequence (first, last)
4125 *first = first_insn;
4130 /* Return 1 if currently emitting into a sequence. */
4135 return seq_stack != 0;
4138 /* Generate a SEQUENCE rtx containing the insns already emitted
4139 to the current sequence.
4141 This is how the gen_... function from a DEFINE_EXPAND
4142 constructs the SEQUENCE that it returns. */
4152 /* Count the insns in the chain. */
4154 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4157 /* If only one insn, return it rather than a SEQUENCE.
4158 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4159 the case of an empty list.)
4160 We only return the pattern of an insn if its code is INSN and it
4161 has no notes. This ensures that no information gets lost. */
4163 && ! RTX_FRAME_RELATED_P (first_insn)
4164 && GET_CODE (first_insn) == INSN
4165 /* Don't throw away any reg notes. */
4166 && REG_NOTES (first_insn) == 0)
4167 return PATTERN (first_insn);
4169 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4171 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4172 XVECEXP (result, 0, i) = tem;
4177 /* Put the various virtual registers into REGNO_REG_RTX. */
4180 init_virtual_regs (es)
4181 struct emit_status *es;
4183 rtx *ptr = es->x_regno_reg_rtx;
4184 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4185 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4186 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4187 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4188 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4192 clear_emit_caches ()
4196 /* Clear the start_sequence/gen_sequence cache. */
4197 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4198 sequence_result[i] = 0;
4202 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4203 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4204 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4205 static int copy_insn_n_scratches;
4207 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4208 copied an ASM_OPERANDS.
4209 In that case, it is the original input-operand vector. */
4210 static rtvec orig_asm_operands_vector;
4212 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4213 copied an ASM_OPERANDS.
4214 In that case, it is the copied input-operand vector. */
4215 static rtvec copy_asm_operands_vector;
4217 /* Likewise for the constraints vector. */
4218 static rtvec orig_asm_constraints_vector;
4219 static rtvec copy_asm_constraints_vector;
4221 /* Recursively create a new copy of an rtx for copy_insn.
4222 This function differs from copy_rtx in that it handles SCRATCHes and
4223 ASM_OPERANDs properly.
4224 Normally, this function is not used directly; use copy_insn as front end.
4225 However, you could first copy an insn pattern with copy_insn and then use
4226 this function afterwards to properly copy any REG_NOTEs containing
4236 const char *format_ptr;
4238 code = GET_CODE (orig);
4254 for (i = 0; i < copy_insn_n_scratches; i++)
4255 if (copy_insn_scratch_in[i] == orig)
4256 return copy_insn_scratch_out[i];
4260 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4261 a LABEL_REF, it isn't sharable. */
4262 if (GET_CODE (XEXP (orig, 0)) == PLUS
4263 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4264 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4268 /* A MEM with a constant address is not sharable. The problem is that
4269 the constant address may need to be reloaded. If the mem is shared,
4270 then reloading one copy of this mem will cause all copies to appear
4271 to have been reloaded. */
4277 copy = rtx_alloc (code);
4279 /* Copy the various flags, and other information. We assume that
4280 all fields need copying, and then clear the fields that should
4281 not be copied. That is the sensible default behavior, and forces
4282 us to explicitly document why we are *not* copying a flag. */
4283 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4285 /* We do not copy the USED flag, which is used as a mark bit during
4286 walks over the RTL. */
4289 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4290 if (GET_RTX_CLASS (code) == 'i')
4294 copy->frame_related = 0;
4297 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4299 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4301 copy->fld[i] = orig->fld[i];
4302 switch (*format_ptr++)
4305 if (XEXP (orig, i) != NULL)
4306 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4311 if (XVEC (orig, i) == orig_asm_constraints_vector)
4312 XVEC (copy, i) = copy_asm_constraints_vector;
4313 else if (XVEC (orig, i) == orig_asm_operands_vector)
4314 XVEC (copy, i) = copy_asm_operands_vector;
4315 else if (XVEC (orig, i) != NULL)
4317 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4318 for (j = 0; j < XVECLEN (copy, i); j++)
4319 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4330 /* These are left unchanged. */
4338 if (code == SCRATCH)
4340 i = copy_insn_n_scratches++;
4341 if (i >= MAX_RECOG_OPERANDS)
4343 copy_insn_scratch_in[i] = orig;
4344 copy_insn_scratch_out[i] = copy;
4346 else if (code == ASM_OPERANDS)
4348 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4349 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4350 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4351 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4357 /* Create a new copy of an rtx.
4358 This function differs from copy_rtx in that it handles SCRATCHes and
4359 ASM_OPERANDs properly.
4360 INSN doesn't really have to be a full INSN; it could be just the
4366 copy_insn_n_scratches = 0;
4367 orig_asm_operands_vector = 0;
4368 orig_asm_constraints_vector = 0;
4369 copy_asm_operands_vector = 0;
4370 copy_asm_constraints_vector = 0;
4371 return copy_insn_1 (insn);
4374 /* Initialize data structures and variables in this file
4375 before generating rtl for each function. */
4380 struct function *f = cfun;
4382 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4385 seq_rtl_expr = NULL;
4387 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4390 first_label_num = label_num;
4394 clear_emit_caches ();
4396 /* Init the tables that describe all the pseudo regs. */
4398 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4400 f->emit->regno_pointer_align
4401 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4402 sizeof (unsigned char));
4405 = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
4408 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4409 init_virtual_regs (f->emit);
4411 /* Indicate that the virtual registers and stack locations are
4413 REG_POINTER (stack_pointer_rtx) = 1;
4414 REG_POINTER (frame_pointer_rtx) = 1;
4415 REG_POINTER (hard_frame_pointer_rtx) = 1;
4416 REG_POINTER (arg_pointer_rtx) = 1;
4418 REG_POINTER (virtual_incoming_args_rtx) = 1;
4419 REG_POINTER (virtual_stack_vars_rtx) = 1;
4420 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4421 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4422 REG_POINTER (virtual_cfa_rtx) = 1;
4424 #ifdef STACK_BOUNDARY
4425 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4426 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4427 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4428 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4430 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4431 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4432 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4433 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4434 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4437 #ifdef INIT_EXPANDERS
4442 /* Mark SS for GC. */
4445 mark_sequence_stack (ss)
4446 struct sequence_stack *ss;
4450 ggc_mark_rtx (ss->first);
4451 ggc_mark_tree (ss->sequence_rtl_expr);
4456 /* Mark ES for GC. */
4459 mark_emit_status (es)
4460 struct emit_status *es;
4468 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
4472 mark_sequence_stack (es->sequence_stack);
4473 ggc_mark_tree (es->sequence_rtl_expr);
4474 ggc_mark_rtx (es->x_first_insn);
4477 /* Create some permanent unique rtl objects shared between all functions.
4478 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4481 init_emit_once (line_numbers)
4485 enum machine_mode mode;
4486 enum machine_mode double_mode;
4488 /* Initialize the CONST_INT and memory attribute hash tables. */
4489 const_int_htab = htab_create (37, const_int_htab_hash,
4490 const_int_htab_eq, NULL);
4491 ggc_add_deletable_htab (const_int_htab, 0, 0);
4493 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4494 mem_attrs_htab_eq, NULL);
4495 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4497 no_line_numbers = ! line_numbers;
4499 /* Compute the word and byte modes. */
4501 byte_mode = VOIDmode;
4502 word_mode = VOIDmode;
4503 double_mode = VOIDmode;
4505 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4506 mode = GET_MODE_WIDER_MODE (mode))
4508 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4509 && byte_mode == VOIDmode)
4512 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4513 && word_mode == VOIDmode)
4517 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4518 mode = GET_MODE_WIDER_MODE (mode))
4520 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4521 && double_mode == VOIDmode)
4525 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4527 /* Assign register numbers to the globally defined register rtx.
4528 This must be done at runtime because the register number field
4529 is in a union and some compilers can't initialize unions. */
4531 pc_rtx = gen_rtx (PC, VOIDmode);
4532 cc0_rtx = gen_rtx (CC0, VOIDmode);
4533 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4534 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4535 if (hard_frame_pointer_rtx == 0)
4536 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4537 HARD_FRAME_POINTER_REGNUM);
4538 if (arg_pointer_rtx == 0)
4539 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4540 virtual_incoming_args_rtx =
4541 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4542 virtual_stack_vars_rtx =
4543 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4544 virtual_stack_dynamic_rtx =
4545 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4546 virtual_outgoing_args_rtx =
4547 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4548 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4550 /* These rtx must be roots if GC is enabled. */
4551 ggc_add_rtx_root (global_rtl, GR_MAX);
4553 #ifdef INIT_EXPANDERS
4554 /* This is to initialize {init|mark|free}_machine_status before the first
4555 call to push_function_context_to. This is needed by the Chill front
4556 end which calls push_function_context_to before the first cal to
4557 init_function_start. */
4561 /* Create the unique rtx's for certain rtx codes and operand values. */
4563 /* Don't use gen_rtx here since gen_rtx in this case
4564 tries to use these variables. */
4565 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4566 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4567 gen_rtx_raw_CONST_INT (VOIDmode, i);
4568 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4570 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4571 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4572 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4574 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4576 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4577 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4578 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4579 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4581 for (i = 0; i <= 2; i++)
4583 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4584 mode = GET_MODE_WIDER_MODE (mode))
4586 rtx tem = rtx_alloc (CONST_DOUBLE);
4587 union real_extract u;
4589 /* Zero any holes in a structure. */
4590 memset ((char *) &u, 0, sizeof u);
4591 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4593 /* Avoid trailing garbage in the rtx. */
4594 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4595 CONST_DOUBLE_LOW (tem) = 0;
4596 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4597 CONST_DOUBLE_HIGH (tem) = 0;
4599 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4600 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4601 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4602 PUT_MODE (tem, mode);
4604 const_tiny_rtx[i][(int) mode] = tem;
4607 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4609 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4610 mode = GET_MODE_WIDER_MODE (mode))
4611 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4613 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4615 mode = GET_MODE_WIDER_MODE (mode))
4616 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4619 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4620 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4621 const_tiny_rtx[0][i] = const0_rtx;
4623 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4624 if (STORE_FLAG_VALUE == 1)
4625 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4627 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4628 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4629 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4630 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4631 ggc_add_rtx_root (&const_true_rtx, 1);
4633 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4634 return_address_pointer_rtx
4635 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4639 struct_value_rtx = STRUCT_VALUE;
4641 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4644 #ifdef STRUCT_VALUE_INCOMING
4645 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4647 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4648 struct_value_incoming_rtx
4649 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4651 struct_value_incoming_rtx = struct_value_rtx;
4655 #ifdef STATIC_CHAIN_REGNUM
4656 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4658 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4659 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4660 static_chain_incoming_rtx
4661 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4664 static_chain_incoming_rtx = static_chain_rtx;
4668 static_chain_rtx = STATIC_CHAIN;
4670 #ifdef STATIC_CHAIN_INCOMING
4671 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4673 static_chain_incoming_rtx = static_chain_rtx;
4677 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4678 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4680 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4681 ggc_add_rtx_root (&struct_value_rtx, 1);
4682 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4683 ggc_add_rtx_root (&static_chain_rtx, 1);
4684 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4685 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4688 /* Query and clear/ restore no_line_numbers. This is used by the
4689 switch / case handling in stmt.c to give proper line numbers in
4690 warnings about unreachable code. */
4693 force_line_numbers ()
4695 int old = no_line_numbers;
4697 no_line_numbers = 0;
4699 force_next_line_note ();
4704 restore_line_number_status (old_value)
4707 no_line_numbers = old_value;