1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
47 #include "hard-reg-set.h"
48 #include "insn-config.h"
55 /* Commonly used modes. */
57 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
58 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
59 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
60 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
63 /* This is *not* reset after each function. It gives each CODE_LABEL
64 in the entire compilation a unique label number. */
66 static int label_num = 1;
68 /* Highest label number in current function.
69 Zero means use the value of label_num instead.
70 This is nonzero only when belatedly compiling an inline function. */
72 static int last_label_num;
74 /* Value label_num had when set_new_first_and_last_label_number was called.
75 If label_num has not changed since then, last_label_num is valid. */
77 static int base_label_num;
79 /* Nonzero means do not generate NOTEs for source line numbers. */
81 static int no_line_numbers;
83 /* Commonly used rtx's, so that we only need space for one copy.
84 These are initialized once for the entire compilation.
85 All of these except perhaps the floating-point CONST_DOUBLEs
86 are unique; no other rtx-object will be equal to any of these. */
88 rtx global_rtl[GR_MAX];
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
98 REAL_VALUE_TYPE dconst0;
99 REAL_VALUE_TYPE dconst1;
100 REAL_VALUE_TYPE dconst2;
101 REAL_VALUE_TYPE dconstm1;
103 /* All references to the following fixed hard registers go through
104 these unique rtl objects. On machines where the frame-pointer and
105 arg-pointer are the same register, they use the same unique object.
107 After register allocation, other rtl objects which used to be pseudo-regs
108 may be clobbered to refer to the frame-pointer register.
109 But references that were originally to the frame-pointer can be
110 distinguished from the others because they contain frame_pointer_rtx.
112 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
113 tricky: until register elimination has taken place hard_frame_pointer_rtx
114 should be used if it is being set, and frame_pointer_rtx otherwise. After
115 register elimination hard_frame_pointer_rtx should always be used.
116 On machines where the two registers are same (most) then these are the
119 In an inline procedure, the stack and frame pointer rtxs may not be
120 used for anything else. */
121 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
122 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
123 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
124 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
125 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
127 /* This is used to implement __builtin_return_address for some machines.
128 See for instance the MIPS port. */
129 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
131 /* We make one copy of (const_int C) where C is in
132 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
133 to save space during the compilation and simplify comparisons of
136 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
138 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
139 shortly thrown away. We use two mechanisms to prevent this waste:
141 For sizes up to 5 elements, we keep a SEQUENCE and its associated
142 rtvec for use by gen_sequence. One entry for each size is
143 sufficient because most cases are calls to gen_sequence followed by
144 immediately emitting the SEQUENCE. Reuse is safe since emitting a
145 sequence is destructive on the insn in it anyway and hence can't be
148 We do not bother to save this cached data over nested function calls.
149 Instead, we just reinitialize them. */
151 #define SEQUENCE_RESULT_SIZE 5
153 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
155 /* During RTL generation, we also keep a list of free INSN rtl codes. */
156 static rtx free_insn;
158 #define first_insn (current_function->emit->x_first_insn)
159 #define last_insn (current_function->emit->x_last_insn)
160 #define cur_insn_uid (current_function->emit->x_cur_insn_uid)
161 #define last_linenum (current_function->emit->x_last_linenum)
162 #define last_filename (current_function->emit->x_last_filename)
163 #define first_label_num (current_function->emit->x_first_label_num)
165 /* This is where the pointer to the obstack being used for RTL is stored. */
166 extern struct obstack *rtl_obstack;
168 static rtx make_jump_insn_raw PROTO((rtx));
169 static rtx make_call_insn_raw PROTO((rtx));
170 static rtx find_line_note PROTO((rtx));
171 static void mark_sequence_stack PROTO((struct sequence_stack *));
173 /* There are some RTL codes that require special attention; the generation
174 functions do the raw handling. If you add to this list, modify
175 special_rtx in gengenrtl.c as well. */
178 gen_rtx_CONST_INT (mode, arg)
179 enum machine_mode mode;
182 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
183 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
185 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
186 if (const_true_rtx && arg == STORE_FLAG_VALUE)
187 return const_true_rtx;
190 return gen_rtx_raw_CONST_INT (mode, arg);
193 /* CONST_DOUBLEs needs special handling because its length is known
196 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
197 enum machine_mode mode;
199 HOST_WIDE_INT arg1, arg2;
201 rtx r = rtx_alloc (CONST_DOUBLE);
206 X0EXP (r, 1) = NULL_RTX;
210 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
217 gen_rtx_REG (mode, regno)
218 enum machine_mode mode;
221 /* In case the MD file explicitly references the frame pointer, have
222 all such references point to the same frame pointer. This is
223 used during frame pointer elimination to distinguish the explicit
224 references to these registers from pseudos that happened to be
227 If we have eliminated the frame pointer or arg pointer, we will
228 be using it as a normal register, for example as a spill
229 register. In such cases, we might be accessing it in a mode that
230 is not Pmode and therefore cannot use the pre-allocated rtx.
232 Also don't do this when we are making new REGs in reload, since
233 we don't want to get confused with the real pointers. */
235 if (mode == Pmode && !reload_in_progress)
237 if (regno == FRAME_POINTER_REGNUM)
238 return frame_pointer_rtx;
239 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
240 if (regno == HARD_FRAME_POINTER_REGNUM)
241 return hard_frame_pointer_rtx;
243 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
244 if (regno == ARG_POINTER_REGNUM)
245 return arg_pointer_rtx;
247 #ifdef RETURN_ADDRESS_POINTER_REGNUM
248 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
249 return return_address_pointer_rtx;
251 if (regno == STACK_POINTER_REGNUM)
252 return stack_pointer_rtx;
255 return gen_rtx_raw_REG (mode, regno);
259 gen_rtx_MEM (mode, addr)
260 enum machine_mode mode;
263 rtx rt = gen_rtx_raw_MEM (mode, addr);
265 /* This field is not cleared by the mere allocation of the rtx, so
267 MEM_ALIAS_SET (rt) = 0;
272 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
274 ** This routine generates an RTX of the size specified by
275 ** <code>, which is an RTX code. The RTX structure is initialized
276 ** from the arguments <element1> through <elementn>, which are
277 ** interpreted according to the specific RTX type's format. The
278 ** special machine mode associated with the rtx (if any) is specified
281 ** gen_rtx can be invoked in a way which resembles the lisp-like
282 ** rtx it will generate. For example, the following rtx structure:
284 ** (plus:QI (mem:QI (reg:SI 1))
285 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
287 ** ...would be generated by the following C code:
289 ** gen_rtx (PLUS, QImode,
290 ** gen_rtx (MEM, QImode,
291 ** gen_rtx (REG, SImode, 1)),
292 ** gen_rtx (MEM, QImode,
293 ** gen_rtx (PLUS, SImode,
294 ** gen_rtx (REG, SImode, 2),
295 ** gen_rtx (REG, SImode, 3)))),
300 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
302 #ifndef ANSI_PROTOTYPES
304 enum machine_mode mode;
307 register int i; /* Array indices... */
308 register const char *fmt; /* Current rtx's format... */
309 register rtx rt_val; /* RTX to return to caller... */
313 #ifndef ANSI_PROTOTYPES
314 code = va_arg (p, enum rtx_code);
315 mode = va_arg (p, enum machine_mode);
321 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
326 rtx arg0 = va_arg (p, rtx);
327 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
328 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
329 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
334 rt_val = gen_rtx_REG (mode, va_arg (p, int));
338 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
342 rt_val = rtx_alloc (code); /* Allocate the storage space. */
343 rt_val->mode = mode; /* Store the machine mode... */
345 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
346 for (i = 0; i < GET_RTX_LENGTH (code); i++)
350 case '0': /* Unused field. */
353 case 'i': /* An integer? */
354 XINT (rt_val, i) = va_arg (p, int);
357 case 'w': /* A wide integer? */
358 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
361 case 's': /* A string? */
362 XSTR (rt_val, i) = va_arg (p, char *);
365 case 'e': /* An expression? */
366 case 'u': /* An insn? Same except when printing. */
367 XEXP (rt_val, i) = va_arg (p, rtx);
370 case 'E': /* An RTX vector? */
371 XVEC (rt_val, i) = va_arg (p, rtvec);
374 case 'b': /* A bitmap? */
375 XBITMAP (rt_val, i) = va_arg (p, bitmap);
378 case 't': /* A tree? */
379 XTREE (rt_val, i) = va_arg (p, tree);
393 /* gen_rtvec (n, [rt1, ..., rtn])
395 ** This routine creates an rtvec and stores within it the
396 ** pointers to rtx's which are its arguments.
401 gen_rtvec VPROTO((int n, ...))
403 #ifndef ANSI_PROTOTYPES
412 #ifndef ANSI_PROTOTYPES
417 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
419 vector = (rtx *) alloca (n * sizeof (rtx));
421 for (i = 0; i < n; i++)
422 vector[i] = va_arg (p, rtx);
425 return gen_rtvec_v (n, vector);
429 gen_rtvec_v (n, argp)
434 register rtvec rt_val;
437 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
439 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
441 for (i = 0; i < n; i++)
442 rt_val->elem[i] = *argp++;
448 /* Generate a REG rtx for a new pseudo register of mode MODE.
449 This pseudo is assigned the next sequential register number. */
453 enum machine_mode mode;
455 struct function *f = current_function;
458 /* Don't let anything called after initial flow analysis create new
463 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
464 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
466 /* For complex modes, don't make a single pseudo.
467 Instead, make a CONCAT of two pseudos.
468 This allows noncontiguous allocation of the real and imaginary parts,
469 which makes much better code. Besides, allocating DCmode
470 pseudos overstrains reload on some machines like the 386. */
471 rtx realpart, imagpart;
472 int size = GET_MODE_UNIT_SIZE (mode);
473 enum machine_mode partmode
474 = mode_for_size (size * BITS_PER_UNIT,
475 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
476 ? MODE_FLOAT : MODE_INT),
479 realpart = gen_reg_rtx (partmode);
480 imagpart = gen_reg_rtx (partmode);
481 return gen_rtx_CONCAT (mode, realpart, imagpart);
484 /* Make sure regno_pointer_flag and regno_reg_rtx are large
485 enough to have an element for this pseudo reg number. */
487 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
489 int old_size = f->emit->regno_pointer_flag_length;
492 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
493 memset (new + old_size, 0, old_size);
494 f->emit->regno_pointer_flag = new;
496 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
497 memset (new + old_size, 0, old_size);
498 f->emit->regno_pointer_align = new;
500 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
501 old_size * 2 * sizeof (rtx));
502 memset (new1 + old_size, 0, old_size * sizeof (rtx));
503 regno_reg_rtx = new1;
505 f->emit->regno_pointer_flag_length = old_size * 2;
508 val = gen_rtx_raw_REG (mode, reg_rtx_no);
509 regno_reg_rtx[reg_rtx_no++] = val;
513 /* Identify REG (which may be a CONCAT) as a user register. */
519 if (GET_CODE (reg) == CONCAT)
521 REG_USERVAR_P (XEXP (reg, 0)) = 1;
522 REG_USERVAR_P (XEXP (reg, 1)) = 1;
524 else if (GET_CODE (reg) == REG)
525 REG_USERVAR_P (reg) = 1;
530 /* Identify REG as a probable pointer register and show its alignment
531 as ALIGN, if nonzero. */
534 mark_reg_pointer (reg, align)
538 if (! REGNO_POINTER_FLAG (REGNO (reg)))
540 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
543 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
545 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
546 /* We can no-longer be sure just how aligned this pointer is */
547 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
550 /* Return 1 plus largest pseudo reg number used in the current function. */
558 /* Return 1 + the largest label number used so far in the current function. */
563 if (last_label_num && label_num == base_label_num)
564 return last_label_num;
568 /* Return first label number used in this function (if any were used). */
571 get_first_label_num ()
573 return first_label_num;
576 /* Return a value representing some low-order bits of X, where the number
577 of low-order bits is given by MODE. Note that no conversion is done
578 between floating-point and fixed-point values, rather, the bit
579 representation is returned.
581 This function handles the cases in common between gen_lowpart, below,
582 and two variants in cse.c and combine.c. These are the cases that can
583 be safely handled at all points in the compilation.
585 If this is not a case we can handle, return 0. */
588 gen_lowpart_common (mode, x)
589 enum machine_mode mode;
594 if (GET_MODE (x) == mode)
597 /* MODE must occupy no more words than the mode of X. */
598 if (GET_MODE (x) != VOIDmode
599 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
600 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
604 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
605 word = ((GET_MODE_SIZE (GET_MODE (x))
606 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
609 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
610 && (GET_MODE_CLASS (mode) == MODE_INT
611 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
613 /* If we are getting the low-order part of something that has been
614 sign- or zero-extended, we can either just use the object being
615 extended or make a narrower extension. If we want an even smaller
616 piece than the size of the object being extended, call ourselves
619 This case is used mostly by combine and cse. */
621 if (GET_MODE (XEXP (x, 0)) == mode)
623 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
624 return gen_lowpart_common (mode, XEXP (x, 0));
625 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
626 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
628 else if (GET_CODE (x) == SUBREG
629 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
630 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
631 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
633 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
634 else if (GET_CODE (x) == REG)
636 /* Let the backend decide how many registers to skip. This is needed
637 in particular for Sparc64 where fp regs are smaller than a word. */
638 /* ??? Note that subregs are now ambiguous, in that those against
639 pseudos are sized by the Word Size, while those against hard
640 regs are sized by the underlying register size. Better would be
641 to always interpret the subreg offset parameter as bytes or bits. */
643 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
644 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
645 - HARD_REGNO_NREGS (REGNO (x), mode));
647 /* If the register is not valid for MODE, return 0. If we don't
648 do this, there is no way to fix up the resulting REG later.
649 But we do do this if the current REG is not valid for its
650 mode. This latter is a kludge, but is required due to the
651 way that parameters are passed on some machines, most
653 if (REGNO (x) < FIRST_PSEUDO_REGISTER
654 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
655 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
657 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
658 /* integrate.c can't handle parts of a return value register. */
659 && (! REG_FUNCTION_VALUE_P (x)
660 || ! rtx_equal_function_value_matters)
661 #ifdef CLASS_CANNOT_CHANGE_SIZE
662 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
663 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
664 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
665 && (TEST_HARD_REG_BIT
666 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
669 /* We want to keep the stack, frame, and arg pointers
671 && x != frame_pointer_rtx
672 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
673 && x != arg_pointer_rtx
675 && x != stack_pointer_rtx)
676 return gen_rtx_REG (mode, REGNO (x) + word);
678 return gen_rtx_SUBREG (mode, x, word);
680 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
681 from the low-order part of the constant. */
682 else if ((GET_MODE_CLASS (mode) == MODE_INT
683 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
684 && GET_MODE (x) == VOIDmode
685 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
687 /* If MODE is twice the host word size, X is already the desired
688 representation. Otherwise, if MODE is wider than a word, we can't
689 do this. If MODE is exactly a word, return just one CONST_INT.
690 If MODE is smaller than a word, clear the bits that don't belong
691 in our mode, unless they and our sign bit are all one. So we get
692 either a reasonable negative value or a reasonable unsigned value
695 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
697 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
699 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
700 return (GET_CODE (x) == CONST_INT ? x
701 : GEN_INT (CONST_DOUBLE_LOW (x)));
704 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
705 int width = GET_MODE_BITSIZE (mode);
706 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
707 : CONST_DOUBLE_LOW (x));
709 /* Sign extend to HOST_WIDE_INT. */
710 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
712 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
717 /* If X is an integral constant but we want it in floating-point, it
718 must be the case that we have a union of an integer and a floating-point
719 value. If the machine-parameters allow it, simulate that union here
720 and return the result. The two-word and single-word cases are
723 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
724 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
725 || flag_pretend_float)
726 && GET_MODE_CLASS (mode) == MODE_FLOAT
727 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
728 && GET_CODE (x) == CONST_INT
729 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
730 #ifdef REAL_ARITHMETIC
736 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
737 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
741 union {HOST_WIDE_INT i; float d; } u;
744 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
747 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
748 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
749 || flag_pretend_float)
750 && GET_MODE_CLASS (mode) == MODE_FLOAT
751 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
752 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
753 && GET_MODE (x) == VOIDmode
754 && (sizeof (double) * HOST_BITS_PER_CHAR
755 == 2 * HOST_BITS_PER_WIDE_INT))
756 #ifdef REAL_ARITHMETIC
760 HOST_WIDE_INT low, high;
762 if (GET_CODE (x) == CONST_INT)
763 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
765 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
767 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
769 if (WORDS_BIG_ENDIAN)
770 i[0] = high, i[1] = low;
772 i[0] = low, i[1] = high;
774 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
775 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
779 union {HOST_WIDE_INT i[2]; double d; } u;
780 HOST_WIDE_INT low, high;
782 if (GET_CODE (x) == CONST_INT)
783 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
785 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
787 #ifdef HOST_WORDS_BIG_ENDIAN
788 u.i[0] = high, u.i[1] = low;
790 u.i[0] = low, u.i[1] = high;
793 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
797 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
798 same as sizeof (double) or when sizeof (float) is larger than the
799 size of a word on the target machine. */
800 #ifdef REAL_ARITHMETIC
801 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
807 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
808 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
810 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
811 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
812 || flag_pretend_float)
813 && GET_MODE_CLASS (mode) == MODE_FLOAT
814 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
815 && GET_CODE (x) == CONST_INT
816 && (sizeof (double) * HOST_BITS_PER_CHAR
817 == HOST_BITS_PER_WIDE_INT))
823 r = REAL_VALUE_FROM_TARGET_DOUBLE (&i);
824 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
828 /* Similarly, if this is converting a floating-point value into a
829 single-word integer. Only do this is the host and target parameters are
832 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
833 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
834 || flag_pretend_float)
835 && (GET_MODE_CLASS (mode) == MODE_INT
836 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
837 && GET_CODE (x) == CONST_DOUBLE
838 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
839 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
840 return operand_subword (x, word, 0, GET_MODE (x));
842 /* Similarly, if this is converting a floating-point value into a
843 two-word integer, we can do this one word at a time and make an
844 integer. Only do this is the host and target parameters are
847 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
848 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
849 || flag_pretend_float)
850 && (GET_MODE_CLASS (mode) == MODE_INT
851 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
852 && GET_CODE (x) == CONST_DOUBLE
853 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
854 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
857 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
859 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
861 if (lowpart && GET_CODE (lowpart) == CONST_INT
862 && highpart && GET_CODE (highpart) == CONST_INT)
863 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
866 /* Otherwise, we can't do this. */
870 /* Return the real part (which has mode MODE) of a complex value X.
871 This always comes at the low address in memory. */
874 gen_realpart (mode, x)
875 enum machine_mode mode;
878 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
880 else if (WORDS_BIG_ENDIAN
881 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
883 && REGNO (x) < FIRST_PSEUDO_REGISTER)
884 fatal ("Unable to access real part of complex value in a hard register on this target");
885 else if (WORDS_BIG_ENDIAN)
886 return gen_highpart (mode, x);
888 return gen_lowpart (mode, x);
891 /* Return the imaginary part (which has mode MODE) of a complex value X.
892 This always comes at the high address in memory. */
895 gen_imagpart (mode, x)
896 enum machine_mode mode;
899 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
901 else if (WORDS_BIG_ENDIAN)
902 return gen_lowpart (mode, x);
903 else if (!WORDS_BIG_ENDIAN
904 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
906 && REGNO (x) < FIRST_PSEUDO_REGISTER)
907 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
909 return gen_highpart (mode, x);
912 /* Return 1 iff X, assumed to be a SUBREG,
913 refers to the real part of the complex value in its containing reg.
914 Complex values are always stored with the real part in the first word,
915 regardless of WORDS_BIG_ENDIAN. */
918 subreg_realpart_p (x)
921 if (GET_CODE (x) != SUBREG)
924 return SUBREG_WORD (x) * UNITS_PER_WORD < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)));
927 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
928 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
929 least-significant part of X.
930 MODE specifies how big a part of X to return;
931 it usually should not be larger than a word.
932 If X is a MEM whose address is a QUEUED, the value may be so also. */
935 gen_lowpart (mode, x)
936 enum machine_mode mode;
939 rtx result = gen_lowpart_common (mode, x);
943 else if (GET_CODE (x) == REG)
945 /* Must be a hard reg that's not valid in MODE. */
946 result = gen_lowpart_common (mode, copy_to_reg (x));
951 else if (GET_CODE (x) == MEM)
953 /* The only additional case we can do is MEM. */
954 register int offset = 0;
955 if (WORDS_BIG_ENDIAN)
956 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
957 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
959 if (BYTES_BIG_ENDIAN)
960 /* Adjust the address so that the address-after-the-data
962 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
963 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
965 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
967 else if (GET_CODE (x) == ADDRESSOF)
968 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
973 /* Like `gen_lowpart', but refer to the most significant part.
974 This is used to access the imaginary part of a complex number. */
977 gen_highpart (mode, x)
978 enum machine_mode mode;
981 /* This case loses if X is a subreg. To catch bugs early,
982 complain if an invalid MODE is used even in other cases. */
983 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
984 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
986 if (GET_CODE (x) == CONST_DOUBLE
987 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
988 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
991 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
992 else if (GET_CODE (x) == CONST_INT)
994 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
996 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
998 else if (GET_CODE (x) == MEM)
1000 register int offset = 0;
1001 if (! WORDS_BIG_ENDIAN)
1002 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1003 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1005 if (! BYTES_BIG_ENDIAN
1006 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1007 offset -= (GET_MODE_SIZE (mode)
1008 - MIN (UNITS_PER_WORD,
1009 GET_MODE_SIZE (GET_MODE (x))));
1011 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1013 else if (GET_CODE (x) == SUBREG)
1015 /* The only time this should occur is when we are looking at a
1016 multi-word item with a SUBREG whose mode is the same as that of the
1017 item. It isn't clear what we would do if it wasn't. */
1018 if (SUBREG_WORD (x) != 0)
1020 return gen_highpart (mode, SUBREG_REG (x));
1022 else if (GET_CODE (x) == REG)
1026 /* Let the backend decide how many registers to skip. This is needed
1027 in particular for sparc64 where fp regs are smaller than a word. */
1028 /* ??? Note that subregs are now ambiguous, in that those against
1029 pseudos are sized by the word size, while those against hard
1030 regs are sized by the underlying register size. Better would be
1031 to always interpret the subreg offset parameter as bytes or bits. */
1033 if (WORDS_BIG_ENDIAN)
1035 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1036 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1037 - HARD_REGNO_NREGS (REGNO (x), mode));
1039 word = ((GET_MODE_SIZE (GET_MODE (x))
1040 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1043 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1044 /* integrate.c can't handle parts of a return value register. */
1045 && (! REG_FUNCTION_VALUE_P (x)
1046 || ! rtx_equal_function_value_matters)
1047 /* We want to keep the stack, frame, and arg pointers special. */
1048 && x != frame_pointer_rtx
1049 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1050 && x != arg_pointer_rtx
1052 && x != stack_pointer_rtx)
1053 return gen_rtx_REG (mode, REGNO (x) + word);
1055 return gen_rtx_SUBREG (mode, x, word);
1061 /* Return 1 iff X, assumed to be a SUBREG,
1062 refers to the least significant part of its containing reg.
1063 If X is not a SUBREG, always return 1 (it is its own low part!). */
1066 subreg_lowpart_p (x)
1069 if (GET_CODE (x) != SUBREG)
1071 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1074 if (WORDS_BIG_ENDIAN
1075 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1076 return (SUBREG_WORD (x)
1077 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1078 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1081 return SUBREG_WORD (x) == 0;
1084 /* Return subword I of operand OP.
1085 The word number, I, is interpreted as the word number starting at the
1086 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1087 otherwise it is the high-order word.
1089 If we cannot extract the required word, we return zero. Otherwise, an
1090 rtx corresponding to the requested word will be returned.
1092 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1093 reload has completed, a valid address will always be returned. After
1094 reload, if a valid address cannot be returned, we return zero.
1096 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1097 it is the responsibility of the caller.
1099 MODE is the mode of OP in case it is a CONST_INT. */
1102 operand_subword (op, i, validate_address, mode)
1105 int validate_address;
1106 enum machine_mode mode;
1109 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1111 if (mode == VOIDmode)
1112 mode = GET_MODE (op);
1114 if (mode == VOIDmode)
1117 /* If OP is narrower than a word, fail. */
1119 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1122 /* If we want a word outside OP, return zero. */
1124 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1127 /* If OP is already an integer word, return it. */
1128 if (GET_MODE_CLASS (mode) == MODE_INT
1129 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1132 /* If OP is a REG or SUBREG, we can handle it very simply. */
1133 if (GET_CODE (op) == REG)
1135 /* ??? There is a potential problem with this code. It does not
1136 properly handle extractions of a subword from a hard register
1137 that is larger than word_mode. Presumably the check for
1138 HARD_REGNO_MODE_OK catches these most of these cases. */
1140 /* If OP is a hard register, but OP + I is not a hard register,
1141 then extracting a subword is impossible.
1143 For example, consider if OP is the last hard register and it is
1144 larger than word_mode. If we wanted word N (for N > 0) because a
1145 part of that hard register was known to contain a useful value,
1146 then OP + I would refer to a pseudo, not the hard register we
1148 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1149 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1152 /* If the register is not valid for MODE, return 0. Note we
1153 have to check both OP and OP + I since they may refer to
1154 different parts of the register file.
1156 Consider if OP refers to the last 96bit FP register and we want
1157 subword 3 because that subword is known to contain a value we
1159 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1160 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1161 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1163 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1164 || (REG_FUNCTION_VALUE_P (op)
1165 && rtx_equal_function_value_matters)
1166 /* We want to keep the stack, frame, and arg pointers
1168 || op == frame_pointer_rtx
1169 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1170 || op == arg_pointer_rtx
1172 || op == stack_pointer_rtx)
1173 return gen_rtx_SUBREG (word_mode, op, i);
1175 return gen_rtx_REG (word_mode, REGNO (op) + i);
1177 else if (GET_CODE (op) == SUBREG)
1178 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1179 else if (GET_CODE (op) == CONCAT)
1181 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1183 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1184 return operand_subword (XEXP (op, 1), i - partwords,
1185 validate_address, mode);
1188 /* Form a new MEM at the requested address. */
1189 if (GET_CODE (op) == MEM)
1191 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1194 if (validate_address)
1196 if (reload_completed)
1198 if (! strict_memory_address_p (word_mode, addr))
1202 addr = memory_address (word_mode, addr);
1205 new = gen_rtx_MEM (word_mode, addr);
1207 MEM_COPY_ATTRIBUTES (new, op);
1208 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1209 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (op);
1214 /* The only remaining cases are when OP is a constant. If the host and
1215 target floating formats are the same, handling two-word floating
1216 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1217 are defined as returning one or two 32 bit values, respectively,
1218 and not values of BITS_PER_WORD bits. */
1219 #ifdef REAL_ARITHMETIC
1220 /* The output is some bits, the width of the target machine's word.
1221 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1223 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1224 && GET_MODE_CLASS (mode) == MODE_FLOAT
1225 && GET_MODE_BITSIZE (mode) == 64
1226 && GET_CODE (op) == CONST_DOUBLE)
1231 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1232 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1234 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1235 which the words are written depends on the word endianness.
1236 ??? This is a potential portability problem and should
1237 be fixed at some point.
1239 We must excercise caution with the sign bit. By definition there
1240 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1241 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1242 So we explicitly mask and sign-extend as necessary. */
1243 if (BITS_PER_WORD == 32)
1246 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1247 return GEN_INT (val);
1249 #if HOST_BITS_PER_WIDE_INT >= 64
1250 else if (BITS_PER_WORD >= 64 && i == 0)
1252 val = k[! WORDS_BIG_ENDIAN];
1253 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1254 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1255 return GEN_INT (val);
1258 else if (BITS_PER_WORD == 16)
1261 if ((i & 1) == !WORDS_BIG_ENDIAN)
1264 return GEN_INT (val);
1269 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1270 && GET_MODE_CLASS (mode) == MODE_FLOAT
1271 && GET_MODE_BITSIZE (mode) > 64
1272 && GET_CODE (op) == CONST_DOUBLE)
1277 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1278 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1280 if (BITS_PER_WORD == 32)
1283 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1284 return GEN_INT (val);
1289 #else /* no REAL_ARITHMETIC */
1290 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1291 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1292 || flag_pretend_float)
1293 && GET_MODE_CLASS (mode) == MODE_FLOAT
1294 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1295 && GET_CODE (op) == CONST_DOUBLE)
1297 /* The constant is stored in the host's word-ordering,
1298 but we want to access it in the target's word-ordering. Some
1299 compilers don't like a conditional inside macro args, so we have two
1300 copies of the return. */
1301 #ifdef HOST_WORDS_BIG_ENDIAN
1302 return GEN_INT (i == WORDS_BIG_ENDIAN
1303 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1305 return GEN_INT (i != WORDS_BIG_ENDIAN
1306 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1309 #endif /* no REAL_ARITHMETIC */
1311 /* Single word float is a little harder, since single- and double-word
1312 values often do not have the same high-order bits. We have already
1313 verified that we want the only defined word of the single-word value. */
1314 #ifdef REAL_ARITHMETIC
1315 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1316 && GET_MODE_BITSIZE (mode) == 32
1317 && GET_CODE (op) == CONST_DOUBLE)
1322 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1323 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1325 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1327 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1329 if (BITS_PER_WORD == 16)
1331 if ((i & 1) == !WORDS_BIG_ENDIAN)
1336 return GEN_INT (val);
1339 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1340 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1341 || flag_pretend_float)
1342 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1343 && GET_MODE_CLASS (mode) == MODE_FLOAT
1344 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1345 && GET_CODE (op) == CONST_DOUBLE)
1348 union {float f; HOST_WIDE_INT i; } u;
1350 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1353 return GEN_INT (u.i);
1355 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1356 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1357 || flag_pretend_float)
1358 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1359 && GET_MODE_CLASS (mode) == MODE_FLOAT
1360 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1361 && GET_CODE (op) == CONST_DOUBLE)
1364 union {double d; HOST_WIDE_INT i; } u;
1366 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1369 return GEN_INT (u.i);
1371 #endif /* no REAL_ARITHMETIC */
1373 /* The only remaining cases that we can handle are integers.
1374 Convert to proper endianness now since these cases need it.
1375 At this point, i == 0 means the low-order word.
1377 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1378 in general. However, if OP is (const_int 0), we can just return
1381 if (op == const0_rtx)
1384 if (GET_MODE_CLASS (mode) != MODE_INT
1385 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1386 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1389 if (WORDS_BIG_ENDIAN)
1390 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1392 /* Find out which word on the host machine this value is in and get
1393 it from the constant. */
1394 val = (i / size_ratio == 0
1395 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1396 : (GET_CODE (op) == CONST_INT
1397 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1399 /* Get the value we want into the low bits of val. */
1400 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1401 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1403 val = trunc_int_for_mode (val, word_mode);
1405 return GEN_INT (val);
1408 /* Similar to `operand_subword', but never return 0. If we can't extract
1409 the required subword, put OP into a register and try again. If that fails,
1410 abort. We always validate the address in this case. It is not valid
1411 to call this function after reload; it is mostly meant for RTL
1414 MODE is the mode of OP, in case it is CONST_INT. */
1417 operand_subword_force (op, i, mode)
1420 enum machine_mode mode;
1422 rtx result = operand_subword (op, i, 1, mode);
1427 if (mode != BLKmode && mode != VOIDmode)
1429 /* If this is a register which can not be accessed by words, copy it
1430 to a pseudo register. */
1431 if (GET_CODE (op) == REG)
1432 op = copy_to_reg (op);
1434 op = force_reg (mode, op);
1437 result = operand_subword (op, i, 1, mode);
1444 /* Given a compare instruction, swap the operands.
1445 A test instruction is changed into a compare of 0 against the operand. */
1448 reverse_comparison (insn)
1451 rtx body = PATTERN (insn);
1454 if (GET_CODE (body) == SET)
1455 comp = SET_SRC (body);
1457 comp = SET_SRC (XVECEXP (body, 0, 0));
1459 if (GET_CODE (comp) == COMPARE)
1461 rtx op0 = XEXP (comp, 0);
1462 rtx op1 = XEXP (comp, 1);
1463 XEXP (comp, 0) = op1;
1464 XEXP (comp, 1) = op0;
1468 rtx new = gen_rtx_COMPARE (VOIDmode,
1469 CONST0_RTX (GET_MODE (comp)), comp);
1470 if (GET_CODE (body) == SET)
1471 SET_SRC (body) = new;
1473 SET_SRC (XVECEXP (body, 0, 0)) = new;
1477 /* Return a memory reference like MEMREF, but with its mode changed
1478 to MODE and its address changed to ADDR.
1479 (VOIDmode means don't change the mode.
1480 NULL for ADDR means don't change the address.) */
1483 change_address (memref, mode, addr)
1485 enum machine_mode mode;
1490 if (GET_CODE (memref) != MEM)
1492 if (mode == VOIDmode)
1493 mode = GET_MODE (memref);
1495 addr = XEXP (memref, 0);
1497 /* If reload is in progress or has completed, ADDR must be valid.
1498 Otherwise, we can call memory_address to make it valid. */
1499 if (reload_completed || reload_in_progress)
1501 if (! memory_address_p (mode, addr))
1505 addr = memory_address (mode, addr);
1507 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1510 new = gen_rtx_MEM (mode, addr);
1511 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1512 MEM_COPY_ATTRIBUTES (new, memref);
1513 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (memref);
1517 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1524 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1525 NULL_RTX, label_num++, NULL_PTR);
1527 LABEL_NUSES (label) = 0;
1531 /* For procedure integration. */
1533 /* Install new pointers to the first and last insns in the chain.
1534 Also, set cur_insn_uid to one higher than the last in use.
1535 Used for an inline-procedure after copying the insn chain. */
1538 set_new_first_and_last_insn (first, last)
1547 for (insn = first; insn; insn = NEXT_INSN (insn))
1548 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1553 /* Set the range of label numbers found in the current function.
1554 This is used when belatedly compiling an inline function. */
1557 set_new_first_and_last_label_num (first, last)
1560 base_label_num = label_num;
1561 first_label_num = first;
1562 last_label_num = last;
1565 /* Set the last label number found in the current function.
1566 This is used when belatedly compiling an inline function. */
1569 set_new_last_label_num (last)
1572 base_label_num = label_num;
1573 last_label_num = last;
1576 /* Restore all variables describing the current status from the structure *P.
1577 This is used after a nested function. */
1580 restore_emit_status (p)
1584 clear_emit_caches ();
1587 /* Clear out all parts of the state in F that can safely be discarded
1588 after the function has been compiled, to let garbage collection
1589 reclaim the memory. */
1592 free_emit_status (f)
1595 free (f->emit->x_regno_reg_rtx);
1596 free (f->emit->regno_pointer_flag);
1597 free (f->emit->regno_pointer_align);
1602 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1603 It does not work to do this twice, because the mark bits set here
1604 are not cleared afterwards. */
1607 unshare_all_rtl (insn)
1610 for (; insn; insn = NEXT_INSN (insn))
1611 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1612 || GET_CODE (insn) == CALL_INSN)
1614 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1615 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1616 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1619 /* Make sure the addresses of stack slots found outside the insn chain
1620 (such as, in DECL_RTL of a variable) are not shared
1621 with the insn chain.
1623 This special care is necessary when the stack slot MEM does not
1624 actually appear in the insn chain. If it does appear, its address
1625 is unshared from all else at that point. */
1627 copy_rtx_if_shared (stack_slot_list);
1630 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1631 Recursively does the same for subexpressions. */
1634 copy_rtx_if_shared (orig)
1637 register rtx x = orig;
1639 register enum rtx_code code;
1640 register const char *format_ptr;
1646 code = GET_CODE (x);
1648 /* These types may be freely shared. */
1661 /* SCRATCH must be shared because they represent distinct values. */
1665 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1666 a LABEL_REF, it isn't sharable. */
1667 if (GET_CODE (XEXP (x, 0)) == PLUS
1668 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1669 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1678 /* The chain of insns is not being copied. */
1682 /* A MEM is allowed to be shared if its address is constant.
1684 We used to allow sharing of MEMs which referenced
1685 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1686 that can lose. instantiate_virtual_regs will not unshare
1687 the MEMs, and combine may change the structure of the address
1688 because it looks safe and profitable in one context, but
1689 in some other context it creates unrecognizable RTL. */
1690 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1699 /* This rtx may not be shared. If it has already been seen,
1700 replace it with a copy of itself. */
1706 copy = rtx_alloc (code);
1707 bcopy ((char *) x, (char *) copy,
1708 (sizeof (*copy) - sizeof (copy->fld)
1709 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1715 /* Now scan the subexpressions recursively.
1716 We can store any replaced subexpressions directly into X
1717 since we know X is not shared! Any vectors in X
1718 must be copied if X was copied. */
1720 format_ptr = GET_RTX_FORMAT (code);
1722 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1724 switch (*format_ptr++)
1727 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1731 if (XVEC (x, i) != NULL)
1734 int len = XVECLEN (x, i);
1736 if (copied && len > 0)
1737 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1738 for (j = 0; j < len; j++)
1739 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1747 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1748 to look for shared sub-parts. */
1751 reset_used_flags (x)
1755 register enum rtx_code code;
1756 register const char *format_ptr;
1761 code = GET_CODE (x);
1763 /* These types may be freely shared so we needn't do any resetting
1784 /* The chain of insns is not being copied. */
1793 format_ptr = GET_RTX_FORMAT (code);
1794 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1796 switch (*format_ptr++)
1799 reset_used_flags (XEXP (x, i));
1803 for (j = 0; j < XVECLEN (x, i); j++)
1804 reset_used_flags (XVECEXP (x, i, j));
1810 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1811 Return X or the rtx for the pseudo reg the value of X was copied into.
1812 OTHER must be valid as a SET_DEST. */
1815 make_safe_from (x, other)
1819 switch (GET_CODE (other))
1822 other = SUBREG_REG (other);
1824 case STRICT_LOW_PART:
1827 other = XEXP (other, 0);
1833 if ((GET_CODE (other) == MEM
1835 && GET_CODE (x) != REG
1836 && GET_CODE (x) != SUBREG)
1837 || (GET_CODE (other) == REG
1838 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1839 || reg_mentioned_p (other, x))))
1841 rtx temp = gen_reg_rtx (GET_MODE (x));
1842 emit_move_insn (temp, x);
1848 /* Emission of insns (adding them to the doubly-linked list). */
1850 /* Return the first insn of the current sequence or current function. */
1858 /* Return the last insn emitted in current sequence or current function. */
1866 /* Specify a new insn as the last in the chain. */
1869 set_last_insn (insn)
1872 if (NEXT_INSN (insn) != 0)
1877 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1880 get_last_insn_anywhere ()
1882 struct sequence_stack *stack;
1885 for (stack = seq_stack; stack; stack = stack->next)
1886 if (stack->last != 0)
1891 /* Return a number larger than any instruction's uid in this function. */
1896 return cur_insn_uid;
1899 /* Return the next insn. If it is a SEQUENCE, return the first insn
1908 insn = NEXT_INSN (insn);
1909 if (insn && GET_CODE (insn) == INSN
1910 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1911 insn = XVECEXP (PATTERN (insn), 0, 0);
1917 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1921 previous_insn (insn)
1926 insn = PREV_INSN (insn);
1927 if (insn && GET_CODE (insn) == INSN
1928 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1929 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1935 /* Return the next insn after INSN that is not a NOTE. This routine does not
1936 look inside SEQUENCEs. */
1939 next_nonnote_insn (insn)
1944 insn = NEXT_INSN (insn);
1945 if (insn == 0 || GET_CODE (insn) != NOTE)
1952 /* Return the previous insn before INSN that is not a NOTE. This routine does
1953 not look inside SEQUENCEs. */
1956 prev_nonnote_insn (insn)
1961 insn = PREV_INSN (insn);
1962 if (insn == 0 || GET_CODE (insn) != NOTE)
1969 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1970 or 0, if there is none. This routine does not look inside
1974 next_real_insn (insn)
1979 insn = NEXT_INSN (insn);
1980 if (insn == 0 || GET_CODE (insn) == INSN
1981 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1988 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1989 or 0, if there is none. This routine does not look inside
1993 prev_real_insn (insn)
1998 insn = PREV_INSN (insn);
1999 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2000 || GET_CODE (insn) == JUMP_INSN)
2007 /* Find the next insn after INSN that really does something. This routine
2008 does not look inside SEQUENCEs. Until reload has completed, this is the
2009 same as next_real_insn. */
2012 next_active_insn (insn)
2017 insn = NEXT_INSN (insn);
2019 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2020 || (GET_CODE (insn) == INSN
2021 && (! reload_completed
2022 || (GET_CODE (PATTERN (insn)) != USE
2023 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2030 /* Find the last insn before INSN that really does something. This routine
2031 does not look inside SEQUENCEs. Until reload has completed, this is the
2032 same as prev_real_insn. */
2035 prev_active_insn (insn)
2040 insn = PREV_INSN (insn);
2042 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2043 || (GET_CODE (insn) == INSN
2044 && (! reload_completed
2045 || (GET_CODE (PATTERN (insn)) != USE
2046 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2053 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2061 insn = NEXT_INSN (insn);
2062 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2069 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2077 insn = PREV_INSN (insn);
2078 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2086 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2087 and REG_CC_USER notes so we can find it. */
2090 link_cc0_insns (insn)
2093 rtx user = next_nonnote_insn (insn);
2095 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2096 user = XVECEXP (PATTERN (user), 0, 0);
2098 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2100 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2103 /* Return the next insn that uses CC0 after INSN, which is assumed to
2104 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2105 applied to the result of this function should yield INSN).
2107 Normally, this is simply the next insn. However, if a REG_CC_USER note
2108 is present, it contains the insn that uses CC0.
2110 Return 0 if we can't find the insn. */
2113 next_cc0_user (insn)
2116 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2119 return XEXP (note, 0);
2121 insn = next_nonnote_insn (insn);
2122 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2123 insn = XVECEXP (PATTERN (insn), 0, 0);
2125 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2126 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2132 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2133 note, it is the previous insn. */
2136 prev_cc0_setter (insn)
2139 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2142 return XEXP (note, 0);
2144 insn = prev_nonnote_insn (insn);
2145 if (! sets_cc0_p (PATTERN (insn)))
2152 /* Try splitting insns that can be split for better scheduling.
2153 PAT is the pattern which might split.
2154 TRIAL is the insn providing PAT.
2155 LAST is non-zero if we should return the last insn of the sequence produced.
2157 If this routine succeeds in splitting, it returns the first or last
2158 replacement insn depending on the value of LAST. Otherwise, it
2159 returns TRIAL. If the insn to be returned can be split, it will be. */
2162 try_split (pat, trial, last)
2166 rtx before = PREV_INSN (trial);
2167 rtx after = NEXT_INSN (trial);
2168 rtx seq = split_insns (pat, trial);
2169 int has_barrier = 0;
2172 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2173 We may need to handle this specially. */
2174 if (after && GET_CODE (after) == BARRIER)
2177 after = NEXT_INSN (after);
2182 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2183 The latter case will normally arise only when being done so that
2184 it, in turn, will be split (SFmode on the 29k is an example). */
2185 if (GET_CODE (seq) == SEQUENCE)
2187 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2188 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2189 increment the usage count so we don't delete the label. */
2192 if (GET_CODE (trial) == JUMP_INSN)
2193 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2194 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2196 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2198 if (JUMP_LABEL (trial))
2199 LABEL_NUSES (JUMP_LABEL (trial))++;
2202 tem = emit_insn_after (seq, before);
2204 delete_insn (trial);
2206 emit_barrier_after (tem);
2208 /* Recursively call try_split for each new insn created; by the
2209 time control returns here that insn will be fully split, so
2210 set LAST and continue from the insn after the one returned.
2211 We can't use next_active_insn here since AFTER may be a note.
2212 Ignore deleted insns, which can be occur if not optimizing. */
2213 for (tem = NEXT_INSN (before); tem != after;
2214 tem = NEXT_INSN (tem))
2215 if (! INSN_DELETED_P (tem)
2216 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2217 tem = try_split (PATTERN (tem), tem, 1);
2219 /* Avoid infinite loop if the result matches the original pattern. */
2220 else if (rtx_equal_p (seq, pat))
2224 PATTERN (trial) = seq;
2225 INSN_CODE (trial) = -1;
2226 try_split (seq, trial, last);
2229 /* Return either the first or the last insn, depending on which was
2231 return last ? prev_active_insn (after) : next_active_insn (before);
2237 /* Make and return an INSN rtx, initializing all its slots.
2238 Store PATTERN in the pattern slots. */
2241 make_insn_raw (pattern)
2246 /* If in RTL generation phase, see if FREE_INSN can be used. */
2247 if (!ggc_p && free_insn != 0 && rtx_equal_function_value_matters)
2250 free_insn = NEXT_INSN (free_insn);
2251 PUT_CODE (insn, INSN);
2254 insn = rtx_alloc (INSN);
2256 INSN_UID (insn) = cur_insn_uid++;
2257 PATTERN (insn) = pattern;
2258 INSN_CODE (insn) = -1;
2259 LOG_LINKS (insn) = NULL;
2260 REG_NOTES (insn) = NULL;
2265 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2268 make_jump_insn_raw (pattern)
2273 insn = rtx_alloc (JUMP_INSN);
2274 INSN_UID (insn) = cur_insn_uid++;
2276 PATTERN (insn) = pattern;
2277 INSN_CODE (insn) = -1;
2278 LOG_LINKS (insn) = NULL;
2279 REG_NOTES (insn) = NULL;
2280 JUMP_LABEL (insn) = NULL;
2285 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2288 make_call_insn_raw (pattern)
2293 insn = rtx_alloc (CALL_INSN);
2294 INSN_UID (insn) = cur_insn_uid++;
2296 PATTERN (insn) = pattern;
2297 INSN_CODE (insn) = -1;
2298 LOG_LINKS (insn) = NULL;
2299 REG_NOTES (insn) = NULL;
2300 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2305 /* Add INSN to the end of the doubly-linked list.
2306 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2312 PREV_INSN (insn) = last_insn;
2313 NEXT_INSN (insn) = 0;
2315 if (NULL != last_insn)
2316 NEXT_INSN (last_insn) = insn;
2318 if (NULL == first_insn)
2324 /* Add INSN into the doubly-linked list after insn AFTER. This and
2325 the next should be the only functions called to insert an insn once
2326 delay slots have been filled since only they know how to update a
2330 add_insn_after (insn, after)
2333 rtx next = NEXT_INSN (after);
2335 if (optimize && INSN_DELETED_P (after))
2338 NEXT_INSN (insn) = next;
2339 PREV_INSN (insn) = after;
2343 PREV_INSN (next) = insn;
2344 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2345 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2347 else if (last_insn == after)
2351 struct sequence_stack *stack = seq_stack;
2352 /* Scan all pending sequences too. */
2353 for (; stack; stack = stack->next)
2354 if (after == stack->last)
2364 NEXT_INSN (after) = insn;
2365 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2367 rtx sequence = PATTERN (after);
2368 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2372 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2373 the previous should be the only functions called to insert an insn once
2374 delay slots have been filled since only they know how to update a
2378 add_insn_before (insn, before)
2381 rtx prev = PREV_INSN (before);
2383 if (optimize && INSN_DELETED_P (before))
2386 PREV_INSN (insn) = prev;
2387 NEXT_INSN (insn) = before;
2391 NEXT_INSN (prev) = insn;
2392 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2394 rtx sequence = PATTERN (prev);
2395 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2398 else if (first_insn == before)
2402 struct sequence_stack *stack = seq_stack;
2403 /* Scan all pending sequences too. */
2404 for (; stack; stack = stack->next)
2405 if (before == stack->first)
2407 stack->first = insn;
2415 PREV_INSN (before) = insn;
2416 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2417 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2420 /* Remove an insn from its doubly-linked list. This function knows how
2421 to handle sequences. */
2426 rtx next = NEXT_INSN (insn);
2427 rtx prev = PREV_INSN (insn);
2430 NEXT_INSN (prev) = next;
2431 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2433 rtx sequence = PATTERN (prev);
2434 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2437 else if (first_insn == insn)
2441 struct sequence_stack *stack = seq_stack;
2442 /* Scan all pending sequences too. */
2443 for (; stack; stack = stack->next)
2444 if (insn == stack->first)
2446 stack->first = next;
2456 PREV_INSN (next) = prev;
2457 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2458 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2460 else if (last_insn == insn)
2464 struct sequence_stack *stack = seq_stack;
2465 /* Scan all pending sequences too. */
2466 for (; stack; stack = stack->next)
2467 if (insn == stack->last)
2478 /* Delete all insns made since FROM.
2479 FROM becomes the new last instruction. */
2482 delete_insns_since (from)
2488 NEXT_INSN (from) = 0;
2492 /* This function is deprecated, please use sequences instead.
2494 Move a consecutive bunch of insns to a different place in the chain.
2495 The insns to be moved are those between FROM and TO.
2496 They are moved to a new position after the insn AFTER.
2497 AFTER must not be FROM or TO or any insn in between.
2499 This function does not know about SEQUENCEs and hence should not be
2500 called after delay-slot filling has been done. */
2503 reorder_insns (from, to, after)
2504 rtx from, to, after;
2506 /* Splice this bunch out of where it is now. */
2507 if (PREV_INSN (from))
2508 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2510 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2511 if (last_insn == to)
2512 last_insn = PREV_INSN (from);
2513 if (first_insn == from)
2514 first_insn = NEXT_INSN (to);
2516 /* Make the new neighbors point to it and it to them. */
2517 if (NEXT_INSN (after))
2518 PREV_INSN (NEXT_INSN (after)) = to;
2520 NEXT_INSN (to) = NEXT_INSN (after);
2521 PREV_INSN (from) = after;
2522 NEXT_INSN (after) = from;
2523 if (after == last_insn)
2527 /* Return the line note insn preceding INSN. */
2530 find_line_note (insn)
2533 if (no_line_numbers)
2536 for (; insn; insn = PREV_INSN (insn))
2537 if (GET_CODE (insn) == NOTE
2538 && NOTE_LINE_NUMBER (insn) >= 0)
2544 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2545 of the moved insns when debugging. This may insert a note between AFTER
2546 and FROM, and another one after TO. */
2549 reorder_insns_with_line_notes (from, to, after)
2550 rtx from, to, after;
2552 rtx from_line = find_line_note (from);
2553 rtx after_line = find_line_note (after);
2555 reorder_insns (from, to, after);
2557 if (from_line == after_line)
2561 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2562 NOTE_LINE_NUMBER (from_line),
2565 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2566 NOTE_LINE_NUMBER (after_line),
2570 /* Emit an insn of given code and pattern
2571 at a specified place within the doubly-linked list. */
2573 /* Make an instruction with body PATTERN
2574 and output it before the instruction BEFORE. */
2577 emit_insn_before (pattern, before)
2578 register rtx pattern, before;
2580 register rtx insn = before;
2582 if (GET_CODE (pattern) == SEQUENCE)
2586 for (i = 0; i < XVECLEN (pattern, 0); i++)
2588 insn = XVECEXP (pattern, 0, i);
2589 add_insn_before (insn, before);
2591 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2592 sequence_result[XVECLEN (pattern, 0)] = pattern;
2596 insn = make_insn_raw (pattern);
2597 add_insn_before (insn, before);
2603 /* Make an instruction with body PATTERN and code JUMP_INSN
2604 and output it before the instruction BEFORE. */
2607 emit_jump_insn_before (pattern, before)
2608 register rtx pattern, before;
2612 if (GET_CODE (pattern) == SEQUENCE)
2613 insn = emit_insn_before (pattern, before);
2616 insn = make_jump_insn_raw (pattern);
2617 add_insn_before (insn, before);
2623 /* Make an instruction with body PATTERN and code CALL_INSN
2624 and output it before the instruction BEFORE. */
2627 emit_call_insn_before (pattern, before)
2628 register rtx pattern, before;
2632 if (GET_CODE (pattern) == SEQUENCE)
2633 insn = emit_insn_before (pattern, before);
2636 insn = make_call_insn_raw (pattern);
2637 add_insn_before (insn, before);
2638 PUT_CODE (insn, CALL_INSN);
2644 /* Make an insn of code BARRIER
2645 and output it before the insn BEFORE. */
2648 emit_barrier_before (before)
2649 register rtx before;
2651 register rtx insn = rtx_alloc (BARRIER);
2653 INSN_UID (insn) = cur_insn_uid++;
2655 add_insn_before (insn, before);
2659 /* Emit the label LABEL before the insn BEFORE. */
2662 emit_label_before (label, before)
2665 /* This can be called twice for the same label as a result of the
2666 confusion that follows a syntax error! So make it harmless. */
2667 if (INSN_UID (label) == 0)
2669 INSN_UID (label) = cur_insn_uid++;
2670 add_insn_before (label, before);
2676 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2679 emit_note_before (subtype, before)
2683 register rtx note = rtx_alloc (NOTE);
2684 INSN_UID (note) = cur_insn_uid++;
2685 NOTE_SOURCE_FILE (note) = 0;
2686 NOTE_LINE_NUMBER (note) = subtype;
2688 add_insn_before (note, before);
2692 /* Make an insn of code INSN with body PATTERN
2693 and output it after the insn AFTER. */
2696 emit_insn_after (pattern, after)
2697 register rtx pattern, after;
2699 register rtx insn = after;
2701 if (GET_CODE (pattern) == SEQUENCE)
2705 for (i = 0; i < XVECLEN (pattern, 0); i++)
2707 insn = XVECEXP (pattern, 0, i);
2708 add_insn_after (insn, after);
2711 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2712 sequence_result[XVECLEN (pattern, 0)] = pattern;
2716 insn = make_insn_raw (pattern);
2717 add_insn_after (insn, after);
2723 /* Similar to emit_insn_after, except that line notes are to be inserted so
2724 as to act as if this insn were at FROM. */
2727 emit_insn_after_with_line_notes (pattern, after, from)
2728 rtx pattern, after, from;
2730 rtx from_line = find_line_note (from);
2731 rtx after_line = find_line_note (after);
2732 rtx insn = emit_insn_after (pattern, after);
2735 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2736 NOTE_LINE_NUMBER (from_line),
2740 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2741 NOTE_LINE_NUMBER (after_line),
2745 /* Make an insn of code JUMP_INSN with body PATTERN
2746 and output it after the insn AFTER. */
2749 emit_jump_insn_after (pattern, after)
2750 register rtx pattern, after;
2754 if (GET_CODE (pattern) == SEQUENCE)
2755 insn = emit_insn_after (pattern, after);
2758 insn = make_jump_insn_raw (pattern);
2759 add_insn_after (insn, after);
2765 /* Make an insn of code BARRIER
2766 and output it after the insn AFTER. */
2769 emit_barrier_after (after)
2772 register rtx insn = rtx_alloc (BARRIER);
2774 INSN_UID (insn) = cur_insn_uid++;
2776 add_insn_after (insn, after);
2780 /* Emit the label LABEL after the insn AFTER. */
2783 emit_label_after (label, after)
2786 /* This can be called twice for the same label
2787 as a result of the confusion that follows a syntax error!
2788 So make it harmless. */
2789 if (INSN_UID (label) == 0)
2791 INSN_UID (label) = cur_insn_uid++;
2792 add_insn_after (label, after);
2798 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2801 emit_note_after (subtype, after)
2805 register rtx note = rtx_alloc (NOTE);
2806 INSN_UID (note) = cur_insn_uid++;
2807 NOTE_SOURCE_FILE (note) = 0;
2808 NOTE_LINE_NUMBER (note) = subtype;
2809 add_insn_after (note, after);
2813 /* Emit a line note for FILE and LINE after the insn AFTER. */
2816 emit_line_note_after (file, line, after)
2823 if (no_line_numbers && line > 0)
2829 note = rtx_alloc (NOTE);
2830 INSN_UID (note) = cur_insn_uid++;
2831 NOTE_SOURCE_FILE (note) = file;
2832 NOTE_LINE_NUMBER (note) = line;
2833 add_insn_after (note, after);
2837 /* Make an insn of code INSN with pattern PATTERN
2838 and add it to the end of the doubly-linked list.
2839 If PATTERN is a SEQUENCE, take the elements of it
2840 and emit an insn for each element.
2842 Returns the last insn emitted. */
2848 rtx insn = last_insn;
2850 if (GET_CODE (pattern) == SEQUENCE)
2854 for (i = 0; i < XVECLEN (pattern, 0); i++)
2856 insn = XVECEXP (pattern, 0, i);
2859 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2860 sequence_result[XVECLEN (pattern, 0)] = pattern;
2864 insn = make_insn_raw (pattern);
2871 /* Emit the insns in a chain starting with INSN.
2872 Return the last insn emitted. */
2882 rtx next = NEXT_INSN (insn);
2891 /* Emit the insns in a chain starting with INSN and place them in front of
2892 the insn BEFORE. Return the last insn emitted. */
2895 emit_insns_before (insn, before)
2903 rtx next = NEXT_INSN (insn);
2904 add_insn_before (insn, before);
2912 /* Emit the insns in a chain starting with FIRST and place them in back of
2913 the insn AFTER. Return the last insn emitted. */
2916 emit_insns_after (first, after)
2921 register rtx after_after;
2929 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2932 after_after = NEXT_INSN (after);
2934 NEXT_INSN (after) = first;
2935 PREV_INSN (first) = after;
2936 NEXT_INSN (last) = after_after;
2938 PREV_INSN (after_after) = last;
2940 if (after == last_insn)
2945 /* Make an insn of code JUMP_INSN with pattern PATTERN
2946 and add it to the end of the doubly-linked list. */
2949 emit_jump_insn (pattern)
2952 if (GET_CODE (pattern) == SEQUENCE)
2953 return emit_insn (pattern);
2956 register rtx insn = make_jump_insn_raw (pattern);
2962 /* Make an insn of code CALL_INSN with pattern PATTERN
2963 and add it to the end of the doubly-linked list. */
2966 emit_call_insn (pattern)
2969 if (GET_CODE (pattern) == SEQUENCE)
2970 return emit_insn (pattern);
2973 register rtx insn = make_call_insn_raw (pattern);
2975 PUT_CODE (insn, CALL_INSN);
2980 /* Add the label LABEL to the end of the doubly-linked list. */
2986 /* This can be called twice for the same label
2987 as a result of the confusion that follows a syntax error!
2988 So make it harmless. */
2989 if (INSN_UID (label) == 0)
2991 INSN_UID (label) = cur_insn_uid++;
2997 /* Make an insn of code BARRIER
2998 and add it to the end of the doubly-linked list. */
3003 register rtx barrier = rtx_alloc (BARRIER);
3004 INSN_UID (barrier) = cur_insn_uid++;
3009 /* Make an insn of code NOTE
3010 with data-fields specified by FILE and LINE
3011 and add it to the end of the doubly-linked list,
3012 but only if line-numbers are desired for debugging info. */
3015 emit_line_note (file, line)
3019 set_file_and_line_for_stmt (file, line);
3022 if (no_line_numbers)
3026 return emit_note (file, line);
3029 /* Make an insn of code NOTE
3030 with data-fields specified by FILE and LINE
3031 and add it to the end of the doubly-linked list.
3032 If it is a line-number NOTE, omit it if it matches the previous one. */
3035 emit_note (file, line)
3043 if (file && last_filename && !strcmp (file, last_filename)
3044 && line == last_linenum)
3046 last_filename = file;
3047 last_linenum = line;
3050 if (no_line_numbers && line > 0)
3056 note = rtx_alloc (NOTE);
3057 INSN_UID (note) = cur_insn_uid++;
3058 NOTE_SOURCE_FILE (note) = file;
3059 NOTE_LINE_NUMBER (note) = line;
3064 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3067 emit_line_note_force (file, line)
3072 return emit_line_note (file, line);
3075 /* Cause next statement to emit a line note even if the line number
3076 has not changed. This is used at the beginning of a function. */
3079 force_next_line_note ()
3084 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3085 note of this type already exists, remove it first. */
3088 set_unique_reg_note (insn, kind, datum)
3093 rtx note = find_reg_note (insn, kind, NULL_RTX);
3095 /* First remove the note if there already is one. */
3097 remove_note (insn, note);
3099 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3102 /* Return an indication of which type of insn should have X as a body.
3103 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3109 if (GET_CODE (x) == CODE_LABEL)
3111 if (GET_CODE (x) == CALL)
3113 if (GET_CODE (x) == RETURN)
3115 if (GET_CODE (x) == SET)
3117 if (SET_DEST (x) == pc_rtx)
3119 else if (GET_CODE (SET_SRC (x)) == CALL)
3124 if (GET_CODE (x) == PARALLEL)
3127 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3128 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3130 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3131 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3133 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3134 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3140 /* Emit the rtl pattern X as an appropriate kind of insn.
3141 If X is a label, it is simply added into the insn chain. */
3147 enum rtx_code code = classify_insn (x);
3149 if (code == CODE_LABEL)
3150 return emit_label (x);
3151 else if (code == INSN)
3152 return emit_insn (x);
3153 else if (code == JUMP_INSN)
3155 register rtx insn = emit_jump_insn (x);
3156 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3157 return emit_barrier ();
3160 else if (code == CALL_INSN)
3161 return emit_call_insn (x);
3166 /* Begin emitting insns to a sequence which can be packaged in an
3167 RTL_EXPR. If this sequence will contain something that might cause
3168 the compiler to pop arguments to function calls (because those
3169 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3170 details), use do_pending_stack_adjust before calling this function.
3171 That will ensure that the deferred pops are not accidentally
3172 emitted in the middel of this sequence. */
3177 struct sequence_stack *tem;
3179 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3181 tem->next = seq_stack;
3182 tem->first = first_insn;
3183 tem->last = last_insn;
3184 tem->sequence_rtl_expr = seq_rtl_expr;
3192 /* Similarly, but indicate that this sequence will be placed in T, an
3193 RTL_EXPR. See the documentation for start_sequence for more
3194 information about how to use this function. */
3197 start_sequence_for_rtl_expr (t)
3205 /* Set up the insn chain starting with FIRST as the current sequence,
3206 saving the previously current one. See the documentation for
3207 start_sequence for more information about how to use this function. */
3210 push_to_sequence (first)
3217 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3223 /* Set up the outer-level insn chain
3224 as the current sequence, saving the previously current one. */
3227 push_topmost_sequence ()
3229 struct sequence_stack *stack, *top = NULL;
3233 for (stack = seq_stack; stack; stack = stack->next)
3236 first_insn = top->first;
3237 last_insn = top->last;
3238 seq_rtl_expr = top->sequence_rtl_expr;
3241 /* After emitting to the outer-level insn chain, update the outer-level
3242 insn chain, and restore the previous saved state. */
3245 pop_topmost_sequence ()
3247 struct sequence_stack *stack, *top = NULL;
3249 for (stack = seq_stack; stack; stack = stack->next)
3252 top->first = first_insn;
3253 top->last = last_insn;
3254 /* ??? Why don't we save seq_rtl_expr here? */
3259 /* After emitting to a sequence, restore previous saved state.
3261 To get the contents of the sequence just made, you must call
3262 `gen_sequence' *before* calling here.
3264 If the compiler might have deferred popping arguments while
3265 generating this sequence, and this sequence will not be immediately
3266 inserted into the instruction stream, use do_pending_stack_adjust
3267 before calling gen_sequence. That will ensure that the deferred
3268 pops are inserted into this sequence, and not into some random
3269 location in the instruction stream. See INHIBIT_DEFER_POP for more
3270 information about deferred popping of arguments. */
3275 struct sequence_stack *tem = seq_stack;
3277 first_insn = tem->first;
3278 last_insn = tem->last;
3279 seq_rtl_expr = tem->sequence_rtl_expr;
3280 seq_stack = tem->next;
3285 /* Return 1 if currently emitting into a sequence. */
3290 return seq_stack != 0;
3293 /* Generate a SEQUENCE rtx containing the insns already emitted
3294 to the current sequence.
3296 This is how the gen_... function from a DEFINE_EXPAND
3297 constructs the SEQUENCE that it returns. */
3307 /* Count the insns in the chain. */
3309 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3312 /* If only one insn, return its pattern rather than a SEQUENCE.
3313 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3314 the case of an empty list.) */
3316 && ! RTX_FRAME_RELATED_P (first_insn)
3317 && (GET_CODE (first_insn) == INSN
3318 || GET_CODE (first_insn) == JUMP_INSN
3319 /* Don't discard the call usage field. */
3320 || (GET_CODE (first_insn) == CALL_INSN
3321 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3325 NEXT_INSN (first_insn) = free_insn;
3326 free_insn = first_insn;
3328 return PATTERN (first_insn);
3331 /* Put them in a vector. See if we already have a SEQUENCE of the
3332 appropriate length around. */
3333 if (!ggc_p && len < SEQUENCE_RESULT_SIZE
3334 && (result = sequence_result[len]) != 0)
3335 sequence_result[len] = 0;
3338 /* Ensure that this rtl goes in saveable_obstack, since we may
3340 push_obstacks_nochange ();
3341 rtl_in_saveable_obstack ();
3342 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3346 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3347 XVECEXP (result, 0, i) = tem;
3352 /* Put the various virtual registers into REGNO_REG_RTX. */
3355 init_virtual_regs (es)
3356 struct emit_status *es;
3358 rtx *ptr = es->x_regno_reg_rtx;
3359 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3360 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3361 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3362 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3363 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3367 clear_emit_caches ()
3371 /* Clear the start_sequence/gen_sequence cache. */
3372 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3373 sequence_result[i] = 0;
3377 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3378 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3379 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3380 static int copy_insn_n_scratches;
3382 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3383 copied an ASM_OPERANDS.
3384 In that case, it is the original input-operand vector. */
3385 static rtvec orig_asm_operands_vector;
3387 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3388 copied an ASM_OPERANDS.
3389 In that case, it is the copied input-operand vector. */
3390 static rtvec copy_asm_operands_vector;
3392 /* Likewise for the constraints vector. */
3393 static rtvec orig_asm_constraints_vector;
3394 static rtvec copy_asm_constraints_vector;
3396 /* Recursively create a new copy of an rtx for copy_insn.
3397 This function differs from copy_rtx in that it handles SCRATCHes and
3398 ASM_OPERANDs properly.
3399 Normally, this function is not used directly; use copy_insn as front end.
3400 However, you could first copy an insn pattern with copy_insn and then use
3401 this function afterwards to properly copy any REG_NOTEs containing
3410 register RTX_CODE code;
3411 register const char *format_ptr;
3413 code = GET_CODE (orig);
3429 for (i = 0; i < copy_insn_n_scratches; i++)
3430 if (copy_insn_scratch_in[i] == orig)
3431 return copy_insn_scratch_out[i];
3435 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3436 a LABEL_REF, it isn't sharable. */
3437 if (GET_CODE (XEXP (orig, 0)) == PLUS
3438 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3439 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3443 /* A MEM with a constant address is not sharable. The problem is that
3444 the constant address may need to be reloaded. If the mem is shared,
3445 then reloading one copy of this mem will cause all copies to appear
3446 to have been reloaded. */
3452 copy = rtx_alloc (code);
3454 /* Copy the various flags, and other information. We assume that
3455 all fields need copying, and then clear the fields that should
3456 not be copied. That is the sensible default behavior, and forces
3457 us to explicitly document why we are *not* copying a flag. */
3458 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3460 /* We do not copy the USED flag, which is used as a mark bit during
3461 walks over the RTL. */
3464 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3465 if (GET_RTX_CLASS (code) == 'i')
3469 copy->frame_related = 0;
3472 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3474 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3476 switch (*format_ptr++)
3479 XEXP (copy, i) = XEXP (orig, i);
3480 if (XEXP (orig, i) != NULL)
3481 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3486 XEXP (copy, i) = XEXP (orig, i);
3491 XVEC (copy, i) = XVEC (orig, i);
3492 if (XVEC (orig, i) == orig_asm_constraints_vector)
3493 XVEC (copy, i) = copy_asm_constraints_vector;
3494 else if (XVEC (orig, i) == orig_asm_operands_vector)
3495 XVEC (copy, i) = copy_asm_operands_vector;
3496 else if (XVEC (orig, i) != NULL)
3498 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3499 for (j = 0; j < XVECLEN (copy, i); j++)
3500 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3506 bitmap new_bits = BITMAP_OBSTACK_ALLOC (rtl_obstack);
3507 bitmap_copy (new_bits, XBITMAP (orig, i));
3508 XBITMAP (copy, i) = new_bits;
3513 XTREE (copy, i) = XTREE (orig, i);
3517 XWINT (copy, i) = XWINT (orig, i);
3521 XINT (copy, i) = XINT (orig, i);
3526 XSTR (copy, i) = XSTR (orig, i);
3534 if (code == SCRATCH)
3536 i = copy_insn_n_scratches++;
3537 if (i >= MAX_RECOG_OPERANDS)
3539 copy_insn_scratch_in[i] = orig;
3540 copy_insn_scratch_out[i] = copy;
3542 else if (code == ASM_OPERANDS)
3544 orig_asm_operands_vector = XVEC (orig, 3);
3545 copy_asm_operands_vector = XVEC (copy, 3);
3546 orig_asm_constraints_vector = XVEC (orig, 4);
3547 copy_asm_constraints_vector = XVEC (copy, 4);
3553 /* Create a new copy of an rtx.
3554 This function differs from copy_rtx in that it handles SCRATCHes and
3555 ASM_OPERANDs properly.
3556 INSN doesn't really have to be a full INSN; it could be just the
3562 copy_insn_n_scratches = 0;
3563 orig_asm_operands_vector = 0;
3564 orig_asm_constraints_vector = 0;
3565 copy_asm_operands_vector = 0;
3566 copy_asm_constraints_vector = 0;
3567 return copy_insn_1 (insn);
3570 /* Initialize data structures and variables in this file
3571 before generating rtl for each function. */
3576 struct function *f = current_function;
3578 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3581 seq_rtl_expr = NULL;
3583 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3586 first_label_num = label_num;
3590 clear_emit_caches ();
3592 /* Init the tables that describe all the pseudo regs. */
3594 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3596 f->emit->regno_pointer_flag
3597 = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
3599 f->emit->regno_pointer_align
3600 = (char *) xcalloc (f->emit->regno_pointer_flag_length,
3604 = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
3607 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3608 init_virtual_regs (f->emit);
3610 /* Indicate that the virtual registers and stack locations are
3612 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3613 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3614 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3615 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3617 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3618 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3619 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3620 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3621 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3623 #ifdef STACK_BOUNDARY
3624 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3625 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3626 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3627 = STACK_BOUNDARY / BITS_PER_UNIT;
3628 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3630 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3631 = STACK_BOUNDARY / BITS_PER_UNIT;
3632 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3633 = STACK_BOUNDARY / BITS_PER_UNIT;
3634 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3635 = STACK_BOUNDARY / BITS_PER_UNIT;
3636 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3637 = STACK_BOUNDARY / BITS_PER_UNIT;
3638 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
3641 #ifdef INIT_EXPANDERS
3646 /* Mark SS for GC. */
3649 mark_sequence_stack (ss)
3650 struct sequence_stack *ss;
3654 ggc_mark_rtx (ss->first);
3655 ggc_mark_tree (ss->sequence_rtl_expr);
3660 /* Mark ES for GC. */
3663 mark_emit_status (es)
3664 struct emit_status *es;
3672 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
3676 mark_sequence_stack (es->sequence_stack);
3677 ggc_mark_tree (es->sequence_rtl_expr);
3678 ggc_mark_rtx (es->x_first_insn);
3681 /* Create some permanent unique rtl objects shared between all functions.
3682 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3685 init_emit_once (line_numbers)
3689 enum machine_mode mode;
3690 enum machine_mode double_mode;
3692 no_line_numbers = ! line_numbers;
3694 /* Compute the word and byte modes. */
3696 byte_mode = VOIDmode;
3697 word_mode = VOIDmode;
3698 double_mode = VOIDmode;
3700 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3701 mode = GET_MODE_WIDER_MODE (mode))
3703 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3704 && byte_mode == VOIDmode)
3707 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3708 && word_mode == VOIDmode)
3712 #ifndef DOUBLE_TYPE_SIZE
3713 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3716 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3717 mode = GET_MODE_WIDER_MODE (mode))
3719 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3720 && double_mode == VOIDmode)
3724 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3726 /* Assign register numbers to the globally defined register rtx.
3727 This must be done at runtime because the register number field
3728 is in a union and some compilers can't initialize unions. */
3730 pc_rtx = gen_rtx (PC, VOIDmode);
3731 cc0_rtx = gen_rtx (CC0, VOIDmode);
3732 stack_pointer_rtx = gen_rtx_raw_REG (Pmode, STACK_POINTER_REGNUM);
3733 frame_pointer_rtx = gen_rtx_raw_REG (Pmode, FRAME_POINTER_REGNUM);
3734 if (hard_frame_pointer_rtx == 0)
3735 hard_frame_pointer_rtx = gen_rtx_raw_REG (Pmode,
3736 HARD_FRAME_POINTER_REGNUM);
3737 if (arg_pointer_rtx == 0)
3738 arg_pointer_rtx = gen_rtx_raw_REG (Pmode, ARG_POINTER_REGNUM);
3739 virtual_incoming_args_rtx =
3740 gen_rtx_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
3741 virtual_stack_vars_rtx =
3742 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
3743 virtual_stack_dynamic_rtx =
3744 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
3745 virtual_outgoing_args_rtx =
3746 gen_rtx_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
3747 virtual_cfa_rtx = gen_rtx_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
3749 /* These rtx must be roots if GC is enabled. */
3751 ggc_add_rtx_root (global_rtl, GR_MAX);
3753 #ifdef INIT_EXPANDERS
3754 /* This is to initialize save_machine_status and restore_machine_status before
3755 the first call to push_function_context_to. This is needed by the Chill
3756 front end which calls push_function_context_to before the first cal to
3757 init_function_start. */
3761 /* Create the unique rtx's for certain rtx codes and operand values. */
3763 /* Don't use gen_rtx here since gen_rtx in this case
3764 tries to use these variables. */
3765 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3766 const_int_rtx[i + MAX_SAVED_CONST_INT] =
3767 gen_rtx_raw_CONST_INT (VOIDmode, i);
3769 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
3771 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3772 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3773 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3775 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3777 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3778 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3779 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3780 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3782 for (i = 0; i <= 2; i++)
3784 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3785 mode = GET_MODE_WIDER_MODE (mode))
3787 rtx tem = rtx_alloc (CONST_DOUBLE);
3788 union real_extract u;
3790 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3791 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3793 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3794 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3795 PUT_MODE (tem, mode);
3797 const_tiny_rtx[i][(int) mode] = tem;
3800 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3802 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3803 mode = GET_MODE_WIDER_MODE (mode))
3804 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3806 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3808 mode = GET_MODE_WIDER_MODE (mode))
3809 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3812 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
3813 if (GET_MODE_CLASS (mode) == MODE_CC)
3814 const_tiny_rtx[0][(int) mode] = const0_rtx;
3816 ggc_add_rtx_root (&const_tiny_rtx[0][0], sizeof(const_tiny_rtx)/sizeof(rtx));
3817 ggc_add_rtx_root (&const_true_rtx, 1);
3819 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3820 return_address_pointer_rtx
3821 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3825 struct_value_rtx = STRUCT_VALUE;
3827 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3830 #ifdef STRUCT_VALUE_INCOMING
3831 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3833 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3834 struct_value_incoming_rtx
3835 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3837 struct_value_incoming_rtx = struct_value_rtx;
3841 #ifdef STATIC_CHAIN_REGNUM
3842 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3844 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3845 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3846 static_chain_incoming_rtx
3847 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3850 static_chain_incoming_rtx = static_chain_rtx;
3854 static_chain_rtx = STATIC_CHAIN;
3856 #ifdef STATIC_CHAIN_INCOMING
3857 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3859 static_chain_incoming_rtx = static_chain_rtx;
3863 #ifdef PIC_OFFSET_TABLE_REGNUM
3864 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3867 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
3868 ggc_add_rtx_root (&struct_value_rtx, 1);
3869 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
3870 ggc_add_rtx_root (&static_chain_rtx, 1);
3871 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
3872 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
3875 /* Query and clear/ restore no_line_numbers. This is used by the
3876 switch / case handling in stmt.c to give proper line numbers in
3877 warnings about unreachable code. */
3880 force_line_numbers ()
3882 int old = no_line_numbers;
3884 no_line_numbers = 0;
3886 force_next_line_note ();
3891 restore_line_number_status (old_value)
3894 no_line_numbers = old_value;