1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these are unique; no other rtx-object will be equal to any
93 rtx global_rtl[GR_MAX];
95 /* Commonly used RTL for hard registers. These objects are not necessarily
96 unique, so we allocate them separately from global_rtl. They are
97 initialized once per compilation unit, then copied into regno_reg_rtx
98 at the beginning of each function. */
99 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
101 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
102 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
103 record a copy of const[012]_rtx. */
105 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
109 REAL_VALUE_TYPE dconst0;
110 REAL_VALUE_TYPE dconst1;
111 REAL_VALUE_TYPE dconst2;
112 REAL_VALUE_TYPE dconstm1;
114 /* All references to the following fixed hard registers go through
115 these unique rtl objects. On machines where the frame-pointer and
116 arg-pointer are the same register, they use the same unique object.
118 After register allocation, other rtl objects which used to be pseudo-regs
119 may be clobbered to refer to the frame-pointer register.
120 But references that were originally to the frame-pointer can be
121 distinguished from the others because they contain frame_pointer_rtx.
123 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
124 tricky: until register elimination has taken place hard_frame_pointer_rtx
125 should be used if it is being set, and frame_pointer_rtx otherwise. After
126 register elimination hard_frame_pointer_rtx should always be used.
127 On machines where the two registers are same (most) then these are the
130 In an inline procedure, the stack and frame pointer rtxs may not be
131 used for anything else. */
132 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
133 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
134 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
135 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
136 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
138 /* This is used to implement __builtin_return_address for some machines.
139 See for instance the MIPS port. */
140 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
142 /* We make one copy of (const_int C) where C is in
143 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
144 to save space during the compilation and simplify comparisons of
147 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
149 /* A hash table storing CONST_INTs whose absolute value is greater
150 than MAX_SAVED_CONST_INT. */
152 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
153 htab_t const_int_htab;
155 /* A hash table storing memory attribute structures. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
157 htab_t mem_attrs_htab;
159 /* A hash table storing all CONST_DOUBLEs. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
161 htab_t const_double_htab;
163 #define first_insn (cfun->emit->x_first_insn)
164 #define last_insn (cfun->emit->x_last_insn)
165 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
166 #define last_linenum (cfun->emit->x_last_linenum)
167 #define last_filename (cfun->emit->x_last_filename)
168 #define first_label_num (cfun->emit->x_first_label_num)
170 static rtx make_jump_insn_raw PARAMS ((rtx));
171 static rtx make_call_insn_raw PARAMS ((rtx));
172 static rtx find_line_note PARAMS ((rtx));
173 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
175 static void unshare_all_rtl_1 PARAMS ((rtx));
176 static void unshare_all_decls PARAMS ((tree));
177 static void reset_used_decls PARAMS ((tree));
178 static void mark_label_nuses PARAMS ((rtx));
179 static hashval_t const_int_htab_hash PARAMS ((const void *));
180 static int const_int_htab_eq PARAMS ((const void *,
182 static hashval_t const_double_htab_hash PARAMS ((const void *));
183 static int const_double_htab_eq PARAMS ((const void *,
185 static rtx lookup_const_double PARAMS ((rtx));
186 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
187 static int mem_attrs_htab_eq PARAMS ((const void *,
189 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
192 static tree component_ref_for_mem_expr PARAMS ((tree));
193 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
195 /* Probability of the conditional branch currently proceeded by try_split.
196 Set to -1 otherwise. */
197 int split_branch_probability = -1;
199 /* Returns a hash code for X (which is a really a CONST_INT). */
202 const_int_htab_hash (x)
205 return (hashval_t) INTVAL ((struct rtx_def *) x);
208 /* Returns non-zero if the value represented by X (which is really a
209 CONST_INT) is the same as that given by Y (which is really a
213 const_int_htab_eq (x, y)
217 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
220 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
222 const_double_htab_hash (x)
229 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
230 h ^= XWINT (value, i);
234 /* Returns non-zero if the value represented by X (really a ...)
235 is the same as that represented by Y (really a ...) */
237 const_double_htab_eq (x, y)
241 rtx a = (rtx)x, b = (rtx)y;
244 if (GET_MODE (a) != GET_MODE (b))
246 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
247 if (XWINT (a, i) != XWINT (b, i))
253 /* Returns a hash code for X (which is a really a mem_attrs *). */
256 mem_attrs_htab_hash (x)
259 mem_attrs *p = (mem_attrs *) x;
261 return (p->alias ^ (p->align * 1000)
262 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
263 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
267 /* Returns non-zero if the value represented by X (which is really a
268 mem_attrs *) is the same as that given by Y (which is also really a
272 mem_attrs_htab_eq (x, y)
276 mem_attrs *p = (mem_attrs *) x;
277 mem_attrs *q = (mem_attrs *) y;
279 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
280 && p->size == q->size && p->align == q->align);
283 /* Allocate a new mem_attrs structure and insert it into the hash table if
284 one identical to it is not already in the table. We are doing this for
288 get_mem_attrs (alias, expr, offset, size, align, mode)
294 enum machine_mode mode;
299 /* If everything is the default, we can just return zero. */
300 if (alias == 0 && expr == 0 && offset == 0
302 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
303 && (align == BITS_PER_UNIT
305 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
310 attrs.offset = offset;
314 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
317 *slot = ggc_alloc (sizeof (mem_attrs));
318 memcpy (*slot, &attrs, sizeof (mem_attrs));
324 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
325 don't attempt to share with the various global pieces of rtl (such as
326 frame_pointer_rtx). */
329 gen_raw_REG (mode, regno)
330 enum machine_mode mode;
333 rtx x = gen_rtx_raw_REG (mode, regno);
334 ORIGINAL_REGNO (x) = regno;
338 /* There are some RTL codes that require special attention; the generation
339 functions do the raw handling. If you add to this list, modify
340 special_rtx in gengenrtl.c as well. */
343 gen_rtx_CONST_INT (mode, arg)
344 enum machine_mode mode ATTRIBUTE_UNUSED;
349 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
350 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
352 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
353 if (const_true_rtx && arg == STORE_FLAG_VALUE)
354 return const_true_rtx;
357 /* Look up the CONST_INT in the hash table. */
358 slot = htab_find_slot_with_hash (const_int_htab, &arg,
359 (hashval_t) arg, INSERT);
361 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
367 gen_int_mode (c, mode)
369 enum machine_mode mode;
371 return GEN_INT (trunc_int_for_mode (c, mode));
374 /* CONST_DOUBLEs might be created from pairs of integers, or from
375 REAL_VALUE_TYPEs. Also, their length is known only at run time,
376 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
378 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
379 hash table. If so, return its counterpart; otherwise add it
380 to the hash table and return it. */
382 lookup_const_double (real)
385 void **slot = htab_find_slot (const_double_htab, real, INSERT);
392 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
393 VALUE in mode MODE. */
395 const_double_from_real_value (value, mode)
396 REAL_VALUE_TYPE value;
397 enum machine_mode mode;
399 rtx real = rtx_alloc (CONST_DOUBLE);
400 PUT_MODE (real, mode);
402 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
404 return lookup_const_double (real);
407 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
408 of ints: I0 is the low-order word and I1 is the high-order word.
409 Do not use this routine for non-integer modes; convert to
410 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
413 immed_double_const (i0, i1, mode)
414 HOST_WIDE_INT i0, i1;
415 enum machine_mode mode;
420 if (mode != VOIDmode)
423 if (GET_MODE_CLASS (mode) != MODE_INT
424 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
427 /* We clear out all bits that don't belong in MODE, unless they and
428 our sign bit are all one. So we get either a reasonable negative
429 value or a reasonable unsigned value for this mode. */
430 width = GET_MODE_BITSIZE (mode);
431 if (width < HOST_BITS_PER_WIDE_INT
432 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
433 != ((HOST_WIDE_INT) (-1) << (width - 1))))
434 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
435 else if (width == HOST_BITS_PER_WIDE_INT
436 && ! (i1 == ~0 && i0 < 0))
438 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
439 /* We cannot represent this value as a constant. */
442 /* If this would be an entire word for the target, but is not for
443 the host, then sign-extend on the host so that the number will
444 look the same way on the host that it would on the target.
446 For example, when building a 64 bit alpha hosted 32 bit sparc
447 targeted compiler, then we want the 32 bit unsigned value -1 to be
448 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
449 The latter confuses the sparc backend. */
451 if (width < HOST_BITS_PER_WIDE_INT
452 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
453 i0 |= ((HOST_WIDE_INT) (-1) << width);
455 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
458 ??? Strictly speaking, this is wrong if we create a CONST_INT for
459 a large unsigned constant with the size of MODE being
460 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
461 in a wider mode. In that case we will mis-interpret it as a
464 Unfortunately, the only alternative is to make a CONST_DOUBLE for
465 any constant in any mode if it is an unsigned constant larger
466 than the maximum signed integer in an int on the host. However,
467 doing this will break everyone that always expects to see a
468 CONST_INT for SImode and smaller.
470 We have always been making CONST_INTs in this case, so nothing
471 new is being broken. */
473 if (width <= HOST_BITS_PER_WIDE_INT)
474 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
477 /* If this integer fits in one word, return a CONST_INT. */
478 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
481 /* We use VOIDmode for integers. */
482 value = rtx_alloc (CONST_DOUBLE);
483 PUT_MODE (value, VOIDmode);
485 CONST_DOUBLE_LOW (value) = i0;
486 CONST_DOUBLE_HIGH (value) = i1;
488 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
489 XWINT (value, i) = 0;
491 return lookup_const_double (value);
495 gen_rtx_REG (mode, regno)
496 enum machine_mode mode;
499 /* In case the MD file explicitly references the frame pointer, have
500 all such references point to the same frame pointer. This is
501 used during frame pointer elimination to distinguish the explicit
502 references to these registers from pseudos that happened to be
505 If we have eliminated the frame pointer or arg pointer, we will
506 be using it as a normal register, for example as a spill
507 register. In such cases, we might be accessing it in a mode that
508 is not Pmode and therefore cannot use the pre-allocated rtx.
510 Also don't do this when we are making new REGs in reload, since
511 we don't want to get confused with the real pointers. */
513 if (mode == Pmode && !reload_in_progress)
515 if (regno == FRAME_POINTER_REGNUM)
516 return frame_pointer_rtx;
517 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
518 if (regno == HARD_FRAME_POINTER_REGNUM)
519 return hard_frame_pointer_rtx;
521 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
522 if (regno == ARG_POINTER_REGNUM)
523 return arg_pointer_rtx;
525 #ifdef RETURN_ADDRESS_POINTER_REGNUM
526 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
527 return return_address_pointer_rtx;
529 if (regno == PIC_OFFSET_TABLE_REGNUM
530 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
531 return pic_offset_table_rtx;
532 if (regno == STACK_POINTER_REGNUM)
533 return stack_pointer_rtx;
536 /* If the per-function register table has been set up, try to re-use
537 an existing entry in that table to avoid useless generation of RTL. */
541 && regno < FIRST_PSEUDO_REGISTER
542 && reg_raw_mode[regno] == mode)
543 return regno_reg_rtx[regno];
545 return gen_raw_REG (mode, regno);
549 gen_rtx_MEM (mode, addr)
550 enum machine_mode mode;
553 rtx rt = gen_rtx_raw_MEM (mode, addr);
555 /* This field is not cleared by the mere allocation of the rtx, so
563 gen_rtx_SUBREG (mode, reg, offset)
564 enum machine_mode mode;
568 /* This is the most common failure type.
569 Catch it early so we can see who does it. */
570 if ((offset % GET_MODE_SIZE (mode)) != 0)
573 /* This check isn't usable right now because combine will
574 throw arbitrary crap like a CALL into a SUBREG in
575 gen_lowpart_for_combine so we must just eat it. */
577 /* Check for this too. */
578 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
581 return gen_rtx_raw_SUBREG (mode, reg, offset);
584 /* Generate a SUBREG representing the least-significant part of REG if MODE
585 is smaller than mode of REG, otherwise paradoxical SUBREG. */
588 gen_lowpart_SUBREG (mode, reg)
589 enum machine_mode mode;
592 enum machine_mode inmode;
594 inmode = GET_MODE (reg);
595 if (inmode == VOIDmode)
597 return gen_rtx_SUBREG (mode, reg,
598 subreg_lowpart_offset (mode, inmode));
601 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
603 ** This routine generates an RTX of the size specified by
604 ** <code>, which is an RTX code. The RTX structure is initialized
605 ** from the arguments <element1> through <elementn>, which are
606 ** interpreted according to the specific RTX type's format. The
607 ** special machine mode associated with the rtx (if any) is specified
610 ** gen_rtx can be invoked in a way which resembles the lisp-like
611 ** rtx it will generate. For example, the following rtx structure:
613 ** (plus:QI (mem:QI (reg:SI 1))
614 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
616 ** ...would be generated by the following C code:
618 ** gen_rtx (PLUS, QImode,
619 ** gen_rtx (MEM, QImode,
620 ** gen_rtx (REG, SImode, 1)),
621 ** gen_rtx (MEM, QImode,
622 ** gen_rtx (PLUS, SImode,
623 ** gen_rtx (REG, SImode, 2),
624 ** gen_rtx (REG, SImode, 3)))),
629 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
631 int i; /* Array indices... */
632 const char *fmt; /* Current rtx's format... */
633 rtx rt_val; /* RTX to return to caller... */
636 VA_FIXEDARG (p, enum rtx_code, code);
637 VA_FIXEDARG (p, enum machine_mode, mode);
642 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
647 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
648 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
650 rt_val = immed_double_const (arg0, arg1, mode);
655 rt_val = gen_rtx_REG (mode, va_arg (p, int));
659 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
663 rt_val = rtx_alloc (code); /* Allocate the storage space. */
664 rt_val->mode = mode; /* Store the machine mode... */
666 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
667 for (i = 0; i < GET_RTX_LENGTH (code); i++)
671 case '0': /* Unused field. */
674 case 'i': /* An integer? */
675 XINT (rt_val, i) = va_arg (p, int);
678 case 'w': /* A wide integer? */
679 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
682 case 's': /* A string? */
683 XSTR (rt_val, i) = va_arg (p, char *);
686 case 'e': /* An expression? */
687 case 'u': /* An insn? Same except when printing. */
688 XEXP (rt_val, i) = va_arg (p, rtx);
691 case 'E': /* An RTX vector? */
692 XVEC (rt_val, i) = va_arg (p, rtvec);
695 case 'b': /* A bitmap? */
696 XBITMAP (rt_val, i) = va_arg (p, bitmap);
699 case 't': /* A tree? */
700 XTREE (rt_val, i) = va_arg (p, tree);
714 /* gen_rtvec (n, [rt1, ..., rtn])
716 ** This routine creates an rtvec and stores within it the
717 ** pointers to rtx's which are its arguments.
722 gen_rtvec VPARAMS ((int n, ...))
728 VA_FIXEDARG (p, int, n);
731 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
733 vector = (rtx *) alloca (n * sizeof (rtx));
735 for (i = 0; i < n; i++)
736 vector[i] = va_arg (p, rtx);
738 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
742 return gen_rtvec_v (save_n, vector);
746 gen_rtvec_v (n, argp)
754 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
756 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
758 for (i = 0; i < n; i++)
759 rt_val->elem[i] = *argp++;
764 /* Generate a REG rtx for a new pseudo register of mode MODE.
765 This pseudo is assigned the next sequential register number. */
769 enum machine_mode mode;
771 struct function *f = cfun;
774 /* Don't let anything called after initial flow analysis create new
779 if (generating_concat_p
780 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
781 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
783 /* For complex modes, don't make a single pseudo.
784 Instead, make a CONCAT of two pseudos.
785 This allows noncontiguous allocation of the real and imaginary parts,
786 which makes much better code. Besides, allocating DCmode
787 pseudos overstrains reload on some machines like the 386. */
788 rtx realpart, imagpart;
789 int size = GET_MODE_UNIT_SIZE (mode);
790 enum machine_mode partmode
791 = mode_for_size (size * BITS_PER_UNIT,
792 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
793 ? MODE_FLOAT : MODE_INT),
796 realpart = gen_reg_rtx (partmode);
797 imagpart = gen_reg_rtx (partmode);
798 return gen_rtx_CONCAT (mode, realpart, imagpart);
801 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
802 enough to have an element for this pseudo reg number. */
804 if (reg_rtx_no == f->emit->regno_pointer_align_length)
806 int old_size = f->emit->regno_pointer_align_length;
811 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
812 memset (new + old_size, 0, old_size);
813 f->emit->regno_pointer_align = (unsigned char *) new;
815 new1 = (rtx *) ggc_realloc (f->emit->x_regno_reg_rtx,
816 old_size * 2 * sizeof (rtx));
817 memset (new1 + old_size, 0, old_size * sizeof (rtx));
818 regno_reg_rtx = new1;
820 new2 = (tree *) ggc_realloc (f->emit->regno_decl,
821 old_size * 2 * sizeof (tree));
822 memset (new2 + old_size, 0, old_size * sizeof (tree));
823 f->emit->regno_decl = new2;
825 f->emit->regno_pointer_align_length = old_size * 2;
828 val = gen_raw_REG (mode, reg_rtx_no);
829 regno_reg_rtx[reg_rtx_no++] = val;
833 /* Identify REG (which may be a CONCAT) as a user register. */
839 if (GET_CODE (reg) == CONCAT)
841 REG_USERVAR_P (XEXP (reg, 0)) = 1;
842 REG_USERVAR_P (XEXP (reg, 1)) = 1;
844 else if (GET_CODE (reg) == REG)
845 REG_USERVAR_P (reg) = 1;
850 /* Identify REG as a probable pointer register and show its alignment
851 as ALIGN, if nonzero. */
854 mark_reg_pointer (reg, align)
858 if (! REG_POINTER (reg))
860 REG_POINTER (reg) = 1;
863 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
865 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
866 /* We can no-longer be sure just how aligned this pointer is */
867 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
870 /* Return 1 plus largest pseudo reg number used in the current function. */
878 /* Return 1 + the largest label number used so far in the current function. */
883 if (last_label_num && label_num == base_label_num)
884 return last_label_num;
888 /* Return first label number used in this function (if any were used). */
891 get_first_label_num ()
893 return first_label_num;
896 /* Return the final regno of X, which is a SUBREG of a hard
899 subreg_hard_regno (x, check_mode)
903 enum machine_mode mode = GET_MODE (x);
904 unsigned int byte_offset, base_regno, final_regno;
905 rtx reg = SUBREG_REG (x);
907 /* This is where we attempt to catch illegal subregs
908 created by the compiler. */
909 if (GET_CODE (x) != SUBREG
910 || GET_CODE (reg) != REG)
912 base_regno = REGNO (reg);
913 if (base_regno >= FIRST_PSEUDO_REGISTER)
915 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
918 /* Catch non-congruent offsets too. */
919 byte_offset = SUBREG_BYTE (x);
920 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
923 final_regno = subreg_regno (x);
928 /* Return a value representing some low-order bits of X, where the number
929 of low-order bits is given by MODE. Note that no conversion is done
930 between floating-point and fixed-point values, rather, the bit
931 representation is returned.
933 This function handles the cases in common between gen_lowpart, below,
934 and two variants in cse.c and combine.c. These are the cases that can
935 be safely handled at all points in the compilation.
937 If this is not a case we can handle, return 0. */
940 gen_lowpart_common (mode, x)
941 enum machine_mode mode;
944 int msize = GET_MODE_SIZE (mode);
945 int xsize = GET_MODE_SIZE (GET_MODE (x));
948 if (GET_MODE (x) == mode)
951 /* MODE must occupy no more words than the mode of X. */
952 if (GET_MODE (x) != VOIDmode
953 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
954 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
957 offset = subreg_lowpart_offset (mode, GET_MODE (x));
959 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
960 && (GET_MODE_CLASS (mode) == MODE_INT
961 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
963 /* If we are getting the low-order part of something that has been
964 sign- or zero-extended, we can either just use the object being
965 extended or make a narrower extension. If we want an even smaller
966 piece than the size of the object being extended, call ourselves
969 This case is used mostly by combine and cse. */
971 if (GET_MODE (XEXP (x, 0)) == mode)
973 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
974 return gen_lowpart_common (mode, XEXP (x, 0));
975 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
976 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
978 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
979 || GET_CODE (x) == CONCAT)
980 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
981 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
982 from the low-order part of the constant. */
983 else if ((GET_MODE_CLASS (mode) == MODE_INT
984 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
985 && GET_MODE (x) == VOIDmode
986 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
988 /* If MODE is twice the host word size, X is already the desired
989 representation. Otherwise, if MODE is wider than a word, we can't
990 do this. If MODE is exactly a word, return just one CONST_INT. */
992 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
994 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
996 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
997 return (GET_CODE (x) == CONST_INT ? x
998 : GEN_INT (CONST_DOUBLE_LOW (x)));
1001 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1002 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1003 : CONST_DOUBLE_LOW (x));
1005 /* Sign extend to HOST_WIDE_INT. */
1006 val = trunc_int_for_mode (val, mode);
1008 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1013 /* The floating-point emulator can handle all conversions between
1014 FP and integer operands. This simplifies reload because it
1015 doesn't have to deal with constructs like (subreg:DI
1016 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1017 /* Single-precision floats are always 32-bits and double-precision
1018 floats are always 64-bits. */
1020 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1021 && GET_MODE_BITSIZE (mode) == 32
1022 && GET_CODE (x) == CONST_INT)
1028 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
1029 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1031 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1032 && GET_MODE_BITSIZE (mode) == 64
1033 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1034 && GET_MODE (x) == VOIDmode)
1038 HOST_WIDE_INT low, high;
1040 if (GET_CODE (x) == CONST_INT)
1043 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1047 low = CONST_DOUBLE_LOW (x);
1048 high = CONST_DOUBLE_HIGH (x);
1051 #if HOST_BITS_PER_WIDE_INT == 32
1052 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1054 if (WORDS_BIG_ENDIAN)
1055 i[0] = high, i[1] = low;
1057 i[0] = low, i[1] = high;
1062 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1063 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1065 else if ((GET_MODE_CLASS (mode) == MODE_INT
1066 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1067 && GET_CODE (x) == CONST_DOUBLE
1068 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1071 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1072 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1074 /* Convert 'r' into an array of four 32-bit words in target word
1076 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1077 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1080 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1083 i[3 - 3 * endian] = 0;
1086 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1087 i[2 - 2 * endian] = 0;
1088 i[3 - 2 * endian] = 0;
1091 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1092 i[3 - 3 * endian] = 0;
1095 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1100 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1102 #if HOST_BITS_PER_WIDE_INT == 32
1103 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1105 if (HOST_BITS_PER_WIDE_INT != 64)
1108 return immed_double_const ((((unsigned long) i[3 * endian])
1109 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1110 (((unsigned long) i[2 - endian])
1111 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1116 /* Otherwise, we can't do this. */
1120 /* Return the real part (which has mode MODE) of a complex value X.
1121 This always comes at the low address in memory. */
1124 gen_realpart (mode, x)
1125 enum machine_mode mode;
1128 if (WORDS_BIG_ENDIAN
1129 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1131 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1133 ("can't access real part of complex value in hard register");
1134 else if (WORDS_BIG_ENDIAN)
1135 return gen_highpart (mode, x);
1137 return gen_lowpart (mode, x);
1140 /* Return the imaginary part (which has mode MODE) of a complex value X.
1141 This always comes at the high address in memory. */
1144 gen_imagpart (mode, x)
1145 enum machine_mode mode;
1148 if (WORDS_BIG_ENDIAN)
1149 return gen_lowpart (mode, x);
1150 else if (! WORDS_BIG_ENDIAN
1151 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1153 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1155 ("can't access imaginary part of complex value in hard register");
1157 return gen_highpart (mode, x);
1160 /* Return 1 iff X, assumed to be a SUBREG,
1161 refers to the real part of the complex value in its containing reg.
1162 Complex values are always stored with the real part in the first word,
1163 regardless of WORDS_BIG_ENDIAN. */
1166 subreg_realpart_p (x)
1169 if (GET_CODE (x) != SUBREG)
1172 return ((unsigned int) SUBREG_BYTE (x)
1173 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1176 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1177 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1178 least-significant part of X.
1179 MODE specifies how big a part of X to return;
1180 it usually should not be larger than a word.
1181 If X is a MEM whose address is a QUEUED, the value may be so also. */
1184 gen_lowpart (mode, x)
1185 enum machine_mode mode;
1188 rtx result = gen_lowpart_common (mode, x);
1192 else if (GET_CODE (x) == REG)
1194 /* Must be a hard reg that's not valid in MODE. */
1195 result = gen_lowpart_common (mode, copy_to_reg (x));
1200 else if (GET_CODE (x) == MEM)
1202 /* The only additional case we can do is MEM. */
1204 if (WORDS_BIG_ENDIAN)
1205 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1206 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1208 if (BYTES_BIG_ENDIAN)
1209 /* Adjust the address so that the address-after-the-data
1211 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1212 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1214 return adjust_address (x, mode, offset);
1216 else if (GET_CODE (x) == ADDRESSOF)
1217 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1222 /* Like `gen_lowpart', but refer to the most significant part.
1223 This is used to access the imaginary part of a complex number. */
1226 gen_highpart (mode, x)
1227 enum machine_mode mode;
1230 unsigned int msize = GET_MODE_SIZE (mode);
1233 /* This case loses if X is a subreg. To catch bugs early,
1234 complain if an invalid MODE is used even in other cases. */
1235 if (msize > UNITS_PER_WORD
1236 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1239 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1240 subreg_highpart_offset (mode, GET_MODE (x)));
1242 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1243 the target if we have a MEM. gen_highpart must return a valid operand,
1244 emitting code if necessary to do so. */
1245 if (result != NULL_RTX && GET_CODE (result) == MEM)
1246 result = validize_mem (result);
1253 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1254 be VOIDmode constant. */
1256 gen_highpart_mode (outermode, innermode, exp)
1257 enum machine_mode outermode, innermode;
1260 if (GET_MODE (exp) != VOIDmode)
1262 if (GET_MODE (exp) != innermode)
1264 return gen_highpart (outermode, exp);
1266 return simplify_gen_subreg (outermode, exp, innermode,
1267 subreg_highpart_offset (outermode, innermode));
1270 /* Return offset in bytes to get OUTERMODE low part
1271 of the value in mode INNERMODE stored in memory in target format. */
1274 subreg_lowpart_offset (outermode, innermode)
1275 enum machine_mode outermode, innermode;
1277 unsigned int offset = 0;
1278 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1282 if (WORDS_BIG_ENDIAN)
1283 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1284 if (BYTES_BIG_ENDIAN)
1285 offset += difference % UNITS_PER_WORD;
1291 /* Return offset in bytes to get OUTERMODE high part
1292 of the value in mode INNERMODE stored in memory in target format. */
1294 subreg_highpart_offset (outermode, innermode)
1295 enum machine_mode outermode, innermode;
1297 unsigned int offset = 0;
1298 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1300 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1305 if (! WORDS_BIG_ENDIAN)
1306 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1307 if (! BYTES_BIG_ENDIAN)
1308 offset += difference % UNITS_PER_WORD;
1314 /* Return 1 iff X, assumed to be a SUBREG,
1315 refers to the least significant part of its containing reg.
1316 If X is not a SUBREG, always return 1 (it is its own low part!). */
1319 subreg_lowpart_p (x)
1322 if (GET_CODE (x) != SUBREG)
1324 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1327 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1328 == SUBREG_BYTE (x));
1332 /* Helper routine for all the constant cases of operand_subword.
1333 Some places invoke this directly. */
1336 constant_subword (op, offset, mode)
1339 enum machine_mode mode;
1341 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1344 /* If OP is already an integer word, return it. */
1345 if (GET_MODE_CLASS (mode) == MODE_INT
1346 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1349 /* The output is some bits, the width of the target machine's word.
1350 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1352 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1353 && GET_MODE_CLASS (mode) == MODE_FLOAT
1354 && GET_MODE_BITSIZE (mode) == 64
1355 && GET_CODE (op) == CONST_DOUBLE)
1360 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1361 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1363 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1364 which the words are written depends on the word endianness.
1365 ??? This is a potential portability problem and should
1366 be fixed at some point.
1368 We must exercise caution with the sign bit. By definition there
1369 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1370 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1371 So we explicitly mask and sign-extend as necessary. */
1372 if (BITS_PER_WORD == 32)
1375 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1376 return GEN_INT (val);
1378 #if HOST_BITS_PER_WIDE_INT >= 64
1379 else if (BITS_PER_WORD >= 64 && offset == 0)
1381 val = k[! WORDS_BIG_ENDIAN];
1382 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1383 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1384 return GEN_INT (val);
1387 else if (BITS_PER_WORD == 16)
1389 val = k[offset >> 1];
1390 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1392 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1393 return GEN_INT (val);
1398 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1399 && GET_MODE_CLASS (mode) == MODE_FLOAT
1400 && GET_MODE_BITSIZE (mode) > 64
1401 && GET_CODE (op) == CONST_DOUBLE)
1406 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1407 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1409 if (BITS_PER_WORD == 32)
1412 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1413 return GEN_INT (val);
1415 #if HOST_BITS_PER_WIDE_INT >= 64
1416 else if (BITS_PER_WORD >= 64 && offset <= 1)
1418 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1419 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1420 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1421 return GEN_INT (val);
1428 /* Single word float is a little harder, since single- and double-word
1429 values often do not have the same high-order bits. We have already
1430 verified that we want the only defined word of the single-word value. */
1431 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1432 && GET_MODE_BITSIZE (mode) == 32
1433 && GET_CODE (op) == CONST_DOUBLE)
1438 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1439 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1441 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1443 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1445 if (BITS_PER_WORD == 16)
1447 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1449 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1452 return GEN_INT (val);
1455 /* The only remaining cases that we can handle are integers.
1456 Convert to proper endianness now since these cases need it.
1457 At this point, offset == 0 means the low-order word.
1459 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1460 in general. However, if OP is (const_int 0), we can just return
1463 if (op == const0_rtx)
1466 if (GET_MODE_CLASS (mode) != MODE_INT
1467 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1468 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1471 if (WORDS_BIG_ENDIAN)
1472 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1474 /* Find out which word on the host machine this value is in and get
1475 it from the constant. */
1476 val = (offset / size_ratio == 0
1477 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1478 : (GET_CODE (op) == CONST_INT
1479 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1481 /* Get the value we want into the low bits of val. */
1482 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1483 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1485 val = trunc_int_for_mode (val, word_mode);
1487 return GEN_INT (val);
1490 /* Return subword OFFSET of operand OP.
1491 The word number, OFFSET, is interpreted as the word number starting
1492 at the low-order address. OFFSET 0 is the low-order word if not
1493 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1495 If we cannot extract the required word, we return zero. Otherwise,
1496 an rtx corresponding to the requested word will be returned.
1498 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1499 reload has completed, a valid address will always be returned. After
1500 reload, if a valid address cannot be returned, we return zero.
1502 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1503 it is the responsibility of the caller.
1505 MODE is the mode of OP in case it is a CONST_INT.
1507 ??? This is still rather broken for some cases. The problem for the
1508 moment is that all callers of this thing provide no 'goal mode' to
1509 tell us to work with. This exists because all callers were written
1510 in a word based SUBREG world.
1511 Now use of this function can be deprecated by simplify_subreg in most
1516 operand_subword (op, offset, validate_address, mode)
1518 unsigned int offset;
1519 int validate_address;
1520 enum machine_mode mode;
1522 if (mode == VOIDmode)
1523 mode = GET_MODE (op);
1525 if (mode == VOIDmode)
1528 /* If OP is narrower than a word, fail. */
1530 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1533 /* If we want a word outside OP, return zero. */
1535 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1538 /* Form a new MEM at the requested address. */
1539 if (GET_CODE (op) == MEM)
1541 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1543 if (! validate_address)
1546 else if (reload_completed)
1548 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1552 return replace_equiv_address (new, XEXP (new, 0));
1555 /* Rest can be handled by simplify_subreg. */
1556 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1559 /* Similar to `operand_subword', but never return 0. If we can't extract
1560 the required subword, put OP into a register and try again. If that fails,
1561 abort. We always validate the address in this case.
1563 MODE is the mode of OP, in case it is CONST_INT. */
1566 operand_subword_force (op, offset, mode)
1568 unsigned int offset;
1569 enum machine_mode mode;
1571 rtx result = operand_subword (op, offset, 1, mode);
1576 if (mode != BLKmode && mode != VOIDmode)
1578 /* If this is a register which can not be accessed by words, copy it
1579 to a pseudo register. */
1580 if (GET_CODE (op) == REG)
1581 op = copy_to_reg (op);
1583 op = force_reg (mode, op);
1586 result = operand_subword (op, offset, 1, mode);
1593 /* Given a compare instruction, swap the operands.
1594 A test instruction is changed into a compare of 0 against the operand. */
1597 reverse_comparison (insn)
1600 rtx body = PATTERN (insn);
1603 if (GET_CODE (body) == SET)
1604 comp = SET_SRC (body);
1606 comp = SET_SRC (XVECEXP (body, 0, 0));
1608 if (GET_CODE (comp) == COMPARE)
1610 rtx op0 = XEXP (comp, 0);
1611 rtx op1 = XEXP (comp, 1);
1612 XEXP (comp, 0) = op1;
1613 XEXP (comp, 1) = op0;
1617 rtx new = gen_rtx_COMPARE (VOIDmode,
1618 CONST0_RTX (GET_MODE (comp)), comp);
1619 if (GET_CODE (body) == SET)
1620 SET_SRC (body) = new;
1622 SET_SRC (XVECEXP (body, 0, 0)) = new;
1626 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1627 or (2) a component ref of something variable. Represent the later with
1628 a NULL expression. */
1631 component_ref_for_mem_expr (ref)
1634 tree inner = TREE_OPERAND (ref, 0);
1636 if (TREE_CODE (inner) == COMPONENT_REF)
1637 inner = component_ref_for_mem_expr (inner);
1640 tree placeholder_ptr = 0;
1642 /* Now remove any conversions: they don't change what the underlying
1643 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1644 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1645 || TREE_CODE (inner) == NON_LVALUE_EXPR
1646 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1647 || TREE_CODE (inner) == SAVE_EXPR
1648 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1649 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1650 inner = find_placeholder (inner, &placeholder_ptr);
1652 inner = TREE_OPERAND (inner, 0);
1654 if (! DECL_P (inner))
1658 if (inner == TREE_OPERAND (ref, 0))
1661 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1662 TREE_OPERAND (ref, 1));
1665 /* Given REF, a MEM, and T, either the type of X or the expression
1666 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1667 if we are making a new object of this type. */
1670 set_mem_attributes (ref, t, objectp)
1675 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1676 tree expr = MEM_EXPR (ref);
1677 rtx offset = MEM_OFFSET (ref);
1678 rtx size = MEM_SIZE (ref);
1679 unsigned int align = MEM_ALIGN (ref);
1682 /* It can happen that type_for_mode was given a mode for which there
1683 is no language-level type. In which case it returns NULL, which
1688 type = TYPE_P (t) ? t : TREE_TYPE (t);
1690 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1691 wrong answer, as it assumes that DECL_RTL already has the right alias
1692 info. Callers should not set DECL_RTL until after the call to
1693 set_mem_attributes. */
1694 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1697 /* Get the alias set from the expression or type (perhaps using a
1698 front-end routine) and use it. */
1699 alias = get_alias_set (t);
1701 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1702 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1703 RTX_UNCHANGING_P (ref)
1704 |= ((lang_hooks.honor_readonly
1705 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1706 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1708 /* If we are making an object of this type, or if this is a DECL, we know
1709 that it is a scalar if the type is not an aggregate. */
1710 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1711 MEM_SCALAR_P (ref) = 1;
1713 /* We can set the alignment from the type if we are making an object,
1714 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1715 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1716 align = MAX (align, TYPE_ALIGN (type));
1718 /* If the size is known, we can set that. */
1719 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1720 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1722 /* If T is not a type, we may be able to deduce some more information about
1726 maybe_set_unchanging (ref, t);
1727 if (TREE_THIS_VOLATILE (t))
1728 MEM_VOLATILE_P (ref) = 1;
1730 /* Now remove any conversions: they don't change what the underlying
1731 object is. Likewise for SAVE_EXPR. */
1732 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1733 || TREE_CODE (t) == NON_LVALUE_EXPR
1734 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1735 || TREE_CODE (t) == SAVE_EXPR)
1736 t = TREE_OPERAND (t, 0);
1738 /* If this expression can't be addressed (e.g., it contains a reference
1739 to a non-addressable field), show we don't change its alias set. */
1740 if (! can_address_p (t))
1741 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1743 /* If this is a decl, set the attributes of the MEM from it. */
1747 offset = const0_rtx;
1748 size = (DECL_SIZE_UNIT (t)
1749 && host_integerp (DECL_SIZE_UNIT (t), 1)
1750 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1751 align = DECL_ALIGN (t);
1754 /* If this is a constant, we know the alignment. */
1755 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1757 align = TYPE_ALIGN (type);
1758 #ifdef CONSTANT_ALIGNMENT
1759 align = CONSTANT_ALIGNMENT (t, align);
1763 /* If this is a field reference and not a bit-field, record it. */
1764 /* ??? There is some information that can be gleened from bit-fields,
1765 such as the word offset in the structure that might be modified.
1766 But skip it for now. */
1767 else if (TREE_CODE (t) == COMPONENT_REF
1768 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1770 expr = component_ref_for_mem_expr (t);
1771 offset = const0_rtx;
1772 /* ??? Any reason the field size would be different than
1773 the size we got from the type? */
1776 /* If this is an array reference, look for an outer field reference. */
1777 else if (TREE_CODE (t) == ARRAY_REF)
1779 tree off_tree = size_zero_node;
1784 = fold (build (PLUS_EXPR, sizetype,
1785 fold (build (MULT_EXPR, sizetype,
1786 TREE_OPERAND (t, 1),
1787 TYPE_SIZE_UNIT (TREE_TYPE (t)))),
1789 t = TREE_OPERAND (t, 0);
1791 while (TREE_CODE (t) == ARRAY_REF);
1793 if (TREE_CODE (t) == COMPONENT_REF)
1795 expr = component_ref_for_mem_expr (t);
1796 if (host_integerp (off_tree, 1))
1797 offset = GEN_INT (tree_low_cst (off_tree, 1));
1798 /* ??? Any reason the field size would be different than
1799 the size we got from the type? */
1804 /* Now set the attributes we computed above. */
1806 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1808 /* If this is already known to be a scalar or aggregate, we are done. */
1809 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1812 /* If it is a reference into an aggregate, this is part of an aggregate.
1813 Otherwise we don't know. */
1814 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1815 || TREE_CODE (t) == ARRAY_RANGE_REF
1816 || TREE_CODE (t) == BIT_FIELD_REF)
1817 MEM_IN_STRUCT_P (ref) = 1;
1820 /* Set the alias set of MEM to SET. */
1823 set_mem_alias_set (mem, set)
1827 #ifdef ENABLE_CHECKING
1828 /* If the new and old alias sets don't conflict, something is wrong. */
1829 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1833 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1834 MEM_SIZE (mem), MEM_ALIGN (mem),
1838 /* Set the alignment of MEM to ALIGN bits. */
1841 set_mem_align (mem, align)
1845 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1846 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1850 /* Set the expr for MEM to EXPR. */
1853 set_mem_expr (mem, expr)
1858 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1859 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1862 /* Set the offset of MEM to OFFSET. */
1865 set_mem_offset (mem, offset)
1868 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1869 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1873 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1874 and its address changed to ADDR. (VOIDmode means don't change the mode.
1875 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1876 returned memory location is required to be valid. The memory
1877 attributes are not changed. */
1880 change_address_1 (memref, mode, addr, validate)
1882 enum machine_mode mode;
1888 if (GET_CODE (memref) != MEM)
1890 if (mode == VOIDmode)
1891 mode = GET_MODE (memref);
1893 addr = XEXP (memref, 0);
1897 if (reload_in_progress || reload_completed)
1899 if (! memory_address_p (mode, addr))
1903 addr = memory_address (mode, addr);
1906 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1909 new = gen_rtx_MEM (mode, addr);
1910 MEM_COPY_ATTRIBUTES (new, memref);
1914 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1915 way we are changing MEMREF, so we only preserve the alias set. */
1918 change_address (memref, mode, addr)
1920 enum machine_mode mode;
1923 rtx new = change_address_1 (memref, mode, addr, 1);
1924 enum machine_mode mmode = GET_MODE (new);
1927 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1928 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1929 (mmode == BLKmode ? BITS_PER_UNIT
1930 : GET_MODE_ALIGNMENT (mmode)),
1936 /* Return a memory reference like MEMREF, but with its mode changed
1937 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1938 nonzero, the memory address is forced to be valid.
1939 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1940 and caller is responsible for adjusting MEMREF base register. */
1943 adjust_address_1 (memref, mode, offset, validate, adjust)
1945 enum machine_mode mode;
1946 HOST_WIDE_INT offset;
1947 int validate, adjust;
1949 rtx addr = XEXP (memref, 0);
1951 rtx memoffset = MEM_OFFSET (memref);
1953 unsigned int memalign = MEM_ALIGN (memref);
1955 /* ??? Prefer to create garbage instead of creating shared rtl.
1956 This may happen even if offset is non-zero -- consider
1957 (plus (plus reg reg) const_int) -- so do this always. */
1958 addr = copy_rtx (addr);
1962 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1963 object, we can merge it into the LO_SUM. */
1964 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1966 && (unsigned HOST_WIDE_INT) offset
1967 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1968 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1969 plus_constant (XEXP (addr, 1), offset));
1971 addr = plus_constant (addr, offset);
1974 new = change_address_1 (memref, mode, addr, validate);
1976 /* Compute the new values of the memory attributes due to this adjustment.
1977 We add the offsets and update the alignment. */
1979 memoffset = GEN_INT (offset + INTVAL (memoffset));
1981 /* Compute the new alignment by taking the MIN of the alignment and the
1982 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1987 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1989 /* We can compute the size in a number of ways. */
1990 if (GET_MODE (new) != BLKmode)
1991 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1992 else if (MEM_SIZE (memref))
1993 size = plus_constant (MEM_SIZE (memref), -offset);
1995 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1996 memoffset, size, memalign, GET_MODE (new));
1998 /* At some point, we should validate that this offset is within the object,
1999 if all the appropriate values are known. */
2003 /* Return a memory reference like MEMREF, but with its mode changed
2004 to MODE and its address changed to ADDR, which is assumed to be
2005 MEMREF offseted by OFFSET bytes. If VALIDATE is
2006 nonzero, the memory address is forced to be valid. */
2009 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2011 enum machine_mode mode;
2013 HOST_WIDE_INT offset;
2016 memref = change_address_1 (memref, VOIDmode, addr, validate);
2017 return adjust_address_1 (memref, mode, offset, validate, 0);
2020 /* Return a memory reference like MEMREF, but whose address is changed by
2021 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2022 known to be in OFFSET (possibly 1). */
2025 offset_address (memref, offset, pow2)
2030 rtx new, addr = XEXP (memref, 0);
2032 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2034 /* At this point we don't know _why_ the address is invalid. It
2035 could have secondary memory refereces, multiplies or anything.
2037 However, if we did go and rearrange things, we can wind up not
2038 being able to recognize the magic around pic_offset_table_rtx.
2039 This stuff is fragile, and is yet another example of why it is
2040 bad to expose PIC machinery too early. */
2041 if (! memory_address_p (GET_MODE (memref), new)
2042 && GET_CODE (addr) == PLUS
2043 && XEXP (addr, 0) == pic_offset_table_rtx)
2045 addr = force_reg (GET_MODE (addr), addr);
2046 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2049 update_temp_slot_address (XEXP (memref, 0), new);
2050 new = change_address_1 (memref, VOIDmode, new, 1);
2052 /* Update the alignment to reflect the offset. Reset the offset, which
2055 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2056 MIN (MEM_ALIGN (memref),
2057 (unsigned HOST_WIDE_INT) pow2 * BITS_PER_UNIT),
2062 /* Return a memory reference like MEMREF, but with its address changed to
2063 ADDR. The caller is asserting that the actual piece of memory pointed
2064 to is the same, just the form of the address is being changed, such as
2065 by putting something into a register. */
2068 replace_equiv_address (memref, addr)
2072 /* change_address_1 copies the memory attribute structure without change
2073 and that's exactly what we want here. */
2074 update_temp_slot_address (XEXP (memref, 0), addr);
2075 return change_address_1 (memref, VOIDmode, addr, 1);
2078 /* Likewise, but the reference is not required to be valid. */
2081 replace_equiv_address_nv (memref, addr)
2085 return change_address_1 (memref, VOIDmode, addr, 0);
2088 /* Return a memory reference like MEMREF, but with its mode widened to
2089 MODE and offset by OFFSET. This would be used by targets that e.g.
2090 cannot issue QImode memory operations and have to use SImode memory
2091 operations plus masking logic. */
2094 widen_memory_access (memref, mode, offset)
2096 enum machine_mode mode;
2097 HOST_WIDE_INT offset;
2099 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2100 tree expr = MEM_EXPR (new);
2101 rtx memoffset = MEM_OFFSET (new);
2102 unsigned int size = GET_MODE_SIZE (mode);
2104 /* If we don't know what offset we were at within the expression, then
2105 we can't know if we've overstepped the bounds. */
2111 if (TREE_CODE (expr) == COMPONENT_REF)
2113 tree field = TREE_OPERAND (expr, 1);
2115 if (! DECL_SIZE_UNIT (field))
2121 /* Is the field at least as large as the access? If so, ok,
2122 otherwise strip back to the containing structure. */
2123 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2124 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2125 && INTVAL (memoffset) >= 0)
2128 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2134 expr = TREE_OPERAND (expr, 0);
2135 memoffset = (GEN_INT (INTVAL (memoffset)
2136 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2137 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2140 /* Similarly for the decl. */
2141 else if (DECL_P (expr)
2142 && DECL_SIZE_UNIT (expr)
2143 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2144 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2145 && (! memoffset || INTVAL (memoffset) >= 0))
2149 /* The widened memory access overflows the expression, which means
2150 that it could alias another expression. Zap it. */
2157 memoffset = NULL_RTX;
2159 /* The widened memory may alias other stuff, so zap the alias set. */
2160 /* ??? Maybe use get_alias_set on any remaining expression. */
2162 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2163 MEM_ALIGN (new), mode);
2168 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2175 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2176 NULL, label_num++, NULL, NULL);
2178 LABEL_NUSES (label) = 0;
2179 LABEL_ALTERNATE_NAME (label) = NULL;
2183 /* For procedure integration. */
2185 /* Install new pointers to the first and last insns in the chain.
2186 Also, set cur_insn_uid to one higher than the last in use.
2187 Used for an inline-procedure after copying the insn chain. */
2190 set_new_first_and_last_insn (first, last)
2199 for (insn = first; insn; insn = NEXT_INSN (insn))
2200 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2205 /* Set the range of label numbers found in the current function.
2206 This is used when belatedly compiling an inline function. */
2209 set_new_first_and_last_label_num (first, last)
2212 base_label_num = label_num;
2213 first_label_num = first;
2214 last_label_num = last;
2217 /* Set the last label number found in the current function.
2218 This is used when belatedly compiling an inline function. */
2221 set_new_last_label_num (last)
2224 base_label_num = label_num;
2225 last_label_num = last;
2228 /* Restore all variables describing the current status from the structure *P.
2229 This is used after a nested function. */
2232 restore_emit_status (p)
2233 struct function *p ATTRIBUTE_UNUSED;
2238 /* Go through all the RTL insn bodies and copy any invalid shared
2239 structure. This routine should only be called once. */
2242 unshare_all_rtl (fndecl, insn)
2248 /* Make sure that virtual parameters are not shared. */
2249 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2250 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2252 /* Make sure that virtual stack slots are not shared. */
2253 unshare_all_decls (DECL_INITIAL (fndecl));
2255 /* Unshare just about everything else. */
2256 unshare_all_rtl_1 (insn);
2258 /* Make sure the addresses of stack slots found outside the insn chain
2259 (such as, in DECL_RTL of a variable) are not shared
2260 with the insn chain.
2262 This special care is necessary when the stack slot MEM does not
2263 actually appear in the insn chain. If it does appear, its address
2264 is unshared from all else at that point. */
2265 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2268 /* Go through all the RTL insn bodies and copy any invalid shared
2269 structure, again. This is a fairly expensive thing to do so it
2270 should be done sparingly. */
2273 unshare_all_rtl_again (insn)
2279 for (p = insn; p; p = NEXT_INSN (p))
2282 reset_used_flags (PATTERN (p));
2283 reset_used_flags (REG_NOTES (p));
2284 reset_used_flags (LOG_LINKS (p));
2287 /* Make sure that virtual stack slots are not shared. */
2288 reset_used_decls (DECL_INITIAL (cfun->decl));
2290 /* Make sure that virtual parameters are not shared. */
2291 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2292 reset_used_flags (DECL_RTL (decl));
2294 reset_used_flags (stack_slot_list);
2296 unshare_all_rtl (cfun->decl, insn);
2299 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2300 Assumes the mark bits are cleared at entry. */
2303 unshare_all_rtl_1 (insn)
2306 for (; insn; insn = NEXT_INSN (insn))
2309 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2310 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2311 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2315 /* Go through all virtual stack slots of a function and copy any
2316 shared structure. */
2318 unshare_all_decls (blk)
2323 /* Copy shared decls. */
2324 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2325 if (DECL_RTL_SET_P (t))
2326 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2328 /* Now process sub-blocks. */
2329 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2330 unshare_all_decls (t);
2333 /* Go through all virtual stack slots of a function and mark them as
2336 reset_used_decls (blk)
2342 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2343 if (DECL_RTL_SET_P (t))
2344 reset_used_flags (DECL_RTL (t));
2346 /* Now process sub-blocks. */
2347 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2348 reset_used_decls (t);
2351 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2352 placed in the result directly, rather than being copied. MAY_SHARE is
2353 either a MEM of an EXPR_LIST of MEMs. */
2356 copy_most_rtx (orig, may_share)
2363 const char *format_ptr;
2365 if (orig == may_share
2366 || (GET_CODE (may_share) == EXPR_LIST
2367 && in_expr_list_p (may_share, orig)))
2370 code = GET_CODE (orig);
2388 copy = rtx_alloc (code);
2389 PUT_MODE (copy, GET_MODE (orig));
2390 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2391 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2392 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2393 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2394 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2396 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2398 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2400 switch (*format_ptr++)
2403 XEXP (copy, i) = XEXP (orig, i);
2404 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2405 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2409 XEXP (copy, i) = XEXP (orig, i);
2414 XVEC (copy, i) = XVEC (orig, i);
2415 if (XVEC (orig, i) != NULL)
2417 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2418 for (j = 0; j < XVECLEN (copy, i); j++)
2419 XVECEXP (copy, i, j)
2420 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2425 XWINT (copy, i) = XWINT (orig, i);
2430 XINT (copy, i) = XINT (orig, i);
2434 XTREE (copy, i) = XTREE (orig, i);
2439 XSTR (copy, i) = XSTR (orig, i);
2443 /* Copy this through the wide int field; that's safest. */
2444 X0WINT (copy, i) = X0WINT (orig, i);
2454 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2455 Recursively does the same for subexpressions. */
2458 copy_rtx_if_shared (orig)
2464 const char *format_ptr;
2470 code = GET_CODE (x);
2472 /* These types may be freely shared. */
2486 /* SCRATCH must be shared because they represent distinct values. */
2490 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2491 a LABEL_REF, it isn't sharable. */
2492 if (GET_CODE (XEXP (x, 0)) == PLUS
2493 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2494 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2503 /* The chain of insns is not being copied. */
2507 /* A MEM is allowed to be shared if its address is constant.
2509 We used to allow sharing of MEMs which referenced
2510 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2511 that can lose. instantiate_virtual_regs will not unshare
2512 the MEMs, and combine may change the structure of the address
2513 because it looks safe and profitable in one context, but
2514 in some other context it creates unrecognizable RTL. */
2515 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2524 /* This rtx may not be shared. If it has already been seen,
2525 replace it with a copy of itself. */
2527 if (RTX_FLAG (x, used))
2531 copy = rtx_alloc (code);
2533 (sizeof (*copy) - sizeof (copy->fld)
2534 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2538 RTX_FLAG (x, used) = 1;
2540 /* Now scan the subexpressions recursively.
2541 We can store any replaced subexpressions directly into X
2542 since we know X is not shared! Any vectors in X
2543 must be copied if X was copied. */
2545 format_ptr = GET_RTX_FORMAT (code);
2547 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2549 switch (*format_ptr++)
2552 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2556 if (XVEC (x, i) != NULL)
2559 int len = XVECLEN (x, i);
2561 if (copied && len > 0)
2562 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2563 for (j = 0; j < len; j++)
2564 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2572 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2573 to look for shared sub-parts. */
2576 reset_used_flags (x)
2581 const char *format_ptr;
2586 code = GET_CODE (x);
2588 /* These types may be freely shared so we needn't do any resetting
2610 /* The chain of insns is not being copied. */
2617 RTX_FLAG (x, used) = 0;
2619 format_ptr = GET_RTX_FORMAT (code);
2620 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2622 switch (*format_ptr++)
2625 reset_used_flags (XEXP (x, i));
2629 for (j = 0; j < XVECLEN (x, i); j++)
2630 reset_used_flags (XVECEXP (x, i, j));
2636 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2637 Return X or the rtx for the pseudo reg the value of X was copied into.
2638 OTHER must be valid as a SET_DEST. */
2641 make_safe_from (x, other)
2645 switch (GET_CODE (other))
2648 other = SUBREG_REG (other);
2650 case STRICT_LOW_PART:
2653 other = XEXP (other, 0);
2659 if ((GET_CODE (other) == MEM
2661 && GET_CODE (x) != REG
2662 && GET_CODE (x) != SUBREG)
2663 || (GET_CODE (other) == REG
2664 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2665 || reg_mentioned_p (other, x))))
2667 rtx temp = gen_reg_rtx (GET_MODE (x));
2668 emit_move_insn (temp, x);
2674 /* Emission of insns (adding them to the doubly-linked list). */
2676 /* Return the first insn of the current sequence or current function. */
2684 /* Specify a new insn as the first in the chain. */
2687 set_first_insn (insn)
2690 if (PREV_INSN (insn) != 0)
2695 /* Return the last insn emitted in current sequence or current function. */
2703 /* Specify a new insn as the last in the chain. */
2706 set_last_insn (insn)
2709 if (NEXT_INSN (insn) != 0)
2714 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2717 get_last_insn_anywhere ()
2719 struct sequence_stack *stack;
2722 for (stack = seq_stack; stack; stack = stack->next)
2723 if (stack->last != 0)
2728 /* Return the first nonnote insn emitted in current sequence or current
2729 function. This routine looks inside SEQUENCEs. */
2732 get_first_nonnote_insn ()
2734 rtx insn = first_insn;
2738 insn = next_insn (insn);
2739 if (insn == 0 || GET_CODE (insn) != NOTE)
2746 /* Return the last nonnote insn emitted in current sequence or current
2747 function. This routine looks inside SEQUENCEs. */
2750 get_last_nonnote_insn ()
2752 rtx insn = last_insn;
2756 insn = previous_insn (insn);
2757 if (insn == 0 || GET_CODE (insn) != NOTE)
2764 /* Return a number larger than any instruction's uid in this function. */
2769 return cur_insn_uid;
2772 /* Renumber instructions so that no instruction UIDs are wasted. */
2775 renumber_insns (stream)
2780 /* If we're not supposed to renumber instructions, don't. */
2781 if (!flag_renumber_insns)
2784 /* If there aren't that many instructions, then it's not really
2785 worth renumbering them. */
2786 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2791 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2794 fprintf (stream, "Renumbering insn %d to %d\n",
2795 INSN_UID (insn), cur_insn_uid);
2796 INSN_UID (insn) = cur_insn_uid++;
2800 /* Return the next insn. If it is a SEQUENCE, return the first insn
2809 insn = NEXT_INSN (insn);
2810 if (insn && GET_CODE (insn) == INSN
2811 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2812 insn = XVECEXP (PATTERN (insn), 0, 0);
2818 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2822 previous_insn (insn)
2827 insn = PREV_INSN (insn);
2828 if (insn && GET_CODE (insn) == INSN
2829 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2830 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2836 /* Return the next insn after INSN that is not a NOTE. This routine does not
2837 look inside SEQUENCEs. */
2840 next_nonnote_insn (insn)
2845 insn = NEXT_INSN (insn);
2846 if (insn == 0 || GET_CODE (insn) != NOTE)
2853 /* Return the previous insn before INSN that is not a NOTE. This routine does
2854 not look inside SEQUENCEs. */
2857 prev_nonnote_insn (insn)
2862 insn = PREV_INSN (insn);
2863 if (insn == 0 || GET_CODE (insn) != NOTE)
2870 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2871 or 0, if there is none. This routine does not look inside
2875 next_real_insn (insn)
2880 insn = NEXT_INSN (insn);
2881 if (insn == 0 || GET_CODE (insn) == INSN
2882 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2889 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2890 or 0, if there is none. This routine does not look inside
2894 prev_real_insn (insn)
2899 insn = PREV_INSN (insn);
2900 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2901 || GET_CODE (insn) == JUMP_INSN)
2908 /* Find the next insn after INSN that really does something. This routine
2909 does not look inside SEQUENCEs. Until reload has completed, this is the
2910 same as next_real_insn. */
2913 active_insn_p (insn)
2916 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2917 || (GET_CODE (insn) == INSN
2918 && (! reload_completed
2919 || (GET_CODE (PATTERN (insn)) != USE
2920 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2924 next_active_insn (insn)
2929 insn = NEXT_INSN (insn);
2930 if (insn == 0 || active_insn_p (insn))
2937 /* Find the last insn before INSN that really does something. This routine
2938 does not look inside SEQUENCEs. Until reload has completed, this is the
2939 same as prev_real_insn. */
2942 prev_active_insn (insn)
2947 insn = PREV_INSN (insn);
2948 if (insn == 0 || active_insn_p (insn))
2955 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2963 insn = NEXT_INSN (insn);
2964 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2971 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2979 insn = PREV_INSN (insn);
2980 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2988 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2989 and REG_CC_USER notes so we can find it. */
2992 link_cc0_insns (insn)
2995 rtx user = next_nonnote_insn (insn);
2997 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2998 user = XVECEXP (PATTERN (user), 0, 0);
3000 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3002 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3005 /* Return the next insn that uses CC0 after INSN, which is assumed to
3006 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3007 applied to the result of this function should yield INSN).
3009 Normally, this is simply the next insn. However, if a REG_CC_USER note
3010 is present, it contains the insn that uses CC0.
3012 Return 0 if we can't find the insn. */
3015 next_cc0_user (insn)
3018 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3021 return XEXP (note, 0);
3023 insn = next_nonnote_insn (insn);
3024 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3025 insn = XVECEXP (PATTERN (insn), 0, 0);
3027 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3033 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3034 note, it is the previous insn. */
3037 prev_cc0_setter (insn)
3040 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3043 return XEXP (note, 0);
3045 insn = prev_nonnote_insn (insn);
3046 if (! sets_cc0_p (PATTERN (insn)))
3053 /* Increment the label uses for all labels present in rtx. */
3056 mark_label_nuses (x)
3063 code = GET_CODE (x);
3064 if (code == LABEL_REF)
3065 LABEL_NUSES (XEXP (x, 0))++;
3067 fmt = GET_RTX_FORMAT (code);
3068 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3071 mark_label_nuses (XEXP (x, i));
3072 else if (fmt[i] == 'E')
3073 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3074 mark_label_nuses (XVECEXP (x, i, j));
3079 /* Try splitting insns that can be split for better scheduling.
3080 PAT is the pattern which might split.
3081 TRIAL is the insn providing PAT.
3082 LAST is non-zero if we should return the last insn of the sequence produced.
3084 If this routine succeeds in splitting, it returns the first or last
3085 replacement insn depending on the value of LAST. Otherwise, it
3086 returns TRIAL. If the insn to be returned can be split, it will be. */
3089 try_split (pat, trial, last)
3093 rtx before = PREV_INSN (trial);
3094 rtx after = NEXT_INSN (trial);
3095 int has_barrier = 0;
3100 if (any_condjump_p (trial)
3101 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3102 split_branch_probability = INTVAL (XEXP (note, 0));
3103 probability = split_branch_probability;
3105 seq = split_insns (pat, trial);
3107 split_branch_probability = -1;
3109 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3110 We may need to handle this specially. */
3111 if (after && GET_CODE (after) == BARRIER)
3114 after = NEXT_INSN (after);
3119 /* Sometimes there will be only one insn in that list, this case will
3120 normally arise only when we want it in turn to be split (SFmode on
3121 the 29k is an example). */
3122 if (NEXT_INSN (seq) != NULL_RTX)
3124 rtx insn_last, insn;
3127 /* Avoid infinite loop if any insn of the result matches
3128 the original pattern. */
3132 if (INSN_P (insn_last)
3133 && rtx_equal_p (PATTERN (insn_last), pat))
3135 if (NEXT_INSN (insn_last) == NULL_RTX)
3137 insn_last = NEXT_INSN (insn_last);
3142 while (insn != NULL_RTX)
3144 if (GET_CODE (insn) == JUMP_INSN)
3146 mark_jump_label (PATTERN (insn), insn, 0);
3148 if (probability != -1
3149 && any_condjump_p (insn)
3150 && !find_reg_note (insn, REG_BR_PROB, 0))
3152 /* We can preserve the REG_BR_PROB notes only if exactly
3153 one jump is created, otherwise the machine description
3154 is responsible for this step using
3155 split_branch_probability variable. */
3159 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3160 GEN_INT (probability),
3165 insn = PREV_INSN (insn);
3168 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3169 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3170 if (GET_CODE (trial) == CALL_INSN)
3173 while (insn != NULL_RTX)
3175 if (GET_CODE (insn) == CALL_INSN)
3176 CALL_INSN_FUNCTION_USAGE (insn)
3177 = CALL_INSN_FUNCTION_USAGE (trial);
3179 insn = PREV_INSN (insn);
3183 /* Copy notes, particularly those related to the CFG. */
3184 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3186 switch (REG_NOTE_KIND (note))
3190 while (insn != NULL_RTX)
3192 if (GET_CODE (insn) == CALL_INSN
3193 || (flag_non_call_exceptions
3194 && may_trap_p (PATTERN (insn))))
3196 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3199 insn = PREV_INSN (insn);
3205 case REG_ALWAYS_RETURN:
3207 while (insn != NULL_RTX)
3209 if (GET_CODE (insn) == CALL_INSN)
3211 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3214 insn = PREV_INSN (insn);
3218 case REG_NON_LOCAL_GOTO:
3220 while (insn != NULL_RTX)
3222 if (GET_CODE (insn) == JUMP_INSN)
3224 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3227 insn = PREV_INSN (insn);
3236 /* If there are LABELS inside the split insns increment the
3237 usage count so we don't delete the label. */
3238 if (GET_CODE (trial) == INSN)
3241 while (insn != NULL_RTX)
3243 if (GET_CODE (insn) == INSN)
3244 mark_label_nuses (PATTERN (insn));
3246 insn = PREV_INSN (insn);
3250 tem = emit_insn_after_scope (seq, trial, INSN_SCOPE (trial));
3252 delete_insn (trial);
3254 emit_barrier_after (tem);
3256 /* Recursively call try_split for each new insn created; by the
3257 time control returns here that insn will be fully split, so
3258 set LAST and continue from the insn after the one returned.
3259 We can't use next_active_insn here since AFTER may be a note.
3260 Ignore deleted insns, which can be occur if not optimizing. */
3261 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3262 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3263 tem = try_split (PATTERN (tem), tem, 1);
3265 /* Avoid infinite loop if the result matches the original pattern. */
3266 else if (rtx_equal_p (PATTERN (seq), pat))
3270 PATTERN (trial) = PATTERN (seq);
3271 INSN_CODE (trial) = -1;
3272 try_split (PATTERN (trial), trial, last);
3275 /* Return either the first or the last insn, depending on which was
3278 ? (after ? PREV_INSN (after) : last_insn)
3279 : NEXT_INSN (before);
3285 /* Make and return an INSN rtx, initializing all its slots.
3286 Store PATTERN in the pattern slots. */
3289 make_insn_raw (pattern)
3294 insn = rtx_alloc (INSN);
3296 INSN_UID (insn) = cur_insn_uid++;
3297 PATTERN (insn) = pattern;
3298 INSN_CODE (insn) = -1;
3299 LOG_LINKS (insn) = NULL;
3300 REG_NOTES (insn) = NULL;
3301 INSN_SCOPE (insn) = NULL;
3302 BLOCK_FOR_INSN (insn) = NULL;
3304 #ifdef ENABLE_RTL_CHECKING
3307 && (returnjump_p (insn)
3308 || (GET_CODE (insn) == SET
3309 && SET_DEST (insn) == pc_rtx)))
3311 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3319 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3322 make_jump_insn_raw (pattern)
3327 insn = rtx_alloc (JUMP_INSN);
3328 INSN_UID (insn) = cur_insn_uid++;
3330 PATTERN (insn) = pattern;
3331 INSN_CODE (insn) = -1;
3332 LOG_LINKS (insn) = NULL;
3333 REG_NOTES (insn) = NULL;
3334 JUMP_LABEL (insn) = NULL;
3335 INSN_SCOPE (insn) = NULL;
3336 BLOCK_FOR_INSN (insn) = NULL;
3341 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3344 make_call_insn_raw (pattern)
3349 insn = rtx_alloc (CALL_INSN);
3350 INSN_UID (insn) = cur_insn_uid++;
3352 PATTERN (insn) = pattern;
3353 INSN_CODE (insn) = -1;
3354 LOG_LINKS (insn) = NULL;
3355 REG_NOTES (insn) = NULL;
3356 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3357 INSN_SCOPE (insn) = NULL;
3358 BLOCK_FOR_INSN (insn) = NULL;
3363 /* Add INSN to the end of the doubly-linked list.
3364 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3370 PREV_INSN (insn) = last_insn;
3371 NEXT_INSN (insn) = 0;
3373 if (NULL != last_insn)
3374 NEXT_INSN (last_insn) = insn;
3376 if (NULL == first_insn)
3382 /* Add INSN into the doubly-linked list after insn AFTER. This and
3383 the next should be the only functions called to insert an insn once
3384 delay slots have been filled since only they know how to update a
3388 add_insn_after (insn, after)
3391 rtx next = NEXT_INSN (after);
3394 if (optimize && INSN_DELETED_P (after))
3397 NEXT_INSN (insn) = next;
3398 PREV_INSN (insn) = after;
3402 PREV_INSN (next) = insn;
3403 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3404 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3406 else if (last_insn == after)
3410 struct sequence_stack *stack = seq_stack;
3411 /* Scan all pending sequences too. */
3412 for (; stack; stack = stack->next)
3413 if (after == stack->last)
3423 if (GET_CODE (after) != BARRIER
3424 && GET_CODE (insn) != BARRIER
3425 && (bb = BLOCK_FOR_INSN (after)))
3427 set_block_for_insn (insn, bb);
3429 bb->flags |= BB_DIRTY;
3430 /* Should not happen as first in the BB is always
3431 either NOTE or LABEL. */
3432 if (bb->end == after
3433 /* Avoid clobbering of structure when creating new BB. */
3434 && GET_CODE (insn) != BARRIER
3435 && (GET_CODE (insn) != NOTE
3436 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3440 NEXT_INSN (after) = insn;
3441 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3443 rtx sequence = PATTERN (after);
3444 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3448 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3449 the previous should be the only functions called to insert an insn once
3450 delay slots have been filled since only they know how to update a
3454 add_insn_before (insn, before)
3457 rtx prev = PREV_INSN (before);
3460 if (optimize && INSN_DELETED_P (before))
3463 PREV_INSN (insn) = prev;
3464 NEXT_INSN (insn) = before;
3468 NEXT_INSN (prev) = insn;
3469 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3471 rtx sequence = PATTERN (prev);
3472 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3475 else if (first_insn == before)
3479 struct sequence_stack *stack = seq_stack;
3480 /* Scan all pending sequences too. */
3481 for (; stack; stack = stack->next)
3482 if (before == stack->first)
3484 stack->first = insn;
3492 if (GET_CODE (before) != BARRIER
3493 && GET_CODE (insn) != BARRIER
3494 && (bb = BLOCK_FOR_INSN (before)))
3496 set_block_for_insn (insn, bb);
3498 bb->flags |= BB_DIRTY;
3499 /* Should not happen as first in the BB is always
3500 either NOTE or LABEl. */
3501 if (bb->head == insn
3502 /* Avoid clobbering of structure when creating new BB. */
3503 && GET_CODE (insn) != BARRIER
3504 && (GET_CODE (insn) != NOTE
3505 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3509 PREV_INSN (before) = insn;
3510 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3511 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3514 /* Remove an insn from its doubly-linked list. This function knows how
3515 to handle sequences. */
3520 rtx next = NEXT_INSN (insn);
3521 rtx prev = PREV_INSN (insn);
3526 NEXT_INSN (prev) = next;
3527 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3529 rtx sequence = PATTERN (prev);
3530 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3533 else if (first_insn == insn)
3537 struct sequence_stack *stack = seq_stack;
3538 /* Scan all pending sequences too. */
3539 for (; stack; stack = stack->next)
3540 if (insn == stack->first)
3542 stack->first = next;
3552 PREV_INSN (next) = prev;
3553 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3554 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3556 else if (last_insn == insn)
3560 struct sequence_stack *stack = seq_stack;
3561 /* Scan all pending sequences too. */
3562 for (; stack; stack = stack->next)
3563 if (insn == stack->last)
3572 if (GET_CODE (insn) != BARRIER
3573 && (bb = BLOCK_FOR_INSN (insn)))
3576 bb->flags |= BB_DIRTY;
3577 if (bb->head == insn)
3579 /* Never ever delete the basic block note without deleting whole
3581 if (GET_CODE (insn) == NOTE)
3585 if (bb->end == insn)
3590 /* Delete all insns made since FROM.
3591 FROM becomes the new last instruction. */
3594 delete_insns_since (from)
3600 NEXT_INSN (from) = 0;
3604 /* This function is deprecated, please use sequences instead.
3606 Move a consecutive bunch of insns to a different place in the chain.
3607 The insns to be moved are those between FROM and TO.
3608 They are moved to a new position after the insn AFTER.
3609 AFTER must not be FROM or TO or any insn in between.
3611 This function does not know about SEQUENCEs and hence should not be
3612 called after delay-slot filling has been done. */
3615 reorder_insns_nobb (from, to, after)
3616 rtx from, to, after;
3618 /* Splice this bunch out of where it is now. */
3619 if (PREV_INSN (from))
3620 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3622 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3623 if (last_insn == to)
3624 last_insn = PREV_INSN (from);
3625 if (first_insn == from)
3626 first_insn = NEXT_INSN (to);
3628 /* Make the new neighbors point to it and it to them. */
3629 if (NEXT_INSN (after))
3630 PREV_INSN (NEXT_INSN (after)) = to;
3632 NEXT_INSN (to) = NEXT_INSN (after);
3633 PREV_INSN (from) = after;
3634 NEXT_INSN (after) = from;
3635 if (after == last_insn)
3639 /* Same as function above, but take care to update BB boundaries. */
3641 reorder_insns (from, to, after)
3642 rtx from, to, after;
3644 rtx prev = PREV_INSN (from);
3645 basic_block bb, bb2;
3647 reorder_insns_nobb (from, to, after);
3649 if (GET_CODE (after) != BARRIER
3650 && (bb = BLOCK_FOR_INSN (after)))
3653 bb->flags |= BB_DIRTY;
3655 if (GET_CODE (from) != BARRIER
3656 && (bb2 = BLOCK_FOR_INSN (from)))
3660 bb2->flags |= BB_DIRTY;
3663 if (bb->end == after)
3666 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3667 set_block_for_insn (x, bb);
3671 /* Return the line note insn preceding INSN. */
3674 find_line_note (insn)
3677 if (no_line_numbers)
3680 for (; insn; insn = PREV_INSN (insn))
3681 if (GET_CODE (insn) == NOTE
3682 && NOTE_LINE_NUMBER (insn) >= 0)
3688 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3689 of the moved insns when debugging. This may insert a note between AFTER
3690 and FROM, and another one after TO. */
3693 reorder_insns_with_line_notes (from, to, after)
3694 rtx from, to, after;
3696 rtx from_line = find_line_note (from);
3697 rtx after_line = find_line_note (after);
3699 reorder_insns (from, to, after);
3701 if (from_line == after_line)
3705 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3706 NOTE_LINE_NUMBER (from_line),
3709 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3710 NOTE_LINE_NUMBER (after_line),
3714 /* Remove unnecessary notes from the instruction stream. */
3717 remove_unnecessary_notes ()
3719 rtx block_stack = NULL_RTX;
3720 rtx eh_stack = NULL_RTX;
3725 /* We must not remove the first instruction in the function because
3726 the compiler depends on the first instruction being a note. */
3727 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3729 /* Remember what's next. */
3730 next = NEXT_INSN (insn);
3732 /* We're only interested in notes. */
3733 if (GET_CODE (insn) != NOTE)
3736 switch (NOTE_LINE_NUMBER (insn))
3738 case NOTE_INSN_DELETED:
3739 case NOTE_INSN_LOOP_END_TOP_COND:
3743 case NOTE_INSN_EH_REGION_BEG:
3744 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3747 case NOTE_INSN_EH_REGION_END:
3748 /* Too many end notes. */
3749 if (eh_stack == NULL_RTX)
3751 /* Mismatched nesting. */
3752 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3755 eh_stack = XEXP (eh_stack, 1);
3756 free_INSN_LIST_node (tmp);
3759 case NOTE_INSN_BLOCK_BEG:
3760 /* By now, all notes indicating lexical blocks should have
3761 NOTE_BLOCK filled in. */
3762 if (NOTE_BLOCK (insn) == NULL_TREE)
3764 block_stack = alloc_INSN_LIST (insn, block_stack);
3767 case NOTE_INSN_BLOCK_END:
3768 /* Too many end notes. */
3769 if (block_stack == NULL_RTX)
3771 /* Mismatched nesting. */
3772 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3775 block_stack = XEXP (block_stack, 1);
3776 free_INSN_LIST_node (tmp);
3778 /* Scan back to see if there are any non-note instructions
3779 between INSN and the beginning of this block. If not,
3780 then there is no PC range in the generated code that will
3781 actually be in this block, so there's no point in
3782 remembering the existence of the block. */
3783 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3785 /* This block contains a real instruction. Note that we
3786 don't include labels; if the only thing in the block
3787 is a label, then there are still no PC values that
3788 lie within the block. */
3792 /* We're only interested in NOTEs. */
3793 if (GET_CODE (tmp) != NOTE)
3796 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3798 /* We just verified that this BLOCK matches us with
3799 the block_stack check above. Never delete the
3800 BLOCK for the outermost scope of the function; we
3801 can refer to names from that scope even if the
3802 block notes are messed up. */
3803 if (! is_body_block (NOTE_BLOCK (insn))
3804 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3811 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3812 /* There's a nested block. We need to leave the
3813 current block in place since otherwise the debugger
3814 wouldn't be able to show symbols from our block in
3815 the nested block. */
3821 /* Too many begin notes. */
3822 if (block_stack || eh_stack)
3827 /* Emit insn(s) of given code and pattern
3828 at a specified place within the doubly-linked list.
3830 All of the emit_foo global entry points accept an object
3831 X which is either an insn list or a PATTERN of a single
3834 There are thus a few canonical ways to generate code and
3835 emit it at a specific place in the instruction stream. For
3836 example, consider the instruction named SPOT and the fact that
3837 we would like to emit some instructions before SPOT. We might
3841 ... emit the new instructions ...
3842 insns_head = get_insns ();
3845 emit_insn_before (insns_head, SPOT);
3847 It used to be common to generate SEQUENCE rtl instead, but that
3848 is a relic of the past which no longer occurs. The reason is that
3849 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3850 generated would almost certainly die right after it was created. */
3852 /* Make X be output before the instruction BEFORE. */
3855 emit_insn_before (x, before)
3861 #ifdef ENABLE_RTL_CHECKING
3862 if (before == NULL_RTX)
3869 switch (GET_CODE (x))
3880 rtx next = NEXT_INSN (insn);
3881 add_insn_before (insn, before);
3887 #ifdef ENABLE_RTL_CHECKING
3894 last = make_insn_raw (x);
3895 add_insn_before (last, before);
3902 /* Make an instruction with body X and code JUMP_INSN
3903 and output it before the instruction BEFORE. */
3906 emit_jump_insn_before (x, before)
3911 #ifdef ENABLE_RTL_CHECKING
3912 if (before == NULL_RTX)
3916 switch (GET_CODE (x))
3927 rtx next = NEXT_INSN (insn);
3928 add_insn_before (insn, before);
3934 #ifdef ENABLE_RTL_CHECKING
3941 last = make_jump_insn_raw (x);
3942 add_insn_before (last, before);
3949 /* Make an instruction with body X and code CALL_INSN
3950 and output it before the instruction BEFORE. */
3953 emit_call_insn_before (x, before)
3958 #ifdef ENABLE_RTL_CHECKING
3959 if (before == NULL_RTX)
3963 switch (GET_CODE (x))
3974 rtx next = NEXT_INSN (insn);
3975 add_insn_before (insn, before);
3981 #ifdef ENABLE_RTL_CHECKING
3988 last = make_call_insn_raw (x);
3989 add_insn_before (last, before);
3996 /* Make an insn of code BARRIER
3997 and output it before the insn BEFORE. */
4000 emit_barrier_before (before)
4003 rtx insn = rtx_alloc (BARRIER);
4005 INSN_UID (insn) = cur_insn_uid++;
4007 add_insn_before (insn, before);
4011 /* Emit the label LABEL before the insn BEFORE. */
4014 emit_label_before (label, before)
4017 /* This can be called twice for the same label as a result of the
4018 confusion that follows a syntax error! So make it harmless. */
4019 if (INSN_UID (label) == 0)
4021 INSN_UID (label) = cur_insn_uid++;
4022 add_insn_before (label, before);
4028 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4031 emit_note_before (subtype, before)
4035 rtx note = rtx_alloc (NOTE);
4036 INSN_UID (note) = cur_insn_uid++;
4037 NOTE_SOURCE_FILE (note) = 0;
4038 NOTE_LINE_NUMBER (note) = subtype;
4039 BLOCK_FOR_INSN (note) = NULL;
4041 add_insn_before (note, before);
4045 /* Helper for emit_insn_after, handles lists of instructions
4048 static rtx emit_insn_after_1 PARAMS ((rtx, rtx));
4051 emit_insn_after_1 (first, after)
4058 if (GET_CODE (after) != BARRIER
4059 && (bb = BLOCK_FOR_INSN (after)))
4061 bb->flags |= BB_DIRTY;
4062 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4063 if (GET_CODE (last) != BARRIER)
4064 set_block_for_insn (last, bb);
4065 if (GET_CODE (last) != BARRIER)
4066 set_block_for_insn (last, bb);
4067 if (bb->end == after)
4071 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4074 after_after = NEXT_INSN (after);
4076 NEXT_INSN (after) = first;
4077 PREV_INSN (first) = after;
4078 NEXT_INSN (last) = after_after;
4080 PREV_INSN (after_after) = last;
4082 if (after == last_insn)
4087 /* Make X be output after the insn AFTER. */
4090 emit_insn_after (x, after)
4095 #ifdef ENABLE_RTL_CHECKING
4096 if (after == NULL_RTX)
4103 switch (GET_CODE (x))
4111 last = emit_insn_after_1 (x, after);
4114 #ifdef ENABLE_RTL_CHECKING
4121 last = make_insn_raw (x);
4122 add_insn_after (last, after);
4129 /* Similar to emit_insn_after, except that line notes are to be inserted so
4130 as to act as if this insn were at FROM. */
4133 emit_insn_after_with_line_notes (x, after, from)
4136 rtx from_line = find_line_note (from);
4137 rtx after_line = find_line_note (after);
4138 rtx insn = emit_insn_after (x, after);
4141 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
4142 NOTE_LINE_NUMBER (from_line),
4146 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
4147 NOTE_LINE_NUMBER (after_line),
4151 /* Make an insn of code JUMP_INSN with body X
4152 and output it after the insn AFTER. */
4155 emit_jump_insn_after (x, after)
4160 #ifdef ENABLE_RTL_CHECKING
4161 if (after == NULL_RTX)
4165 switch (GET_CODE (x))
4173 last = emit_insn_after_1 (x, after);
4176 #ifdef ENABLE_RTL_CHECKING
4183 last = make_jump_insn_raw (x);
4184 add_insn_after (last, after);
4191 /* Make an instruction with body X and code CALL_INSN
4192 and output it after the instruction AFTER. */
4195 emit_call_insn_after (x, after)
4200 #ifdef ENABLE_RTL_CHECKING
4201 if (after == NULL_RTX)
4205 switch (GET_CODE (x))
4213 last = emit_insn_after_1 (x, after);
4216 #ifdef ENABLE_RTL_CHECKING
4223 last = make_call_insn_raw (x);
4224 add_insn_after (last, after);
4231 /* Make an insn of code BARRIER
4232 and output it after the insn AFTER. */
4235 emit_barrier_after (after)
4238 rtx insn = rtx_alloc (BARRIER);
4240 INSN_UID (insn) = cur_insn_uid++;
4242 add_insn_after (insn, after);
4246 /* Emit the label LABEL after the insn AFTER. */
4249 emit_label_after (label, after)
4252 /* This can be called twice for the same label
4253 as a result of the confusion that follows a syntax error!
4254 So make it harmless. */
4255 if (INSN_UID (label) == 0)
4257 INSN_UID (label) = cur_insn_uid++;
4258 add_insn_after (label, after);
4264 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4267 emit_note_after (subtype, after)
4271 rtx note = rtx_alloc (NOTE);
4272 INSN_UID (note) = cur_insn_uid++;
4273 NOTE_SOURCE_FILE (note) = 0;
4274 NOTE_LINE_NUMBER (note) = subtype;
4275 BLOCK_FOR_INSN (note) = NULL;
4276 add_insn_after (note, after);
4280 /* Emit a line note for FILE and LINE after the insn AFTER. */
4283 emit_line_note_after (file, line, after)
4290 if (no_line_numbers && line > 0)
4296 note = rtx_alloc (NOTE);
4297 INSN_UID (note) = cur_insn_uid++;
4298 NOTE_SOURCE_FILE (note) = file;
4299 NOTE_LINE_NUMBER (note) = line;
4300 BLOCK_FOR_INSN (note) = NULL;
4301 add_insn_after (note, after);
4305 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4307 emit_insn_after_scope (pattern, after, scope)
4311 rtx last = emit_insn_after (pattern, after);
4313 after = NEXT_INSN (after);
4316 if (active_insn_p (after))
4317 INSN_SCOPE (after) = scope;
4320 after = NEXT_INSN (after);
4325 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4327 emit_jump_insn_after_scope (pattern, after, scope)
4331 rtx last = emit_jump_insn_after (pattern, after);
4333 after = NEXT_INSN (after);
4336 if (active_insn_p (after))
4337 INSN_SCOPE (after) = scope;
4340 after = NEXT_INSN (after);
4345 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4347 emit_call_insn_after_scope (pattern, after, scope)
4351 rtx last = emit_call_insn_after (pattern, after);
4353 after = NEXT_INSN (after);
4356 if (active_insn_p (after))
4357 INSN_SCOPE (after) = scope;
4360 after = NEXT_INSN (after);
4365 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4367 emit_insn_before_scope (pattern, before, scope)
4368 rtx pattern, before;
4371 rtx first = PREV_INSN (before);
4372 rtx last = emit_insn_before (pattern, before);
4374 first = NEXT_INSN (first);
4377 if (active_insn_p (first))
4378 INSN_SCOPE (first) = scope;
4381 first = NEXT_INSN (first);
4386 /* Take X and emit it at the end of the doubly-linked
4389 Returns the last insn emitted. */
4395 rtx last = last_insn;
4401 switch (GET_CODE (x))
4412 rtx next = NEXT_INSN (insn);
4419 #ifdef ENABLE_RTL_CHECKING
4426 last = make_insn_raw (x);
4434 /* Make an insn of code JUMP_INSN with pattern X
4435 and add it to the end of the doubly-linked list. */
4443 switch (GET_CODE (x))
4454 rtx next = NEXT_INSN (insn);
4461 #ifdef ENABLE_RTL_CHECKING
4468 last = make_jump_insn_raw (x);
4476 /* Make an insn of code CALL_INSN with pattern X
4477 and add it to the end of the doubly-linked list. */
4485 switch (GET_CODE (x))
4493 insn = emit_insn (x);
4496 #ifdef ENABLE_RTL_CHECKING
4503 insn = make_call_insn_raw (x);
4511 /* Add the label LABEL to the end of the doubly-linked list. */
4517 /* This can be called twice for the same label
4518 as a result of the confusion that follows a syntax error!
4519 So make it harmless. */
4520 if (INSN_UID (label) == 0)
4522 INSN_UID (label) = cur_insn_uid++;
4528 /* Make an insn of code BARRIER
4529 and add it to the end of the doubly-linked list. */
4534 rtx barrier = rtx_alloc (BARRIER);
4535 INSN_UID (barrier) = cur_insn_uid++;
4540 /* Make an insn of code NOTE
4541 with data-fields specified by FILE and LINE
4542 and add it to the end of the doubly-linked list,
4543 but only if line-numbers are desired for debugging info. */
4546 emit_line_note (file, line)
4550 set_file_and_line_for_stmt (file, line);
4553 if (no_line_numbers)
4557 return emit_note (file, line);
4560 /* Make an insn of code NOTE
4561 with data-fields specified by FILE and LINE
4562 and add it to the end of the doubly-linked list.
4563 If it is a line-number NOTE, omit it if it matches the previous one. */
4566 emit_note (file, line)
4574 if (file && last_filename && !strcmp (file, last_filename)
4575 && line == last_linenum)
4577 last_filename = file;
4578 last_linenum = line;
4581 if (no_line_numbers && line > 0)
4587 note = rtx_alloc (NOTE);
4588 INSN_UID (note) = cur_insn_uid++;
4589 NOTE_SOURCE_FILE (note) = file;
4590 NOTE_LINE_NUMBER (note) = line;
4591 BLOCK_FOR_INSN (note) = NULL;
4596 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4599 emit_line_note_force (file, line)
4604 return emit_line_note (file, line);
4607 /* Cause next statement to emit a line note even if the line number
4608 has not changed. This is used at the beginning of a function. */
4611 force_next_line_note ()
4616 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4617 note of this type already exists, remove it first. */
4620 set_unique_reg_note (insn, kind, datum)
4625 rtx note = find_reg_note (insn, kind, NULL_RTX);
4631 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4632 has multiple sets (some callers assume single_set
4633 means the insn only has one set, when in fact it
4634 means the insn only has one * useful * set). */
4635 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4642 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4643 It serves no useful purpose and breaks eliminate_regs. */
4644 if (GET_CODE (datum) == ASM_OPERANDS)
4654 XEXP (note, 0) = datum;
4658 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4659 return REG_NOTES (insn);
4662 /* Return an indication of which type of insn should have X as a body.
4663 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4669 if (GET_CODE (x) == CODE_LABEL)
4671 if (GET_CODE (x) == CALL)
4673 if (GET_CODE (x) == RETURN)
4675 if (GET_CODE (x) == SET)
4677 if (SET_DEST (x) == pc_rtx)
4679 else if (GET_CODE (SET_SRC (x)) == CALL)
4684 if (GET_CODE (x) == PARALLEL)
4687 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4688 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4690 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4691 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4693 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4694 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4700 /* Emit the rtl pattern X as an appropriate kind of insn.
4701 If X is a label, it is simply added into the insn chain. */
4707 enum rtx_code code = classify_insn (x);
4709 if (code == CODE_LABEL)
4710 return emit_label (x);
4711 else if (code == INSN)
4712 return emit_insn (x);
4713 else if (code == JUMP_INSN)
4715 rtx insn = emit_jump_insn (x);
4716 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4717 return emit_barrier ();
4720 else if (code == CALL_INSN)
4721 return emit_call_insn (x);
4726 /* Space for free sequence stack entries. */
4727 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4729 /* Begin emitting insns to a sequence which can be packaged in an
4730 RTL_EXPR. If this sequence will contain something that might cause
4731 the compiler to pop arguments to function calls (because those
4732 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4733 details), use do_pending_stack_adjust before calling this function.
4734 That will ensure that the deferred pops are not accidentally
4735 emitted in the middle of this sequence. */
4740 struct sequence_stack *tem;
4742 if (free_sequence_stack != NULL)
4744 tem = free_sequence_stack;
4745 free_sequence_stack = tem->next;
4748 tem = (struct sequence_stack *) ggc_alloc (sizeof (struct sequence_stack));
4750 tem->next = seq_stack;
4751 tem->first = first_insn;
4752 tem->last = last_insn;
4753 tem->sequence_rtl_expr = seq_rtl_expr;
4761 /* Similarly, but indicate that this sequence will be placed in T, an
4762 RTL_EXPR. See the documentation for start_sequence for more
4763 information about how to use this function. */
4766 start_sequence_for_rtl_expr (t)
4774 /* Set up the insn chain starting with FIRST as the current sequence,
4775 saving the previously current one. See the documentation for
4776 start_sequence for more information about how to use this function. */
4779 push_to_sequence (first)
4786 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4792 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4795 push_to_full_sequence (first, last)
4801 /* We really should have the end of the insn chain here. */
4802 if (last && NEXT_INSN (last))
4806 /* Set up the outer-level insn chain
4807 as the current sequence, saving the previously current one. */
4810 push_topmost_sequence ()
4812 struct sequence_stack *stack, *top = NULL;
4816 for (stack = seq_stack; stack; stack = stack->next)
4819 first_insn = top->first;
4820 last_insn = top->last;
4821 seq_rtl_expr = top->sequence_rtl_expr;
4824 /* After emitting to the outer-level insn chain, update the outer-level
4825 insn chain, and restore the previous saved state. */
4828 pop_topmost_sequence ()
4830 struct sequence_stack *stack, *top = NULL;
4832 for (stack = seq_stack; stack; stack = stack->next)
4835 top->first = first_insn;
4836 top->last = last_insn;
4837 /* ??? Why don't we save seq_rtl_expr here? */
4842 /* After emitting to a sequence, restore previous saved state.
4844 To get the contents of the sequence just made, you must call
4845 `get_insns' *before* calling here.
4847 If the compiler might have deferred popping arguments while
4848 generating this sequence, and this sequence will not be immediately
4849 inserted into the instruction stream, use do_pending_stack_adjust
4850 before calling get_insns. That will ensure that the deferred
4851 pops are inserted into this sequence, and not into some random
4852 location in the instruction stream. See INHIBIT_DEFER_POP for more
4853 information about deferred popping of arguments. */
4858 struct sequence_stack *tem = seq_stack;
4860 first_insn = tem->first;
4861 last_insn = tem->last;
4862 seq_rtl_expr = tem->sequence_rtl_expr;
4863 seq_stack = tem->next;
4865 memset (tem, 0, sizeof (*tem));
4866 tem->next = free_sequence_stack;
4867 free_sequence_stack = tem;
4870 /* This works like end_sequence, but records the old sequence in FIRST
4874 end_full_sequence (first, last)
4877 *first = first_insn;
4882 /* Return 1 if currently emitting into a sequence. */
4887 return seq_stack != 0;
4890 /* Put the various virtual registers into REGNO_REG_RTX. */
4893 init_virtual_regs (es)
4894 struct emit_status *es;
4896 rtx *ptr = es->x_regno_reg_rtx;
4897 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4898 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4899 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4900 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4901 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4905 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4906 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4907 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4908 static int copy_insn_n_scratches;
4910 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4911 copied an ASM_OPERANDS.
4912 In that case, it is the original input-operand vector. */
4913 static rtvec orig_asm_operands_vector;
4915 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4916 copied an ASM_OPERANDS.
4917 In that case, it is the copied input-operand vector. */
4918 static rtvec copy_asm_operands_vector;
4920 /* Likewise for the constraints vector. */
4921 static rtvec orig_asm_constraints_vector;
4922 static rtvec copy_asm_constraints_vector;
4924 /* Recursively create a new copy of an rtx for copy_insn.
4925 This function differs from copy_rtx in that it handles SCRATCHes and
4926 ASM_OPERANDs properly.
4927 Normally, this function is not used directly; use copy_insn as front end.
4928 However, you could first copy an insn pattern with copy_insn and then use
4929 this function afterwards to properly copy any REG_NOTEs containing
4939 const char *format_ptr;
4941 code = GET_CODE (orig);
4958 for (i = 0; i < copy_insn_n_scratches; i++)
4959 if (copy_insn_scratch_in[i] == orig)
4960 return copy_insn_scratch_out[i];
4964 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4965 a LABEL_REF, it isn't sharable. */
4966 if (GET_CODE (XEXP (orig, 0)) == PLUS
4967 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4968 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4972 /* A MEM with a constant address is not sharable. The problem is that
4973 the constant address may need to be reloaded. If the mem is shared,
4974 then reloading one copy of this mem will cause all copies to appear
4975 to have been reloaded. */
4981 copy = rtx_alloc (code);
4983 /* Copy the various flags, and other information. We assume that
4984 all fields need copying, and then clear the fields that should
4985 not be copied. That is the sensible default behavior, and forces
4986 us to explicitly document why we are *not* copying a flag. */
4987 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4989 /* We do not copy the USED flag, which is used as a mark bit during
4990 walks over the RTL. */
4991 RTX_FLAG (copy, used) = 0;
4993 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4994 if (GET_RTX_CLASS (code) == 'i')
4996 RTX_FLAG (copy, jump) = 0;
4997 RTX_FLAG (copy, call) = 0;
4998 RTX_FLAG (copy, frame_related) = 0;
5001 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5003 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5005 copy->fld[i] = orig->fld[i];
5006 switch (*format_ptr++)
5009 if (XEXP (orig, i) != NULL)
5010 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5015 if (XVEC (orig, i) == orig_asm_constraints_vector)
5016 XVEC (copy, i) = copy_asm_constraints_vector;
5017 else if (XVEC (orig, i) == orig_asm_operands_vector)
5018 XVEC (copy, i) = copy_asm_operands_vector;
5019 else if (XVEC (orig, i) != NULL)
5021 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5022 for (j = 0; j < XVECLEN (copy, i); j++)
5023 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5034 /* These are left unchanged. */
5042 if (code == SCRATCH)
5044 i = copy_insn_n_scratches++;
5045 if (i >= MAX_RECOG_OPERANDS)
5047 copy_insn_scratch_in[i] = orig;
5048 copy_insn_scratch_out[i] = copy;
5050 else if (code == ASM_OPERANDS)
5052 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5053 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5054 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5055 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5061 /* Create a new copy of an rtx.
5062 This function differs from copy_rtx in that it handles SCRATCHes and
5063 ASM_OPERANDs properly.
5064 INSN doesn't really have to be a full INSN; it could be just the
5070 copy_insn_n_scratches = 0;
5071 orig_asm_operands_vector = 0;
5072 orig_asm_constraints_vector = 0;
5073 copy_asm_operands_vector = 0;
5074 copy_asm_constraints_vector = 0;
5075 return copy_insn_1 (insn);
5078 /* Initialize data structures and variables in this file
5079 before generating rtl for each function. */
5084 struct function *f = cfun;
5086 f->emit = (struct emit_status *) ggc_alloc (sizeof (struct emit_status));
5089 seq_rtl_expr = NULL;
5091 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5094 first_label_num = label_num;
5098 /* Init the tables that describe all the pseudo regs. */
5100 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5102 f->emit->regno_pointer_align
5103 = (unsigned char *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5104 * sizeof (unsigned char));
5107 = (rtx *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5111 = (tree *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5114 /* Put copies of all the hard registers into regno_reg_rtx. */
5115 memcpy (regno_reg_rtx,
5116 static_regno_reg_rtx,
5117 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5119 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5120 init_virtual_regs (f->emit);
5122 /* Indicate that the virtual registers and stack locations are
5124 REG_POINTER (stack_pointer_rtx) = 1;
5125 REG_POINTER (frame_pointer_rtx) = 1;
5126 REG_POINTER (hard_frame_pointer_rtx) = 1;
5127 REG_POINTER (arg_pointer_rtx) = 1;
5129 REG_POINTER (virtual_incoming_args_rtx) = 1;
5130 REG_POINTER (virtual_stack_vars_rtx) = 1;
5131 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5132 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5133 REG_POINTER (virtual_cfa_rtx) = 1;
5135 #ifdef STACK_BOUNDARY
5136 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5137 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5138 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5139 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5141 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5142 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5143 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5144 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5145 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5148 #ifdef INIT_EXPANDERS
5153 /* Generate the constant 0. */
5156 gen_const_vector_0 (mode)
5157 enum machine_mode mode;
5162 enum machine_mode inner;
5164 units = GET_MODE_NUNITS (mode);
5165 inner = GET_MODE_INNER (mode);
5167 v = rtvec_alloc (units);
5169 /* We need to call this function after we to set CONST0_RTX first. */
5170 if (!CONST0_RTX (inner))
5173 for (i = 0; i < units; ++i)
5174 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5176 tem = gen_rtx_CONST_VECTOR (mode, v);
5180 /* Create some permanent unique rtl objects shared between all functions.
5181 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5184 init_emit_once (line_numbers)
5188 enum machine_mode mode;
5189 enum machine_mode double_mode;
5191 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5193 const_int_htab = htab_create (37, const_int_htab_hash,
5194 const_int_htab_eq, NULL);
5196 const_double_htab = htab_create (37, const_double_htab_hash,
5197 const_double_htab_eq, NULL);
5199 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
5200 mem_attrs_htab_eq, NULL);
5202 no_line_numbers = ! line_numbers;
5204 /* Compute the word and byte modes. */
5206 byte_mode = VOIDmode;
5207 word_mode = VOIDmode;
5208 double_mode = VOIDmode;
5210 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5211 mode = GET_MODE_WIDER_MODE (mode))
5213 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5214 && byte_mode == VOIDmode)
5217 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5218 && word_mode == VOIDmode)
5222 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5223 mode = GET_MODE_WIDER_MODE (mode))
5225 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5226 && double_mode == VOIDmode)
5230 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5232 /* Assign register numbers to the globally defined register rtx.
5233 This must be done at runtime because the register number field
5234 is in a union and some compilers can't initialize unions. */
5236 pc_rtx = gen_rtx (PC, VOIDmode);
5237 cc0_rtx = gen_rtx (CC0, VOIDmode);
5238 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5239 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5240 if (hard_frame_pointer_rtx == 0)
5241 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5242 HARD_FRAME_POINTER_REGNUM);
5243 if (arg_pointer_rtx == 0)
5244 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5245 virtual_incoming_args_rtx =
5246 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5247 virtual_stack_vars_rtx =
5248 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5249 virtual_stack_dynamic_rtx =
5250 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5251 virtual_outgoing_args_rtx =
5252 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5253 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5255 /* Initialize RTL for commonly used hard registers. These are
5256 copied into regno_reg_rtx as we begin to compile each function. */
5257 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5258 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5260 #ifdef INIT_EXPANDERS
5261 /* This is to initialize {init|mark|free}_machine_status before the first
5262 call to push_function_context_to. This is needed by the Chill front
5263 end which calls push_function_context_to before the first call to
5264 init_function_start. */
5268 /* Create the unique rtx's for certain rtx codes and operand values. */
5270 /* Don't use gen_rtx here since gen_rtx in this case
5271 tries to use these variables. */
5272 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5273 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5274 gen_rtx_raw_CONST_INT (VOIDmode, i);
5276 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5277 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5278 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5280 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5282 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5283 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5284 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5285 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5287 for (i = 0; i <= 2; i++)
5289 REAL_VALUE_TYPE *r =
5290 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5292 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5293 mode = GET_MODE_WIDER_MODE (mode))
5294 const_tiny_rtx[i][(int) mode] =
5295 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5297 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5299 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5300 mode = GET_MODE_WIDER_MODE (mode))
5301 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5303 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5305 mode = GET_MODE_WIDER_MODE (mode))
5306 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5309 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5311 mode = GET_MODE_WIDER_MODE (mode))
5312 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5314 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5316 mode = GET_MODE_WIDER_MODE (mode))
5317 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5319 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5320 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5321 const_tiny_rtx[0][i] = const0_rtx;
5323 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5324 if (STORE_FLAG_VALUE == 1)
5325 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5327 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5328 return_address_pointer_rtx
5329 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5333 struct_value_rtx = STRUCT_VALUE;
5335 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5338 #ifdef STRUCT_VALUE_INCOMING
5339 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5341 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5342 struct_value_incoming_rtx
5343 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5345 struct_value_incoming_rtx = struct_value_rtx;
5349 #ifdef STATIC_CHAIN_REGNUM
5350 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5352 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5353 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5354 static_chain_incoming_rtx
5355 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5358 static_chain_incoming_rtx = static_chain_rtx;
5362 static_chain_rtx = STATIC_CHAIN;
5364 #ifdef STATIC_CHAIN_INCOMING
5365 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5367 static_chain_incoming_rtx = static_chain_rtx;
5371 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5372 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5375 /* Query and clear/ restore no_line_numbers. This is used by the
5376 switch / case handling in stmt.c to give proper line numbers in
5377 warnings about unreachable code. */
5380 force_line_numbers ()
5382 int old = no_line_numbers;
5384 no_line_numbers = 0;
5386 force_next_line_note ();
5391 restore_line_number_status (old_value)
5394 no_line_numbers = old_value;
5397 /* Produce exact duplicate of insn INSN after AFTER.
5398 Care updating of libcall regions if present. */
5401 emit_copy_of_insn_after (insn, after)
5405 rtx note1, note2, link;
5407 switch (GET_CODE (insn))
5410 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5414 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5418 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5419 if (CALL_INSN_FUNCTION_USAGE (insn))
5420 CALL_INSN_FUNCTION_USAGE (new)
5421 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5422 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5423 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5430 /* Update LABEL_NUSES. */
5431 mark_jump_label (PATTERN (new), new, 0);
5433 INSN_SCOPE (new) = INSN_SCOPE (insn);
5435 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5437 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5438 if (REG_NOTE_KIND (link) != REG_LABEL)
5440 if (GET_CODE (link) == EXPR_LIST)
5442 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5447 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5452 /* Fix the libcall sequences. */
5453 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5456 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5458 XEXP (note1, 0) = p;
5459 XEXP (note2, 0) = new;
5464 #include "gt-emit-rtl.h"