1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_last_label_num was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconst3;
114 REAL_VALUE_TYPE dconst10;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconstm2;
117 REAL_VALUE_TYPE dconsthalf;
118 REAL_VALUE_TYPE dconstthird;
119 REAL_VALUE_TYPE dconstpi;
120 REAL_VALUE_TYPE dconste;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_int_htab;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
163 htab_t mem_attrs_htab;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
167 htab_t reg_attrs_htab;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
171 htab_t const_double_htab;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx make_jump_insn_raw (rtx);
180 static rtx make_call_insn_raw (rtx);
181 static rtx find_line_note (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void unshare_all_decls (tree);
184 static void reset_used_decls (tree);
185 static void mark_label_nuses (rtx);
186 static hashval_t const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx lookup_const_double (rtx);
191 static hashval_t mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
195 static hashval_t reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs *get_reg_attrs (tree, int);
198 static tree component_ref_for_mem_expr (tree);
199 static rtx gen_const_vector_0 (enum machine_mode);
200 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
201 static void copy_rtx_if_shared_1 (rtx *orig);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x)
212 return (hashval_t) INTVAL ((rtx) x);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x, const void *y)
222 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x)
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x, const void *y)
248 rtx a = (rtx)x, b = (rtx)y;
250 if (GET_MODE (a) != GET_MODE (b))
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x)
265 mem_attrs *p = (mem_attrs *) x;
267 return (p->alias ^ (p->align * 1000)
268 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
269 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x, const void *y)
280 mem_attrs *p = (mem_attrs *) x;
281 mem_attrs *q = (mem_attrs *) y;
283 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
284 && p->size == q->size && p->align == q->align);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
293 unsigned int align, enum machine_mode mode)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias == 0 && expr == 0 && offset == 0
303 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
304 && (STRICT_ALIGNMENT && mode != BLKmode
305 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
310 attrs.offset = offset;
314 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
317 *slot = ggc_alloc (sizeof (mem_attrs));
318 memcpy (*slot, &attrs, sizeof (mem_attrs));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x)
329 reg_attrs *p = (reg_attrs *) x;
331 return ((p->offset * 1000) ^ (long) p->decl);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x, const void *y)
341 reg_attrs *p = (reg_attrs *) x;
342 reg_attrs *q = (reg_attrs *) y;
344 return (p->decl == q->decl && p->offset == q->offset);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl, int offset)
356 /* If everything is the default, we can just return zero. */
357 if (decl == 0 && offset == 0)
361 attrs.offset = offset;
363 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
366 *slot = ggc_alloc (sizeof (reg_attrs));
367 memcpy (*slot, &attrs, sizeof (reg_attrs));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode, int regno)
380 rtx x = gen_rtx_raw_REG (mode, regno);
381 ORIGINAL_REGNO (x) = regno;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
394 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
395 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx && arg == STORE_FLAG_VALUE)
399 return const_true_rtx;
402 /* Look up the CONST_INT in the hash table. */
403 slot = htab_find_slot_with_hash (const_int_htab, &arg,
404 (hashval_t) arg, INSERT);
406 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
412 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
414 return GEN_INT (trunc_int_for_mode (c, mode));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real)
427 void **slot = htab_find_slot (const_double_htab, real, INSERT);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
439 rtx real = rtx_alloc (CONST_DOUBLE);
440 PUT_MODE (real, mode);
442 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
444 return lookup_const_double (real);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
458 if (mode != VOIDmode)
461 if (GET_MODE_CLASS (mode) != MODE_INT
462 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width = GET_MODE_BITSIZE (mode);
472 if (width < HOST_BITS_PER_WIDE_INT
473 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
474 != ((HOST_WIDE_INT) (-1) << (width - 1))))
475 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
476 else if (width == HOST_BITS_PER_WIDE_INT
477 && ! (i1 == ~0 && i0 < 0))
479 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width < HOST_BITS_PER_WIDE_INT
493 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
494 i0 |= ((HOST_WIDE_INT) (-1) << width);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width <= HOST_BITS_PER_WIDE_INT)
515 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
522 /* We use VOIDmode for integers. */
523 value = rtx_alloc (CONST_DOUBLE);
524 PUT_MODE (value, VOIDmode);
526 CONST_DOUBLE_LOW (value) = i0;
527 CONST_DOUBLE_HIGH (value) = i1;
529 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
530 XWINT (value, i) = 0;
532 return lookup_const_double (value);
536 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode == Pmode && !reload_in_progress)
554 if (regno == FRAME_POINTER_REGNUM
555 && (!reload_completed || frame_pointer_needed))
556 return frame_pointer_rtx;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno == HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed || frame_pointer_needed))
560 return hard_frame_pointer_rtx;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno == ARG_POINTER_REGNUM)
564 return arg_pointer_rtx;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
568 return return_address_pointer_rtx;
570 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
572 return pic_offset_table_rtx;
573 if (regno == STACK_POINTER_REGNUM)
574 return stack_pointer_rtx;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno < FIRST_PSEUDO_REGISTER
593 && reg_raw_mode[regno] == mode)
594 return regno_reg_rtx[regno];
597 return gen_raw_REG (mode, regno);
601 gen_rtx_MEM (enum machine_mode mode, rtx addr)
603 rtx rt = gen_rtx_raw_MEM (mode, addr);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset % GET_MODE_SIZE (mode)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
628 return gen_rtx_raw_SUBREG (mode, reg, offset);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
637 enum machine_mode inmode;
639 inmode = GET_MODE (reg);
640 if (inmode == VOIDmode)
642 return gen_rtx_SUBREG (mode, reg,
643 subreg_lowpart_offset (mode, inmode));
646 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
648 ** This routine generates an RTX of the size specified by
649 ** <code>, which is an RTX code. The RTX structure is initialized
650 ** from the arguments <element1> through <elementn>, which are
651 ** interpreted according to the specific RTX type's format. The
652 ** special machine mode associated with the rtx (if any) is specified
655 ** gen_rtx can be invoked in a way which resembles the lisp-like
656 ** rtx it will generate. For example, the following rtx structure:
658 ** (plus:QI (mem:QI (reg:SI 1))
659 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
661 ** ...would be generated by the following C code:
663 ** gen_rtx (PLUS, QImode,
664 ** gen_rtx (MEM, QImode,
665 ** gen_rtx (REG, SImode, 1)),
666 ** gen_rtx (MEM, QImode,
667 ** gen_rtx (PLUS, SImode,
668 ** gen_rtx (REG, SImode, 2),
669 ** gen_rtx (REG, SImode, 3)))),
674 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
676 int i; /* Array indices... */
677 const char *fmt; /* Current rtx's format... */
678 rtx rt_val; /* RTX to return to caller... */
686 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
691 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
692 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
694 rt_val = immed_double_const (arg0, arg1, mode);
699 rt_val = gen_rtx_REG (mode, va_arg (p, int));
703 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
707 rt_val = rtx_alloc (code); /* Allocate the storage space. */
708 rt_val->mode = mode; /* Store the machine mode... */
710 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
711 for (i = 0; i < GET_RTX_LENGTH (code); i++)
715 case '0': /* Field with unknown use. Zero it. */
716 X0EXP (rt_val, i) = NULL_RTX;
719 case 'i': /* An integer? */
720 XINT (rt_val, i) = va_arg (p, int);
723 case 'w': /* A wide integer? */
724 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
727 case 's': /* A string? */
728 XSTR (rt_val, i) = va_arg (p, char *);
731 case 'e': /* An expression? */
732 case 'u': /* An insn? Same except when printing. */
733 XEXP (rt_val, i) = va_arg (p, rtx);
736 case 'E': /* An RTX vector? */
737 XVEC (rt_val, i) = va_arg (p, rtvec);
740 case 'b': /* A bitmap? */
741 XBITMAP (rt_val, i) = va_arg (p, bitmap);
744 case 't': /* A tree? */
745 XTREE (rt_val, i) = va_arg (p, tree);
759 /* gen_rtvec (n, [rt1, ..., rtn])
761 ** This routine creates an rtvec and stores within it the
762 ** pointers to rtx's which are its arguments.
767 gen_rtvec (int n, ...)
776 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
778 vector = alloca (n * sizeof (rtx));
780 for (i = 0; i < n; i++)
781 vector[i] = va_arg (p, rtx);
783 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
787 return gen_rtvec_v (save_n, vector);
791 gen_rtvec_v (int n, rtx *argp)
797 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
799 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
801 for (i = 0; i < n; i++)
802 rt_val->elem[i] = *argp++;
807 /* Generate a REG rtx for a new pseudo register of mode MODE.
808 This pseudo is assigned the next sequential register number. */
811 gen_reg_rtx (enum machine_mode mode)
813 struct function *f = cfun;
816 /* Don't let anything called after initial flow analysis create new
821 if (generating_concat_p
822 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
823 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
825 /* For complex modes, don't make a single pseudo.
826 Instead, make a CONCAT of two pseudos.
827 This allows noncontiguous allocation of the real and imaginary parts,
828 which makes much better code. Besides, allocating DCmode
829 pseudos overstrains reload on some machines like the 386. */
830 rtx realpart, imagpart;
831 enum machine_mode partmode = GET_MODE_INNER (mode);
833 realpart = gen_reg_rtx (partmode);
834 imagpart = gen_reg_rtx (partmode);
835 return gen_rtx_CONCAT (mode, realpart, imagpart);
838 /* Make sure regno_pointer_align, and regno_reg_rtx are large
839 enough to have an element for this pseudo reg number. */
841 if (reg_rtx_no == f->emit->regno_pointer_align_length)
843 int old_size = f->emit->regno_pointer_align_length;
847 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
848 memset (new + old_size, 0, old_size);
849 f->emit->regno_pointer_align = (unsigned char *) new;
851 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
852 old_size * 2 * sizeof (rtx));
853 memset (new1 + old_size, 0, old_size * sizeof (rtx));
854 regno_reg_rtx = new1;
856 f->emit->regno_pointer_align_length = old_size * 2;
859 val = gen_raw_REG (mode, reg_rtx_no);
860 regno_reg_rtx[reg_rtx_no++] = val;
864 /* Generate a register with same attributes as REG,
865 but offsetted by OFFSET. */
868 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
870 rtx new = gen_rtx_REG (mode, regno);
871 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
872 REG_OFFSET (reg) + offset);
876 /* Set the decl for MEM to DECL. */
879 set_reg_attrs_from_mem (rtx reg, rtx mem)
881 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
883 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
886 /* Set the register attributes for registers contained in PARM_RTX.
887 Use needed values from memory attributes of MEM. */
890 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
892 if (GET_CODE (parm_rtx) == REG)
893 set_reg_attrs_from_mem (parm_rtx, mem);
894 else if (GET_CODE (parm_rtx) == PARALLEL)
896 /* Check for a NULL entry in the first slot, used to indicate that the
897 parameter goes both on the stack and in registers. */
898 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
899 for (; i < XVECLEN (parm_rtx, 0); i++)
901 rtx x = XVECEXP (parm_rtx, 0, i);
902 if (GET_CODE (XEXP (x, 0)) == REG)
903 REG_ATTRS (XEXP (x, 0))
904 = get_reg_attrs (MEM_EXPR (mem),
905 INTVAL (XEXP (x, 1)));
910 /* Assign the RTX X to declaration T. */
912 set_decl_rtl (tree t, rtx x)
914 DECL_CHECK (t)->decl.rtl = x;
918 /* For register, we maintain the reverse information too. */
919 if (GET_CODE (x) == REG)
920 REG_ATTRS (x) = get_reg_attrs (t, 0);
921 else if (GET_CODE (x) == SUBREG)
922 REG_ATTRS (SUBREG_REG (x))
923 = get_reg_attrs (t, -SUBREG_BYTE (x));
924 if (GET_CODE (x) == CONCAT)
926 if (REG_P (XEXP (x, 0)))
927 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
928 if (REG_P (XEXP (x, 1)))
929 REG_ATTRS (XEXP (x, 1))
930 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
932 if (GET_CODE (x) == PARALLEL)
935 for (i = 0; i < XVECLEN (x, 0); i++)
937 rtx y = XVECEXP (x, 0, i);
938 if (REG_P (XEXP (y, 0)))
939 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
944 /* Identify REG (which may be a CONCAT) as a user register. */
947 mark_user_reg (rtx reg)
949 if (GET_CODE (reg) == CONCAT)
951 REG_USERVAR_P (XEXP (reg, 0)) = 1;
952 REG_USERVAR_P (XEXP (reg, 1)) = 1;
954 else if (GET_CODE (reg) == REG)
955 REG_USERVAR_P (reg) = 1;
960 /* Identify REG as a probable pointer register and show its alignment
961 as ALIGN, if nonzero. */
964 mark_reg_pointer (rtx reg, int align)
966 if (! REG_POINTER (reg))
968 REG_POINTER (reg) = 1;
971 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
973 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
974 /* We can no-longer be sure just how aligned this pointer is. */
975 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
978 /* Return 1 plus largest pseudo reg number used in the current function. */
986 /* Return 1 + the largest label number used so far in the current function. */
991 if (last_label_num && label_num == base_label_num)
992 return last_label_num;
996 /* Return first label number used in this function (if any were used). */
999 get_first_label_num (void)
1001 return first_label_num;
1004 /* Return the final regno of X, which is a SUBREG of a hard
1007 subreg_hard_regno (rtx x, int check_mode)
1009 enum machine_mode mode = GET_MODE (x);
1010 unsigned int byte_offset, base_regno, final_regno;
1011 rtx reg = SUBREG_REG (x);
1013 /* This is where we attempt to catch illegal subregs
1014 created by the compiler. */
1015 if (GET_CODE (x) != SUBREG
1016 || GET_CODE (reg) != REG)
1018 base_regno = REGNO (reg);
1019 if (base_regno >= FIRST_PSEUDO_REGISTER)
1021 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1023 #ifdef ENABLE_CHECKING
1024 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1025 SUBREG_BYTE (x), mode))
1028 /* Catch non-congruent offsets too. */
1029 byte_offset = SUBREG_BYTE (x);
1030 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1033 final_regno = subreg_regno (x);
1038 /* Return a value representing some low-order bits of X, where the number
1039 of low-order bits is given by MODE. Note that no conversion is done
1040 between floating-point and fixed-point values, rather, the bit
1041 representation is returned.
1043 This function handles the cases in common between gen_lowpart, below,
1044 and two variants in cse.c and combine.c. These are the cases that can
1045 be safely handled at all points in the compilation.
1047 If this is not a case we can handle, return 0. */
1050 gen_lowpart_common (enum machine_mode mode, rtx x)
1052 int msize = GET_MODE_SIZE (mode);
1053 int xsize = GET_MODE_SIZE (GET_MODE (x));
1056 if (GET_MODE (x) == mode)
1059 /* MODE must occupy no more words than the mode of X. */
1060 if (GET_MODE (x) != VOIDmode
1061 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1062 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
1065 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1066 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1067 && GET_MODE (x) != VOIDmode && msize > xsize)
1070 offset = subreg_lowpart_offset (mode, GET_MODE (x));
1072 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1073 && (GET_MODE_CLASS (mode) == MODE_INT
1074 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1076 /* If we are getting the low-order part of something that has been
1077 sign- or zero-extended, we can either just use the object being
1078 extended or make a narrower extension. If we want an even smaller
1079 piece than the size of the object being extended, call ourselves
1082 This case is used mostly by combine and cse. */
1084 if (GET_MODE (XEXP (x, 0)) == mode)
1086 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1087 return gen_lowpart_common (mode, XEXP (x, 0));
1088 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
1089 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1091 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1092 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1093 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1094 else if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
1095 return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
1096 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1097 from the low-order part of the constant. */
1098 else if ((GET_MODE_CLASS (mode) == MODE_INT
1099 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1100 && GET_MODE (x) == VOIDmode
1101 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1103 /* If MODE is twice the host word size, X is already the desired
1104 representation. Otherwise, if MODE is wider than a word, we can't
1105 do this. If MODE is exactly a word, return just one CONST_INT. */
1107 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1109 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1111 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1112 return (GET_CODE (x) == CONST_INT ? x
1113 : GEN_INT (CONST_DOUBLE_LOW (x)));
1116 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1117 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1118 : CONST_DOUBLE_LOW (x));
1120 /* Sign extend to HOST_WIDE_INT. */
1121 val = trunc_int_for_mode (val, mode);
1123 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1128 /* The floating-point emulator can handle all conversions between
1129 FP and integer operands. This simplifies reload because it
1130 doesn't have to deal with constructs like (subreg:DI
1131 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1132 /* Single-precision floats are always 32-bits and double-precision
1133 floats are always 64-bits. */
1135 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1136 && GET_MODE_BITSIZE (mode) == 32
1137 && GET_CODE (x) == CONST_INT)
1140 long i = INTVAL (x);
1142 real_from_target (&r, &i, mode);
1143 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1145 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1146 && GET_MODE_BITSIZE (mode) == 64
1147 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1148 && GET_MODE (x) == VOIDmode)
1151 HOST_WIDE_INT low, high;
1154 if (GET_CODE (x) == CONST_INT)
1157 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1161 low = CONST_DOUBLE_LOW (x);
1162 high = CONST_DOUBLE_HIGH (x);
1165 if (HOST_BITS_PER_WIDE_INT > 32)
1166 high = low >> 31 >> 1;
1168 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1170 if (WORDS_BIG_ENDIAN)
1171 i[0] = high, i[1] = low;
1173 i[0] = low, i[1] = high;
1175 real_from_target (&r, i, mode);
1176 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1178 else if ((GET_MODE_CLASS (mode) == MODE_INT
1179 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1180 && GET_CODE (x) == CONST_DOUBLE
1181 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1184 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1185 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1187 /* Convert 'r' into an array of four 32-bit words in target word
1189 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1190 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1193 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1196 i[3 - 3 * endian] = 0;
1199 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1200 i[2 - 2 * endian] = 0;
1201 i[3 - 2 * endian] = 0;
1204 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1205 i[3 - 3 * endian] = 0;
1208 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1213 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1215 #if HOST_BITS_PER_WIDE_INT == 32
1216 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1218 if (HOST_BITS_PER_WIDE_INT != 64)
1221 return immed_double_const ((((unsigned long) i[3 * endian])
1222 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1223 (((unsigned long) i[2 - endian])
1224 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1228 /* If MODE is a condition code and X is a CONST_INT, the value of X
1229 must already have been "recognized" by the back-end, and we can
1230 assume that it is valid for this mode. */
1231 else if (GET_MODE_CLASS (mode) == MODE_CC
1232 && GET_CODE (x) == CONST_INT)
1235 /* Otherwise, we can't do this. */
1239 /* Return the constant real or imaginary part (which has mode MODE)
1240 of a complex value X. The IMAGPART_P argument determines whether
1241 the real or complex component should be returned. This function
1242 returns NULL_RTX if the component isn't a constant. */
1245 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1249 if (GET_CODE (x) == MEM
1250 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1252 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1253 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1255 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1256 if (TREE_CODE (part) == REAL_CST
1257 || TREE_CODE (part) == INTEGER_CST)
1258 return expand_expr (part, NULL_RTX, mode, 0);
1264 /* Return the real part (which has mode MODE) of a complex value X.
1265 This always comes at the low address in memory. */
1268 gen_realpart (enum machine_mode mode, rtx x)
1272 /* Handle complex constants. */
1273 part = gen_complex_constant_part (mode, x, 0);
1274 if (part != NULL_RTX)
1277 if (WORDS_BIG_ENDIAN
1278 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1280 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1282 ("can't access real part of complex value in hard register");
1283 else if (WORDS_BIG_ENDIAN)
1284 return gen_highpart (mode, x);
1286 return gen_lowpart (mode, x);
1289 /* Return the imaginary part (which has mode MODE) of a complex value X.
1290 This always comes at the high address in memory. */
1293 gen_imagpart (enum machine_mode mode, rtx x)
1297 /* Handle complex constants. */
1298 part = gen_complex_constant_part (mode, x, 1);
1299 if (part != NULL_RTX)
1302 if (WORDS_BIG_ENDIAN)
1303 return gen_lowpart (mode, x);
1304 else if (! WORDS_BIG_ENDIAN
1305 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1307 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1309 ("can't access imaginary part of complex value in hard register");
1311 return gen_highpart (mode, x);
1314 /* Return 1 iff X, assumed to be a SUBREG,
1315 refers to the real part of the complex value in its containing reg.
1316 Complex values are always stored with the real part in the first word,
1317 regardless of WORDS_BIG_ENDIAN. */
1320 subreg_realpart_p (rtx x)
1322 if (GET_CODE (x) != SUBREG)
1325 return ((unsigned int) SUBREG_BYTE (x)
1326 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1329 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1330 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1331 least-significant part of X.
1332 MODE specifies how big a part of X to return;
1333 it usually should not be larger than a word.
1334 If X is a MEM whose address is a QUEUED, the value may be so also. */
1337 gen_lowpart (enum machine_mode mode, rtx x)
1339 rtx result = gen_lowpart_common (mode, x);
1343 else if (GET_CODE (x) == REG)
1345 /* Must be a hard reg that's not valid in MODE. */
1346 result = gen_lowpart_common (mode, copy_to_reg (x));
1351 else if (GET_CODE (x) == MEM)
1353 /* The only additional case we can do is MEM. */
1356 /* The following exposes the use of "x" to CSE. */
1357 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1358 && SCALAR_INT_MODE_P (GET_MODE (x))
1359 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1360 GET_MODE_BITSIZE (GET_MODE (x)))
1361 && ! no_new_pseudos)
1362 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1364 if (WORDS_BIG_ENDIAN)
1365 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1366 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1368 if (BYTES_BIG_ENDIAN)
1369 /* Adjust the address so that the address-after-the-data
1371 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1372 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1374 return adjust_address (x, mode, offset);
1376 else if (GET_CODE (x) == ADDRESSOF)
1377 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1382 /* Like `gen_lowpart', but refer to the most significant part.
1383 This is used to access the imaginary part of a complex number. */
1386 gen_highpart (enum machine_mode mode, rtx x)
1388 unsigned int msize = GET_MODE_SIZE (mode);
1391 /* This case loses if X is a subreg. To catch bugs early,
1392 complain if an invalid MODE is used even in other cases. */
1393 if (msize > UNITS_PER_WORD
1394 && msize != (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)))
1397 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1398 subreg_highpart_offset (mode, GET_MODE (x)));
1400 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1401 the target if we have a MEM. gen_highpart must return a valid operand,
1402 emitting code if necessary to do so. */
1403 if (result != NULL_RTX && GET_CODE (result) == MEM)
1404 result = validize_mem (result);
1411 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1412 be VOIDmode constant. */
1414 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1416 if (GET_MODE (exp) != VOIDmode)
1418 if (GET_MODE (exp) != innermode)
1420 return gen_highpart (outermode, exp);
1422 return simplify_gen_subreg (outermode, exp, innermode,
1423 subreg_highpart_offset (outermode, innermode));
1426 /* Return offset in bytes to get OUTERMODE low part
1427 of the value in mode INNERMODE stored in memory in target format. */
1430 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1432 unsigned int offset = 0;
1433 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1437 if (WORDS_BIG_ENDIAN)
1438 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1439 if (BYTES_BIG_ENDIAN)
1440 offset += difference % UNITS_PER_WORD;
1446 /* Return offset in bytes to get OUTERMODE high part
1447 of the value in mode INNERMODE stored in memory in target format. */
1449 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1451 unsigned int offset = 0;
1452 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1454 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1459 if (! WORDS_BIG_ENDIAN)
1460 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1461 if (! BYTES_BIG_ENDIAN)
1462 offset += difference % UNITS_PER_WORD;
1468 /* Return 1 iff X, assumed to be a SUBREG,
1469 refers to the least significant part of its containing reg.
1470 If X is not a SUBREG, always return 1 (it is its own low part!). */
1473 subreg_lowpart_p (rtx x)
1475 if (GET_CODE (x) != SUBREG)
1477 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1480 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1481 == SUBREG_BYTE (x));
1485 /* Helper routine for all the constant cases of operand_subword.
1486 Some places invoke this directly. */
1489 constant_subword (rtx op, int offset, enum machine_mode mode)
1491 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1494 /* If OP is already an integer word, return it. */
1495 if (GET_MODE_CLASS (mode) == MODE_INT
1496 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1499 /* The output is some bits, the width of the target machine's word.
1500 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1502 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1503 && GET_MODE_CLASS (mode) == MODE_FLOAT
1504 && GET_MODE_BITSIZE (mode) == 64
1505 && GET_CODE (op) == CONST_DOUBLE)
1510 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1511 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1513 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1514 which the words are written depends on the word endianness.
1515 ??? This is a potential portability problem and should
1516 be fixed at some point.
1518 We must exercise caution with the sign bit. By definition there
1519 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1520 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1521 So we explicitly mask and sign-extend as necessary. */
1522 if (BITS_PER_WORD == 32)
1525 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1526 return GEN_INT (val);
1528 #if HOST_BITS_PER_WIDE_INT >= 64
1529 else if (BITS_PER_WORD >= 64 && offset == 0)
1531 val = k[! WORDS_BIG_ENDIAN];
1532 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1533 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1534 return GEN_INT (val);
1537 else if (BITS_PER_WORD == 16)
1539 val = k[offset >> 1];
1540 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1542 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1543 return GEN_INT (val);
1548 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1549 && GET_MODE_CLASS (mode) == MODE_FLOAT
1550 && GET_MODE_BITSIZE (mode) > 64
1551 && GET_CODE (op) == CONST_DOUBLE)
1556 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1557 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1559 if (BITS_PER_WORD == 32)
1562 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1563 return GEN_INT (val);
1565 #if HOST_BITS_PER_WIDE_INT >= 64
1566 else if (BITS_PER_WORD >= 64 && offset <= 1)
1568 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1569 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1570 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1571 return GEN_INT (val);
1578 /* Single word float is a little harder, since single- and double-word
1579 values often do not have the same high-order bits. We have already
1580 verified that we want the only defined word of the single-word value. */
1581 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1582 && GET_MODE_BITSIZE (mode) == 32
1583 && GET_CODE (op) == CONST_DOUBLE)
1588 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1589 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1591 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1593 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1595 if (BITS_PER_WORD == 16)
1597 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1599 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1602 return GEN_INT (val);
1605 /* The only remaining cases that we can handle are integers.
1606 Convert to proper endianness now since these cases need it.
1607 At this point, offset == 0 means the low-order word.
1609 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1610 in general. However, if OP is (const_int 0), we can just return
1613 if (op == const0_rtx)
1616 if (GET_MODE_CLASS (mode) != MODE_INT
1617 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1618 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1621 if (WORDS_BIG_ENDIAN)
1622 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1624 /* Find out which word on the host machine this value is in and get
1625 it from the constant. */
1626 val = (offset / size_ratio == 0
1627 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1628 : (GET_CODE (op) == CONST_INT
1629 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1631 /* Get the value we want into the low bits of val. */
1632 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1633 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1635 val = trunc_int_for_mode (val, word_mode);
1637 return GEN_INT (val);
1640 /* Return subword OFFSET of operand OP.
1641 The word number, OFFSET, is interpreted as the word number starting
1642 at the low-order address. OFFSET 0 is the low-order word if not
1643 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1645 If we cannot extract the required word, we return zero. Otherwise,
1646 an rtx corresponding to the requested word will be returned.
1648 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1649 reload has completed, a valid address will always be returned. After
1650 reload, if a valid address cannot be returned, we return zero.
1652 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1653 it is the responsibility of the caller.
1655 MODE is the mode of OP in case it is a CONST_INT.
1657 ??? This is still rather broken for some cases. The problem for the
1658 moment is that all callers of this thing provide no 'goal mode' to
1659 tell us to work with. This exists because all callers were written
1660 in a word based SUBREG world.
1661 Now use of this function can be deprecated by simplify_subreg in most
1666 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1668 if (mode == VOIDmode)
1669 mode = GET_MODE (op);
1671 if (mode == VOIDmode)
1674 /* If OP is narrower than a word, fail. */
1676 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1679 /* If we want a word outside OP, return zero. */
1681 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1684 /* Form a new MEM at the requested address. */
1685 if (GET_CODE (op) == MEM)
1687 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1689 if (! validate_address)
1692 else if (reload_completed)
1694 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1698 return replace_equiv_address (new, XEXP (new, 0));
1701 /* Rest can be handled by simplify_subreg. */
1702 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1705 /* Similar to `operand_subword', but never return 0. If we can't extract
1706 the required subword, put OP into a register and try again. If that fails,
1707 abort. We always validate the address in this case.
1709 MODE is the mode of OP, in case it is CONST_INT. */
1712 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1714 rtx result = operand_subword (op, offset, 1, mode);
1719 if (mode != BLKmode && mode != VOIDmode)
1721 /* If this is a register which can not be accessed by words, copy it
1722 to a pseudo register. */
1723 if (GET_CODE (op) == REG)
1724 op = copy_to_reg (op);
1726 op = force_reg (mode, op);
1729 result = operand_subword (op, offset, 1, mode);
1736 /* Given a compare instruction, swap the operands.
1737 A test instruction is changed into a compare of 0 against the operand. */
1740 reverse_comparison (rtx insn)
1742 rtx body = PATTERN (insn);
1745 if (GET_CODE (body) == SET)
1746 comp = SET_SRC (body);
1748 comp = SET_SRC (XVECEXP (body, 0, 0));
1750 if (GET_CODE (comp) == COMPARE)
1752 rtx op0 = XEXP (comp, 0);
1753 rtx op1 = XEXP (comp, 1);
1754 XEXP (comp, 0) = op1;
1755 XEXP (comp, 1) = op0;
1759 rtx new = gen_rtx_COMPARE (VOIDmode,
1760 CONST0_RTX (GET_MODE (comp)), comp);
1761 if (GET_CODE (body) == SET)
1762 SET_SRC (body) = new;
1764 SET_SRC (XVECEXP (body, 0, 0)) = new;
1768 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1769 or (2) a component ref of something variable. Represent the later with
1770 a NULL expression. */
1773 component_ref_for_mem_expr (tree ref)
1775 tree inner = TREE_OPERAND (ref, 0);
1777 if (TREE_CODE (inner) == COMPONENT_REF)
1778 inner = component_ref_for_mem_expr (inner);
1781 tree placeholder_ptr = 0;
1783 /* Now remove any conversions: they don't change what the underlying
1784 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1785 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1786 || TREE_CODE (inner) == NON_LVALUE_EXPR
1787 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1788 || TREE_CODE (inner) == SAVE_EXPR
1789 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1790 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1791 inner = find_placeholder (inner, &placeholder_ptr);
1793 inner = TREE_OPERAND (inner, 0);
1795 if (! DECL_P (inner))
1799 if (inner == TREE_OPERAND (ref, 0))
1802 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1803 TREE_OPERAND (ref, 1));
1806 /* Given REF, a MEM, and T, either the type of X or the expression
1807 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1808 if we are making a new object of this type. BITPOS is nonzero if
1809 there is an offset outstanding on T that will be applied later. */
1812 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1813 HOST_WIDE_INT bitpos)
1815 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1816 tree expr = MEM_EXPR (ref);
1817 rtx offset = MEM_OFFSET (ref);
1818 rtx size = MEM_SIZE (ref);
1819 unsigned int align = MEM_ALIGN (ref);
1820 HOST_WIDE_INT apply_bitpos = 0;
1823 /* It can happen that type_for_mode was given a mode for which there
1824 is no language-level type. In which case it returns NULL, which
1829 type = TYPE_P (t) ? t : TREE_TYPE (t);
1830 if (type == error_mark_node)
1833 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1834 wrong answer, as it assumes that DECL_RTL already has the right alias
1835 info. Callers should not set DECL_RTL until after the call to
1836 set_mem_attributes. */
1837 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1840 /* Get the alias set from the expression or type (perhaps using a
1841 front-end routine) and use it. */
1842 alias = get_alias_set (t);
1844 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1845 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1846 RTX_UNCHANGING_P (ref)
1847 |= ((lang_hooks.honor_readonly
1848 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1849 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1851 /* If we are making an object of this type, or if this is a DECL, we know
1852 that it is a scalar if the type is not an aggregate. */
1853 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1854 MEM_SCALAR_P (ref) = 1;
1856 /* We can set the alignment from the type if we are making an object,
1857 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1858 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1859 align = MAX (align, TYPE_ALIGN (type));
1861 /* If the size is known, we can set that. */
1862 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1863 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1865 /* If T is not a type, we may be able to deduce some more information about
1869 maybe_set_unchanging (ref, t);
1870 if (TREE_THIS_VOLATILE (t))
1871 MEM_VOLATILE_P (ref) = 1;
1873 /* Now remove any conversions: they don't change what the underlying
1874 object is. Likewise for SAVE_EXPR. */
1875 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1876 || TREE_CODE (t) == NON_LVALUE_EXPR
1877 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1878 || TREE_CODE (t) == SAVE_EXPR)
1879 t = TREE_OPERAND (t, 0);
1881 /* If this expression can't be addressed (e.g., it contains a reference
1882 to a non-addressable field), show we don't change its alias set. */
1883 if (! can_address_p (t))
1884 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1886 /* If this is a decl, set the attributes of the MEM from it. */
1890 offset = const0_rtx;
1891 apply_bitpos = bitpos;
1892 size = (DECL_SIZE_UNIT (t)
1893 && host_integerp (DECL_SIZE_UNIT (t), 1)
1894 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1895 align = DECL_ALIGN (t);
1898 /* If this is a constant, we know the alignment. */
1899 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1901 align = TYPE_ALIGN (type);
1902 #ifdef CONSTANT_ALIGNMENT
1903 align = CONSTANT_ALIGNMENT (t, align);
1907 /* If this is a field reference and not a bit-field, record it. */
1908 /* ??? There is some information that can be gleened from bit-fields,
1909 such as the word offset in the structure that might be modified.
1910 But skip it for now. */
1911 else if (TREE_CODE (t) == COMPONENT_REF
1912 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1914 expr = component_ref_for_mem_expr (t);
1915 offset = const0_rtx;
1916 apply_bitpos = bitpos;
1917 /* ??? Any reason the field size would be different than
1918 the size we got from the type? */
1921 /* If this is an array reference, look for an outer field reference. */
1922 else if (TREE_CODE (t) == ARRAY_REF)
1924 tree off_tree = size_zero_node;
1925 /* We can't modify t, because we use it at the end of the
1931 tree index = TREE_OPERAND (t2, 1);
1932 tree array = TREE_OPERAND (t2, 0);
1933 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1934 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1935 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1937 /* We assume all arrays have sizes that are a multiple of a byte.
1938 First subtract the lower bound, if any, in the type of the
1939 index, then convert to sizetype and multiply by the size of the
1941 if (low_bound != 0 && ! integer_zerop (low_bound))
1942 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1945 /* If the index has a self-referential type, pass it to a
1946 WITH_RECORD_EXPR; if the component size is, pass our
1947 component to one. */
1948 if (CONTAINS_PLACEHOLDER_P (index))
1949 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1950 if (CONTAINS_PLACEHOLDER_P (unit_size))
1951 unit_size = build (WITH_RECORD_EXPR, sizetype,
1955 = fold (build (PLUS_EXPR, sizetype,
1956 fold (build (MULT_EXPR, sizetype,
1960 t2 = TREE_OPERAND (t2, 0);
1962 while (TREE_CODE (t2) == ARRAY_REF);
1968 if (host_integerp (off_tree, 1))
1970 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1971 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1972 align = DECL_ALIGN (t2);
1973 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1975 offset = GEN_INT (ioff);
1976 apply_bitpos = bitpos;
1979 else if (TREE_CODE (t2) == COMPONENT_REF)
1981 expr = component_ref_for_mem_expr (t2);
1982 if (host_integerp (off_tree, 1))
1984 offset = GEN_INT (tree_low_cst (off_tree, 1));
1985 apply_bitpos = bitpos;
1987 /* ??? Any reason the field size would be different than
1988 the size we got from the type? */
1990 else if (flag_argument_noalias > 1
1991 && TREE_CODE (t2) == INDIRECT_REF
1992 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1999 /* If this is a Fortran indirect argument reference, record the
2001 else if (flag_argument_noalias > 1
2002 && TREE_CODE (t) == INDIRECT_REF
2003 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
2010 /* If we modified OFFSET based on T, then subtract the outstanding
2011 bit position offset. Similarly, increase the size of the accessed
2012 object to contain the negative offset. */
2015 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
2017 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
2020 /* Now set the attributes we computed above. */
2022 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
2024 /* If this is already known to be a scalar or aggregate, we are done. */
2025 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
2028 /* If it is a reference into an aggregate, this is part of an aggregate.
2029 Otherwise we don't know. */
2030 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
2031 || TREE_CODE (t) == ARRAY_RANGE_REF
2032 || TREE_CODE (t) == BIT_FIELD_REF)
2033 MEM_IN_STRUCT_P (ref) = 1;
2037 set_mem_attributes (rtx ref, tree t, int objectp)
2039 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2042 /* Set the decl for MEM to DECL. */
2045 set_mem_attrs_from_reg (rtx mem, rtx reg)
2048 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
2049 GEN_INT (REG_OFFSET (reg)),
2050 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2053 /* Set the alias set of MEM to SET. */
2056 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
2058 #ifdef ENABLE_CHECKING
2059 /* If the new and old alias sets don't conflict, something is wrong. */
2060 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
2064 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
2065 MEM_SIZE (mem), MEM_ALIGN (mem),
2069 /* Set the alignment of MEM to ALIGN bits. */
2072 set_mem_align (rtx mem, unsigned int align)
2074 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2075 MEM_OFFSET (mem), MEM_SIZE (mem), align,
2079 /* Set the expr for MEM to EXPR. */
2082 set_mem_expr (rtx mem, tree expr)
2085 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
2086 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2089 /* Set the offset of MEM to OFFSET. */
2092 set_mem_offset (rtx mem, rtx offset)
2094 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2095 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
2099 /* Set the size of MEM to SIZE. */
2102 set_mem_size (rtx mem, rtx size)
2104 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2105 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
2109 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2110 and its address changed to ADDR. (VOIDmode means don't change the mode.
2111 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2112 returned memory location is required to be valid. The memory
2113 attributes are not changed. */
2116 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
2120 if (GET_CODE (memref) != MEM)
2122 if (mode == VOIDmode)
2123 mode = GET_MODE (memref);
2125 addr = XEXP (memref, 0);
2129 if (reload_in_progress || reload_completed)
2131 if (! memory_address_p (mode, addr))
2135 addr = memory_address (mode, addr);
2138 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2141 new = gen_rtx_MEM (mode, addr);
2142 MEM_COPY_ATTRIBUTES (new, memref);
2146 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2147 way we are changing MEMREF, so we only preserve the alias set. */
2150 change_address (rtx memref, enum machine_mode mode, rtx addr)
2152 rtx new = change_address_1 (memref, mode, addr, 1);
2153 enum machine_mode mmode = GET_MODE (new);
2156 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2157 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2158 (mmode == BLKmode ? BITS_PER_UNIT
2159 : GET_MODE_ALIGNMENT (mmode)),
2165 /* Return a memory reference like MEMREF, but with its mode changed
2166 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2167 nonzero, the memory address is forced to be valid.
2168 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2169 and caller is responsible for adjusting MEMREF base register. */
2172 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2173 int validate, int adjust)
2175 rtx addr = XEXP (memref, 0);
2177 rtx memoffset = MEM_OFFSET (memref);
2179 unsigned int memalign = MEM_ALIGN (memref);
2181 /* ??? Prefer to create garbage instead of creating shared rtl.
2182 This may happen even if offset is nonzero -- consider
2183 (plus (plus reg reg) const_int) -- so do this always. */
2184 addr = copy_rtx (addr);
2188 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2189 object, we can merge it into the LO_SUM. */
2190 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2192 && (unsigned HOST_WIDE_INT) offset
2193 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2194 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2195 plus_constant (XEXP (addr, 1), offset));
2197 addr = plus_constant (addr, offset);
2200 new = change_address_1 (memref, mode, addr, validate);
2202 /* Compute the new values of the memory attributes due to this adjustment.
2203 We add the offsets and update the alignment. */
2205 memoffset = GEN_INT (offset + INTVAL (memoffset));
2207 /* Compute the new alignment by taking the MIN of the alignment and the
2208 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2213 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2215 /* We can compute the size in a number of ways. */
2216 if (GET_MODE (new) != BLKmode)
2217 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2218 else if (MEM_SIZE (memref))
2219 size = plus_constant (MEM_SIZE (memref), -offset);
2221 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2222 memoffset, size, memalign, GET_MODE (new));
2224 /* At some point, we should validate that this offset is within the object,
2225 if all the appropriate values are known. */
2229 /* Return a memory reference like MEMREF, but with its mode changed
2230 to MODE and its address changed to ADDR, which is assumed to be
2231 MEMREF offseted by OFFSET bytes. If VALIDATE is
2232 nonzero, the memory address is forced to be valid. */
2235 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2236 HOST_WIDE_INT offset, int validate)
2238 memref = change_address_1 (memref, VOIDmode, addr, validate);
2239 return adjust_address_1 (memref, mode, offset, validate, 0);
2242 /* Return a memory reference like MEMREF, but whose address is changed by
2243 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2244 known to be in OFFSET (possibly 1). */
2247 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2249 rtx new, addr = XEXP (memref, 0);
2251 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2253 /* At this point we don't know _why_ the address is invalid. It
2254 could have secondary memory references, multiplies or anything.
2256 However, if we did go and rearrange things, we can wind up not
2257 being able to recognize the magic around pic_offset_table_rtx.
2258 This stuff is fragile, and is yet another example of why it is
2259 bad to expose PIC machinery too early. */
2260 if (! memory_address_p (GET_MODE (memref), new)
2261 && GET_CODE (addr) == PLUS
2262 && XEXP (addr, 0) == pic_offset_table_rtx)
2264 addr = force_reg (GET_MODE (addr), addr);
2265 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2268 update_temp_slot_address (XEXP (memref, 0), new);
2269 new = change_address_1 (memref, VOIDmode, new, 1);
2271 /* Update the alignment to reflect the offset. Reset the offset, which
2274 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2275 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2280 /* Return a memory reference like MEMREF, but with its address changed to
2281 ADDR. The caller is asserting that the actual piece of memory pointed
2282 to is the same, just the form of the address is being changed, such as
2283 by putting something into a register. */
2286 replace_equiv_address (rtx memref, rtx addr)
2288 /* change_address_1 copies the memory attribute structure without change
2289 and that's exactly what we want here. */
2290 update_temp_slot_address (XEXP (memref, 0), addr);
2291 return change_address_1 (memref, VOIDmode, addr, 1);
2294 /* Likewise, but the reference is not required to be valid. */
2297 replace_equiv_address_nv (rtx memref, rtx addr)
2299 return change_address_1 (memref, VOIDmode, addr, 0);
2302 /* Return a memory reference like MEMREF, but with its mode widened to
2303 MODE and offset by OFFSET. This would be used by targets that e.g.
2304 cannot issue QImode memory operations and have to use SImode memory
2305 operations plus masking logic. */
2308 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2310 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2311 tree expr = MEM_EXPR (new);
2312 rtx memoffset = MEM_OFFSET (new);
2313 unsigned int size = GET_MODE_SIZE (mode);
2315 /* If we don't know what offset we were at within the expression, then
2316 we can't know if we've overstepped the bounds. */
2322 if (TREE_CODE (expr) == COMPONENT_REF)
2324 tree field = TREE_OPERAND (expr, 1);
2326 if (! DECL_SIZE_UNIT (field))
2332 /* Is the field at least as large as the access? If so, ok,
2333 otherwise strip back to the containing structure. */
2334 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2335 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2336 && INTVAL (memoffset) >= 0)
2339 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2345 expr = TREE_OPERAND (expr, 0);
2346 memoffset = (GEN_INT (INTVAL (memoffset)
2347 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2348 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2351 /* Similarly for the decl. */
2352 else if (DECL_P (expr)
2353 && DECL_SIZE_UNIT (expr)
2354 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2355 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2356 && (! memoffset || INTVAL (memoffset) >= 0))
2360 /* The widened memory access overflows the expression, which means
2361 that it could alias another expression. Zap it. */
2368 memoffset = NULL_RTX;
2370 /* The widened memory may alias other stuff, so zap the alias set. */
2371 /* ??? Maybe use get_alias_set on any remaining expression. */
2373 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2374 MEM_ALIGN (new), mode);
2379 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2382 gen_label_rtx (void)
2384 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2385 NULL, label_num++, NULL);
2388 /* For procedure integration. */
2390 /* Install new pointers to the first and last insns in the chain.
2391 Also, set cur_insn_uid to one higher than the last in use.
2392 Used for an inline-procedure after copying the insn chain. */
2395 set_new_first_and_last_insn (rtx first, rtx last)
2403 for (insn = first; insn; insn = NEXT_INSN (insn))
2404 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2409 /* Set the last label number found in the current function.
2410 This is used when belatedly compiling an inline function. */
2413 set_new_last_label_num (int last)
2415 base_label_num = label_num;
2416 last_label_num = last;
2419 /* Restore all variables describing the current status from the structure *P.
2420 This is used after a nested function. */
2423 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2428 /* Go through all the RTL insn bodies and copy any invalid shared
2429 structure. This routine should only be called once. */
2432 unshare_all_rtl (tree fndecl, rtx insn)
2436 /* Make sure that virtual parameters are not shared. */
2437 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2438 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2440 /* Make sure that virtual stack slots are not shared. */
2441 unshare_all_decls (DECL_INITIAL (fndecl));
2443 /* Unshare just about everything else. */
2444 unshare_all_rtl_in_chain (insn);
2446 /* Make sure the addresses of stack slots found outside the insn chain
2447 (such as, in DECL_RTL of a variable) are not shared
2448 with the insn chain.
2450 This special care is necessary when the stack slot MEM does not
2451 actually appear in the insn chain. If it does appear, its address
2452 is unshared from all else at that point. */
2453 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2456 /* Go through all the RTL insn bodies and copy any invalid shared
2457 structure, again. This is a fairly expensive thing to do so it
2458 should be done sparingly. */
2461 unshare_all_rtl_again (rtx insn)
2466 for (p = insn; p; p = NEXT_INSN (p))
2469 reset_used_flags (PATTERN (p));
2470 reset_used_flags (REG_NOTES (p));
2471 reset_used_flags (LOG_LINKS (p));
2474 /* Make sure that virtual stack slots are not shared. */
2475 reset_used_decls (DECL_INITIAL (cfun->decl));
2477 /* Make sure that virtual parameters are not shared. */
2478 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2479 reset_used_flags (DECL_RTL (decl));
2481 reset_used_flags (stack_slot_list);
2483 unshare_all_rtl (cfun->decl, insn);
2486 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2487 Recursively does the same for subexpressions. */
2490 verify_rtx_sharing (rtx orig, rtx insn)
2495 const char *format_ptr;
2500 code = GET_CODE (x);
2502 /* These types may be freely shared. */
2517 /* SCRATCH must be shared because they represent distinct values. */
2521 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2522 a LABEL_REF, it isn't sharable. */
2523 if (GET_CODE (XEXP (x, 0)) == PLUS
2524 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2525 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2530 /* A MEM is allowed to be shared if its address is constant. */
2531 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2532 || reload_completed || reload_in_progress)
2541 /* This rtx may not be shared. If it has already been seen,
2542 replace it with a copy of itself. */
2544 if (RTX_FLAG (x, used))
2546 error ("Invalid rtl sharing found in the insn");
2548 error ("Shared rtx");
2552 RTX_FLAG (x, used) = 1;
2554 /* Now scan the subexpressions recursively. */
2556 format_ptr = GET_RTX_FORMAT (code);
2558 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2560 switch (*format_ptr++)
2563 verify_rtx_sharing (XEXP (x, i), insn);
2567 if (XVEC (x, i) != NULL)
2570 int len = XVECLEN (x, i);
2572 for (j = 0; j < len; j++)
2574 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2575 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2576 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2577 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2579 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2588 /* Go through all the RTL insn bodies and check that there is no unexpected
2589 sharing in between the subexpressions. */
2592 verify_rtl_sharing (void)
2596 for (p = get_insns (); p; p = NEXT_INSN (p))
2599 reset_used_flags (PATTERN (p));
2600 reset_used_flags (REG_NOTES (p));
2601 reset_used_flags (LOG_LINKS (p));
2604 for (p = get_insns (); p; p = NEXT_INSN (p))
2607 verify_rtx_sharing (PATTERN (p), p);
2608 verify_rtx_sharing (REG_NOTES (p), p);
2609 verify_rtx_sharing (LOG_LINKS (p), p);
2613 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2614 Assumes the mark bits are cleared at entry. */
2617 unshare_all_rtl_in_chain (rtx insn)
2619 for (; insn; insn = NEXT_INSN (insn))
2622 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2623 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2624 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2628 /* Go through all virtual stack slots of a function and copy any
2629 shared structure. */
2631 unshare_all_decls (tree blk)
2635 /* Copy shared decls. */
2636 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2637 if (DECL_RTL_SET_P (t))
2638 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2640 /* Now process sub-blocks. */
2641 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2642 unshare_all_decls (t);
2645 /* Go through all virtual stack slots of a function and mark them as
2648 reset_used_decls (tree blk)
2653 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2654 if (DECL_RTL_SET_P (t))
2655 reset_used_flags (DECL_RTL (t));
2657 /* Now process sub-blocks. */
2658 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2659 reset_used_decls (t);
2662 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2663 placed in the result directly, rather than being copied. MAY_SHARE is
2664 either a MEM of an EXPR_LIST of MEMs. */
2667 copy_most_rtx (rtx orig, rtx may_share)
2672 const char *format_ptr;
2674 if (orig == may_share
2675 || (GET_CODE (may_share) == EXPR_LIST
2676 && in_expr_list_p (may_share, orig)))
2679 code = GET_CODE (orig);
2697 copy = rtx_alloc (code);
2698 PUT_MODE (copy, GET_MODE (orig));
2699 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2700 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2701 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2702 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2703 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2705 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2707 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2709 switch (*format_ptr++)
2712 XEXP (copy, i) = XEXP (orig, i);
2713 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2714 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2718 XEXP (copy, i) = XEXP (orig, i);
2723 XVEC (copy, i) = XVEC (orig, i);
2724 if (XVEC (orig, i) != NULL)
2726 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2727 for (j = 0; j < XVECLEN (copy, i); j++)
2728 XVECEXP (copy, i, j)
2729 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2734 XWINT (copy, i) = XWINT (orig, i);
2739 XINT (copy, i) = XINT (orig, i);
2743 XTREE (copy, i) = XTREE (orig, i);
2748 XSTR (copy, i) = XSTR (orig, i);
2752 X0ANY (copy, i) = X0ANY (orig, i);
2762 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2763 Recursively does the same for subexpressions. */
2766 copy_rtx_if_shared (rtx orig)
2768 copy_rtx_if_shared_1 (&orig);
2773 copy_rtx_if_shared_1 (rtx *orig1)
2779 const char *format_ptr;
2783 /* Repeat is used to turn tail-recursion into iteration. */
2790 code = GET_CODE (x);
2792 /* These types may be freely shared. */
2807 /* SCRATCH must be shared because they represent distinct values. */
2811 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2812 a LABEL_REF, it isn't sharable. */
2813 if (GET_CODE (XEXP (x, 0)) == PLUS
2814 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2815 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2824 /* The chain of insns is not being copied. */
2831 /* This rtx may not be shared. If it has already been seen,
2832 replace it with a copy of itself. */
2834 if (RTX_FLAG (x, used))
2838 copy = rtx_alloc (code);
2839 memcpy (copy, x, RTX_SIZE (code));
2843 RTX_FLAG (x, used) = 1;
2845 /* Now scan the subexpressions recursively.
2846 We can store any replaced subexpressions directly into X
2847 since we know X is not shared! Any vectors in X
2848 must be copied if X was copied. */
2850 format_ptr = GET_RTX_FORMAT (code);
2851 length = GET_RTX_LENGTH (code);
2854 for (i = 0; i < length; i++)
2856 switch (*format_ptr++)
2860 copy_rtx_if_shared_1 (last_ptr);
2861 last_ptr = &XEXP (x, i);
2865 if (XVEC (x, i) != NULL)
2868 int len = XVECLEN (x, i);
2870 /* Copy the vector iff I copied the rtx and the length
2872 if (copied && len > 0)
2873 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2875 /* Call recsusively on all inside the vector. */
2876 for (j = 0; j < len; j++)
2879 copy_rtx_if_shared_1 (last_ptr);
2880 last_ptr = &XVECEXP (x, i, j);
2895 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2896 to look for shared sub-parts. */
2899 reset_used_flags (rtx x)
2903 const char *format_ptr;
2906 /* Repeat is used to turn tail-recursion into iteration. */
2911 code = GET_CODE (x);
2913 /* These types may be freely shared so we needn't do any resetting
2935 /* The chain of insns is not being copied. */
2942 RTX_FLAG (x, used) = 0;
2944 format_ptr = GET_RTX_FORMAT (code);
2945 length = GET_RTX_LENGTH (code);
2947 for (i = 0; i < length; i++)
2949 switch (*format_ptr++)
2957 reset_used_flags (XEXP (x, i));
2961 for (j = 0; j < XVECLEN (x, i); j++)
2962 reset_used_flags (XVECEXP (x, i, j));
2968 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2969 to look for shared sub-parts. */
2972 set_used_flags (rtx x)
2976 const char *format_ptr;
2981 code = GET_CODE (x);
2983 /* These types may be freely shared so we needn't do any resetting
3005 /* The chain of insns is not being copied. */
3012 RTX_FLAG (x, used) = 1;
3014 format_ptr = GET_RTX_FORMAT (code);
3015 for (i = 0; i < GET_RTX_LENGTH (code); i++)
3017 switch (*format_ptr++)
3020 set_used_flags (XEXP (x, i));
3024 for (j = 0; j < XVECLEN (x, i); j++)
3025 set_used_flags (XVECEXP (x, i, j));
3031 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3032 Return X or the rtx for the pseudo reg the value of X was copied into.
3033 OTHER must be valid as a SET_DEST. */
3036 make_safe_from (rtx x, rtx other)
3039 switch (GET_CODE (other))
3042 other = SUBREG_REG (other);
3044 case STRICT_LOW_PART:
3047 other = XEXP (other, 0);
3053 if ((GET_CODE (other) == MEM
3055 && GET_CODE (x) != REG
3056 && GET_CODE (x) != SUBREG)
3057 || (GET_CODE (other) == REG
3058 && (REGNO (other) < FIRST_PSEUDO_REGISTER
3059 || reg_mentioned_p (other, x))))
3061 rtx temp = gen_reg_rtx (GET_MODE (x));
3062 emit_move_insn (temp, x);
3068 /* Emission of insns (adding them to the doubly-linked list). */
3070 /* Return the first insn of the current sequence or current function. */
3078 /* Specify a new insn as the first in the chain. */
3081 set_first_insn (rtx insn)
3083 if (PREV_INSN (insn) != 0)
3088 /* Return the last insn emitted in current sequence or current function. */
3091 get_last_insn (void)
3096 /* Specify a new insn as the last in the chain. */
3099 set_last_insn (rtx insn)
3101 if (NEXT_INSN (insn) != 0)
3106 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3109 get_last_insn_anywhere (void)
3111 struct sequence_stack *stack;
3114 for (stack = seq_stack; stack; stack = stack->next)
3115 if (stack->last != 0)
3120 /* Return the first nonnote insn emitted in current sequence or current
3121 function. This routine looks inside SEQUENCEs. */
3124 get_first_nonnote_insn (void)
3126 rtx insn = first_insn;
3130 insn = next_insn (insn);
3131 if (insn == 0 || GET_CODE (insn) != NOTE)
3138 /* Return the last nonnote insn emitted in current sequence or current
3139 function. This routine looks inside SEQUENCEs. */
3142 get_last_nonnote_insn (void)
3144 rtx insn = last_insn;
3148 insn = previous_insn (insn);
3149 if (insn == 0 || GET_CODE (insn) != NOTE)
3156 /* Return a number larger than any instruction's uid in this function. */
3161 return cur_insn_uid;
3164 /* Renumber instructions so that no instruction UIDs are wasted. */
3167 renumber_insns (FILE *stream)
3171 /* If we're not supposed to renumber instructions, don't. */
3172 if (!flag_renumber_insns)
3175 /* If there aren't that many instructions, then it's not really
3176 worth renumbering them. */
3177 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
3182 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3185 fprintf (stream, "Renumbering insn %d to %d\n",
3186 INSN_UID (insn), cur_insn_uid);
3187 INSN_UID (insn) = cur_insn_uid++;
3191 /* Return the next insn. If it is a SEQUENCE, return the first insn
3195 next_insn (rtx insn)
3199 insn = NEXT_INSN (insn);
3200 if (insn && GET_CODE (insn) == INSN
3201 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3202 insn = XVECEXP (PATTERN (insn), 0, 0);
3208 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3212 previous_insn (rtx insn)
3216 insn = PREV_INSN (insn);
3217 if (insn && GET_CODE (insn) == INSN
3218 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3219 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3225 /* Return the next insn after INSN that is not a NOTE. This routine does not
3226 look inside SEQUENCEs. */
3229 next_nonnote_insn (rtx insn)
3233 insn = NEXT_INSN (insn);
3234 if (insn == 0 || GET_CODE (insn) != NOTE)
3241 /* Return the previous insn before INSN that is not a NOTE. This routine does
3242 not look inside SEQUENCEs. */
3245 prev_nonnote_insn (rtx insn)
3249 insn = PREV_INSN (insn);
3250 if (insn == 0 || GET_CODE (insn) != NOTE)
3257 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3258 or 0, if there is none. This routine does not look inside
3262 next_real_insn (rtx insn)
3266 insn = NEXT_INSN (insn);
3267 if (insn == 0 || GET_CODE (insn) == INSN
3268 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3275 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3276 or 0, if there is none. This routine does not look inside
3280 prev_real_insn (rtx insn)
3284 insn = PREV_INSN (insn);
3285 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3286 || GET_CODE (insn) == JUMP_INSN)
3293 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3294 This routine does not look inside SEQUENCEs. */
3297 last_call_insn (void)
3301 for (insn = get_last_insn ();
3302 insn && GET_CODE (insn) != CALL_INSN;
3303 insn = PREV_INSN (insn))
3309 /* Find the next insn after INSN that really does something. This routine
3310 does not look inside SEQUENCEs. Until reload has completed, this is the
3311 same as next_real_insn. */
3314 active_insn_p (rtx insn)
3316 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3317 || (GET_CODE (insn) == INSN
3318 && (! reload_completed
3319 || (GET_CODE (PATTERN (insn)) != USE
3320 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3324 next_active_insn (rtx insn)
3328 insn = NEXT_INSN (insn);
3329 if (insn == 0 || active_insn_p (insn))
3336 /* Find the last insn before INSN that really does something. This routine
3337 does not look inside SEQUENCEs. Until reload has completed, this is the
3338 same as prev_real_insn. */
3341 prev_active_insn (rtx insn)
3345 insn = PREV_INSN (insn);
3346 if (insn == 0 || active_insn_p (insn))
3353 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3356 next_label (rtx insn)
3360 insn = NEXT_INSN (insn);
3361 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3368 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3371 prev_label (rtx insn)
3375 insn = PREV_INSN (insn);
3376 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3384 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3385 and REG_CC_USER notes so we can find it. */
3388 link_cc0_insns (rtx insn)
3390 rtx user = next_nonnote_insn (insn);
3392 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3393 user = XVECEXP (PATTERN (user), 0, 0);
3395 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3397 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3400 /* Return the next insn that uses CC0 after INSN, which is assumed to
3401 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3402 applied to the result of this function should yield INSN).
3404 Normally, this is simply the next insn. However, if a REG_CC_USER note
3405 is present, it contains the insn that uses CC0.
3407 Return 0 if we can't find the insn. */
3410 next_cc0_user (rtx insn)
3412 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3415 return XEXP (note, 0);
3417 insn = next_nonnote_insn (insn);
3418 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3419 insn = XVECEXP (PATTERN (insn), 0, 0);
3421 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3427 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3428 note, it is the previous insn. */
3431 prev_cc0_setter (rtx insn)
3433 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3436 return XEXP (note, 0);
3438 insn = prev_nonnote_insn (insn);
3439 if (! sets_cc0_p (PATTERN (insn)))
3446 /* Increment the label uses for all labels present in rtx. */
3449 mark_label_nuses (rtx x)
3455 code = GET_CODE (x);
3456 if (code == LABEL_REF)
3457 LABEL_NUSES (XEXP (x, 0))++;
3459 fmt = GET_RTX_FORMAT (code);
3460 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3463 mark_label_nuses (XEXP (x, i));
3464 else if (fmt[i] == 'E')
3465 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3466 mark_label_nuses (XVECEXP (x, i, j));
3471 /* Try splitting insns that can be split for better scheduling.
3472 PAT is the pattern which might split.
3473 TRIAL is the insn providing PAT.
3474 LAST is nonzero if we should return the last insn of the sequence produced.
3476 If this routine succeeds in splitting, it returns the first or last
3477 replacement insn depending on the value of LAST. Otherwise, it
3478 returns TRIAL. If the insn to be returned can be split, it will be. */
3481 try_split (rtx pat, rtx trial, int last)
3483 rtx before = PREV_INSN (trial);
3484 rtx after = NEXT_INSN (trial);
3485 int has_barrier = 0;
3489 rtx insn_last, insn;
3492 if (any_condjump_p (trial)
3493 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3494 split_branch_probability = INTVAL (XEXP (note, 0));
3495 probability = split_branch_probability;
3497 seq = split_insns (pat, trial);
3499 split_branch_probability = -1;
3501 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3502 We may need to handle this specially. */
3503 if (after && GET_CODE (after) == BARRIER)
3506 after = NEXT_INSN (after);
3512 /* Avoid infinite loop if any insn of the result matches
3513 the original pattern. */
3517 if (INSN_P (insn_last)
3518 && rtx_equal_p (PATTERN (insn_last), pat))
3520 if (!NEXT_INSN (insn_last))
3522 insn_last = NEXT_INSN (insn_last);
3526 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3528 if (GET_CODE (insn) == JUMP_INSN)
3530 mark_jump_label (PATTERN (insn), insn, 0);
3532 if (probability != -1
3533 && any_condjump_p (insn)
3534 && !find_reg_note (insn, REG_BR_PROB, 0))
3536 /* We can preserve the REG_BR_PROB notes only if exactly
3537 one jump is created, otherwise the machine description
3538 is responsible for this step using
3539 split_branch_probability variable. */
3543 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3544 GEN_INT (probability),
3550 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3551 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3552 if (GET_CODE (trial) == CALL_INSN)
3554 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3555 if (GET_CODE (insn) == CALL_INSN)
3557 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3560 *p = CALL_INSN_FUNCTION_USAGE (trial);
3561 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3565 /* Copy notes, particularly those related to the CFG. */
3566 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3568 switch (REG_NOTE_KIND (note))
3572 while (insn != NULL_RTX)
3574 if (GET_CODE (insn) == CALL_INSN
3575 || (flag_non_call_exceptions
3576 && may_trap_p (PATTERN (insn))))
3578 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3581 insn = PREV_INSN (insn);
3587 case REG_ALWAYS_RETURN:
3589 while (insn != NULL_RTX)
3591 if (GET_CODE (insn) == CALL_INSN)
3593 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3596 insn = PREV_INSN (insn);
3600 case REG_NON_LOCAL_GOTO:
3602 while (insn != NULL_RTX)
3604 if (GET_CODE (insn) == JUMP_INSN)
3606 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3609 insn = PREV_INSN (insn);
3618 /* If there are LABELS inside the split insns increment the
3619 usage count so we don't delete the label. */
3620 if (GET_CODE (trial) == INSN)
3623 while (insn != NULL_RTX)
3625 if (GET_CODE (insn) == INSN)
3626 mark_label_nuses (PATTERN (insn));
3628 insn = PREV_INSN (insn);
3632 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3634 delete_insn (trial);
3636 emit_barrier_after (tem);
3638 /* Recursively call try_split for each new insn created; by the
3639 time control returns here that insn will be fully split, so
3640 set LAST and continue from the insn after the one returned.
3641 We can't use next_active_insn here since AFTER may be a note.
3642 Ignore deleted insns, which can be occur if not optimizing. */
3643 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3644 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3645 tem = try_split (PATTERN (tem), tem, 1);
3647 /* Return either the first or the last insn, depending on which was
3650 ? (after ? PREV_INSN (after) : last_insn)
3651 : NEXT_INSN (before);
3654 /* Make and return an INSN rtx, initializing all its slots.
3655 Store PATTERN in the pattern slots. */
3658 make_insn_raw (rtx pattern)
3662 insn = rtx_alloc (INSN);
3664 INSN_UID (insn) = cur_insn_uid++;
3665 PATTERN (insn) = pattern;
3666 INSN_CODE (insn) = -1;
3667 LOG_LINKS (insn) = NULL;
3668 REG_NOTES (insn) = NULL;
3669 INSN_LOCATOR (insn) = 0;
3670 BLOCK_FOR_INSN (insn) = NULL;
3672 #ifdef ENABLE_RTL_CHECKING
3675 && (returnjump_p (insn)
3676 || (GET_CODE (insn) == SET
3677 && SET_DEST (insn) == pc_rtx)))
3679 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3687 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3690 make_jump_insn_raw (rtx pattern)
3694 insn = rtx_alloc (JUMP_INSN);
3695 INSN_UID (insn) = cur_insn_uid++;
3697 PATTERN (insn) = pattern;
3698 INSN_CODE (insn) = -1;
3699 LOG_LINKS (insn) = NULL;
3700 REG_NOTES (insn) = NULL;
3701 JUMP_LABEL (insn) = NULL;
3702 INSN_LOCATOR (insn) = 0;
3703 BLOCK_FOR_INSN (insn) = NULL;
3708 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3711 make_call_insn_raw (rtx pattern)
3715 insn = rtx_alloc (CALL_INSN);
3716 INSN_UID (insn) = cur_insn_uid++;
3718 PATTERN (insn) = pattern;
3719 INSN_CODE (insn) = -1;
3720 LOG_LINKS (insn) = NULL;
3721 REG_NOTES (insn) = NULL;
3722 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3723 INSN_LOCATOR (insn) = 0;
3724 BLOCK_FOR_INSN (insn) = NULL;
3729 /* Add INSN to the end of the doubly-linked list.
3730 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3735 PREV_INSN (insn) = last_insn;
3736 NEXT_INSN (insn) = 0;
3738 if (NULL != last_insn)
3739 NEXT_INSN (last_insn) = insn;
3741 if (NULL == first_insn)
3747 /* Add INSN into the doubly-linked list after insn AFTER. This and
3748 the next should be the only functions called to insert an insn once
3749 delay slots have been filled since only they know how to update a
3753 add_insn_after (rtx insn, rtx after)
3755 rtx next = NEXT_INSN (after);
3758 if (optimize && INSN_DELETED_P (after))
3761 NEXT_INSN (insn) = next;
3762 PREV_INSN (insn) = after;
3766 PREV_INSN (next) = insn;
3767 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3768 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3770 else if (last_insn == after)
3774 struct sequence_stack *stack = seq_stack;
3775 /* Scan all pending sequences too. */
3776 for (; stack; stack = stack->next)
3777 if (after == stack->last)
3787 if (GET_CODE (after) != BARRIER
3788 && GET_CODE (insn) != BARRIER
3789 && (bb = BLOCK_FOR_INSN (after)))
3791 set_block_for_insn (insn, bb);
3793 bb->flags |= BB_DIRTY;
3794 /* Should not happen as first in the BB is always
3795 either NOTE or LABEL. */
3796 if (BB_END (bb) == after
3797 /* Avoid clobbering of structure when creating new BB. */
3798 && GET_CODE (insn) != BARRIER
3799 && (GET_CODE (insn) != NOTE
3800 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3804 NEXT_INSN (after) = insn;
3805 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3807 rtx sequence = PATTERN (after);
3808 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3812 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3813 the previous should be the only functions called to insert an insn once
3814 delay slots have been filled since only they know how to update a
3818 add_insn_before (rtx insn, rtx before)
3820 rtx prev = PREV_INSN (before);
3823 if (optimize && INSN_DELETED_P (before))
3826 PREV_INSN (insn) = prev;
3827 NEXT_INSN (insn) = before;
3831 NEXT_INSN (prev) = insn;
3832 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3834 rtx sequence = PATTERN (prev);
3835 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3838 else if (first_insn == before)
3842 struct sequence_stack *stack = seq_stack;
3843 /* Scan all pending sequences too. */
3844 for (; stack; stack = stack->next)
3845 if (before == stack->first)
3847 stack->first = insn;
3855 if (GET_CODE (before) != BARRIER
3856 && GET_CODE (insn) != BARRIER
3857 && (bb = BLOCK_FOR_INSN (before)))
3859 set_block_for_insn (insn, bb);
3861 bb->flags |= BB_DIRTY;
3862 /* Should not happen as first in the BB is always
3863 either NOTE or LABEl. */
3864 if (BB_HEAD (bb) == insn
3865 /* Avoid clobbering of structure when creating new BB. */
3866 && GET_CODE (insn) != BARRIER
3867 && (GET_CODE (insn) != NOTE
3868 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3872 PREV_INSN (before) = insn;
3873 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3874 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3877 /* Remove an insn from its doubly-linked list. This function knows how
3878 to handle sequences. */
3880 remove_insn (rtx insn)
3882 rtx next = NEXT_INSN (insn);
3883 rtx prev = PREV_INSN (insn);
3888 NEXT_INSN (prev) = next;
3889 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3891 rtx sequence = PATTERN (prev);
3892 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3895 else if (first_insn == insn)
3899 struct sequence_stack *stack = seq_stack;
3900 /* Scan all pending sequences too. */
3901 for (; stack; stack = stack->next)
3902 if (insn == stack->first)
3904 stack->first = next;
3914 PREV_INSN (next) = prev;
3915 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3916 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3918 else if (last_insn == insn)
3922 struct sequence_stack *stack = seq_stack;
3923 /* Scan all pending sequences too. */
3924 for (; stack; stack = stack->next)
3925 if (insn == stack->last)
3934 if (GET_CODE (insn) != BARRIER
3935 && (bb = BLOCK_FOR_INSN (insn)))
3938 bb->flags |= BB_DIRTY;
3939 if (BB_HEAD (bb) == insn)
3941 /* Never ever delete the basic block note without deleting whole
3943 if (GET_CODE (insn) == NOTE)
3945 BB_HEAD (bb) = next;
3947 if (BB_END (bb) == insn)
3952 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3955 add_function_usage_to (rtx call_insn, rtx call_fusage)
3957 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3960 /* Put the register usage information on the CALL. If there is already
3961 some usage information, put ours at the end. */
3962 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3966 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3967 link = XEXP (link, 1))
3970 XEXP (link, 1) = call_fusage;
3973 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3976 /* Delete all insns made since FROM.
3977 FROM becomes the new last instruction. */
3980 delete_insns_since (rtx from)
3985 NEXT_INSN (from) = 0;
3989 /* This function is deprecated, please use sequences instead.
3991 Move a consecutive bunch of insns to a different place in the chain.
3992 The insns to be moved are those between FROM and TO.
3993 They are moved to a new position after the insn AFTER.
3994 AFTER must not be FROM or TO or any insn in between.
3996 This function does not know about SEQUENCEs and hence should not be
3997 called after delay-slot filling has been done. */
4000 reorder_insns_nobb (rtx from, rtx to, rtx after)
4002 /* Splice this bunch out of where it is now. */
4003 if (PREV_INSN (from))
4004 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4006 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4007 if (last_insn == to)
4008 last_insn = PREV_INSN (from);
4009 if (first_insn == from)
4010 first_insn = NEXT_INSN (to);
4012 /* Make the new neighbors point to it and it to them. */
4013 if (NEXT_INSN (after))
4014 PREV_INSN (NEXT_INSN (after)) = to;
4016 NEXT_INSN (to) = NEXT_INSN (after);
4017 PREV_INSN (from) = after;
4018 NEXT_INSN (after) = from;
4019 if (after == last_insn)
4023 /* Same as function above, but take care to update BB boundaries. */
4025 reorder_insns (rtx from, rtx to, rtx after)
4027 rtx prev = PREV_INSN (from);
4028 basic_block bb, bb2;
4030 reorder_insns_nobb (from, to, after);
4032 if (GET_CODE (after) != BARRIER
4033 && (bb = BLOCK_FOR_INSN (after)))
4036 bb->flags |= BB_DIRTY;
4038 if (GET_CODE (from) != BARRIER
4039 && (bb2 = BLOCK_FOR_INSN (from)))
4041 if (BB_END (bb2) == to)
4042 BB_END (bb2) = prev;
4043 bb2->flags |= BB_DIRTY;
4046 if (BB_END (bb) == after)
4049 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4050 set_block_for_insn (x, bb);
4054 /* Return the line note insn preceding INSN. */
4057 find_line_note (rtx insn)
4059 if (no_line_numbers)
4062 for (; insn; insn = PREV_INSN (insn))
4063 if (GET_CODE (insn) == NOTE
4064 && NOTE_LINE_NUMBER (insn) >= 0)
4070 /* Like reorder_insns, but inserts line notes to preserve the line numbers
4071 of the moved insns when debugging. This may insert a note between AFTER
4072 and FROM, and another one after TO. */
4075 reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
4077 rtx from_line = find_line_note (from);
4078 rtx after_line = find_line_note (after);
4080 reorder_insns (from, to, after);
4082 if (from_line == after_line)
4086 emit_note_copy_after (from_line, after);
4088 emit_note_copy_after (after_line, to);
4091 /* Remove unnecessary notes from the instruction stream. */
4094 remove_unnecessary_notes (void)
4096 rtx block_stack = NULL_RTX;
4097 rtx eh_stack = NULL_RTX;
4102 /* We must not remove the first instruction in the function because
4103 the compiler depends on the first instruction being a note. */
4104 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
4106 /* Remember what's next. */
4107 next = NEXT_INSN (insn);
4109 /* We're only interested in notes. */
4110 if (GET_CODE (insn) != NOTE)
4113 switch (NOTE_LINE_NUMBER (insn))
4115 case NOTE_INSN_DELETED:
4116 case NOTE_INSN_LOOP_END_TOP_COND:
4120 case NOTE_INSN_EH_REGION_BEG:
4121 eh_stack = alloc_INSN_LIST (insn, eh_stack);
4124 case NOTE_INSN_EH_REGION_END:
4125 /* Too many end notes. */
4126 if (eh_stack == NULL_RTX)
4128 /* Mismatched nesting. */
4129 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
4132 eh_stack = XEXP (eh_stack, 1);
4133 free_INSN_LIST_node (tmp);
4136 case NOTE_INSN_BLOCK_BEG:
4137 /* By now, all notes indicating lexical blocks should have
4138 NOTE_BLOCK filled in. */
4139 if (NOTE_BLOCK (insn) == NULL_TREE)
4141 block_stack = alloc_INSN_LIST (insn, block_stack);
4144 case NOTE_INSN_BLOCK_END:
4145 /* Too many end notes. */
4146 if (block_stack == NULL_RTX)
4148 /* Mismatched nesting. */
4149 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
4152 block_stack = XEXP (block_stack, 1);
4153 free_INSN_LIST_node (tmp);
4155 /* Scan back to see if there are any non-note instructions
4156 between INSN and the beginning of this block. If not,
4157 then there is no PC range in the generated code that will
4158 actually be in this block, so there's no point in
4159 remembering the existence of the block. */
4160 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
4162 /* This block contains a real instruction. Note that we
4163 don't include labels; if the only thing in the block
4164 is a label, then there are still no PC values that
4165 lie within the block. */
4169 /* We're only interested in NOTEs. */
4170 if (GET_CODE (tmp) != NOTE)
4173 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
4175 /* We just verified that this BLOCK matches us with
4176 the block_stack check above. Never delete the
4177 BLOCK for the outermost scope of the function; we
4178 can refer to names from that scope even if the
4179 block notes are messed up. */
4180 if (! is_body_block (NOTE_BLOCK (insn))
4181 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
4188 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
4189 /* There's a nested block. We need to leave the
4190 current block in place since otherwise the debugger
4191 wouldn't be able to show symbols from our block in
4192 the nested block. */
4198 /* Too many begin notes. */
4199 if (block_stack || eh_stack)
4204 /* Emit insn(s) of given code and pattern
4205 at a specified place within the doubly-linked list.
4207 All of the emit_foo global entry points accept an object
4208 X which is either an insn list or a PATTERN of a single
4211 There are thus a few canonical ways to generate code and
4212 emit it at a specific place in the instruction stream. For
4213 example, consider the instruction named SPOT and the fact that
4214 we would like to emit some instructions before SPOT. We might
4218 ... emit the new instructions ...
4219 insns_head = get_insns ();
4222 emit_insn_before (insns_head, SPOT);
4224 It used to be common to generate SEQUENCE rtl instead, but that
4225 is a relic of the past which no longer occurs. The reason is that
4226 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4227 generated would almost certainly die right after it was created. */
4229 /* Make X be output before the instruction BEFORE. */
4232 emit_insn_before (rtx x, rtx before)
4237 #ifdef ENABLE_RTL_CHECKING
4238 if (before == NULL_RTX)
4245 switch (GET_CODE (x))
4256 rtx next = NEXT_INSN (insn);
4257 add_insn_before (insn, before);
4263 #ifdef ENABLE_RTL_CHECKING
4270 last = make_insn_raw (x);
4271 add_insn_before (last, before);
4278 /* Make an instruction with body X and code JUMP_INSN
4279 and output it before the instruction BEFORE. */
4282 emit_jump_insn_before (rtx x, rtx before)
4284 rtx insn, last = NULL_RTX;
4286 #ifdef ENABLE_RTL_CHECKING
4287 if (before == NULL_RTX)
4291 switch (GET_CODE (x))
4302 rtx next = NEXT_INSN (insn);
4303 add_insn_before (insn, before);
4309 #ifdef ENABLE_RTL_CHECKING
4316 last = make_jump_insn_raw (x);
4317 add_insn_before (last, before);
4324 /* Make an instruction with body X and code CALL_INSN
4325 and output it before the instruction BEFORE. */
4328 emit_call_insn_before (rtx x, rtx before)
4330 rtx last = NULL_RTX, insn;
4332 #ifdef ENABLE_RTL_CHECKING
4333 if (before == NULL_RTX)
4337 switch (GET_CODE (x))
4348 rtx next = NEXT_INSN (insn);
4349 add_insn_before (insn, before);
4355 #ifdef ENABLE_RTL_CHECKING
4362 last = make_call_insn_raw (x);
4363 add_insn_before (last, before);
4370 /* Make an insn of code BARRIER
4371 and output it before the insn BEFORE. */
4374 emit_barrier_before (rtx before)
4376 rtx insn = rtx_alloc (BARRIER);
4378 INSN_UID (insn) = cur_insn_uid++;
4380 add_insn_before (insn, before);
4384 /* Emit the label LABEL before the insn BEFORE. */
4387 emit_label_before (rtx label, rtx before)
4389 /* This can be called twice for the same label as a result of the
4390 confusion that follows a syntax error! So make it harmless. */
4391 if (INSN_UID (label) == 0)
4393 INSN_UID (label) = cur_insn_uid++;
4394 add_insn_before (label, before);
4400 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4403 emit_note_before (int subtype, rtx before)
4405 rtx note = rtx_alloc (NOTE);
4406 INSN_UID (note) = cur_insn_uid++;
4407 NOTE_SOURCE_FILE (note) = 0;
4408 NOTE_LINE_NUMBER (note) = subtype;
4409 BLOCK_FOR_INSN (note) = NULL;
4411 add_insn_before (note, before);
4415 /* Helper for emit_insn_after, handles lists of instructions
4418 static rtx emit_insn_after_1 (rtx, rtx);
4421 emit_insn_after_1 (rtx first, rtx after)
4427 if (GET_CODE (after) != BARRIER
4428 && (bb = BLOCK_FOR_INSN (after)))
4430 bb->flags |= BB_DIRTY;
4431 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4432 if (GET_CODE (last) != BARRIER)
4433 set_block_for_insn (last, bb);
4434 if (GET_CODE (last) != BARRIER)
4435 set_block_for_insn (last, bb);
4436 if (BB_END (bb) == after)
4440 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4443 after_after = NEXT_INSN (after);
4445 NEXT_INSN (after) = first;
4446 PREV_INSN (first) = after;
4447 NEXT_INSN (last) = after_after;
4449 PREV_INSN (after_after) = last;
4451 if (after == last_insn)
4456 /* Make X be output after the insn AFTER. */
4459 emit_insn_after (rtx x, rtx after)
4463 #ifdef ENABLE_RTL_CHECKING
4464 if (after == NULL_RTX)
4471 switch (GET_CODE (x))
4479 last = emit_insn_after_1 (x, after);
4482 #ifdef ENABLE_RTL_CHECKING
4489 last = make_insn_raw (x);
4490 add_insn_after (last, after);
4497 /* Similar to emit_insn_after, except that line notes are to be inserted so
4498 as to act as if this insn were at FROM. */
4501 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4503 rtx from_line = find_line_note (from);
4504 rtx after_line = find_line_note (after);
4505 rtx insn = emit_insn_after (x, after);
4508 emit_note_copy_after (from_line, after);
4511 emit_note_copy_after (after_line, insn);
4514 /* Make an insn of code JUMP_INSN with body X
4515 and output it after the insn AFTER. */
4518 emit_jump_insn_after (rtx x, rtx after)
4522 #ifdef ENABLE_RTL_CHECKING
4523 if (after == NULL_RTX)
4527 switch (GET_CODE (x))
4535 last = emit_insn_after_1 (x, after);
4538 #ifdef ENABLE_RTL_CHECKING
4545 last = make_jump_insn_raw (x);
4546 add_insn_after (last, after);
4553 /* Make an instruction with body X and code CALL_INSN
4554 and output it after the instruction AFTER. */
4557 emit_call_insn_after (rtx x, rtx after)
4561 #ifdef ENABLE_RTL_CHECKING
4562 if (after == NULL_RTX)
4566 switch (GET_CODE (x))
4574 last = emit_insn_after_1 (x, after);
4577 #ifdef ENABLE_RTL_CHECKING
4584 last = make_call_insn_raw (x);
4585 add_insn_after (last, after);
4592 /* Make an insn of code BARRIER
4593 and output it after the insn AFTER. */
4596 emit_barrier_after (rtx after)
4598 rtx insn = rtx_alloc (BARRIER);
4600 INSN_UID (insn) = cur_insn_uid++;
4602 add_insn_after (insn, after);
4606 /* Emit the label LABEL after the insn AFTER. */
4609 emit_label_after (rtx label, rtx after)
4611 /* This can be called twice for the same label
4612 as a result of the confusion that follows a syntax error!
4613 So make it harmless. */
4614 if (INSN_UID (label) == 0)
4616 INSN_UID (label) = cur_insn_uid++;
4617 add_insn_after (label, after);
4623 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4626 emit_note_after (int subtype, rtx after)
4628 rtx note = rtx_alloc (NOTE);
4629 INSN_UID (note) = cur_insn_uid++;
4630 NOTE_SOURCE_FILE (note) = 0;
4631 NOTE_LINE_NUMBER (note) = subtype;
4632 BLOCK_FOR_INSN (note) = NULL;
4633 add_insn_after (note, after);
4637 /* Emit a copy of note ORIG after the insn AFTER. */
4640 emit_note_copy_after (rtx orig, rtx after)
4644 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4650 note = rtx_alloc (NOTE);
4651 INSN_UID (note) = cur_insn_uid++;
4652 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4653 NOTE_DATA (note) = NOTE_DATA (orig);
4654 BLOCK_FOR_INSN (note) = NULL;
4655 add_insn_after (note, after);
4659 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4661 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4663 rtx last = emit_insn_after (pattern, after);
4665 after = NEXT_INSN (after);
4668 if (active_insn_p (after))
4669 INSN_LOCATOR (after) = loc;
4672 after = NEXT_INSN (after);
4677 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4679 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4681 rtx last = emit_jump_insn_after (pattern, after);
4683 after = NEXT_INSN (after);
4686 if (active_insn_p (after))
4687 INSN_LOCATOR (after) = loc;
4690 after = NEXT_INSN (after);
4695 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4697 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4699 rtx last = emit_call_insn_after (pattern, after);
4701 after = NEXT_INSN (after);
4704 if (active_insn_p (after))
4705 INSN_LOCATOR (after) = loc;
4708 after = NEXT_INSN (after);
4713 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4715 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4717 rtx first = PREV_INSN (before);
4718 rtx last = emit_insn_before (pattern, before);
4720 first = NEXT_INSN (first);
4723 if (active_insn_p (first))
4724 INSN_LOCATOR (first) = loc;
4727 first = NEXT_INSN (first);
4732 /* Take X and emit it at the end of the doubly-linked
4735 Returns the last insn emitted. */
4740 rtx last = last_insn;
4746 switch (GET_CODE (x))
4757 rtx next = NEXT_INSN (insn);
4764 #ifdef ENABLE_RTL_CHECKING
4771 last = make_insn_raw (x);
4779 /* Make an insn of code JUMP_INSN with pattern X
4780 and add it to the end of the doubly-linked list. */
4783 emit_jump_insn (rtx x)
4785 rtx last = NULL_RTX, insn;
4787 switch (GET_CODE (x))
4798 rtx next = NEXT_INSN (insn);
4805 #ifdef ENABLE_RTL_CHECKING
4812 last = make_jump_insn_raw (x);
4820 /* Make an insn of code CALL_INSN with pattern X
4821 and add it to the end of the doubly-linked list. */
4824 emit_call_insn (rtx x)
4828 switch (GET_CODE (x))
4836 insn = emit_insn (x);
4839 #ifdef ENABLE_RTL_CHECKING
4846 insn = make_call_insn_raw (x);
4854 /* Add the label LABEL to the end of the doubly-linked list. */
4857 emit_label (rtx label)
4859 /* This can be called twice for the same label
4860 as a result of the confusion that follows a syntax error!
4861 So make it harmless. */
4862 if (INSN_UID (label) == 0)
4864 INSN_UID (label) = cur_insn_uid++;
4870 /* Make an insn of code BARRIER
4871 and add it to the end of the doubly-linked list. */
4876 rtx barrier = rtx_alloc (BARRIER);
4877 INSN_UID (barrier) = cur_insn_uid++;
4882 /* Make line numbering NOTE insn for LOCATION add it to the end
4883 of the doubly-linked list, but only if line-numbers are desired for
4884 debugging info and it doesn't match the previous one. */
4887 emit_line_note (location_t location)
4891 set_file_and_line_for_stmt (location);
4893 if (location.file && last_location.file
4894 && !strcmp (location.file, last_location.file)
4895 && location.line == last_location.line)
4897 last_location = location;
4899 if (no_line_numbers)
4905 note = emit_note (location.line);
4906 NOTE_SOURCE_FILE (note) = location.file;
4911 /* Emit a copy of note ORIG. */
4914 emit_note_copy (rtx orig)
4918 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4924 note = rtx_alloc (NOTE);
4926 INSN_UID (note) = cur_insn_uid++;
4927 NOTE_DATA (note) = NOTE_DATA (orig);
4928 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4929 BLOCK_FOR_INSN (note) = NULL;
4935 /* Make an insn of code NOTE or type NOTE_NO
4936 and add it to the end of the doubly-linked list. */
4939 emit_note (int note_no)
4943 note = rtx_alloc (NOTE);
4944 INSN_UID (note) = cur_insn_uid++;
4945 NOTE_LINE_NUMBER (note) = note_no;
4946 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4947 BLOCK_FOR_INSN (note) = NULL;
4952 /* Cause next statement to emit a line note even if the line number
4956 force_next_line_note (void)
4958 last_location.line = -1;
4961 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4962 note of this type already exists, remove it first. */
4965 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4967 rtx note = find_reg_note (insn, kind, NULL_RTX);
4973 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4974 has multiple sets (some callers assume single_set
4975 means the insn only has one set, when in fact it
4976 means the insn only has one * useful * set). */
4977 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4984 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4985 It serves no useful purpose and breaks eliminate_regs. */
4986 if (GET_CODE (datum) == ASM_OPERANDS)
4996 XEXP (note, 0) = datum;
5000 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
5001 return REG_NOTES (insn);
5004 /* Return an indication of which type of insn should have X as a body.
5005 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5008 classify_insn (rtx x)
5010 if (GET_CODE (x) == CODE_LABEL)
5012 if (GET_CODE (x) == CALL)
5014 if (GET_CODE (x) == RETURN)
5016 if (GET_CODE (x) == SET)
5018 if (SET_DEST (x) == pc_rtx)
5020 else if (GET_CODE (SET_SRC (x)) == CALL)
5025 if (GET_CODE (x) == PARALLEL)
5028 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5029 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5031 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5032 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5034 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5035 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5041 /* Emit the rtl pattern X as an appropriate kind of insn.
5042 If X is a label, it is simply added into the insn chain. */
5047 enum rtx_code code = classify_insn (x);
5049 if (code == CODE_LABEL)
5050 return emit_label (x);
5051 else if (code == INSN)
5052 return emit_insn (x);
5053 else if (code == JUMP_INSN)
5055 rtx insn = emit_jump_insn (x);
5056 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5057 return emit_barrier ();
5060 else if (code == CALL_INSN)
5061 return emit_call_insn (x);
5066 /* Space for free sequence stack entries. */
5067 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
5069 /* Begin emitting insns to a sequence which can be packaged in an
5070 RTL_EXPR. If this sequence will contain something that might cause
5071 the compiler to pop arguments to function calls (because those
5072 pops have previously been deferred; see INHIBIT_DEFER_POP for more
5073 details), use do_pending_stack_adjust before calling this function.
5074 That will ensure that the deferred pops are not accidentally
5075 emitted in the middle of this sequence. */
5078 start_sequence (void)
5080 struct sequence_stack *tem;
5082 if (free_sequence_stack != NULL)
5084 tem = free_sequence_stack;
5085 free_sequence_stack = tem->next;
5088 tem = ggc_alloc (sizeof (struct sequence_stack));
5090 tem->next = seq_stack;
5091 tem->first = first_insn;
5092 tem->last = last_insn;
5093 tem->sequence_rtl_expr = seq_rtl_expr;
5101 /* Similarly, but indicate that this sequence will be placed in T, an
5102 RTL_EXPR. See the documentation for start_sequence for more
5103 information about how to use this function. */
5106 start_sequence_for_rtl_expr (tree t)
5113 /* Set up the insn chain starting with FIRST as the current sequence,
5114 saving the previously current one. See the documentation for
5115 start_sequence for more information about how to use this function. */
5118 push_to_sequence (rtx first)
5124 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5130 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5133 push_to_full_sequence (rtx first, rtx last)
5138 /* We really should have the end of the insn chain here. */
5139 if (last && NEXT_INSN (last))
5143 /* Set up the outer-level insn chain
5144 as the current sequence, saving the previously current one. */
5147 push_topmost_sequence (void)
5149 struct sequence_stack *stack, *top = NULL;
5153 for (stack = seq_stack; stack; stack = stack->next)
5156 first_insn = top->first;
5157 last_insn = top->last;
5158 seq_rtl_expr = top->sequence_rtl_expr;
5161 /* After emitting to the outer-level insn chain, update the outer-level
5162 insn chain, and restore the previous saved state. */
5165 pop_topmost_sequence (void)
5167 struct sequence_stack *stack, *top = NULL;
5169 for (stack = seq_stack; stack; stack = stack->next)
5172 top->first = first_insn;
5173 top->last = last_insn;
5174 /* ??? Why don't we save seq_rtl_expr here? */
5179 /* After emitting to a sequence, restore previous saved state.
5181 To get the contents of the sequence just made, you must call
5182 `get_insns' *before* calling here.
5184 If the compiler might have deferred popping arguments while
5185 generating this sequence, and this sequence will not be immediately
5186 inserted into the instruction stream, use do_pending_stack_adjust
5187 before calling get_insns. That will ensure that the deferred
5188 pops are inserted into this sequence, and not into some random
5189 location in the instruction stream. See INHIBIT_DEFER_POP for more
5190 information about deferred popping of arguments. */
5195 struct sequence_stack *tem = seq_stack;
5197 first_insn = tem->first;
5198 last_insn = tem->last;
5199 seq_rtl_expr = tem->sequence_rtl_expr;
5200 seq_stack = tem->next;
5202 memset (tem, 0, sizeof (*tem));
5203 tem->next = free_sequence_stack;
5204 free_sequence_stack = tem;
5207 /* This works like end_sequence, but records the old sequence in FIRST
5211 end_full_sequence (rtx *first, rtx *last)
5213 *first = first_insn;
5218 /* Return 1 if currently emitting into a sequence. */
5221 in_sequence_p (void)
5223 return seq_stack != 0;
5226 /* Put the various virtual registers into REGNO_REG_RTX. */
5229 init_virtual_regs (struct emit_status *es)
5231 rtx *ptr = es->x_regno_reg_rtx;
5232 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5233 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5234 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5235 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5236 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5240 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5241 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5242 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5243 static int copy_insn_n_scratches;
5245 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5246 copied an ASM_OPERANDS.
5247 In that case, it is the original input-operand vector. */
5248 static rtvec orig_asm_operands_vector;
5250 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5251 copied an ASM_OPERANDS.
5252 In that case, it is the copied input-operand vector. */
5253 static rtvec copy_asm_operands_vector;
5255 /* Likewise for the constraints vector. */
5256 static rtvec orig_asm_constraints_vector;
5257 static rtvec copy_asm_constraints_vector;
5259 /* Recursively create a new copy of an rtx for copy_insn.
5260 This function differs from copy_rtx in that it handles SCRATCHes and
5261 ASM_OPERANDs properly.
5262 Normally, this function is not used directly; use copy_insn as front end.
5263 However, you could first copy an insn pattern with copy_insn and then use
5264 this function afterwards to properly copy any REG_NOTEs containing
5268 copy_insn_1 (rtx orig)
5273 const char *format_ptr;
5275 code = GET_CODE (orig);
5292 for (i = 0; i < copy_insn_n_scratches; i++)
5293 if (copy_insn_scratch_in[i] == orig)
5294 return copy_insn_scratch_out[i];
5298 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5299 a LABEL_REF, it isn't sharable. */
5300 if (GET_CODE (XEXP (orig, 0)) == PLUS
5301 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5302 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5306 /* A MEM with a constant address is not sharable. The problem is that
5307 the constant address may need to be reloaded. If the mem is shared,
5308 then reloading one copy of this mem will cause all copies to appear
5309 to have been reloaded. */
5315 copy = rtx_alloc (code);
5317 /* Copy the various flags, and other information. We assume that
5318 all fields need copying, and then clear the fields that should
5319 not be copied. That is the sensible default behavior, and forces
5320 us to explicitly document why we are *not* copying a flag. */
5321 memcpy (copy, orig, RTX_HDR_SIZE);
5323 /* We do not copy the USED flag, which is used as a mark bit during
5324 walks over the RTL. */
5325 RTX_FLAG (copy, used) = 0;
5327 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5328 if (GET_RTX_CLASS (code) == 'i')
5330 RTX_FLAG (copy, jump) = 0;
5331 RTX_FLAG (copy, call) = 0;
5332 RTX_FLAG (copy, frame_related) = 0;
5335 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5337 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5339 copy->u.fld[i] = orig->u.fld[i];
5340 switch (*format_ptr++)
5343 if (XEXP (orig, i) != NULL)
5344 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5349 if (XVEC (orig, i) == orig_asm_constraints_vector)
5350 XVEC (copy, i) = copy_asm_constraints_vector;
5351 else if (XVEC (orig, i) == orig_asm_operands_vector)
5352 XVEC (copy, i) = copy_asm_operands_vector;
5353 else if (XVEC (orig, i) != NULL)
5355 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5356 for (j = 0; j < XVECLEN (copy, i); j++)
5357 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5368 /* These are left unchanged. */
5376 if (code == SCRATCH)
5378 i = copy_insn_n_scratches++;
5379 if (i >= MAX_RECOG_OPERANDS)
5381 copy_insn_scratch_in[i] = orig;
5382 copy_insn_scratch_out[i] = copy;
5384 else if (code == ASM_OPERANDS)
5386 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5387 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5388 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5389 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5395 /* Create a new copy of an rtx.
5396 This function differs from copy_rtx in that it handles SCRATCHes and
5397 ASM_OPERANDs properly.
5398 INSN doesn't really have to be a full INSN; it could be just the
5401 copy_insn (rtx insn)
5403 copy_insn_n_scratches = 0;
5404 orig_asm_operands_vector = 0;
5405 orig_asm_constraints_vector = 0;
5406 copy_asm_operands_vector = 0;
5407 copy_asm_constraints_vector = 0;
5408 return copy_insn_1 (insn);
5411 /* Initialize data structures and variables in this file
5412 before generating rtl for each function. */
5417 struct function *f = cfun;
5419 f->emit = ggc_alloc (sizeof (struct emit_status));
5422 seq_rtl_expr = NULL;
5424 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5425 last_location.line = 0;
5426 last_location.file = 0;
5427 first_label_num = label_num;
5431 /* Init the tables that describe all the pseudo regs. */
5433 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5435 f->emit->regno_pointer_align
5436 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5437 * sizeof (unsigned char));
5440 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5442 /* Put copies of all the hard registers into regno_reg_rtx. */
5443 memcpy (regno_reg_rtx,
5444 static_regno_reg_rtx,
5445 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5447 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5448 init_virtual_regs (f->emit);
5450 /* Indicate that the virtual registers and stack locations are
5452 REG_POINTER (stack_pointer_rtx) = 1;
5453 REG_POINTER (frame_pointer_rtx) = 1;
5454 REG_POINTER (hard_frame_pointer_rtx) = 1;
5455 REG_POINTER (arg_pointer_rtx) = 1;
5457 REG_POINTER (virtual_incoming_args_rtx) = 1;
5458 REG_POINTER (virtual_stack_vars_rtx) = 1;
5459 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5460 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5461 REG_POINTER (virtual_cfa_rtx) = 1;
5463 #ifdef STACK_BOUNDARY
5464 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5465 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5466 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5467 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5469 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5470 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5471 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5472 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5473 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5476 #ifdef INIT_EXPANDERS
5481 /* Generate the constant 0. */
5484 gen_const_vector_0 (enum machine_mode mode)
5489 enum machine_mode inner;
5491 units = GET_MODE_NUNITS (mode);
5492 inner = GET_MODE_INNER (mode);
5494 v = rtvec_alloc (units);
5496 /* We need to call this function after we to set CONST0_RTX first. */
5497 if (!CONST0_RTX (inner))
5500 for (i = 0; i < units; ++i)
5501 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5503 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5507 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5508 all elements are zero. */
5510 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5512 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5515 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5516 if (RTVEC_ELT (v, i) != inner_zero)
5517 return gen_rtx_raw_CONST_VECTOR (mode, v);
5518 return CONST0_RTX (mode);
5521 /* Create some permanent unique rtl objects shared between all functions.
5522 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5525 init_emit_once (int line_numbers)
5528 enum machine_mode mode;
5529 enum machine_mode double_mode;
5531 /* We need reg_raw_mode, so initialize the modes now. */
5532 init_reg_modes_once ();
5534 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5536 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5537 const_int_htab_eq, NULL);
5539 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5540 const_double_htab_eq, NULL);
5542 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5543 mem_attrs_htab_eq, NULL);
5544 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5545 reg_attrs_htab_eq, NULL);
5547 no_line_numbers = ! line_numbers;
5549 /* Compute the word and byte modes. */
5551 byte_mode = VOIDmode;
5552 word_mode = VOIDmode;
5553 double_mode = VOIDmode;
5555 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5556 mode = GET_MODE_WIDER_MODE (mode))
5558 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5559 && byte_mode == VOIDmode)
5562 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5563 && word_mode == VOIDmode)
5567 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5568 mode = GET_MODE_WIDER_MODE (mode))
5570 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5571 && double_mode == VOIDmode)
5575 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5577 /* Assign register numbers to the globally defined register rtx.
5578 This must be done at runtime because the register number field
5579 is in a union and some compilers can't initialize unions. */
5581 pc_rtx = gen_rtx (PC, VOIDmode);
5582 cc0_rtx = gen_rtx (CC0, VOIDmode);
5583 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5584 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5585 if (hard_frame_pointer_rtx == 0)
5586 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5587 HARD_FRAME_POINTER_REGNUM);
5588 if (arg_pointer_rtx == 0)
5589 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5590 virtual_incoming_args_rtx =
5591 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5592 virtual_stack_vars_rtx =
5593 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5594 virtual_stack_dynamic_rtx =
5595 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5596 virtual_outgoing_args_rtx =
5597 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5598 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5600 /* Initialize RTL for commonly used hard registers. These are
5601 copied into regno_reg_rtx as we begin to compile each function. */
5602 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5603 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5605 #ifdef INIT_EXPANDERS
5606 /* This is to initialize {init|mark|free}_machine_status before the first
5607 call to push_function_context_to. This is needed by the Chill front
5608 end which calls push_function_context_to before the first call to
5609 init_function_start. */
5613 /* Create the unique rtx's for certain rtx codes and operand values. */
5615 /* Don't use gen_rtx here since gen_rtx in this case
5616 tries to use these variables. */
5617 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5618 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5619 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5621 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5622 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5623 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5625 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5627 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5628 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5629 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5630 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5631 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5632 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5633 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5635 dconsthalf = dconst1;
5638 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5640 /* Initialize mathematical constants for constant folding builtins.
5641 These constants need to be given to at least 160 bits precision. */
5642 real_from_string (&dconstpi,
5643 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5644 real_from_string (&dconste,
5645 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5647 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5649 REAL_VALUE_TYPE *r =
5650 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5652 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5653 mode = GET_MODE_WIDER_MODE (mode))
5654 const_tiny_rtx[i][(int) mode] =
5655 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5657 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5659 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5660 mode = GET_MODE_WIDER_MODE (mode))
5661 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5663 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5665 mode = GET_MODE_WIDER_MODE (mode))
5666 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5669 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5671 mode = GET_MODE_WIDER_MODE (mode))
5672 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5674 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5676 mode = GET_MODE_WIDER_MODE (mode))
5677 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5679 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5680 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5681 const_tiny_rtx[0][i] = const0_rtx;
5683 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5684 if (STORE_FLAG_VALUE == 1)
5685 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5687 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5688 return_address_pointer_rtx
5689 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5692 #ifdef STATIC_CHAIN_REGNUM
5693 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5695 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5696 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5697 static_chain_incoming_rtx
5698 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5701 static_chain_incoming_rtx = static_chain_rtx;
5705 static_chain_rtx = STATIC_CHAIN;
5707 #ifdef STATIC_CHAIN_INCOMING
5708 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5710 static_chain_incoming_rtx = static_chain_rtx;
5714 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5715 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5718 /* Query and clear/ restore no_line_numbers. This is used by the
5719 switch / case handling in stmt.c to give proper line numbers in
5720 warnings about unreachable code. */
5723 force_line_numbers (void)
5725 int old = no_line_numbers;
5727 no_line_numbers = 0;
5729 force_next_line_note ();
5734 restore_line_number_status (int old_value)
5736 no_line_numbers = old_value;
5739 /* Produce exact duplicate of insn INSN after AFTER.
5740 Care updating of libcall regions if present. */
5743 emit_copy_of_insn_after (rtx insn, rtx after)
5746 rtx note1, note2, link;
5748 switch (GET_CODE (insn))
5751 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5755 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5759 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5760 if (CALL_INSN_FUNCTION_USAGE (insn))
5761 CALL_INSN_FUNCTION_USAGE (new)
5762 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5763 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5764 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5771 /* Update LABEL_NUSES. */
5772 mark_jump_label (PATTERN (new), new, 0);
5774 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5776 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5778 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5779 if (REG_NOTE_KIND (link) != REG_LABEL)
5781 if (GET_CODE (link) == EXPR_LIST)
5783 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5788 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5793 /* Fix the libcall sequences. */
5794 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5797 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5799 XEXP (note1, 0) = p;
5800 XEXP (note2, 0) = new;
5802 INSN_CODE (new) = INSN_CODE (insn);
5806 #include "gt-emit-rtl.h"