1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconst3;
114 REAL_VALUE_TYPE dconst10;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconstm2;
117 REAL_VALUE_TYPE dconsthalf;
118 REAL_VALUE_TYPE dconstthird;
119 REAL_VALUE_TYPE dconstpi;
120 REAL_VALUE_TYPE dconste;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_int_htab;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
163 htab_t mem_attrs_htab;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
167 htab_t reg_attrs_htab;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
171 htab_t const_double_htab;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx make_jump_insn_raw (rtx);
180 static rtx make_call_insn_raw (rtx);
181 static rtx find_line_note (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void unshare_all_rtl_1 (rtx);
184 static void unshare_all_decls (tree);
185 static void reset_used_decls (tree);
186 static void mark_label_nuses (rtx);
187 static hashval_t const_int_htab_hash (const void *);
188 static int const_int_htab_eq (const void *, const void *);
189 static hashval_t const_double_htab_hash (const void *);
190 static int const_double_htab_eq (const void *, const void *);
191 static rtx lookup_const_double (rtx);
192 static hashval_t mem_attrs_htab_hash (const void *);
193 static int mem_attrs_htab_eq (const void *, const void *);
194 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
196 static hashval_t reg_attrs_htab_hash (const void *);
197 static int reg_attrs_htab_eq (const void *, const void *);
198 static reg_attrs *get_reg_attrs (tree, int);
199 static tree component_ref_for_mem_expr (tree);
200 static rtx gen_const_vector_0 (enum machine_mode);
201 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x)
212 return (hashval_t) INTVAL ((rtx) x);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x, const void *y)
222 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x)
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x, const void *y)
248 rtx a = (rtx)x, b = (rtx)y;
250 if (GET_MODE (a) != GET_MODE (b))
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x)
265 mem_attrs *p = (mem_attrs *) x;
267 return (p->alias ^ (p->align * 1000)
268 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
269 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x, const void *y)
280 mem_attrs *p = (mem_attrs *) x;
281 mem_attrs *q = (mem_attrs *) y;
283 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
284 && p->size == q->size && p->align == q->align);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
293 unsigned int align, enum machine_mode mode)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias == 0 && expr == 0 && offset == 0
303 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
304 && (STRICT_ALIGNMENT && mode != BLKmode
305 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
310 attrs.offset = offset;
314 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
317 *slot = ggc_alloc (sizeof (mem_attrs));
318 memcpy (*slot, &attrs, sizeof (mem_attrs));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x)
329 reg_attrs *p = (reg_attrs *) x;
331 return ((p->offset * 1000) ^ (long) p->decl);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x, const void *y)
341 reg_attrs *p = (reg_attrs *) x;
342 reg_attrs *q = (reg_attrs *) y;
344 return (p->decl == q->decl && p->offset == q->offset);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl, int offset)
356 /* If everything is the default, we can just return zero. */
357 if (decl == 0 && offset == 0)
361 attrs.offset = offset;
363 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
366 *slot = ggc_alloc (sizeof (reg_attrs));
367 memcpy (*slot, &attrs, sizeof (reg_attrs));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode, int regno)
380 rtx x = gen_rtx_raw_REG (mode, regno);
381 ORIGINAL_REGNO (x) = regno;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
394 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
395 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx && arg == STORE_FLAG_VALUE)
399 return const_true_rtx;
402 /* Look up the CONST_INT in the hash table. */
403 slot = htab_find_slot_with_hash (const_int_htab, &arg,
404 (hashval_t) arg, INSERT);
406 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
412 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
414 return GEN_INT (trunc_int_for_mode (c, mode));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real)
427 void **slot = htab_find_slot (const_double_htab, real, INSERT);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
439 rtx real = rtx_alloc (CONST_DOUBLE);
440 PUT_MODE (real, mode);
442 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
444 return lookup_const_double (real);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
458 if (mode != VOIDmode)
461 if (GET_MODE_CLASS (mode) != MODE_INT
462 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width = GET_MODE_BITSIZE (mode);
472 if (width < HOST_BITS_PER_WIDE_INT
473 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
474 != ((HOST_WIDE_INT) (-1) << (width - 1))))
475 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
476 else if (width == HOST_BITS_PER_WIDE_INT
477 && ! (i1 == ~0 && i0 < 0))
479 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width < HOST_BITS_PER_WIDE_INT
493 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
494 i0 |= ((HOST_WIDE_INT) (-1) << width);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width <= HOST_BITS_PER_WIDE_INT)
515 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
522 /* We use VOIDmode for integers. */
523 value = rtx_alloc (CONST_DOUBLE);
524 PUT_MODE (value, VOIDmode);
526 CONST_DOUBLE_LOW (value) = i0;
527 CONST_DOUBLE_HIGH (value) = i1;
529 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
530 XWINT (value, i) = 0;
532 return lookup_const_double (value);
536 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode == Pmode && !reload_in_progress)
554 if (regno == FRAME_POINTER_REGNUM
555 && (!reload_completed || frame_pointer_needed))
556 return frame_pointer_rtx;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno == HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed || frame_pointer_needed))
560 return hard_frame_pointer_rtx;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno == ARG_POINTER_REGNUM)
564 return arg_pointer_rtx;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
568 return return_address_pointer_rtx;
570 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
572 return pic_offset_table_rtx;
573 if (regno == STACK_POINTER_REGNUM)
574 return stack_pointer_rtx;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno < FIRST_PSEUDO_REGISTER
593 && reg_raw_mode[regno] == mode)
594 return regno_reg_rtx[regno];
597 return gen_raw_REG (mode, regno);
601 gen_rtx_MEM (enum machine_mode mode, rtx addr)
603 rtx rt = gen_rtx_raw_MEM (mode, addr);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset % GET_MODE_SIZE (mode)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
628 return gen_rtx_raw_SUBREG (mode, reg, offset);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
637 enum machine_mode inmode;
639 inmode = GET_MODE (reg);
640 if (inmode == VOIDmode)
642 return gen_rtx_SUBREG (mode, reg,
643 subreg_lowpart_offset (mode, inmode));
646 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
648 ** This routine generates an RTX of the size specified by
649 ** <code>, which is an RTX code. The RTX structure is initialized
650 ** from the arguments <element1> through <elementn>, which are
651 ** interpreted according to the specific RTX type's format. The
652 ** special machine mode associated with the rtx (if any) is specified
655 ** gen_rtx can be invoked in a way which resembles the lisp-like
656 ** rtx it will generate. For example, the following rtx structure:
658 ** (plus:QI (mem:QI (reg:SI 1))
659 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
661 ** ...would be generated by the following C code:
663 ** gen_rtx (PLUS, QImode,
664 ** gen_rtx (MEM, QImode,
665 ** gen_rtx (REG, SImode, 1)),
666 ** gen_rtx (MEM, QImode,
667 ** gen_rtx (PLUS, SImode,
668 ** gen_rtx (REG, SImode, 2),
669 ** gen_rtx (REG, SImode, 3)))),
674 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
676 int i; /* Array indices... */
677 const char *fmt; /* Current rtx's format... */
678 rtx rt_val; /* RTX to return to caller... */
686 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
691 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
692 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
694 rt_val = immed_double_const (arg0, arg1, mode);
699 rt_val = gen_rtx_REG (mode, va_arg (p, int));
703 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
707 rt_val = rtx_alloc (code); /* Allocate the storage space. */
708 rt_val->mode = mode; /* Store the machine mode... */
710 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
711 for (i = 0; i < GET_RTX_LENGTH (code); i++)
715 case '0': /* Field with unknown use. Zero it. */
716 X0EXP (rt_val, i) = NULL_RTX;
719 case 'i': /* An integer? */
720 XINT (rt_val, i) = va_arg (p, int);
723 case 'w': /* A wide integer? */
724 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
727 case 's': /* A string? */
728 XSTR (rt_val, i) = va_arg (p, char *);
731 case 'e': /* An expression? */
732 case 'u': /* An insn? Same except when printing. */
733 XEXP (rt_val, i) = va_arg (p, rtx);
736 case 'E': /* An RTX vector? */
737 XVEC (rt_val, i) = va_arg (p, rtvec);
740 case 'b': /* A bitmap? */
741 XBITMAP (rt_val, i) = va_arg (p, bitmap);
744 case 't': /* A tree? */
745 XTREE (rt_val, i) = va_arg (p, tree);
759 /* gen_rtvec (n, [rt1, ..., rtn])
761 ** This routine creates an rtvec and stores within it the
762 ** pointers to rtx's which are its arguments.
767 gen_rtvec (int n, ...)
776 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
778 vector = alloca (n * sizeof (rtx));
780 for (i = 0; i < n; i++)
781 vector[i] = va_arg (p, rtx);
783 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
787 return gen_rtvec_v (save_n, vector);
791 gen_rtvec_v (int n, rtx *argp)
797 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
799 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
801 for (i = 0; i < n; i++)
802 rt_val->elem[i] = *argp++;
807 /* Generate a REG rtx for a new pseudo register of mode MODE.
808 This pseudo is assigned the next sequential register number. */
811 gen_reg_rtx (enum machine_mode mode)
813 struct function *f = cfun;
816 /* Don't let anything called after initial flow analysis create new
821 if (generating_concat_p
822 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
823 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
825 /* For complex modes, don't make a single pseudo.
826 Instead, make a CONCAT of two pseudos.
827 This allows noncontiguous allocation of the real and imaginary parts,
828 which makes much better code. Besides, allocating DCmode
829 pseudos overstrains reload on some machines like the 386. */
830 rtx realpart, imagpart;
831 enum machine_mode partmode = GET_MODE_INNER (mode);
833 realpart = gen_reg_rtx (partmode);
834 imagpart = gen_reg_rtx (partmode);
835 return gen_rtx_CONCAT (mode, realpart, imagpart);
838 /* Make sure regno_pointer_align, and regno_reg_rtx are large
839 enough to have an element for this pseudo reg number. */
841 if (reg_rtx_no == f->emit->regno_pointer_align_length)
843 int old_size = f->emit->regno_pointer_align_length;
847 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
848 memset (new + old_size, 0, old_size);
849 f->emit->regno_pointer_align = (unsigned char *) new;
851 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
852 old_size * 2 * sizeof (rtx));
853 memset (new1 + old_size, 0, old_size * sizeof (rtx));
854 regno_reg_rtx = new1;
856 f->emit->regno_pointer_align_length = old_size * 2;
859 val = gen_raw_REG (mode, reg_rtx_no);
860 regno_reg_rtx[reg_rtx_no++] = val;
864 /* Generate a register with same attributes as REG,
865 but offsetted by OFFSET. */
868 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
870 rtx new = gen_rtx_REG (mode, regno);
871 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
872 REG_OFFSET (reg) + offset);
876 /* Set the decl for MEM to DECL. */
879 set_reg_attrs_from_mem (rtx reg, rtx mem)
881 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
883 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
886 /* Set the register attributes for registers contained in PARM_RTX.
887 Use needed values from memory attributes of MEM. */
890 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
892 if (GET_CODE (parm_rtx) == REG)
893 set_reg_attrs_from_mem (parm_rtx, mem);
894 else if (GET_CODE (parm_rtx) == PARALLEL)
896 /* Check for a NULL entry in the first slot, used to indicate that the
897 parameter goes both on the stack and in registers. */
898 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
899 for (; i < XVECLEN (parm_rtx, 0); i++)
901 rtx x = XVECEXP (parm_rtx, 0, i);
902 if (GET_CODE (XEXP (x, 0)) == REG)
903 REG_ATTRS (XEXP (x, 0))
904 = get_reg_attrs (MEM_EXPR (mem),
905 INTVAL (XEXP (x, 1)));
910 /* Assign the RTX X to declaration T. */
912 set_decl_rtl (tree t, rtx x)
914 DECL_CHECK (t)->decl.rtl = x;
918 /* For register, we maintain the reverse information too. */
919 if (GET_CODE (x) == REG)
920 REG_ATTRS (x) = get_reg_attrs (t, 0);
921 else if (GET_CODE (x) == SUBREG)
922 REG_ATTRS (SUBREG_REG (x))
923 = get_reg_attrs (t, -SUBREG_BYTE (x));
924 if (GET_CODE (x) == CONCAT)
926 if (REG_P (XEXP (x, 0)))
927 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
928 if (REG_P (XEXP (x, 1)))
929 REG_ATTRS (XEXP (x, 1))
930 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
932 if (GET_CODE (x) == PARALLEL)
935 for (i = 0; i < XVECLEN (x, 0); i++)
937 rtx y = XVECEXP (x, 0, i);
938 if (REG_P (XEXP (y, 0)))
939 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
944 /* Identify REG (which may be a CONCAT) as a user register. */
947 mark_user_reg (rtx reg)
949 if (GET_CODE (reg) == CONCAT)
951 REG_USERVAR_P (XEXP (reg, 0)) = 1;
952 REG_USERVAR_P (XEXP (reg, 1)) = 1;
954 else if (GET_CODE (reg) == REG)
955 REG_USERVAR_P (reg) = 1;
960 /* Identify REG as a probable pointer register and show its alignment
961 as ALIGN, if nonzero. */
964 mark_reg_pointer (rtx reg, int align)
966 if (! REG_POINTER (reg))
968 REG_POINTER (reg) = 1;
971 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
973 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
974 /* We can no-longer be sure just how aligned this pointer is */
975 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
978 /* Return 1 plus largest pseudo reg number used in the current function. */
986 /* Return 1 + the largest label number used so far in the current function. */
991 if (last_label_num && label_num == base_label_num)
992 return last_label_num;
996 /* Return first label number used in this function (if any were used). */
999 get_first_label_num (void)
1001 return first_label_num;
1004 /* Return the final regno of X, which is a SUBREG of a hard
1007 subreg_hard_regno (rtx x, int check_mode)
1009 enum machine_mode mode = GET_MODE (x);
1010 unsigned int byte_offset, base_regno, final_regno;
1011 rtx reg = SUBREG_REG (x);
1013 /* This is where we attempt to catch illegal subregs
1014 created by the compiler. */
1015 if (GET_CODE (x) != SUBREG
1016 || GET_CODE (reg) != REG)
1018 base_regno = REGNO (reg);
1019 if (base_regno >= FIRST_PSEUDO_REGISTER)
1021 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1023 #ifdef ENABLE_CHECKING
1024 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1025 SUBREG_BYTE (x), mode))
1028 /* Catch non-congruent offsets too. */
1029 byte_offset = SUBREG_BYTE (x);
1030 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1033 final_regno = subreg_regno (x);
1038 /* Return a value representing some low-order bits of X, where the number
1039 of low-order bits is given by MODE. Note that no conversion is done
1040 between floating-point and fixed-point values, rather, the bit
1041 representation is returned.
1043 This function handles the cases in common between gen_lowpart, below,
1044 and two variants in cse.c and combine.c. These are the cases that can
1045 be safely handled at all points in the compilation.
1047 If this is not a case we can handle, return 0. */
1050 gen_lowpart_common (enum machine_mode mode, rtx x)
1052 int msize = GET_MODE_SIZE (mode);
1053 int xsize = GET_MODE_SIZE (GET_MODE (x));
1056 if (GET_MODE (x) == mode)
1059 /* MODE must occupy no more words than the mode of X. */
1060 if (GET_MODE (x) != VOIDmode
1061 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1062 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
1065 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1066 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1067 && GET_MODE (x) != VOIDmode && msize > xsize)
1070 offset = subreg_lowpart_offset (mode, GET_MODE (x));
1072 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1073 && (GET_MODE_CLASS (mode) == MODE_INT
1074 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1076 /* If we are getting the low-order part of something that has been
1077 sign- or zero-extended, we can either just use the object being
1078 extended or make a narrower extension. If we want an even smaller
1079 piece than the size of the object being extended, call ourselves
1082 This case is used mostly by combine and cse. */
1084 if (GET_MODE (XEXP (x, 0)) == mode)
1086 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1087 return gen_lowpart_common (mode, XEXP (x, 0));
1088 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
1089 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1091 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1092 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1093 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1094 else if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
1095 return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
1096 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1097 from the low-order part of the constant. */
1098 else if ((GET_MODE_CLASS (mode) == MODE_INT
1099 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1100 && GET_MODE (x) == VOIDmode
1101 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1103 /* If MODE is twice the host word size, X is already the desired
1104 representation. Otherwise, if MODE is wider than a word, we can't
1105 do this. If MODE is exactly a word, return just one CONST_INT. */
1107 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1109 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1111 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1112 return (GET_CODE (x) == CONST_INT ? x
1113 : GEN_INT (CONST_DOUBLE_LOW (x)));
1116 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1117 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1118 : CONST_DOUBLE_LOW (x));
1120 /* Sign extend to HOST_WIDE_INT. */
1121 val = trunc_int_for_mode (val, mode);
1123 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1128 /* The floating-point emulator can handle all conversions between
1129 FP and integer operands. This simplifies reload because it
1130 doesn't have to deal with constructs like (subreg:DI
1131 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1132 /* Single-precision floats are always 32-bits and double-precision
1133 floats are always 64-bits. */
1135 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1136 && GET_MODE_BITSIZE (mode) == 32
1137 && GET_CODE (x) == CONST_INT)
1140 long i = INTVAL (x);
1142 real_from_target (&r, &i, mode);
1143 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1145 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1146 && GET_MODE_BITSIZE (mode) == 64
1147 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1148 && GET_MODE (x) == VOIDmode)
1151 HOST_WIDE_INT low, high;
1154 if (GET_CODE (x) == CONST_INT)
1157 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1161 low = CONST_DOUBLE_LOW (x);
1162 high = CONST_DOUBLE_HIGH (x);
1165 if (HOST_BITS_PER_WIDE_INT > 32)
1166 high = low >> 31 >> 1;
1168 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1170 if (WORDS_BIG_ENDIAN)
1171 i[0] = high, i[1] = low;
1173 i[0] = low, i[1] = high;
1175 real_from_target (&r, i, mode);
1176 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1178 else if ((GET_MODE_CLASS (mode) == MODE_INT
1179 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1180 && GET_CODE (x) == CONST_DOUBLE
1181 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1184 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1185 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1187 /* Convert 'r' into an array of four 32-bit words in target word
1189 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1190 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1193 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1196 i[3 - 3 * endian] = 0;
1199 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1200 i[2 - 2 * endian] = 0;
1201 i[3 - 2 * endian] = 0;
1204 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1205 i[3 - 3 * endian] = 0;
1208 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1213 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1215 #if HOST_BITS_PER_WIDE_INT == 32
1216 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1218 if (HOST_BITS_PER_WIDE_INT != 64)
1221 return immed_double_const ((((unsigned long) i[3 * endian])
1222 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1223 (((unsigned long) i[2 - endian])
1224 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1228 /* If MODE is a condition code and X is a CONST_INT, the value of X
1229 must already have been "recognized" by the back-end, and we can
1230 assume that it is valid for this mode. */
1231 else if (GET_MODE_CLASS (mode) == MODE_CC
1232 && GET_CODE (x) == CONST_INT)
1235 /* Otherwise, we can't do this. */
1239 /* Return the constant real or imaginary part (which has mode MODE)
1240 of a complex value X. The IMAGPART_P argument determines whether
1241 the real or complex component should be returned. This function
1242 returns NULL_RTX if the component isn't a constant. */
1245 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1249 if (GET_CODE (x) == MEM
1250 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1252 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1253 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1255 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1256 if (TREE_CODE (part) == REAL_CST
1257 || TREE_CODE (part) == INTEGER_CST)
1258 return expand_expr (part, NULL_RTX, mode, 0);
1264 /* Return the real part (which has mode MODE) of a complex value X.
1265 This always comes at the low address in memory. */
1268 gen_realpart (enum machine_mode mode, rtx x)
1272 /* Handle complex constants. */
1273 part = gen_complex_constant_part (mode, x, 0);
1274 if (part != NULL_RTX)
1277 if (WORDS_BIG_ENDIAN
1278 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1280 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1282 ("can't access real part of complex value in hard register");
1283 else if (WORDS_BIG_ENDIAN)
1284 return gen_highpart (mode, x);
1286 return gen_lowpart (mode, x);
1289 /* Return the imaginary part (which has mode MODE) of a complex value X.
1290 This always comes at the high address in memory. */
1293 gen_imagpart (enum machine_mode mode, rtx x)
1297 /* Handle complex constants. */
1298 part = gen_complex_constant_part (mode, x, 1);
1299 if (part != NULL_RTX)
1302 if (WORDS_BIG_ENDIAN)
1303 return gen_lowpart (mode, x);
1304 else if (! WORDS_BIG_ENDIAN
1305 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1307 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1309 ("can't access imaginary part of complex value in hard register");
1311 return gen_highpart (mode, x);
1314 /* Return 1 iff X, assumed to be a SUBREG,
1315 refers to the real part of the complex value in its containing reg.
1316 Complex values are always stored with the real part in the first word,
1317 regardless of WORDS_BIG_ENDIAN. */
1320 subreg_realpart_p (rtx x)
1322 if (GET_CODE (x) != SUBREG)
1325 return ((unsigned int) SUBREG_BYTE (x)
1326 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1329 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1330 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1331 least-significant part of X.
1332 MODE specifies how big a part of X to return;
1333 it usually should not be larger than a word.
1334 If X is a MEM whose address is a QUEUED, the value may be so also. */
1337 gen_lowpart (enum machine_mode mode, rtx x)
1339 rtx result = gen_lowpart_common (mode, x);
1343 else if (GET_CODE (x) == REG)
1345 /* Must be a hard reg that's not valid in MODE. */
1346 result = gen_lowpart_common (mode, copy_to_reg (x));
1351 else if (GET_CODE (x) == MEM)
1353 /* The only additional case we can do is MEM. */
1356 /* The following exposes the use of "x" to CSE. */
1357 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1358 && SCALAR_INT_MODE_P (GET_MODE (x))
1359 && ! no_new_pseudos)
1360 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1362 if (WORDS_BIG_ENDIAN)
1363 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1364 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1366 if (BYTES_BIG_ENDIAN)
1367 /* Adjust the address so that the address-after-the-data
1369 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1370 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1372 return adjust_address (x, mode, offset);
1374 else if (GET_CODE (x) == ADDRESSOF)
1375 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1380 /* Like `gen_lowpart', but refer to the most significant part.
1381 This is used to access the imaginary part of a complex number. */
1384 gen_highpart (enum machine_mode mode, rtx x)
1386 unsigned int msize = GET_MODE_SIZE (mode);
1389 /* This case loses if X is a subreg. To catch bugs early,
1390 complain if an invalid MODE is used even in other cases. */
1391 if (msize > UNITS_PER_WORD
1392 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1395 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1396 subreg_highpart_offset (mode, GET_MODE (x)));
1398 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1399 the target if we have a MEM. gen_highpart must return a valid operand,
1400 emitting code if necessary to do so. */
1401 if (result != NULL_RTX && GET_CODE (result) == MEM)
1402 result = validize_mem (result);
1409 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1410 be VOIDmode constant. */
1412 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1414 if (GET_MODE (exp) != VOIDmode)
1416 if (GET_MODE (exp) != innermode)
1418 return gen_highpart (outermode, exp);
1420 return simplify_gen_subreg (outermode, exp, innermode,
1421 subreg_highpart_offset (outermode, innermode));
1424 /* Return offset in bytes to get OUTERMODE low part
1425 of the value in mode INNERMODE stored in memory in target format. */
1428 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1430 unsigned int offset = 0;
1431 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1435 if (WORDS_BIG_ENDIAN)
1436 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1437 if (BYTES_BIG_ENDIAN)
1438 offset += difference % UNITS_PER_WORD;
1444 /* Return offset in bytes to get OUTERMODE high part
1445 of the value in mode INNERMODE stored in memory in target format. */
1447 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1449 unsigned int offset = 0;
1450 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1452 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1457 if (! WORDS_BIG_ENDIAN)
1458 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1459 if (! BYTES_BIG_ENDIAN)
1460 offset += difference % UNITS_PER_WORD;
1466 /* Return 1 iff X, assumed to be a SUBREG,
1467 refers to the least significant part of its containing reg.
1468 If X is not a SUBREG, always return 1 (it is its own low part!). */
1471 subreg_lowpart_p (rtx x)
1473 if (GET_CODE (x) != SUBREG)
1475 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1478 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1479 == SUBREG_BYTE (x));
1483 /* Helper routine for all the constant cases of operand_subword.
1484 Some places invoke this directly. */
1487 constant_subword (rtx op, int offset, enum machine_mode mode)
1489 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1492 /* If OP is already an integer word, return it. */
1493 if (GET_MODE_CLASS (mode) == MODE_INT
1494 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1497 /* The output is some bits, the width of the target machine's word.
1498 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1500 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1501 && GET_MODE_CLASS (mode) == MODE_FLOAT
1502 && GET_MODE_BITSIZE (mode) == 64
1503 && GET_CODE (op) == CONST_DOUBLE)
1508 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1509 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1511 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1512 which the words are written depends on the word endianness.
1513 ??? This is a potential portability problem and should
1514 be fixed at some point.
1516 We must exercise caution with the sign bit. By definition there
1517 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1518 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1519 So we explicitly mask and sign-extend as necessary. */
1520 if (BITS_PER_WORD == 32)
1523 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1524 return GEN_INT (val);
1526 #if HOST_BITS_PER_WIDE_INT >= 64
1527 else if (BITS_PER_WORD >= 64 && offset == 0)
1529 val = k[! WORDS_BIG_ENDIAN];
1530 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1531 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1532 return GEN_INT (val);
1535 else if (BITS_PER_WORD == 16)
1537 val = k[offset >> 1];
1538 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1540 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1541 return GEN_INT (val);
1546 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1547 && GET_MODE_CLASS (mode) == MODE_FLOAT
1548 && GET_MODE_BITSIZE (mode) > 64
1549 && GET_CODE (op) == CONST_DOUBLE)
1554 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1555 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1557 if (BITS_PER_WORD == 32)
1560 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1561 return GEN_INT (val);
1563 #if HOST_BITS_PER_WIDE_INT >= 64
1564 else if (BITS_PER_WORD >= 64 && offset <= 1)
1566 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1567 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1568 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1569 return GEN_INT (val);
1576 /* Single word float is a little harder, since single- and double-word
1577 values often do not have the same high-order bits. We have already
1578 verified that we want the only defined word of the single-word value. */
1579 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1580 && GET_MODE_BITSIZE (mode) == 32
1581 && GET_CODE (op) == CONST_DOUBLE)
1586 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1587 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1589 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1591 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1593 if (BITS_PER_WORD == 16)
1595 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1597 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1600 return GEN_INT (val);
1603 /* The only remaining cases that we can handle are integers.
1604 Convert to proper endianness now since these cases need it.
1605 At this point, offset == 0 means the low-order word.
1607 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1608 in general. However, if OP is (const_int 0), we can just return
1611 if (op == const0_rtx)
1614 if (GET_MODE_CLASS (mode) != MODE_INT
1615 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1616 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1619 if (WORDS_BIG_ENDIAN)
1620 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1622 /* Find out which word on the host machine this value is in and get
1623 it from the constant. */
1624 val = (offset / size_ratio == 0
1625 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1626 : (GET_CODE (op) == CONST_INT
1627 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1629 /* Get the value we want into the low bits of val. */
1630 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1631 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1633 val = trunc_int_for_mode (val, word_mode);
1635 return GEN_INT (val);
1638 /* Return subword OFFSET of operand OP.
1639 The word number, OFFSET, is interpreted as the word number starting
1640 at the low-order address. OFFSET 0 is the low-order word if not
1641 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1643 If we cannot extract the required word, we return zero. Otherwise,
1644 an rtx corresponding to the requested word will be returned.
1646 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1647 reload has completed, a valid address will always be returned. After
1648 reload, if a valid address cannot be returned, we return zero.
1650 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1651 it is the responsibility of the caller.
1653 MODE is the mode of OP in case it is a CONST_INT.
1655 ??? This is still rather broken for some cases. The problem for the
1656 moment is that all callers of this thing provide no 'goal mode' to
1657 tell us to work with. This exists because all callers were written
1658 in a word based SUBREG world.
1659 Now use of this function can be deprecated by simplify_subreg in most
1664 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1666 if (mode == VOIDmode)
1667 mode = GET_MODE (op);
1669 if (mode == VOIDmode)
1672 /* If OP is narrower than a word, fail. */
1674 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1677 /* If we want a word outside OP, return zero. */
1679 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1682 /* Form a new MEM at the requested address. */
1683 if (GET_CODE (op) == MEM)
1685 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1687 if (! validate_address)
1690 else if (reload_completed)
1692 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1696 return replace_equiv_address (new, XEXP (new, 0));
1699 /* Rest can be handled by simplify_subreg. */
1700 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1703 /* Similar to `operand_subword', but never return 0. If we can't extract
1704 the required subword, put OP into a register and try again. If that fails,
1705 abort. We always validate the address in this case.
1707 MODE is the mode of OP, in case it is CONST_INT. */
1710 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1712 rtx result = operand_subword (op, offset, 1, mode);
1717 if (mode != BLKmode && mode != VOIDmode)
1719 /* If this is a register which can not be accessed by words, copy it
1720 to a pseudo register. */
1721 if (GET_CODE (op) == REG)
1722 op = copy_to_reg (op);
1724 op = force_reg (mode, op);
1727 result = operand_subword (op, offset, 1, mode);
1734 /* Given a compare instruction, swap the operands.
1735 A test instruction is changed into a compare of 0 against the operand. */
1738 reverse_comparison (rtx insn)
1740 rtx body = PATTERN (insn);
1743 if (GET_CODE (body) == SET)
1744 comp = SET_SRC (body);
1746 comp = SET_SRC (XVECEXP (body, 0, 0));
1748 if (GET_CODE (comp) == COMPARE)
1750 rtx op0 = XEXP (comp, 0);
1751 rtx op1 = XEXP (comp, 1);
1752 XEXP (comp, 0) = op1;
1753 XEXP (comp, 1) = op0;
1757 rtx new = gen_rtx_COMPARE (VOIDmode,
1758 CONST0_RTX (GET_MODE (comp)), comp);
1759 if (GET_CODE (body) == SET)
1760 SET_SRC (body) = new;
1762 SET_SRC (XVECEXP (body, 0, 0)) = new;
1766 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1767 or (2) a component ref of something variable. Represent the later with
1768 a NULL expression. */
1771 component_ref_for_mem_expr (tree ref)
1773 tree inner = TREE_OPERAND (ref, 0);
1775 if (TREE_CODE (inner) == COMPONENT_REF)
1776 inner = component_ref_for_mem_expr (inner);
1779 tree placeholder_ptr = 0;
1781 /* Now remove any conversions: they don't change what the underlying
1782 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1783 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1784 || TREE_CODE (inner) == NON_LVALUE_EXPR
1785 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1786 || TREE_CODE (inner) == SAVE_EXPR
1787 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1788 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1789 inner = find_placeholder (inner, &placeholder_ptr);
1791 inner = TREE_OPERAND (inner, 0);
1793 if (! DECL_P (inner))
1797 if (inner == TREE_OPERAND (ref, 0))
1800 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1801 TREE_OPERAND (ref, 1));
1804 /* Given REF, a MEM, and T, either the type of X or the expression
1805 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1806 if we are making a new object of this type. BITPOS is nonzero if
1807 there is an offset outstanding on T that will be applied later. */
1810 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1811 HOST_WIDE_INT bitpos)
1813 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1814 tree expr = MEM_EXPR (ref);
1815 rtx offset = MEM_OFFSET (ref);
1816 rtx size = MEM_SIZE (ref);
1817 unsigned int align = MEM_ALIGN (ref);
1818 HOST_WIDE_INT apply_bitpos = 0;
1821 /* It can happen that type_for_mode was given a mode for which there
1822 is no language-level type. In which case it returns NULL, which
1827 type = TYPE_P (t) ? t : TREE_TYPE (t);
1829 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1830 wrong answer, as it assumes that DECL_RTL already has the right alias
1831 info. Callers should not set DECL_RTL until after the call to
1832 set_mem_attributes. */
1833 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1836 /* Get the alias set from the expression or type (perhaps using a
1837 front-end routine) and use it. */
1838 alias = get_alias_set (t);
1840 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1841 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1842 RTX_UNCHANGING_P (ref)
1843 |= ((lang_hooks.honor_readonly
1844 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1845 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1847 /* If we are making an object of this type, or if this is a DECL, we know
1848 that it is a scalar if the type is not an aggregate. */
1849 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1850 MEM_SCALAR_P (ref) = 1;
1852 /* We can set the alignment from the type if we are making an object,
1853 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1854 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1855 align = MAX (align, TYPE_ALIGN (type));
1857 /* If the size is known, we can set that. */
1858 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1859 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1861 /* If T is not a type, we may be able to deduce some more information about
1865 maybe_set_unchanging (ref, t);
1866 if (TREE_THIS_VOLATILE (t))
1867 MEM_VOLATILE_P (ref) = 1;
1869 /* Now remove any conversions: they don't change what the underlying
1870 object is. Likewise for SAVE_EXPR. */
1871 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1872 || TREE_CODE (t) == NON_LVALUE_EXPR
1873 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1874 || TREE_CODE (t) == SAVE_EXPR)
1875 t = TREE_OPERAND (t, 0);
1877 /* If this expression can't be addressed (e.g., it contains a reference
1878 to a non-addressable field), show we don't change its alias set. */
1879 if (! can_address_p (t))
1880 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1882 /* If this is a decl, set the attributes of the MEM from it. */
1886 offset = const0_rtx;
1887 apply_bitpos = bitpos;
1888 size = (DECL_SIZE_UNIT (t)
1889 && host_integerp (DECL_SIZE_UNIT (t), 1)
1890 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1891 align = DECL_ALIGN (t);
1894 /* If this is a constant, we know the alignment. */
1895 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1897 align = TYPE_ALIGN (type);
1898 #ifdef CONSTANT_ALIGNMENT
1899 align = CONSTANT_ALIGNMENT (t, align);
1903 /* If this is a field reference and not a bit-field, record it. */
1904 /* ??? There is some information that can be gleened from bit-fields,
1905 such as the word offset in the structure that might be modified.
1906 But skip it for now. */
1907 else if (TREE_CODE (t) == COMPONENT_REF
1908 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1910 expr = component_ref_for_mem_expr (t);
1911 offset = const0_rtx;
1912 apply_bitpos = bitpos;
1913 /* ??? Any reason the field size would be different than
1914 the size we got from the type? */
1917 /* If this is an array reference, look for an outer field reference. */
1918 else if (TREE_CODE (t) == ARRAY_REF)
1920 tree off_tree = size_zero_node;
1921 /* We can't modify t, because we use it at the end of the
1927 tree index = TREE_OPERAND (t2, 1);
1928 tree array = TREE_OPERAND (t2, 0);
1929 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1930 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1931 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1933 /* We assume all arrays have sizes that are a multiple of a byte.
1934 First subtract the lower bound, if any, in the type of the
1935 index, then convert to sizetype and multiply by the size of the
1937 if (low_bound != 0 && ! integer_zerop (low_bound))
1938 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1941 /* If the index has a self-referential type, pass it to a
1942 WITH_RECORD_EXPR; if the component size is, pass our
1943 component to one. */
1944 if (CONTAINS_PLACEHOLDER_P (index))
1945 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1946 if (CONTAINS_PLACEHOLDER_P (unit_size))
1947 unit_size = build (WITH_RECORD_EXPR, sizetype,
1951 = fold (build (PLUS_EXPR, sizetype,
1952 fold (build (MULT_EXPR, sizetype,
1956 t2 = TREE_OPERAND (t2, 0);
1958 while (TREE_CODE (t2) == ARRAY_REF);
1964 if (host_integerp (off_tree, 1))
1966 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1967 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1968 align = DECL_ALIGN (t2);
1969 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1971 offset = GEN_INT (ioff);
1972 apply_bitpos = bitpos;
1975 else if (TREE_CODE (t2) == COMPONENT_REF)
1977 expr = component_ref_for_mem_expr (t2);
1978 if (host_integerp (off_tree, 1))
1980 offset = GEN_INT (tree_low_cst (off_tree, 1));
1981 apply_bitpos = bitpos;
1983 /* ??? Any reason the field size would be different than
1984 the size we got from the type? */
1986 else if (flag_argument_noalias > 1
1987 && TREE_CODE (t2) == INDIRECT_REF
1988 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1995 /* If this is a Fortran indirect argument reference, record the
1997 else if (flag_argument_noalias > 1
1998 && TREE_CODE (t) == INDIRECT_REF
1999 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
2006 /* If we modified OFFSET based on T, then subtract the outstanding
2007 bit position offset. Similarly, increase the size of the accessed
2008 object to contain the negative offset. */
2011 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
2013 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
2016 /* Now set the attributes we computed above. */
2018 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
2020 /* If this is already known to be a scalar or aggregate, we are done. */
2021 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
2024 /* If it is a reference into an aggregate, this is part of an aggregate.
2025 Otherwise we don't know. */
2026 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
2027 || TREE_CODE (t) == ARRAY_RANGE_REF
2028 || TREE_CODE (t) == BIT_FIELD_REF)
2029 MEM_IN_STRUCT_P (ref) = 1;
2033 set_mem_attributes (rtx ref, tree t, int objectp)
2035 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2038 /* Set the decl for MEM to DECL. */
2041 set_mem_attrs_from_reg (rtx mem, rtx reg)
2044 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
2045 GEN_INT (REG_OFFSET (reg)),
2046 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2049 /* Set the alias set of MEM to SET. */
2052 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
2054 #ifdef ENABLE_CHECKING
2055 /* If the new and old alias sets don't conflict, something is wrong. */
2056 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
2060 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
2061 MEM_SIZE (mem), MEM_ALIGN (mem),
2065 /* Set the alignment of MEM to ALIGN bits. */
2068 set_mem_align (rtx mem, unsigned int align)
2070 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2071 MEM_OFFSET (mem), MEM_SIZE (mem), align,
2075 /* Set the expr for MEM to EXPR. */
2078 set_mem_expr (rtx mem, tree expr)
2081 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
2082 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2085 /* Set the offset of MEM to OFFSET. */
2088 set_mem_offset (rtx mem, rtx offset)
2090 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2091 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
2095 /* Set the size of MEM to SIZE. */
2098 set_mem_size (rtx mem, rtx size)
2100 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2101 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
2105 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2106 and its address changed to ADDR. (VOIDmode means don't change the mode.
2107 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2108 returned memory location is required to be valid. The memory
2109 attributes are not changed. */
2112 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
2116 if (GET_CODE (memref) != MEM)
2118 if (mode == VOIDmode)
2119 mode = GET_MODE (memref);
2121 addr = XEXP (memref, 0);
2125 if (reload_in_progress || reload_completed)
2127 if (! memory_address_p (mode, addr))
2131 addr = memory_address (mode, addr);
2134 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2137 new = gen_rtx_MEM (mode, addr);
2138 MEM_COPY_ATTRIBUTES (new, memref);
2142 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2143 way we are changing MEMREF, so we only preserve the alias set. */
2146 change_address (rtx memref, enum machine_mode mode, rtx addr)
2148 rtx new = change_address_1 (memref, mode, addr, 1);
2149 enum machine_mode mmode = GET_MODE (new);
2152 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2153 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2154 (mmode == BLKmode ? BITS_PER_UNIT
2155 : GET_MODE_ALIGNMENT (mmode)),
2161 /* Return a memory reference like MEMREF, but with its mode changed
2162 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2163 nonzero, the memory address is forced to be valid.
2164 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2165 and caller is responsible for adjusting MEMREF base register. */
2168 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2169 int validate, int adjust)
2171 rtx addr = XEXP (memref, 0);
2173 rtx memoffset = MEM_OFFSET (memref);
2175 unsigned int memalign = MEM_ALIGN (memref);
2177 /* ??? Prefer to create garbage instead of creating shared rtl.
2178 This may happen even if offset is nonzero -- consider
2179 (plus (plus reg reg) const_int) -- so do this always. */
2180 addr = copy_rtx (addr);
2184 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2185 object, we can merge it into the LO_SUM. */
2186 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2188 && (unsigned HOST_WIDE_INT) offset
2189 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2190 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2191 plus_constant (XEXP (addr, 1), offset));
2193 addr = plus_constant (addr, offset);
2196 new = change_address_1 (memref, mode, addr, validate);
2198 /* Compute the new values of the memory attributes due to this adjustment.
2199 We add the offsets and update the alignment. */
2201 memoffset = GEN_INT (offset + INTVAL (memoffset));
2203 /* Compute the new alignment by taking the MIN of the alignment and the
2204 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2209 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2211 /* We can compute the size in a number of ways. */
2212 if (GET_MODE (new) != BLKmode)
2213 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2214 else if (MEM_SIZE (memref))
2215 size = plus_constant (MEM_SIZE (memref), -offset);
2217 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2218 memoffset, size, memalign, GET_MODE (new));
2220 /* At some point, we should validate that this offset is within the object,
2221 if all the appropriate values are known. */
2225 /* Return a memory reference like MEMREF, but with its mode changed
2226 to MODE and its address changed to ADDR, which is assumed to be
2227 MEMREF offseted by OFFSET bytes. If VALIDATE is
2228 nonzero, the memory address is forced to be valid. */
2231 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2232 HOST_WIDE_INT offset, int validate)
2234 memref = change_address_1 (memref, VOIDmode, addr, validate);
2235 return adjust_address_1 (memref, mode, offset, validate, 0);
2238 /* Return a memory reference like MEMREF, but whose address is changed by
2239 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2240 known to be in OFFSET (possibly 1). */
2243 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2245 rtx new, addr = XEXP (memref, 0);
2247 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2249 /* At this point we don't know _why_ the address is invalid. It
2250 could have secondary memory references, multiplies or anything.
2252 However, if we did go and rearrange things, we can wind up not
2253 being able to recognize the magic around pic_offset_table_rtx.
2254 This stuff is fragile, and is yet another example of why it is
2255 bad to expose PIC machinery too early. */
2256 if (! memory_address_p (GET_MODE (memref), new)
2257 && GET_CODE (addr) == PLUS
2258 && XEXP (addr, 0) == pic_offset_table_rtx)
2260 addr = force_reg (GET_MODE (addr), addr);
2261 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2264 update_temp_slot_address (XEXP (memref, 0), new);
2265 new = change_address_1 (memref, VOIDmode, new, 1);
2267 /* Update the alignment to reflect the offset. Reset the offset, which
2270 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2271 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2276 /* Return a memory reference like MEMREF, but with its address changed to
2277 ADDR. The caller is asserting that the actual piece of memory pointed
2278 to is the same, just the form of the address is being changed, such as
2279 by putting something into a register. */
2282 replace_equiv_address (rtx memref, rtx addr)
2284 /* change_address_1 copies the memory attribute structure without change
2285 and that's exactly what we want here. */
2286 update_temp_slot_address (XEXP (memref, 0), addr);
2287 return change_address_1 (memref, VOIDmode, addr, 1);
2290 /* Likewise, but the reference is not required to be valid. */
2293 replace_equiv_address_nv (rtx memref, rtx addr)
2295 return change_address_1 (memref, VOIDmode, addr, 0);
2298 /* Return a memory reference like MEMREF, but with its mode widened to
2299 MODE and offset by OFFSET. This would be used by targets that e.g.
2300 cannot issue QImode memory operations and have to use SImode memory
2301 operations plus masking logic. */
2304 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2306 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2307 tree expr = MEM_EXPR (new);
2308 rtx memoffset = MEM_OFFSET (new);
2309 unsigned int size = GET_MODE_SIZE (mode);
2311 /* If we don't know what offset we were at within the expression, then
2312 we can't know if we've overstepped the bounds. */
2318 if (TREE_CODE (expr) == COMPONENT_REF)
2320 tree field = TREE_OPERAND (expr, 1);
2322 if (! DECL_SIZE_UNIT (field))
2328 /* Is the field at least as large as the access? If so, ok,
2329 otherwise strip back to the containing structure. */
2330 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2331 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2332 && INTVAL (memoffset) >= 0)
2335 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2341 expr = TREE_OPERAND (expr, 0);
2342 memoffset = (GEN_INT (INTVAL (memoffset)
2343 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2344 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2347 /* Similarly for the decl. */
2348 else if (DECL_P (expr)
2349 && DECL_SIZE_UNIT (expr)
2350 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2351 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2352 && (! memoffset || INTVAL (memoffset) >= 0))
2356 /* The widened memory access overflows the expression, which means
2357 that it could alias another expression. Zap it. */
2364 memoffset = NULL_RTX;
2366 /* The widened memory may alias other stuff, so zap the alias set. */
2367 /* ??? Maybe use get_alias_set on any remaining expression. */
2369 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2370 MEM_ALIGN (new), mode);
2375 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2378 gen_label_rtx (void)
2380 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2381 NULL, label_num++, NULL);
2384 /* For procedure integration. */
2386 /* Install new pointers to the first and last insns in the chain.
2387 Also, set cur_insn_uid to one higher than the last in use.
2388 Used for an inline-procedure after copying the insn chain. */
2391 set_new_first_and_last_insn (rtx first, rtx last)
2399 for (insn = first; insn; insn = NEXT_INSN (insn))
2400 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2405 /* Set the range of label numbers found in the current function.
2406 This is used when belatedly compiling an inline function. */
2409 set_new_first_and_last_label_num (int first, int last)
2411 base_label_num = label_num;
2412 first_label_num = first;
2413 last_label_num = last;
2416 /* Set the last label number found in the current function.
2417 This is used when belatedly compiling an inline function. */
2420 set_new_last_label_num (int last)
2422 base_label_num = label_num;
2423 last_label_num = last;
2426 /* Restore all variables describing the current status from the structure *P.
2427 This is used after a nested function. */
2430 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2435 /* Go through all the RTL insn bodies and copy any invalid shared
2436 structure. This routine should only be called once. */
2439 unshare_all_rtl (tree fndecl, rtx insn)
2443 /* Make sure that virtual parameters are not shared. */
2444 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2445 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2447 /* Make sure that virtual stack slots are not shared. */
2448 unshare_all_decls (DECL_INITIAL (fndecl));
2450 /* Unshare just about everything else. */
2451 unshare_all_rtl_1 (insn);
2453 /* Make sure the addresses of stack slots found outside the insn chain
2454 (such as, in DECL_RTL of a variable) are not shared
2455 with the insn chain.
2457 This special care is necessary when the stack slot MEM does not
2458 actually appear in the insn chain. If it does appear, its address
2459 is unshared from all else at that point. */
2460 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2463 /* Go through all the RTL insn bodies and copy any invalid shared
2464 structure, again. This is a fairly expensive thing to do so it
2465 should be done sparingly. */
2468 unshare_all_rtl_again (rtx insn)
2473 for (p = insn; p; p = NEXT_INSN (p))
2476 reset_used_flags (PATTERN (p));
2477 reset_used_flags (REG_NOTES (p));
2478 reset_used_flags (LOG_LINKS (p));
2481 /* Make sure that virtual stack slots are not shared. */
2482 reset_used_decls (DECL_INITIAL (cfun->decl));
2484 /* Make sure that virtual parameters are not shared. */
2485 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2486 reset_used_flags (DECL_RTL (decl));
2488 reset_used_flags (stack_slot_list);
2490 unshare_all_rtl (cfun->decl, insn);
2493 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2494 Assumes the mark bits are cleared at entry. */
2497 unshare_all_rtl_1 (rtx insn)
2499 for (; insn; insn = NEXT_INSN (insn))
2502 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2503 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2504 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2508 /* Go through all virtual stack slots of a function and copy any
2509 shared structure. */
2511 unshare_all_decls (tree blk)
2515 /* Copy shared decls. */
2516 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2517 if (DECL_RTL_SET_P (t))
2518 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2520 /* Now process sub-blocks. */
2521 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2522 unshare_all_decls (t);
2525 /* Go through all virtual stack slots of a function and mark them as
2528 reset_used_decls (tree blk)
2533 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2534 if (DECL_RTL_SET_P (t))
2535 reset_used_flags (DECL_RTL (t));
2537 /* Now process sub-blocks. */
2538 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2539 reset_used_decls (t);
2542 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2543 placed in the result directly, rather than being copied. MAY_SHARE is
2544 either a MEM of an EXPR_LIST of MEMs. */
2547 copy_most_rtx (rtx orig, rtx may_share)
2552 const char *format_ptr;
2554 if (orig == may_share
2555 || (GET_CODE (may_share) == EXPR_LIST
2556 && in_expr_list_p (may_share, orig)))
2559 code = GET_CODE (orig);
2577 copy = rtx_alloc (code);
2578 PUT_MODE (copy, GET_MODE (orig));
2579 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2580 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2581 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2582 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2583 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2585 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2587 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2589 switch (*format_ptr++)
2592 XEXP (copy, i) = XEXP (orig, i);
2593 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2594 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2598 XEXP (copy, i) = XEXP (orig, i);
2603 XVEC (copy, i) = XVEC (orig, i);
2604 if (XVEC (orig, i) != NULL)
2606 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2607 for (j = 0; j < XVECLEN (copy, i); j++)
2608 XVECEXP (copy, i, j)
2609 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2614 XWINT (copy, i) = XWINT (orig, i);
2619 XINT (copy, i) = XINT (orig, i);
2623 XTREE (copy, i) = XTREE (orig, i);
2628 XSTR (copy, i) = XSTR (orig, i);
2632 /* Copy this through the wide int field; that's safest. */
2633 X0WINT (copy, i) = X0WINT (orig, i);
2643 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2644 Recursively does the same for subexpressions. */
2647 copy_rtx_if_shared (rtx orig)
2652 const char *format_ptr;
2658 code = GET_CODE (x);
2660 /* These types may be freely shared. */
2674 /* SCRATCH must be shared because they represent distinct values. */
2678 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2679 a LABEL_REF, it isn't sharable. */
2680 if (GET_CODE (XEXP (x, 0)) == PLUS
2681 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2682 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2691 /* The chain of insns is not being copied. */
2695 /* A MEM is allowed to be shared if its address is constant.
2697 We used to allow sharing of MEMs which referenced
2698 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2699 that can lose. instantiate_virtual_regs will not unshare
2700 the MEMs, and combine may change the structure of the address
2701 because it looks safe and profitable in one context, but
2702 in some other context it creates unrecognizable RTL. */
2703 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2712 /* This rtx may not be shared. If it has already been seen,
2713 replace it with a copy of itself. */
2715 if (RTX_FLAG (x, used))
2719 copy = rtx_alloc (code);
2721 (sizeof (*copy) - sizeof (copy->fld)
2722 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2726 RTX_FLAG (x, used) = 1;
2728 /* Now scan the subexpressions recursively.
2729 We can store any replaced subexpressions directly into X
2730 since we know X is not shared! Any vectors in X
2731 must be copied if X was copied. */
2733 format_ptr = GET_RTX_FORMAT (code);
2735 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2737 switch (*format_ptr++)
2740 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2744 if (XVEC (x, i) != NULL)
2747 int len = XVECLEN (x, i);
2749 if (copied && len > 0)
2750 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2751 for (j = 0; j < len; j++)
2752 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2760 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2761 to look for shared sub-parts. */
2764 reset_used_flags (rtx x)
2768 const char *format_ptr;
2773 code = GET_CODE (x);
2775 /* These types may be freely shared so we needn't do any resetting
2797 /* The chain of insns is not being copied. */
2804 RTX_FLAG (x, used) = 0;
2806 format_ptr = GET_RTX_FORMAT (code);
2807 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2809 switch (*format_ptr++)
2812 reset_used_flags (XEXP (x, i));
2816 for (j = 0; j < XVECLEN (x, i); j++)
2817 reset_used_flags (XVECEXP (x, i, j));
2823 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2824 Return X or the rtx for the pseudo reg the value of X was copied into.
2825 OTHER must be valid as a SET_DEST. */
2828 make_safe_from (rtx x, rtx other)
2831 switch (GET_CODE (other))
2834 other = SUBREG_REG (other);
2836 case STRICT_LOW_PART:
2839 other = XEXP (other, 0);
2845 if ((GET_CODE (other) == MEM
2847 && GET_CODE (x) != REG
2848 && GET_CODE (x) != SUBREG)
2849 || (GET_CODE (other) == REG
2850 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2851 || reg_mentioned_p (other, x))))
2853 rtx temp = gen_reg_rtx (GET_MODE (x));
2854 emit_move_insn (temp, x);
2860 /* Emission of insns (adding them to the doubly-linked list). */
2862 /* Return the first insn of the current sequence or current function. */
2870 /* Specify a new insn as the first in the chain. */
2873 set_first_insn (rtx insn)
2875 if (PREV_INSN (insn) != 0)
2880 /* Return the last insn emitted in current sequence or current function. */
2883 get_last_insn (void)
2888 /* Specify a new insn as the last in the chain. */
2891 set_last_insn (rtx insn)
2893 if (NEXT_INSN (insn) != 0)
2898 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2901 get_last_insn_anywhere (void)
2903 struct sequence_stack *stack;
2906 for (stack = seq_stack; stack; stack = stack->next)
2907 if (stack->last != 0)
2912 /* Return the first nonnote insn emitted in current sequence or current
2913 function. This routine looks inside SEQUENCEs. */
2916 get_first_nonnote_insn (void)
2918 rtx insn = first_insn;
2922 insn = next_insn (insn);
2923 if (insn == 0 || GET_CODE (insn) != NOTE)
2930 /* Return the last nonnote insn emitted in current sequence or current
2931 function. This routine looks inside SEQUENCEs. */
2934 get_last_nonnote_insn (void)
2936 rtx insn = last_insn;
2940 insn = previous_insn (insn);
2941 if (insn == 0 || GET_CODE (insn) != NOTE)
2948 /* Return a number larger than any instruction's uid in this function. */
2953 return cur_insn_uid;
2956 /* Renumber instructions so that no instruction UIDs are wasted. */
2959 renumber_insns (FILE *stream)
2963 /* If we're not supposed to renumber instructions, don't. */
2964 if (!flag_renumber_insns)
2967 /* If there aren't that many instructions, then it's not really
2968 worth renumbering them. */
2969 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2974 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2977 fprintf (stream, "Renumbering insn %d to %d\n",
2978 INSN_UID (insn), cur_insn_uid);
2979 INSN_UID (insn) = cur_insn_uid++;
2983 /* Return the next insn. If it is a SEQUENCE, return the first insn
2987 next_insn (rtx insn)
2991 insn = NEXT_INSN (insn);
2992 if (insn && GET_CODE (insn) == INSN
2993 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2994 insn = XVECEXP (PATTERN (insn), 0, 0);
3000 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3004 previous_insn (rtx insn)
3008 insn = PREV_INSN (insn);
3009 if (insn && GET_CODE (insn) == INSN
3010 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3011 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3017 /* Return the next insn after INSN that is not a NOTE. This routine does not
3018 look inside SEQUENCEs. */
3021 next_nonnote_insn (rtx insn)
3025 insn = NEXT_INSN (insn);
3026 if (insn == 0 || GET_CODE (insn) != NOTE)
3033 /* Return the previous insn before INSN that is not a NOTE. This routine does
3034 not look inside SEQUENCEs. */
3037 prev_nonnote_insn (rtx insn)
3041 insn = PREV_INSN (insn);
3042 if (insn == 0 || GET_CODE (insn) != NOTE)
3049 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3050 or 0, if there is none. This routine does not look inside
3054 next_real_insn (rtx insn)
3058 insn = NEXT_INSN (insn);
3059 if (insn == 0 || GET_CODE (insn) == INSN
3060 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3067 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3068 or 0, if there is none. This routine does not look inside
3072 prev_real_insn (rtx insn)
3076 insn = PREV_INSN (insn);
3077 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3078 || GET_CODE (insn) == JUMP_INSN)
3085 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3086 This routine does not look inside SEQUENCEs. */
3089 last_call_insn (void)
3093 for (insn = get_last_insn ();
3094 insn && GET_CODE (insn) != CALL_INSN;
3095 insn = PREV_INSN (insn))
3101 /* Find the next insn after INSN that really does something. This routine
3102 does not look inside SEQUENCEs. Until reload has completed, this is the
3103 same as next_real_insn. */
3106 active_insn_p (rtx insn)
3108 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3109 || (GET_CODE (insn) == INSN
3110 && (! reload_completed
3111 || (GET_CODE (PATTERN (insn)) != USE
3112 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3116 next_active_insn (rtx insn)
3120 insn = NEXT_INSN (insn);
3121 if (insn == 0 || active_insn_p (insn))
3128 /* Find the last insn before INSN that really does something. This routine
3129 does not look inside SEQUENCEs. Until reload has completed, this is the
3130 same as prev_real_insn. */
3133 prev_active_insn (rtx insn)
3137 insn = PREV_INSN (insn);
3138 if (insn == 0 || active_insn_p (insn))
3145 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3148 next_label (rtx insn)
3152 insn = NEXT_INSN (insn);
3153 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3160 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3163 prev_label (rtx insn)
3167 insn = PREV_INSN (insn);
3168 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3176 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3177 and REG_CC_USER notes so we can find it. */
3180 link_cc0_insns (rtx insn)
3182 rtx user = next_nonnote_insn (insn);
3184 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3185 user = XVECEXP (PATTERN (user), 0, 0);
3187 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3189 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3192 /* Return the next insn that uses CC0 after INSN, which is assumed to
3193 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3194 applied to the result of this function should yield INSN).
3196 Normally, this is simply the next insn. However, if a REG_CC_USER note
3197 is present, it contains the insn that uses CC0.
3199 Return 0 if we can't find the insn. */
3202 next_cc0_user (rtx insn)
3204 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3207 return XEXP (note, 0);
3209 insn = next_nonnote_insn (insn);
3210 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3211 insn = XVECEXP (PATTERN (insn), 0, 0);
3213 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3219 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3220 note, it is the previous insn. */
3223 prev_cc0_setter (rtx insn)
3225 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3228 return XEXP (note, 0);
3230 insn = prev_nonnote_insn (insn);
3231 if (! sets_cc0_p (PATTERN (insn)))
3238 /* Increment the label uses for all labels present in rtx. */
3241 mark_label_nuses (rtx x)
3247 code = GET_CODE (x);
3248 if (code == LABEL_REF)
3249 LABEL_NUSES (XEXP (x, 0))++;
3251 fmt = GET_RTX_FORMAT (code);
3252 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3255 mark_label_nuses (XEXP (x, i));
3256 else if (fmt[i] == 'E')
3257 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3258 mark_label_nuses (XVECEXP (x, i, j));
3263 /* Try splitting insns that can be split for better scheduling.
3264 PAT is the pattern which might split.
3265 TRIAL is the insn providing PAT.
3266 LAST is nonzero if we should return the last insn of the sequence produced.
3268 If this routine succeeds in splitting, it returns the first or last
3269 replacement insn depending on the value of LAST. Otherwise, it
3270 returns TRIAL. If the insn to be returned can be split, it will be. */
3273 try_split (rtx pat, rtx trial, int last)
3275 rtx before = PREV_INSN (trial);
3276 rtx after = NEXT_INSN (trial);
3277 int has_barrier = 0;
3281 rtx insn_last, insn;
3284 if (any_condjump_p (trial)
3285 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3286 split_branch_probability = INTVAL (XEXP (note, 0));
3287 probability = split_branch_probability;
3289 seq = split_insns (pat, trial);
3291 split_branch_probability = -1;
3293 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3294 We may need to handle this specially. */
3295 if (after && GET_CODE (after) == BARRIER)
3298 after = NEXT_INSN (after);
3304 /* Avoid infinite loop if any insn of the result matches
3305 the original pattern. */
3309 if (INSN_P (insn_last)
3310 && rtx_equal_p (PATTERN (insn_last), pat))
3312 if (!NEXT_INSN (insn_last))
3314 insn_last = NEXT_INSN (insn_last);
3318 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3320 if (GET_CODE (insn) == JUMP_INSN)
3322 mark_jump_label (PATTERN (insn), insn, 0);
3324 if (probability != -1
3325 && any_condjump_p (insn)
3326 && !find_reg_note (insn, REG_BR_PROB, 0))
3328 /* We can preserve the REG_BR_PROB notes only if exactly
3329 one jump is created, otherwise the machine description
3330 is responsible for this step using
3331 split_branch_probability variable. */
3335 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3336 GEN_INT (probability),
3342 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3343 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3344 if (GET_CODE (trial) == CALL_INSN)
3346 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3347 if (GET_CODE (insn) == CALL_INSN)
3349 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3352 *p = CALL_INSN_FUNCTION_USAGE (trial);
3353 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3357 /* Copy notes, particularly those related to the CFG. */
3358 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3360 switch (REG_NOTE_KIND (note))
3364 while (insn != NULL_RTX)
3366 if (GET_CODE (insn) == CALL_INSN
3367 || (flag_non_call_exceptions
3368 && may_trap_p (PATTERN (insn))))
3370 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3373 insn = PREV_INSN (insn);
3379 case REG_ALWAYS_RETURN:
3381 while (insn != NULL_RTX)
3383 if (GET_CODE (insn) == CALL_INSN)
3385 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3388 insn = PREV_INSN (insn);
3392 case REG_NON_LOCAL_GOTO:
3394 while (insn != NULL_RTX)
3396 if (GET_CODE (insn) == JUMP_INSN)
3398 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3401 insn = PREV_INSN (insn);
3410 /* If there are LABELS inside the split insns increment the
3411 usage count so we don't delete the label. */
3412 if (GET_CODE (trial) == INSN)
3415 while (insn != NULL_RTX)
3417 if (GET_CODE (insn) == INSN)
3418 mark_label_nuses (PATTERN (insn));
3420 insn = PREV_INSN (insn);
3424 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3426 delete_insn (trial);
3428 emit_barrier_after (tem);
3430 /* Recursively call try_split for each new insn created; by the
3431 time control returns here that insn will be fully split, so
3432 set LAST and continue from the insn after the one returned.
3433 We can't use next_active_insn here since AFTER may be a note.
3434 Ignore deleted insns, which can be occur if not optimizing. */
3435 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3436 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3437 tem = try_split (PATTERN (tem), tem, 1);
3439 /* Return either the first or the last insn, depending on which was
3442 ? (after ? PREV_INSN (after) : last_insn)
3443 : NEXT_INSN (before);
3446 /* Make and return an INSN rtx, initializing all its slots.
3447 Store PATTERN in the pattern slots. */
3450 make_insn_raw (rtx pattern)
3454 insn = rtx_alloc (INSN);
3456 INSN_UID (insn) = cur_insn_uid++;
3457 PATTERN (insn) = pattern;
3458 INSN_CODE (insn) = -1;
3459 LOG_LINKS (insn) = NULL;
3460 REG_NOTES (insn) = NULL;
3461 INSN_LOCATOR (insn) = 0;
3462 BLOCK_FOR_INSN (insn) = NULL;
3464 #ifdef ENABLE_RTL_CHECKING
3467 && (returnjump_p (insn)
3468 || (GET_CODE (insn) == SET
3469 && SET_DEST (insn) == pc_rtx)))
3471 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3479 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3482 make_jump_insn_raw (rtx pattern)
3486 insn = rtx_alloc (JUMP_INSN);
3487 INSN_UID (insn) = cur_insn_uid++;
3489 PATTERN (insn) = pattern;
3490 INSN_CODE (insn) = -1;
3491 LOG_LINKS (insn) = NULL;
3492 REG_NOTES (insn) = NULL;
3493 JUMP_LABEL (insn) = NULL;
3494 INSN_LOCATOR (insn) = 0;
3495 BLOCK_FOR_INSN (insn) = NULL;
3500 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3503 make_call_insn_raw (rtx pattern)
3507 insn = rtx_alloc (CALL_INSN);
3508 INSN_UID (insn) = cur_insn_uid++;
3510 PATTERN (insn) = pattern;
3511 INSN_CODE (insn) = -1;
3512 LOG_LINKS (insn) = NULL;
3513 REG_NOTES (insn) = NULL;
3514 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3515 INSN_LOCATOR (insn) = 0;
3516 BLOCK_FOR_INSN (insn) = NULL;
3521 /* Add INSN to the end of the doubly-linked list.
3522 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3527 PREV_INSN (insn) = last_insn;
3528 NEXT_INSN (insn) = 0;
3530 if (NULL != last_insn)
3531 NEXT_INSN (last_insn) = insn;
3533 if (NULL == first_insn)
3539 /* Add INSN into the doubly-linked list after insn AFTER. This and
3540 the next should be the only functions called to insert an insn once
3541 delay slots have been filled since only they know how to update a
3545 add_insn_after (rtx insn, rtx after)
3547 rtx next = NEXT_INSN (after);
3550 if (optimize && INSN_DELETED_P (after))
3553 NEXT_INSN (insn) = next;
3554 PREV_INSN (insn) = after;
3558 PREV_INSN (next) = insn;
3559 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3560 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3562 else if (last_insn == after)
3566 struct sequence_stack *stack = seq_stack;
3567 /* Scan all pending sequences too. */
3568 for (; stack; stack = stack->next)
3569 if (after == stack->last)
3579 if (GET_CODE (after) != BARRIER
3580 && GET_CODE (insn) != BARRIER
3581 && (bb = BLOCK_FOR_INSN (after)))
3583 set_block_for_insn (insn, bb);
3585 bb->flags |= BB_DIRTY;
3586 /* Should not happen as first in the BB is always
3587 either NOTE or LABEL. */
3588 if (bb->end == after
3589 /* Avoid clobbering of structure when creating new BB. */
3590 && GET_CODE (insn) != BARRIER
3591 && (GET_CODE (insn) != NOTE
3592 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3596 NEXT_INSN (after) = insn;
3597 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3599 rtx sequence = PATTERN (after);
3600 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3604 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3605 the previous should be the only functions called to insert an insn once
3606 delay slots have been filled since only they know how to update a
3610 add_insn_before (rtx insn, rtx before)
3612 rtx prev = PREV_INSN (before);
3615 if (optimize && INSN_DELETED_P (before))
3618 PREV_INSN (insn) = prev;
3619 NEXT_INSN (insn) = before;
3623 NEXT_INSN (prev) = insn;
3624 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3626 rtx sequence = PATTERN (prev);
3627 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3630 else if (first_insn == before)
3634 struct sequence_stack *stack = seq_stack;
3635 /* Scan all pending sequences too. */
3636 for (; stack; stack = stack->next)
3637 if (before == stack->first)
3639 stack->first = insn;
3647 if (GET_CODE (before) != BARRIER
3648 && GET_CODE (insn) != BARRIER
3649 && (bb = BLOCK_FOR_INSN (before)))
3651 set_block_for_insn (insn, bb);
3653 bb->flags |= BB_DIRTY;
3654 /* Should not happen as first in the BB is always
3655 either NOTE or LABEl. */
3656 if (bb->head == insn
3657 /* Avoid clobbering of structure when creating new BB. */
3658 && GET_CODE (insn) != BARRIER
3659 && (GET_CODE (insn) != NOTE
3660 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3664 PREV_INSN (before) = insn;
3665 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3666 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3669 /* Remove an insn from its doubly-linked list. This function knows how
3670 to handle sequences. */
3672 remove_insn (rtx insn)
3674 rtx next = NEXT_INSN (insn);
3675 rtx prev = PREV_INSN (insn);
3680 NEXT_INSN (prev) = next;
3681 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3683 rtx sequence = PATTERN (prev);
3684 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3687 else if (first_insn == insn)
3691 struct sequence_stack *stack = seq_stack;
3692 /* Scan all pending sequences too. */
3693 for (; stack; stack = stack->next)
3694 if (insn == stack->first)
3696 stack->first = next;
3706 PREV_INSN (next) = prev;
3707 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3708 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3710 else if (last_insn == insn)
3714 struct sequence_stack *stack = seq_stack;
3715 /* Scan all pending sequences too. */
3716 for (; stack; stack = stack->next)
3717 if (insn == stack->last)
3726 if (GET_CODE (insn) != BARRIER
3727 && (bb = BLOCK_FOR_INSN (insn)))
3730 bb->flags |= BB_DIRTY;
3731 if (bb->head == insn)
3733 /* Never ever delete the basic block note without deleting whole
3735 if (GET_CODE (insn) == NOTE)
3739 if (bb->end == insn)
3744 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3747 add_function_usage_to (rtx call_insn, rtx call_fusage)
3749 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3752 /* Put the register usage information on the CALL. If there is already
3753 some usage information, put ours at the end. */
3754 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3758 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3759 link = XEXP (link, 1))
3762 XEXP (link, 1) = call_fusage;
3765 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3768 /* Delete all insns made since FROM.
3769 FROM becomes the new last instruction. */
3772 delete_insns_since (rtx from)
3777 NEXT_INSN (from) = 0;
3781 /* This function is deprecated, please use sequences instead.
3783 Move a consecutive bunch of insns to a different place in the chain.
3784 The insns to be moved are those between FROM and TO.
3785 They are moved to a new position after the insn AFTER.
3786 AFTER must not be FROM or TO or any insn in between.
3788 This function does not know about SEQUENCEs and hence should not be
3789 called after delay-slot filling has been done. */
3792 reorder_insns_nobb (rtx from, rtx to, rtx after)
3794 /* Splice this bunch out of where it is now. */
3795 if (PREV_INSN (from))
3796 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3798 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3799 if (last_insn == to)
3800 last_insn = PREV_INSN (from);
3801 if (first_insn == from)
3802 first_insn = NEXT_INSN (to);
3804 /* Make the new neighbors point to it and it to them. */
3805 if (NEXT_INSN (after))
3806 PREV_INSN (NEXT_INSN (after)) = to;
3808 NEXT_INSN (to) = NEXT_INSN (after);
3809 PREV_INSN (from) = after;
3810 NEXT_INSN (after) = from;
3811 if (after == last_insn)
3815 /* Same as function above, but take care to update BB boundaries. */
3817 reorder_insns (rtx from, rtx to, rtx after)
3819 rtx prev = PREV_INSN (from);
3820 basic_block bb, bb2;
3822 reorder_insns_nobb (from, to, after);
3824 if (GET_CODE (after) != BARRIER
3825 && (bb = BLOCK_FOR_INSN (after)))
3828 bb->flags |= BB_DIRTY;
3830 if (GET_CODE (from) != BARRIER
3831 && (bb2 = BLOCK_FOR_INSN (from)))
3835 bb2->flags |= BB_DIRTY;
3838 if (bb->end == after)
3841 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3842 set_block_for_insn (x, bb);
3846 /* Return the line note insn preceding INSN. */
3849 find_line_note (rtx insn)
3851 if (no_line_numbers)
3854 for (; insn; insn = PREV_INSN (insn))
3855 if (GET_CODE (insn) == NOTE
3856 && NOTE_LINE_NUMBER (insn) >= 0)
3862 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3863 of the moved insns when debugging. This may insert a note between AFTER
3864 and FROM, and another one after TO. */
3867 reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
3869 rtx from_line = find_line_note (from);
3870 rtx after_line = find_line_note (after);
3872 reorder_insns (from, to, after);
3874 if (from_line == after_line)
3878 emit_note_copy_after (from_line, after);
3880 emit_note_copy_after (after_line, to);
3883 /* Remove unnecessary notes from the instruction stream. */
3886 remove_unnecessary_notes (void)
3888 rtx block_stack = NULL_RTX;
3889 rtx eh_stack = NULL_RTX;
3894 /* We must not remove the first instruction in the function because
3895 the compiler depends on the first instruction being a note. */
3896 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3898 /* Remember what's next. */
3899 next = NEXT_INSN (insn);
3901 /* We're only interested in notes. */
3902 if (GET_CODE (insn) != NOTE)
3905 switch (NOTE_LINE_NUMBER (insn))
3907 case NOTE_INSN_DELETED:
3908 case NOTE_INSN_LOOP_END_TOP_COND:
3912 case NOTE_INSN_EH_REGION_BEG:
3913 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3916 case NOTE_INSN_EH_REGION_END:
3917 /* Too many end notes. */
3918 if (eh_stack == NULL_RTX)
3920 /* Mismatched nesting. */
3921 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3924 eh_stack = XEXP (eh_stack, 1);
3925 free_INSN_LIST_node (tmp);
3928 case NOTE_INSN_BLOCK_BEG:
3929 /* By now, all notes indicating lexical blocks should have
3930 NOTE_BLOCK filled in. */
3931 if (NOTE_BLOCK (insn) == NULL_TREE)
3933 block_stack = alloc_INSN_LIST (insn, block_stack);
3936 case NOTE_INSN_BLOCK_END:
3937 /* Too many end notes. */
3938 if (block_stack == NULL_RTX)
3940 /* Mismatched nesting. */
3941 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3944 block_stack = XEXP (block_stack, 1);
3945 free_INSN_LIST_node (tmp);
3947 /* Scan back to see if there are any non-note instructions
3948 between INSN and the beginning of this block. If not,
3949 then there is no PC range in the generated code that will
3950 actually be in this block, so there's no point in
3951 remembering the existence of the block. */
3952 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3954 /* This block contains a real instruction. Note that we
3955 don't include labels; if the only thing in the block
3956 is a label, then there are still no PC values that
3957 lie within the block. */
3961 /* We're only interested in NOTEs. */
3962 if (GET_CODE (tmp) != NOTE)
3965 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3967 /* We just verified that this BLOCK matches us with
3968 the block_stack check above. Never delete the
3969 BLOCK for the outermost scope of the function; we
3970 can refer to names from that scope even if the
3971 block notes are messed up. */
3972 if (! is_body_block (NOTE_BLOCK (insn))
3973 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3980 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3981 /* There's a nested block. We need to leave the
3982 current block in place since otherwise the debugger
3983 wouldn't be able to show symbols from our block in
3984 the nested block. */
3990 /* Too many begin notes. */
3991 if (block_stack || eh_stack)
3996 /* Emit insn(s) of given code and pattern
3997 at a specified place within the doubly-linked list.
3999 All of the emit_foo global entry points accept an object
4000 X which is either an insn list or a PATTERN of a single
4003 There are thus a few canonical ways to generate code and
4004 emit it at a specific place in the instruction stream. For
4005 example, consider the instruction named SPOT and the fact that
4006 we would like to emit some instructions before SPOT. We might
4010 ... emit the new instructions ...
4011 insns_head = get_insns ();
4014 emit_insn_before (insns_head, SPOT);
4016 It used to be common to generate SEQUENCE rtl instead, but that
4017 is a relic of the past which no longer occurs. The reason is that
4018 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4019 generated would almost certainly die right after it was created. */
4021 /* Make X be output before the instruction BEFORE. */
4024 emit_insn_before (rtx x, rtx before)
4029 #ifdef ENABLE_RTL_CHECKING
4030 if (before == NULL_RTX)
4037 switch (GET_CODE (x))
4048 rtx next = NEXT_INSN (insn);
4049 add_insn_before (insn, before);
4055 #ifdef ENABLE_RTL_CHECKING
4062 last = make_insn_raw (x);
4063 add_insn_before (last, before);
4070 /* Make an instruction with body X and code JUMP_INSN
4071 and output it before the instruction BEFORE. */
4074 emit_jump_insn_before (rtx x, rtx before)
4076 rtx insn, last = NULL_RTX;
4078 #ifdef ENABLE_RTL_CHECKING
4079 if (before == NULL_RTX)
4083 switch (GET_CODE (x))
4094 rtx next = NEXT_INSN (insn);
4095 add_insn_before (insn, before);
4101 #ifdef ENABLE_RTL_CHECKING
4108 last = make_jump_insn_raw (x);
4109 add_insn_before (last, before);
4116 /* Make an instruction with body X and code CALL_INSN
4117 and output it before the instruction BEFORE. */
4120 emit_call_insn_before (rtx x, rtx before)
4122 rtx last = NULL_RTX, insn;
4124 #ifdef ENABLE_RTL_CHECKING
4125 if (before == NULL_RTX)
4129 switch (GET_CODE (x))
4140 rtx next = NEXT_INSN (insn);
4141 add_insn_before (insn, before);
4147 #ifdef ENABLE_RTL_CHECKING
4154 last = make_call_insn_raw (x);
4155 add_insn_before (last, before);
4162 /* Make an insn of code BARRIER
4163 and output it before the insn BEFORE. */
4166 emit_barrier_before (rtx before)
4168 rtx insn = rtx_alloc (BARRIER);
4170 INSN_UID (insn) = cur_insn_uid++;
4172 add_insn_before (insn, before);
4176 /* Emit the label LABEL before the insn BEFORE. */
4179 emit_label_before (rtx label, rtx before)
4181 /* This can be called twice for the same label as a result of the
4182 confusion that follows a syntax error! So make it harmless. */
4183 if (INSN_UID (label) == 0)
4185 INSN_UID (label) = cur_insn_uid++;
4186 add_insn_before (label, before);
4192 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4195 emit_note_before (int subtype, rtx before)
4197 rtx note = rtx_alloc (NOTE);
4198 INSN_UID (note) = cur_insn_uid++;
4199 NOTE_SOURCE_FILE (note) = 0;
4200 NOTE_LINE_NUMBER (note) = subtype;
4201 BLOCK_FOR_INSN (note) = NULL;
4203 add_insn_before (note, before);
4207 /* Helper for emit_insn_after, handles lists of instructions
4210 static rtx emit_insn_after_1 (rtx, rtx);
4213 emit_insn_after_1 (rtx first, rtx after)
4219 if (GET_CODE (after) != BARRIER
4220 && (bb = BLOCK_FOR_INSN (after)))
4222 bb->flags |= BB_DIRTY;
4223 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4224 if (GET_CODE (last) != BARRIER)
4225 set_block_for_insn (last, bb);
4226 if (GET_CODE (last) != BARRIER)
4227 set_block_for_insn (last, bb);
4228 if (bb->end == after)
4232 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4235 after_after = NEXT_INSN (after);
4237 NEXT_INSN (after) = first;
4238 PREV_INSN (first) = after;
4239 NEXT_INSN (last) = after_after;
4241 PREV_INSN (after_after) = last;
4243 if (after == last_insn)
4248 /* Make X be output after the insn AFTER. */
4251 emit_insn_after (rtx x, rtx after)
4255 #ifdef ENABLE_RTL_CHECKING
4256 if (after == NULL_RTX)
4263 switch (GET_CODE (x))
4271 last = emit_insn_after_1 (x, after);
4274 #ifdef ENABLE_RTL_CHECKING
4281 last = make_insn_raw (x);
4282 add_insn_after (last, after);
4289 /* Similar to emit_insn_after, except that line notes are to be inserted so
4290 as to act as if this insn were at FROM. */
4293 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4295 rtx from_line = find_line_note (from);
4296 rtx after_line = find_line_note (after);
4297 rtx insn = emit_insn_after (x, after);
4300 emit_note_copy_after (from_line, after);
4303 emit_note_copy_after (after_line, insn);
4306 /* Make an insn of code JUMP_INSN with body X
4307 and output it after the insn AFTER. */
4310 emit_jump_insn_after (rtx x, rtx after)
4314 #ifdef ENABLE_RTL_CHECKING
4315 if (after == NULL_RTX)
4319 switch (GET_CODE (x))
4327 last = emit_insn_after_1 (x, after);
4330 #ifdef ENABLE_RTL_CHECKING
4337 last = make_jump_insn_raw (x);
4338 add_insn_after (last, after);
4345 /* Make an instruction with body X and code CALL_INSN
4346 and output it after the instruction AFTER. */
4349 emit_call_insn_after (rtx x, rtx after)
4353 #ifdef ENABLE_RTL_CHECKING
4354 if (after == NULL_RTX)
4358 switch (GET_CODE (x))
4366 last = emit_insn_after_1 (x, after);
4369 #ifdef ENABLE_RTL_CHECKING
4376 last = make_call_insn_raw (x);
4377 add_insn_after (last, after);
4384 /* Make an insn of code BARRIER
4385 and output it after the insn AFTER. */
4388 emit_barrier_after (rtx after)
4390 rtx insn = rtx_alloc (BARRIER);
4392 INSN_UID (insn) = cur_insn_uid++;
4394 add_insn_after (insn, after);
4398 /* Emit the label LABEL after the insn AFTER. */
4401 emit_label_after (rtx label, rtx after)
4403 /* This can be called twice for the same label
4404 as a result of the confusion that follows a syntax error!
4405 So make it harmless. */
4406 if (INSN_UID (label) == 0)
4408 INSN_UID (label) = cur_insn_uid++;
4409 add_insn_after (label, after);
4415 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4418 emit_note_after (int subtype, rtx after)
4420 rtx note = rtx_alloc (NOTE);
4421 INSN_UID (note) = cur_insn_uid++;
4422 NOTE_SOURCE_FILE (note) = 0;
4423 NOTE_LINE_NUMBER (note) = subtype;
4424 BLOCK_FOR_INSN (note) = NULL;
4425 add_insn_after (note, after);
4429 /* Emit a copy of note ORIG after the insn AFTER. */
4432 emit_note_copy_after (rtx orig, rtx after)
4436 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4442 note = rtx_alloc (NOTE);
4443 INSN_UID (note) = cur_insn_uid++;
4444 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4445 NOTE_DATA (note) = NOTE_DATA (orig);
4446 BLOCK_FOR_INSN (note) = NULL;
4447 add_insn_after (note, after);
4451 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4453 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4455 rtx last = emit_insn_after (pattern, after);
4457 after = NEXT_INSN (after);
4460 if (active_insn_p (after))
4461 INSN_LOCATOR (after) = loc;
4464 after = NEXT_INSN (after);
4469 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4471 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4473 rtx last = emit_jump_insn_after (pattern, after);
4475 after = NEXT_INSN (after);
4478 if (active_insn_p (after))
4479 INSN_LOCATOR (after) = loc;
4482 after = NEXT_INSN (after);
4487 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4489 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4491 rtx last = emit_call_insn_after (pattern, after);
4493 after = NEXT_INSN (after);
4496 if (active_insn_p (after))
4497 INSN_LOCATOR (after) = loc;
4500 after = NEXT_INSN (after);
4505 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4507 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4509 rtx first = PREV_INSN (before);
4510 rtx last = emit_insn_before (pattern, before);
4512 first = NEXT_INSN (first);
4515 if (active_insn_p (first))
4516 INSN_LOCATOR (first) = loc;
4519 first = NEXT_INSN (first);
4524 /* Take X and emit it at the end of the doubly-linked
4527 Returns the last insn emitted. */
4532 rtx last = last_insn;
4538 switch (GET_CODE (x))
4549 rtx next = NEXT_INSN (insn);
4556 #ifdef ENABLE_RTL_CHECKING
4563 last = make_insn_raw (x);
4571 /* Make an insn of code JUMP_INSN with pattern X
4572 and add it to the end of the doubly-linked list. */
4575 emit_jump_insn (rtx x)
4577 rtx last = NULL_RTX, insn;
4579 switch (GET_CODE (x))
4590 rtx next = NEXT_INSN (insn);
4597 #ifdef ENABLE_RTL_CHECKING
4604 last = make_jump_insn_raw (x);
4612 /* Make an insn of code CALL_INSN with pattern X
4613 and add it to the end of the doubly-linked list. */
4616 emit_call_insn (rtx x)
4620 switch (GET_CODE (x))
4628 insn = emit_insn (x);
4631 #ifdef ENABLE_RTL_CHECKING
4638 insn = make_call_insn_raw (x);
4646 /* Add the label LABEL to the end of the doubly-linked list. */
4649 emit_label (rtx label)
4651 /* This can be called twice for the same label
4652 as a result of the confusion that follows a syntax error!
4653 So make it harmless. */
4654 if (INSN_UID (label) == 0)
4656 INSN_UID (label) = cur_insn_uid++;
4662 /* Make an insn of code BARRIER
4663 and add it to the end of the doubly-linked list. */
4668 rtx barrier = rtx_alloc (BARRIER);
4669 INSN_UID (barrier) = cur_insn_uid++;
4674 /* Make line numbering NOTE insn for LOCATION add it to the end
4675 of the doubly-linked list, but only if line-numbers are desired for
4676 debugging info and it doesn't match the previous one. */
4679 emit_line_note (location_t location)
4683 set_file_and_line_for_stmt (location);
4685 if (location.file && last_location.file
4686 && !strcmp (location.file, last_location.file)
4687 && location.line == last_location.line)
4689 last_location = location;
4691 if (no_line_numbers)
4697 note = emit_note (location.line);
4698 NOTE_SOURCE_FILE (note) = location.file;
4703 /* Emit a copy of note ORIG. */
4706 emit_note_copy (rtx orig)
4710 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4716 note = rtx_alloc (NOTE);
4718 INSN_UID (note) = cur_insn_uid++;
4719 NOTE_DATA (note) = NOTE_DATA (orig);
4720 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4721 BLOCK_FOR_INSN (note) = NULL;
4727 /* Make an insn of code NOTE or type NOTE_NO
4728 and add it to the end of the doubly-linked list. */
4731 emit_note (int note_no)
4735 note = rtx_alloc (NOTE);
4736 INSN_UID (note) = cur_insn_uid++;
4737 NOTE_LINE_NUMBER (note) = note_no;
4738 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4739 BLOCK_FOR_INSN (note) = NULL;
4744 /* Cause next statement to emit a line note even if the line number
4748 force_next_line_note (void)
4750 last_location.line = -1;
4753 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4754 note of this type already exists, remove it first. */
4757 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4759 rtx note = find_reg_note (insn, kind, NULL_RTX);
4765 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4766 has multiple sets (some callers assume single_set
4767 means the insn only has one set, when in fact it
4768 means the insn only has one * useful * set). */
4769 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4776 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4777 It serves no useful purpose and breaks eliminate_regs. */
4778 if (GET_CODE (datum) == ASM_OPERANDS)
4788 XEXP (note, 0) = datum;
4792 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4793 return REG_NOTES (insn);
4796 /* Return an indication of which type of insn should have X as a body.
4797 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4800 classify_insn (rtx x)
4802 if (GET_CODE (x) == CODE_LABEL)
4804 if (GET_CODE (x) == CALL)
4806 if (GET_CODE (x) == RETURN)
4808 if (GET_CODE (x) == SET)
4810 if (SET_DEST (x) == pc_rtx)
4812 else if (GET_CODE (SET_SRC (x)) == CALL)
4817 if (GET_CODE (x) == PARALLEL)
4820 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4821 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4823 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4824 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4826 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4827 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4833 /* Emit the rtl pattern X as an appropriate kind of insn.
4834 If X is a label, it is simply added into the insn chain. */
4839 enum rtx_code code = classify_insn (x);
4841 if (code == CODE_LABEL)
4842 return emit_label (x);
4843 else if (code == INSN)
4844 return emit_insn (x);
4845 else if (code == JUMP_INSN)
4847 rtx insn = emit_jump_insn (x);
4848 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4849 return emit_barrier ();
4852 else if (code == CALL_INSN)
4853 return emit_call_insn (x);
4858 /* Space for free sequence stack entries. */
4859 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4861 /* Begin emitting insns to a sequence which can be packaged in an
4862 RTL_EXPR. If this sequence will contain something that might cause
4863 the compiler to pop arguments to function calls (because those
4864 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4865 details), use do_pending_stack_adjust before calling this function.
4866 That will ensure that the deferred pops are not accidentally
4867 emitted in the middle of this sequence. */
4870 start_sequence (void)
4872 struct sequence_stack *tem;
4874 if (free_sequence_stack != NULL)
4876 tem = free_sequence_stack;
4877 free_sequence_stack = tem->next;
4880 tem = ggc_alloc (sizeof (struct sequence_stack));
4882 tem->next = seq_stack;
4883 tem->first = first_insn;
4884 tem->last = last_insn;
4885 tem->sequence_rtl_expr = seq_rtl_expr;
4893 /* Similarly, but indicate that this sequence will be placed in T, an
4894 RTL_EXPR. See the documentation for start_sequence for more
4895 information about how to use this function. */
4898 start_sequence_for_rtl_expr (tree t)
4905 /* Set up the insn chain starting with FIRST as the current sequence,
4906 saving the previously current one. See the documentation for
4907 start_sequence for more information about how to use this function. */
4910 push_to_sequence (rtx first)
4916 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4922 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4925 push_to_full_sequence (rtx first, rtx last)
4930 /* We really should have the end of the insn chain here. */
4931 if (last && NEXT_INSN (last))
4935 /* Set up the outer-level insn chain
4936 as the current sequence, saving the previously current one. */
4939 push_topmost_sequence (void)
4941 struct sequence_stack *stack, *top = NULL;
4945 for (stack = seq_stack; stack; stack = stack->next)
4948 first_insn = top->first;
4949 last_insn = top->last;
4950 seq_rtl_expr = top->sequence_rtl_expr;
4953 /* After emitting to the outer-level insn chain, update the outer-level
4954 insn chain, and restore the previous saved state. */
4957 pop_topmost_sequence (void)
4959 struct sequence_stack *stack, *top = NULL;
4961 for (stack = seq_stack; stack; stack = stack->next)
4964 top->first = first_insn;
4965 top->last = last_insn;
4966 /* ??? Why don't we save seq_rtl_expr here? */
4971 /* After emitting to a sequence, restore previous saved state.
4973 To get the contents of the sequence just made, you must call
4974 `get_insns' *before* calling here.
4976 If the compiler might have deferred popping arguments while
4977 generating this sequence, and this sequence will not be immediately
4978 inserted into the instruction stream, use do_pending_stack_adjust
4979 before calling get_insns. That will ensure that the deferred
4980 pops are inserted into this sequence, and not into some random
4981 location in the instruction stream. See INHIBIT_DEFER_POP for more
4982 information about deferred popping of arguments. */
4987 struct sequence_stack *tem = seq_stack;
4989 first_insn = tem->first;
4990 last_insn = tem->last;
4991 seq_rtl_expr = tem->sequence_rtl_expr;
4992 seq_stack = tem->next;
4994 memset (tem, 0, sizeof (*tem));
4995 tem->next = free_sequence_stack;
4996 free_sequence_stack = tem;
4999 /* This works like end_sequence, but records the old sequence in FIRST
5003 end_full_sequence (rtx *first, rtx *last)
5005 *first = first_insn;
5010 /* Return 1 if currently emitting into a sequence. */
5013 in_sequence_p (void)
5015 return seq_stack != 0;
5018 /* Put the various virtual registers into REGNO_REG_RTX. */
5021 init_virtual_regs (struct emit_status *es)
5023 rtx *ptr = es->x_regno_reg_rtx;
5024 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5025 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5026 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5027 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5028 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5032 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5033 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5034 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5035 static int copy_insn_n_scratches;
5037 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5038 copied an ASM_OPERANDS.
5039 In that case, it is the original input-operand vector. */
5040 static rtvec orig_asm_operands_vector;
5042 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5043 copied an ASM_OPERANDS.
5044 In that case, it is the copied input-operand vector. */
5045 static rtvec copy_asm_operands_vector;
5047 /* Likewise for the constraints vector. */
5048 static rtvec orig_asm_constraints_vector;
5049 static rtvec copy_asm_constraints_vector;
5051 /* Recursively create a new copy of an rtx for copy_insn.
5052 This function differs from copy_rtx in that it handles SCRATCHes and
5053 ASM_OPERANDs properly.
5054 Normally, this function is not used directly; use copy_insn as front end.
5055 However, you could first copy an insn pattern with copy_insn and then use
5056 this function afterwards to properly copy any REG_NOTEs containing
5060 copy_insn_1 (rtx orig)
5065 const char *format_ptr;
5067 code = GET_CODE (orig);
5084 for (i = 0; i < copy_insn_n_scratches; i++)
5085 if (copy_insn_scratch_in[i] == orig)
5086 return copy_insn_scratch_out[i];
5090 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5091 a LABEL_REF, it isn't sharable. */
5092 if (GET_CODE (XEXP (orig, 0)) == PLUS
5093 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5094 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5098 /* A MEM with a constant address is not sharable. The problem is that
5099 the constant address may need to be reloaded. If the mem is shared,
5100 then reloading one copy of this mem will cause all copies to appear
5101 to have been reloaded. */
5107 copy = rtx_alloc (code);
5109 /* Copy the various flags, and other information. We assume that
5110 all fields need copying, and then clear the fields that should
5111 not be copied. That is the sensible default behavior, and forces
5112 us to explicitly document why we are *not* copying a flag. */
5113 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
5115 /* We do not copy the USED flag, which is used as a mark bit during
5116 walks over the RTL. */
5117 RTX_FLAG (copy, used) = 0;
5119 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5120 if (GET_RTX_CLASS (code) == 'i')
5122 RTX_FLAG (copy, jump) = 0;
5123 RTX_FLAG (copy, call) = 0;
5124 RTX_FLAG (copy, frame_related) = 0;
5127 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5129 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5131 copy->fld[i] = orig->fld[i];
5132 switch (*format_ptr++)
5135 if (XEXP (orig, i) != NULL)
5136 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5141 if (XVEC (orig, i) == orig_asm_constraints_vector)
5142 XVEC (copy, i) = copy_asm_constraints_vector;
5143 else if (XVEC (orig, i) == orig_asm_operands_vector)
5144 XVEC (copy, i) = copy_asm_operands_vector;
5145 else if (XVEC (orig, i) != NULL)
5147 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5148 for (j = 0; j < XVECLEN (copy, i); j++)
5149 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5160 /* These are left unchanged. */
5168 if (code == SCRATCH)
5170 i = copy_insn_n_scratches++;
5171 if (i >= MAX_RECOG_OPERANDS)
5173 copy_insn_scratch_in[i] = orig;
5174 copy_insn_scratch_out[i] = copy;
5176 else if (code == ASM_OPERANDS)
5178 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5179 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5180 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5181 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5187 /* Create a new copy of an rtx.
5188 This function differs from copy_rtx in that it handles SCRATCHes and
5189 ASM_OPERANDs properly.
5190 INSN doesn't really have to be a full INSN; it could be just the
5193 copy_insn (rtx insn)
5195 copy_insn_n_scratches = 0;
5196 orig_asm_operands_vector = 0;
5197 orig_asm_constraints_vector = 0;
5198 copy_asm_operands_vector = 0;
5199 copy_asm_constraints_vector = 0;
5200 return copy_insn_1 (insn);
5203 /* Initialize data structures and variables in this file
5204 before generating rtl for each function. */
5209 struct function *f = cfun;
5211 f->emit = ggc_alloc (sizeof (struct emit_status));
5214 seq_rtl_expr = NULL;
5216 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5217 last_location.line = 0;
5218 last_location.file = 0;
5219 first_label_num = label_num;
5223 /* Init the tables that describe all the pseudo regs. */
5225 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5227 f->emit->regno_pointer_align
5228 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5229 * sizeof (unsigned char));
5232 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5234 /* Put copies of all the hard registers into regno_reg_rtx. */
5235 memcpy (regno_reg_rtx,
5236 static_regno_reg_rtx,
5237 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5239 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5240 init_virtual_regs (f->emit);
5242 /* Indicate that the virtual registers and stack locations are
5244 REG_POINTER (stack_pointer_rtx) = 1;
5245 REG_POINTER (frame_pointer_rtx) = 1;
5246 REG_POINTER (hard_frame_pointer_rtx) = 1;
5247 REG_POINTER (arg_pointer_rtx) = 1;
5249 REG_POINTER (virtual_incoming_args_rtx) = 1;
5250 REG_POINTER (virtual_stack_vars_rtx) = 1;
5251 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5252 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5253 REG_POINTER (virtual_cfa_rtx) = 1;
5255 #ifdef STACK_BOUNDARY
5256 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5257 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5258 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5259 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5261 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5262 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5263 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5264 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5265 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5268 #ifdef INIT_EXPANDERS
5273 /* Generate the constant 0. */
5276 gen_const_vector_0 (enum machine_mode mode)
5281 enum machine_mode inner;
5283 units = GET_MODE_NUNITS (mode);
5284 inner = GET_MODE_INNER (mode);
5286 v = rtvec_alloc (units);
5288 /* We need to call this function after we to set CONST0_RTX first. */
5289 if (!CONST0_RTX (inner))
5292 for (i = 0; i < units; ++i)
5293 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5295 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5299 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5300 all elements are zero. */
5302 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5304 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5307 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5308 if (RTVEC_ELT (v, i) != inner_zero)
5309 return gen_rtx_raw_CONST_VECTOR (mode, v);
5310 return CONST0_RTX (mode);
5313 /* Create some permanent unique rtl objects shared between all functions.
5314 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5317 init_emit_once (int line_numbers)
5320 enum machine_mode mode;
5321 enum machine_mode double_mode;
5323 /* We need reg_raw_mode, so initialize the modes now. */
5324 init_reg_modes_once ();
5326 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5328 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5329 const_int_htab_eq, NULL);
5331 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5332 const_double_htab_eq, NULL);
5334 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5335 mem_attrs_htab_eq, NULL);
5336 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5337 reg_attrs_htab_eq, NULL);
5339 no_line_numbers = ! line_numbers;
5341 /* Compute the word and byte modes. */
5343 byte_mode = VOIDmode;
5344 word_mode = VOIDmode;
5345 double_mode = VOIDmode;
5347 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5348 mode = GET_MODE_WIDER_MODE (mode))
5350 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5351 && byte_mode == VOIDmode)
5354 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5355 && word_mode == VOIDmode)
5359 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5360 mode = GET_MODE_WIDER_MODE (mode))
5362 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5363 && double_mode == VOIDmode)
5367 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5369 /* Assign register numbers to the globally defined register rtx.
5370 This must be done at runtime because the register number field
5371 is in a union and some compilers can't initialize unions. */
5373 pc_rtx = gen_rtx (PC, VOIDmode);
5374 cc0_rtx = gen_rtx (CC0, VOIDmode);
5375 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5376 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5377 if (hard_frame_pointer_rtx == 0)
5378 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5379 HARD_FRAME_POINTER_REGNUM);
5380 if (arg_pointer_rtx == 0)
5381 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5382 virtual_incoming_args_rtx =
5383 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5384 virtual_stack_vars_rtx =
5385 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5386 virtual_stack_dynamic_rtx =
5387 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5388 virtual_outgoing_args_rtx =
5389 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5390 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5392 /* Initialize RTL for commonly used hard registers. These are
5393 copied into regno_reg_rtx as we begin to compile each function. */
5394 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5395 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5397 #ifdef INIT_EXPANDERS
5398 /* This is to initialize {init|mark|free}_machine_status before the first
5399 call to push_function_context_to. This is needed by the Chill front
5400 end which calls push_function_context_to before the first call to
5401 init_function_start. */
5405 /* Create the unique rtx's for certain rtx codes and operand values. */
5407 /* Don't use gen_rtx here since gen_rtx in this case
5408 tries to use these variables. */
5409 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5410 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5411 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5413 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5414 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5415 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5417 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5419 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5420 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5421 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5422 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5423 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5424 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5425 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5427 dconsthalf = dconst1;
5430 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5432 /* Initialize mathematical constants for constant folding builtins.
5433 These constants need to be given to at least 160 bits precision. */
5434 real_from_string (&dconstpi,
5435 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5436 real_from_string (&dconste,
5437 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5439 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5441 REAL_VALUE_TYPE *r =
5442 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5444 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5445 mode = GET_MODE_WIDER_MODE (mode))
5446 const_tiny_rtx[i][(int) mode] =
5447 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5449 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5451 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5452 mode = GET_MODE_WIDER_MODE (mode))
5453 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5455 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5457 mode = GET_MODE_WIDER_MODE (mode))
5458 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5461 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5463 mode = GET_MODE_WIDER_MODE (mode))
5464 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5466 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5468 mode = GET_MODE_WIDER_MODE (mode))
5469 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5471 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5472 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5473 const_tiny_rtx[0][i] = const0_rtx;
5475 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5476 if (STORE_FLAG_VALUE == 1)
5477 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5479 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5480 return_address_pointer_rtx
5481 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5484 #ifdef STATIC_CHAIN_REGNUM
5485 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5487 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5488 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5489 static_chain_incoming_rtx
5490 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5493 static_chain_incoming_rtx = static_chain_rtx;
5497 static_chain_rtx = STATIC_CHAIN;
5499 #ifdef STATIC_CHAIN_INCOMING
5500 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5502 static_chain_incoming_rtx = static_chain_rtx;
5506 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5507 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5510 /* Query and clear/ restore no_line_numbers. This is used by the
5511 switch / case handling in stmt.c to give proper line numbers in
5512 warnings about unreachable code. */
5515 force_line_numbers (void)
5517 int old = no_line_numbers;
5519 no_line_numbers = 0;
5521 force_next_line_note ();
5526 restore_line_number_status (int old_value)
5528 no_line_numbers = old_value;
5531 /* Produce exact duplicate of insn INSN after AFTER.
5532 Care updating of libcall regions if present. */
5535 emit_copy_of_insn_after (rtx insn, rtx after)
5538 rtx note1, note2, link;
5540 switch (GET_CODE (insn))
5543 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5547 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5551 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5552 if (CALL_INSN_FUNCTION_USAGE (insn))
5553 CALL_INSN_FUNCTION_USAGE (new)
5554 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5555 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5556 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5563 /* Update LABEL_NUSES. */
5564 mark_jump_label (PATTERN (new), new, 0);
5566 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5568 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5570 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5571 if (REG_NOTE_KIND (link) != REG_LABEL)
5573 if (GET_CODE (link) == EXPR_LIST)
5575 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5580 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5585 /* Fix the libcall sequences. */
5586 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5589 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5591 XEXP (note1, 0) = p;
5592 XEXP (note2, 0) = new;
5594 INSN_CODE (new) = INSN_CODE (insn);
5598 #include "gt-emit-rtl.h"