1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains the functions `gen_rtx', `gen_reg_rtx'
24 and `gen_label_rtx' that are the usual ways of creating rtl
25 expressions for most purposes.
27 It also has the functions for creating insns and linking
28 them in the doubly-linked chain.
30 The patterns of the insns are created by machine-dependent
31 routines in insn-emit.c, which is generated automatically from
32 the machine description. These routines use `gen_rtx' to make
33 the individual rtx's of the pattern; what is machine dependent
34 is the kind of rtx's they make and what arguments they use. */
43 #include "insn-config.h"
47 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
48 After rtl generation, it is 1 plus the largest register number used. */
50 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
52 /* This is *not* reset after each function. It gives each CODE_LABEL
53 in the entire compilation a unique label number. */
55 static int label_num = 1;
57 /* Lowest label number in current function. */
59 static int first_label_num;
61 /* Highest label number in current function.
62 Zero means use the value of label_num instead.
63 This is nonzero only when belatedly compiling an inline function. */
65 static int last_label_num;
67 /* Value label_num had when set_new_first_and_last_label_number was called.
68 If label_num has not changed since then, last_label_num is valid. */
70 static int base_label_num;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these except perhaps the floating-point CONST_DOUBLEs
79 are unique; no other rtx-object will be equal to any of these. */
81 rtx pc_rtx; /* (PC) */
82 rtx cc0_rtx; /* (CC0) */
83 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
84 rtx const0_rtx; /* (CONST_INT 0) */
85 rtx const1_rtx; /* (CONST_INT 1) */
86 rtx const2_rtx; /* (CONST_INT 2) */
87 rtx constm1_rtx; /* (CONST_INT -1) */
88 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
96 REAL_VALUE_TYPE dconst0;
97 REAL_VALUE_TYPE dconst1;
98 REAL_VALUE_TYPE dconst2;
99 REAL_VALUE_TYPE dconstm1;
101 /* All references to the following fixed hard registers go through
102 these unique rtl objects. On machines where the frame-pointer and
103 arg-pointer are the same register, they use the same unique object.
105 After register allocation, other rtl objects which used to be pseudo-regs
106 may be clobbered to refer to the frame-pointer register.
107 But references that were originally to the frame-pointer can be
108 distinguished from the others because they contain frame_pointer_rtx.
110 In an inline procedure, the stack and frame pointer rtxs may not be
111 used for anything else. */
112 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
113 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
114 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
115 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
116 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
117 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
118 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
119 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
121 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
122 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
123 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
124 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
126 /* We make one copy of (const_int C) where C is in
127 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
128 to save space during the compilation and simplify comparisons of
131 #define MAX_SAVED_CONST_INT 64
133 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
135 /* The ends of the doubly-linked chain of rtl for the current function.
136 Both are reset to null at the start of rtl generation for the function.
138 start_sequence saves both of these on `sequence_stack' and then
139 starts a new, nested sequence of insns. */
141 static rtx first_insn = NULL;
142 static rtx last_insn = NULL;
144 /* INSN_UID for next insn emitted.
145 Reset to 1 for each function compiled. */
147 static int cur_insn_uid = 1;
149 /* Line number and source file of the last line-number NOTE emitted.
150 This is used to avoid generating duplicates. */
152 static int last_linenum = 0;
153 static char *last_filename = 0;
155 /* A vector indexed by pseudo reg number. The allocated length
156 of this vector is regno_pointer_flag_length. Since this
157 vector is needed during the expansion phase when the total
158 number of registers in the function is not yet known,
159 it is copied and made bigger when necessary. */
161 char *regno_pointer_flag;
162 int regno_pointer_flag_length;
164 /* Indexed by pseudo register number, gives the rtx for that pseudo.
165 Allocated in parallel with regno_pointer_flag. */
169 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
170 Each element describes one pending sequence.
171 The main insn-chain is saved in the last element of the chain,
172 unless the chain is empty. */
174 struct sequence_stack *sequence_stack;
176 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
177 shortly thrown away. We use two mechanisms to prevent this waste:
179 First, we keep a list of the expressions used to represent the sequence
180 stack in sequence_element_free_list.
182 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
183 rtvec for use by gen_sequence. One entry for each size is sufficient
184 because most cases are calls to gen_sequence followed by immediately
185 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
186 destructive on the insn in it anyway and hence can't be redone.
188 We do not bother to save this cached data over nested function calls.
189 Instead, we just reinitialize them. */
191 #define SEQUENCE_RESULT_SIZE 5
193 static struct sequence_stack *sequence_element_free_list;
194 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
196 extern int rtx_equal_function_value_matters;
198 /* Filename and line number of last line-number note,
199 whether we actually emitted it or not. */
200 extern char *emit_filename;
201 extern int emit_lineno;
203 rtx change_address ();
206 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
208 ** This routine generates an RTX of the size specified by
209 ** <code>, which is an RTX code. The RTX structure is initialized
210 ** from the arguments <element1> through <elementn>, which are
211 ** interpreted according to the specific RTX type's format. The
212 ** special machine mode associated with the rtx (if any) is specified
215 ** gen_rtx can be invoked in a way which resembles the lisp-like
216 ** rtx it will generate. For example, the following rtx structure:
218 ** (plus:QI (mem:QI (reg:SI 1))
219 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
221 ** ...would be generated by the following C code:
223 ** gen_rtx (PLUS, QImode,
224 ** gen_rtx (MEM, QImode,
225 ** gen_rtx (REG, SImode, 1)),
226 ** gen_rtx (MEM, QImode,
227 ** gen_rtx (PLUS, SImode,
228 ** gen_rtx (REG, SImode, 2),
229 ** gen_rtx (REG, SImode, 3)))),
239 enum machine_mode mode;
240 register int i; /* Array indices... */
241 register char *fmt; /* Current rtx's format... */
242 register rtx rt_val; /* RTX to return to caller... */
245 code = va_arg (p, enum rtx_code);
246 mode = va_arg (p, enum machine_mode);
248 if (code == CONST_INT)
250 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
252 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
253 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
255 if (const_true_rtx && arg == STORE_FLAG_VALUE)
256 return const_true_rtx;
258 rt_val = rtx_alloc (code);
259 INTVAL (rt_val) = arg;
261 else if (code == REG)
263 int regno = va_arg (p, int);
265 /* In case the MD file explicitly references the frame pointer, have
266 all such references point to the same frame pointer. This is used
267 during frame pointer elimination to distinguish the explicit
268 references to these registers from pseudos that happened to be
271 If we have eliminated the frame pointer or arg pointer, we will
272 be using it as a normal register, for example as a spill register.
273 In such cases, we might be accessing it in a mode that is not
274 Pmode and therefore cannot use the pre-allocated rtx.
276 Also don't do this when we are making new REGs in reload,
277 since we don't want to get confused with the real pointers. */
279 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
280 && ! reload_in_progress)
281 return frame_pointer_rtx;
282 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
283 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
284 && ! reload_in_progress)
285 return arg_pointer_rtx;
287 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
288 && ! reload_in_progress)
289 return stack_pointer_rtx;
292 rt_val = rtx_alloc (code);
294 REGNO (rt_val) = regno;
300 rt_val = rtx_alloc (code); /* Allocate the storage space. */
301 rt_val->mode = mode; /* Store the machine mode... */
303 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
304 for (i = 0; i < GET_RTX_LENGTH (code); i++)
308 case '0': /* Unused field. */
311 case 'i': /* An integer? */
312 XINT (rt_val, i) = va_arg (p, int);
315 case 'w': /* A wide integer? */
316 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
319 case 's': /* A string? */
320 XSTR (rt_val, i) = va_arg (p, char *);
323 case 'e': /* An expression? */
324 case 'u': /* An insn? Same except when printing. */
325 XEXP (rt_val, i) = va_arg (p, rtx);
328 case 'E': /* An RTX vector? */
329 XVEC (rt_val, i) = va_arg (p, rtvec);
338 return rt_val; /* Return the new RTX... */
341 /* gen_rtvec (n, [rt1, ..., rtn])
343 ** This routine creates an rtvec and stores within it the
344 ** pointers to rtx's which are its arguments.
360 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
362 vector = (rtx *) alloca (n * sizeof (rtx));
363 for (i = 0; i < n; i++)
364 vector[i] = va_arg (p, rtx);
367 return gen_rtvec_v (n, vector);
371 gen_rtvec_v (n, argp)
376 register rtvec rt_val;
379 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
381 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
383 for (i = 0; i < n; i++)
384 rt_val->elem[i].rtx = *argp++;
389 /* Generate a REG rtx for a new pseudo register of mode MODE.
390 This pseudo is assigned the next sequential register number. */
394 enum machine_mode mode;
398 /* Don't let anything called by or after reload create new registers
399 (actually, registers can't be created after flow, but this is a good
402 if (reload_in_progress || reload_completed)
405 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
406 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
408 /* For complex modes, don't make a single pseudo.
409 Instead, make a CONCAT of two pseudos.
410 This allows noncontiguous allocation of the real and imaginary parts,
411 which makes much better code. Besides, allocating DCmode
412 pseudos overstrains reload on some machines like the 386. */
413 rtx realpart, imagpart;
414 int size = GET_MODE_UNIT_SIZE (mode);
415 enum machine_mode partmode
416 = mode_for_size (size * BITS_PER_UNIT,
417 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
418 ? MODE_FLOAT : MODE_INT),
421 realpart = gen_reg_rtx (partmode);
422 imagpart = gen_reg_rtx (partmode);
423 return gen_rtx (CONCAT, mode, realpart, imagpart);
426 /* Make sure regno_pointer_flag and regno_reg_rtx are large
427 enough to have an element for this pseudo reg number. */
429 if (reg_rtx_no == regno_pointer_flag_length)
433 (char *) oballoc (regno_pointer_flag_length * 2);
434 bzero (new, regno_pointer_flag_length * 2);
435 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
436 regno_pointer_flag = new;
438 new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx));
439 bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx));
440 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
441 regno_reg_rtx = new1;
443 regno_pointer_flag_length *= 2;
446 val = gen_rtx (REG, mode, reg_rtx_no);
447 regno_reg_rtx[reg_rtx_no++] = val;
451 /* Identify REG as a probable pointer register. */
454 mark_reg_pointer (reg)
457 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
460 /* Return 1 plus largest pseudo reg number used in the current function. */
468 /* Return 1 + the largest label number used so far in the current function. */
473 if (last_label_num && label_num == base_label_num)
474 return last_label_num;
478 /* Return first label number used in this function (if any were used). */
481 get_first_label_num ()
483 return first_label_num;
486 /* Return a value representing some low-order bits of X, where the number
487 of low-order bits is given by MODE. Note that no conversion is done
488 between floating-point and fixed-point values, rather, the bit
489 representation is returned.
491 This function handles the cases in common between gen_lowpart, below,
492 and two variants in cse.c and combine.c. These are the cases that can
493 be safely handled at all points in the compilation.
495 If this is not a case we can handle, return 0. */
498 gen_lowpart_common (mode, x)
499 enum machine_mode mode;
504 if (GET_MODE (x) == mode)
507 /* MODE must occupy no more words than the mode of X. */
508 if (GET_MODE (x) != VOIDmode
509 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
510 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
514 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
515 word = ((GET_MODE_SIZE (GET_MODE (x))
516 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
519 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
520 && (GET_MODE_CLASS (mode) == MODE_INT
521 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
523 /* If we are getting the low-order part of something that has been
524 sign- or zero-extended, we can either just use the object being
525 extended or make a narrower extension. If we want an even smaller
526 piece than the size of the object being extended, call ourselves
529 This case is used mostly by combine and cse. */
531 if (GET_MODE (XEXP (x, 0)) == mode)
533 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
534 return gen_lowpart_common (mode, XEXP (x, 0));
535 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
536 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
538 else if (GET_CODE (x) == SUBREG
539 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
540 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
541 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
543 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
544 else if (GET_CODE (x) == REG)
546 /* If the register is not valid for MODE, return 0. If we don't
547 do this, there is no way to fix up the resulting REG later. */
548 if (REGNO (x) < FIRST_PSEUDO_REGISTER
549 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode))
551 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
552 /* integrate.c can't handle parts of a return value register. */
553 && (! REG_FUNCTION_VALUE_P (x)
554 || ! rtx_equal_function_value_matters)
555 /* We want to keep the stack, frame, and arg pointers
557 && REGNO (x) != FRAME_POINTER_REGNUM
558 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
559 && REGNO (x) != ARG_POINTER_REGNUM
561 && REGNO (x) != STACK_POINTER_REGNUM)
562 return gen_rtx (REG, mode, REGNO (x) + word);
564 return gen_rtx (SUBREG, mode, x, word);
566 else if (GET_CODE (x) == CONCAT)
568 if (GET_MODE (XEXP (x, 0)) != mode)
572 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
573 from the low-order part of the constant. */
574 else if ((GET_MODE_CLASS (mode) == MODE_INT
575 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
576 && GET_MODE (x) == VOIDmode
577 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
579 /* If MODE is twice the host word size, X is already the desired
580 representation. Otherwise, if MODE is wider than a word, we can't
581 do this. If MODE is exactly a word, return just one CONST_INT.
582 If MODE is smaller than a word, clear the bits that don't belong
583 in our mode, unless they and our sign bit are all one. So we get
584 either a reasonable negative value or a reasonable unsigned value
587 if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT)
589 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
591 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
592 return (GET_CODE (x) == CONST_INT ? x
593 : GEN_INT (CONST_DOUBLE_LOW (x)));
596 /* MODE must be narrower than HOST_BITS_PER_INT. */
597 int width = GET_MODE_BITSIZE (mode);
598 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
599 : CONST_DOUBLE_LOW (x));
601 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
602 != ((HOST_WIDE_INT) (-1) << (width - 1))))
603 val &= ((HOST_WIDE_INT) 1 << width) - 1;
605 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
610 /* If X is an integral constant but we want it in floating-point, it
611 must be the case that we have a union of an integer and a floating-point
612 value. If the machine-parameters allow it, simulate that union here
613 and return the result. The two-word and single-word cases are
616 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
617 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
618 || flag_pretend_float)
619 && GET_MODE_CLASS (mode) == MODE_FLOAT
620 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
621 && GET_CODE (x) == CONST_INT
622 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
623 #ifdef REAL_ARITHMETIC
629 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
630 return immed_real_const_1 (r, mode);
634 union {HOST_WIDE_INT i; float d; } u;
637 return immed_real_const_1 (u.d, mode);
640 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
641 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
642 || flag_pretend_float)
643 && GET_MODE_CLASS (mode) == MODE_FLOAT
644 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
645 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
646 && GET_MODE (x) == VOIDmode
647 && (sizeof (double) * HOST_BITS_PER_CHAR
648 == 2 * HOST_BITS_PER_WIDE_INT))
649 #ifdef REAL_ARITHMETIC
653 HOST_WIDE_INT low, high;
655 if (GET_CODE (x) == CONST_INT)
656 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
658 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
660 /* TARGET_DOUBLE takes the addressing order of the target machine. */
661 #ifdef WORDS_BIG_ENDIAN
662 i[0] = high, i[1] = low;
664 i[0] = low, i[1] = high;
667 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
668 return immed_real_const_1 (r, mode);
672 union {HOST_WIDE_INT i[2]; double d; } u;
673 HOST_WIDE_INT low, high;
675 if (GET_CODE (x) == CONST_INT)
676 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
678 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
680 #ifdef HOST_WORDS_BIG_ENDIAN
681 u.i[0] = high, u.i[1] = low;
683 u.i[0] = low, u.i[1] = high;
686 return immed_real_const_1 (u.d, mode);
689 /* Similarly, if this is converting a floating-point value into a
690 single-word integer. Only do this is the host and target parameters are
693 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
694 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
695 || flag_pretend_float)
696 && (GET_MODE_CLASS (mode) == MODE_INT
697 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
698 && GET_CODE (x) == CONST_DOUBLE
699 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
700 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
701 return operand_subword (x, 0, 0, GET_MODE (x));
703 /* Similarly, if this is converting a floating-point value into a
704 two-word integer, we can do this one word at a time and make an
705 integer. Only do this is the host and target parameters are
708 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
709 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
710 || flag_pretend_float)
711 && (GET_MODE_CLASS (mode) == MODE_INT
712 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
713 && GET_CODE (x) == CONST_DOUBLE
714 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
715 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
717 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
718 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
720 if (lowpart && GET_CODE (lowpart) == CONST_INT
721 && highpart && GET_CODE (highpart) == CONST_INT)
722 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
725 /* Otherwise, we can't do this. */
729 /* Return the real part (which has mode MODE) of a complex value X.
730 This always comes at the low address in memory. */
733 gen_realpart (mode, x)
734 enum machine_mode mode;
737 if (WORDS_BIG_ENDIAN)
738 return gen_highpart (mode, x);
740 return gen_lowpart (mode, x);
743 /* Return the imaginary part (which has mode MODE) of a complex value X.
744 This always comes at the high address in memory. */
747 gen_imagpart (mode, x)
748 enum machine_mode mode;
751 if (WORDS_BIG_ENDIAN)
752 return gen_lowpart (mode, x);
754 return gen_highpart (mode, x);
757 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
758 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
759 least-significant part of X.
760 MODE specifies how big a part of X to return;
761 it usually should not be larger than a word.
762 If X is a MEM whose address is a QUEUED, the value may be so also. */
765 gen_lowpart (mode, x)
766 enum machine_mode mode;
769 rtx result = gen_lowpart_common (mode, x);
773 else if (GET_CODE (x) == MEM)
775 /* The only additional case we can do is MEM. */
776 register int offset = 0;
777 if (WORDS_BIG_ENDIAN)
778 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
779 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
781 if (BYTES_BIG_ENDIAN)
782 /* Adjust the address so that the address-after-the-data
784 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
785 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
787 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
793 /* Like `gen_lowpart', but refer to the most significant part.
794 This is used to access the imaginary part of a complex number. */
797 gen_highpart (mode, x)
798 enum machine_mode mode;
801 /* This case loses if X is a subreg. To catch bugs early,
802 complain if an invalid MODE is used even in other cases. */
803 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
804 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
806 if (GET_CODE (x) == CONST_DOUBLE
807 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
808 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
811 return gen_rtx (CONST_INT, VOIDmode,
812 CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
813 else if (GET_CODE (x) == CONST_INT)
815 else if (GET_CODE (x) == MEM)
817 register int offset = 0;
818 #if !WORDS_BIG_ENDIAN
819 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
820 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
822 #if !BYTES_BIG_ENDIAN
823 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
824 offset -= (GET_MODE_SIZE (mode)
825 - MIN (UNITS_PER_WORD,
826 GET_MODE_SIZE (GET_MODE (x))));
828 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
830 else if (GET_CODE (x) == SUBREG)
832 /* The only time this should occur is when we are looking at a
833 multi-word item with a SUBREG whose mode is the same as that of the
834 item. It isn't clear what we would do if it wasn't. */
835 if (SUBREG_WORD (x) != 0)
837 return gen_highpart (mode, SUBREG_REG (x));
839 else if (GET_CODE (x) == REG)
843 #if !WORDS_BIG_ENDIAN
844 if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
845 word = ((GET_MODE_SIZE (GET_MODE (x))
846 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
849 if (REGNO (x) < FIRST_PSEUDO_REGISTER
850 /* We want to keep the stack, frame, and arg pointers special. */
851 && REGNO (x) != FRAME_POINTER_REGNUM
852 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
853 && REGNO (x) != ARG_POINTER_REGNUM
855 && REGNO (x) != STACK_POINTER_REGNUM)
856 return gen_rtx (REG, mode, REGNO (x) + word);
858 return gen_rtx (SUBREG, mode, x, word);
860 else if (GET_CODE (x) == CONCAT)
862 if (GET_MODE (XEXP (x, 1)) != mode)
870 /* Return 1 iff X, assumed to be a SUBREG,
871 refers to the least significant part of its containing reg.
872 If X is not a SUBREG, always return 1 (it is its own low part!). */
878 if (GET_CODE (x) != SUBREG)
882 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
883 return (SUBREG_WORD (x)
884 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
885 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
888 return SUBREG_WORD (x) == 0;
891 /* Return subword I of operand OP.
892 The word number, I, is interpreted as the word number starting at the
893 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
894 otherwise it is the high-order word.
896 If we cannot extract the required word, we return zero. Otherwise, an
897 rtx corresponding to the requested word will be returned.
899 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
900 reload has completed, a valid address will always be returned. After
901 reload, if a valid address cannot be returned, we return zero.
903 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
904 it is the responsibility of the caller.
906 MODE is the mode of OP in case it is a CONST_INT. */
909 operand_subword (op, i, validate_address, mode)
912 int validate_address;
913 enum machine_mode mode;
916 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
918 if (mode == VOIDmode)
919 mode = GET_MODE (op);
921 if (mode == VOIDmode)
924 /* If OP is narrower than a word or if we want a word outside OP, fail. */
926 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
927 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
930 /* If OP is already an integer word, return it. */
931 if (GET_MODE_CLASS (mode) == MODE_INT
932 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
935 /* If OP is a REG or SUBREG, we can handle it very simply. */
936 if (GET_CODE (op) == REG)
938 /* If the register is not valid for MODE, return 0. If we don't
939 do this, there is no way to fix up the resulting REG later. */
940 if (REGNO (op) < FIRST_PSEUDO_REGISTER
941 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
943 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
944 || (REG_FUNCTION_VALUE_P (op)
945 && rtx_equal_function_value_matters)
946 /* We want to keep the stack, frame, and arg pointers
948 || REGNO (op) == FRAME_POINTER_REGNUM
949 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
950 || REGNO (op) == ARG_POINTER_REGNUM
952 || REGNO (op) == STACK_POINTER_REGNUM)
953 return gen_rtx (SUBREG, word_mode, op, i);
955 return gen_rtx (REG, word_mode, REGNO (op) + i);
957 else if (GET_CODE (op) == SUBREG)
958 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
959 else if (GET_CODE (op) == CONCAT)
961 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
963 return operand_subword (XEXP (op, 0), i, validate_address, mode);
964 return operand_subword (XEXP (op, 1), i - partwords,
965 validate_address, mode);
968 /* Form a new MEM at the requested address. */
969 if (GET_CODE (op) == MEM)
971 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
974 if (validate_address)
976 if (reload_completed)
978 if (! strict_memory_address_p (word_mode, addr))
982 addr = memory_address (word_mode, addr);
985 new = gen_rtx (MEM, word_mode, addr);
987 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
988 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
989 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
994 /* The only remaining cases are when OP is a constant. If the host and
995 target floating formats are the same, handling two-word floating
996 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
997 are defined as returning 32 bit and 64-bit values, respectively,
998 and not values of BITS_PER_WORD and 2 * BITS_PER_WORD bits. */
999 #ifdef REAL_ARITHMETIC
1000 if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1001 && GET_MODE_CLASS (mode) == MODE_FLOAT
1002 && GET_MODE_BITSIZE (mode) == 64
1003 && GET_CODE (op) == CONST_DOUBLE)
1008 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1009 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1011 /* We handle 32-bit and 64-bit host words here. Note that the order in
1012 which the words are written depends on the word endianness.
1014 ??? This is a potential portability problem and should
1015 be fixed at some point. */
1016 if (HOST_BITS_PER_WIDE_INT == 32)
1017 return GEN_INT (k[i]);
1018 else if (HOST_BITS_PER_WIDE_INT == 64 && i == 0)
1019 return GEN_INT ((k[! WORDS_BIG_ENDIAN] << (HOST_BITS_PER_WIDE_INT / 2))
1020 | k[WORDS_BIG_ENDIAN]);
1024 #else /* no REAL_ARITHMETIC */
1025 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1026 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1027 || flag_pretend_float)
1028 && GET_MODE_CLASS (mode) == MODE_FLOAT
1029 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1030 && GET_CODE (op) == CONST_DOUBLE)
1032 /* The constant is stored in the host's word-ordering,
1033 but we want to access it in the target's word-ordering. Some
1034 compilers don't like a conditional inside macro args, so we have two
1035 copies of the return. */
1036 #ifdef HOST_WORDS_BIG_ENDIAN
1037 return GEN_INT (i == WORDS_BIG_ENDIAN
1038 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1040 return GEN_INT (i != WORDS_BIG_ENDIAN
1041 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1044 #endif /* no REAL_ARITHMETIC */
1046 /* Single word float is a little harder, since single- and double-word
1047 values often do not have the same high-order bits. We have already
1048 verified that we want the only defined word of the single-word value. */
1049 #ifdef REAL_ARITHMETIC
1050 if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1051 && GET_MODE_CLASS (mode) == MODE_FLOAT
1052 && GET_MODE_BITSIZE (mode) == 32
1053 && GET_CODE (op) == CONST_DOUBLE)
1058 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1059 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1063 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1064 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1065 || flag_pretend_float)
1066 && GET_MODE_CLASS (mode) == MODE_FLOAT
1067 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1068 && GET_CODE (op) == CONST_DOUBLE)
1071 union {float f; HOST_WIDE_INT i; } u;
1073 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1076 return GEN_INT (u.i);
1078 #endif /* no REAL_ARITHMETIC */
1080 /* The only remaining cases that we can handle are integers.
1081 Convert to proper endianness now since these cases need it.
1082 At this point, i == 0 means the low-order word.
1084 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1085 in general. However, if OP is (const_int 0), we can just return
1088 if (op == const0_rtx)
1091 if (GET_MODE_CLASS (mode) != MODE_INT
1092 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1093 || BITS_PER_WORD > HOST_BITS_PER_INT)
1096 if (WORDS_BIG_ENDIAN)
1097 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1099 /* Find out which word on the host machine this value is in and get
1100 it from the constant. */
1101 val = (i / size_ratio == 0
1102 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1103 : (GET_CODE (op) == CONST_INT
1104 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1106 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1107 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1108 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
1109 & (((HOST_WIDE_INT) 1
1110 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
1112 return GEN_INT (val);
1115 /* Similar to `operand_subword', but never return 0. If we can't extract
1116 the required subword, put OP into a register and try again. If that fails,
1117 abort. We always validate the address in this case. It is not valid
1118 to call this function after reload; it is mostly meant for RTL
1121 MODE is the mode of OP, in case it is CONST_INT. */
1124 operand_subword_force (op, i, mode)
1127 enum machine_mode mode;
1129 rtx result = operand_subword (op, i, 1, mode);
1134 if (mode != BLKmode && mode != VOIDmode)
1135 op = force_reg (mode, op);
1137 result = operand_subword (op, i, 1, mode);
1144 /* Given a compare instruction, swap the operands.
1145 A test instruction is changed into a compare of 0 against the operand. */
1148 reverse_comparison (insn)
1151 rtx body = PATTERN (insn);
1154 if (GET_CODE (body) == SET)
1155 comp = SET_SRC (body);
1157 comp = SET_SRC (XVECEXP (body, 0, 0));
1159 if (GET_CODE (comp) == COMPARE)
1161 rtx op0 = XEXP (comp, 0);
1162 rtx op1 = XEXP (comp, 1);
1163 XEXP (comp, 0) = op1;
1164 XEXP (comp, 1) = op0;
1168 rtx new = gen_rtx (COMPARE, VOIDmode,
1169 CONST0_RTX (GET_MODE (comp)), comp);
1170 if (GET_CODE (body) == SET)
1171 SET_SRC (body) = new;
1173 SET_SRC (XVECEXP (body, 0, 0)) = new;
1177 /* Return a memory reference like MEMREF, but with its mode changed
1178 to MODE and its address changed to ADDR.
1179 (VOIDmode means don't change the mode.
1180 NULL for ADDR means don't change the address.) */
1183 change_address (memref, mode, addr)
1185 enum machine_mode mode;
1190 if (GET_CODE (memref) != MEM)
1192 if (mode == VOIDmode)
1193 mode = GET_MODE (memref);
1195 addr = XEXP (memref, 0);
1197 /* If reload is in progress or has completed, ADDR must be valid.
1198 Otherwise, we can call memory_address to make it valid. */
1199 if (reload_completed || reload_in_progress)
1201 if (! memory_address_p (mode, addr))
1205 addr = memory_address (mode, addr);
1207 new = gen_rtx (MEM, mode, addr);
1208 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1209 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1210 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1214 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1219 register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0,
1220 label_num++, NULL_PTR);
1221 LABEL_NUSES (label) = 0;
1225 /* For procedure integration. */
1227 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1228 from a permanent obstack when the opportunity arises. */
1231 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1232 last_labelno, max_parm_regnum, max_regnum, args_size,
1233 pops_args, stack_slots, function_flags,
1234 outgoing_args_size, original_arg_vector,
1235 original_decl_initial)
1236 rtx first_insn, first_parm_insn;
1237 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1241 int outgoing_args_size;
1242 rtvec original_arg_vector;
1243 rtx original_decl_initial;
1245 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
1246 cur_insn_uid++, NULL_RTX,
1247 first_insn, first_parm_insn,
1248 first_labelno, last_labelno,
1249 max_parm_regnum, max_regnum, args_size, pops_args,
1250 stack_slots, function_flags, outgoing_args_size,
1251 original_arg_vector, original_decl_initial);
1255 /* Install new pointers to the first and last insns in the chain.
1256 Used for an inline-procedure after copying the insn chain. */
1259 set_new_first_and_last_insn (first, last)
1266 /* Set the range of label numbers found in the current function.
1267 This is used when belatedly compiling an inline function. */
1270 set_new_first_and_last_label_num (first, last)
1273 base_label_num = label_num;
1274 first_label_num = first;
1275 last_label_num = last;
1278 /* Save all variables describing the current status into the structure *P.
1279 This is used before starting a nested function. */
1282 save_emit_status (p)
1285 p->reg_rtx_no = reg_rtx_no;
1286 p->first_label_num = first_label_num;
1287 p->first_insn = first_insn;
1288 p->last_insn = last_insn;
1289 p->sequence_stack = sequence_stack;
1290 p->cur_insn_uid = cur_insn_uid;
1291 p->last_linenum = last_linenum;
1292 p->last_filename = last_filename;
1293 p->regno_pointer_flag = regno_pointer_flag;
1294 p->regno_pointer_flag_length = regno_pointer_flag_length;
1295 p->regno_reg_rtx = regno_reg_rtx;
1298 /* Restore all variables describing the current status from the structure *P.
1299 This is used after a nested function. */
1302 restore_emit_status (p)
1307 reg_rtx_no = p->reg_rtx_no;
1308 first_label_num = p->first_label_num;
1310 first_insn = p->first_insn;
1311 last_insn = p->last_insn;
1312 sequence_stack = p->sequence_stack;
1313 cur_insn_uid = p->cur_insn_uid;
1314 last_linenum = p->last_linenum;
1315 last_filename = p->last_filename;
1316 regno_pointer_flag = p->regno_pointer_flag;
1317 regno_pointer_flag_length = p->regno_pointer_flag_length;
1318 regno_reg_rtx = p->regno_reg_rtx;
1320 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1321 sequence_element_free_list = 0;
1322 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1323 sequence_result[i] = 0;
1326 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1327 It does not work to do this twice, because the mark bits set here
1328 are not cleared afterwards. */
1331 unshare_all_rtl (insn)
1334 for (; insn; insn = NEXT_INSN (insn))
1335 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1336 || GET_CODE (insn) == CALL_INSN)
1338 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1339 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1340 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1343 /* Make sure the addresses of stack slots found outside the insn chain
1344 (such as, in DECL_RTL of a variable) are not shared
1345 with the insn chain.
1347 This special care is necessary when the stack slot MEM does not
1348 actually appear in the insn chain. If it does appear, its address
1349 is unshared from all else at that point. */
1351 copy_rtx_if_shared (stack_slot_list);
1354 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1355 Recursively does the same for subexpressions. */
1358 copy_rtx_if_shared (orig)
1361 register rtx x = orig;
1363 register enum rtx_code code;
1364 register char *format_ptr;
1370 code = GET_CODE (x);
1372 /* These types may be freely shared. */
1385 /* SCRATCH must be shared because they represent distinct values. */
1389 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1390 a LABEL_REF, it isn't sharable. */
1391 if (GET_CODE (XEXP (x, 0)) == PLUS
1392 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1393 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1403 /* The chain of insns is not being copied. */
1407 /* A MEM is allowed to be shared if its address is constant
1408 or is a constant plus one of the special registers. */
1409 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1410 || XEXP (x, 0) == virtual_stack_vars_rtx
1411 || XEXP (x, 0) == virtual_incoming_args_rtx)
1414 if (GET_CODE (XEXP (x, 0)) == PLUS
1415 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1416 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1417 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1419 /* This MEM can appear in more than one place,
1420 but its address better not be shared with anything else. */
1422 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1428 /* This rtx may not be shared. If it has already been seen,
1429 replace it with a copy of itself. */
1435 copy = rtx_alloc (code);
1436 bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld)
1437 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1443 /* Now scan the subexpressions recursively.
1444 We can store any replaced subexpressions directly into X
1445 since we know X is not shared! Any vectors in X
1446 must be copied if X was copied. */
1448 format_ptr = GET_RTX_FORMAT (code);
1450 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1452 switch (*format_ptr++)
1455 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1459 if (XVEC (x, i) != NULL)
1462 int len = XVECLEN (x, i);
1464 if (copied && len > 0)
1465 XVEC (x, i) = gen_rtvec_v (len, &XVECEXP (x, i, 0));
1466 for (j = 0; j < len; j++)
1467 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1475 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1476 to look for shared sub-parts. */
1479 reset_used_flags (x)
1483 register enum rtx_code code;
1484 register char *format_ptr;
1490 code = GET_CODE (x);
1492 /* These types may be freely shared so we needn't do any reseting
1513 /* The chain of insns is not being copied. */
1519 format_ptr = GET_RTX_FORMAT (code);
1520 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1522 switch (*format_ptr++)
1525 reset_used_flags (XEXP (x, i));
1529 for (j = 0; j < XVECLEN (x, i); j++)
1530 reset_used_flags (XVECEXP (x, i, j));
1536 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1537 Return X or the rtx for the pseudo reg the value of X was copied into.
1538 OTHER must be valid as a SET_DEST. */
1541 make_safe_from (x, other)
1545 switch (GET_CODE (other))
1548 other = SUBREG_REG (other);
1550 case STRICT_LOW_PART:
1553 other = XEXP (other, 0);
1559 if ((GET_CODE (other) == MEM
1561 && GET_CODE (x) != REG
1562 && GET_CODE (x) != SUBREG)
1563 || (GET_CODE (other) == REG
1564 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1565 || reg_mentioned_p (other, x))))
1567 rtx temp = gen_reg_rtx (GET_MODE (x));
1568 emit_move_insn (temp, x);
1574 /* Emission of insns (adding them to the doubly-linked list). */
1576 /* Return the first insn of the current sequence or current function. */
1584 /* Return the last insn emitted in current sequence or current function. */
1592 /* Specify a new insn as the last in the chain. */
1595 set_last_insn (insn)
1598 if (NEXT_INSN (insn) != 0)
1603 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1606 get_last_insn_anywhere ()
1608 struct sequence_stack *stack;
1611 for (stack = sequence_stack; stack; stack = stack->next)
1612 if (stack->last != 0)
1617 /* Return a number larger than any instruction's uid in this function. */
1622 return cur_insn_uid;
1625 /* Return the next insn. If it is a SEQUENCE, return the first insn
1634 insn = NEXT_INSN (insn);
1635 if (insn && GET_CODE (insn) == INSN
1636 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1637 insn = XVECEXP (PATTERN (insn), 0, 0);
1643 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1647 previous_insn (insn)
1652 insn = PREV_INSN (insn);
1653 if (insn && GET_CODE (insn) == INSN
1654 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1655 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1661 /* Return the next insn after INSN that is not a NOTE. This routine does not
1662 look inside SEQUENCEs. */
1665 next_nonnote_insn (insn)
1670 insn = NEXT_INSN (insn);
1671 if (insn == 0 || GET_CODE (insn) != NOTE)
1678 /* Return the previous insn before INSN that is not a NOTE. This routine does
1679 not look inside SEQUENCEs. */
1682 prev_nonnote_insn (insn)
1687 insn = PREV_INSN (insn);
1688 if (insn == 0 || GET_CODE (insn) != NOTE)
1695 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1696 or 0, if there is none. This routine does not look inside
1700 next_real_insn (insn)
1705 insn = NEXT_INSN (insn);
1706 if (insn == 0 || GET_CODE (insn) == INSN
1707 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1714 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1715 or 0, if there is none. This routine does not look inside
1719 prev_real_insn (insn)
1724 insn = PREV_INSN (insn);
1725 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1726 || GET_CODE (insn) == JUMP_INSN)
1733 /* Find the next insn after INSN that really does something. This routine
1734 does not look inside SEQUENCEs. Until reload has completed, this is the
1735 same as next_real_insn. */
1738 next_active_insn (insn)
1743 insn = NEXT_INSN (insn);
1745 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1746 || (GET_CODE (insn) == INSN
1747 && (! reload_completed
1748 || (GET_CODE (PATTERN (insn)) != USE
1749 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1756 /* Find the last insn before INSN that really does something. This routine
1757 does not look inside SEQUENCEs. Until reload has completed, this is the
1758 same as prev_real_insn. */
1761 prev_active_insn (insn)
1766 insn = PREV_INSN (insn);
1768 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1769 || (GET_CODE (insn) == INSN
1770 && (! reload_completed
1771 || (GET_CODE (PATTERN (insn)) != USE
1772 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1779 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1787 insn = NEXT_INSN (insn);
1788 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1795 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1803 insn = PREV_INSN (insn);
1804 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1812 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1813 and REG_CC_USER notes so we can find it. */
1816 link_cc0_insns (insn)
1819 rtx user = next_nonnote_insn (insn);
1821 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
1822 user = XVECEXP (PATTERN (user), 0, 0);
1824 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
1826 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
1829 /* Return the next insn that uses CC0 after INSN, which is assumed to
1830 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1831 applied to the result of this function should yield INSN).
1833 Normally, this is simply the next insn. However, if a REG_CC_USER note
1834 is present, it contains the insn that uses CC0.
1836 Return 0 if we can't find the insn. */
1839 next_cc0_user (insn)
1842 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
1845 return XEXP (note, 0);
1847 insn = next_nonnote_insn (insn);
1848 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1849 insn = XVECEXP (PATTERN (insn), 0, 0);
1851 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1852 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
1858 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1859 note, it is the previous insn. */
1862 prev_cc0_setter (insn)
1865 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1869 return XEXP (note, 0);
1871 insn = prev_nonnote_insn (insn);
1872 if (! sets_cc0_p (PATTERN (insn)))
1879 /* Try splitting insns that can be split for better scheduling.
1880 PAT is the pattern which might split.
1881 TRIAL is the insn providing PAT.
1882 BACKWARDS is non-zero if we are scanning insns from last to first.
1884 If this routine succeeds in splitting, it returns the first or last
1885 replacement insn depending on the value of BACKWARDS. Otherwise, it
1886 returns TRIAL. If the insn to be returned can be split, it will be. */
1889 try_split (pat, trial, backwards)
1893 rtx before = PREV_INSN (trial);
1894 rtx after = NEXT_INSN (trial);
1895 rtx seq = split_insns (pat, trial);
1896 int has_barrier = 0;
1899 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
1900 We may need to handle this specially. */
1901 if (after && GET_CODE (after) == BARRIER)
1904 after = NEXT_INSN (after);
1909 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
1910 The latter case will normally arise only when being done so that
1911 it, in turn, will be split (SFmode on the 29k is an example). */
1912 if (GET_CODE (seq) == SEQUENCE)
1914 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
1915 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
1916 increment the usage count so we don't delete the label. */
1919 if (GET_CODE (trial) == JUMP_INSN)
1920 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
1921 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
1923 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
1925 if (JUMP_LABEL (trial))
1926 LABEL_NUSES (JUMP_LABEL (trial))++;
1929 tem = emit_insn_after (seq, before);
1931 delete_insn (trial);
1933 emit_barrier_after (tem);
1935 /* Avoid infinite loop if the result matches the original pattern. */
1936 else if (rtx_equal_p (seq, pat))
1940 PATTERN (trial) = seq;
1941 INSN_CODE (trial) = -1;
1944 /* Set TEM to the insn we should return. */
1945 tem = backwards ? prev_active_insn (after) : next_active_insn (before);
1946 return try_split (PATTERN (tem), tem, backwards);
1952 /* Make and return an INSN rtx, initializing all its slots.
1953 Store PATTERN in the pattern slots. */
1956 make_insn_raw (pattern)
1961 insn = rtx_alloc (INSN);
1962 INSN_UID (insn) = cur_insn_uid++;
1964 PATTERN (insn) = pattern;
1965 INSN_CODE (insn) = -1;
1966 LOG_LINKS (insn) = NULL;
1967 REG_NOTES (insn) = NULL;
1972 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
1975 make_jump_insn_raw (pattern)
1980 insn = rtx_alloc (JUMP_INSN);
1981 INSN_UID (insn) = cur_insn_uid++;
1983 PATTERN (insn) = pattern;
1984 INSN_CODE (insn) = -1;
1985 LOG_LINKS (insn) = NULL;
1986 REG_NOTES (insn) = NULL;
1987 JUMP_LABEL (insn) = NULL;
1992 /* Add INSN to the end of the doubly-linked list.
1993 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
1999 PREV_INSN (insn) = last_insn;
2000 NEXT_INSN (insn) = 0;
2002 if (NULL != last_insn)
2003 NEXT_INSN (last_insn) = insn;
2005 if (NULL == first_insn)
2011 /* Add INSN into the doubly-linked list after insn AFTER. This should be the
2012 only function called to insert an insn once delay slots have been filled
2013 since only it knows how to update a SEQUENCE. */
2016 add_insn_after (insn, after)
2019 rtx next = NEXT_INSN (after);
2021 NEXT_INSN (insn) = next;
2022 PREV_INSN (insn) = after;
2026 PREV_INSN (next) = insn;
2027 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2028 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2030 else if (last_insn == after)
2034 struct sequence_stack *stack = sequence_stack;
2035 /* Scan all pending sequences too. */
2036 for (; stack; stack = stack->next)
2037 if (after == stack->last)
2041 NEXT_INSN (after) = insn;
2042 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2044 rtx sequence = PATTERN (after);
2045 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2049 /* Delete all insns made since FROM.
2050 FROM becomes the new last instruction. */
2053 delete_insns_since (from)
2059 NEXT_INSN (from) = 0;
2063 /* Move a consecutive bunch of insns to a different place in the chain.
2064 The insns to be moved are those between FROM and TO.
2065 They are moved to a new position after the insn AFTER.
2066 AFTER must not be FROM or TO or any insn in between.
2068 This function does not know about SEQUENCEs and hence should not be
2069 called after delay-slot filling has been done. */
2072 reorder_insns (from, to, after)
2073 rtx from, to, after;
2075 /* Splice this bunch out of where it is now. */
2076 if (PREV_INSN (from))
2077 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2079 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2080 if (last_insn == to)
2081 last_insn = PREV_INSN (from);
2082 if (first_insn == from)
2083 first_insn = NEXT_INSN (to);
2085 /* Make the new neighbors point to it and it to them. */
2086 if (NEXT_INSN (after))
2087 PREV_INSN (NEXT_INSN (after)) = to;
2089 NEXT_INSN (to) = NEXT_INSN (after);
2090 PREV_INSN (from) = after;
2091 NEXT_INSN (after) = from;
2092 if (after == last_insn)
2096 /* Return the line note insn preceding INSN. */
2099 find_line_note (insn)
2102 if (no_line_numbers)
2105 for (; insn; insn = PREV_INSN (insn))
2106 if (GET_CODE (insn) == NOTE
2107 && NOTE_LINE_NUMBER (insn) >= 0)
2113 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2114 of the moved insns when debugging. This may insert a note between AFTER
2115 and FROM, and another one after TO. */
2118 reorder_insns_with_line_notes (from, to, after)
2119 rtx from, to, after;
2121 rtx from_line = find_line_note (from);
2122 rtx after_line = find_line_note (after);
2124 reorder_insns (from, to, after);
2126 if (from_line == after_line)
2130 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2131 NOTE_LINE_NUMBER (from_line),
2134 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2135 NOTE_LINE_NUMBER (after_line),
2139 /* Emit an insn of given code and pattern
2140 at a specified place within the doubly-linked list. */
2142 /* Make an instruction with body PATTERN
2143 and output it before the instruction BEFORE. */
2146 emit_insn_before (pattern, before)
2147 register rtx pattern, before;
2149 register rtx insn = before;
2151 if (GET_CODE (pattern) == SEQUENCE)
2155 for (i = 0; i < XVECLEN (pattern, 0); i++)
2157 insn = XVECEXP (pattern, 0, i);
2158 add_insn_after (insn, PREV_INSN (before));
2160 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2161 sequence_result[XVECLEN (pattern, 0)] = pattern;
2165 insn = make_insn_raw (pattern);
2166 add_insn_after (insn, PREV_INSN (before));
2172 /* Make an instruction with body PATTERN and code JUMP_INSN
2173 and output it before the instruction BEFORE. */
2176 emit_jump_insn_before (pattern, before)
2177 register rtx pattern, before;
2181 if (GET_CODE (pattern) == SEQUENCE)
2182 insn = emit_insn_before (pattern, before);
2185 insn = make_jump_insn_raw (pattern);
2186 add_insn_after (insn, PREV_INSN (before));
2192 /* Make an instruction with body PATTERN and code CALL_INSN
2193 and output it before the instruction BEFORE. */
2196 emit_call_insn_before (pattern, before)
2197 register rtx pattern, before;
2199 rtx insn = emit_insn_before (pattern, before);
2200 PUT_CODE (insn, CALL_INSN);
2204 /* Make an insn of code BARRIER
2205 and output it before the insn AFTER. */
2208 emit_barrier_before (before)
2209 register rtx before;
2211 register rtx insn = rtx_alloc (BARRIER);
2213 INSN_UID (insn) = cur_insn_uid++;
2215 add_insn_after (insn, PREV_INSN (before));
2219 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2222 emit_note_before (subtype, before)
2226 register rtx note = rtx_alloc (NOTE);
2227 INSN_UID (note) = cur_insn_uid++;
2228 NOTE_SOURCE_FILE (note) = 0;
2229 NOTE_LINE_NUMBER (note) = subtype;
2231 add_insn_after (note, PREV_INSN (before));
2235 /* Make an insn of code INSN with body PATTERN
2236 and output it after the insn AFTER. */
2239 emit_insn_after (pattern, after)
2240 register rtx pattern, after;
2242 register rtx insn = after;
2244 if (GET_CODE (pattern) == SEQUENCE)
2248 for (i = 0; i < XVECLEN (pattern, 0); i++)
2250 insn = XVECEXP (pattern, 0, i);
2251 add_insn_after (insn, after);
2254 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2255 sequence_result[XVECLEN (pattern, 0)] = pattern;
2259 insn = make_insn_raw (pattern);
2260 add_insn_after (insn, after);
2266 /* Similar to emit_insn_after, except that line notes are to be inserted so
2267 as to act as if this insn were at FROM. */
2270 emit_insn_after_with_line_notes (pattern, after, from)
2271 rtx pattern, after, from;
2273 rtx from_line = find_line_note (from);
2274 rtx after_line = find_line_note (after);
2275 rtx insn = emit_insn_after (pattern, after);
2278 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2279 NOTE_LINE_NUMBER (from_line),
2283 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2284 NOTE_LINE_NUMBER (after_line),
2288 /* Make an insn of code JUMP_INSN with body PATTERN
2289 and output it after the insn AFTER. */
2292 emit_jump_insn_after (pattern, after)
2293 register rtx pattern, after;
2297 if (GET_CODE (pattern) == SEQUENCE)
2298 insn = emit_insn_after (pattern, after);
2301 insn = make_jump_insn_raw (pattern);
2302 add_insn_after (insn, after);
2308 /* Make an insn of code BARRIER
2309 and output it after the insn AFTER. */
2312 emit_barrier_after (after)
2315 register rtx insn = rtx_alloc (BARRIER);
2317 INSN_UID (insn) = cur_insn_uid++;
2319 add_insn_after (insn, after);
2323 /* Emit the label LABEL after the insn AFTER. */
2326 emit_label_after (label, after)
2329 /* This can be called twice for the same label
2330 as a result of the confusion that follows a syntax error!
2331 So make it harmless. */
2332 if (INSN_UID (label) == 0)
2334 INSN_UID (label) = cur_insn_uid++;
2335 add_insn_after (label, after);
2341 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2344 emit_note_after (subtype, after)
2348 register rtx note = rtx_alloc (NOTE);
2349 INSN_UID (note) = cur_insn_uid++;
2350 NOTE_SOURCE_FILE (note) = 0;
2351 NOTE_LINE_NUMBER (note) = subtype;
2352 add_insn_after (note, after);
2356 /* Emit a line note for FILE and LINE after the insn AFTER. */
2359 emit_line_note_after (file, line, after)
2366 if (no_line_numbers && line > 0)
2372 note = rtx_alloc (NOTE);
2373 INSN_UID (note) = cur_insn_uid++;
2374 NOTE_SOURCE_FILE (note) = file;
2375 NOTE_LINE_NUMBER (note) = line;
2376 add_insn_after (note, after);
2380 /* Make an insn of code INSN with pattern PATTERN
2381 and add it to the end of the doubly-linked list.
2382 If PATTERN is a SEQUENCE, take the elements of it
2383 and emit an insn for each element.
2385 Returns the last insn emitted. */
2391 rtx insn = last_insn;
2393 if (GET_CODE (pattern) == SEQUENCE)
2397 for (i = 0; i < XVECLEN (pattern, 0); i++)
2399 insn = XVECEXP (pattern, 0, i);
2402 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2403 sequence_result[XVECLEN (pattern, 0)] = pattern;
2407 insn = make_insn_raw (pattern);
2414 /* Emit the insns in a chain starting with INSN.
2415 Return the last insn emitted. */
2425 rtx next = NEXT_INSN (insn);
2434 /* Emit the insns in a chain starting with INSN and place them in front of
2435 the insn BEFORE. Return the last insn emitted. */
2438 emit_insns_before (insn, before)
2446 rtx next = NEXT_INSN (insn);
2447 add_insn_after (insn, PREV_INSN (before));
2455 /* Emit the insns in a chain starting with FIRST and place them in back of
2456 the insn AFTER. Return the last insn emitted. */
2459 emit_insns_after (first, after)
2464 register rtx after_after;
2472 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2475 after_after = NEXT_INSN (after);
2477 NEXT_INSN (after) = first;
2478 PREV_INSN (first) = after;
2479 NEXT_INSN (last) = after_after;
2481 PREV_INSN (after_after) = last;
2483 if (after == last_insn)
2488 /* Make an insn of code JUMP_INSN with pattern PATTERN
2489 and add it to the end of the doubly-linked list. */
2492 emit_jump_insn (pattern)
2495 if (GET_CODE (pattern) == SEQUENCE)
2496 return emit_insn (pattern);
2499 register rtx insn = make_jump_insn_raw (pattern);
2505 /* Make an insn of code CALL_INSN with pattern PATTERN
2506 and add it to the end of the doubly-linked list. */
2509 emit_call_insn (pattern)
2512 if (GET_CODE (pattern) == SEQUENCE)
2513 return emit_insn (pattern);
2516 register rtx insn = make_insn_raw (pattern);
2518 PUT_CODE (insn, CALL_INSN);
2523 /* Add the label LABEL to the end of the doubly-linked list. */
2529 /* This can be called twice for the same label
2530 as a result of the confusion that follows a syntax error!
2531 So make it harmless. */
2532 if (INSN_UID (label) == 0)
2534 INSN_UID (label) = cur_insn_uid++;
2540 /* Make an insn of code BARRIER
2541 and add it to the end of the doubly-linked list. */
2546 register rtx barrier = rtx_alloc (BARRIER);
2547 INSN_UID (barrier) = cur_insn_uid++;
2552 /* Make an insn of code NOTE
2553 with data-fields specified by FILE and LINE
2554 and add it to the end of the doubly-linked list,
2555 but only if line-numbers are desired for debugging info. */
2558 emit_line_note (file, line)
2562 emit_filename = file;
2566 if (no_line_numbers)
2570 return emit_note (file, line);
2573 /* Make an insn of code NOTE
2574 with data-fields specified by FILE and LINE
2575 and add it to the end of the doubly-linked list.
2576 If it is a line-number NOTE, omit it if it matches the previous one. */
2579 emit_note (file, line)
2587 if (file && last_filename && !strcmp (file, last_filename)
2588 && line == last_linenum)
2590 last_filename = file;
2591 last_linenum = line;
2594 if (no_line_numbers && line > 0)
2600 note = rtx_alloc (NOTE);
2601 INSN_UID (note) = cur_insn_uid++;
2602 NOTE_SOURCE_FILE (note) = file;
2603 NOTE_LINE_NUMBER (note) = line;
2608 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2611 emit_line_note_force (file, line)
2616 return emit_line_note (file, line);
2619 /* Cause next statement to emit a line note even if the line number
2620 has not changed. This is used at the beginning of a function. */
2623 force_next_line_note ()
2628 /* Return an indication of which type of insn should have X as a body.
2629 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2635 if (GET_CODE (x) == CODE_LABEL)
2637 if (GET_CODE (x) == CALL)
2639 if (GET_CODE (x) == RETURN)
2641 if (GET_CODE (x) == SET)
2643 if (SET_DEST (x) == pc_rtx)
2645 else if (GET_CODE (SET_SRC (x)) == CALL)
2650 if (GET_CODE (x) == PARALLEL)
2653 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2654 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2656 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2657 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2659 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2660 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2666 /* Emit the rtl pattern X as an appropriate kind of insn.
2667 If X is a label, it is simply added into the insn chain. */
2673 enum rtx_code code = classify_insn (x);
2675 if (code == CODE_LABEL)
2676 return emit_label (x);
2677 else if (code == INSN)
2678 return emit_insn (x);
2679 else if (code == JUMP_INSN)
2681 register rtx insn = emit_jump_insn (x);
2682 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2683 return emit_barrier ();
2686 else if (code == CALL_INSN)
2687 return emit_call_insn (x);
2692 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2697 struct sequence_stack *tem;
2699 if (sequence_element_free_list)
2701 /* Reuse a previously-saved struct sequence_stack. */
2702 tem = sequence_element_free_list;
2703 sequence_element_free_list = tem->next;
2706 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
2708 tem->next = sequence_stack;
2709 tem->first = first_insn;
2710 tem->last = last_insn;
2712 sequence_stack = tem;
2718 /* Set up the insn chain starting with FIRST
2719 as the current sequence, saving the previously current one. */
2722 push_to_sequence (first)
2729 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
2735 /* Set up the outer-level insn chain
2736 as the current sequence, saving the previously current one. */
2739 push_topmost_sequence ()
2741 struct sequence_stack *stack, *top;
2745 for (stack = sequence_stack; stack; stack = stack->next)
2748 first_insn = top->first;
2749 last_insn = top->last;
2752 /* After emitting to the outer-level insn chain, update the outer-level
2753 insn chain, and restore the previous saved state. */
2756 pop_topmost_sequence ()
2758 struct sequence_stack *stack, *top;
2760 for (stack = sequence_stack; stack; stack = stack->next)
2763 top->first = first_insn;
2764 top->last = last_insn;
2769 /* After emitting to a sequence, restore previous saved state.
2771 To get the contents of the sequence just made,
2772 you must call `gen_sequence' *before* calling here. */
2777 struct sequence_stack *tem = sequence_stack;
2779 first_insn = tem->first;
2780 last_insn = tem->last;
2781 sequence_stack = tem->next;
2783 tem->next = sequence_element_free_list;
2784 sequence_element_free_list = tem;
2787 /* Return 1 if currently emitting into a sequence. */
2792 return sequence_stack != 0;
2795 /* Generate a SEQUENCE rtx containing the insns already emitted
2796 to the current sequence.
2798 This is how the gen_... function from a DEFINE_EXPAND
2799 constructs the SEQUENCE that it returns. */
2810 /* Count the insns in the chain. */
2812 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
2815 /* If only one insn, return its pattern rather than a SEQUENCE.
2816 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
2817 the case of an empty list.) */
2819 && (GET_CODE (first_insn) == INSN
2820 || GET_CODE (first_insn) == JUMP_INSN
2821 || GET_CODE (first_insn) == CALL_INSN))
2822 return PATTERN (first_insn);
2824 /* Put them in a vector. See if we already have a SEQUENCE of the
2825 appropriate length around. */
2826 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
2827 sequence_result[len] = 0;
2830 /* Ensure that this rtl goes in saveable_obstack, since we may be
2832 push_obstacks_nochange ();
2833 rtl_in_saveable_obstack ();
2834 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
2838 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
2839 XVECEXP (result, 0, i) = tem;
2844 /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
2845 according to the chain of insns starting with FIRST.
2847 Also set cur_insn_uid to exceed the largest uid in that chain.
2849 This is used when an inline function's rtl is saved
2850 and passed to rest_of_compilation later. */
2852 static void restore_reg_data_1 ();
2855 restore_reg_data (first)
2860 register int max_uid = 0;
2862 for (insn = first; insn; insn = NEXT_INSN (insn))
2864 if (INSN_UID (insn) >= max_uid)
2865 max_uid = INSN_UID (insn);
2867 switch (GET_CODE (insn))
2877 restore_reg_data_1 (PATTERN (insn));
2882 /* Don't duplicate the uids already in use. */
2883 cur_insn_uid = max_uid + 1;
2885 /* If any regs are missing, make them up.
2887 ??? word_mode is not necessarily the right mode. Most likely these REGs
2888 are never used. At some point this should be checked. */
2890 for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++)
2891 if (regno_reg_rtx[i] == 0)
2892 regno_reg_rtx[i] = gen_rtx (REG, word_mode, i);
2896 restore_reg_data_1 (orig)
2899 register rtx x = orig;
2901 register enum rtx_code code;
2902 register char *format_ptr;
2904 code = GET_CODE (x);
2919 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
2921 /* Make sure regno_pointer_flag and regno_reg_rtx are large
2922 enough to have an element for this pseudo reg number. */
2923 if (REGNO (x) >= reg_rtx_no)
2925 reg_rtx_no = REGNO (x);
2927 if (reg_rtx_no >= regno_pointer_flag_length)
2929 int newlen = MAX (regno_pointer_flag_length * 2,
2932 char *new = (char *) oballoc (newlen);
2933 bzero (new, newlen);
2934 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
2936 new1 = (rtx *) oballoc (newlen * sizeof (rtx));
2937 bzero (new1, newlen * sizeof (rtx));
2938 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
2940 regno_pointer_flag = new;
2941 regno_reg_rtx = new1;
2942 regno_pointer_flag_length = newlen;
2946 regno_reg_rtx[REGNO (x)] = x;
2951 if (GET_CODE (XEXP (x, 0)) == REG)
2952 mark_reg_pointer (XEXP (x, 0));
2953 restore_reg_data_1 (XEXP (x, 0));
2957 /* Now scan the subexpressions recursively. */
2959 format_ptr = GET_RTX_FORMAT (code);
2961 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2963 switch (*format_ptr++)
2966 restore_reg_data_1 (XEXP (x, i));
2970 if (XVEC (x, i) != NULL)
2974 for (j = 0; j < XVECLEN (x, i); j++)
2975 restore_reg_data_1 (XVECEXP (x, i, j));
2982 /* Initialize data structures and variables in this file
2983 before generating rtl for each function. */
2993 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
2996 first_label_num = label_num;
2998 sequence_stack = NULL;
3000 /* Clear the start_sequence/gen_sequence cache. */
3001 sequence_element_free_list = 0;
3002 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3003 sequence_result[i] = 0;
3005 /* Init the tables that describe all the pseudo regs. */
3007 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3010 = (char *) oballoc (regno_pointer_flag_length);
3011 bzero (regno_pointer_flag, regno_pointer_flag_length);
3014 = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx));
3015 bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3017 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3018 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3019 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3020 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3021 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3023 /* Indicate that the virtual registers and stack locations are
3025 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3026 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3027 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3029 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3030 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3031 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3032 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3034 #ifdef INIT_EXPANDERS
3039 /* Create some permanent unique rtl objects shared between all functions.
3040 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3043 init_emit_once (line_numbers)
3047 enum machine_mode mode;
3049 no_line_numbers = ! line_numbers;
3051 sequence_stack = NULL;
3053 /* Create the unique rtx's for certain rtx codes and operand values. */
3055 pc_rtx = gen_rtx (PC, VOIDmode);
3056 cc0_rtx = gen_rtx (CC0, VOIDmode);
3058 /* Don't use gen_rtx here since gen_rtx in this case
3059 tries to use these variables. */
3060 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3062 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
3063 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3064 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3067 /* These four calls obtain some of the rtx expressions made above. */
3068 const0_rtx = GEN_INT (0);
3069 const1_rtx = GEN_INT (1);
3070 const2_rtx = GEN_INT (2);
3071 constm1_rtx = GEN_INT (-1);
3073 /* This will usually be one of the above constants, but may be a new rtx. */
3074 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
3076 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3077 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3078 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3079 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3081 for (i = 0; i <= 2; i++)
3083 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3084 mode = GET_MODE_WIDER_MODE (mode))
3086 rtx tem = rtx_alloc (CONST_DOUBLE);
3087 union real_extract u;
3089 bzero (&u, sizeof u); /* Zero any holes in a structure. */
3090 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3092 bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u);
3093 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3094 PUT_MODE (tem, mode);
3096 const_tiny_rtx[i][(int) mode] = tem;
3099 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3101 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3102 mode = GET_MODE_WIDER_MODE (mode))
3103 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3105 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3107 mode = GET_MODE_WIDER_MODE (mode))
3108 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3111 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3112 mode = GET_MODE_WIDER_MODE (mode))
3113 const_tiny_rtx[0][(int) mode] = const0_rtx;
3115 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
3116 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
3118 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3119 arg_pointer_rtx = frame_pointer_rtx;
3120 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
3121 arg_pointer_rtx = stack_pointer_rtx;
3123 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
3125 /* Create the virtual registers. Do so here since the following objects
3126 might reference them. */
3128 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
3129 VIRTUAL_INCOMING_ARGS_REGNUM);
3130 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
3131 VIRTUAL_STACK_VARS_REGNUM);
3132 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
3133 VIRTUAL_STACK_DYNAMIC_REGNUM);
3134 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
3135 VIRTUAL_OUTGOING_ARGS_REGNUM);
3138 struct_value_rtx = STRUCT_VALUE;
3140 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
3143 #ifdef STRUCT_VALUE_INCOMING
3144 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3146 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3147 struct_value_incoming_rtx
3148 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3150 struct_value_incoming_rtx = struct_value_rtx;
3154 #ifdef STATIC_CHAIN_REGNUM
3155 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
3157 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3158 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3159 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3162 static_chain_incoming_rtx = static_chain_rtx;
3166 static_chain_rtx = STATIC_CHAIN;
3168 #ifdef STATIC_CHAIN_INCOMING
3169 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3171 static_chain_incoming_rtx = static_chain_rtx;
3175 #ifdef PIC_OFFSET_TABLE_REGNUM
3176 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);