1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_last_label_num was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl[GR_MAX];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
100 rtx (*gen_lowpart) (enum machine_mode mode, rtx x) = gen_lowpart_general;
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconst3;
114 REAL_VALUE_TYPE dconst10;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconstm2;
117 REAL_VALUE_TYPE dconsthalf;
118 REAL_VALUE_TYPE dconstthird;
119 REAL_VALUE_TYPE dconstpi;
120 REAL_VALUE_TYPE dconste;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_int_htab;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
163 htab_t mem_attrs_htab;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
167 htab_t reg_attrs_htab;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
171 htab_t const_double_htab;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx make_jump_insn_raw (rtx);
180 static rtx make_call_insn_raw (rtx);
181 static rtx find_line_note (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void unshare_all_decls (tree);
184 static void reset_used_decls (tree);
185 static void mark_label_nuses (rtx);
186 static hashval_t const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx lookup_const_double (rtx);
191 static hashval_t mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
195 static hashval_t reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs *get_reg_attrs (tree, int);
198 static tree component_ref_for_mem_expr (tree);
199 static rtx gen_const_vector_0 (enum machine_mode);
200 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
201 static void copy_rtx_if_shared_1 (rtx *orig);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x)
212 return (hashval_t) INTVAL ((rtx) x);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x, const void *y)
222 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x)
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x, const void *y)
248 rtx a = (rtx)x, b = (rtx)y;
250 if (GET_MODE (a) != GET_MODE (b))
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x)
265 mem_attrs *p = (mem_attrs *) x;
267 return (p->alias ^ (p->align * 1000)
268 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
269 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x, const void *y)
280 mem_attrs *p = (mem_attrs *) x;
281 mem_attrs *q = (mem_attrs *) y;
283 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
284 && p->size == q->size && p->align == q->align);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
293 unsigned int align, enum machine_mode mode)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias == 0 && expr == 0 && offset == 0
303 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
304 && (STRICT_ALIGNMENT && mode != BLKmode
305 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
310 attrs.offset = offset;
314 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
317 *slot = ggc_alloc (sizeof (mem_attrs));
318 memcpy (*slot, &attrs, sizeof (mem_attrs));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x)
329 reg_attrs *p = (reg_attrs *) x;
331 return ((p->offset * 1000) ^ (long) p->decl);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x, const void *y)
341 reg_attrs *p = (reg_attrs *) x;
342 reg_attrs *q = (reg_attrs *) y;
344 return (p->decl == q->decl && p->offset == q->offset);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl, int offset)
356 /* If everything is the default, we can just return zero. */
357 if (decl == 0 && offset == 0)
361 attrs.offset = offset;
363 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
366 *slot = ggc_alloc (sizeof (reg_attrs));
367 memcpy (*slot, &attrs, sizeof (reg_attrs));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode, int regno)
380 rtx x = gen_rtx_raw_REG (mode, regno);
381 ORIGINAL_REGNO (x) = regno;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
394 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
395 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx && arg == STORE_FLAG_VALUE)
399 return const_true_rtx;
402 /* Look up the CONST_INT in the hash table. */
403 slot = htab_find_slot_with_hash (const_int_htab, &arg,
404 (hashval_t) arg, INSERT);
406 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
412 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
414 return GEN_INT (trunc_int_for_mode (c, mode));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real)
427 void **slot = htab_find_slot (const_double_htab, real, INSERT);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
439 rtx real = rtx_alloc (CONST_DOUBLE);
440 PUT_MODE (real, mode);
442 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
444 return lookup_const_double (real);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
458 if (mode != VOIDmode)
461 if (GET_MODE_CLASS (mode) != MODE_INT
462 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width = GET_MODE_BITSIZE (mode);
472 if (width < HOST_BITS_PER_WIDE_INT
473 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
474 != ((HOST_WIDE_INT) (-1) << (width - 1))))
475 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
476 else if (width == HOST_BITS_PER_WIDE_INT
477 && ! (i1 == ~0 && i0 < 0))
479 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width < HOST_BITS_PER_WIDE_INT
493 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
494 i0 |= ((HOST_WIDE_INT) (-1) << width);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width <= HOST_BITS_PER_WIDE_INT)
515 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
522 /* We use VOIDmode for integers. */
523 value = rtx_alloc (CONST_DOUBLE);
524 PUT_MODE (value, VOIDmode);
526 CONST_DOUBLE_LOW (value) = i0;
527 CONST_DOUBLE_HIGH (value) = i1;
529 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
530 XWINT (value, i) = 0;
532 return lookup_const_double (value);
536 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode == Pmode && !reload_in_progress)
554 if (regno == FRAME_POINTER_REGNUM
555 && (!reload_completed || frame_pointer_needed))
556 return frame_pointer_rtx;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno == HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed || frame_pointer_needed))
560 return hard_frame_pointer_rtx;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno == ARG_POINTER_REGNUM)
564 return arg_pointer_rtx;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
568 return return_address_pointer_rtx;
570 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
572 return pic_offset_table_rtx;
573 if (regno == STACK_POINTER_REGNUM)
574 return stack_pointer_rtx;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno < FIRST_PSEUDO_REGISTER
593 && reg_raw_mode[regno] == mode)
594 return regno_reg_rtx[regno];
597 return gen_raw_REG (mode, regno);
601 gen_rtx_MEM (enum machine_mode mode, rtx addr)
603 rtx rt = gen_rtx_raw_MEM (mode, addr);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset % GET_MODE_SIZE (mode)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
628 return gen_rtx_raw_SUBREG (mode, reg, offset);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
637 enum machine_mode inmode;
639 inmode = GET_MODE (reg);
640 if (inmode == VOIDmode)
642 return gen_rtx_SUBREG (mode, reg,
643 subreg_lowpart_offset (mode, inmode));
646 /* gen_rtvec (n, [rt1, ..., rtn])
648 ** This routine creates an rtvec and stores within it the
649 ** pointers to rtx's which are its arguments.
654 gen_rtvec (int n, ...)
663 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
665 vector = alloca (n * sizeof (rtx));
667 for (i = 0; i < n; i++)
668 vector[i] = va_arg (p, rtx);
670 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
674 return gen_rtvec_v (save_n, vector);
678 gen_rtvec_v (int n, rtx *argp)
684 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
686 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
688 for (i = 0; i < n; i++)
689 rt_val->elem[i] = *argp++;
694 /* Generate a REG rtx for a new pseudo register of mode MODE.
695 This pseudo is assigned the next sequential register number. */
698 gen_reg_rtx (enum machine_mode mode)
700 struct function *f = cfun;
703 /* Don't let anything called after initial flow analysis create new
708 if (generating_concat_p
709 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
710 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
712 /* For complex modes, don't make a single pseudo.
713 Instead, make a CONCAT of two pseudos.
714 This allows noncontiguous allocation of the real and imaginary parts,
715 which makes much better code. Besides, allocating DCmode
716 pseudos overstrains reload on some machines like the 386. */
717 rtx realpart, imagpart;
718 enum machine_mode partmode = GET_MODE_INNER (mode);
720 realpart = gen_reg_rtx (partmode);
721 imagpart = gen_reg_rtx (partmode);
722 return gen_rtx_CONCAT (mode, realpart, imagpart);
725 /* Make sure regno_pointer_align, and regno_reg_rtx are large
726 enough to have an element for this pseudo reg number. */
728 if (reg_rtx_no == f->emit->regno_pointer_align_length)
730 int old_size = f->emit->regno_pointer_align_length;
734 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
735 memset (new + old_size, 0, old_size);
736 f->emit->regno_pointer_align = (unsigned char *) new;
738 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
739 old_size * 2 * sizeof (rtx));
740 memset (new1 + old_size, 0, old_size * sizeof (rtx));
741 regno_reg_rtx = new1;
743 f->emit->regno_pointer_align_length = old_size * 2;
746 val = gen_raw_REG (mode, reg_rtx_no);
747 regno_reg_rtx[reg_rtx_no++] = val;
751 /* Generate a register with same attributes as REG,
752 but offsetted by OFFSET. */
755 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
757 rtx new = gen_rtx_REG (mode, regno);
758 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
759 REG_OFFSET (reg) + offset);
763 /* Set the decl for MEM to DECL. */
766 set_reg_attrs_from_mem (rtx reg, rtx mem)
768 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
770 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
773 /* Set the register attributes for registers contained in PARM_RTX.
774 Use needed values from memory attributes of MEM. */
777 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
779 if (GET_CODE (parm_rtx) == REG)
780 set_reg_attrs_from_mem (parm_rtx, mem);
781 else if (GET_CODE (parm_rtx) == PARALLEL)
783 /* Check for a NULL entry in the first slot, used to indicate that the
784 parameter goes both on the stack and in registers. */
785 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
786 for (; i < XVECLEN (parm_rtx, 0); i++)
788 rtx x = XVECEXP (parm_rtx, 0, i);
789 if (GET_CODE (XEXP (x, 0)) == REG)
790 REG_ATTRS (XEXP (x, 0))
791 = get_reg_attrs (MEM_EXPR (mem),
792 INTVAL (XEXP (x, 1)));
797 /* Assign the RTX X to declaration T. */
799 set_decl_rtl (tree t, rtx x)
801 DECL_CHECK (t)->decl.rtl = x;
805 /* For register, we maintain the reverse information too. */
806 if (GET_CODE (x) == REG)
807 REG_ATTRS (x) = get_reg_attrs (t, 0);
808 else if (GET_CODE (x) == SUBREG)
809 REG_ATTRS (SUBREG_REG (x))
810 = get_reg_attrs (t, -SUBREG_BYTE (x));
811 if (GET_CODE (x) == CONCAT)
813 if (REG_P (XEXP (x, 0)))
814 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
815 if (REG_P (XEXP (x, 1)))
816 REG_ATTRS (XEXP (x, 1))
817 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
819 if (GET_CODE (x) == PARALLEL)
822 for (i = 0; i < XVECLEN (x, 0); i++)
824 rtx y = XVECEXP (x, 0, i);
825 if (REG_P (XEXP (y, 0)))
826 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
831 /* Identify REG (which may be a CONCAT) as a user register. */
834 mark_user_reg (rtx reg)
836 if (GET_CODE (reg) == CONCAT)
838 REG_USERVAR_P (XEXP (reg, 0)) = 1;
839 REG_USERVAR_P (XEXP (reg, 1)) = 1;
841 else if (GET_CODE (reg) == REG)
842 REG_USERVAR_P (reg) = 1;
847 /* Identify REG as a probable pointer register and show its alignment
848 as ALIGN, if nonzero. */
851 mark_reg_pointer (rtx reg, int align)
853 if (! REG_POINTER (reg))
855 REG_POINTER (reg) = 1;
858 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
860 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
861 /* We can no-longer be sure just how aligned this pointer is. */
862 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
865 /* Return 1 plus largest pseudo reg number used in the current function. */
873 /* Return 1 + the largest label number used so far in the current function. */
878 if (last_label_num && label_num == base_label_num)
879 return last_label_num;
883 /* Return first label number used in this function (if any were used). */
886 get_first_label_num (void)
888 return first_label_num;
891 /* Return the final regno of X, which is a SUBREG of a hard
894 subreg_hard_regno (rtx x, int check_mode)
896 enum machine_mode mode = GET_MODE (x);
897 unsigned int byte_offset, base_regno, final_regno;
898 rtx reg = SUBREG_REG (x);
900 /* This is where we attempt to catch illegal subregs
901 created by the compiler. */
902 if (GET_CODE (x) != SUBREG
903 || GET_CODE (reg) != REG)
905 base_regno = REGNO (reg);
906 if (base_regno >= FIRST_PSEUDO_REGISTER)
908 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
910 #ifdef ENABLE_CHECKING
911 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
912 SUBREG_BYTE (x), mode))
915 /* Catch non-congruent offsets too. */
916 byte_offset = SUBREG_BYTE (x);
917 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
920 final_regno = subreg_regno (x);
925 /* Return a value representing some low-order bits of X, where the number
926 of low-order bits is given by MODE. Note that no conversion is done
927 between floating-point and fixed-point values, rather, the bit
928 representation is returned.
930 This function handles the cases in common between gen_lowpart, below,
931 and two variants in cse.c and combine.c. These are the cases that can
932 be safely handled at all points in the compilation.
934 If this is not a case we can handle, return 0. */
937 gen_lowpart_common (enum machine_mode mode, rtx x)
939 int msize = GET_MODE_SIZE (mode);
942 enum machine_mode innermode;
944 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
945 so we have to make one up. Yuk. */
946 innermode = GET_MODE (x);
947 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
948 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
949 else if (innermode == VOIDmode)
950 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
952 xsize = GET_MODE_SIZE (innermode);
954 if (innermode == VOIDmode || innermode == BLKmode)
957 if (innermode == mode)
960 /* MODE must occupy no more words than the mode of X. */
961 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
962 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
965 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
966 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
969 offset = subreg_lowpart_offset (mode, innermode);
971 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
972 && (GET_MODE_CLASS (mode) == MODE_INT
973 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
975 /* If we are getting the low-order part of something that has been
976 sign- or zero-extended, we can either just use the object being
977 extended or make a narrower extension. If we want an even smaller
978 piece than the size of the object being extended, call ourselves
981 This case is used mostly by combine and cse. */
983 if (GET_MODE (XEXP (x, 0)) == mode)
985 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
986 return gen_lowpart_common (mode, XEXP (x, 0));
987 else if (msize < xsize)
988 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
990 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
991 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
992 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
993 return simplify_gen_subreg (mode, x, innermode, offset);
995 /* Otherwise, we can't do this. */
999 /* Return the constant real or imaginary part (which has mode MODE)
1000 of a complex value X. The IMAGPART_P argument determines whether
1001 the real or complex component should be returned. This function
1002 returns NULL_RTX if the component isn't a constant. */
1005 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1009 if (GET_CODE (x) == MEM
1010 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1012 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1013 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1015 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1016 if (TREE_CODE (part) == REAL_CST
1017 || TREE_CODE (part) == INTEGER_CST)
1018 return expand_expr (part, NULL_RTX, mode, 0);
1024 /* Return the real part (which has mode MODE) of a complex value X.
1025 This always comes at the low address in memory. */
1028 gen_realpart (enum machine_mode mode, rtx x)
1032 /* Handle complex constants. */
1033 part = gen_complex_constant_part (mode, x, 0);
1034 if (part != NULL_RTX)
1037 if (WORDS_BIG_ENDIAN
1038 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1040 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1042 ("can't access real part of complex value in hard register");
1043 else if (WORDS_BIG_ENDIAN)
1044 return gen_highpart (mode, x);
1046 return gen_lowpart (mode, x);
1049 /* Return the imaginary part (which has mode MODE) of a complex value X.
1050 This always comes at the high address in memory. */
1053 gen_imagpart (enum machine_mode mode, rtx x)
1057 /* Handle complex constants. */
1058 part = gen_complex_constant_part (mode, x, 1);
1059 if (part != NULL_RTX)
1062 if (WORDS_BIG_ENDIAN)
1063 return gen_lowpart (mode, x);
1064 else if (! WORDS_BIG_ENDIAN
1065 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1067 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1069 ("can't access imaginary part of complex value in hard register");
1071 return gen_highpart (mode, x);
1074 /* Return 1 iff X, assumed to be a SUBREG,
1075 refers to the real part of the complex value in its containing reg.
1076 Complex values are always stored with the real part in the first word,
1077 regardless of WORDS_BIG_ENDIAN. */
1080 subreg_realpart_p (rtx x)
1082 if (GET_CODE (x) != SUBREG)
1085 return ((unsigned int) SUBREG_BYTE (x)
1086 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1089 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1090 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1091 least-significant part of X.
1092 MODE specifies how big a part of X to return;
1093 it usually should not be larger than a word.
1094 If X is a MEM whose address is a QUEUED, the value may be so also. */
1097 gen_lowpart_general (enum machine_mode mode, rtx x)
1099 rtx result = gen_lowpart_common (mode, x);
1103 else if (GET_CODE (x) == REG)
1105 /* Must be a hard reg that's not valid in MODE. */
1106 result = gen_lowpart_common (mode, copy_to_reg (x));
1111 else if (GET_CODE (x) == MEM)
1113 /* The only additional case we can do is MEM. */
1116 /* The following exposes the use of "x" to CSE. */
1117 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1118 && SCALAR_INT_MODE_P (GET_MODE (x))
1119 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1120 GET_MODE_BITSIZE (GET_MODE (x)))
1121 && ! no_new_pseudos)
1122 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1124 if (WORDS_BIG_ENDIAN)
1125 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1126 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1128 if (BYTES_BIG_ENDIAN)
1129 /* Adjust the address so that the address-after-the-data
1131 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1132 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1134 return adjust_address (x, mode, offset);
1136 else if (GET_CODE (x) == ADDRESSOF)
1137 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1142 /* Like `gen_lowpart', but refer to the most significant part.
1143 This is used to access the imaginary part of a complex number. */
1146 gen_highpart (enum machine_mode mode, rtx x)
1148 unsigned int msize = GET_MODE_SIZE (mode);
1151 /* This case loses if X is a subreg. To catch bugs early,
1152 complain if an invalid MODE is used even in other cases. */
1153 if (msize > UNITS_PER_WORD
1154 && msize != (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)))
1157 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1158 subreg_highpart_offset (mode, GET_MODE (x)));
1160 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1161 the target if we have a MEM. gen_highpart must return a valid operand,
1162 emitting code if necessary to do so. */
1163 if (result != NULL_RTX && GET_CODE (result) == MEM)
1164 result = validize_mem (result);
1171 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1172 be VOIDmode constant. */
1174 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1176 if (GET_MODE (exp) != VOIDmode)
1178 if (GET_MODE (exp) != innermode)
1180 return gen_highpart (outermode, exp);
1182 return simplify_gen_subreg (outermode, exp, innermode,
1183 subreg_highpart_offset (outermode, innermode));
1186 /* Return offset in bytes to get OUTERMODE low part
1187 of the value in mode INNERMODE stored in memory in target format. */
1190 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1192 unsigned int offset = 0;
1193 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1197 if (WORDS_BIG_ENDIAN)
1198 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1199 if (BYTES_BIG_ENDIAN)
1200 offset += difference % UNITS_PER_WORD;
1206 /* Return offset in bytes to get OUTERMODE high part
1207 of the value in mode INNERMODE stored in memory in target format. */
1209 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1211 unsigned int offset = 0;
1212 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1214 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1219 if (! WORDS_BIG_ENDIAN)
1220 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1221 if (! BYTES_BIG_ENDIAN)
1222 offset += difference % UNITS_PER_WORD;
1228 /* Return 1 iff X, assumed to be a SUBREG,
1229 refers to the least significant part of its containing reg.
1230 If X is not a SUBREG, always return 1 (it is its own low part!). */
1233 subreg_lowpart_p (rtx x)
1235 if (GET_CODE (x) != SUBREG)
1237 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1240 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1241 == SUBREG_BYTE (x));
1244 /* Return subword OFFSET of operand OP.
1245 The word number, OFFSET, is interpreted as the word number starting
1246 at the low-order address. OFFSET 0 is the low-order word if not
1247 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1249 If we cannot extract the required word, we return zero. Otherwise,
1250 an rtx corresponding to the requested word will be returned.
1252 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1253 reload has completed, a valid address will always be returned. After
1254 reload, if a valid address cannot be returned, we return zero.
1256 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1257 it is the responsibility of the caller.
1259 MODE is the mode of OP in case it is a CONST_INT.
1261 ??? This is still rather broken for some cases. The problem for the
1262 moment is that all callers of this thing provide no 'goal mode' to
1263 tell us to work with. This exists because all callers were written
1264 in a word based SUBREG world.
1265 Now use of this function can be deprecated by simplify_subreg in most
1270 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1272 if (mode == VOIDmode)
1273 mode = GET_MODE (op);
1275 if (mode == VOIDmode)
1278 /* If OP is narrower than a word, fail. */
1280 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1283 /* If we want a word outside OP, return zero. */
1285 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1288 /* Form a new MEM at the requested address. */
1289 if (GET_CODE (op) == MEM)
1291 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1293 if (! validate_address)
1296 else if (reload_completed)
1298 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1302 return replace_equiv_address (new, XEXP (new, 0));
1305 /* Rest can be handled by simplify_subreg. */
1306 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1309 /* Similar to `operand_subword', but never return 0. If we can't extract
1310 the required subword, put OP into a register and try again. If that fails,
1311 abort. We always validate the address in this case.
1313 MODE is the mode of OP, in case it is CONST_INT. */
1316 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1318 rtx result = operand_subword (op, offset, 1, mode);
1323 if (mode != BLKmode && mode != VOIDmode)
1325 /* If this is a register which can not be accessed by words, copy it
1326 to a pseudo register. */
1327 if (GET_CODE (op) == REG)
1328 op = copy_to_reg (op);
1330 op = force_reg (mode, op);
1333 result = operand_subword (op, offset, 1, mode);
1340 /* Given a compare instruction, swap the operands.
1341 A test instruction is changed into a compare of 0 against the operand. */
1344 reverse_comparison (rtx insn)
1346 rtx body = PATTERN (insn);
1349 if (GET_CODE (body) == SET)
1350 comp = SET_SRC (body);
1352 comp = SET_SRC (XVECEXP (body, 0, 0));
1354 if (GET_CODE (comp) == COMPARE)
1356 rtx op0 = XEXP (comp, 0);
1357 rtx op1 = XEXP (comp, 1);
1358 XEXP (comp, 0) = op1;
1359 XEXP (comp, 1) = op0;
1363 rtx new = gen_rtx_COMPARE (VOIDmode,
1364 CONST0_RTX (GET_MODE (comp)), comp);
1365 if (GET_CODE (body) == SET)
1366 SET_SRC (body) = new;
1368 SET_SRC (XVECEXP (body, 0, 0)) = new;
1372 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1373 or (2) a component ref of something variable. Represent the later with
1374 a NULL expression. */
1377 component_ref_for_mem_expr (tree ref)
1379 tree inner = TREE_OPERAND (ref, 0);
1381 if (TREE_CODE (inner) == COMPONENT_REF)
1382 inner = component_ref_for_mem_expr (inner);
1385 tree placeholder_ptr = 0;
1387 /* Now remove any conversions: they don't change what the underlying
1388 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1389 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1390 || TREE_CODE (inner) == NON_LVALUE_EXPR
1391 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1392 || TREE_CODE (inner) == SAVE_EXPR
1393 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1394 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1395 inner = find_placeholder (inner, &placeholder_ptr);
1397 inner = TREE_OPERAND (inner, 0);
1399 if (! DECL_P (inner))
1403 if (inner == TREE_OPERAND (ref, 0))
1406 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1407 TREE_OPERAND (ref, 1));
1410 /* Given REF, a MEM, and T, either the type of X or the expression
1411 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1412 if we are making a new object of this type. BITPOS is nonzero if
1413 there is an offset outstanding on T that will be applied later. */
1416 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1417 HOST_WIDE_INT bitpos)
1419 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1420 tree expr = MEM_EXPR (ref);
1421 rtx offset = MEM_OFFSET (ref);
1422 rtx size = MEM_SIZE (ref);
1423 unsigned int align = MEM_ALIGN (ref);
1424 HOST_WIDE_INT apply_bitpos = 0;
1427 /* It can happen that type_for_mode was given a mode for which there
1428 is no language-level type. In which case it returns NULL, which
1433 type = TYPE_P (t) ? t : TREE_TYPE (t);
1434 if (type == error_mark_node)
1437 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1438 wrong answer, as it assumes that DECL_RTL already has the right alias
1439 info. Callers should not set DECL_RTL until after the call to
1440 set_mem_attributes. */
1441 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1444 /* Get the alias set from the expression or type (perhaps using a
1445 front-end routine) and use it. */
1446 alias = get_alias_set (t);
1448 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1449 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1450 RTX_UNCHANGING_P (ref)
1451 |= ((lang_hooks.honor_readonly
1452 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1453 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1455 /* If we are making an object of this type, or if this is a DECL, we know
1456 that it is a scalar if the type is not an aggregate. */
1457 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1458 MEM_SCALAR_P (ref) = 1;
1460 /* We can set the alignment from the type if we are making an object,
1461 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1462 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1463 align = MAX (align, TYPE_ALIGN (type));
1465 /* If the size is known, we can set that. */
1466 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1467 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1469 /* If T is not a type, we may be able to deduce some more information about
1473 maybe_set_unchanging (ref, t);
1474 if (TREE_THIS_VOLATILE (t))
1475 MEM_VOLATILE_P (ref) = 1;
1477 /* Now remove any conversions: they don't change what the underlying
1478 object is. Likewise for SAVE_EXPR. */
1479 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1480 || TREE_CODE (t) == NON_LVALUE_EXPR
1481 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1482 || TREE_CODE (t) == SAVE_EXPR)
1483 t = TREE_OPERAND (t, 0);
1485 /* If this expression can't be addressed (e.g., it contains a reference
1486 to a non-addressable field), show we don't change its alias set. */
1487 if (! can_address_p (t))
1488 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1490 /* If this is a decl, set the attributes of the MEM from it. */
1494 offset = const0_rtx;
1495 apply_bitpos = bitpos;
1496 size = (DECL_SIZE_UNIT (t)
1497 && host_integerp (DECL_SIZE_UNIT (t), 1)
1498 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1499 align = DECL_ALIGN (t);
1502 /* If this is a constant, we know the alignment. */
1503 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1505 align = TYPE_ALIGN (type);
1506 #ifdef CONSTANT_ALIGNMENT
1507 align = CONSTANT_ALIGNMENT (t, align);
1511 /* If this is a field reference and not a bit-field, record it. */
1512 /* ??? There is some information that can be gleened from bit-fields,
1513 such as the word offset in the structure that might be modified.
1514 But skip it for now. */
1515 else if (TREE_CODE (t) == COMPONENT_REF
1516 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1518 expr = component_ref_for_mem_expr (t);
1519 offset = const0_rtx;
1520 apply_bitpos = bitpos;
1521 /* ??? Any reason the field size would be different than
1522 the size we got from the type? */
1525 /* If this is an array reference, look for an outer field reference. */
1526 else if (TREE_CODE (t) == ARRAY_REF)
1528 tree off_tree = size_zero_node;
1529 /* We can't modify t, because we use it at the end of the
1535 tree index = TREE_OPERAND (t2, 1);
1536 tree array = TREE_OPERAND (t2, 0);
1537 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1538 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1539 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1541 /* We assume all arrays have sizes that are a multiple of a byte.
1542 First subtract the lower bound, if any, in the type of the
1543 index, then convert to sizetype and multiply by the size of the
1545 if (low_bound != 0 && ! integer_zerop (low_bound))
1546 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1549 /* If the index has a self-referential type, pass it to a
1550 WITH_RECORD_EXPR; if the component size is, pass our
1551 component to one. */
1552 if (CONTAINS_PLACEHOLDER_P (index))
1553 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1554 if (CONTAINS_PLACEHOLDER_P (unit_size))
1555 unit_size = build (WITH_RECORD_EXPR, sizetype,
1559 = fold (build (PLUS_EXPR, sizetype,
1560 fold (build (MULT_EXPR, sizetype,
1564 t2 = TREE_OPERAND (t2, 0);
1566 while (TREE_CODE (t2) == ARRAY_REF);
1572 if (host_integerp (off_tree, 1))
1574 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1575 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1576 align = DECL_ALIGN (t2);
1577 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1579 offset = GEN_INT (ioff);
1580 apply_bitpos = bitpos;
1583 else if (TREE_CODE (t2) == COMPONENT_REF)
1585 expr = component_ref_for_mem_expr (t2);
1586 if (host_integerp (off_tree, 1))
1588 offset = GEN_INT (tree_low_cst (off_tree, 1));
1589 apply_bitpos = bitpos;
1591 /* ??? Any reason the field size would be different than
1592 the size we got from the type? */
1594 else if (flag_argument_noalias > 1
1595 && TREE_CODE (t2) == INDIRECT_REF
1596 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1603 /* If this is a Fortran indirect argument reference, record the
1605 else if (flag_argument_noalias > 1
1606 && TREE_CODE (t) == INDIRECT_REF
1607 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1614 /* If we modified OFFSET based on T, then subtract the outstanding
1615 bit position offset. Similarly, increase the size of the accessed
1616 object to contain the negative offset. */
1619 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1621 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1624 /* Now set the attributes we computed above. */
1626 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1628 /* If this is already known to be a scalar or aggregate, we are done. */
1629 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1632 /* If it is a reference into an aggregate, this is part of an aggregate.
1633 Otherwise we don't know. */
1634 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1635 || TREE_CODE (t) == ARRAY_RANGE_REF
1636 || TREE_CODE (t) == BIT_FIELD_REF)
1637 MEM_IN_STRUCT_P (ref) = 1;
1641 set_mem_attributes (rtx ref, tree t, int objectp)
1643 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1646 /* Set the decl for MEM to DECL. */
1649 set_mem_attrs_from_reg (rtx mem, rtx reg)
1652 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1653 GEN_INT (REG_OFFSET (reg)),
1654 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1657 /* Set the alias set of MEM to SET. */
1660 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1662 #ifdef ENABLE_CHECKING
1663 /* If the new and old alias sets don't conflict, something is wrong. */
1664 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1668 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1669 MEM_SIZE (mem), MEM_ALIGN (mem),
1673 /* Set the alignment of MEM to ALIGN bits. */
1676 set_mem_align (rtx mem, unsigned int align)
1678 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1679 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1683 /* Set the expr for MEM to EXPR. */
1686 set_mem_expr (rtx mem, tree expr)
1689 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1690 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1693 /* Set the offset of MEM to OFFSET. */
1696 set_mem_offset (rtx mem, rtx offset)
1698 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1699 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1703 /* Set the size of MEM to SIZE. */
1706 set_mem_size (rtx mem, rtx size)
1708 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1709 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1713 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1714 and its address changed to ADDR. (VOIDmode means don't change the mode.
1715 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1716 returned memory location is required to be valid. The memory
1717 attributes are not changed. */
1720 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1724 if (GET_CODE (memref) != MEM)
1726 if (mode == VOIDmode)
1727 mode = GET_MODE (memref);
1729 addr = XEXP (memref, 0);
1730 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1731 && (!validate || memory_address_p (mode, addr)))
1736 if (reload_in_progress || reload_completed)
1738 if (! memory_address_p (mode, addr))
1742 addr = memory_address (mode, addr);
1745 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1748 new = gen_rtx_MEM (mode, addr);
1749 MEM_COPY_ATTRIBUTES (new, memref);
1753 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1754 way we are changing MEMREF, so we only preserve the alias set. */
1757 change_address (rtx memref, enum machine_mode mode, rtx addr)
1759 rtx new = change_address_1 (memref, mode, addr, 1), size;
1760 enum machine_mode mmode = GET_MODE (new);
1763 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1764 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1766 /* If there are no changes, just return the original memory reference. */
1769 if (MEM_ATTRS (memref) == 0
1770 || (MEM_EXPR (memref) == NULL
1771 && MEM_OFFSET (memref) == NULL
1772 && MEM_SIZE (memref) == size
1773 && MEM_ALIGN (memref) == align))
1776 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1777 MEM_COPY_ATTRIBUTES (new, memref);
1781 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1786 /* Return a memory reference like MEMREF, but with its mode changed
1787 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1788 nonzero, the memory address is forced to be valid.
1789 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1790 and caller is responsible for adjusting MEMREF base register. */
1793 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1794 int validate, int adjust)
1796 rtx addr = XEXP (memref, 0);
1798 rtx memoffset = MEM_OFFSET (memref);
1800 unsigned int memalign = MEM_ALIGN (memref);
1802 /* If there are no changes, just return the original memory reference. */
1803 if (mode == GET_MODE (memref) && !offset
1804 && (!validate || memory_address_p (mode, addr)))
1807 /* ??? Prefer to create garbage instead of creating shared rtl.
1808 This may happen even if offset is nonzero -- consider
1809 (plus (plus reg reg) const_int) -- so do this always. */
1810 addr = copy_rtx (addr);
1814 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1815 object, we can merge it into the LO_SUM. */
1816 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1818 && (unsigned HOST_WIDE_INT) offset
1819 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1820 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1821 plus_constant (XEXP (addr, 1), offset));
1823 addr = plus_constant (addr, offset);
1826 new = change_address_1 (memref, mode, addr, validate);
1828 /* Compute the new values of the memory attributes due to this adjustment.
1829 We add the offsets and update the alignment. */
1831 memoffset = GEN_INT (offset + INTVAL (memoffset));
1833 /* Compute the new alignment by taking the MIN of the alignment and the
1834 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1839 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1841 /* We can compute the size in a number of ways. */
1842 if (GET_MODE (new) != BLKmode)
1843 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1844 else if (MEM_SIZE (memref))
1845 size = plus_constant (MEM_SIZE (memref), -offset);
1847 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1848 memoffset, size, memalign, GET_MODE (new));
1850 /* At some point, we should validate that this offset is within the object,
1851 if all the appropriate values are known. */
1855 /* Return a memory reference like MEMREF, but with its mode changed
1856 to MODE and its address changed to ADDR, which is assumed to be
1857 MEMREF offseted by OFFSET bytes. If VALIDATE is
1858 nonzero, the memory address is forced to be valid. */
1861 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1862 HOST_WIDE_INT offset, int validate)
1864 memref = change_address_1 (memref, VOIDmode, addr, validate);
1865 return adjust_address_1 (memref, mode, offset, validate, 0);
1868 /* Return a memory reference like MEMREF, but whose address is changed by
1869 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1870 known to be in OFFSET (possibly 1). */
1873 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1875 rtx new, addr = XEXP (memref, 0);
1877 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1879 /* At this point we don't know _why_ the address is invalid. It
1880 could have secondary memory references, multiplies or anything.
1882 However, if we did go and rearrange things, we can wind up not
1883 being able to recognize the magic around pic_offset_table_rtx.
1884 This stuff is fragile, and is yet another example of why it is
1885 bad to expose PIC machinery too early. */
1886 if (! memory_address_p (GET_MODE (memref), new)
1887 && GET_CODE (addr) == PLUS
1888 && XEXP (addr, 0) == pic_offset_table_rtx)
1890 addr = force_reg (GET_MODE (addr), addr);
1891 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1894 update_temp_slot_address (XEXP (memref, 0), new);
1895 new = change_address_1 (memref, VOIDmode, new, 1);
1897 /* If there are no changes, just return the original memory reference. */
1901 /* Update the alignment to reflect the offset. Reset the offset, which
1904 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1905 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1910 /* Return a memory reference like MEMREF, but with its address changed to
1911 ADDR. The caller is asserting that the actual piece of memory pointed
1912 to is the same, just the form of the address is being changed, such as
1913 by putting something into a register. */
1916 replace_equiv_address (rtx memref, rtx addr)
1918 /* change_address_1 copies the memory attribute structure without change
1919 and that's exactly what we want here. */
1920 update_temp_slot_address (XEXP (memref, 0), addr);
1921 return change_address_1 (memref, VOIDmode, addr, 1);
1924 /* Likewise, but the reference is not required to be valid. */
1927 replace_equiv_address_nv (rtx memref, rtx addr)
1929 return change_address_1 (memref, VOIDmode, addr, 0);
1932 /* Return a memory reference like MEMREF, but with its mode widened to
1933 MODE and offset by OFFSET. This would be used by targets that e.g.
1934 cannot issue QImode memory operations and have to use SImode memory
1935 operations plus masking logic. */
1938 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
1940 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
1941 tree expr = MEM_EXPR (new);
1942 rtx memoffset = MEM_OFFSET (new);
1943 unsigned int size = GET_MODE_SIZE (mode);
1945 /* If there are no changes, just return the original memory reference. */
1949 /* If we don't know what offset we were at within the expression, then
1950 we can't know if we've overstepped the bounds. */
1956 if (TREE_CODE (expr) == COMPONENT_REF)
1958 tree field = TREE_OPERAND (expr, 1);
1960 if (! DECL_SIZE_UNIT (field))
1966 /* Is the field at least as large as the access? If so, ok,
1967 otherwise strip back to the containing structure. */
1968 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
1969 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
1970 && INTVAL (memoffset) >= 0)
1973 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
1979 expr = TREE_OPERAND (expr, 0);
1980 memoffset = (GEN_INT (INTVAL (memoffset)
1981 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
1982 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
1985 /* Similarly for the decl. */
1986 else if (DECL_P (expr)
1987 && DECL_SIZE_UNIT (expr)
1988 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
1989 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
1990 && (! memoffset || INTVAL (memoffset) >= 0))
1994 /* The widened memory access overflows the expression, which means
1995 that it could alias another expression. Zap it. */
2002 memoffset = NULL_RTX;
2004 /* The widened memory may alias other stuff, so zap the alias set. */
2005 /* ??? Maybe use get_alias_set on any remaining expression. */
2007 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2008 MEM_ALIGN (new), mode);
2013 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2016 gen_label_rtx (void)
2018 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2019 NULL, label_num++, NULL);
2022 /* For procedure integration. */
2024 /* Install new pointers to the first and last insns in the chain.
2025 Also, set cur_insn_uid to one higher than the last in use.
2026 Used for an inline-procedure after copying the insn chain. */
2029 set_new_first_and_last_insn (rtx first, rtx last)
2037 for (insn = first; insn; insn = NEXT_INSN (insn))
2038 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2043 /* Set the last label number found in the current function.
2044 This is used when belatedly compiling an inline function. */
2047 set_new_last_label_num (int last)
2049 base_label_num = label_num;
2050 last_label_num = last;
2053 /* Restore all variables describing the current status from the structure *P.
2054 This is used after a nested function. */
2057 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2062 /* Go through all the RTL insn bodies and copy any invalid shared
2063 structure. This routine should only be called once. */
2066 unshare_all_rtl (tree fndecl, rtx insn)
2070 /* Make sure that virtual parameters are not shared. */
2071 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2072 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2074 /* Make sure that virtual stack slots are not shared. */
2075 unshare_all_decls (DECL_INITIAL (fndecl));
2077 /* Unshare just about everything else. */
2078 unshare_all_rtl_in_chain (insn);
2080 /* Make sure the addresses of stack slots found outside the insn chain
2081 (such as, in DECL_RTL of a variable) are not shared
2082 with the insn chain.
2084 This special care is necessary when the stack slot MEM does not
2085 actually appear in the insn chain. If it does appear, its address
2086 is unshared from all else at that point. */
2087 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2090 /* Go through all the RTL insn bodies and copy any invalid shared
2091 structure, again. This is a fairly expensive thing to do so it
2092 should be done sparingly. */
2095 unshare_all_rtl_again (rtx insn)
2100 for (p = insn; p; p = NEXT_INSN (p))
2103 reset_used_flags (PATTERN (p));
2104 reset_used_flags (REG_NOTES (p));
2105 reset_used_flags (LOG_LINKS (p));
2108 /* Make sure that virtual stack slots are not shared. */
2109 reset_used_decls (DECL_INITIAL (cfun->decl));
2111 /* Make sure that virtual parameters are not shared. */
2112 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2113 reset_used_flags (DECL_RTL (decl));
2115 reset_used_flags (stack_slot_list);
2117 unshare_all_rtl (cfun->decl, insn);
2120 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2121 Recursively does the same for subexpressions. */
2124 verify_rtx_sharing (rtx orig, rtx insn)
2129 const char *format_ptr;
2134 code = GET_CODE (x);
2136 /* These types may be freely shared. */
2152 /* SCRATCH must be shared because they represent distinct values. */
2154 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2159 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2160 a LABEL_REF, it isn't sharable. */
2161 if (GET_CODE (XEXP (x, 0)) == PLUS
2162 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2163 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2168 /* A MEM is allowed to be shared if its address is constant. */
2169 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2170 || reload_completed || reload_in_progress)
2179 /* This rtx may not be shared. If it has already been seen,
2180 replace it with a copy of itself. */
2182 if (RTX_FLAG (x, used))
2184 error ("Invalid rtl sharing found in the insn");
2186 error ("Shared rtx");
2190 RTX_FLAG (x, used) = 1;
2192 /* Now scan the subexpressions recursively. */
2194 format_ptr = GET_RTX_FORMAT (code);
2196 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2198 switch (*format_ptr++)
2201 verify_rtx_sharing (XEXP (x, i), insn);
2205 if (XVEC (x, i) != NULL)
2208 int len = XVECLEN (x, i);
2210 for (j = 0; j < len; j++)
2212 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2213 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2214 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2215 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2217 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2226 /* Go through all the RTL insn bodies and check that there is no unexpected
2227 sharing in between the subexpressions. */
2230 verify_rtl_sharing (void)
2234 for (p = get_insns (); p; p = NEXT_INSN (p))
2237 reset_used_flags (PATTERN (p));
2238 reset_used_flags (REG_NOTES (p));
2239 reset_used_flags (LOG_LINKS (p));
2242 for (p = get_insns (); p; p = NEXT_INSN (p))
2245 verify_rtx_sharing (PATTERN (p), p);
2246 verify_rtx_sharing (REG_NOTES (p), p);
2247 verify_rtx_sharing (LOG_LINKS (p), p);
2251 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2252 Assumes the mark bits are cleared at entry. */
2255 unshare_all_rtl_in_chain (rtx insn)
2257 for (; insn; insn = NEXT_INSN (insn))
2260 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2261 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2262 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2266 /* Go through all virtual stack slots of a function and copy any
2267 shared structure. */
2269 unshare_all_decls (tree blk)
2273 /* Copy shared decls. */
2274 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2275 if (DECL_RTL_SET_P (t))
2276 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2278 /* Now process sub-blocks. */
2279 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2280 unshare_all_decls (t);
2283 /* Go through all virtual stack slots of a function and mark them as
2286 reset_used_decls (tree blk)
2291 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2292 if (DECL_RTL_SET_P (t))
2293 reset_used_flags (DECL_RTL (t));
2295 /* Now process sub-blocks. */
2296 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2297 reset_used_decls (t);
2300 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2301 placed in the result directly, rather than being copied. MAY_SHARE is
2302 either a MEM of an EXPR_LIST of MEMs. */
2305 copy_most_rtx (rtx orig, rtx may_share)
2310 const char *format_ptr;
2312 if (orig == may_share
2313 || (GET_CODE (may_share) == EXPR_LIST
2314 && in_expr_list_p (may_share, orig)))
2317 code = GET_CODE (orig);
2335 copy = rtx_alloc (code);
2336 PUT_MODE (copy, GET_MODE (orig));
2337 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2338 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2339 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2340 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2341 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2343 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2345 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2347 switch (*format_ptr++)
2350 XEXP (copy, i) = XEXP (orig, i);
2351 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2352 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2356 XEXP (copy, i) = XEXP (orig, i);
2361 XVEC (copy, i) = XVEC (orig, i);
2362 if (XVEC (orig, i) != NULL)
2364 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2365 for (j = 0; j < XVECLEN (copy, i); j++)
2366 XVECEXP (copy, i, j)
2367 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2372 XWINT (copy, i) = XWINT (orig, i);
2377 XINT (copy, i) = XINT (orig, i);
2381 XTREE (copy, i) = XTREE (orig, i);
2386 XSTR (copy, i) = XSTR (orig, i);
2390 X0ANY (copy, i) = X0ANY (orig, i);
2400 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2401 Recursively does the same for subexpressions. Uses
2402 copy_rtx_if_shared_1 to reduce stack space. */
2405 copy_rtx_if_shared (rtx orig)
2407 copy_rtx_if_shared_1 (&orig);
2411 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2412 use. Recursively does the same for subexpressions. */
2415 copy_rtx_if_shared_1 (rtx *orig1)
2421 const char *format_ptr;
2425 /* Repeat is used to turn tail-recursion into iteration. */
2432 code = GET_CODE (x);
2434 /* These types may be freely shared. */
2449 /* SCRATCH must be shared because they represent distinct values. */
2452 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2457 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2458 a LABEL_REF, it isn't sharable. */
2459 if (GET_CODE (XEXP (x, 0)) == PLUS
2460 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2461 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2470 /* The chain of insns is not being copied. */
2477 /* This rtx may not be shared. If it has already been seen,
2478 replace it with a copy of itself. */
2480 if (RTX_FLAG (x, used))
2484 copy = rtx_alloc (code);
2485 memcpy (copy, x, RTX_SIZE (code));
2489 RTX_FLAG (x, used) = 1;
2491 /* Now scan the subexpressions recursively.
2492 We can store any replaced subexpressions directly into X
2493 since we know X is not shared! Any vectors in X
2494 must be copied if X was copied. */
2496 format_ptr = GET_RTX_FORMAT (code);
2497 length = GET_RTX_LENGTH (code);
2500 for (i = 0; i < length; i++)
2502 switch (*format_ptr++)
2506 copy_rtx_if_shared_1 (last_ptr);
2507 last_ptr = &XEXP (x, i);
2511 if (XVEC (x, i) != NULL)
2514 int len = XVECLEN (x, i);
2516 /* Copy the vector iff I copied the rtx and the length
2518 if (copied && len > 0)
2519 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2521 /* Call recursively on all inside the vector. */
2522 for (j = 0; j < len; j++)
2525 copy_rtx_if_shared_1 (last_ptr);
2526 last_ptr = &XVECEXP (x, i, j);
2541 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2542 to look for shared sub-parts. */
2545 reset_used_flags (rtx x)
2549 const char *format_ptr;
2552 /* Repeat is used to turn tail-recursion into iteration. */
2557 code = GET_CODE (x);
2559 /* These types may be freely shared so we needn't do any resetting
2581 /* The chain of insns is not being copied. */
2588 RTX_FLAG (x, used) = 0;
2590 format_ptr = GET_RTX_FORMAT (code);
2591 length = GET_RTX_LENGTH (code);
2593 for (i = 0; i < length; i++)
2595 switch (*format_ptr++)
2603 reset_used_flags (XEXP (x, i));
2607 for (j = 0; j < XVECLEN (x, i); j++)
2608 reset_used_flags (XVECEXP (x, i, j));
2614 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2615 to look for shared sub-parts. */
2618 set_used_flags (rtx x)
2622 const char *format_ptr;
2627 code = GET_CODE (x);
2629 /* These types may be freely shared so we needn't do any resetting
2651 /* The chain of insns is not being copied. */
2658 RTX_FLAG (x, used) = 1;
2660 format_ptr = GET_RTX_FORMAT (code);
2661 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2663 switch (*format_ptr++)
2666 set_used_flags (XEXP (x, i));
2670 for (j = 0; j < XVECLEN (x, i); j++)
2671 set_used_flags (XVECEXP (x, i, j));
2677 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2678 Return X or the rtx for the pseudo reg the value of X was copied into.
2679 OTHER must be valid as a SET_DEST. */
2682 make_safe_from (rtx x, rtx other)
2685 switch (GET_CODE (other))
2688 other = SUBREG_REG (other);
2690 case STRICT_LOW_PART:
2693 other = XEXP (other, 0);
2699 if ((GET_CODE (other) == MEM
2701 && GET_CODE (x) != REG
2702 && GET_CODE (x) != SUBREG)
2703 || (GET_CODE (other) == REG
2704 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2705 || reg_mentioned_p (other, x))))
2707 rtx temp = gen_reg_rtx (GET_MODE (x));
2708 emit_move_insn (temp, x);
2714 /* Emission of insns (adding them to the doubly-linked list). */
2716 /* Return the first insn of the current sequence or current function. */
2724 /* Specify a new insn as the first in the chain. */
2727 set_first_insn (rtx insn)
2729 if (PREV_INSN (insn) != 0)
2734 /* Return the last insn emitted in current sequence or current function. */
2737 get_last_insn (void)
2742 /* Specify a new insn as the last in the chain. */
2745 set_last_insn (rtx insn)
2747 if (NEXT_INSN (insn) != 0)
2752 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2755 get_last_insn_anywhere (void)
2757 struct sequence_stack *stack;
2760 for (stack = seq_stack; stack; stack = stack->next)
2761 if (stack->last != 0)
2766 /* Return the first nonnote insn emitted in current sequence or current
2767 function. This routine looks inside SEQUENCEs. */
2770 get_first_nonnote_insn (void)
2772 rtx insn = first_insn;
2776 insn = next_insn (insn);
2777 if (insn == 0 || GET_CODE (insn) != NOTE)
2784 /* Return the last nonnote insn emitted in current sequence or current
2785 function. This routine looks inside SEQUENCEs. */
2788 get_last_nonnote_insn (void)
2790 rtx insn = last_insn;
2794 insn = previous_insn (insn);
2795 if (insn == 0 || GET_CODE (insn) != NOTE)
2802 /* Return a number larger than any instruction's uid in this function. */
2807 return cur_insn_uid;
2810 /* Renumber instructions so that no instruction UIDs are wasted. */
2813 renumber_insns (FILE *stream)
2817 /* If we're not supposed to renumber instructions, don't. */
2818 if (!flag_renumber_insns)
2821 /* If there aren't that many instructions, then it's not really
2822 worth renumbering them. */
2823 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2828 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2831 fprintf (stream, "Renumbering insn %d to %d\n",
2832 INSN_UID (insn), cur_insn_uid);
2833 INSN_UID (insn) = cur_insn_uid++;
2837 /* Return the next insn. If it is a SEQUENCE, return the first insn
2841 next_insn (rtx insn)
2845 insn = NEXT_INSN (insn);
2846 if (insn && GET_CODE (insn) == INSN
2847 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2848 insn = XVECEXP (PATTERN (insn), 0, 0);
2854 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2858 previous_insn (rtx insn)
2862 insn = PREV_INSN (insn);
2863 if (insn && GET_CODE (insn) == INSN
2864 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2865 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2871 /* Return the next insn after INSN that is not a NOTE. This routine does not
2872 look inside SEQUENCEs. */
2875 next_nonnote_insn (rtx insn)
2879 insn = NEXT_INSN (insn);
2880 if (insn == 0 || GET_CODE (insn) != NOTE)
2887 /* Return the previous insn before INSN that is not a NOTE. This routine does
2888 not look inside SEQUENCEs. */
2891 prev_nonnote_insn (rtx insn)
2895 insn = PREV_INSN (insn);
2896 if (insn == 0 || GET_CODE (insn) != NOTE)
2903 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2904 or 0, if there is none. This routine does not look inside
2908 next_real_insn (rtx insn)
2912 insn = NEXT_INSN (insn);
2913 if (insn == 0 || GET_CODE (insn) == INSN
2914 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2921 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2922 or 0, if there is none. This routine does not look inside
2926 prev_real_insn (rtx insn)
2930 insn = PREV_INSN (insn);
2931 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2932 || GET_CODE (insn) == JUMP_INSN)
2939 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2940 This routine does not look inside SEQUENCEs. */
2943 last_call_insn (void)
2947 for (insn = get_last_insn ();
2948 insn && GET_CODE (insn) != CALL_INSN;
2949 insn = PREV_INSN (insn))
2955 /* Find the next insn after INSN that really does something. This routine
2956 does not look inside SEQUENCEs. Until reload has completed, this is the
2957 same as next_real_insn. */
2960 active_insn_p (rtx insn)
2962 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2963 || (GET_CODE (insn) == INSN
2964 && (! reload_completed
2965 || (GET_CODE (PATTERN (insn)) != USE
2966 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2970 next_active_insn (rtx insn)
2974 insn = NEXT_INSN (insn);
2975 if (insn == 0 || active_insn_p (insn))
2982 /* Find the last insn before INSN that really does something. This routine
2983 does not look inside SEQUENCEs. Until reload has completed, this is the
2984 same as prev_real_insn. */
2987 prev_active_insn (rtx insn)
2991 insn = PREV_INSN (insn);
2992 if (insn == 0 || active_insn_p (insn))
2999 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3002 next_label (rtx insn)
3006 insn = NEXT_INSN (insn);
3007 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3014 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3017 prev_label (rtx insn)
3021 insn = PREV_INSN (insn);
3022 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3030 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3031 and REG_CC_USER notes so we can find it. */
3034 link_cc0_insns (rtx insn)
3036 rtx user = next_nonnote_insn (insn);
3038 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3039 user = XVECEXP (PATTERN (user), 0, 0);
3041 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3043 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3046 /* Return the next insn that uses CC0 after INSN, which is assumed to
3047 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3048 applied to the result of this function should yield INSN).
3050 Normally, this is simply the next insn. However, if a REG_CC_USER note
3051 is present, it contains the insn that uses CC0.
3053 Return 0 if we can't find the insn. */
3056 next_cc0_user (rtx insn)
3058 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3061 return XEXP (note, 0);
3063 insn = next_nonnote_insn (insn);
3064 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3065 insn = XVECEXP (PATTERN (insn), 0, 0);
3067 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3073 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3074 note, it is the previous insn. */
3077 prev_cc0_setter (rtx insn)
3079 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3082 return XEXP (note, 0);
3084 insn = prev_nonnote_insn (insn);
3085 if (! sets_cc0_p (PATTERN (insn)))
3092 /* Increment the label uses for all labels present in rtx. */
3095 mark_label_nuses (rtx x)
3101 code = GET_CODE (x);
3102 if (code == LABEL_REF)
3103 LABEL_NUSES (XEXP (x, 0))++;
3105 fmt = GET_RTX_FORMAT (code);
3106 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3109 mark_label_nuses (XEXP (x, i));
3110 else if (fmt[i] == 'E')
3111 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3112 mark_label_nuses (XVECEXP (x, i, j));
3117 /* Try splitting insns that can be split for better scheduling.
3118 PAT is the pattern which might split.
3119 TRIAL is the insn providing PAT.
3120 LAST is nonzero if we should return the last insn of the sequence produced.
3122 If this routine succeeds in splitting, it returns the first or last
3123 replacement insn depending on the value of LAST. Otherwise, it
3124 returns TRIAL. If the insn to be returned can be split, it will be. */
3127 try_split (rtx pat, rtx trial, int last)
3129 rtx before = PREV_INSN (trial);
3130 rtx after = NEXT_INSN (trial);
3131 int has_barrier = 0;
3135 rtx insn_last, insn;
3138 if (any_condjump_p (trial)
3139 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3140 split_branch_probability = INTVAL (XEXP (note, 0));
3141 probability = split_branch_probability;
3143 seq = split_insns (pat, trial);
3145 split_branch_probability = -1;
3147 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3148 We may need to handle this specially. */
3149 if (after && GET_CODE (after) == BARRIER)
3152 after = NEXT_INSN (after);
3158 /* Avoid infinite loop if any insn of the result matches
3159 the original pattern. */
3163 if (INSN_P (insn_last)
3164 && rtx_equal_p (PATTERN (insn_last), pat))
3166 if (!NEXT_INSN (insn_last))
3168 insn_last = NEXT_INSN (insn_last);
3172 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3174 if (GET_CODE (insn) == JUMP_INSN)
3176 mark_jump_label (PATTERN (insn), insn, 0);
3178 if (probability != -1
3179 && any_condjump_p (insn)
3180 && !find_reg_note (insn, REG_BR_PROB, 0))
3182 /* We can preserve the REG_BR_PROB notes only if exactly
3183 one jump is created, otherwise the machine description
3184 is responsible for this step using
3185 split_branch_probability variable. */
3189 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3190 GEN_INT (probability),
3196 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3197 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3198 if (GET_CODE (trial) == CALL_INSN)
3200 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3201 if (GET_CODE (insn) == CALL_INSN)
3203 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3206 *p = CALL_INSN_FUNCTION_USAGE (trial);
3207 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3211 /* Copy notes, particularly those related to the CFG. */
3212 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3214 switch (REG_NOTE_KIND (note))
3218 while (insn != NULL_RTX)
3220 if (GET_CODE (insn) == CALL_INSN
3221 || (flag_non_call_exceptions
3222 && may_trap_p (PATTERN (insn))))
3224 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3227 insn = PREV_INSN (insn);
3233 case REG_ALWAYS_RETURN:
3235 while (insn != NULL_RTX)
3237 if (GET_CODE (insn) == CALL_INSN)
3239 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3242 insn = PREV_INSN (insn);
3246 case REG_NON_LOCAL_GOTO:
3248 while (insn != NULL_RTX)
3250 if (GET_CODE (insn) == JUMP_INSN)
3252 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3255 insn = PREV_INSN (insn);
3264 /* If there are LABELS inside the split insns increment the
3265 usage count so we don't delete the label. */
3266 if (GET_CODE (trial) == INSN)
3269 while (insn != NULL_RTX)
3271 if (GET_CODE (insn) == INSN)
3272 mark_label_nuses (PATTERN (insn));
3274 insn = PREV_INSN (insn);
3278 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3280 delete_insn (trial);
3282 emit_barrier_after (tem);
3284 /* Recursively call try_split for each new insn created; by the
3285 time control returns here that insn will be fully split, so
3286 set LAST and continue from the insn after the one returned.
3287 We can't use next_active_insn here since AFTER may be a note.
3288 Ignore deleted insns, which can be occur if not optimizing. */
3289 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3290 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3291 tem = try_split (PATTERN (tem), tem, 1);
3293 /* Return either the first or the last insn, depending on which was
3296 ? (after ? PREV_INSN (after) : last_insn)
3297 : NEXT_INSN (before);
3300 /* Make and return an INSN rtx, initializing all its slots.
3301 Store PATTERN in the pattern slots. */
3304 make_insn_raw (rtx pattern)
3308 insn = rtx_alloc (INSN);
3310 INSN_UID (insn) = cur_insn_uid++;
3311 PATTERN (insn) = pattern;
3312 INSN_CODE (insn) = -1;
3313 LOG_LINKS (insn) = NULL;
3314 REG_NOTES (insn) = NULL;
3315 INSN_LOCATOR (insn) = 0;
3316 BLOCK_FOR_INSN (insn) = NULL;
3318 #ifdef ENABLE_RTL_CHECKING
3321 && (returnjump_p (insn)
3322 || (GET_CODE (insn) == SET
3323 && SET_DEST (insn) == pc_rtx)))
3325 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3333 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3336 make_jump_insn_raw (rtx pattern)
3340 insn = rtx_alloc (JUMP_INSN);
3341 INSN_UID (insn) = cur_insn_uid++;
3343 PATTERN (insn) = pattern;
3344 INSN_CODE (insn) = -1;
3345 LOG_LINKS (insn) = NULL;
3346 REG_NOTES (insn) = NULL;
3347 JUMP_LABEL (insn) = NULL;
3348 INSN_LOCATOR (insn) = 0;
3349 BLOCK_FOR_INSN (insn) = NULL;
3354 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3357 make_call_insn_raw (rtx pattern)
3361 insn = rtx_alloc (CALL_INSN);
3362 INSN_UID (insn) = cur_insn_uid++;
3364 PATTERN (insn) = pattern;
3365 INSN_CODE (insn) = -1;
3366 LOG_LINKS (insn) = NULL;
3367 REG_NOTES (insn) = NULL;
3368 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3369 INSN_LOCATOR (insn) = 0;
3370 BLOCK_FOR_INSN (insn) = NULL;
3375 /* Add INSN to the end of the doubly-linked list.
3376 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3381 PREV_INSN (insn) = last_insn;
3382 NEXT_INSN (insn) = 0;
3384 if (NULL != last_insn)
3385 NEXT_INSN (last_insn) = insn;
3387 if (NULL == first_insn)
3393 /* Add INSN into the doubly-linked list after insn AFTER. This and
3394 the next should be the only functions called to insert an insn once
3395 delay slots have been filled since only they know how to update a
3399 add_insn_after (rtx insn, rtx after)
3401 rtx next = NEXT_INSN (after);
3404 if (optimize && INSN_DELETED_P (after))
3407 NEXT_INSN (insn) = next;
3408 PREV_INSN (insn) = after;
3412 PREV_INSN (next) = insn;
3413 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3414 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3416 else if (last_insn == after)
3420 struct sequence_stack *stack = seq_stack;
3421 /* Scan all pending sequences too. */
3422 for (; stack; stack = stack->next)
3423 if (after == stack->last)
3433 if (GET_CODE (after) != BARRIER
3434 && GET_CODE (insn) != BARRIER
3435 && (bb = BLOCK_FOR_INSN (after)))
3437 set_block_for_insn (insn, bb);
3439 bb->flags |= BB_DIRTY;
3440 /* Should not happen as first in the BB is always
3441 either NOTE or LABEL. */
3442 if (BB_END (bb) == after
3443 /* Avoid clobbering of structure when creating new BB. */
3444 && GET_CODE (insn) != BARRIER
3445 && (GET_CODE (insn) != NOTE
3446 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3450 NEXT_INSN (after) = insn;
3451 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3453 rtx sequence = PATTERN (after);
3454 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3458 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3459 the previous should be the only functions called to insert an insn once
3460 delay slots have been filled since only they know how to update a
3464 add_insn_before (rtx insn, rtx before)
3466 rtx prev = PREV_INSN (before);
3469 if (optimize && INSN_DELETED_P (before))
3472 PREV_INSN (insn) = prev;
3473 NEXT_INSN (insn) = before;
3477 NEXT_INSN (prev) = insn;
3478 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3480 rtx sequence = PATTERN (prev);
3481 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3484 else if (first_insn == before)
3488 struct sequence_stack *stack = seq_stack;
3489 /* Scan all pending sequences too. */
3490 for (; stack; stack = stack->next)
3491 if (before == stack->first)
3493 stack->first = insn;
3501 if (GET_CODE (before) != BARRIER
3502 && GET_CODE (insn) != BARRIER
3503 && (bb = BLOCK_FOR_INSN (before)))
3505 set_block_for_insn (insn, bb);
3507 bb->flags |= BB_DIRTY;
3508 /* Should not happen as first in the BB is always
3509 either NOTE or LABEl. */
3510 if (BB_HEAD (bb) == insn
3511 /* Avoid clobbering of structure when creating new BB. */
3512 && GET_CODE (insn) != BARRIER
3513 && (GET_CODE (insn) != NOTE
3514 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3518 PREV_INSN (before) = insn;
3519 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3520 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3523 /* Remove an insn from its doubly-linked list. This function knows how
3524 to handle sequences. */
3526 remove_insn (rtx insn)
3528 rtx next = NEXT_INSN (insn);
3529 rtx prev = PREV_INSN (insn);
3534 NEXT_INSN (prev) = next;
3535 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3537 rtx sequence = PATTERN (prev);
3538 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3541 else if (first_insn == insn)
3545 struct sequence_stack *stack = seq_stack;
3546 /* Scan all pending sequences too. */
3547 for (; stack; stack = stack->next)
3548 if (insn == stack->first)
3550 stack->first = next;
3560 PREV_INSN (next) = prev;
3561 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3562 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3564 else if (last_insn == insn)
3568 struct sequence_stack *stack = seq_stack;
3569 /* Scan all pending sequences too. */
3570 for (; stack; stack = stack->next)
3571 if (insn == stack->last)
3580 if (GET_CODE (insn) != BARRIER
3581 && (bb = BLOCK_FOR_INSN (insn)))
3584 bb->flags |= BB_DIRTY;
3585 if (BB_HEAD (bb) == insn)
3587 /* Never ever delete the basic block note without deleting whole
3589 if (GET_CODE (insn) == NOTE)
3591 BB_HEAD (bb) = next;
3593 if (BB_END (bb) == insn)
3598 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3601 add_function_usage_to (rtx call_insn, rtx call_fusage)
3603 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3606 /* Put the register usage information on the CALL. If there is already
3607 some usage information, put ours at the end. */
3608 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3612 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3613 link = XEXP (link, 1))
3616 XEXP (link, 1) = call_fusage;
3619 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3622 /* Delete all insns made since FROM.
3623 FROM becomes the new last instruction. */
3626 delete_insns_since (rtx from)
3631 NEXT_INSN (from) = 0;
3635 /* This function is deprecated, please use sequences instead.
3637 Move a consecutive bunch of insns to a different place in the chain.
3638 The insns to be moved are those between FROM and TO.
3639 They are moved to a new position after the insn AFTER.
3640 AFTER must not be FROM or TO or any insn in between.
3642 This function does not know about SEQUENCEs and hence should not be
3643 called after delay-slot filling has been done. */
3646 reorder_insns_nobb (rtx from, rtx to, rtx after)
3648 /* Splice this bunch out of where it is now. */
3649 if (PREV_INSN (from))
3650 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3652 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3653 if (last_insn == to)
3654 last_insn = PREV_INSN (from);
3655 if (first_insn == from)
3656 first_insn = NEXT_INSN (to);
3658 /* Make the new neighbors point to it and it to them. */
3659 if (NEXT_INSN (after))
3660 PREV_INSN (NEXT_INSN (after)) = to;
3662 NEXT_INSN (to) = NEXT_INSN (after);
3663 PREV_INSN (from) = after;
3664 NEXT_INSN (after) = from;
3665 if (after == last_insn)
3669 /* Same as function above, but take care to update BB boundaries. */
3671 reorder_insns (rtx from, rtx to, rtx after)
3673 rtx prev = PREV_INSN (from);
3674 basic_block bb, bb2;
3676 reorder_insns_nobb (from, to, after);
3678 if (GET_CODE (after) != BARRIER
3679 && (bb = BLOCK_FOR_INSN (after)))
3682 bb->flags |= BB_DIRTY;
3684 if (GET_CODE (from) != BARRIER
3685 && (bb2 = BLOCK_FOR_INSN (from)))
3687 if (BB_END (bb2) == to)
3688 BB_END (bb2) = prev;
3689 bb2->flags |= BB_DIRTY;
3692 if (BB_END (bb) == after)
3695 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3696 set_block_for_insn (x, bb);
3700 /* Return the line note insn preceding INSN. */
3703 find_line_note (rtx insn)
3705 if (no_line_numbers)
3708 for (; insn; insn = PREV_INSN (insn))
3709 if (GET_CODE (insn) == NOTE
3710 && NOTE_LINE_NUMBER (insn) >= 0)
3716 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3717 of the moved insns when debugging. This may insert a note between AFTER
3718 and FROM, and another one after TO. */
3721 reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
3723 rtx from_line = find_line_note (from);
3724 rtx after_line = find_line_note (after);
3726 reorder_insns (from, to, after);
3728 if (from_line == after_line)
3732 emit_note_copy_after (from_line, after);
3734 emit_note_copy_after (after_line, to);
3737 /* Remove unnecessary notes from the instruction stream. */
3740 remove_unnecessary_notes (void)
3742 rtx block_stack = NULL_RTX;
3743 rtx eh_stack = NULL_RTX;
3748 /* We must not remove the first instruction in the function because
3749 the compiler depends on the first instruction being a note. */
3750 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3752 /* Remember what's next. */
3753 next = NEXT_INSN (insn);
3755 /* We're only interested in notes. */
3756 if (GET_CODE (insn) != NOTE)
3759 switch (NOTE_LINE_NUMBER (insn))
3761 case NOTE_INSN_DELETED:
3762 case NOTE_INSN_LOOP_END_TOP_COND:
3766 case NOTE_INSN_EH_REGION_BEG:
3767 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3770 case NOTE_INSN_EH_REGION_END:
3771 /* Too many end notes. */
3772 if (eh_stack == NULL_RTX)
3774 /* Mismatched nesting. */
3775 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3778 eh_stack = XEXP (eh_stack, 1);
3779 free_INSN_LIST_node (tmp);
3782 case NOTE_INSN_BLOCK_BEG:
3783 /* By now, all notes indicating lexical blocks should have
3784 NOTE_BLOCK filled in. */
3785 if (NOTE_BLOCK (insn) == NULL_TREE)
3787 block_stack = alloc_INSN_LIST (insn, block_stack);
3790 case NOTE_INSN_BLOCK_END:
3791 /* Too many end notes. */
3792 if (block_stack == NULL_RTX)
3794 /* Mismatched nesting. */
3795 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3798 block_stack = XEXP (block_stack, 1);
3799 free_INSN_LIST_node (tmp);
3801 /* Scan back to see if there are any non-note instructions
3802 between INSN and the beginning of this block. If not,
3803 then there is no PC range in the generated code that will
3804 actually be in this block, so there's no point in
3805 remembering the existence of the block. */
3806 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3808 /* This block contains a real instruction. Note that we
3809 don't include labels; if the only thing in the block
3810 is a label, then there are still no PC values that
3811 lie within the block. */
3815 /* We're only interested in NOTEs. */
3816 if (GET_CODE (tmp) != NOTE)
3819 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3821 /* We just verified that this BLOCK matches us with
3822 the block_stack check above. Never delete the
3823 BLOCK for the outermost scope of the function; we
3824 can refer to names from that scope even if the
3825 block notes are messed up. */
3826 if (! is_body_block (NOTE_BLOCK (insn))
3827 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3834 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3835 /* There's a nested block. We need to leave the
3836 current block in place since otherwise the debugger
3837 wouldn't be able to show symbols from our block in
3838 the nested block. */
3844 /* Too many begin notes. */
3845 if (block_stack || eh_stack)
3850 /* Emit insn(s) of given code and pattern
3851 at a specified place within the doubly-linked list.
3853 All of the emit_foo global entry points accept an object
3854 X which is either an insn list or a PATTERN of a single
3857 There are thus a few canonical ways to generate code and
3858 emit it at a specific place in the instruction stream. For
3859 example, consider the instruction named SPOT and the fact that
3860 we would like to emit some instructions before SPOT. We might
3864 ... emit the new instructions ...
3865 insns_head = get_insns ();
3868 emit_insn_before (insns_head, SPOT);
3870 It used to be common to generate SEQUENCE rtl instead, but that
3871 is a relic of the past which no longer occurs. The reason is that
3872 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3873 generated would almost certainly die right after it was created. */
3875 /* Make X be output before the instruction BEFORE. */
3878 emit_insn_before (rtx x, rtx before)
3883 #ifdef ENABLE_RTL_CHECKING
3884 if (before == NULL_RTX)
3891 switch (GET_CODE (x))
3902 rtx next = NEXT_INSN (insn);
3903 add_insn_before (insn, before);
3909 #ifdef ENABLE_RTL_CHECKING
3916 last = make_insn_raw (x);
3917 add_insn_before (last, before);
3924 /* Make an instruction with body X and code JUMP_INSN
3925 and output it before the instruction BEFORE. */
3928 emit_jump_insn_before (rtx x, rtx before)
3930 rtx insn, last = NULL_RTX;
3932 #ifdef ENABLE_RTL_CHECKING
3933 if (before == NULL_RTX)
3937 switch (GET_CODE (x))
3948 rtx next = NEXT_INSN (insn);
3949 add_insn_before (insn, before);
3955 #ifdef ENABLE_RTL_CHECKING
3962 last = make_jump_insn_raw (x);
3963 add_insn_before (last, before);
3970 /* Make an instruction with body X and code CALL_INSN
3971 and output it before the instruction BEFORE. */
3974 emit_call_insn_before (rtx x, rtx before)
3976 rtx last = NULL_RTX, insn;
3978 #ifdef ENABLE_RTL_CHECKING
3979 if (before == NULL_RTX)
3983 switch (GET_CODE (x))
3994 rtx next = NEXT_INSN (insn);
3995 add_insn_before (insn, before);
4001 #ifdef ENABLE_RTL_CHECKING
4008 last = make_call_insn_raw (x);
4009 add_insn_before (last, before);
4016 /* Make an insn of code BARRIER
4017 and output it before the insn BEFORE. */
4020 emit_barrier_before (rtx before)
4022 rtx insn = rtx_alloc (BARRIER);
4024 INSN_UID (insn) = cur_insn_uid++;
4026 add_insn_before (insn, before);
4030 /* Emit the label LABEL before the insn BEFORE. */
4033 emit_label_before (rtx label, rtx before)
4035 /* This can be called twice for the same label as a result of the
4036 confusion that follows a syntax error! So make it harmless. */
4037 if (INSN_UID (label) == 0)
4039 INSN_UID (label) = cur_insn_uid++;
4040 add_insn_before (label, before);
4046 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4049 emit_note_before (int subtype, rtx before)
4051 rtx note = rtx_alloc (NOTE);
4052 INSN_UID (note) = cur_insn_uid++;
4053 NOTE_SOURCE_FILE (note) = 0;
4054 NOTE_LINE_NUMBER (note) = subtype;
4055 BLOCK_FOR_INSN (note) = NULL;
4057 add_insn_before (note, before);
4061 /* Helper for emit_insn_after, handles lists of instructions
4064 static rtx emit_insn_after_1 (rtx, rtx);
4067 emit_insn_after_1 (rtx first, rtx after)
4073 if (GET_CODE (after) != BARRIER
4074 && (bb = BLOCK_FOR_INSN (after)))
4076 bb->flags |= BB_DIRTY;
4077 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4078 if (GET_CODE (last) != BARRIER)
4079 set_block_for_insn (last, bb);
4080 if (GET_CODE (last) != BARRIER)
4081 set_block_for_insn (last, bb);
4082 if (BB_END (bb) == after)
4086 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4089 after_after = NEXT_INSN (after);
4091 NEXT_INSN (after) = first;
4092 PREV_INSN (first) = after;
4093 NEXT_INSN (last) = after_after;
4095 PREV_INSN (after_after) = last;
4097 if (after == last_insn)
4102 /* Make X be output after the insn AFTER. */
4105 emit_insn_after (rtx x, rtx after)
4109 #ifdef ENABLE_RTL_CHECKING
4110 if (after == NULL_RTX)
4117 switch (GET_CODE (x))
4125 last = emit_insn_after_1 (x, after);
4128 #ifdef ENABLE_RTL_CHECKING
4135 last = make_insn_raw (x);
4136 add_insn_after (last, after);
4143 /* Similar to emit_insn_after, except that line notes are to be inserted so
4144 as to act as if this insn were at FROM. */
4147 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4149 rtx from_line = find_line_note (from);
4150 rtx after_line = find_line_note (after);
4151 rtx insn = emit_insn_after (x, after);
4154 emit_note_copy_after (from_line, after);
4157 emit_note_copy_after (after_line, insn);
4160 /* Make an insn of code JUMP_INSN with body X
4161 and output it after the insn AFTER. */
4164 emit_jump_insn_after (rtx x, rtx after)
4168 #ifdef ENABLE_RTL_CHECKING
4169 if (after == NULL_RTX)
4173 switch (GET_CODE (x))
4181 last = emit_insn_after_1 (x, after);
4184 #ifdef ENABLE_RTL_CHECKING
4191 last = make_jump_insn_raw (x);
4192 add_insn_after (last, after);
4199 /* Make an instruction with body X and code CALL_INSN
4200 and output it after the instruction AFTER. */
4203 emit_call_insn_after (rtx x, rtx after)
4207 #ifdef ENABLE_RTL_CHECKING
4208 if (after == NULL_RTX)
4212 switch (GET_CODE (x))
4220 last = emit_insn_after_1 (x, after);
4223 #ifdef ENABLE_RTL_CHECKING
4230 last = make_call_insn_raw (x);
4231 add_insn_after (last, after);
4238 /* Make an insn of code BARRIER
4239 and output it after the insn AFTER. */
4242 emit_barrier_after (rtx after)
4244 rtx insn = rtx_alloc (BARRIER);
4246 INSN_UID (insn) = cur_insn_uid++;
4248 add_insn_after (insn, after);
4252 /* Emit the label LABEL after the insn AFTER. */
4255 emit_label_after (rtx label, rtx after)
4257 /* This can be called twice for the same label
4258 as a result of the confusion that follows a syntax error!
4259 So make it harmless. */
4260 if (INSN_UID (label) == 0)
4262 INSN_UID (label) = cur_insn_uid++;
4263 add_insn_after (label, after);
4269 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4272 emit_note_after (int subtype, rtx after)
4274 rtx note = rtx_alloc (NOTE);
4275 INSN_UID (note) = cur_insn_uid++;
4276 NOTE_SOURCE_FILE (note) = 0;
4277 NOTE_LINE_NUMBER (note) = subtype;
4278 BLOCK_FOR_INSN (note) = NULL;
4279 add_insn_after (note, after);
4283 /* Emit a copy of note ORIG after the insn AFTER. */
4286 emit_note_copy_after (rtx orig, rtx after)
4290 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4296 note = rtx_alloc (NOTE);
4297 INSN_UID (note) = cur_insn_uid++;
4298 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4299 NOTE_DATA (note) = NOTE_DATA (orig);
4300 BLOCK_FOR_INSN (note) = NULL;
4301 add_insn_after (note, after);
4305 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4307 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4309 rtx last = emit_insn_after (pattern, after);
4311 if (pattern == NULL_RTX)
4314 after = NEXT_INSN (after);
4317 if (active_insn_p (after))
4318 INSN_LOCATOR (after) = loc;
4321 after = NEXT_INSN (after);
4326 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4328 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4330 rtx last = emit_jump_insn_after (pattern, after);
4332 if (pattern == NULL_RTX)
4335 after = NEXT_INSN (after);
4338 if (active_insn_p (after))
4339 INSN_LOCATOR (after) = loc;
4342 after = NEXT_INSN (after);
4347 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4349 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4351 rtx last = emit_call_insn_after (pattern, after);
4353 if (pattern == NULL_RTX)
4356 after = NEXT_INSN (after);
4359 if (active_insn_p (after))
4360 INSN_LOCATOR (after) = loc;
4363 after = NEXT_INSN (after);
4368 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4370 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4372 rtx first = PREV_INSN (before);
4373 rtx last = emit_insn_before (pattern, before);
4375 if (pattern == NULL_RTX)
4378 first = NEXT_INSN (first);
4381 if (active_insn_p (first))
4382 INSN_LOCATOR (first) = loc;
4385 first = NEXT_INSN (first);
4390 /* Take X and emit it at the end of the doubly-linked
4393 Returns the last insn emitted. */
4398 rtx last = last_insn;
4404 switch (GET_CODE (x))
4415 rtx next = NEXT_INSN (insn);
4422 #ifdef ENABLE_RTL_CHECKING
4429 last = make_insn_raw (x);
4437 /* Make an insn of code JUMP_INSN with pattern X
4438 and add it to the end of the doubly-linked list. */
4441 emit_jump_insn (rtx x)
4443 rtx last = NULL_RTX, insn;
4445 switch (GET_CODE (x))
4456 rtx next = NEXT_INSN (insn);
4463 #ifdef ENABLE_RTL_CHECKING
4470 last = make_jump_insn_raw (x);
4478 /* Make an insn of code CALL_INSN with pattern X
4479 and add it to the end of the doubly-linked list. */
4482 emit_call_insn (rtx x)
4486 switch (GET_CODE (x))
4494 insn = emit_insn (x);
4497 #ifdef ENABLE_RTL_CHECKING
4504 insn = make_call_insn_raw (x);
4512 /* Add the label LABEL to the end of the doubly-linked list. */
4515 emit_label (rtx label)
4517 /* This can be called twice for the same label
4518 as a result of the confusion that follows a syntax error!
4519 So make it harmless. */
4520 if (INSN_UID (label) == 0)
4522 INSN_UID (label) = cur_insn_uid++;
4528 /* Make an insn of code BARRIER
4529 and add it to the end of the doubly-linked list. */
4534 rtx barrier = rtx_alloc (BARRIER);
4535 INSN_UID (barrier) = cur_insn_uid++;
4540 /* Make line numbering NOTE insn for LOCATION add it to the end
4541 of the doubly-linked list, but only if line-numbers are desired for
4542 debugging info and it doesn't match the previous one. */
4545 emit_line_note (location_t location)
4549 set_file_and_line_for_stmt (location);
4551 if (location.file && last_location.file
4552 && !strcmp (location.file, last_location.file)
4553 && location.line == last_location.line)
4555 last_location = location;
4557 if (no_line_numbers)
4563 note = emit_note (location.line);
4564 NOTE_SOURCE_FILE (note) = location.file;
4569 /* Emit a copy of note ORIG. */
4572 emit_note_copy (rtx orig)
4576 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4582 note = rtx_alloc (NOTE);
4584 INSN_UID (note) = cur_insn_uid++;
4585 NOTE_DATA (note) = NOTE_DATA (orig);
4586 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4587 BLOCK_FOR_INSN (note) = NULL;
4593 /* Make an insn of code NOTE or type NOTE_NO
4594 and add it to the end of the doubly-linked list. */
4597 emit_note (int note_no)
4601 note = rtx_alloc (NOTE);
4602 INSN_UID (note) = cur_insn_uid++;
4603 NOTE_LINE_NUMBER (note) = note_no;
4604 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4605 BLOCK_FOR_INSN (note) = NULL;
4610 /* Cause next statement to emit a line note even if the line number
4614 force_next_line_note (void)
4616 last_location.line = -1;
4619 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4620 note of this type already exists, remove it first. */
4623 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4625 rtx note = find_reg_note (insn, kind, NULL_RTX);
4631 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4632 has multiple sets (some callers assume single_set
4633 means the insn only has one set, when in fact it
4634 means the insn only has one * useful * set). */
4635 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4642 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4643 It serves no useful purpose and breaks eliminate_regs. */
4644 if (GET_CODE (datum) == ASM_OPERANDS)
4654 XEXP (note, 0) = datum;
4658 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4659 return REG_NOTES (insn);
4662 /* Return an indication of which type of insn should have X as a body.
4663 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4666 classify_insn (rtx x)
4668 if (GET_CODE (x) == CODE_LABEL)
4670 if (GET_CODE (x) == CALL)
4672 if (GET_CODE (x) == RETURN)
4674 if (GET_CODE (x) == SET)
4676 if (SET_DEST (x) == pc_rtx)
4678 else if (GET_CODE (SET_SRC (x)) == CALL)
4683 if (GET_CODE (x) == PARALLEL)
4686 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4687 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4689 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4690 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4692 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4693 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4699 /* Emit the rtl pattern X as an appropriate kind of insn.
4700 If X is a label, it is simply added into the insn chain. */
4705 enum rtx_code code = classify_insn (x);
4707 if (code == CODE_LABEL)
4708 return emit_label (x);
4709 else if (code == INSN)
4710 return emit_insn (x);
4711 else if (code == JUMP_INSN)
4713 rtx insn = emit_jump_insn (x);
4714 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4715 return emit_barrier ();
4718 else if (code == CALL_INSN)
4719 return emit_call_insn (x);
4724 /* Space for free sequence stack entries. */
4725 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4727 /* Begin emitting insns to a sequence which can be packaged in an
4728 RTL_EXPR. If this sequence will contain something that might cause
4729 the compiler to pop arguments to function calls (because those
4730 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4731 details), use do_pending_stack_adjust before calling this function.
4732 That will ensure that the deferred pops are not accidentally
4733 emitted in the middle of this sequence. */
4736 start_sequence (void)
4738 struct sequence_stack *tem;
4740 if (free_sequence_stack != NULL)
4742 tem = free_sequence_stack;
4743 free_sequence_stack = tem->next;
4746 tem = ggc_alloc (sizeof (struct sequence_stack));
4748 tem->next = seq_stack;
4749 tem->first = first_insn;
4750 tem->last = last_insn;
4751 tem->sequence_rtl_expr = seq_rtl_expr;
4759 /* Similarly, but indicate that this sequence will be placed in T, an
4760 RTL_EXPR. See the documentation for start_sequence for more
4761 information about how to use this function. */
4764 start_sequence_for_rtl_expr (tree t)
4771 /* Set up the insn chain starting with FIRST as the current sequence,
4772 saving the previously current one. See the documentation for
4773 start_sequence for more information about how to use this function. */
4776 push_to_sequence (rtx first)
4782 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4788 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4791 push_to_full_sequence (rtx first, rtx last)
4796 /* We really should have the end of the insn chain here. */
4797 if (last && NEXT_INSN (last))
4801 /* Set up the outer-level insn chain
4802 as the current sequence, saving the previously current one. */
4805 push_topmost_sequence (void)
4807 struct sequence_stack *stack, *top = NULL;
4811 for (stack = seq_stack; stack; stack = stack->next)
4814 first_insn = top->first;
4815 last_insn = top->last;
4816 seq_rtl_expr = top->sequence_rtl_expr;
4819 /* After emitting to the outer-level insn chain, update the outer-level
4820 insn chain, and restore the previous saved state. */
4823 pop_topmost_sequence (void)
4825 struct sequence_stack *stack, *top = NULL;
4827 for (stack = seq_stack; stack; stack = stack->next)
4830 top->first = first_insn;
4831 top->last = last_insn;
4832 /* ??? Why don't we save seq_rtl_expr here? */
4837 /* After emitting to a sequence, restore previous saved state.
4839 To get the contents of the sequence just made, you must call
4840 `get_insns' *before* calling here.
4842 If the compiler might have deferred popping arguments while
4843 generating this sequence, and this sequence will not be immediately
4844 inserted into the instruction stream, use do_pending_stack_adjust
4845 before calling get_insns. That will ensure that the deferred
4846 pops are inserted into this sequence, and not into some random
4847 location in the instruction stream. See INHIBIT_DEFER_POP for more
4848 information about deferred popping of arguments. */
4853 struct sequence_stack *tem = seq_stack;
4855 first_insn = tem->first;
4856 last_insn = tem->last;
4857 seq_rtl_expr = tem->sequence_rtl_expr;
4858 seq_stack = tem->next;
4860 memset (tem, 0, sizeof (*tem));
4861 tem->next = free_sequence_stack;
4862 free_sequence_stack = tem;
4865 /* This works like end_sequence, but records the old sequence in FIRST
4869 end_full_sequence (rtx *first, rtx *last)
4871 *first = first_insn;
4876 /* Return 1 if currently emitting into a sequence. */
4879 in_sequence_p (void)
4881 return seq_stack != 0;
4884 /* Put the various virtual registers into REGNO_REG_RTX. */
4887 init_virtual_regs (struct emit_status *es)
4889 rtx *ptr = es->x_regno_reg_rtx;
4890 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4891 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4892 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4893 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4894 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4898 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4899 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4900 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4901 static int copy_insn_n_scratches;
4903 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4904 copied an ASM_OPERANDS.
4905 In that case, it is the original input-operand vector. */
4906 static rtvec orig_asm_operands_vector;
4908 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4909 copied an ASM_OPERANDS.
4910 In that case, it is the copied input-operand vector. */
4911 static rtvec copy_asm_operands_vector;
4913 /* Likewise for the constraints vector. */
4914 static rtvec orig_asm_constraints_vector;
4915 static rtvec copy_asm_constraints_vector;
4917 /* Recursively create a new copy of an rtx for copy_insn.
4918 This function differs from copy_rtx in that it handles SCRATCHes and
4919 ASM_OPERANDs properly.
4920 Normally, this function is not used directly; use copy_insn as front end.
4921 However, you could first copy an insn pattern with copy_insn and then use
4922 this function afterwards to properly copy any REG_NOTEs containing
4926 copy_insn_1 (rtx orig)
4931 const char *format_ptr;
4933 code = GET_CODE (orig);
4949 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4954 for (i = 0; i < copy_insn_n_scratches; i++)
4955 if (copy_insn_scratch_in[i] == orig)
4956 return copy_insn_scratch_out[i];
4960 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4961 a LABEL_REF, it isn't sharable. */
4962 if (GET_CODE (XEXP (orig, 0)) == PLUS
4963 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4964 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4968 /* A MEM with a constant address is not sharable. The problem is that
4969 the constant address may need to be reloaded. If the mem is shared,
4970 then reloading one copy of this mem will cause all copies to appear
4971 to have been reloaded. */
4977 copy = rtx_alloc (code);
4979 /* Copy the various flags, and other information. We assume that
4980 all fields need copying, and then clear the fields that should
4981 not be copied. That is the sensible default behavior, and forces
4982 us to explicitly document why we are *not* copying a flag. */
4983 memcpy (copy, orig, RTX_HDR_SIZE);
4985 /* We do not copy the USED flag, which is used as a mark bit during
4986 walks over the RTL. */
4987 RTX_FLAG (copy, used) = 0;
4989 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4990 if (GET_RTX_CLASS (code) == 'i')
4992 RTX_FLAG (copy, jump) = 0;
4993 RTX_FLAG (copy, call) = 0;
4994 RTX_FLAG (copy, frame_related) = 0;
4997 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4999 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5001 copy->u.fld[i] = orig->u.fld[i];
5002 switch (*format_ptr++)
5005 if (XEXP (orig, i) != NULL)
5006 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5011 if (XVEC (orig, i) == orig_asm_constraints_vector)
5012 XVEC (copy, i) = copy_asm_constraints_vector;
5013 else if (XVEC (orig, i) == orig_asm_operands_vector)
5014 XVEC (copy, i) = copy_asm_operands_vector;
5015 else if (XVEC (orig, i) != NULL)
5017 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5018 for (j = 0; j < XVECLEN (copy, i); j++)
5019 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5030 /* These are left unchanged. */
5038 if (code == SCRATCH)
5040 i = copy_insn_n_scratches++;
5041 if (i >= MAX_RECOG_OPERANDS)
5043 copy_insn_scratch_in[i] = orig;
5044 copy_insn_scratch_out[i] = copy;
5046 else if (code == ASM_OPERANDS)
5048 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5049 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5050 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5051 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5057 /* Create a new copy of an rtx.
5058 This function differs from copy_rtx in that it handles SCRATCHes and
5059 ASM_OPERANDs properly.
5060 INSN doesn't really have to be a full INSN; it could be just the
5063 copy_insn (rtx insn)
5065 copy_insn_n_scratches = 0;
5066 orig_asm_operands_vector = 0;
5067 orig_asm_constraints_vector = 0;
5068 copy_asm_operands_vector = 0;
5069 copy_asm_constraints_vector = 0;
5070 return copy_insn_1 (insn);
5073 /* Initialize data structures and variables in this file
5074 before generating rtl for each function. */
5079 struct function *f = cfun;
5081 f->emit = ggc_alloc (sizeof (struct emit_status));
5084 seq_rtl_expr = NULL;
5086 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5087 last_location.line = 0;
5088 last_location.file = 0;
5089 first_label_num = label_num;
5093 /* Init the tables that describe all the pseudo regs. */
5095 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5097 f->emit->regno_pointer_align
5098 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5099 * sizeof (unsigned char));
5102 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5104 /* Put copies of all the hard registers into regno_reg_rtx. */
5105 memcpy (regno_reg_rtx,
5106 static_regno_reg_rtx,
5107 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5109 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5110 init_virtual_regs (f->emit);
5112 /* Indicate that the virtual registers and stack locations are
5114 REG_POINTER (stack_pointer_rtx) = 1;
5115 REG_POINTER (frame_pointer_rtx) = 1;
5116 REG_POINTER (hard_frame_pointer_rtx) = 1;
5117 REG_POINTER (arg_pointer_rtx) = 1;
5119 REG_POINTER (virtual_incoming_args_rtx) = 1;
5120 REG_POINTER (virtual_stack_vars_rtx) = 1;
5121 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5122 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5123 REG_POINTER (virtual_cfa_rtx) = 1;
5125 #ifdef STACK_BOUNDARY
5126 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5127 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5128 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5129 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5131 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5132 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5133 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5134 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5135 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5138 #ifdef INIT_EXPANDERS
5143 /* Generate the constant 0. */
5146 gen_const_vector_0 (enum machine_mode mode)
5151 enum machine_mode inner;
5153 units = GET_MODE_NUNITS (mode);
5154 inner = GET_MODE_INNER (mode);
5156 v = rtvec_alloc (units);
5158 /* We need to call this function after we to set CONST0_RTX first. */
5159 if (!CONST0_RTX (inner))
5162 for (i = 0; i < units; ++i)
5163 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5165 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5169 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5170 all elements are zero. */
5172 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5174 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5177 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5178 if (RTVEC_ELT (v, i) != inner_zero)
5179 return gen_rtx_raw_CONST_VECTOR (mode, v);
5180 return CONST0_RTX (mode);
5183 /* Create some permanent unique rtl objects shared between all functions.
5184 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5187 init_emit_once (int line_numbers)
5190 enum machine_mode mode;
5191 enum machine_mode double_mode;
5193 /* We need reg_raw_mode, so initialize the modes now. */
5194 init_reg_modes_once ();
5196 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5198 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5199 const_int_htab_eq, NULL);
5201 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5202 const_double_htab_eq, NULL);
5204 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5205 mem_attrs_htab_eq, NULL);
5206 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5207 reg_attrs_htab_eq, NULL);
5209 no_line_numbers = ! line_numbers;
5211 /* Compute the word and byte modes. */
5213 byte_mode = VOIDmode;
5214 word_mode = VOIDmode;
5215 double_mode = VOIDmode;
5217 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5218 mode = GET_MODE_WIDER_MODE (mode))
5220 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5221 && byte_mode == VOIDmode)
5224 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5225 && word_mode == VOIDmode)
5229 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5230 mode = GET_MODE_WIDER_MODE (mode))
5232 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5233 && double_mode == VOIDmode)
5237 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5239 /* Assign register numbers to the globally defined register rtx.
5240 This must be done at runtime because the register number field
5241 is in a union and some compilers can't initialize unions. */
5243 pc_rtx = gen_rtx_PC (VOIDmode);
5244 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5245 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5246 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5247 if (hard_frame_pointer_rtx == 0)
5248 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5249 HARD_FRAME_POINTER_REGNUM);
5250 if (arg_pointer_rtx == 0)
5251 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5252 virtual_incoming_args_rtx =
5253 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5254 virtual_stack_vars_rtx =
5255 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5256 virtual_stack_dynamic_rtx =
5257 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5258 virtual_outgoing_args_rtx =
5259 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5260 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5262 /* Initialize RTL for commonly used hard registers. These are
5263 copied into regno_reg_rtx as we begin to compile each function. */
5264 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5265 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5267 #ifdef INIT_EXPANDERS
5268 /* This is to initialize {init|mark|free}_machine_status before the first
5269 call to push_function_context_to. This is needed by the Chill front
5270 end which calls push_function_context_to before the first call to
5271 init_function_start. */
5275 /* Create the unique rtx's for certain rtx codes and operand values. */
5277 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5278 tries to use these variables. */
5279 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5280 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5281 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5283 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5284 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5285 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5287 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5289 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5290 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5291 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5292 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5293 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5294 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5295 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5297 dconsthalf = dconst1;
5300 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5302 /* Initialize mathematical constants for constant folding builtins.
5303 These constants need to be given to at least 160 bits precision. */
5304 real_from_string (&dconstpi,
5305 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5306 real_from_string (&dconste,
5307 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5309 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5311 REAL_VALUE_TYPE *r =
5312 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5314 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5315 mode = GET_MODE_WIDER_MODE (mode))
5316 const_tiny_rtx[i][(int) mode] =
5317 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5319 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5321 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5322 mode = GET_MODE_WIDER_MODE (mode))
5323 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5325 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5327 mode = GET_MODE_WIDER_MODE (mode))
5328 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5331 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5333 mode = GET_MODE_WIDER_MODE (mode))
5334 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5336 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5338 mode = GET_MODE_WIDER_MODE (mode))
5339 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5341 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5342 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5343 const_tiny_rtx[0][i] = const0_rtx;
5345 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5346 if (STORE_FLAG_VALUE == 1)
5347 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5349 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5350 return_address_pointer_rtx
5351 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5354 #ifdef STATIC_CHAIN_REGNUM
5355 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5357 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5358 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5359 static_chain_incoming_rtx
5360 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5363 static_chain_incoming_rtx = static_chain_rtx;
5367 static_chain_rtx = STATIC_CHAIN;
5369 #ifdef STATIC_CHAIN_INCOMING
5370 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5372 static_chain_incoming_rtx = static_chain_rtx;
5376 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5377 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5380 /* Query and clear/ restore no_line_numbers. This is used by the
5381 switch / case handling in stmt.c to give proper line numbers in
5382 warnings about unreachable code. */
5385 force_line_numbers (void)
5387 int old = no_line_numbers;
5389 no_line_numbers = 0;
5391 force_next_line_note ();
5396 restore_line_number_status (int old_value)
5398 no_line_numbers = old_value;
5401 /* Produce exact duplicate of insn INSN after AFTER.
5402 Care updating of libcall regions if present. */
5405 emit_copy_of_insn_after (rtx insn, rtx after)
5408 rtx note1, note2, link;
5410 switch (GET_CODE (insn))
5413 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5417 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5421 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5422 if (CALL_INSN_FUNCTION_USAGE (insn))
5423 CALL_INSN_FUNCTION_USAGE (new)
5424 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5425 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5426 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5433 /* Update LABEL_NUSES. */
5434 mark_jump_label (PATTERN (new), new, 0);
5436 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5438 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5440 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5441 if (REG_NOTE_KIND (link) != REG_LABEL)
5443 if (GET_CODE (link) == EXPR_LIST)
5445 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5450 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5455 /* Fix the libcall sequences. */
5456 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5459 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5461 XEXP (note1, 0) = p;
5462 XEXP (note2, 0) = new;
5464 INSN_CODE (new) = INSN_CODE (insn);
5468 static GTY((deletable(""))) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5470 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5472 if (hard_reg_clobbers[mode][regno])
5473 return hard_reg_clobbers[mode][regno];
5475 return (hard_reg_clobbers[mode][regno] =
5476 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5479 #include "gt-emit-rtl.h"