1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num = 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl[GR_MAX];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
101 REAL_VALUE_TYPE dconst0;
102 REAL_VALUE_TYPE dconst1;
103 REAL_VALUE_TYPE dconst2;
104 REAL_VALUE_TYPE dconstm1;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 /* This is where the pointer to the obstack being used for RTL is stored. */
174 extern struct obstack *rtl_obstack;
176 static rtx make_jump_insn_raw PARAMS ((rtx));
177 static rtx make_call_insn_raw PARAMS ((rtx));
178 static rtx find_line_note PARAMS ((rtx));
179 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
180 static void unshare_all_rtl_1 PARAMS ((rtx));
181 static void unshare_all_decls PARAMS ((tree));
182 static hashval_t const_int_htab_hash PARAMS ((const void *));
183 static int const_int_htab_eq PARAMS ((const void *,
185 static int rtx_htab_mark_1 PARAMS ((void **, void *));
186 static void rtx_htab_mark PARAMS ((void *));
189 /* Returns a hash code for X (which is a really a CONST_INT). */
192 const_int_htab_hash (x)
195 return (hashval_t) INTVAL ((const struct rtx_def *) x);
198 /* Returns non-zero if the value represented by X (which is really a
199 CONST_INT) is the same as that given by Y (which is really a
203 const_int_htab_eq (x, y)
207 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
210 /* Mark the hash-table element X (which is really a pointer to an
214 rtx_htab_mark_1 (x, data)
216 void *data ATTRIBUTE_UNUSED;
222 /* Mark all the elements of HTAB (which is really an htab_t full of
229 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
232 /* There are some RTL codes that require special attention; the generation
233 functions do the raw handling. If you add to this list, modify
234 special_rtx in gengenrtl.c as well. */
237 gen_rtx_CONST_INT (mode, arg)
238 enum machine_mode mode ATTRIBUTE_UNUSED;
243 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
244 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
246 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
247 if (const_true_rtx && arg == STORE_FLAG_VALUE)
248 return const_true_rtx;
251 /* Look up the CONST_INT in the hash table. */
252 slot = htab_find_slot_with_hash (const_int_htab, &arg,
253 (hashval_t) arg, INSERT);
258 push_obstacks_nochange ();
259 end_temporary_allocation ();
260 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
264 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
270 /* CONST_DOUBLEs needs special handling because their length is known
274 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
275 enum machine_mode mode;
277 HOST_WIDE_INT arg1, arg2;
279 rtx r = rtx_alloc (CONST_DOUBLE);
284 X0EXP (r, 1) = NULL_RTX;
288 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
295 gen_rtx_REG (mode, regno)
296 enum machine_mode mode;
299 /* In case the MD file explicitly references the frame pointer, have
300 all such references point to the same frame pointer. This is
301 used during frame pointer elimination to distinguish the explicit
302 references to these registers from pseudos that happened to be
305 If we have eliminated the frame pointer or arg pointer, we will
306 be using it as a normal register, for example as a spill
307 register. In such cases, we might be accessing it in a mode that
308 is not Pmode and therefore cannot use the pre-allocated rtx.
310 Also don't do this when we are making new REGs in reload, since
311 we don't want to get confused with the real pointers. */
313 if (mode == Pmode && !reload_in_progress)
315 if (regno == FRAME_POINTER_REGNUM)
316 return frame_pointer_rtx;
317 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
318 if (regno == HARD_FRAME_POINTER_REGNUM)
319 return hard_frame_pointer_rtx;
321 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
322 if (regno == ARG_POINTER_REGNUM)
323 return arg_pointer_rtx;
325 #ifdef RETURN_ADDRESS_POINTER_REGNUM
326 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
327 return return_address_pointer_rtx;
329 if (regno == STACK_POINTER_REGNUM)
330 return stack_pointer_rtx;
333 return gen_rtx_raw_REG (mode, regno);
337 gen_rtx_MEM (mode, addr)
338 enum machine_mode mode;
341 rtx rt = gen_rtx_raw_MEM (mode, addr);
343 /* This field is not cleared by the mere allocation of the rtx, so
345 MEM_ALIAS_SET (rt) = 0;
350 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
352 ** This routine generates an RTX of the size specified by
353 ** <code>, which is an RTX code. The RTX structure is initialized
354 ** from the arguments <element1> through <elementn>, which are
355 ** interpreted according to the specific RTX type's format. The
356 ** special machine mode associated with the rtx (if any) is specified
359 ** gen_rtx can be invoked in a way which resembles the lisp-like
360 ** rtx it will generate. For example, the following rtx structure:
362 ** (plus:QI (mem:QI (reg:SI 1))
363 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
365 ** ...would be generated by the following C code:
367 ** gen_rtx (PLUS, QImode,
368 ** gen_rtx (MEM, QImode,
369 ** gen_rtx (REG, SImode, 1)),
370 ** gen_rtx (MEM, QImode,
371 ** gen_rtx (PLUS, SImode,
372 ** gen_rtx (REG, SImode, 2),
373 ** gen_rtx (REG, SImode, 3)))),
378 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
380 #ifndef ANSI_PROTOTYPES
382 enum machine_mode mode;
385 register int i; /* Array indices... */
386 register const char *fmt; /* Current rtx's format... */
387 register rtx rt_val; /* RTX to return to caller... */
391 #ifndef ANSI_PROTOTYPES
392 code = va_arg (p, enum rtx_code);
393 mode = va_arg (p, enum machine_mode);
399 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
404 rtx arg0 = va_arg (p, rtx);
405 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
406 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
407 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
412 rt_val = gen_rtx_REG (mode, va_arg (p, int));
416 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
420 rt_val = rtx_alloc (code); /* Allocate the storage space. */
421 rt_val->mode = mode; /* Store the machine mode... */
423 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
424 for (i = 0; i < GET_RTX_LENGTH (code); i++)
428 case '0': /* Unused field. */
431 case 'i': /* An integer? */
432 XINT (rt_val, i) = va_arg (p, int);
435 case 'w': /* A wide integer? */
436 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
439 case 's': /* A string? */
440 XSTR (rt_val, i) = va_arg (p, char *);
443 case 'e': /* An expression? */
444 case 'u': /* An insn? Same except when printing. */
445 XEXP (rt_val, i) = va_arg (p, rtx);
448 case 'E': /* An RTX vector? */
449 XVEC (rt_val, i) = va_arg (p, rtvec);
452 case 'b': /* A bitmap? */
453 XBITMAP (rt_val, i) = va_arg (p, bitmap);
456 case 't': /* A tree? */
457 XTREE (rt_val, i) = va_arg (p, tree);
471 /* gen_rtvec (n, [rt1, ..., rtn])
473 ** This routine creates an rtvec and stores within it the
474 ** pointers to rtx's which are its arguments.
479 gen_rtvec VPARAMS ((int n, ...))
481 #ifndef ANSI_PROTOTYPES
490 #ifndef ANSI_PROTOTYPES
495 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
497 vector = (rtx *) alloca (n * sizeof (rtx));
499 for (i = 0; i < n; i++)
500 vector[i] = va_arg (p, rtx);
503 return gen_rtvec_v (n, vector);
507 gen_rtvec_v (n, argp)
512 register rtvec rt_val;
515 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
517 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
519 for (i = 0; i < n; i++)
520 rt_val->elem[i] = *argp++;
526 /* Generate a REG rtx for a new pseudo register of mode MODE.
527 This pseudo is assigned the next sequential register number. */
531 enum machine_mode mode;
533 struct function *f = cfun;
536 /* Don't let anything called after initial flow analysis create new
541 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
542 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
544 /* For complex modes, don't make a single pseudo.
545 Instead, make a CONCAT of two pseudos.
546 This allows noncontiguous allocation of the real and imaginary parts,
547 which makes much better code. Besides, allocating DCmode
548 pseudos overstrains reload on some machines like the 386. */
549 rtx realpart, imagpart;
550 int size = GET_MODE_UNIT_SIZE (mode);
551 enum machine_mode partmode
552 = mode_for_size (size * BITS_PER_UNIT,
553 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
554 ? MODE_FLOAT : MODE_INT),
557 realpart = gen_reg_rtx (partmode);
558 imagpart = gen_reg_rtx (partmode);
559 return gen_rtx_CONCAT (mode, realpart, imagpart);
562 /* Make sure regno_pointer_flag and regno_reg_rtx are large
563 enough to have an element for this pseudo reg number. */
565 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
567 int old_size = f->emit->regno_pointer_flag_length;
570 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
571 memset (new + old_size, 0, old_size);
572 f->emit->regno_pointer_flag = new;
574 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
575 memset (new + old_size, 0, old_size);
576 f->emit->regno_pointer_align = (unsigned char *) new;
578 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
579 old_size * 2 * sizeof (rtx));
580 memset (new1 + old_size, 0, old_size * sizeof (rtx));
581 regno_reg_rtx = new1;
583 f->emit->regno_pointer_flag_length = old_size * 2;
586 val = gen_rtx_raw_REG (mode, reg_rtx_no);
587 regno_reg_rtx[reg_rtx_no++] = val;
591 /* Identify REG (which may be a CONCAT) as a user register. */
597 if (GET_CODE (reg) == CONCAT)
599 REG_USERVAR_P (XEXP (reg, 0)) = 1;
600 REG_USERVAR_P (XEXP (reg, 1)) = 1;
602 else if (GET_CODE (reg) == REG)
603 REG_USERVAR_P (reg) = 1;
608 /* Identify REG as a probable pointer register and show its alignment
609 as ALIGN, if nonzero. */
612 mark_reg_pointer (reg, align)
616 if (! REGNO_POINTER_FLAG (REGNO (reg)))
618 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
621 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
623 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
624 /* We can no-longer be sure just how aligned this pointer is */
625 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
628 /* Return 1 plus largest pseudo reg number used in the current function. */
636 /* Return 1 + the largest label number used so far in the current function. */
641 if (last_label_num && label_num == base_label_num)
642 return last_label_num;
646 /* Return first label number used in this function (if any were used). */
649 get_first_label_num ()
651 return first_label_num;
654 /* Return a value representing some low-order bits of X, where the number
655 of low-order bits is given by MODE. Note that no conversion is done
656 between floating-point and fixed-point values, rather, the bit
657 representation is returned.
659 This function handles the cases in common between gen_lowpart, below,
660 and two variants in cse.c and combine.c. These are the cases that can
661 be safely handled at all points in the compilation.
663 If this is not a case we can handle, return 0. */
666 gen_lowpart_common (mode, x)
667 enum machine_mode mode;
672 if (GET_MODE (x) == mode)
675 /* MODE must occupy no more words than the mode of X. */
676 if (GET_MODE (x) != VOIDmode
677 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
678 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
682 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
683 word = ((GET_MODE_SIZE (GET_MODE (x))
684 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
687 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
688 && (GET_MODE_CLASS (mode) == MODE_INT
689 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
691 /* If we are getting the low-order part of something that has been
692 sign- or zero-extended, we can either just use the object being
693 extended or make a narrower extension. If we want an even smaller
694 piece than the size of the object being extended, call ourselves
697 This case is used mostly by combine and cse. */
699 if (GET_MODE (XEXP (x, 0)) == mode)
701 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
702 return gen_lowpart_common (mode, XEXP (x, 0));
703 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
704 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
706 else if (GET_CODE (x) == SUBREG
707 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
708 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
709 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
711 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
712 else if (GET_CODE (x) == REG)
714 /* Let the backend decide how many registers to skip. This is needed
715 in particular for Sparc64 where fp regs are smaller than a word. */
716 /* ??? Note that subregs are now ambiguous, in that those against
717 pseudos are sized by the Word Size, while those against hard
718 regs are sized by the underlying register size. Better would be
719 to always interpret the subreg offset parameter as bytes or bits. */
721 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
722 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
723 - HARD_REGNO_NREGS (REGNO (x), mode));
725 /* If the register is not valid for MODE, return 0. If we don't
726 do this, there is no way to fix up the resulting REG later.
727 But we do do this if the current REG is not valid for its
728 mode. This latter is a kludge, but is required due to the
729 way that parameters are passed on some machines, most
731 if (REGNO (x) < FIRST_PSEUDO_REGISTER
732 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
733 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
735 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
736 /* integrate.c can't handle parts of a return value register. */
737 && (! REG_FUNCTION_VALUE_P (x)
738 || ! rtx_equal_function_value_matters)
739 #ifdef CLASS_CANNOT_CHANGE_SIZE
740 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
741 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
742 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
743 && (TEST_HARD_REG_BIT
744 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
747 /* We want to keep the stack, frame, and arg pointers
749 && x != frame_pointer_rtx
750 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
751 && x != arg_pointer_rtx
753 && x != stack_pointer_rtx)
754 return gen_rtx_REG (mode, REGNO (x) + word);
756 return gen_rtx_SUBREG (mode, x, word);
758 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
759 from the low-order part of the constant. */
760 else if ((GET_MODE_CLASS (mode) == MODE_INT
761 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
762 && GET_MODE (x) == VOIDmode
763 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
765 /* If MODE is twice the host word size, X is already the desired
766 representation. Otherwise, if MODE is wider than a word, we can't
767 do this. If MODE is exactly a word, return just one CONST_INT.
768 If MODE is smaller than a word, clear the bits that don't belong
769 in our mode, unless they and our sign bit are all one. So we get
770 either a reasonable negative value or a reasonable unsigned value
773 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
775 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
777 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
778 return (GET_CODE (x) == CONST_INT ? x
779 : GEN_INT (CONST_DOUBLE_LOW (x)));
782 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
783 int width = GET_MODE_BITSIZE (mode);
784 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
785 : CONST_DOUBLE_LOW (x));
787 /* Sign extend to HOST_WIDE_INT. */
788 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
790 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
795 /* If X is an integral constant but we want it in floating-point, it
796 must be the case that we have a union of an integer and a floating-point
797 value. If the machine-parameters allow it, simulate that union here
798 and return the result. The two-word and single-word cases are
801 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
802 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
803 || flag_pretend_float)
804 && GET_MODE_CLASS (mode) == MODE_FLOAT
805 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
806 && GET_CODE (x) == CONST_INT
807 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
808 #ifdef REAL_ARITHMETIC
814 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
815 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
819 union {HOST_WIDE_INT i; float d; } u;
822 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
825 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
826 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
827 || flag_pretend_float)
828 && GET_MODE_CLASS (mode) == MODE_FLOAT
829 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
830 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
831 && GET_MODE (x) == VOIDmode
832 && (sizeof (double) * HOST_BITS_PER_CHAR
833 == 2 * HOST_BITS_PER_WIDE_INT))
834 #ifdef REAL_ARITHMETIC
838 HOST_WIDE_INT low, high;
840 if (GET_CODE (x) == CONST_INT)
841 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
843 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
845 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
847 if (WORDS_BIG_ENDIAN)
848 i[0] = high, i[1] = low;
850 i[0] = low, i[1] = high;
852 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
853 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
857 union {HOST_WIDE_INT i[2]; double d; } u;
858 HOST_WIDE_INT low, high;
860 if (GET_CODE (x) == CONST_INT)
861 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
863 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
865 #ifdef HOST_WORDS_BIG_ENDIAN
866 u.i[0] = high, u.i[1] = low;
868 u.i[0] = low, u.i[1] = high;
871 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
875 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
876 same as sizeof (double) or when sizeof (float) is larger than the
877 size of a word on the target machine. */
878 #ifdef REAL_ARITHMETIC
879 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
885 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
886 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
888 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
889 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
890 || flag_pretend_float)
891 && GET_MODE_CLASS (mode) == MODE_FLOAT
892 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
893 && GET_CODE (x) == CONST_INT
894 && (sizeof (double) * HOST_BITS_PER_CHAR
895 == HOST_BITS_PER_WIDE_INT))
901 r = REAL_VALUE_FROM_TARGET_DOUBLE (&i);
902 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
906 /* Similarly, if this is converting a floating-point value into a
907 single-word integer. Only do this is the host and target parameters are
910 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
911 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
912 || flag_pretend_float)
913 && (GET_MODE_CLASS (mode) == MODE_INT
914 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
915 && GET_CODE (x) == CONST_DOUBLE
916 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
917 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
918 return operand_subword (x, word, 0, GET_MODE (x));
920 /* Similarly, if this is converting a floating-point value into a
921 two-word integer, we can do this one word at a time and make an
922 integer. Only do this is the host and target parameters are
925 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
926 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
927 || flag_pretend_float)
928 && (GET_MODE_CLASS (mode) == MODE_INT
929 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
930 && GET_CODE (x) == CONST_DOUBLE
931 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
932 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
935 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
937 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
939 if (lowpart && GET_CODE (lowpart) == CONST_INT
940 && highpart && GET_CODE (highpart) == CONST_INT)
941 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
944 /* Otherwise, we can't do this. */
948 /* Return the real part (which has mode MODE) of a complex value X.
949 This always comes at the low address in memory. */
952 gen_realpart (mode, x)
953 enum machine_mode mode;
956 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
958 else if (WORDS_BIG_ENDIAN
959 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
961 && REGNO (x) < FIRST_PSEUDO_REGISTER)
962 fatal ("Unable to access real part of complex value in a hard register on this target");
963 else if (WORDS_BIG_ENDIAN)
964 return gen_highpart (mode, x);
966 return gen_lowpart (mode, x);
969 /* Return the imaginary part (which has mode MODE) of a complex value X.
970 This always comes at the high address in memory. */
973 gen_imagpart (mode, x)
974 enum machine_mode mode;
977 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
979 else if (WORDS_BIG_ENDIAN)
980 return gen_lowpart (mode, x);
981 else if (!WORDS_BIG_ENDIAN
982 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
984 && REGNO (x) < FIRST_PSEUDO_REGISTER)
985 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
987 return gen_highpart (mode, x);
990 /* Return 1 iff X, assumed to be a SUBREG,
991 refers to the real part of the complex value in its containing reg.
992 Complex values are always stored with the real part in the first word,
993 regardless of WORDS_BIG_ENDIAN. */
996 subreg_realpart_p (x)
999 if (GET_CODE (x) != SUBREG)
1002 return ((unsigned int) SUBREG_WORD (x) * UNITS_PER_WORD
1003 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1006 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1007 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1008 least-significant part of X.
1009 MODE specifies how big a part of X to return;
1010 it usually should not be larger than a word.
1011 If X is a MEM whose address is a QUEUED, the value may be so also. */
1014 gen_lowpart (mode, x)
1015 enum machine_mode mode;
1018 rtx result = gen_lowpart_common (mode, x);
1022 else if (GET_CODE (x) == REG)
1024 /* Must be a hard reg that's not valid in MODE. */
1025 result = gen_lowpart_common (mode, copy_to_reg (x));
1030 else if (GET_CODE (x) == MEM)
1032 /* The only additional case we can do is MEM. */
1033 register int offset = 0;
1034 if (WORDS_BIG_ENDIAN)
1035 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1036 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1038 if (BYTES_BIG_ENDIAN)
1039 /* Adjust the address so that the address-after-the-data
1041 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1042 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1044 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1046 else if (GET_CODE (x) == ADDRESSOF)
1047 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1052 /* Like `gen_lowpart', but refer to the most significant part.
1053 This is used to access the imaginary part of a complex number. */
1056 gen_highpart (mode, x)
1057 enum machine_mode mode;
1060 /* This case loses if X is a subreg. To catch bugs early,
1061 complain if an invalid MODE is used even in other cases. */
1062 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1063 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1065 if (GET_CODE (x) == CONST_DOUBLE
1066 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1067 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1070 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1071 else if (GET_CODE (x) == CONST_INT)
1073 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1075 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1077 else if (GET_CODE (x) == MEM)
1079 register int offset = 0;
1080 if (! WORDS_BIG_ENDIAN)
1081 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1082 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1084 if (! BYTES_BIG_ENDIAN
1085 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1086 offset -= (GET_MODE_SIZE (mode)
1087 - MIN (UNITS_PER_WORD,
1088 GET_MODE_SIZE (GET_MODE (x))));
1090 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1092 else if (GET_CODE (x) == SUBREG)
1094 /* The only time this should occur is when we are looking at a
1095 multi-word item with a SUBREG whose mode is the same as that of the
1096 item. It isn't clear what we would do if it wasn't. */
1097 if (SUBREG_WORD (x) != 0)
1099 return gen_highpart (mode, SUBREG_REG (x));
1101 else if (GET_CODE (x) == REG)
1105 /* Let the backend decide how many registers to skip. This is needed
1106 in particular for sparc64 where fp regs are smaller than a word. */
1107 /* ??? Note that subregs are now ambiguous, in that those against
1108 pseudos are sized by the word size, while those against hard
1109 regs are sized by the underlying register size. Better would be
1110 to always interpret the subreg offset parameter as bytes or bits. */
1112 if (WORDS_BIG_ENDIAN)
1114 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1115 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1116 - HARD_REGNO_NREGS (REGNO (x), mode));
1118 word = ((GET_MODE_SIZE (GET_MODE (x))
1119 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1122 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1123 /* integrate.c can't handle parts of a return value register. */
1124 && (! REG_FUNCTION_VALUE_P (x)
1125 || ! rtx_equal_function_value_matters)
1126 /* We want to keep the stack, frame, and arg pointers special. */
1127 && x != frame_pointer_rtx
1128 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1129 && x != arg_pointer_rtx
1131 && x != stack_pointer_rtx)
1132 return gen_rtx_REG (mode, REGNO (x) + word);
1134 return gen_rtx_SUBREG (mode, x, word);
1140 /* Return 1 iff X, assumed to be a SUBREG,
1141 refers to the least significant part of its containing reg.
1142 If X is not a SUBREG, always return 1 (it is its own low part!). */
1145 subreg_lowpart_p (x)
1148 if (GET_CODE (x) != SUBREG)
1150 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1153 if (WORDS_BIG_ENDIAN
1154 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1155 return (SUBREG_WORD (x)
1156 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1157 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1160 return SUBREG_WORD (x) == 0;
1163 /* Return subword I of operand OP.
1164 The word number, I, is interpreted as the word number starting at the
1165 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1166 otherwise it is the high-order word.
1168 If we cannot extract the required word, we return zero. Otherwise, an
1169 rtx corresponding to the requested word will be returned.
1171 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1172 reload has completed, a valid address will always be returned. After
1173 reload, if a valid address cannot be returned, we return zero.
1175 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1176 it is the responsibility of the caller.
1178 MODE is the mode of OP in case it is a CONST_INT. */
1181 operand_subword (op, i, validate_address, mode)
1184 int validate_address;
1185 enum machine_mode mode;
1188 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1190 if (mode == VOIDmode)
1191 mode = GET_MODE (op);
1193 if (mode == VOIDmode)
1196 /* If OP is narrower than a word, fail. */
1198 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1201 /* If we want a word outside OP, return zero. */
1203 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1206 /* If OP is already an integer word, return it. */
1207 if (GET_MODE_CLASS (mode) == MODE_INT
1208 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1211 /* If OP is a REG or SUBREG, we can handle it very simply. */
1212 if (GET_CODE (op) == REG)
1214 /* ??? There is a potential problem with this code. It does not
1215 properly handle extractions of a subword from a hard register
1216 that is larger than word_mode. Presumably the check for
1217 HARD_REGNO_MODE_OK catches these most of these cases. */
1219 /* If OP is a hard register, but OP + I is not a hard register,
1220 then extracting a subword is impossible.
1222 For example, consider if OP is the last hard register and it is
1223 larger than word_mode. If we wanted word N (for N > 0) because a
1224 part of that hard register was known to contain a useful value,
1225 then OP + I would refer to a pseudo, not the hard register we
1227 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1228 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1231 /* If the register is not valid for MODE, return 0. Note we
1232 have to check both OP and OP + I since they may refer to
1233 different parts of the register file.
1235 Consider if OP refers to the last 96bit FP register and we want
1236 subword 3 because that subword is known to contain a value we
1238 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1239 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1240 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1242 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1243 || (REG_FUNCTION_VALUE_P (op)
1244 && rtx_equal_function_value_matters)
1245 /* We want to keep the stack, frame, and arg pointers
1247 || op == frame_pointer_rtx
1248 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1249 || op == arg_pointer_rtx
1251 || op == stack_pointer_rtx)
1252 return gen_rtx_SUBREG (word_mode, op, i);
1254 return gen_rtx_REG (word_mode, REGNO (op) + i);
1256 else if (GET_CODE (op) == SUBREG)
1257 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1258 else if (GET_CODE (op) == CONCAT)
1260 unsigned int partwords
1261 = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1264 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1265 return operand_subword (XEXP (op, 1), i - partwords,
1266 validate_address, mode);
1269 /* Form a new MEM at the requested address. */
1270 if (GET_CODE (op) == MEM)
1272 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1275 if (validate_address)
1277 if (reload_completed)
1279 if (! strict_memory_address_p (word_mode, addr))
1283 addr = memory_address (word_mode, addr);
1286 new = gen_rtx_MEM (word_mode, addr);
1287 MEM_COPY_ATTRIBUTES (new, op);
1291 /* The only remaining cases are when OP is a constant. If the host and
1292 target floating formats are the same, handling two-word floating
1293 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1294 are defined as returning one or two 32 bit values, respectively,
1295 and not values of BITS_PER_WORD bits. */
1296 #ifdef REAL_ARITHMETIC
1297 /* The output is some bits, the width of the target machine's word.
1298 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1300 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1301 && GET_MODE_CLASS (mode) == MODE_FLOAT
1302 && GET_MODE_BITSIZE (mode) == 64
1303 && GET_CODE (op) == CONST_DOUBLE)
1308 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1309 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1311 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1312 which the words are written depends on the word endianness.
1313 ??? This is a potential portability problem and should
1314 be fixed at some point.
1316 We must excercise caution with the sign bit. By definition there
1317 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1318 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1319 So we explicitly mask and sign-extend as necessary. */
1320 if (BITS_PER_WORD == 32)
1323 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1324 return GEN_INT (val);
1326 #if HOST_BITS_PER_WIDE_INT >= 64
1327 else if (BITS_PER_WORD >= 64 && i == 0)
1329 val = k[! WORDS_BIG_ENDIAN];
1330 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1331 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1332 return GEN_INT (val);
1335 else if (BITS_PER_WORD == 16)
1338 if ((i & 1) == !WORDS_BIG_ENDIAN)
1341 return GEN_INT (val);
1346 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1347 && GET_MODE_CLASS (mode) == MODE_FLOAT
1348 && GET_MODE_BITSIZE (mode) > 64
1349 && GET_CODE (op) == CONST_DOUBLE)
1354 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1355 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1357 if (BITS_PER_WORD == 32)
1360 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1361 return GEN_INT (val);
1363 #if HOST_BITS_PER_WIDE_INT >= 64
1364 else if (BITS_PER_WORD >= 64 && i <= 1)
1366 val = k[i*2 + ! WORDS_BIG_ENDIAN];
1367 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1368 val |= (HOST_WIDE_INT) k[i*2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1369 return GEN_INT (val);
1375 #else /* no REAL_ARITHMETIC */
1376 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1377 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1378 || flag_pretend_float)
1379 && GET_MODE_CLASS (mode) == MODE_FLOAT
1380 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1381 && GET_CODE (op) == CONST_DOUBLE)
1383 /* The constant is stored in the host's word-ordering,
1384 but we want to access it in the target's word-ordering. Some
1385 compilers don't like a conditional inside macro args, so we have two
1386 copies of the return. */
1387 #ifdef HOST_WORDS_BIG_ENDIAN
1388 return GEN_INT (i == WORDS_BIG_ENDIAN
1389 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1391 return GEN_INT (i != WORDS_BIG_ENDIAN
1392 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1395 #endif /* no REAL_ARITHMETIC */
1397 /* Single word float is a little harder, since single- and double-word
1398 values often do not have the same high-order bits. We have already
1399 verified that we want the only defined word of the single-word value. */
1400 #ifdef REAL_ARITHMETIC
1401 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1402 && GET_MODE_BITSIZE (mode) == 32
1403 && GET_CODE (op) == CONST_DOUBLE)
1408 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1409 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1411 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1413 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1415 if (BITS_PER_WORD == 16)
1417 if ((i & 1) == !WORDS_BIG_ENDIAN)
1422 return GEN_INT (val);
1425 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1426 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1427 || flag_pretend_float)
1428 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1429 && GET_MODE_CLASS (mode) == MODE_FLOAT
1430 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1431 && GET_CODE (op) == CONST_DOUBLE)
1434 union {float f; HOST_WIDE_INT i; } u;
1436 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1439 return GEN_INT (u.i);
1441 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1442 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1443 || flag_pretend_float)
1444 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1445 && GET_MODE_CLASS (mode) == MODE_FLOAT
1446 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1447 && GET_CODE (op) == CONST_DOUBLE)
1450 union {double d; HOST_WIDE_INT i; } u;
1452 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1455 return GEN_INT (u.i);
1457 #endif /* no REAL_ARITHMETIC */
1459 /* The only remaining cases that we can handle are integers.
1460 Convert to proper endianness now since these cases need it.
1461 At this point, i == 0 means the low-order word.
1463 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1464 in general. However, if OP is (const_int 0), we can just return
1467 if (op == const0_rtx)
1470 if (GET_MODE_CLASS (mode) != MODE_INT
1471 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1472 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1475 if (WORDS_BIG_ENDIAN)
1476 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1478 /* Find out which word on the host machine this value is in and get
1479 it from the constant. */
1480 val = (i / size_ratio == 0
1481 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1482 : (GET_CODE (op) == CONST_INT
1483 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1485 /* Get the value we want into the low bits of val. */
1486 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1487 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1489 val = trunc_int_for_mode (val, word_mode);
1491 return GEN_INT (val);
1494 /* Similar to `operand_subword', but never return 0. If we can't extract
1495 the required subword, put OP into a register and try again. If that fails,
1496 abort. We always validate the address in this case. It is not valid
1497 to call this function after reload; it is mostly meant for RTL
1500 MODE is the mode of OP, in case it is CONST_INT. */
1503 operand_subword_force (op, i, mode)
1506 enum machine_mode mode;
1508 rtx result = operand_subword (op, i, 1, mode);
1513 if (mode != BLKmode && mode != VOIDmode)
1515 /* If this is a register which can not be accessed by words, copy it
1516 to a pseudo register. */
1517 if (GET_CODE (op) == REG)
1518 op = copy_to_reg (op);
1520 op = force_reg (mode, op);
1523 result = operand_subword (op, i, 1, mode);
1530 /* Given a compare instruction, swap the operands.
1531 A test instruction is changed into a compare of 0 against the operand. */
1534 reverse_comparison (insn)
1537 rtx body = PATTERN (insn);
1540 if (GET_CODE (body) == SET)
1541 comp = SET_SRC (body);
1543 comp = SET_SRC (XVECEXP (body, 0, 0));
1545 if (GET_CODE (comp) == COMPARE)
1547 rtx op0 = XEXP (comp, 0);
1548 rtx op1 = XEXP (comp, 1);
1549 XEXP (comp, 0) = op1;
1550 XEXP (comp, 1) = op0;
1554 rtx new = gen_rtx_COMPARE (VOIDmode,
1555 CONST0_RTX (GET_MODE (comp)), comp);
1556 if (GET_CODE (body) == SET)
1557 SET_SRC (body) = new;
1559 SET_SRC (XVECEXP (body, 0, 0)) = new;
1563 /* Return a memory reference like MEMREF, but with its mode changed
1564 to MODE and its address changed to ADDR.
1565 (VOIDmode means don't change the mode.
1566 NULL for ADDR means don't change the address.) */
1569 change_address (memref, mode, addr)
1571 enum machine_mode mode;
1576 if (GET_CODE (memref) != MEM)
1578 if (mode == VOIDmode)
1579 mode = GET_MODE (memref);
1581 addr = XEXP (memref, 0);
1583 /* If reload is in progress or has completed, ADDR must be valid.
1584 Otherwise, we can call memory_address to make it valid. */
1585 if (reload_completed || reload_in_progress)
1587 if (! memory_address_p (mode, addr))
1591 addr = memory_address (mode, addr);
1593 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1596 new = gen_rtx_MEM (mode, addr);
1597 MEM_COPY_ATTRIBUTES (new, memref);
1601 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1608 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1609 NULL_RTX, label_num++, NULL_PTR, NULL_PTR);
1611 LABEL_NUSES (label) = 0;
1612 LABEL_ALTERNATE_NAME (label) = NULL;
1616 /* For procedure integration. */
1618 /* Install new pointers to the first and last insns in the chain.
1619 Also, set cur_insn_uid to one higher than the last in use.
1620 Used for an inline-procedure after copying the insn chain. */
1623 set_new_first_and_last_insn (first, last)
1632 for (insn = first; insn; insn = NEXT_INSN (insn))
1633 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1638 /* Set the range of label numbers found in the current function.
1639 This is used when belatedly compiling an inline function. */
1642 set_new_first_and_last_label_num (first, last)
1645 base_label_num = label_num;
1646 first_label_num = first;
1647 last_label_num = last;
1650 /* Set the last label number found in the current function.
1651 This is used when belatedly compiling an inline function. */
1654 set_new_last_label_num (last)
1657 base_label_num = label_num;
1658 last_label_num = last;
1661 /* Restore all variables describing the current status from the structure *P.
1662 This is used after a nested function. */
1665 restore_emit_status (p)
1666 struct function *p ATTRIBUTE_UNUSED;
1669 clear_emit_caches ();
1672 /* Clear out all parts of the state in F that can safely be discarded
1673 after the function has been compiled, to let garbage collection
1674 reclaim the memory. */
1677 free_emit_status (f)
1680 free (f->emit->x_regno_reg_rtx);
1681 free (f->emit->regno_pointer_flag);
1682 free (f->emit->regno_pointer_align);
1687 /* Go through all the RTL insn bodies and copy any invalid shared
1688 structure. This routine should only be called once. */
1691 unshare_all_rtl (fndecl, insn)
1697 /* Make sure that virtual parameters are not shared. */
1698 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1699 DECL_RTL (decl) = copy_rtx_if_shared (DECL_RTL (decl));
1701 /* Make sure that virtual stack slots are not shared. */
1702 unshare_all_decls (DECL_INITIAL (fndecl));
1704 /* Unshare just about everything else. */
1705 unshare_all_rtl_1 (insn);
1707 /* Make sure the addresses of stack slots found outside the insn chain
1708 (such as, in DECL_RTL of a variable) are not shared
1709 with the insn chain.
1711 This special care is necessary when the stack slot MEM does not
1712 actually appear in the insn chain. If it does appear, its address
1713 is unshared from all else at that point. */
1714 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1717 /* Go through all the RTL insn bodies and copy any invalid shared
1718 structure, again. This is a fairly expensive thing to do so it
1719 should be done sparingly. */
1722 unshare_all_rtl_again (insn)
1728 for (p = insn; p; p = NEXT_INSN (p))
1729 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
1731 reset_used_flags (PATTERN (p));
1732 reset_used_flags (REG_NOTES (p));
1733 reset_used_flags (LOG_LINKS (p));
1736 /* Make sure that virtual parameters are not shared. */
1737 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1738 reset_used_flags (DECL_RTL (decl));
1740 reset_used_flags (stack_slot_list);
1742 unshare_all_rtl (cfun->decl, insn);
1745 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1746 Assumes the mark bits are cleared at entry. */
1749 unshare_all_rtl_1 (insn)
1752 for (; insn; insn = NEXT_INSN (insn))
1753 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1755 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1756 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1757 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1761 /* Go through all virtual stack slots of a function and copy any
1762 shared structure. */
1764 unshare_all_decls (blk)
1769 /* Copy shared decls. */
1770 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1771 DECL_RTL (t) = copy_rtx_if_shared (DECL_RTL (t));
1773 /* Now process sub-blocks. */
1774 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1775 unshare_all_decls (t);
1778 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1779 Recursively does the same for subexpressions. */
1782 copy_rtx_if_shared (orig)
1785 register rtx x = orig;
1787 register enum rtx_code code;
1788 register const char *format_ptr;
1794 code = GET_CODE (x);
1796 /* These types may be freely shared. */
1809 /* SCRATCH must be shared because they represent distinct values. */
1813 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1814 a LABEL_REF, it isn't sharable. */
1815 if (GET_CODE (XEXP (x, 0)) == PLUS
1816 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1817 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1826 /* The chain of insns is not being copied. */
1830 /* A MEM is allowed to be shared if its address is constant.
1832 We used to allow sharing of MEMs which referenced
1833 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1834 that can lose. instantiate_virtual_regs will not unshare
1835 the MEMs, and combine may change the structure of the address
1836 because it looks safe and profitable in one context, but
1837 in some other context it creates unrecognizable RTL. */
1838 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1847 /* This rtx may not be shared. If it has already been seen,
1848 replace it with a copy of itself. */
1854 copy = rtx_alloc (code);
1855 bcopy ((char *) x, (char *) copy,
1856 (sizeof (*copy) - sizeof (copy->fld)
1857 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1863 /* Now scan the subexpressions recursively.
1864 We can store any replaced subexpressions directly into X
1865 since we know X is not shared! Any vectors in X
1866 must be copied if X was copied. */
1868 format_ptr = GET_RTX_FORMAT (code);
1870 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1872 switch (*format_ptr++)
1875 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1879 if (XVEC (x, i) != NULL)
1882 int len = XVECLEN (x, i);
1884 if (copied && len > 0)
1885 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1886 for (j = 0; j < len; j++)
1887 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1895 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1896 to look for shared sub-parts. */
1899 reset_used_flags (x)
1903 register enum rtx_code code;
1904 register const char *format_ptr;
1909 code = GET_CODE (x);
1911 /* These types may be freely shared so we needn't do any resetting
1932 /* The chain of insns is not being copied. */
1941 format_ptr = GET_RTX_FORMAT (code);
1942 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1944 switch (*format_ptr++)
1947 reset_used_flags (XEXP (x, i));
1951 for (j = 0; j < XVECLEN (x, i); j++)
1952 reset_used_flags (XVECEXP (x, i, j));
1958 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1959 Return X or the rtx for the pseudo reg the value of X was copied into.
1960 OTHER must be valid as a SET_DEST. */
1963 make_safe_from (x, other)
1967 switch (GET_CODE (other))
1970 other = SUBREG_REG (other);
1972 case STRICT_LOW_PART:
1975 other = XEXP (other, 0);
1981 if ((GET_CODE (other) == MEM
1983 && GET_CODE (x) != REG
1984 && GET_CODE (x) != SUBREG)
1985 || (GET_CODE (other) == REG
1986 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1987 || reg_mentioned_p (other, x))))
1989 rtx temp = gen_reg_rtx (GET_MODE (x));
1990 emit_move_insn (temp, x);
1996 /* Emission of insns (adding them to the doubly-linked list). */
1998 /* Return the first insn of the current sequence or current function. */
2006 /* Return the last insn emitted in current sequence or current function. */
2014 /* Specify a new insn as the last in the chain. */
2017 set_last_insn (insn)
2020 if (NEXT_INSN (insn) != 0)
2025 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2028 get_last_insn_anywhere ()
2030 struct sequence_stack *stack;
2033 for (stack = seq_stack; stack; stack = stack->next)
2034 if (stack->last != 0)
2039 /* Return a number larger than any instruction's uid in this function. */
2044 return cur_insn_uid;
2047 /* Renumber instructions so that no instruction UIDs are wasted. */
2050 renumber_insns (stream)
2055 /* If we're not supposed to renumber instructions, don't. */
2056 if (!flag_renumber_insns)
2059 /* If there aren't that many instructions, then it's not really
2060 worth renumbering them. */
2061 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2066 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2069 fprintf (stream, "Renumbering insn %d to %d\n",
2070 INSN_UID (insn), cur_insn_uid);
2071 INSN_UID (insn) = cur_insn_uid++;
2075 /* Return the next insn. If it is a SEQUENCE, return the first insn
2084 insn = NEXT_INSN (insn);
2085 if (insn && GET_CODE (insn) == INSN
2086 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2087 insn = XVECEXP (PATTERN (insn), 0, 0);
2093 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2097 previous_insn (insn)
2102 insn = PREV_INSN (insn);
2103 if (insn && GET_CODE (insn) == INSN
2104 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2105 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2111 /* Return the next insn after INSN that is not a NOTE. This routine does not
2112 look inside SEQUENCEs. */
2115 next_nonnote_insn (insn)
2120 insn = NEXT_INSN (insn);
2121 if (insn == 0 || GET_CODE (insn) != NOTE)
2128 /* Return the previous insn before INSN that is not a NOTE. This routine does
2129 not look inside SEQUENCEs. */
2132 prev_nonnote_insn (insn)
2137 insn = PREV_INSN (insn);
2138 if (insn == 0 || GET_CODE (insn) != NOTE)
2145 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2146 or 0, if there is none. This routine does not look inside
2150 next_real_insn (insn)
2155 insn = NEXT_INSN (insn);
2156 if (insn == 0 || GET_CODE (insn) == INSN
2157 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2164 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2165 or 0, if there is none. This routine does not look inside
2169 prev_real_insn (insn)
2174 insn = PREV_INSN (insn);
2175 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2176 || GET_CODE (insn) == JUMP_INSN)
2183 /* Find the next insn after INSN that really does something. This routine
2184 does not look inside SEQUENCEs. Until reload has completed, this is the
2185 same as next_real_insn. */
2188 active_insn_p (insn)
2191 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2192 || (GET_CODE (insn) == INSN
2193 && (! reload_completed
2194 || (GET_CODE (PATTERN (insn)) != USE
2195 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2199 next_active_insn (insn)
2204 insn = NEXT_INSN (insn);
2205 if (insn == 0 || active_insn_p (insn))
2212 /* Find the last insn before INSN that really does something. This routine
2213 does not look inside SEQUENCEs. Until reload has completed, this is the
2214 same as prev_real_insn. */
2217 prev_active_insn (insn)
2222 insn = PREV_INSN (insn);
2223 if (insn == 0 || active_insn_p (insn))
2230 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2238 insn = NEXT_INSN (insn);
2239 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2246 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2254 insn = PREV_INSN (insn);
2255 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2263 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2264 and REG_CC_USER notes so we can find it. */
2267 link_cc0_insns (insn)
2270 rtx user = next_nonnote_insn (insn);
2272 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2273 user = XVECEXP (PATTERN (user), 0, 0);
2275 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2277 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2280 /* Return the next insn that uses CC0 after INSN, which is assumed to
2281 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2282 applied to the result of this function should yield INSN).
2284 Normally, this is simply the next insn. However, if a REG_CC_USER note
2285 is present, it contains the insn that uses CC0.
2287 Return 0 if we can't find the insn. */
2290 next_cc0_user (insn)
2293 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2296 return XEXP (note, 0);
2298 insn = next_nonnote_insn (insn);
2299 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2300 insn = XVECEXP (PATTERN (insn), 0, 0);
2302 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2303 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2309 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2310 note, it is the previous insn. */
2313 prev_cc0_setter (insn)
2316 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2319 return XEXP (note, 0);
2321 insn = prev_nonnote_insn (insn);
2322 if (! sets_cc0_p (PATTERN (insn)))
2329 /* Try splitting insns that can be split for better scheduling.
2330 PAT is the pattern which might split.
2331 TRIAL is the insn providing PAT.
2332 LAST is non-zero if we should return the last insn of the sequence produced.
2334 If this routine succeeds in splitting, it returns the first or last
2335 replacement insn depending on the value of LAST. Otherwise, it
2336 returns TRIAL. If the insn to be returned can be split, it will be. */
2339 try_split (pat, trial, last)
2343 rtx before = PREV_INSN (trial);
2344 rtx after = NEXT_INSN (trial);
2345 rtx seq = split_insns (pat, trial);
2346 int has_barrier = 0;
2349 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2350 We may need to handle this specially. */
2351 if (after && GET_CODE (after) == BARRIER)
2354 after = NEXT_INSN (after);
2359 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2360 The latter case will normally arise only when being done so that
2361 it, in turn, will be split (SFmode on the 29k is an example). */
2362 if (GET_CODE (seq) == SEQUENCE)
2366 /* Avoid infinite loop if any insn of the result matches
2367 the original pattern. */
2368 for (i = 0; i < XVECLEN (seq, 0); i++)
2369 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2370 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2373 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2374 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2375 increment the usage count so we don't delete the label. */
2377 if (GET_CODE (trial) == JUMP_INSN)
2378 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2379 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2381 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2383 if (JUMP_LABEL (trial))
2384 LABEL_NUSES (JUMP_LABEL (trial))++;
2387 tem = emit_insn_after (seq, before);
2389 delete_insn (trial);
2391 emit_barrier_after (tem);
2393 /* Recursively call try_split for each new insn created; by the
2394 time control returns here that insn will be fully split, so
2395 set LAST and continue from the insn after the one returned.
2396 We can't use next_active_insn here since AFTER may be a note.
2397 Ignore deleted insns, which can be occur if not optimizing. */
2398 for (tem = NEXT_INSN (before); tem != after;
2399 tem = NEXT_INSN (tem))
2400 if (! INSN_DELETED_P (tem)
2401 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2402 tem = try_split (PATTERN (tem), tem, 1);
2404 /* Avoid infinite loop if the result matches the original pattern. */
2405 else if (rtx_equal_p (seq, pat))
2409 PATTERN (trial) = seq;
2410 INSN_CODE (trial) = -1;
2411 try_split (seq, trial, last);
2414 /* Return either the first or the last insn, depending on which was
2417 ? (after ? prev_active_insn (after) : last_insn)
2418 : next_active_insn (before);
2424 /* Make and return an INSN rtx, initializing all its slots.
2425 Store PATTERN in the pattern slots. */
2428 make_insn_raw (pattern)
2433 /* If in RTL generation phase, see if FREE_INSN can be used. */
2434 if (!ggc_p && free_insn != 0 && rtx_equal_function_value_matters)
2437 free_insn = NEXT_INSN (free_insn);
2438 PUT_CODE (insn, INSN);
2441 insn = rtx_alloc (INSN);
2443 INSN_UID (insn) = cur_insn_uid++;
2444 PATTERN (insn) = pattern;
2445 INSN_CODE (insn) = -1;
2446 LOG_LINKS (insn) = NULL;
2447 REG_NOTES (insn) = NULL;
2449 #ifdef ENABLE_RTL_CHECKING
2451 && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2452 && (returnjump_p (insn)
2453 || (GET_CODE (insn) == SET
2454 && SET_DEST (insn) == pc_rtx)))
2456 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2464 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2467 make_jump_insn_raw (pattern)
2472 insn = rtx_alloc (JUMP_INSN);
2473 INSN_UID (insn) = cur_insn_uid++;
2475 PATTERN (insn) = pattern;
2476 INSN_CODE (insn) = -1;
2477 LOG_LINKS (insn) = NULL;
2478 REG_NOTES (insn) = NULL;
2479 JUMP_LABEL (insn) = NULL;
2484 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2487 make_call_insn_raw (pattern)
2492 insn = rtx_alloc (CALL_INSN);
2493 INSN_UID (insn) = cur_insn_uid++;
2495 PATTERN (insn) = pattern;
2496 INSN_CODE (insn) = -1;
2497 LOG_LINKS (insn) = NULL;
2498 REG_NOTES (insn) = NULL;
2499 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2504 /* Add INSN to the end of the doubly-linked list.
2505 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2511 PREV_INSN (insn) = last_insn;
2512 NEXT_INSN (insn) = 0;
2514 if (NULL != last_insn)
2515 NEXT_INSN (last_insn) = insn;
2517 if (NULL == first_insn)
2523 /* Add INSN into the doubly-linked list after insn AFTER. This and
2524 the next should be the only functions called to insert an insn once
2525 delay slots have been filled since only they know how to update a
2529 add_insn_after (insn, after)
2532 rtx next = NEXT_INSN (after);
2534 if (optimize && INSN_DELETED_P (after))
2537 NEXT_INSN (insn) = next;
2538 PREV_INSN (insn) = after;
2542 PREV_INSN (next) = insn;
2543 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2544 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2546 else if (last_insn == after)
2550 struct sequence_stack *stack = seq_stack;
2551 /* Scan all pending sequences too. */
2552 for (; stack; stack = stack->next)
2553 if (after == stack->last)
2563 NEXT_INSN (after) = insn;
2564 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2566 rtx sequence = PATTERN (after);
2567 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2571 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2572 the previous should be the only functions called to insert an insn once
2573 delay slots have been filled since only they know how to update a
2577 add_insn_before (insn, before)
2580 rtx prev = PREV_INSN (before);
2582 if (optimize && INSN_DELETED_P (before))
2585 PREV_INSN (insn) = prev;
2586 NEXT_INSN (insn) = before;
2590 NEXT_INSN (prev) = insn;
2591 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2593 rtx sequence = PATTERN (prev);
2594 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2597 else if (first_insn == before)
2601 struct sequence_stack *stack = seq_stack;
2602 /* Scan all pending sequences too. */
2603 for (; stack; stack = stack->next)
2604 if (before == stack->first)
2606 stack->first = insn;
2614 PREV_INSN (before) = insn;
2615 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2616 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2619 /* Remove an insn from its doubly-linked list. This function knows how
2620 to handle sequences. */
2625 rtx next = NEXT_INSN (insn);
2626 rtx prev = PREV_INSN (insn);
2629 NEXT_INSN (prev) = next;
2630 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2632 rtx sequence = PATTERN (prev);
2633 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2636 else if (first_insn == insn)
2640 struct sequence_stack *stack = seq_stack;
2641 /* Scan all pending sequences too. */
2642 for (; stack; stack = stack->next)
2643 if (insn == stack->first)
2645 stack->first = next;
2655 PREV_INSN (next) = prev;
2656 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2657 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2659 else if (last_insn == insn)
2663 struct sequence_stack *stack = seq_stack;
2664 /* Scan all pending sequences too. */
2665 for (; stack; stack = stack->next)
2666 if (insn == stack->last)
2677 /* Delete all insns made since FROM.
2678 FROM becomes the new last instruction. */
2681 delete_insns_since (from)
2687 NEXT_INSN (from) = 0;
2691 /* This function is deprecated, please use sequences instead.
2693 Move a consecutive bunch of insns to a different place in the chain.
2694 The insns to be moved are those between FROM and TO.
2695 They are moved to a new position after the insn AFTER.
2696 AFTER must not be FROM or TO or any insn in between.
2698 This function does not know about SEQUENCEs and hence should not be
2699 called after delay-slot filling has been done. */
2702 reorder_insns (from, to, after)
2703 rtx from, to, after;
2705 /* Splice this bunch out of where it is now. */
2706 if (PREV_INSN (from))
2707 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2709 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2710 if (last_insn == to)
2711 last_insn = PREV_INSN (from);
2712 if (first_insn == from)
2713 first_insn = NEXT_INSN (to);
2715 /* Make the new neighbors point to it and it to them. */
2716 if (NEXT_INSN (after))
2717 PREV_INSN (NEXT_INSN (after)) = to;
2719 NEXT_INSN (to) = NEXT_INSN (after);
2720 PREV_INSN (from) = after;
2721 NEXT_INSN (after) = from;
2722 if (after == last_insn)
2726 /* Return the line note insn preceding INSN. */
2729 find_line_note (insn)
2732 if (no_line_numbers)
2735 for (; insn; insn = PREV_INSN (insn))
2736 if (GET_CODE (insn) == NOTE
2737 && NOTE_LINE_NUMBER (insn) >= 0)
2743 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2744 of the moved insns when debugging. This may insert a note between AFTER
2745 and FROM, and another one after TO. */
2748 reorder_insns_with_line_notes (from, to, after)
2749 rtx from, to, after;
2751 rtx from_line = find_line_note (from);
2752 rtx after_line = find_line_note (after);
2754 reorder_insns (from, to, after);
2756 if (from_line == after_line)
2760 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2761 NOTE_LINE_NUMBER (from_line),
2764 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2765 NOTE_LINE_NUMBER (after_line),
2769 /* Remove unnecessary notes from the instruction stream. */
2772 remove_unnecessary_notes ()
2777 /* We must not remove the first instruction in the function because
2778 the compiler depends on the first instruction being a note. */
2779 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2781 /* Remember what's next. */
2782 next = NEXT_INSN (insn);
2784 /* We're only interested in notes. */
2785 if (GET_CODE (insn) != NOTE)
2788 /* By now, all notes indicating lexical blocks should have
2789 NOTE_BLOCK filled in. */
2790 if ((NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2791 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2792 && NOTE_BLOCK (insn) == NULL_TREE)
2795 /* Remove NOTE_INSN_DELETED notes. */
2796 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2798 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2800 /* Scan back to see if there are any non-note instructions
2801 between INSN and the beginning of this block. If not,
2802 then there is no PC range in the generated code that will
2803 actually be in this block, so there's no point in
2804 remembering the existence of the block. */
2807 for (prev = PREV_INSN (insn); prev; prev = PREV_INSN (prev))
2809 /* This block contains a real instruction. Note that we
2810 don't include labels; if the only thing in the block
2811 is a label, then there are still no PC values that
2812 lie within the block. */
2813 if (GET_RTX_CLASS (GET_CODE (prev)) == 'i')
2816 /* We're only interested in NOTEs. */
2817 if (GET_CODE (prev) != NOTE)
2820 if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_BEG)
2822 /* If the BLOCKs referred to by these notes don't
2823 match, then something is wrong with our BLOCK
2824 nesting structure. */
2825 if (NOTE_BLOCK (prev) != NOTE_BLOCK (insn))
2828 if (debug_ignore_block (NOTE_BLOCK (insn)))
2835 else if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_END)
2836 /* There's a nested block. We need to leave the
2837 current block in place since otherwise the debugger
2838 wouldn't be able to show symbols from our block in
2839 the nested block. */
2847 /* Emit an insn of given code and pattern
2848 at a specified place within the doubly-linked list. */
2850 /* Make an instruction with body PATTERN
2851 and output it before the instruction BEFORE. */
2854 emit_insn_before (pattern, before)
2855 register rtx pattern, before;
2857 register rtx insn = before;
2859 if (GET_CODE (pattern) == SEQUENCE)
2863 for (i = 0; i < XVECLEN (pattern, 0); i++)
2865 insn = XVECEXP (pattern, 0, i);
2866 add_insn_before (insn, before);
2868 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2869 sequence_result[XVECLEN (pattern, 0)] = pattern;
2873 insn = make_insn_raw (pattern);
2874 add_insn_before (insn, before);
2880 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2883 emit_block_insn_before (pattern, before, block)
2884 rtx pattern, before;
2887 rtx prev = PREV_INSN (before);
2888 rtx r = emit_insn_before (pattern, before);
2889 if (block && block->head == before)
2890 block->head = NEXT_INSN (prev);
2894 /* Make an instruction with body PATTERN and code JUMP_INSN
2895 and output it before the instruction BEFORE. */
2898 emit_jump_insn_before (pattern, before)
2899 register rtx pattern, before;
2903 if (GET_CODE (pattern) == SEQUENCE)
2904 insn = emit_insn_before (pattern, before);
2907 insn = make_jump_insn_raw (pattern);
2908 add_insn_before (insn, before);
2914 /* Make an instruction with body PATTERN and code CALL_INSN
2915 and output it before the instruction BEFORE. */
2918 emit_call_insn_before (pattern, before)
2919 register rtx pattern, before;
2923 if (GET_CODE (pattern) == SEQUENCE)
2924 insn = emit_insn_before (pattern, before);
2927 insn = make_call_insn_raw (pattern);
2928 add_insn_before (insn, before);
2929 PUT_CODE (insn, CALL_INSN);
2935 /* Make an insn of code BARRIER
2936 and output it before the insn BEFORE. */
2939 emit_barrier_before (before)
2940 register rtx before;
2942 register rtx insn = rtx_alloc (BARRIER);
2944 INSN_UID (insn) = cur_insn_uid++;
2946 add_insn_before (insn, before);
2950 /* Emit the label LABEL before the insn BEFORE. */
2953 emit_label_before (label, before)
2956 /* This can be called twice for the same label as a result of the
2957 confusion that follows a syntax error! So make it harmless. */
2958 if (INSN_UID (label) == 0)
2960 INSN_UID (label) = cur_insn_uid++;
2961 add_insn_before (label, before);
2967 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2970 emit_note_before (subtype, before)
2974 register rtx note = rtx_alloc (NOTE);
2975 INSN_UID (note) = cur_insn_uid++;
2976 NOTE_SOURCE_FILE (note) = 0;
2977 NOTE_LINE_NUMBER (note) = subtype;
2979 add_insn_before (note, before);
2983 /* Make an insn of code INSN with body PATTERN
2984 and output it after the insn AFTER. */
2987 emit_insn_after (pattern, after)
2988 register rtx pattern, after;
2990 register rtx insn = after;
2992 if (GET_CODE (pattern) == SEQUENCE)
2996 for (i = 0; i < XVECLEN (pattern, 0); i++)
2998 insn = XVECEXP (pattern, 0, i);
2999 add_insn_after (insn, after);
3002 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3003 sequence_result[XVECLEN (pattern, 0)] = pattern;
3007 insn = make_insn_raw (pattern);
3008 add_insn_after (insn, after);
3014 /* Similar to emit_insn_after, except that line notes are to be inserted so
3015 as to act as if this insn were at FROM. */
3018 emit_insn_after_with_line_notes (pattern, after, from)
3019 rtx pattern, after, from;
3021 rtx from_line = find_line_note (from);
3022 rtx after_line = find_line_note (after);
3023 rtx insn = emit_insn_after (pattern, after);
3026 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3027 NOTE_LINE_NUMBER (from_line),
3031 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3032 NOTE_LINE_NUMBER (after_line),
3036 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3039 emit_block_insn_after (pattern, after, block)
3043 rtx r = emit_insn_after (pattern, after);
3044 if (block && block->end == after)
3049 /* Make an insn of code JUMP_INSN with body PATTERN
3050 and output it after the insn AFTER. */
3053 emit_jump_insn_after (pattern, after)
3054 register rtx pattern, after;
3058 if (GET_CODE (pattern) == SEQUENCE)
3059 insn = emit_insn_after (pattern, after);
3062 insn = make_jump_insn_raw (pattern);
3063 add_insn_after (insn, after);
3069 /* Make an insn of code BARRIER
3070 and output it after the insn AFTER. */
3073 emit_barrier_after (after)
3076 register rtx insn = rtx_alloc (BARRIER);
3078 INSN_UID (insn) = cur_insn_uid++;
3080 add_insn_after (insn, after);
3084 /* Emit the label LABEL after the insn AFTER. */
3087 emit_label_after (label, after)
3090 /* This can be called twice for the same label
3091 as a result of the confusion that follows a syntax error!
3092 So make it harmless. */
3093 if (INSN_UID (label) == 0)
3095 INSN_UID (label) = cur_insn_uid++;
3096 add_insn_after (label, after);
3102 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3105 emit_note_after (subtype, after)
3109 register rtx note = rtx_alloc (NOTE);
3110 INSN_UID (note) = cur_insn_uid++;
3111 NOTE_SOURCE_FILE (note) = 0;
3112 NOTE_LINE_NUMBER (note) = subtype;
3113 add_insn_after (note, after);
3117 /* Emit a line note for FILE and LINE after the insn AFTER. */
3120 emit_line_note_after (file, line, after)
3127 if (no_line_numbers && line > 0)
3133 note = rtx_alloc (NOTE);
3134 INSN_UID (note) = cur_insn_uid++;
3135 NOTE_SOURCE_FILE (note) = file;
3136 NOTE_LINE_NUMBER (note) = line;
3137 add_insn_after (note, after);
3141 /* Make an insn of code INSN with pattern PATTERN
3142 and add it to the end of the doubly-linked list.
3143 If PATTERN is a SEQUENCE, take the elements of it
3144 and emit an insn for each element.
3146 Returns the last insn emitted. */
3152 rtx insn = last_insn;
3154 if (GET_CODE (pattern) == SEQUENCE)
3158 for (i = 0; i < XVECLEN (pattern, 0); i++)
3160 insn = XVECEXP (pattern, 0, i);
3163 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3164 sequence_result[XVECLEN (pattern, 0)] = pattern;
3168 insn = make_insn_raw (pattern);
3175 /* Emit the insns in a chain starting with INSN.
3176 Return the last insn emitted. */
3186 rtx next = NEXT_INSN (insn);
3195 /* Emit the insns in a chain starting with INSN and place them in front of
3196 the insn BEFORE. Return the last insn emitted. */
3199 emit_insns_before (insn, before)
3207 rtx next = NEXT_INSN (insn);
3208 add_insn_before (insn, before);
3216 /* Emit the insns in a chain starting with FIRST and place them in back of
3217 the insn AFTER. Return the last insn emitted. */
3220 emit_insns_after (first, after)
3225 register rtx after_after;
3233 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3236 after_after = NEXT_INSN (after);
3238 NEXT_INSN (after) = first;
3239 PREV_INSN (first) = after;
3240 NEXT_INSN (last) = after_after;
3242 PREV_INSN (after_after) = last;
3244 if (after == last_insn)
3249 /* Make an insn of code JUMP_INSN with pattern PATTERN
3250 and add it to the end of the doubly-linked list. */
3253 emit_jump_insn (pattern)
3256 if (GET_CODE (pattern) == SEQUENCE)
3257 return emit_insn (pattern);
3260 register rtx insn = make_jump_insn_raw (pattern);
3266 /* Make an insn of code CALL_INSN with pattern PATTERN
3267 and add it to the end of the doubly-linked list. */
3270 emit_call_insn (pattern)
3273 if (GET_CODE (pattern) == SEQUENCE)
3274 return emit_insn (pattern);
3277 register rtx insn = make_call_insn_raw (pattern);
3279 PUT_CODE (insn, CALL_INSN);
3284 /* Add the label LABEL to the end of the doubly-linked list. */
3290 /* This can be called twice for the same label
3291 as a result of the confusion that follows a syntax error!
3292 So make it harmless. */
3293 if (INSN_UID (label) == 0)
3295 INSN_UID (label) = cur_insn_uid++;
3301 /* Make an insn of code BARRIER
3302 and add it to the end of the doubly-linked list. */
3307 register rtx barrier = rtx_alloc (BARRIER);
3308 INSN_UID (barrier) = cur_insn_uid++;
3313 /* Make an insn of code NOTE
3314 with data-fields specified by FILE and LINE
3315 and add it to the end of the doubly-linked list,
3316 but only if line-numbers are desired for debugging info. */
3319 emit_line_note (file, line)
3323 set_file_and_line_for_stmt (file, line);
3326 if (no_line_numbers)
3330 return emit_note (file, line);
3333 /* Make an insn of code NOTE
3334 with data-fields specified by FILE and LINE
3335 and add it to the end of the doubly-linked list.
3336 If it is a line-number NOTE, omit it if it matches the previous one. */
3339 emit_note (file, line)
3347 if (file && last_filename && !strcmp (file, last_filename)
3348 && line == last_linenum)
3350 last_filename = file;
3351 last_linenum = line;
3354 if (no_line_numbers && line > 0)
3360 note = rtx_alloc (NOTE);
3361 INSN_UID (note) = cur_insn_uid++;
3362 NOTE_SOURCE_FILE (note) = file;
3363 NOTE_LINE_NUMBER (note) = line;
3368 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3371 emit_line_note_force (file, line)
3376 return emit_line_note (file, line);
3379 /* Cause next statement to emit a line note even if the line number
3380 has not changed. This is used at the beginning of a function. */
3383 force_next_line_note ()
3388 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3389 note of this type already exists, remove it first. */
3392 set_unique_reg_note (insn, kind, datum)
3397 rtx note = find_reg_note (insn, kind, NULL_RTX);
3399 /* First remove the note if there already is one. */
3401 remove_note (insn, note);
3403 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3406 /* Return an indication of which type of insn should have X as a body.
3407 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3413 if (GET_CODE (x) == CODE_LABEL)
3415 if (GET_CODE (x) == CALL)
3417 if (GET_CODE (x) == RETURN)
3419 if (GET_CODE (x) == SET)
3421 if (SET_DEST (x) == pc_rtx)
3423 else if (GET_CODE (SET_SRC (x)) == CALL)
3428 if (GET_CODE (x) == PARALLEL)
3431 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3432 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3434 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3435 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3437 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3438 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3444 /* Emit the rtl pattern X as an appropriate kind of insn.
3445 If X is a label, it is simply added into the insn chain. */
3451 enum rtx_code code = classify_insn (x);
3453 if (code == CODE_LABEL)
3454 return emit_label (x);
3455 else if (code == INSN)
3456 return emit_insn (x);
3457 else if (code == JUMP_INSN)
3459 register rtx insn = emit_jump_insn (x);
3460 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3461 return emit_barrier ();
3464 else if (code == CALL_INSN)
3465 return emit_call_insn (x);
3470 /* Begin emitting insns to a sequence which can be packaged in an
3471 RTL_EXPR. If this sequence will contain something that might cause
3472 the compiler to pop arguments to function calls (because those
3473 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3474 details), use do_pending_stack_adjust before calling this function.
3475 That will ensure that the deferred pops are not accidentally
3476 emitted in the middel of this sequence. */
3481 struct sequence_stack *tem;
3483 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3485 tem->next = seq_stack;
3486 tem->first = first_insn;
3487 tem->last = last_insn;
3488 tem->sequence_rtl_expr = seq_rtl_expr;
3496 /* Similarly, but indicate that this sequence will be placed in T, an
3497 RTL_EXPR. See the documentation for start_sequence for more
3498 information about how to use this function. */
3501 start_sequence_for_rtl_expr (t)
3509 /* Set up the insn chain starting with FIRST as the current sequence,
3510 saving the previously current one. See the documentation for
3511 start_sequence for more information about how to use this function. */
3514 push_to_sequence (first)
3521 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3527 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3530 push_to_full_sequence (first, last)
3536 /* We really should have the end of the insn chain here. */
3537 if (last && NEXT_INSN (last))
3541 /* Set up the outer-level insn chain
3542 as the current sequence, saving the previously current one. */
3545 push_topmost_sequence ()
3547 struct sequence_stack *stack, *top = NULL;
3551 for (stack = seq_stack; stack; stack = stack->next)
3554 first_insn = top->first;
3555 last_insn = top->last;
3556 seq_rtl_expr = top->sequence_rtl_expr;
3559 /* After emitting to the outer-level insn chain, update the outer-level
3560 insn chain, and restore the previous saved state. */
3563 pop_topmost_sequence ()
3565 struct sequence_stack *stack, *top = NULL;
3567 for (stack = seq_stack; stack; stack = stack->next)
3570 top->first = first_insn;
3571 top->last = last_insn;
3572 /* ??? Why don't we save seq_rtl_expr here? */
3577 /* After emitting to a sequence, restore previous saved state.
3579 To get the contents of the sequence just made, you must call
3580 `gen_sequence' *before* calling here.
3582 If the compiler might have deferred popping arguments while
3583 generating this sequence, and this sequence will not be immediately
3584 inserted into the instruction stream, use do_pending_stack_adjust
3585 before calling gen_sequence. That will ensure that the deferred
3586 pops are inserted into this sequence, and not into some random
3587 location in the instruction stream. See INHIBIT_DEFER_POP for more
3588 information about deferred popping of arguments. */
3593 struct sequence_stack *tem = seq_stack;
3595 first_insn = tem->first;
3596 last_insn = tem->last;
3597 seq_rtl_expr = tem->sequence_rtl_expr;
3598 seq_stack = tem->next;
3603 /* This works like end_sequence, but records the old sequence in FIRST
3607 end_full_sequence (first, last)
3610 *first = first_insn;
3615 /* Return 1 if currently emitting into a sequence. */
3620 return seq_stack != 0;
3623 /* Generate a SEQUENCE rtx containing the insns already emitted
3624 to the current sequence.
3626 This is how the gen_... function from a DEFINE_EXPAND
3627 constructs the SEQUENCE that it returns. */
3637 /* Count the insns in the chain. */
3639 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3642 /* If only one insn, return it rather than a SEQUENCE.
3643 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3644 the case of an empty list.)
3645 We only return the pattern of an insn if its code is INSN and it
3646 has no notes. This ensures that no information gets lost. */
3648 && ! RTX_FRAME_RELATED_P (first_insn)
3649 && GET_CODE (first_insn) == INSN
3650 /* Don't throw away any reg notes. */
3651 && REG_NOTES (first_insn) == 0)
3655 NEXT_INSN (first_insn) = free_insn;
3656 free_insn = first_insn;
3658 return PATTERN (first_insn);
3661 /* Put them in a vector. See if we already have a SEQUENCE of the
3662 appropriate length around. */
3663 if (!ggc_p && len < SEQUENCE_RESULT_SIZE
3664 && (result = sequence_result[len]) != 0)
3665 sequence_result[len] = 0;
3668 /* Ensure that this rtl goes in saveable_obstack, since we may
3670 push_obstacks_nochange ();
3671 rtl_in_saveable_obstack ();
3672 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3676 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3677 XVECEXP (result, 0, i) = tem;
3682 /* Put the various virtual registers into REGNO_REG_RTX. */
3685 init_virtual_regs (es)
3686 struct emit_status *es;
3688 rtx *ptr = es->x_regno_reg_rtx;
3689 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3690 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3691 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3692 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3693 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3697 clear_emit_caches ()
3701 /* Clear the start_sequence/gen_sequence cache. */
3702 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3703 sequence_result[i] = 0;
3707 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3708 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3709 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3710 static int copy_insn_n_scratches;
3712 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3713 copied an ASM_OPERANDS.
3714 In that case, it is the original input-operand vector. */
3715 static rtvec orig_asm_operands_vector;
3717 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3718 copied an ASM_OPERANDS.
3719 In that case, it is the copied input-operand vector. */
3720 static rtvec copy_asm_operands_vector;
3722 /* Likewise for the constraints vector. */
3723 static rtvec orig_asm_constraints_vector;
3724 static rtvec copy_asm_constraints_vector;
3726 /* Recursively create a new copy of an rtx for copy_insn.
3727 This function differs from copy_rtx in that it handles SCRATCHes and
3728 ASM_OPERANDs properly.
3729 Normally, this function is not used directly; use copy_insn as front end.
3730 However, you could first copy an insn pattern with copy_insn and then use
3731 this function afterwards to properly copy any REG_NOTEs containing
3740 register RTX_CODE code;
3741 register const char *format_ptr;
3743 code = GET_CODE (orig);
3759 for (i = 0; i < copy_insn_n_scratches; i++)
3760 if (copy_insn_scratch_in[i] == orig)
3761 return copy_insn_scratch_out[i];
3765 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3766 a LABEL_REF, it isn't sharable. */
3767 if (GET_CODE (XEXP (orig, 0)) == PLUS
3768 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3769 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3773 /* A MEM with a constant address is not sharable. The problem is that
3774 the constant address may need to be reloaded. If the mem is shared,
3775 then reloading one copy of this mem will cause all copies to appear
3776 to have been reloaded. */
3782 copy = rtx_alloc (code);
3784 /* Copy the various flags, and other information. We assume that
3785 all fields need copying, and then clear the fields that should
3786 not be copied. That is the sensible default behavior, and forces
3787 us to explicitly document why we are *not* copying a flag. */
3788 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3790 /* We do not copy the USED flag, which is used as a mark bit during
3791 walks over the RTL. */
3794 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3795 if (GET_RTX_CLASS (code) == 'i')
3799 copy->frame_related = 0;
3802 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3804 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3806 copy->fld[i] = orig->fld[i];
3807 switch (*format_ptr++)
3810 if (XEXP (orig, i) != NULL)
3811 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3816 if (XVEC (orig, i) == orig_asm_constraints_vector)
3817 XVEC (copy, i) = copy_asm_constraints_vector;
3818 else if (XVEC (orig, i) == orig_asm_operands_vector)
3819 XVEC (copy, i) = copy_asm_operands_vector;
3820 else if (XVEC (orig, i) != NULL)
3822 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3823 for (j = 0; j < XVECLEN (copy, i); j++)
3824 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3830 bitmap new_bits = BITMAP_OBSTACK_ALLOC (rtl_obstack);
3831 bitmap_copy (new_bits, XBITMAP (orig, i));
3832 XBITMAP (copy, i) = new_bits;
3843 /* These are left unchanged. */
3851 if (code == SCRATCH)
3853 i = copy_insn_n_scratches++;
3854 if (i >= MAX_RECOG_OPERANDS)
3856 copy_insn_scratch_in[i] = orig;
3857 copy_insn_scratch_out[i] = copy;
3859 else if (code == ASM_OPERANDS)
3861 orig_asm_operands_vector = XVEC (orig, 3);
3862 copy_asm_operands_vector = XVEC (copy, 3);
3863 orig_asm_constraints_vector = XVEC (orig, 4);
3864 copy_asm_constraints_vector = XVEC (copy, 4);
3870 /* Create a new copy of an rtx.
3871 This function differs from copy_rtx in that it handles SCRATCHes and
3872 ASM_OPERANDs properly.
3873 INSN doesn't really have to be a full INSN; it could be just the
3879 copy_insn_n_scratches = 0;
3880 orig_asm_operands_vector = 0;
3881 orig_asm_constraints_vector = 0;
3882 copy_asm_operands_vector = 0;
3883 copy_asm_constraints_vector = 0;
3884 return copy_insn_1 (insn);
3887 /* Initialize data structures and variables in this file
3888 before generating rtl for each function. */
3893 struct function *f = cfun;
3895 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3898 seq_rtl_expr = NULL;
3900 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3903 first_label_num = label_num;
3907 clear_emit_caches ();
3909 /* Init the tables that describe all the pseudo regs. */
3911 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3913 f->emit->regno_pointer_flag
3914 = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
3916 f->emit->regno_pointer_align
3917 = (unsigned char *) xcalloc (f->emit->regno_pointer_flag_length,
3918 sizeof (unsigned char));
3921 = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
3924 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3925 init_virtual_regs (f->emit);
3927 /* Indicate that the virtual registers and stack locations are
3929 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3930 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3931 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3932 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3934 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3935 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3936 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3937 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3938 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3940 #ifdef STACK_BOUNDARY
3941 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3942 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3943 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3944 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
3946 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
3947 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
3948 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
3949 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
3950 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
3953 #ifdef INIT_EXPANDERS
3958 /* Mark SS for GC. */
3961 mark_sequence_stack (ss)
3962 struct sequence_stack *ss;
3966 ggc_mark_rtx (ss->first);
3967 ggc_mark_tree (ss->sequence_rtl_expr);
3972 /* Mark ES for GC. */
3975 mark_emit_status (es)
3976 struct emit_status *es;
3984 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
3988 mark_sequence_stack (es->sequence_stack);
3989 ggc_mark_tree (es->sequence_rtl_expr);
3990 ggc_mark_rtx (es->x_first_insn);
3993 /* Create some permanent unique rtl objects shared between all functions.
3994 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3997 init_emit_once (line_numbers)
4001 enum machine_mode mode;
4002 enum machine_mode double_mode;
4004 no_line_numbers = ! line_numbers;
4006 /* Compute the word and byte modes. */
4008 byte_mode = VOIDmode;
4009 word_mode = VOIDmode;
4010 double_mode = VOIDmode;
4012 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4013 mode = GET_MODE_WIDER_MODE (mode))
4015 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4016 && byte_mode == VOIDmode)
4019 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4020 && word_mode == VOIDmode)
4024 #ifndef DOUBLE_TYPE_SIZE
4025 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
4028 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4029 mode = GET_MODE_WIDER_MODE (mode))
4031 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4032 && double_mode == VOIDmode)
4036 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4038 /* Assign register numbers to the globally defined register rtx.
4039 This must be done at runtime because the register number field
4040 is in a union and some compilers can't initialize unions. */
4042 pc_rtx = gen_rtx (PC, VOIDmode);
4043 cc0_rtx = gen_rtx (CC0, VOIDmode);
4044 stack_pointer_rtx = gen_rtx_raw_REG (Pmode, STACK_POINTER_REGNUM);
4045 frame_pointer_rtx = gen_rtx_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4046 if (hard_frame_pointer_rtx == 0)
4047 hard_frame_pointer_rtx = gen_rtx_raw_REG (Pmode,
4048 HARD_FRAME_POINTER_REGNUM);
4049 if (arg_pointer_rtx == 0)
4050 arg_pointer_rtx = gen_rtx_raw_REG (Pmode, ARG_POINTER_REGNUM);
4051 virtual_incoming_args_rtx =
4052 gen_rtx_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4053 virtual_stack_vars_rtx =
4054 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4055 virtual_stack_dynamic_rtx =
4056 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4057 virtual_outgoing_args_rtx =
4058 gen_rtx_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4059 virtual_cfa_rtx = gen_rtx_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4061 /* These rtx must be roots if GC is enabled. */
4063 ggc_add_rtx_root (global_rtl, GR_MAX);
4065 #ifdef INIT_EXPANDERS
4066 /* This is to initialize save_machine_status and restore_machine_status before
4067 the first call to push_function_context_to. This is needed by the Chill
4068 front end which calls push_function_context_to before the first cal to
4069 init_function_start. */
4073 /* Create the unique rtx's for certain rtx codes and operand values. */
4075 /* Don't use gen_rtx here since gen_rtx in this case
4076 tries to use these variables. */
4077 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4078 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4079 gen_rtx_raw_CONST_INT (VOIDmode, i);
4081 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4083 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4084 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4085 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4087 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4089 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4090 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4091 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4092 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4094 for (i = 0; i <= 2; i++)
4096 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4097 mode = GET_MODE_WIDER_MODE (mode))
4099 rtx tem = rtx_alloc (CONST_DOUBLE);
4100 union real_extract u;
4102 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
4103 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4105 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
4106 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4107 PUT_MODE (tem, mode);
4109 const_tiny_rtx[i][(int) mode] = tem;
4112 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4114 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4115 mode = GET_MODE_WIDER_MODE (mode))
4116 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4118 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4120 mode = GET_MODE_WIDER_MODE (mode))
4121 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4124 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
4125 if (GET_MODE_CLASS (mode) == MODE_CC)
4126 const_tiny_rtx[0][(int) mode] = const0_rtx;
4128 ggc_add_rtx_root (&const_tiny_rtx[0][0], sizeof(const_tiny_rtx)/sizeof(rtx));
4129 ggc_add_rtx_root (&const_true_rtx, 1);
4131 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4132 return_address_pointer_rtx
4133 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4137 struct_value_rtx = STRUCT_VALUE;
4139 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4142 #ifdef STRUCT_VALUE_INCOMING
4143 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4145 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4146 struct_value_incoming_rtx
4147 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4149 struct_value_incoming_rtx = struct_value_rtx;
4153 #ifdef STATIC_CHAIN_REGNUM
4154 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4156 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4157 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4158 static_chain_incoming_rtx
4159 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4162 static_chain_incoming_rtx = static_chain_rtx;
4166 static_chain_rtx = STATIC_CHAIN;
4168 #ifdef STATIC_CHAIN_INCOMING
4169 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4171 static_chain_incoming_rtx = static_chain_rtx;
4175 #ifdef PIC_OFFSET_TABLE_REGNUM
4176 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4179 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4180 ggc_add_rtx_root (&struct_value_rtx, 1);
4181 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4182 ggc_add_rtx_root (&static_chain_rtx, 1);
4183 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4184 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4186 /* Initialize the CONST_INT hash table. */
4187 const_int_htab = htab_create (37, const_int_htab_hash,
4188 const_int_htab_eq, NULL);
4189 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4193 /* Query and clear/ restore no_line_numbers. This is used by the
4194 switch / case handling in stmt.c to give proper line numbers in
4195 warnings about unreachable code. */
4198 force_line_numbers ()
4200 int old = no_line_numbers;
4202 no_line_numbers = 0;
4204 force_next_line_note ();
4209 restore_line_number_status (old_value)
4212 no_line_numbers = old_value;