1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
62 #include "tree-flow.h"
64 struct target_rtl default_target_rtl;
66 struct target_rtl *this_target_rtl = &default_target_rtl;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num = 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
106 REAL_VALUE_TYPE dconsthalf;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
110 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
117 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
119 /* A hash table storing CONST_INTs whose absolute value is greater
120 than MAX_SAVED_CONST_INT. */
122 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
123 htab_t const_int_htab;
125 /* A hash table storing memory attribute structures. */
126 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
127 htab_t mem_attrs_htab;
129 /* A hash table storing register attribute structures. */
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
131 htab_t reg_attrs_htab;
133 /* A hash table storing all CONST_DOUBLEs. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
135 htab_t const_double_htab;
137 /* A hash table storing all CONST_FIXEDs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
139 htab_t const_fixed_htab;
141 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
142 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
143 #define last_location (crtl->emit.x_last_location)
144 #define first_label_num (crtl->emit.x_first_label_num)
146 static rtx make_call_insn_raw (rtx);
147 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
148 static void set_used_decls (tree);
149 static void mark_label_nuses (rtx);
150 static hashval_t const_int_htab_hash (const void *);
151 static int const_int_htab_eq (const void *, const void *);
152 static hashval_t const_double_htab_hash (const void *);
153 static int const_double_htab_eq (const void *, const void *);
154 static rtx lookup_const_double (rtx);
155 static hashval_t const_fixed_htab_hash (const void *);
156 static int const_fixed_htab_eq (const void *, const void *);
157 static rtx lookup_const_fixed (rtx);
158 static hashval_t mem_attrs_htab_hash (const void *);
159 static int mem_attrs_htab_eq (const void *, const void *);
160 static hashval_t reg_attrs_htab_hash (const void *);
161 static int reg_attrs_htab_eq (const void *, const void *);
162 static reg_attrs *get_reg_attrs (tree, int);
163 static rtx gen_const_vector (enum machine_mode, int);
164 static void copy_rtx_if_shared_1 (rtx *orig);
166 /* Probability of the conditional branch currently proceeded by try_split.
167 Set to -1 otherwise. */
168 int split_branch_probability = -1;
170 /* Returns a hash code for X (which is a really a CONST_INT). */
173 const_int_htab_hash (const void *x)
175 return (hashval_t) INTVAL ((const_rtx) x);
178 /* Returns nonzero if the value represented by X (which is really a
179 CONST_INT) is the same as that given by Y (which is really a
183 const_int_htab_eq (const void *x, const void *y)
185 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
188 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
190 const_double_htab_hash (const void *x)
192 const_rtx const value = (const_rtx) x;
195 if (GET_MODE (value) == VOIDmode)
196 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
199 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
200 /* MODE is used in the comparison, so it should be in the hash. */
201 h ^= GET_MODE (value);
206 /* Returns nonzero if the value represented by X (really a ...)
207 is the same as that represented by Y (really a ...) */
209 const_double_htab_eq (const void *x, const void *y)
211 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
213 if (GET_MODE (a) != GET_MODE (b))
215 if (GET_MODE (a) == VOIDmode)
216 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
217 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
219 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
220 CONST_DOUBLE_REAL_VALUE (b));
223 /* Returns a hash code for X (which is really a CONST_FIXED). */
226 const_fixed_htab_hash (const void *x)
228 const_rtx const value = (const_rtx) x;
231 h = fixed_hash (CONST_FIXED_VALUE (value));
232 /* MODE is used in the comparison, so it should be in the hash. */
233 h ^= GET_MODE (value);
237 /* Returns nonzero if the value represented by X (really a ...)
238 is the same as that represented by Y (really a ...). */
241 const_fixed_htab_eq (const void *x, const void *y)
243 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
245 if (GET_MODE (a) != GET_MODE (b))
247 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
250 /* Returns a hash code for X (which is a really a mem_attrs *). */
253 mem_attrs_htab_hash (const void *x)
255 const mem_attrs *const p = (const mem_attrs *) x;
257 return (p->alias ^ (p->align * 1000)
258 ^ (p->addrspace * 4000)
259 ^ ((p->offset_known_p ? p->offset : 0) * 50000)
260 ^ ((p->size_known_p ? p->size : 0) * 2500000)
261 ^ (size_t) iterative_hash_expr (p->expr, 0));
264 /* Return true if the given memory attributes are equal. */
267 mem_attrs_eq_p (const struct mem_attrs *p, const struct mem_attrs *q)
269 return (p->alias == q->alias
270 && p->offset_known_p == q->offset_known_p
271 && (!p->offset_known_p || p->offset == q->offset)
272 && p->size_known_p == q->size_known_p
273 && (!p->size_known_p || p->size == q->size)
274 && p->align == q->align
275 && p->addrspace == q->addrspace
276 && (p->expr == q->expr
277 || (p->expr != NULL_TREE && q->expr != NULL_TREE
278 && operand_equal_p (p->expr, q->expr, 0))));
281 /* Returns nonzero if the value represented by X (which is really a
282 mem_attrs *) is the same as that given by Y (which is also really a
286 mem_attrs_htab_eq (const void *x, const void *y)
288 return mem_attrs_eq_p ((const mem_attrs *) x, (const mem_attrs *) y);
291 /* Set MEM's memory attributes so that they are the same as ATTRS. */
294 set_mem_attrs (rtx mem, mem_attrs *attrs)
298 /* If everything is the default, we can just clear the attributes. */
299 if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
305 slot = htab_find_slot (mem_attrs_htab, attrs, INSERT);
308 *slot = ggc_alloc_mem_attrs ();
309 memcpy (*slot, attrs, sizeof (mem_attrs));
312 MEM_ATTRS (mem) = (mem_attrs *) *slot;
315 /* Returns a hash code for X (which is a really a reg_attrs *). */
318 reg_attrs_htab_hash (const void *x)
320 const reg_attrs *const p = (const reg_attrs *) x;
322 return ((p->offset * 1000) ^ (intptr_t) p->decl);
325 /* Returns nonzero if the value represented by X (which is really a
326 reg_attrs *) is the same as that given by Y (which is also really a
330 reg_attrs_htab_eq (const void *x, const void *y)
332 const reg_attrs *const p = (const reg_attrs *) x;
333 const reg_attrs *const q = (const reg_attrs *) y;
335 return (p->decl == q->decl && p->offset == q->offset);
337 /* Allocate a new reg_attrs structure and insert it into the hash table if
338 one identical to it is not already in the table. We are doing this for
342 get_reg_attrs (tree decl, int offset)
347 /* If everything is the default, we can just return zero. */
348 if (decl == 0 && offset == 0)
352 attrs.offset = offset;
354 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
357 *slot = ggc_alloc_reg_attrs ();
358 memcpy (*slot, &attrs, sizeof (reg_attrs));
361 return (reg_attrs *) *slot;
366 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
372 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
373 MEM_VOLATILE_P (x) = true;
379 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
380 don't attempt to share with the various global pieces of rtl (such as
381 frame_pointer_rtx). */
384 gen_raw_REG (enum machine_mode mode, int regno)
386 rtx x = gen_rtx_raw_REG (mode, regno);
387 ORIGINAL_REGNO (x) = regno;
391 /* There are some RTL codes that require special attention; the generation
392 functions do the raw handling. If you add to this list, modify
393 special_rtx in gengenrtl.c as well. */
396 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
400 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
401 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
403 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
404 if (const_true_rtx && arg == STORE_FLAG_VALUE)
405 return const_true_rtx;
408 /* Look up the CONST_INT in the hash table. */
409 slot = htab_find_slot_with_hash (const_int_htab, &arg,
410 (hashval_t) arg, INSERT);
412 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
418 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
420 return GEN_INT (trunc_int_for_mode (c, mode));
423 /* CONST_DOUBLEs might be created from pairs of integers, or from
424 REAL_VALUE_TYPEs. Also, their length is known only at run time,
425 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
427 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
428 hash table. If so, return its counterpart; otherwise add it
429 to the hash table and return it. */
431 lookup_const_double (rtx real)
433 void **slot = htab_find_slot (const_double_htab, real, INSERT);
440 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
441 VALUE in mode MODE. */
443 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
445 rtx real = rtx_alloc (CONST_DOUBLE);
446 PUT_MODE (real, mode);
450 return lookup_const_double (real);
453 /* Determine whether FIXED, a CONST_FIXED, already exists in the
454 hash table. If so, return its counterpart; otherwise add it
455 to the hash table and return it. */
458 lookup_const_fixed (rtx fixed)
460 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
467 /* Return a CONST_FIXED rtx for a fixed-point value specified by
468 VALUE in mode MODE. */
471 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
473 rtx fixed = rtx_alloc (CONST_FIXED);
474 PUT_MODE (fixed, mode);
478 return lookup_const_fixed (fixed);
481 /* Constructs double_int from rtx CST. */
484 rtx_to_double_int (const_rtx cst)
488 if (CONST_INT_P (cst))
489 r = shwi_to_double_int (INTVAL (cst));
490 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
492 r.low = CONST_DOUBLE_LOW (cst);
493 r.high = CONST_DOUBLE_HIGH (cst);
502 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
506 immed_double_int_const (double_int i, enum machine_mode mode)
508 return immed_double_const (i.low, i.high, mode);
511 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
512 of ints: I0 is the low-order word and I1 is the high-order word.
513 Do not use this routine for non-integer modes; convert to
514 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
517 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
522 /* There are the following cases (note that there are no modes with
523 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
525 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
527 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
528 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
529 from copies of the sign bit, and sign of i0 and i1 are the same), then
530 we return a CONST_INT for i0.
531 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
532 if (mode != VOIDmode)
534 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
535 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
536 /* We can get a 0 for an error mark. */
537 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
538 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
540 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
541 return gen_int_mode (i0, mode);
543 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
546 /* If this integer fits in one word, return a CONST_INT. */
547 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
550 /* We use VOIDmode for integers. */
551 value = rtx_alloc (CONST_DOUBLE);
552 PUT_MODE (value, VOIDmode);
554 CONST_DOUBLE_LOW (value) = i0;
555 CONST_DOUBLE_HIGH (value) = i1;
557 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
558 XWINT (value, i) = 0;
560 return lookup_const_double (value);
564 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
566 /* In case the MD file explicitly references the frame pointer, have
567 all such references point to the same frame pointer. This is
568 used during frame pointer elimination to distinguish the explicit
569 references to these registers from pseudos that happened to be
572 If we have eliminated the frame pointer or arg pointer, we will
573 be using it as a normal register, for example as a spill
574 register. In such cases, we might be accessing it in a mode that
575 is not Pmode and therefore cannot use the pre-allocated rtx.
577 Also don't do this when we are making new REGs in reload, since
578 we don't want to get confused with the real pointers. */
580 if (mode == Pmode && !reload_in_progress)
582 if (regno == FRAME_POINTER_REGNUM
583 && (!reload_completed || frame_pointer_needed))
584 return frame_pointer_rtx;
585 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
586 if (regno == HARD_FRAME_POINTER_REGNUM
587 && (!reload_completed || frame_pointer_needed))
588 return hard_frame_pointer_rtx;
590 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
591 if (regno == ARG_POINTER_REGNUM)
592 return arg_pointer_rtx;
594 #ifdef RETURN_ADDRESS_POINTER_REGNUM
595 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
596 return return_address_pointer_rtx;
598 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
599 && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
600 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
601 return pic_offset_table_rtx;
602 if (regno == STACK_POINTER_REGNUM)
603 return stack_pointer_rtx;
607 /* If the per-function register table has been set up, try to re-use
608 an existing entry in that table to avoid useless generation of RTL.
610 This code is disabled for now until we can fix the various backends
611 which depend on having non-shared hard registers in some cases. Long
612 term we want to re-enable this code as it can significantly cut down
613 on the amount of useless RTL that gets generated.
615 We'll also need to fix some code that runs after reload that wants to
616 set ORIGINAL_REGNO. */
621 && regno < FIRST_PSEUDO_REGISTER
622 && reg_raw_mode[regno] == mode)
623 return regno_reg_rtx[regno];
626 return gen_raw_REG (mode, regno);
630 gen_rtx_MEM (enum machine_mode mode, rtx addr)
632 rtx rt = gen_rtx_raw_MEM (mode, addr);
634 /* This field is not cleared by the mere allocation of the rtx, so
641 /* Generate a memory referring to non-trapping constant memory. */
644 gen_const_mem (enum machine_mode mode, rtx addr)
646 rtx mem = gen_rtx_MEM (mode, addr);
647 MEM_READONLY_P (mem) = 1;
648 MEM_NOTRAP_P (mem) = 1;
652 /* Generate a MEM referring to fixed portions of the frame, e.g., register
656 gen_frame_mem (enum machine_mode mode, rtx addr)
658 rtx mem = gen_rtx_MEM (mode, addr);
659 MEM_NOTRAP_P (mem) = 1;
660 set_mem_alias_set (mem, get_frame_alias_set ());
664 /* Generate a MEM referring to a temporary use of the stack, not part
665 of the fixed stack frame. For example, something which is pushed
666 by a target splitter. */
668 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
670 rtx mem = gen_rtx_MEM (mode, addr);
671 MEM_NOTRAP_P (mem) = 1;
672 if (!cfun->calls_alloca)
673 set_mem_alias_set (mem, get_frame_alias_set ());
677 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
678 this construct would be valid, and false otherwise. */
681 validate_subreg (enum machine_mode omode, enum machine_mode imode,
682 const_rtx reg, unsigned int offset)
684 unsigned int isize = GET_MODE_SIZE (imode);
685 unsigned int osize = GET_MODE_SIZE (omode);
687 /* All subregs must be aligned. */
688 if (offset % osize != 0)
691 /* The subreg offset cannot be outside the inner object. */
695 /* ??? This should not be here. Temporarily continue to allow word_mode
696 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
697 Generally, backends are doing something sketchy but it'll take time to
699 if (omode == word_mode)
701 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
702 is the culprit here, and not the backends. */
703 else if (osize >= UNITS_PER_WORD && isize >= osize)
705 /* Allow component subregs of complex and vector. Though given the below
706 extraction rules, it's not always clear what that means. */
707 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
708 && GET_MODE_INNER (imode) == omode)
710 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
711 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
712 represent this. It's questionable if this ought to be represented at
713 all -- why can't this all be hidden in post-reload splitters that make
714 arbitrarily mode changes to the registers themselves. */
715 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
717 /* Subregs involving floating point modes are not allowed to
718 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
719 (subreg:SI (reg:DF) 0) isn't. */
720 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
726 /* Paradoxical subregs must have offset zero. */
730 /* This is a normal subreg. Verify that the offset is representable. */
732 /* For hard registers, we already have most of these rules collected in
733 subreg_offset_representable_p. */
734 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
736 unsigned int regno = REGNO (reg);
738 #ifdef CANNOT_CHANGE_MODE_CLASS
739 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
740 && GET_MODE_INNER (imode) == omode)
742 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
746 return subreg_offset_representable_p (regno, imode, offset, omode);
749 /* For pseudo registers, we want most of the same checks. Namely:
750 If the register no larger than a word, the subreg must be lowpart.
751 If the register is larger than a word, the subreg must be the lowpart
752 of a subword. A subreg does *not* perform arbitrary bit extraction.
753 Given that we've already checked mode/offset alignment, we only have
754 to check subword subregs here. */
755 if (osize < UNITS_PER_WORD)
757 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
758 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
759 if (offset % UNITS_PER_WORD != low_off)
766 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
768 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
769 return gen_rtx_raw_SUBREG (mode, reg, offset);
772 /* Generate a SUBREG representing the least-significant part of REG if MODE
773 is smaller than mode of REG, otherwise paradoxical SUBREG. */
776 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
778 enum machine_mode inmode;
780 inmode = GET_MODE (reg);
781 if (inmode == VOIDmode)
783 return gen_rtx_SUBREG (mode, reg,
784 subreg_lowpart_offset (mode, inmode));
788 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
791 gen_rtvec (int n, ...)
799 /* Don't allocate an empty rtvec... */
806 rt_val = rtvec_alloc (n);
808 for (i = 0; i < n; i++)
809 rt_val->elem[i] = va_arg (p, rtx);
816 gen_rtvec_v (int n, rtx *argp)
821 /* Don't allocate an empty rtvec... */
825 rt_val = rtvec_alloc (n);
827 for (i = 0; i < n; i++)
828 rt_val->elem[i] = *argp++;
833 /* Return the number of bytes between the start of an OUTER_MODE
834 in-memory value and the start of an INNER_MODE in-memory value,
835 given that the former is a lowpart of the latter. It may be a
836 paradoxical lowpart, in which case the offset will be negative
837 on big-endian targets. */
840 byte_lowpart_offset (enum machine_mode outer_mode,
841 enum machine_mode inner_mode)
843 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
844 return subreg_lowpart_offset (outer_mode, inner_mode);
846 return -subreg_lowpart_offset (inner_mode, outer_mode);
849 /* Generate a REG rtx for a new pseudo register of mode MODE.
850 This pseudo is assigned the next sequential register number. */
853 gen_reg_rtx (enum machine_mode mode)
856 unsigned int align = GET_MODE_ALIGNMENT (mode);
858 gcc_assert (can_create_pseudo_p ());
860 /* If a virtual register with bigger mode alignment is generated,
861 increase stack alignment estimation because it might be spilled
863 if (SUPPORTS_STACK_ALIGNMENT
864 && crtl->stack_alignment_estimated < align
865 && !crtl->stack_realign_processed)
867 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
868 if (crtl->stack_alignment_estimated < min_align)
869 crtl->stack_alignment_estimated = min_align;
872 if (generating_concat_p
873 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
874 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
876 /* For complex modes, don't make a single pseudo.
877 Instead, make a CONCAT of two pseudos.
878 This allows noncontiguous allocation of the real and imaginary parts,
879 which makes much better code. Besides, allocating DCmode
880 pseudos overstrains reload on some machines like the 386. */
881 rtx realpart, imagpart;
882 enum machine_mode partmode = GET_MODE_INNER (mode);
884 realpart = gen_reg_rtx (partmode);
885 imagpart = gen_reg_rtx (partmode);
886 return gen_rtx_CONCAT (mode, realpart, imagpart);
889 /* Make sure regno_pointer_align, and regno_reg_rtx are large
890 enough to have an element for this pseudo reg number. */
892 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
894 int old_size = crtl->emit.regno_pointer_align_length;
898 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
899 memset (tmp + old_size, 0, old_size);
900 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
902 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
903 memset (new1 + old_size, 0, old_size * sizeof (rtx));
904 regno_reg_rtx = new1;
906 crtl->emit.regno_pointer_align_length = old_size * 2;
909 val = gen_raw_REG (mode, reg_rtx_no);
910 regno_reg_rtx[reg_rtx_no++] = val;
914 /* Update NEW with the same attributes as REG, but with OFFSET added
915 to the REG_OFFSET. */
918 update_reg_offset (rtx new_rtx, rtx reg, int offset)
920 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
921 REG_OFFSET (reg) + offset);
924 /* Generate a register with same attributes as REG, but with OFFSET
925 added to the REG_OFFSET. */
928 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
931 rtx new_rtx = gen_rtx_REG (mode, regno);
933 update_reg_offset (new_rtx, reg, offset);
937 /* Generate a new pseudo-register with the same attributes as REG, but
938 with OFFSET added to the REG_OFFSET. */
941 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
943 rtx new_rtx = gen_reg_rtx (mode);
945 update_reg_offset (new_rtx, reg, offset);
949 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
950 new register is a (possibly paradoxical) lowpart of the old one. */
953 adjust_reg_mode (rtx reg, enum machine_mode mode)
955 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
956 PUT_MODE (reg, mode);
959 /* Copy REG's attributes from X, if X has any attributes. If REG and X
960 have different modes, REG is a (possibly paradoxical) lowpart of X. */
963 set_reg_attrs_from_value (rtx reg, rtx x)
967 /* Hard registers can be reused for multiple purposes within the same
968 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
970 if (HARD_REGISTER_P (reg))
973 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
976 if (MEM_OFFSET_KNOWN_P (x))
977 REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
978 MEM_OFFSET (x) + offset);
980 mark_reg_pointer (reg, 0);
985 update_reg_offset (reg, x, offset);
987 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
991 /* Generate a REG rtx for a new pseudo register, copying the mode
992 and attributes from X. */
995 gen_reg_rtx_and_attrs (rtx x)
997 rtx reg = gen_reg_rtx (GET_MODE (x));
998 set_reg_attrs_from_value (reg, x);
1002 /* Set the register attributes for registers contained in PARM_RTX.
1003 Use needed values from memory attributes of MEM. */
1006 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1008 if (REG_P (parm_rtx))
1009 set_reg_attrs_from_value (parm_rtx, mem);
1010 else if (GET_CODE (parm_rtx) == PARALLEL)
1012 /* Check for a NULL entry in the first slot, used to indicate that the
1013 parameter goes both on the stack and in registers. */
1014 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1015 for (; i < XVECLEN (parm_rtx, 0); i++)
1017 rtx x = XVECEXP (parm_rtx, 0, i);
1018 if (REG_P (XEXP (x, 0)))
1019 REG_ATTRS (XEXP (x, 0))
1020 = get_reg_attrs (MEM_EXPR (mem),
1021 INTVAL (XEXP (x, 1)));
1026 /* Set the REG_ATTRS for registers in value X, given that X represents
1030 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1032 if (GET_CODE (x) == SUBREG)
1034 gcc_assert (subreg_lowpart_p (x));
1039 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1041 if (GET_CODE (x) == CONCAT)
1043 if (REG_P (XEXP (x, 0)))
1044 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1045 if (REG_P (XEXP (x, 1)))
1046 REG_ATTRS (XEXP (x, 1))
1047 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1049 if (GET_CODE (x) == PARALLEL)
1053 /* Check for a NULL entry, used to indicate that the parameter goes
1054 both on the stack and in registers. */
1055 if (XEXP (XVECEXP (x, 0, 0), 0))
1060 for (i = start; i < XVECLEN (x, 0); i++)
1062 rtx y = XVECEXP (x, 0, i);
1063 if (REG_P (XEXP (y, 0)))
1064 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1069 /* Assign the RTX X to declaration T. */
1072 set_decl_rtl (tree t, rtx x)
1074 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1076 set_reg_attrs_for_decl_rtl (t, x);
1079 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1080 if the ABI requires the parameter to be passed by reference. */
1083 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1085 DECL_INCOMING_RTL (t) = x;
1086 if (x && !by_reference_p)
1087 set_reg_attrs_for_decl_rtl (t, x);
1090 /* Identify REG (which may be a CONCAT) as a user register. */
1093 mark_user_reg (rtx reg)
1095 if (GET_CODE (reg) == CONCAT)
1097 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1098 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1102 gcc_assert (REG_P (reg));
1103 REG_USERVAR_P (reg) = 1;
1107 /* Identify REG as a probable pointer register and show its alignment
1108 as ALIGN, if nonzero. */
1111 mark_reg_pointer (rtx reg, int align)
1113 if (! REG_POINTER (reg))
1115 REG_POINTER (reg) = 1;
1118 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1120 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1121 /* We can no-longer be sure just how aligned this pointer is. */
1122 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1125 /* Return 1 plus largest pseudo reg number used in the current function. */
1133 /* Return 1 + the largest label number used so far in the current function. */
1136 max_label_num (void)
1141 /* Return first label number used in this function (if any were used). */
1144 get_first_label_num (void)
1146 return first_label_num;
1149 /* If the rtx for label was created during the expansion of a nested
1150 function, then first_label_num won't include this label number.
1151 Fix this now so that array indices work later. */
1154 maybe_set_first_label_num (rtx x)
1156 if (CODE_LABEL_NUMBER (x) < first_label_num)
1157 first_label_num = CODE_LABEL_NUMBER (x);
1160 /* Return a value representing some low-order bits of X, where the number
1161 of low-order bits is given by MODE. Note that no conversion is done
1162 between floating-point and fixed-point values, rather, the bit
1163 representation is returned.
1165 This function handles the cases in common between gen_lowpart, below,
1166 and two variants in cse.c and combine.c. These are the cases that can
1167 be safely handled at all points in the compilation.
1169 If this is not a case we can handle, return 0. */
1172 gen_lowpart_common (enum machine_mode mode, rtx x)
1174 int msize = GET_MODE_SIZE (mode);
1177 enum machine_mode innermode;
1179 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1180 so we have to make one up. Yuk. */
1181 innermode = GET_MODE (x);
1183 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1184 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1185 else if (innermode == VOIDmode)
1186 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1188 xsize = GET_MODE_SIZE (innermode);
1190 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1192 if (innermode == mode)
1195 /* MODE must occupy no more words than the mode of X. */
1196 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1197 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1200 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1201 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1204 offset = subreg_lowpart_offset (mode, innermode);
1206 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1207 && (GET_MODE_CLASS (mode) == MODE_INT
1208 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1210 /* If we are getting the low-order part of something that has been
1211 sign- or zero-extended, we can either just use the object being
1212 extended or make a narrower extension. If we want an even smaller
1213 piece than the size of the object being extended, call ourselves
1216 This case is used mostly by combine and cse. */
1218 if (GET_MODE (XEXP (x, 0)) == mode)
1220 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1221 return gen_lowpart_common (mode, XEXP (x, 0));
1222 else if (msize < xsize)
1223 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1225 else if (GET_CODE (x) == SUBREG || REG_P (x)
1226 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1227 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1228 return simplify_gen_subreg (mode, x, innermode, offset);
1230 /* Otherwise, we can't do this. */
1235 gen_highpart (enum machine_mode mode, rtx x)
1237 unsigned int msize = GET_MODE_SIZE (mode);
1240 /* This case loses if X is a subreg. To catch bugs early,
1241 complain if an invalid MODE is used even in other cases. */
1242 gcc_assert (msize <= UNITS_PER_WORD
1243 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1245 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1246 subreg_highpart_offset (mode, GET_MODE (x)));
1247 gcc_assert (result);
1249 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1250 the target if we have a MEM. gen_highpart must return a valid operand,
1251 emitting code if necessary to do so. */
1254 result = validize_mem (result);
1255 gcc_assert (result);
1261 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1262 be VOIDmode constant. */
1264 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1266 if (GET_MODE (exp) != VOIDmode)
1268 gcc_assert (GET_MODE (exp) == innermode);
1269 return gen_highpart (outermode, exp);
1271 return simplify_gen_subreg (outermode, exp, innermode,
1272 subreg_highpart_offset (outermode, innermode));
1275 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1278 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1280 unsigned int offset = 0;
1281 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1285 if (WORDS_BIG_ENDIAN)
1286 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1287 if (BYTES_BIG_ENDIAN)
1288 offset += difference % UNITS_PER_WORD;
1294 /* Return offset in bytes to get OUTERMODE high part
1295 of the value in mode INNERMODE stored in memory in target format. */
1297 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1299 unsigned int offset = 0;
1300 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1302 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1306 if (! WORDS_BIG_ENDIAN)
1307 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1308 if (! BYTES_BIG_ENDIAN)
1309 offset += difference % UNITS_PER_WORD;
1315 /* Return 1 iff X, assumed to be a SUBREG,
1316 refers to the least significant part of its containing reg.
1317 If X is not a SUBREG, always return 1 (it is its own low part!). */
1320 subreg_lowpart_p (const_rtx x)
1322 if (GET_CODE (x) != SUBREG)
1324 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1327 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1328 == SUBREG_BYTE (x));
1331 /* Return true if X is a paradoxical subreg, false otherwise. */
1333 paradoxical_subreg_p (const_rtx x)
1335 if (GET_CODE (x) != SUBREG)
1337 return (GET_MODE_PRECISION (GET_MODE (x))
1338 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x))));
1341 /* Return subword OFFSET of operand OP.
1342 The word number, OFFSET, is interpreted as the word number starting
1343 at the low-order address. OFFSET 0 is the low-order word if not
1344 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1346 If we cannot extract the required word, we return zero. Otherwise,
1347 an rtx corresponding to the requested word will be returned.
1349 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1350 reload has completed, a valid address will always be returned. After
1351 reload, if a valid address cannot be returned, we return zero.
1353 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1354 it is the responsibility of the caller.
1356 MODE is the mode of OP in case it is a CONST_INT.
1358 ??? This is still rather broken for some cases. The problem for the
1359 moment is that all callers of this thing provide no 'goal mode' to
1360 tell us to work with. This exists because all callers were written
1361 in a word based SUBREG world.
1362 Now use of this function can be deprecated by simplify_subreg in most
1367 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1369 if (mode == VOIDmode)
1370 mode = GET_MODE (op);
1372 gcc_assert (mode != VOIDmode);
1374 /* If OP is narrower than a word, fail. */
1376 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1379 /* If we want a word outside OP, return zero. */
1381 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1384 /* Form a new MEM at the requested address. */
1387 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1389 if (! validate_address)
1392 else if (reload_completed)
1394 if (! strict_memory_address_addr_space_p (word_mode,
1396 MEM_ADDR_SPACE (op)))
1400 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1403 /* Rest can be handled by simplify_subreg. */
1404 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1407 /* Similar to `operand_subword', but never return 0. If we can't
1408 extract the required subword, put OP into a register and try again.
1409 The second attempt must succeed. We always validate the address in
1412 MODE is the mode of OP, in case it is CONST_INT. */
1415 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1417 rtx result = operand_subword (op, offset, 1, mode);
1422 if (mode != BLKmode && mode != VOIDmode)
1424 /* If this is a register which can not be accessed by words, copy it
1425 to a pseudo register. */
1427 op = copy_to_reg (op);
1429 op = force_reg (mode, op);
1432 result = operand_subword (op, offset, 1, mode);
1433 gcc_assert (result);
1438 /* Returns 1 if both MEM_EXPR can be considered equal
1442 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1447 if (! expr1 || ! expr2)
1450 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1453 return operand_equal_p (expr1, expr2, 0);
1456 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1457 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1461 get_mem_align_offset (rtx mem, unsigned int align)
1464 unsigned HOST_WIDE_INT offset;
1466 /* This function can't use
1467 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1468 || (MAX (MEM_ALIGN (mem),
1469 get_object_alignment (MEM_EXPR (mem), align))
1473 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1475 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1476 for <variable>. get_inner_reference doesn't handle it and
1477 even if it did, the alignment in that case needs to be determined
1478 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1479 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1480 isn't sufficiently aligned, the object it is in might be. */
1481 gcc_assert (MEM_P (mem));
1482 expr = MEM_EXPR (mem);
1483 if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1486 offset = MEM_OFFSET (mem);
1489 if (DECL_ALIGN (expr) < align)
1492 else if (INDIRECT_REF_P (expr))
1494 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1497 else if (TREE_CODE (expr) == COMPONENT_REF)
1501 tree inner = TREE_OPERAND (expr, 0);
1502 tree field = TREE_OPERAND (expr, 1);
1503 tree byte_offset = component_ref_field_offset (expr);
1504 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1507 || !host_integerp (byte_offset, 1)
1508 || !host_integerp (bit_offset, 1))
1511 offset += tree_low_cst (byte_offset, 1);
1512 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1514 if (inner == NULL_TREE)
1516 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1517 < (unsigned int) align)
1521 else if (DECL_P (inner))
1523 if (DECL_ALIGN (inner) < align)
1527 else if (TREE_CODE (inner) != COMPONENT_REF)
1535 return offset & ((align / BITS_PER_UNIT) - 1);
1538 /* Given REF (a MEM) and T, either the type of X or the expression
1539 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1540 if we are making a new object of this type. BITPOS is nonzero if
1541 there is an offset outstanding on T that will be applied later. */
1544 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1545 HOST_WIDE_INT bitpos)
1547 HOST_WIDE_INT apply_bitpos = 0;
1549 struct mem_attrs attrs, *defattrs, *refattrs;
1551 /* It can happen that type_for_mode was given a mode for which there
1552 is no language-level type. In which case it returns NULL, which
1557 type = TYPE_P (t) ? t : TREE_TYPE (t);
1558 if (type == error_mark_node)
1561 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1562 wrong answer, as it assumes that DECL_RTL already has the right alias
1563 info. Callers should not set DECL_RTL until after the call to
1564 set_mem_attributes. */
1565 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1567 memset (&attrs, 0, sizeof (attrs));
1569 /* Get the alias set from the expression or type (perhaps using a
1570 front-end routine) and use it. */
1571 attrs.alias = get_alias_set (t);
1573 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1574 MEM_IN_STRUCT_P (ref)
1575 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1576 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1578 /* If we are making an object of this type, or if this is a DECL, we know
1579 that it is a scalar if the type is not an aggregate. */
1580 if ((objectp || DECL_P (t))
1581 && ! AGGREGATE_TYPE_P (type)
1582 && TREE_CODE (type) != COMPLEX_TYPE)
1583 MEM_SCALAR_P (ref) = 1;
1585 /* Default values from pre-existing memory attributes if present. */
1586 refattrs = MEM_ATTRS (ref);
1589 /* ??? Can this ever happen? Calling this routine on a MEM that
1590 already carries memory attributes should probably be invalid. */
1591 attrs.expr = refattrs->expr;
1592 attrs.offset_known_p = refattrs->offset_known_p;
1593 attrs.offset = refattrs->offset;
1594 attrs.size_known_p = refattrs->size_known_p;
1595 attrs.size = refattrs->size;
1596 attrs.align = refattrs->align;
1599 /* Otherwise, default values from the mode of the MEM reference. */
1602 defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
1603 gcc_assert (!defattrs->expr);
1604 gcc_assert (!defattrs->offset_known_p);
1606 /* Respect mode size. */
1607 attrs.size_known_p = defattrs->size_known_p;
1608 attrs.size = defattrs->size;
1609 /* ??? Is this really necessary? We probably should always get
1610 the size from the type below. */
1612 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1613 if T is an object, always compute the object alignment below. */
1615 attrs.align = defattrs->align;
1617 attrs.align = BITS_PER_UNIT;
1618 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1619 e.g. if the type carries an alignment attribute. Should we be
1620 able to simply always use TYPE_ALIGN? */
1623 /* We can set the alignment from the type if we are making an object,
1624 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1625 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1626 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1628 else if (TREE_CODE (t) == MEM_REF)
1630 tree op0 = TREE_OPERAND (t, 0);
1631 if (TREE_CODE (op0) == ADDR_EXPR
1632 && (DECL_P (TREE_OPERAND (op0, 0))
1633 || CONSTANT_CLASS_P (TREE_OPERAND (op0, 0))))
1635 if (DECL_P (TREE_OPERAND (op0, 0)))
1636 attrs.align = DECL_ALIGN (TREE_OPERAND (op0, 0));
1637 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0)))
1639 attrs.align = TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0, 0)));
1640 #ifdef CONSTANT_ALIGNMENT
1641 attrs.align = CONSTANT_ALIGNMENT (TREE_OPERAND (op0, 0),
1645 if (TREE_INT_CST_LOW (TREE_OPERAND (t, 1)) != 0)
1647 unsigned HOST_WIDE_INT ioff
1648 = TREE_INT_CST_LOW (TREE_OPERAND (t, 1));
1649 unsigned HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1650 attrs.align = MIN (aoff, attrs.align);
1654 /* ??? This isn't fully correct, we can't set the alignment from the
1655 type in all cases. */
1656 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1659 else if (TREE_CODE (t) == TARGET_MEM_REF)
1660 /* ??? This isn't fully correct, we can't set the alignment from the
1661 type in all cases. */
1662 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1664 /* If the size is known, we can set that. */
1665 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1667 attrs.size_known_p = true;
1668 attrs.size = tree_low_cst (TYPE_SIZE_UNIT (type), 1);
1671 /* If T is not a type, we may be able to deduce some more information about
1676 bool align_computed = false;
1678 if (TREE_THIS_VOLATILE (t))
1679 MEM_VOLATILE_P (ref) = 1;
1681 /* Now remove any conversions: they don't change what the underlying
1682 object is. Likewise for SAVE_EXPR. */
1683 while (CONVERT_EXPR_P (t)
1684 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1685 || TREE_CODE (t) == SAVE_EXPR)
1686 t = TREE_OPERAND (t, 0);
1688 /* Note whether this expression can trap. */
1689 MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
1691 base = get_base_address (t);
1692 if (base && DECL_P (base)
1693 && TREE_READONLY (base)
1694 && (TREE_STATIC (base) || DECL_EXTERNAL (base))
1695 && !TREE_THIS_VOLATILE (base))
1696 MEM_READONLY_P (ref) = 1;
1698 /* If this expression uses it's parent's alias set, mark it such
1699 that we won't change it. */
1700 if (component_uses_parent_alias_set (t))
1701 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1703 /* If this is a decl, set the attributes of the MEM from it. */
1707 attrs.offset_known_p = true;
1709 apply_bitpos = bitpos;
1710 if (DECL_SIZE_UNIT (t) && host_integerp (DECL_SIZE_UNIT (t), 1))
1712 attrs.size_known_p = true;
1713 attrs.size = tree_low_cst (DECL_SIZE_UNIT (t), 1);
1716 attrs.size_known_p = false;
1717 attrs.align = DECL_ALIGN (t);
1718 align_computed = true;
1721 /* If this is a constant, we know the alignment. */
1722 else if (CONSTANT_CLASS_P (t))
1724 attrs.align = TYPE_ALIGN (type);
1725 #ifdef CONSTANT_ALIGNMENT
1726 attrs.align = CONSTANT_ALIGNMENT (t, attrs.align);
1728 align_computed = true;
1731 /* If this is a field reference and not a bit-field, record it. */
1732 /* ??? There is some information that can be gleaned from bit-fields,
1733 such as the word offset in the structure that might be modified.
1734 But skip it for now. */
1735 else if (TREE_CODE (t) == COMPONENT_REF
1736 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1739 attrs.offset_known_p = true;
1741 apply_bitpos = bitpos;
1742 /* ??? Any reason the field size would be different than
1743 the size we got from the type? */
1746 /* If this is an array reference, look for an outer field reference. */
1747 else if (TREE_CODE (t) == ARRAY_REF)
1749 tree off_tree = size_zero_node;
1750 /* We can't modify t, because we use it at the end of the
1756 tree index = TREE_OPERAND (t2, 1);
1757 tree low_bound = array_ref_low_bound (t2);
1758 tree unit_size = array_ref_element_size (t2);
1760 /* We assume all arrays have sizes that are a multiple of a byte.
1761 First subtract the lower bound, if any, in the type of the
1762 index, then convert to sizetype and multiply by the size of
1763 the array element. */
1764 if (! integer_zerop (low_bound))
1765 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1768 off_tree = size_binop (PLUS_EXPR,
1769 size_binop (MULT_EXPR,
1770 fold_convert (sizetype,
1774 t2 = TREE_OPERAND (t2, 0);
1776 while (TREE_CODE (t2) == ARRAY_REF);
1781 attrs.offset_known_p = false;
1782 if (host_integerp (off_tree, 1))
1784 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1785 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1786 attrs.align = DECL_ALIGN (t2);
1787 if (aoff && (unsigned HOST_WIDE_INT) aoff < attrs.align)
1789 align_computed = true;
1790 attrs.offset_known_p = true;
1791 attrs.offset = ioff;
1792 apply_bitpos = bitpos;
1795 else if (TREE_CODE (t2) == COMPONENT_REF)
1798 attrs.offset_known_p = false;
1799 if (host_integerp (off_tree, 1))
1801 attrs.offset_known_p = true;
1802 attrs.offset = tree_low_cst (off_tree, 1);
1803 apply_bitpos = bitpos;
1805 /* ??? Any reason the field size would be different than
1806 the size we got from the type? */
1809 /* If this is an indirect reference, record it. */
1810 else if (TREE_CODE (t) == MEM_REF)
1813 attrs.offset_known_p = true;
1815 apply_bitpos = bitpos;
1819 /* If this is an indirect reference, record it. */
1820 else if (TREE_CODE (t) == MEM_REF
1821 || TREE_CODE (t) == TARGET_MEM_REF)
1824 attrs.offset_known_p = true;
1826 apply_bitpos = bitpos;
1829 if (!align_computed && !INDIRECT_REF_P (t))
1831 unsigned int obj_align = get_object_alignment (t, BIGGEST_ALIGNMENT);
1832 attrs.align = MAX (attrs.align, obj_align);
1836 /* If we modified OFFSET based on T, then subtract the outstanding
1837 bit position offset. Similarly, increase the size of the accessed
1838 object to contain the negative offset. */
1841 gcc_assert (attrs.offset_known_p);
1842 attrs.offset -= apply_bitpos / BITS_PER_UNIT;
1843 if (attrs.size_known_p)
1844 attrs.size += apply_bitpos / BITS_PER_UNIT;
1847 /* Now set the attributes we computed above. */
1848 set_mem_attrs (ref, &attrs);
1850 /* If this is already known to be a scalar or aggregate, we are done. */
1851 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1854 /* If it is a reference into an aggregate, this is part of an aggregate.
1855 Otherwise we don't know. */
1856 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1857 || TREE_CODE (t) == ARRAY_RANGE_REF
1858 || TREE_CODE (t) == BIT_FIELD_REF)
1859 MEM_IN_STRUCT_P (ref) = 1;
1863 set_mem_attributes (rtx ref, tree t, int objectp)
1865 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1868 /* Set the alias set of MEM to SET. */
1871 set_mem_alias_set (rtx mem, alias_set_type set)
1873 struct mem_attrs attrs;
1875 /* If the new and old alias sets don't conflict, something is wrong. */
1876 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1877 attrs = *get_mem_attrs (mem);
1879 set_mem_attrs (mem, &attrs);
1882 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1885 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1887 struct mem_attrs attrs;
1889 attrs = *get_mem_attrs (mem);
1890 attrs.addrspace = addrspace;
1891 set_mem_attrs (mem, &attrs);
1894 /* Set the alignment of MEM to ALIGN bits. */
1897 set_mem_align (rtx mem, unsigned int align)
1899 struct mem_attrs attrs;
1901 attrs = *get_mem_attrs (mem);
1902 attrs.align = align;
1903 set_mem_attrs (mem, &attrs);
1906 /* Set the expr for MEM to EXPR. */
1909 set_mem_expr (rtx mem, tree expr)
1911 struct mem_attrs attrs;
1913 attrs = *get_mem_attrs (mem);
1915 set_mem_attrs (mem, &attrs);
1918 /* Set the offset of MEM to OFFSET. */
1921 set_mem_offset (rtx mem, HOST_WIDE_INT offset)
1923 struct mem_attrs attrs;
1925 attrs = *get_mem_attrs (mem);
1926 attrs.offset_known_p = true;
1927 attrs.offset = offset;
1928 set_mem_attrs (mem, &attrs);
1931 /* Clear the offset of MEM. */
1934 clear_mem_offset (rtx mem)
1936 struct mem_attrs attrs;
1938 attrs = *get_mem_attrs (mem);
1939 attrs.offset_known_p = false;
1940 set_mem_attrs (mem, &attrs);
1943 /* Set the size of MEM to SIZE. */
1946 set_mem_size (rtx mem, HOST_WIDE_INT size)
1948 struct mem_attrs attrs;
1950 attrs = *get_mem_attrs (mem);
1951 attrs.size_known_p = true;
1953 set_mem_attrs (mem, &attrs);
1956 /* Clear the size of MEM. */
1959 clear_mem_size (rtx mem)
1961 struct mem_attrs attrs;
1963 attrs = *get_mem_attrs (mem);
1964 attrs.size_known_p = false;
1965 set_mem_attrs (mem, &attrs);
1968 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1969 and its address changed to ADDR. (VOIDmode means don't change the mode.
1970 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1971 returned memory location is required to be valid. The memory
1972 attributes are not changed. */
1975 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1980 gcc_assert (MEM_P (memref));
1981 as = MEM_ADDR_SPACE (memref);
1982 if (mode == VOIDmode)
1983 mode = GET_MODE (memref);
1985 addr = XEXP (memref, 0);
1986 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1987 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1992 if (reload_in_progress || reload_completed)
1993 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1995 addr = memory_address_addr_space (mode, addr, as);
1998 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2001 new_rtx = gen_rtx_MEM (mode, addr);
2002 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2006 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2007 way we are changing MEMREF, so we only preserve the alias set. */
2010 change_address (rtx memref, enum machine_mode mode, rtx addr)
2012 rtx new_rtx = change_address_1 (memref, mode, addr, 1);
2013 enum machine_mode mmode = GET_MODE (new_rtx);
2014 struct mem_attrs attrs, *defattrs;
2016 attrs = *get_mem_attrs (memref);
2017 defattrs = mode_mem_attrs[(int) mmode];
2018 attrs.expr = NULL_TREE;
2019 attrs.offset_known_p = false;
2020 attrs.size_known_p = defattrs->size_known_p;
2021 attrs.size = defattrs->size;
2022 attrs.align = defattrs->align;
2024 /* If there are no changes, just return the original memory reference. */
2025 if (new_rtx == memref)
2027 if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2030 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2031 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2034 set_mem_attrs (new_rtx, &attrs);
2038 /* Return a memory reference like MEMREF, but with its mode changed
2039 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2040 nonzero, the memory address is forced to be valid.
2041 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2042 and caller is responsible for adjusting MEMREF base register. */
2045 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2046 int validate, int adjust)
2048 rtx addr = XEXP (memref, 0);
2050 enum machine_mode address_mode;
2052 struct mem_attrs attrs, *defattrs;
2053 unsigned HOST_WIDE_INT max_align;
2055 attrs = *get_mem_attrs (memref);
2057 /* If there are no changes, just return the original memory reference. */
2058 if (mode == GET_MODE (memref) && !offset
2059 && (!validate || memory_address_addr_space_p (mode, addr,
2063 /* ??? Prefer to create garbage instead of creating shared rtl.
2064 This may happen even if offset is nonzero -- consider
2065 (plus (plus reg reg) const_int) -- so do this always. */
2066 addr = copy_rtx (addr);
2068 /* Convert a possibly large offset to a signed value within the
2069 range of the target address space. */
2070 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2071 pbits = GET_MODE_BITSIZE (address_mode);
2072 if (HOST_BITS_PER_WIDE_INT > pbits)
2074 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2075 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2081 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2082 object, we can merge it into the LO_SUM. */
2083 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2085 && (unsigned HOST_WIDE_INT) offset
2086 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2087 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2088 plus_constant (XEXP (addr, 1), offset));
2090 addr = plus_constant (addr, offset);
2093 new_rtx = change_address_1 (memref, mode, addr, validate);
2095 /* If the address is a REG, change_address_1 rightfully returns memref,
2096 but this would destroy memref's MEM_ATTRS. */
2097 if (new_rtx == memref && offset != 0)
2098 new_rtx = copy_rtx (new_rtx);
2100 /* Compute the new values of the memory attributes due to this adjustment.
2101 We add the offsets and update the alignment. */
2102 if (attrs.offset_known_p)
2103 attrs.offset += offset;
2105 /* Compute the new alignment by taking the MIN of the alignment and the
2106 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2110 max_align = (offset & -offset) * BITS_PER_UNIT;
2111 attrs.align = MIN (attrs.align, max_align);
2114 /* We can compute the size in a number of ways. */
2115 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2116 if (defattrs->size_known_p)
2118 attrs.size_known_p = true;
2119 attrs.size = defattrs->size;
2121 else if (attrs.size_known_p)
2122 attrs.size -= offset;
2124 set_mem_attrs (new_rtx, &attrs);
2126 /* At some point, we should validate that this offset is within the object,
2127 if all the appropriate values are known. */
2131 /* Return a memory reference like MEMREF, but with its mode changed
2132 to MODE and its address changed to ADDR, which is assumed to be
2133 MEMREF offset by OFFSET bytes. If VALIDATE is
2134 nonzero, the memory address is forced to be valid. */
2137 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2138 HOST_WIDE_INT offset, int validate)
2140 memref = change_address_1 (memref, VOIDmode, addr, validate);
2141 return adjust_address_1 (memref, mode, offset, validate, 0);
2144 /* Return a memory reference like MEMREF, but whose address is changed by
2145 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2146 known to be in OFFSET (possibly 1). */
2149 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2151 rtx new_rtx, addr = XEXP (memref, 0);
2152 enum machine_mode address_mode;
2153 struct mem_attrs attrs, *defattrs;
2155 attrs = *get_mem_attrs (memref);
2156 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2157 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2159 /* At this point we don't know _why_ the address is invalid. It
2160 could have secondary memory references, multiplies or anything.
2162 However, if we did go and rearrange things, we can wind up not
2163 being able to recognize the magic around pic_offset_table_rtx.
2164 This stuff is fragile, and is yet another example of why it is
2165 bad to expose PIC machinery too early. */
2166 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2168 && GET_CODE (addr) == PLUS
2169 && XEXP (addr, 0) == pic_offset_table_rtx)
2171 addr = force_reg (GET_MODE (addr), addr);
2172 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2175 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2176 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2178 /* If there are no changes, just return the original memory reference. */
2179 if (new_rtx == memref)
2182 /* Update the alignment to reflect the offset. Reset the offset, which
2184 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2185 attrs.offset_known_p = false;
2186 attrs.size_known_p = defattrs->size_known_p;
2187 attrs.size = defattrs->size;
2188 attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2189 set_mem_attrs (new_rtx, &attrs);
2193 /* Return a memory reference like MEMREF, but with its address changed to
2194 ADDR. The caller is asserting that the actual piece of memory pointed
2195 to is the same, just the form of the address is being changed, such as
2196 by putting something into a register. */
2199 replace_equiv_address (rtx memref, rtx addr)
2201 /* change_address_1 copies the memory attribute structure without change
2202 and that's exactly what we want here. */
2203 update_temp_slot_address (XEXP (memref, 0), addr);
2204 return change_address_1 (memref, VOIDmode, addr, 1);
2207 /* Likewise, but the reference is not required to be valid. */
2210 replace_equiv_address_nv (rtx memref, rtx addr)
2212 return change_address_1 (memref, VOIDmode, addr, 0);
2215 /* Return a memory reference like MEMREF, but with its mode widened to
2216 MODE and offset by OFFSET. This would be used by targets that e.g.
2217 cannot issue QImode memory operations and have to use SImode memory
2218 operations plus masking logic. */
2221 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2223 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2224 struct mem_attrs attrs;
2225 unsigned int size = GET_MODE_SIZE (mode);
2227 /* If there are no changes, just return the original memory reference. */
2228 if (new_rtx == memref)
2231 attrs = *get_mem_attrs (new_rtx);
2233 /* If we don't know what offset we were at within the expression, then
2234 we can't know if we've overstepped the bounds. */
2235 if (! attrs.offset_known_p)
2236 attrs.expr = NULL_TREE;
2240 if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2242 tree field = TREE_OPERAND (attrs.expr, 1);
2243 tree offset = component_ref_field_offset (attrs.expr);
2245 if (! DECL_SIZE_UNIT (field))
2247 attrs.expr = NULL_TREE;
2251 /* Is the field at least as large as the access? If so, ok,
2252 otherwise strip back to the containing structure. */
2253 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2254 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2255 && attrs.offset >= 0)
2258 if (! host_integerp (offset, 1))
2260 attrs.expr = NULL_TREE;
2264 attrs.expr = TREE_OPERAND (attrs.expr, 0);
2265 attrs.offset += tree_low_cst (offset, 1);
2266 attrs.offset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2269 /* Similarly for the decl. */
2270 else if (DECL_P (attrs.expr)
2271 && DECL_SIZE_UNIT (attrs.expr)
2272 && TREE_CODE (DECL_SIZE_UNIT (attrs.expr)) == INTEGER_CST
2273 && compare_tree_int (DECL_SIZE_UNIT (attrs.expr), size) >= 0
2274 && (! attrs.offset_known_p || attrs.offset >= 0))
2278 /* The widened memory access overflows the expression, which means
2279 that it could alias another expression. Zap it. */
2280 attrs.expr = NULL_TREE;
2286 attrs.offset_known_p = false;
2288 /* The widened memory may alias other stuff, so zap the alias set. */
2289 /* ??? Maybe use get_alias_set on any remaining expression. */
2291 attrs.size_known_p = true;
2293 set_mem_attrs (new_rtx, &attrs);
2297 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2298 static GTY(()) tree spill_slot_decl;
2301 get_spill_slot_decl (bool force_build_p)
2303 tree d = spill_slot_decl;
2305 struct mem_attrs attrs;
2307 if (d || !force_build_p)
2310 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2311 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2312 DECL_ARTIFICIAL (d) = 1;
2313 DECL_IGNORED_P (d) = 1;
2315 spill_slot_decl = d;
2317 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2318 MEM_NOTRAP_P (rd) = 1;
2319 attrs = *mode_mem_attrs[(int) BLKmode];
2320 attrs.alias = new_alias_set ();
2322 set_mem_attrs (rd, &attrs);
2323 SET_DECL_RTL (d, rd);
2328 /* Given MEM, a result from assign_stack_local, fill in the memory
2329 attributes as appropriate for a register allocator spill slot.
2330 These slots are not aliasable by other memory. We arrange for
2331 them all to use a single MEM_EXPR, so that the aliasing code can
2332 work properly in the case of shared spill slots. */
2335 set_mem_attrs_for_spill (rtx mem)
2337 struct mem_attrs attrs;
2340 attrs = *get_mem_attrs (mem);
2341 attrs.expr = get_spill_slot_decl (true);
2342 attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2343 attrs.addrspace = ADDR_SPACE_GENERIC;
2345 /* We expect the incoming memory to be of the form:
2346 (mem:MODE (plus (reg sfp) (const_int offset)))
2347 with perhaps the plus missing for offset = 0. */
2348 addr = XEXP (mem, 0);
2349 attrs.offset_known_p = true;
2351 if (GET_CODE (addr) == PLUS
2352 && CONST_INT_P (XEXP (addr, 1)))
2353 attrs.offset = INTVAL (XEXP (addr, 1));
2355 set_mem_attrs (mem, &attrs);
2356 MEM_NOTRAP_P (mem) = 1;
2359 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2362 gen_label_rtx (void)
2364 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2365 NULL, label_num++, NULL);
2368 /* For procedure integration. */
2370 /* Install new pointers to the first and last insns in the chain.
2371 Also, set cur_insn_uid to one higher than the last in use.
2372 Used for an inline-procedure after copying the insn chain. */
2375 set_new_first_and_last_insn (rtx first, rtx last)
2379 set_first_insn (first);
2380 set_last_insn (last);
2383 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2385 int debug_count = 0;
2387 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2388 cur_debug_insn_uid = 0;
2390 for (insn = first; insn; insn = NEXT_INSN (insn))
2391 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2392 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2395 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2396 if (DEBUG_INSN_P (insn))
2401 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2403 cur_debug_insn_uid++;
2406 for (insn = first; insn; insn = NEXT_INSN (insn))
2407 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2412 /* Go through all the RTL insn bodies and copy any invalid shared
2413 structure. This routine should only be called once. */
2416 unshare_all_rtl_1 (rtx insn)
2418 /* Unshare just about everything else. */
2419 unshare_all_rtl_in_chain (insn);
2421 /* Make sure the addresses of stack slots found outside the insn chain
2422 (such as, in DECL_RTL of a variable) are not shared
2423 with the insn chain.
2425 This special care is necessary when the stack slot MEM does not
2426 actually appear in the insn chain. If it does appear, its address
2427 is unshared from all else at that point. */
2428 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2431 /* Go through all the RTL insn bodies and copy any invalid shared
2432 structure, again. This is a fairly expensive thing to do so it
2433 should be done sparingly. */
2436 unshare_all_rtl_again (rtx insn)
2441 for (p = insn; p; p = NEXT_INSN (p))
2444 reset_used_flags (PATTERN (p));
2445 reset_used_flags (REG_NOTES (p));
2448 /* Make sure that virtual stack slots are not shared. */
2449 set_used_decls (DECL_INITIAL (cfun->decl));
2451 /* Make sure that virtual parameters are not shared. */
2452 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2453 set_used_flags (DECL_RTL (decl));
2455 reset_used_flags (stack_slot_list);
2457 unshare_all_rtl_1 (insn);
2461 unshare_all_rtl (void)
2463 unshare_all_rtl_1 (get_insns ());
2467 struct rtl_opt_pass pass_unshare_all_rtl =
2471 "unshare", /* name */
2473 unshare_all_rtl, /* execute */
2476 0, /* static_pass_number */
2477 TV_NONE, /* tv_id */
2478 0, /* properties_required */
2479 0, /* properties_provided */
2480 0, /* properties_destroyed */
2481 0, /* todo_flags_start */
2482 TODO_verify_rtl_sharing /* todo_flags_finish */
2487 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2488 Recursively does the same for subexpressions. */
2491 verify_rtx_sharing (rtx orig, rtx insn)
2496 const char *format_ptr;
2501 code = GET_CODE (x);
2503 /* These types may be freely shared. */
2522 /* SCRATCH must be shared because they represent distinct values. */
2524 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2529 if (shared_const_p (orig))
2534 /* A MEM is allowed to be shared if its address is constant. */
2535 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2536 || reload_completed || reload_in_progress)
2545 /* This rtx may not be shared. If it has already been seen,
2546 replace it with a copy of itself. */
2547 #ifdef ENABLE_CHECKING
2548 if (RTX_FLAG (x, used))
2550 error ("invalid rtl sharing found in the insn");
2552 error ("shared rtx");
2554 internal_error ("internal consistency failure");
2557 gcc_assert (!RTX_FLAG (x, used));
2559 RTX_FLAG (x, used) = 1;
2561 /* Now scan the subexpressions recursively. */
2563 format_ptr = GET_RTX_FORMAT (code);
2565 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2567 switch (*format_ptr++)
2570 verify_rtx_sharing (XEXP (x, i), insn);
2574 if (XVEC (x, i) != NULL)
2577 int len = XVECLEN (x, i);
2579 for (j = 0; j < len; j++)
2581 /* We allow sharing of ASM_OPERANDS inside single
2583 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2584 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2586 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2588 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2597 /* Go through all the RTL insn bodies and check that there is no unexpected
2598 sharing in between the subexpressions. */
2601 verify_rtl_sharing (void)
2605 timevar_push (TV_VERIFY_RTL_SHARING);
2607 for (p = get_insns (); p; p = NEXT_INSN (p))
2610 reset_used_flags (PATTERN (p));
2611 reset_used_flags (REG_NOTES (p));
2612 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2615 rtx q, sequence = PATTERN (p);
2617 for (i = 0; i < XVECLEN (sequence, 0); i++)
2619 q = XVECEXP (sequence, 0, i);
2620 gcc_assert (INSN_P (q));
2621 reset_used_flags (PATTERN (q));
2622 reset_used_flags (REG_NOTES (q));
2627 for (p = get_insns (); p; p = NEXT_INSN (p))
2630 verify_rtx_sharing (PATTERN (p), p);
2631 verify_rtx_sharing (REG_NOTES (p), p);
2634 timevar_pop (TV_VERIFY_RTL_SHARING);
2637 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2638 Assumes the mark bits are cleared at entry. */
2641 unshare_all_rtl_in_chain (rtx insn)
2643 for (; insn; insn = NEXT_INSN (insn))
2646 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2647 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2651 /* Go through all virtual stack slots of a function and mark them as
2652 shared. We never replace the DECL_RTLs themselves with a copy,
2653 but expressions mentioned into a DECL_RTL cannot be shared with
2654 expressions in the instruction stream.
2656 Note that reload may convert pseudo registers into memories in-place.
2657 Pseudo registers are always shared, but MEMs never are. Thus if we
2658 reset the used flags on MEMs in the instruction stream, we must set
2659 them again on MEMs that appear in DECL_RTLs. */
2662 set_used_decls (tree blk)
2667 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2668 if (DECL_RTL_SET_P (t))
2669 set_used_flags (DECL_RTL (t));
2671 /* Now process sub-blocks. */
2672 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2676 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2677 Recursively does the same for subexpressions. Uses
2678 copy_rtx_if_shared_1 to reduce stack space. */
2681 copy_rtx_if_shared (rtx orig)
2683 copy_rtx_if_shared_1 (&orig);
2687 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2688 use. Recursively does the same for subexpressions. */
2691 copy_rtx_if_shared_1 (rtx *orig1)
2697 const char *format_ptr;
2701 /* Repeat is used to turn tail-recursion into iteration. */
2708 code = GET_CODE (x);
2710 /* These types may be freely shared. */
2727 /* SCRATCH must be shared because they represent distinct values. */
2730 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2735 if (shared_const_p (x))
2745 /* The chain of insns is not being copied. */
2752 /* This rtx may not be shared. If it has already been seen,
2753 replace it with a copy of itself. */
2755 if (RTX_FLAG (x, used))
2757 x = shallow_copy_rtx (x);
2760 RTX_FLAG (x, used) = 1;
2762 /* Now scan the subexpressions recursively.
2763 We can store any replaced subexpressions directly into X
2764 since we know X is not shared! Any vectors in X
2765 must be copied if X was copied. */
2767 format_ptr = GET_RTX_FORMAT (code);
2768 length = GET_RTX_LENGTH (code);
2771 for (i = 0; i < length; i++)
2773 switch (*format_ptr++)
2777 copy_rtx_if_shared_1 (last_ptr);
2778 last_ptr = &XEXP (x, i);
2782 if (XVEC (x, i) != NULL)
2785 int len = XVECLEN (x, i);
2787 /* Copy the vector iff I copied the rtx and the length
2789 if (copied && len > 0)
2790 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2792 /* Call recursively on all inside the vector. */
2793 for (j = 0; j < len; j++)
2796 copy_rtx_if_shared_1 (last_ptr);
2797 last_ptr = &XVECEXP (x, i, j);
2812 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2815 mark_used_flags (rtx x, int flag)
2819 const char *format_ptr;
2822 /* Repeat is used to turn tail-recursion into iteration. */
2827 code = GET_CODE (x);
2829 /* These types may be freely shared so we needn't do any resetting
2854 /* The chain of insns is not being copied. */
2861 RTX_FLAG (x, used) = flag;
2863 format_ptr = GET_RTX_FORMAT (code);
2864 length = GET_RTX_LENGTH (code);
2866 for (i = 0; i < length; i++)
2868 switch (*format_ptr++)
2876 mark_used_flags (XEXP (x, i), flag);
2880 for (j = 0; j < XVECLEN (x, i); j++)
2881 mark_used_flags (XVECEXP (x, i, j), flag);
2887 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2888 to look for shared sub-parts. */
2891 reset_used_flags (rtx x)
2893 mark_used_flags (x, 0);
2896 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2897 to look for shared sub-parts. */
2900 set_used_flags (rtx x)
2902 mark_used_flags (x, 1);
2905 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2906 Return X or the rtx for the pseudo reg the value of X was copied into.
2907 OTHER must be valid as a SET_DEST. */
2910 make_safe_from (rtx x, rtx other)
2913 switch (GET_CODE (other))
2916 other = SUBREG_REG (other);
2918 case STRICT_LOW_PART:
2921 other = XEXP (other, 0);
2930 && GET_CODE (x) != SUBREG)
2932 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2933 || reg_mentioned_p (other, x))))
2935 rtx temp = gen_reg_rtx (GET_MODE (x));
2936 emit_move_insn (temp, x);
2942 /* Emission of insns (adding them to the doubly-linked list). */
2944 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2947 get_last_insn_anywhere (void)
2949 struct sequence_stack *stack;
2950 if (get_last_insn ())
2951 return get_last_insn ();
2952 for (stack = seq_stack; stack; stack = stack->next)
2953 if (stack->last != 0)
2958 /* Return the first nonnote insn emitted in current sequence or current
2959 function. This routine looks inside SEQUENCEs. */
2962 get_first_nonnote_insn (void)
2964 rtx insn = get_insns ();
2969 for (insn = next_insn (insn);
2970 insn && NOTE_P (insn);
2971 insn = next_insn (insn))
2975 if (NONJUMP_INSN_P (insn)
2976 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2977 insn = XVECEXP (PATTERN (insn), 0, 0);
2984 /* Return the last nonnote insn emitted in current sequence or current
2985 function. This routine looks inside SEQUENCEs. */
2988 get_last_nonnote_insn (void)
2990 rtx insn = get_last_insn ();
2995 for (insn = previous_insn (insn);
2996 insn && NOTE_P (insn);
2997 insn = previous_insn (insn))
3001 if (NONJUMP_INSN_P (insn)
3002 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3003 insn = XVECEXP (PATTERN (insn), 0,
3004 XVECLEN (PATTERN (insn), 0) - 1);
3011 /* Return the number of actual (non-debug) insns emitted in this
3015 get_max_insn_count (void)
3017 int n = cur_insn_uid;
3019 /* The table size must be stable across -g, to avoid codegen
3020 differences due to debug insns, and not be affected by
3021 -fmin-insn-uid, to avoid excessive table size and to simplify
3022 debugging of -fcompare-debug failures. */
3023 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3024 n -= cur_debug_insn_uid;
3026 n -= MIN_NONDEBUG_INSN_UID;
3032 /* Return the next insn. If it is a SEQUENCE, return the first insn
3036 next_insn (rtx insn)
3040 insn = NEXT_INSN (insn);
3041 if (insn && NONJUMP_INSN_P (insn)
3042 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3043 insn = XVECEXP (PATTERN (insn), 0, 0);
3049 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3053 previous_insn (rtx insn)
3057 insn = PREV_INSN (insn);
3058 if (insn && NONJUMP_INSN_P (insn)
3059 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3060 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3066 /* Return the next insn after INSN that is not a NOTE. This routine does not
3067 look inside SEQUENCEs. */
3070 next_nonnote_insn (rtx insn)
3074 insn = NEXT_INSN (insn);
3075 if (insn == 0 || !NOTE_P (insn))
3082 /* Return the next insn after INSN that is not a NOTE, but stop the
3083 search before we enter another basic block. This routine does not
3084 look inside SEQUENCEs. */
3087 next_nonnote_insn_bb (rtx insn)
3091 insn = NEXT_INSN (insn);
3092 if (insn == 0 || !NOTE_P (insn))
3094 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3101 /* Return the previous insn before INSN that is not a NOTE. This routine does
3102 not look inside SEQUENCEs. */
3105 prev_nonnote_insn (rtx insn)
3109 insn = PREV_INSN (insn);
3110 if (insn == 0 || !NOTE_P (insn))
3117 /* Return the previous insn before INSN that is not a NOTE, but stop
3118 the search before we enter another basic block. This routine does
3119 not look inside SEQUENCEs. */
3122 prev_nonnote_insn_bb (rtx insn)
3126 insn = PREV_INSN (insn);
3127 if (insn == 0 || !NOTE_P (insn))
3129 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3136 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3137 routine does not look inside SEQUENCEs. */
3140 next_nondebug_insn (rtx insn)
3144 insn = NEXT_INSN (insn);
3145 if (insn == 0 || !DEBUG_INSN_P (insn))
3152 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3153 This routine does not look inside SEQUENCEs. */
3156 prev_nondebug_insn (rtx insn)
3160 insn = PREV_INSN (insn);
3161 if (insn == 0 || !DEBUG_INSN_P (insn))
3168 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3169 This routine does not look inside SEQUENCEs. */
3172 next_nonnote_nondebug_insn (rtx insn)
3176 insn = NEXT_INSN (insn);
3177 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3184 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3185 This routine does not look inside SEQUENCEs. */
3188 prev_nonnote_nondebug_insn (rtx insn)
3192 insn = PREV_INSN (insn);
3193 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3200 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3201 or 0, if there is none. This routine does not look inside
3205 next_real_insn (rtx insn)
3209 insn = NEXT_INSN (insn);
3210 if (insn == 0 || INSN_P (insn))
3217 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3218 or 0, if there is none. This routine does not look inside
3222 prev_real_insn (rtx insn)
3226 insn = PREV_INSN (insn);
3227 if (insn == 0 || INSN_P (insn))
3234 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3235 This routine does not look inside SEQUENCEs. */
3238 last_call_insn (void)
3242 for (insn = get_last_insn ();
3243 insn && !CALL_P (insn);
3244 insn = PREV_INSN (insn))
3250 /* Find the next insn after INSN that really does something. This routine
3251 does not look inside SEQUENCEs. After reload this also skips over
3252 standalone USE and CLOBBER insn. */
3255 active_insn_p (const_rtx insn)
3257 return (CALL_P (insn) || JUMP_P (insn)
3258 || (NONJUMP_INSN_P (insn)
3259 && (! reload_completed
3260 || (GET_CODE (PATTERN (insn)) != USE
3261 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3265 next_active_insn (rtx insn)
3269 insn = NEXT_INSN (insn);
3270 if (insn == 0 || active_insn_p (insn))
3277 /* Find the last insn before INSN that really does something. This routine
3278 does not look inside SEQUENCEs. After reload this also skips over
3279 standalone USE and CLOBBER insn. */
3282 prev_active_insn (rtx insn)
3286 insn = PREV_INSN (insn);
3287 if (insn == 0 || active_insn_p (insn))
3294 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3297 next_label (rtx insn)
3301 insn = NEXT_INSN (insn);
3302 if (insn == 0 || LABEL_P (insn))
3309 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3312 prev_label (rtx insn)
3316 insn = PREV_INSN (insn);
3317 if (insn == 0 || LABEL_P (insn))
3324 /* Return the last label to mark the same position as LABEL. Return null
3325 if LABEL itself is null. */
3328 skip_consecutive_labels (rtx label)
3332 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3340 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3341 and REG_CC_USER notes so we can find it. */
3344 link_cc0_insns (rtx insn)
3346 rtx user = next_nonnote_insn (insn);
3348 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3349 user = XVECEXP (PATTERN (user), 0, 0);
3351 add_reg_note (user, REG_CC_SETTER, insn);
3352 add_reg_note (insn, REG_CC_USER, user);
3355 /* Return the next insn that uses CC0 after INSN, which is assumed to
3356 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3357 applied to the result of this function should yield INSN).
3359 Normally, this is simply the next insn. However, if a REG_CC_USER note
3360 is present, it contains the insn that uses CC0.
3362 Return 0 if we can't find the insn. */
3365 next_cc0_user (rtx insn)
3367 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3370 return XEXP (note, 0);
3372 insn = next_nonnote_insn (insn);
3373 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3374 insn = XVECEXP (PATTERN (insn), 0, 0);
3376 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3382 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3383 note, it is the previous insn. */
3386 prev_cc0_setter (rtx insn)
3388 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3391 return XEXP (note, 0);
3393 insn = prev_nonnote_insn (insn);
3394 gcc_assert (sets_cc0_p (PATTERN (insn)));
3401 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3404 find_auto_inc (rtx *xp, void *data)
3407 rtx reg = (rtx) data;
3409 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3412 switch (GET_CODE (x))
3420 if (rtx_equal_p (reg, XEXP (x, 0)))
3431 /* Increment the label uses for all labels present in rtx. */
3434 mark_label_nuses (rtx x)
3440 code = GET_CODE (x);
3441 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3442 LABEL_NUSES (XEXP (x, 0))++;
3444 fmt = GET_RTX_FORMAT (code);
3445 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3448 mark_label_nuses (XEXP (x, i));
3449 else if (fmt[i] == 'E')
3450 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3451 mark_label_nuses (XVECEXP (x, i, j));
3456 /* Try splitting insns that can be split for better scheduling.
3457 PAT is the pattern which might split.
3458 TRIAL is the insn providing PAT.
3459 LAST is nonzero if we should return the last insn of the sequence produced.
3461 If this routine succeeds in splitting, it returns the first or last
3462 replacement insn depending on the value of LAST. Otherwise, it
3463 returns TRIAL. If the insn to be returned can be split, it will be. */
3466 try_split (rtx pat, rtx trial, int last)
3468 rtx before = PREV_INSN (trial);
3469 rtx after = NEXT_INSN (trial);
3470 int has_barrier = 0;
3473 rtx insn_last, insn;
3476 /* We're not good at redistributing frame information. */
3477 if (RTX_FRAME_RELATED_P (trial))
3480 if (any_condjump_p (trial)
3481 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3482 split_branch_probability = INTVAL (XEXP (note, 0));
3483 probability = split_branch_probability;
3485 seq = split_insns (pat, trial);
3487 split_branch_probability = -1;
3489 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3490 We may need to handle this specially. */
3491 if (after && BARRIER_P (after))
3494 after = NEXT_INSN (after);
3500 /* Avoid infinite loop if any insn of the result matches
3501 the original pattern. */
3505 if (INSN_P (insn_last)
3506 && rtx_equal_p (PATTERN (insn_last), pat))
3508 if (!NEXT_INSN (insn_last))
3510 insn_last = NEXT_INSN (insn_last);
3513 /* We will be adding the new sequence to the function. The splitters
3514 may have introduced invalid RTL sharing, so unshare the sequence now. */
3515 unshare_all_rtl_in_chain (seq);
3518 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3522 mark_jump_label (PATTERN (insn), insn, 0);
3524 if (probability != -1
3525 && any_condjump_p (insn)
3526 && !find_reg_note (insn, REG_BR_PROB, 0))
3528 /* We can preserve the REG_BR_PROB notes only if exactly
3529 one jump is created, otherwise the machine description
3530 is responsible for this step using
3531 split_branch_probability variable. */
3532 gcc_assert (njumps == 1);
3533 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3538 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3539 in SEQ and copy any additional information across. */
3542 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3547 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3548 target may have explicitly specified. */
3549 p = &CALL_INSN_FUNCTION_USAGE (insn);
3552 *p = CALL_INSN_FUNCTION_USAGE (trial);
3554 /* If the old call was a sibling call, the new one must
3556 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3558 /* If the new call is the last instruction in the sequence,
3559 it will effectively replace the old call in-situ. Otherwise
3560 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3561 so that it comes immediately after the new call. */
3562 if (NEXT_INSN (insn))
3563 for (next = NEXT_INSN (trial);
3564 next && NOTE_P (next);
3565 next = NEXT_INSN (next))
3566 if (NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
3569 add_insn_after (next, insn, NULL);
3575 /* Copy notes, particularly those related to the CFG. */
3576 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3578 switch (REG_NOTE_KIND (note))
3581 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3586 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3589 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3593 case REG_NON_LOCAL_GOTO:
3594 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3597 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3603 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3605 rtx reg = XEXP (note, 0);
3606 if (!FIND_REG_INC_NOTE (insn, reg)
3607 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3608 add_reg_note (insn, REG_INC, reg);
3618 /* If there are LABELS inside the split insns increment the
3619 usage count so we don't delete the label. */
3623 while (insn != NULL_RTX)
3625 /* JUMP_P insns have already been "marked" above. */
3626 if (NONJUMP_INSN_P (insn))
3627 mark_label_nuses (PATTERN (insn));
3629 insn = PREV_INSN (insn);
3633 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3635 delete_insn (trial);
3637 emit_barrier_after (tem);
3639 /* Recursively call try_split for each new insn created; by the
3640 time control returns here that insn will be fully split, so
3641 set LAST and continue from the insn after the one returned.
3642 We can't use next_active_insn here since AFTER may be a note.
3643 Ignore deleted insns, which can be occur if not optimizing. */
3644 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3645 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3646 tem = try_split (PATTERN (tem), tem, 1);
3648 /* Return either the first or the last insn, depending on which was
3651 ? (after ? PREV_INSN (after) : get_last_insn ())
3652 : NEXT_INSN (before);
3655 /* Make and return an INSN rtx, initializing all its slots.
3656 Store PATTERN in the pattern slots. */
3659 make_insn_raw (rtx pattern)
3663 insn = rtx_alloc (INSN);
3665 INSN_UID (insn) = cur_insn_uid++;
3666 PATTERN (insn) = pattern;
3667 INSN_CODE (insn) = -1;
3668 REG_NOTES (insn) = NULL;
3669 INSN_LOCATOR (insn) = curr_insn_locator ();
3670 BLOCK_FOR_INSN (insn) = NULL;
3672 #ifdef ENABLE_RTL_CHECKING
3675 && (returnjump_p (insn)
3676 || (GET_CODE (insn) == SET
3677 && SET_DEST (insn) == pc_rtx)))
3679 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3687 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3690 make_debug_insn_raw (rtx pattern)
3694 insn = rtx_alloc (DEBUG_INSN);
3695 INSN_UID (insn) = cur_debug_insn_uid++;
3696 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3697 INSN_UID (insn) = cur_insn_uid++;
3699 PATTERN (insn) = pattern;
3700 INSN_CODE (insn) = -1;
3701 REG_NOTES (insn) = NULL;
3702 INSN_LOCATOR (insn) = curr_insn_locator ();
3703 BLOCK_FOR_INSN (insn) = NULL;
3708 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3711 make_jump_insn_raw (rtx pattern)
3715 insn = rtx_alloc (JUMP_INSN);
3716 INSN_UID (insn) = cur_insn_uid++;
3718 PATTERN (insn) = pattern;
3719 INSN_CODE (insn) = -1;
3720 REG_NOTES (insn) = NULL;
3721 JUMP_LABEL (insn) = NULL;
3722 INSN_LOCATOR (insn) = curr_insn_locator ();
3723 BLOCK_FOR_INSN (insn) = NULL;
3728 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3731 make_call_insn_raw (rtx pattern)
3735 insn = rtx_alloc (CALL_INSN);
3736 INSN_UID (insn) = cur_insn_uid++;
3738 PATTERN (insn) = pattern;
3739 INSN_CODE (insn) = -1;
3740 REG_NOTES (insn) = NULL;
3741 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3742 INSN_LOCATOR (insn) = curr_insn_locator ();
3743 BLOCK_FOR_INSN (insn) = NULL;
3748 /* Add INSN to the end of the doubly-linked list.
3749 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3754 PREV_INSN (insn) = get_last_insn();
3755 NEXT_INSN (insn) = 0;
3757 if (NULL != get_last_insn())
3758 NEXT_INSN (get_last_insn ()) = insn;
3760 if (NULL == get_insns ())
3761 set_first_insn (insn);
3763 set_last_insn (insn);
3766 /* Add INSN into the doubly-linked list after insn AFTER. This and
3767 the next should be the only functions called to insert an insn once
3768 delay slots have been filled since only they know how to update a
3772 add_insn_after (rtx insn, rtx after, basic_block bb)
3774 rtx next = NEXT_INSN (after);
3776 gcc_assert (!optimize || !INSN_DELETED_P (after));
3778 NEXT_INSN (insn) = next;
3779 PREV_INSN (insn) = after;
3783 PREV_INSN (next) = insn;
3784 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3785 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3787 else if (get_last_insn () == after)
3788 set_last_insn (insn);
3791 struct sequence_stack *stack = seq_stack;
3792 /* Scan all pending sequences too. */
3793 for (; stack; stack = stack->next)
3794 if (after == stack->last)
3803 if (!BARRIER_P (after)
3804 && !BARRIER_P (insn)
3805 && (bb = BLOCK_FOR_INSN (after)))
3807 set_block_for_insn (insn, bb);
3809 df_insn_rescan (insn);
3810 /* Should not happen as first in the BB is always
3811 either NOTE or LABEL. */
3812 if (BB_END (bb) == after
3813 /* Avoid clobbering of structure when creating new BB. */
3814 && !BARRIER_P (insn)
3815 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3819 NEXT_INSN (after) = insn;
3820 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3822 rtx sequence = PATTERN (after);
3823 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3827 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3828 the previous should be the only functions called to insert an insn
3829 once delay slots have been filled since only they know how to
3830 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3834 add_insn_before (rtx insn, rtx before, basic_block bb)
3836 rtx prev = PREV_INSN (before);
3838 gcc_assert (!optimize || !INSN_DELETED_P (before));
3840 PREV_INSN (insn) = prev;
3841 NEXT_INSN (insn) = before;
3845 NEXT_INSN (prev) = insn;
3846 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3848 rtx sequence = PATTERN (prev);
3849 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3852 else if (get_insns () == before)
3853 set_first_insn (insn);
3856 struct sequence_stack *stack = seq_stack;
3857 /* Scan all pending sequences too. */
3858 for (; stack; stack = stack->next)
3859 if (before == stack->first)
3861 stack->first = insn;
3869 && !BARRIER_P (before)
3870 && !BARRIER_P (insn))
3871 bb = BLOCK_FOR_INSN (before);
3875 set_block_for_insn (insn, bb);
3877 df_insn_rescan (insn);
3878 /* Should not happen as first in the BB is always either NOTE or
3880 gcc_assert (BB_HEAD (bb) != insn
3881 /* Avoid clobbering of structure when creating new BB. */
3883 || NOTE_INSN_BASIC_BLOCK_P (insn));
3886 PREV_INSN (before) = insn;
3887 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3888 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3892 /* Replace insn with an deleted instruction note. */
3895 set_insn_deleted (rtx insn)
3897 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3898 PUT_CODE (insn, NOTE);
3899 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3903 /* Remove an insn from its doubly-linked list. This function knows how
3904 to handle sequences. */
3906 remove_insn (rtx insn)
3908 rtx next = NEXT_INSN (insn);
3909 rtx prev = PREV_INSN (insn);
3912 /* Later in the code, the block will be marked dirty. */
3913 df_insn_delete (NULL, INSN_UID (insn));
3917 NEXT_INSN (prev) = next;
3918 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3920 rtx sequence = PATTERN (prev);
3921 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3924 else if (get_insns () == insn)
3927 PREV_INSN (next) = NULL;
3928 set_first_insn (next);
3932 struct sequence_stack *stack = seq_stack;
3933 /* Scan all pending sequences too. */
3934 for (; stack; stack = stack->next)
3935 if (insn == stack->first)
3937 stack->first = next;
3946 PREV_INSN (next) = prev;
3947 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3948 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3950 else if (get_last_insn () == insn)
3951 set_last_insn (prev);
3954 struct sequence_stack *stack = seq_stack;
3955 /* Scan all pending sequences too. */
3956 for (; stack; stack = stack->next)
3957 if (insn == stack->last)
3965 if (!BARRIER_P (insn)
3966 && (bb = BLOCK_FOR_INSN (insn)))
3968 if (NONDEBUG_INSN_P (insn))
3969 df_set_bb_dirty (bb);
3970 if (BB_HEAD (bb) == insn)
3972 /* Never ever delete the basic block note without deleting whole
3974 gcc_assert (!NOTE_P (insn));
3975 BB_HEAD (bb) = next;
3977 if (BB_END (bb) == insn)
3982 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3985 add_function_usage_to (rtx call_insn, rtx call_fusage)
3987 gcc_assert (call_insn && CALL_P (call_insn));
3989 /* Put the register usage information on the CALL. If there is already
3990 some usage information, put ours at the end. */
3991 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3995 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3996 link = XEXP (link, 1))
3999 XEXP (link, 1) = call_fusage;
4002 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4005 /* Delete all insns made since FROM.
4006 FROM becomes the new last instruction. */
4009 delete_insns_since (rtx from)
4014 NEXT_INSN (from) = 0;
4015 set_last_insn (from);
4018 /* This function is deprecated, please use sequences instead.
4020 Move a consecutive bunch of insns to a different place in the chain.
4021 The insns to be moved are those between FROM and TO.
4022 They are moved to a new position after the insn AFTER.
4023 AFTER must not be FROM or TO or any insn in between.
4025 This function does not know about SEQUENCEs and hence should not be
4026 called after delay-slot filling has been done. */
4029 reorder_insns_nobb (rtx from, rtx to, rtx after)
4031 #ifdef ENABLE_CHECKING
4033 for (x = from; x != to; x = NEXT_INSN (x))
4034 gcc_assert (after != x);
4035 gcc_assert (after != to);
4038 /* Splice this bunch out of where it is now. */
4039 if (PREV_INSN (from))
4040 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4042 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4043 if (get_last_insn () == to)
4044 set_last_insn (PREV_INSN (from));
4045 if (get_insns () == from)
4046 set_first_insn (NEXT_INSN (to));
4048 /* Make the new neighbors point to it and it to them. */
4049 if (NEXT_INSN (after))
4050 PREV_INSN (NEXT_INSN (after)) = to;
4052 NEXT_INSN (to) = NEXT_INSN (after);
4053 PREV_INSN (from) = after;
4054 NEXT_INSN (after) = from;
4055 if (after == get_last_insn())
4059 /* Same as function above, but take care to update BB boundaries. */
4061 reorder_insns (rtx from, rtx to, rtx after)
4063 rtx prev = PREV_INSN (from);
4064 basic_block bb, bb2;
4066 reorder_insns_nobb (from, to, after);
4068 if (!BARRIER_P (after)
4069 && (bb = BLOCK_FOR_INSN (after)))
4072 df_set_bb_dirty (bb);
4074 if (!BARRIER_P (from)
4075 && (bb2 = BLOCK_FOR_INSN (from)))
4077 if (BB_END (bb2) == to)
4078 BB_END (bb2) = prev;
4079 df_set_bb_dirty (bb2);
4082 if (BB_END (bb) == after)
4085 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4087 df_insn_change_bb (x, bb);
4092 /* Emit insn(s) of given code and pattern
4093 at a specified place within the doubly-linked list.
4095 All of the emit_foo global entry points accept an object
4096 X which is either an insn list or a PATTERN of a single
4099 There are thus a few canonical ways to generate code and
4100 emit it at a specific place in the instruction stream. For
4101 example, consider the instruction named SPOT and the fact that
4102 we would like to emit some instructions before SPOT. We might
4106 ... emit the new instructions ...
4107 insns_head = get_insns ();
4110 emit_insn_before (insns_head, SPOT);
4112 It used to be common to generate SEQUENCE rtl instead, but that
4113 is a relic of the past which no longer occurs. The reason is that
4114 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4115 generated would almost certainly die right after it was created. */
4118 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
4119 rtx (*make_raw) (rtx))
4123 gcc_assert (before);
4128 switch (GET_CODE (x))
4140 rtx next = NEXT_INSN (insn);
4141 add_insn_before (insn, before, bb);
4147 #ifdef ENABLE_RTL_CHECKING
4154 last = (*make_raw) (x);
4155 add_insn_before (last, before, bb);
4162 /* Make X be output before the instruction BEFORE. */
4165 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4167 return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4170 /* Make an instruction with body X and code JUMP_INSN
4171 and output it before the instruction BEFORE. */
4174 emit_jump_insn_before_noloc (rtx x, rtx before)
4176 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4177 make_jump_insn_raw);
4180 /* Make an instruction with body X and code CALL_INSN
4181 and output it before the instruction BEFORE. */
4184 emit_call_insn_before_noloc (rtx x, rtx before)
4186 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4187 make_call_insn_raw);
4190 /* Make an instruction with body X and code DEBUG_INSN
4191 and output it before the instruction BEFORE. */
4194 emit_debug_insn_before_noloc (rtx x, rtx before)
4196 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4197 make_debug_insn_raw);
4200 /* Make an insn of code BARRIER
4201 and output it before the insn BEFORE. */
4204 emit_barrier_before (rtx before)
4206 rtx insn = rtx_alloc (BARRIER);
4208 INSN_UID (insn) = cur_insn_uid++;
4210 add_insn_before (insn, before, NULL);
4214 /* Emit the label LABEL before the insn BEFORE. */
4217 emit_label_before (rtx label, rtx before)
4219 /* This can be called twice for the same label as a result of the
4220 confusion that follows a syntax error! So make it harmless. */
4221 if (INSN_UID (label) == 0)
4223 INSN_UID (label) = cur_insn_uid++;
4224 add_insn_before (label, before, NULL);
4230 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4233 emit_note_before (enum insn_note subtype, rtx before)
4235 rtx note = rtx_alloc (NOTE);
4236 INSN_UID (note) = cur_insn_uid++;
4237 NOTE_KIND (note) = subtype;
4238 BLOCK_FOR_INSN (note) = NULL;
4239 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4241 add_insn_before (note, before, NULL);
4245 /* Helper for emit_insn_after, handles lists of instructions
4249 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4253 if (!bb && !BARRIER_P (after))
4254 bb = BLOCK_FOR_INSN (after);
4258 df_set_bb_dirty (bb);
4259 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4260 if (!BARRIER_P (last))
4262 set_block_for_insn (last, bb);
4263 df_insn_rescan (last);
4265 if (!BARRIER_P (last))
4267 set_block_for_insn (last, bb);
4268 df_insn_rescan (last);
4270 if (BB_END (bb) == after)
4274 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4277 after_after = NEXT_INSN (after);
4279 NEXT_INSN (after) = first;
4280 PREV_INSN (first) = after;
4281 NEXT_INSN (last) = after_after;
4283 PREV_INSN (after_after) = last;
4285 if (after == get_last_insn())
4286 set_last_insn (last);
4292 emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
4293 rtx (*make_raw)(rtx))
4302 switch (GET_CODE (x))
4311 last = emit_insn_after_1 (x, after, bb);
4314 #ifdef ENABLE_RTL_CHECKING
4321 last = (*make_raw) (x);
4322 add_insn_after (last, after, bb);
4329 /* Make X be output after the insn AFTER and set the BB of insn. If
4330 BB is NULL, an attempt is made to infer the BB from AFTER. */
4333 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4335 return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4339 /* Make an insn of code JUMP_INSN with body X
4340 and output it after the insn AFTER. */
4343 emit_jump_insn_after_noloc (rtx x, rtx after)
4345 return emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw);
4348 /* Make an instruction with body X and code CALL_INSN
4349 and output it after the instruction AFTER. */
4352 emit_call_insn_after_noloc (rtx x, rtx after)
4354 return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4357 /* Make an instruction with body X and code CALL_INSN
4358 and output it after the instruction AFTER. */
4361 emit_debug_insn_after_noloc (rtx x, rtx after)
4363 return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4366 /* Make an insn of code BARRIER
4367 and output it after the insn AFTER. */
4370 emit_barrier_after (rtx after)
4372 rtx insn = rtx_alloc (BARRIER);
4374 INSN_UID (insn) = cur_insn_uid++;
4376 add_insn_after (insn, after, NULL);
4380 /* Emit the label LABEL after the insn AFTER. */
4383 emit_label_after (rtx label, rtx after)
4385 /* This can be called twice for the same label
4386 as a result of the confusion that follows a syntax error!
4387 So make it harmless. */
4388 if (INSN_UID (label) == 0)
4390 INSN_UID (label) = cur_insn_uid++;
4391 add_insn_after (label, after, NULL);
4397 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4400 emit_note_after (enum insn_note subtype, rtx after)
4402 rtx note = rtx_alloc (NOTE);
4403 INSN_UID (note) = cur_insn_uid++;
4404 NOTE_KIND (note) = subtype;
4405 BLOCK_FOR_INSN (note) = NULL;
4406 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4407 add_insn_after (note, after, NULL);
4411 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4412 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4415 emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
4416 rtx (*make_raw) (rtx))
4418 rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4420 if (pattern == NULL_RTX || !loc)
4423 after = NEXT_INSN (after);
4426 if (active_insn_p (after) && !INSN_LOCATOR (after))
4427 INSN_LOCATOR (after) = loc;
4430 after = NEXT_INSN (after);
4435 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4436 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4440 emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
4441 rtx (*make_raw) (rtx))
4445 if (skip_debug_insns)
4446 while (DEBUG_INSN_P (prev))
4447 prev = PREV_INSN (prev);
4450 return emit_pattern_after_setloc (pattern, after, INSN_LOCATOR (prev),
4453 return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4456 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4458 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4460 return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
4463 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4465 emit_insn_after (rtx pattern, rtx after)
4467 return emit_pattern_after (pattern, after, true, make_insn_raw);
4470 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4472 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4474 return emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw);
4477 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4479 emit_jump_insn_after (rtx pattern, rtx after)
4481 return emit_pattern_after (pattern, after, true, make_jump_insn_raw);
4484 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4486 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4488 return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
4491 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4493 emit_call_insn_after (rtx pattern, rtx after)
4495 return emit_pattern_after (pattern, after, true, make_call_insn_raw);
4498 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4500 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4502 return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
4505 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4507 emit_debug_insn_after (rtx pattern, rtx after)
4509 return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
4512 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4513 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4514 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4518 emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
4519 rtx (*make_raw) (rtx))
4521 rtx first = PREV_INSN (before);
4522 rtx last = emit_pattern_before_noloc (pattern, before,
4523 insnp ? before : NULL_RTX,
4526 if (pattern == NULL_RTX || !loc)
4530 first = get_insns ();
4532 first = NEXT_INSN (first);
4535 if (active_insn_p (first) && !INSN_LOCATOR (first))
4536 INSN_LOCATOR (first) = loc;
4539 first = NEXT_INSN (first);
4544 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4545 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4546 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4547 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4550 emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
4551 bool insnp, rtx (*make_raw) (rtx))
4555 if (skip_debug_insns)
4556 while (DEBUG_INSN_P (next))
4557 next = PREV_INSN (next);
4560 return emit_pattern_before_setloc (pattern, before, INSN_LOCATOR (next),
4563 return emit_pattern_before_noloc (pattern, before,
4564 insnp ? before : NULL_RTX,
4568 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4570 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4572 return emit_pattern_before_setloc (pattern, before, loc, true,
4576 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4578 emit_insn_before (rtx pattern, rtx before)
4580 return emit_pattern_before (pattern, before, true, true, make_insn_raw);
4583 /* like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4585 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4587 return emit_pattern_before_setloc (pattern, before, loc, false,
4588 make_jump_insn_raw);
4591 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4593 emit_jump_insn_before (rtx pattern, rtx before)
4595 return emit_pattern_before (pattern, before, true, false,
4596 make_jump_insn_raw);
4599 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4601 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4603 return emit_pattern_before_setloc (pattern, before, loc, false,
4604 make_call_insn_raw);
4607 /* Like emit_call_insn_before_noloc,
4608 but set insn_locator according to BEFORE. */
4610 emit_call_insn_before (rtx pattern, rtx before)
4612 return emit_pattern_before (pattern, before, true, false,
4613 make_call_insn_raw);
4616 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4618 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4620 return emit_pattern_before_setloc (pattern, before, loc, false,
4621 make_debug_insn_raw);
4624 /* Like emit_debug_insn_before_noloc,
4625 but set insn_locator according to BEFORE. */
4627 emit_debug_insn_before (rtx pattern, rtx before)
4629 return emit_pattern_before (pattern, before, false, false,
4630 make_debug_insn_raw);
4633 /* Take X and emit it at the end of the doubly-linked
4636 Returns the last insn emitted. */
4641 rtx last = get_last_insn();
4647 switch (GET_CODE (x))
4659 rtx next = NEXT_INSN (insn);
4666 #ifdef ENABLE_RTL_CHECKING
4673 last = make_insn_raw (x);
4681 /* Make an insn of code DEBUG_INSN with pattern X
4682 and add it to the end of the doubly-linked list. */
4685 emit_debug_insn (rtx x)
4687 rtx last = get_last_insn();
4693 switch (GET_CODE (x))
4705 rtx next = NEXT_INSN (insn);
4712 #ifdef ENABLE_RTL_CHECKING
4719 last = make_debug_insn_raw (x);
4727 /* Make an insn of code JUMP_INSN with pattern X
4728 and add it to the end of the doubly-linked list. */
4731 emit_jump_insn (rtx x)
4733 rtx last = NULL_RTX, insn;
4735 switch (GET_CODE (x))
4747 rtx next = NEXT_INSN (insn);
4754 #ifdef ENABLE_RTL_CHECKING
4761 last = make_jump_insn_raw (x);
4769 /* Make an insn of code CALL_INSN with pattern X
4770 and add it to the end of the doubly-linked list. */
4773 emit_call_insn (rtx x)
4777 switch (GET_CODE (x))
4786 insn = emit_insn (x);
4789 #ifdef ENABLE_RTL_CHECKING
4796 insn = make_call_insn_raw (x);
4804 /* Add the label LABEL to the end of the doubly-linked list. */
4807 emit_label (rtx label)
4809 /* This can be called twice for the same label
4810 as a result of the confusion that follows a syntax error!
4811 So make it harmless. */
4812 if (INSN_UID (label) == 0)
4814 INSN_UID (label) = cur_insn_uid++;
4820 /* Make an insn of code BARRIER
4821 and add it to the end of the doubly-linked list. */
4826 rtx barrier = rtx_alloc (BARRIER);
4827 INSN_UID (barrier) = cur_insn_uid++;
4832 /* Emit a copy of note ORIG. */
4835 emit_note_copy (rtx orig)
4839 note = rtx_alloc (NOTE);
4841 INSN_UID (note) = cur_insn_uid++;
4842 NOTE_DATA (note) = NOTE_DATA (orig);
4843 NOTE_KIND (note) = NOTE_KIND (orig);
4844 BLOCK_FOR_INSN (note) = NULL;
4850 /* Make an insn of code NOTE or type NOTE_NO
4851 and add it to the end of the doubly-linked list. */
4854 emit_note (enum insn_note kind)
4858 note = rtx_alloc (NOTE);
4859 INSN_UID (note) = cur_insn_uid++;
4860 NOTE_KIND (note) = kind;
4861 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4862 BLOCK_FOR_INSN (note) = NULL;
4867 /* Emit a clobber of lvalue X. */
4870 emit_clobber (rtx x)
4872 /* CONCATs should not appear in the insn stream. */
4873 if (GET_CODE (x) == CONCAT)
4875 emit_clobber (XEXP (x, 0));
4876 return emit_clobber (XEXP (x, 1));
4878 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4881 /* Return a sequence of insns to clobber lvalue X. */
4895 /* Emit a use of rvalue X. */
4900 /* CONCATs should not appear in the insn stream. */
4901 if (GET_CODE (x) == CONCAT)
4903 emit_use (XEXP (x, 0));
4904 return emit_use (XEXP (x, 1));
4906 return emit_insn (gen_rtx_USE (VOIDmode, x));
4909 /* Return a sequence of insns to use rvalue X. */
4923 /* Cause next statement to emit a line note even if the line number
4927 force_next_line_note (void)
4932 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4933 note of this type already exists, remove it first. */
4936 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4938 rtx note = find_reg_note (insn, kind, NULL_RTX);
4944 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4945 has multiple sets (some callers assume single_set
4946 means the insn only has one set, when in fact it
4947 means the insn only has one * useful * set). */
4948 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4954 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4955 It serves no useful purpose and breaks eliminate_regs. */
4956 if (GET_CODE (datum) == ASM_OPERANDS)
4961 XEXP (note, 0) = datum;
4962 df_notes_rescan (insn);
4970 XEXP (note, 0) = datum;
4976 add_reg_note (insn, kind, datum);
4982 df_notes_rescan (insn);
4988 return REG_NOTES (insn);
4991 /* Return an indication of which type of insn should have X as a body.
4992 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4994 static enum rtx_code
4995 classify_insn (rtx x)
4999 if (GET_CODE (x) == CALL)
5001 if (GET_CODE (x) == RETURN)
5003 if (GET_CODE (x) == SET)
5005 if (SET_DEST (x) == pc_rtx)
5007 else if (GET_CODE (SET_SRC (x)) == CALL)
5012 if (GET_CODE (x) == PARALLEL)
5015 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5016 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5018 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5019 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5021 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5022 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5028 /* Emit the rtl pattern X as an appropriate kind of insn.
5029 If X is a label, it is simply added into the insn chain. */
5034 enum rtx_code code = classify_insn (x);
5039 return emit_label (x);
5041 return emit_insn (x);
5044 rtx insn = emit_jump_insn (x);
5045 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5046 return emit_barrier ();
5050 return emit_call_insn (x);
5052 return emit_debug_insn (x);
5058 /* Space for free sequence stack entries. */
5059 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5061 /* Begin emitting insns to a sequence. If this sequence will contain
5062 something that might cause the compiler to pop arguments to function
5063 calls (because those pops have previously been deferred; see
5064 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5065 before calling this function. That will ensure that the deferred
5066 pops are not accidentally emitted in the middle of this sequence. */
5069 start_sequence (void)
5071 struct sequence_stack *tem;
5073 if (free_sequence_stack != NULL)
5075 tem = free_sequence_stack;
5076 free_sequence_stack = tem->next;
5079 tem = ggc_alloc_sequence_stack ();
5081 tem->next = seq_stack;
5082 tem->first = get_insns ();
5083 tem->last = get_last_insn ();
5091 /* Set up the insn chain starting with FIRST as the current sequence,
5092 saving the previously current one. See the documentation for
5093 start_sequence for more information about how to use this function. */
5096 push_to_sequence (rtx first)
5102 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5105 set_first_insn (first);
5106 set_last_insn (last);
5109 /* Like push_to_sequence, but take the last insn as an argument to avoid
5110 looping through the list. */
5113 push_to_sequence2 (rtx first, rtx last)
5117 set_first_insn (first);
5118 set_last_insn (last);
5121 /* Set up the outer-level insn chain
5122 as the current sequence, saving the previously current one. */
5125 push_topmost_sequence (void)
5127 struct sequence_stack *stack, *top = NULL;
5131 for (stack = seq_stack; stack; stack = stack->next)
5134 set_first_insn (top->first);
5135 set_last_insn (top->last);
5138 /* After emitting to the outer-level insn chain, update the outer-level
5139 insn chain, and restore the previous saved state. */
5142 pop_topmost_sequence (void)
5144 struct sequence_stack *stack, *top = NULL;
5146 for (stack = seq_stack; stack; stack = stack->next)
5149 top->first = get_insns ();
5150 top->last = get_last_insn ();
5155 /* After emitting to a sequence, restore previous saved state.
5157 To get the contents of the sequence just made, you must call
5158 `get_insns' *before* calling here.
5160 If the compiler might have deferred popping arguments while
5161 generating this sequence, and this sequence will not be immediately
5162 inserted into the instruction stream, use do_pending_stack_adjust
5163 before calling get_insns. That will ensure that the deferred
5164 pops are inserted into this sequence, and not into some random
5165 location in the instruction stream. See INHIBIT_DEFER_POP for more
5166 information about deferred popping of arguments. */
5171 struct sequence_stack *tem = seq_stack;
5173 set_first_insn (tem->first);
5174 set_last_insn (tem->last);
5175 seq_stack = tem->next;
5177 memset (tem, 0, sizeof (*tem));
5178 tem->next = free_sequence_stack;
5179 free_sequence_stack = tem;
5182 /* Return 1 if currently emitting into a sequence. */
5185 in_sequence_p (void)
5187 return seq_stack != 0;
5190 /* Put the various virtual registers into REGNO_REG_RTX. */
5193 init_virtual_regs (void)
5195 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5196 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5197 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5198 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5199 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5200 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5201 = virtual_preferred_stack_boundary_rtx;
5205 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5206 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5207 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5208 static int copy_insn_n_scratches;
5210 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5211 copied an ASM_OPERANDS.
5212 In that case, it is the original input-operand vector. */
5213 static rtvec orig_asm_operands_vector;
5215 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5216 copied an ASM_OPERANDS.
5217 In that case, it is the copied input-operand vector. */
5218 static rtvec copy_asm_operands_vector;
5220 /* Likewise for the constraints vector. */
5221 static rtvec orig_asm_constraints_vector;
5222 static rtvec copy_asm_constraints_vector;
5224 /* Recursively create a new copy of an rtx for copy_insn.
5225 This function differs from copy_rtx in that it handles SCRATCHes and
5226 ASM_OPERANDs properly.
5227 Normally, this function is not used directly; use copy_insn as front end.
5228 However, you could first copy an insn pattern with copy_insn and then use
5229 this function afterwards to properly copy any REG_NOTEs containing
5233 copy_insn_1 (rtx orig)
5238 const char *format_ptr;
5243 code = GET_CODE (orig);
5258 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5263 for (i = 0; i < copy_insn_n_scratches; i++)
5264 if (copy_insn_scratch_in[i] == orig)
5265 return copy_insn_scratch_out[i];
5269 if (shared_const_p (orig))
5273 /* A MEM with a constant address is not sharable. The problem is that
5274 the constant address may need to be reloaded. If the mem is shared,
5275 then reloading one copy of this mem will cause all copies to appear
5276 to have been reloaded. */
5282 /* Copy the various flags, fields, and other information. We assume
5283 that all fields need copying, and then clear the fields that should
5284 not be copied. That is the sensible default behavior, and forces
5285 us to explicitly document why we are *not* copying a flag. */
5286 copy = shallow_copy_rtx (orig);
5288 /* We do not copy the USED flag, which is used as a mark bit during
5289 walks over the RTL. */
5290 RTX_FLAG (copy, used) = 0;
5292 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5295 RTX_FLAG (copy, jump) = 0;
5296 RTX_FLAG (copy, call) = 0;
5297 RTX_FLAG (copy, frame_related) = 0;
5300 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5302 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5303 switch (*format_ptr++)
5306 if (XEXP (orig, i) != NULL)
5307 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5312 if (XVEC (orig, i) == orig_asm_constraints_vector)
5313 XVEC (copy, i) = copy_asm_constraints_vector;
5314 else if (XVEC (orig, i) == orig_asm_operands_vector)
5315 XVEC (copy, i) = copy_asm_operands_vector;
5316 else if (XVEC (orig, i) != NULL)
5318 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5319 for (j = 0; j < XVECLEN (copy, i); j++)
5320 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5331 /* These are left unchanged. */
5338 if (code == SCRATCH)
5340 i = copy_insn_n_scratches++;
5341 gcc_assert (i < MAX_RECOG_OPERANDS);
5342 copy_insn_scratch_in[i] = orig;
5343 copy_insn_scratch_out[i] = copy;
5345 else if (code == ASM_OPERANDS)
5347 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5348 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5349 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5350 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5356 /* Create a new copy of an rtx.
5357 This function differs from copy_rtx in that it handles SCRATCHes and
5358 ASM_OPERANDs properly.
5359 INSN doesn't really have to be a full INSN; it could be just the
5362 copy_insn (rtx insn)
5364 copy_insn_n_scratches = 0;
5365 orig_asm_operands_vector = 0;
5366 orig_asm_constraints_vector = 0;
5367 copy_asm_operands_vector = 0;
5368 copy_asm_constraints_vector = 0;
5369 return copy_insn_1 (insn);
5372 /* Initialize data structures and variables in this file
5373 before generating rtl for each function. */
5378 set_first_insn (NULL);
5379 set_last_insn (NULL);
5380 if (MIN_NONDEBUG_INSN_UID)
5381 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5384 cur_debug_insn_uid = 1;
5385 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5386 last_location = UNKNOWN_LOCATION;
5387 first_label_num = label_num;
5390 /* Init the tables that describe all the pseudo regs. */
5392 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5394 crtl->emit.regno_pointer_align
5395 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5397 regno_reg_rtx = ggc_alloc_vec_rtx (crtl->emit.regno_pointer_align_length);
5399 /* Put copies of all the hard registers into regno_reg_rtx. */
5400 memcpy (regno_reg_rtx,
5401 initial_regno_reg_rtx,
5402 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5404 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5405 init_virtual_regs ();
5407 /* Indicate that the virtual registers and stack locations are
5409 REG_POINTER (stack_pointer_rtx) = 1;
5410 REG_POINTER (frame_pointer_rtx) = 1;
5411 REG_POINTER (hard_frame_pointer_rtx) = 1;
5412 REG_POINTER (arg_pointer_rtx) = 1;
5414 REG_POINTER (virtual_incoming_args_rtx) = 1;
5415 REG_POINTER (virtual_stack_vars_rtx) = 1;
5416 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5417 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5418 REG_POINTER (virtual_cfa_rtx) = 1;
5420 #ifdef STACK_BOUNDARY
5421 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5422 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5423 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5424 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5426 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5427 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5428 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5429 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5430 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5433 #ifdef INIT_EXPANDERS
5438 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5441 gen_const_vector (enum machine_mode mode, int constant)
5446 enum machine_mode inner;
5448 units = GET_MODE_NUNITS (mode);
5449 inner = GET_MODE_INNER (mode);
5451 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5453 v = rtvec_alloc (units);
5455 /* We need to call this function after we set the scalar const_tiny_rtx
5457 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5459 for (i = 0; i < units; ++i)
5460 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5462 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5466 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5467 all elements are zero, and the one vector when all elements are one. */
5469 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5471 enum machine_mode inner = GET_MODE_INNER (mode);
5472 int nunits = GET_MODE_NUNITS (mode);
5476 /* Check to see if all of the elements have the same value. */
5477 x = RTVEC_ELT (v, nunits - 1);
5478 for (i = nunits - 2; i >= 0; i--)
5479 if (RTVEC_ELT (v, i) != x)
5482 /* If the values are all the same, check to see if we can use one of the
5483 standard constant vectors. */
5486 if (x == CONST0_RTX (inner))
5487 return CONST0_RTX (mode);
5488 else if (x == CONST1_RTX (inner))
5489 return CONST1_RTX (mode);
5492 return gen_rtx_raw_CONST_VECTOR (mode, v);
5495 /* Initialise global register information required by all functions. */
5498 init_emit_regs (void)
5501 enum machine_mode mode;
5504 /* Reset register attributes */
5505 htab_empty (reg_attrs_htab);
5507 /* We need reg_raw_mode, so initialize the modes now. */
5508 init_reg_modes_target ();
5510 /* Assign register numbers to the globally defined register rtx. */
5511 pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
5512 ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
5513 cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
5514 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5515 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5516 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5517 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5518 virtual_incoming_args_rtx =
5519 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5520 virtual_stack_vars_rtx =
5521 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5522 virtual_stack_dynamic_rtx =
5523 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5524 virtual_outgoing_args_rtx =
5525 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5526 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5527 virtual_preferred_stack_boundary_rtx =
5528 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5530 /* Initialize RTL for commonly used hard registers. These are
5531 copied into regno_reg_rtx as we begin to compile each function. */
5532 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5533 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5535 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5536 return_address_pointer_rtx
5537 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5540 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5541 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5543 pic_offset_table_rtx = NULL_RTX;
5545 for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
5547 mode = (enum machine_mode) i;
5548 attrs = ggc_alloc_cleared_mem_attrs ();
5549 attrs->align = BITS_PER_UNIT;
5550 attrs->addrspace = ADDR_SPACE_GENERIC;
5551 if (mode != BLKmode)
5553 attrs->size_known_p = true;
5554 attrs->size = GET_MODE_SIZE (mode);
5555 if (STRICT_ALIGNMENT)
5556 attrs->align = GET_MODE_ALIGNMENT (mode);
5558 mode_mem_attrs[i] = attrs;
5562 /* Create some permanent unique rtl objects shared between all functions. */
5565 init_emit_once (void)
5568 enum machine_mode mode;
5569 enum machine_mode double_mode;
5571 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5573 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5574 const_int_htab_eq, NULL);
5576 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5577 const_double_htab_eq, NULL);
5579 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5580 const_fixed_htab_eq, NULL);
5582 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5583 mem_attrs_htab_eq, NULL);
5584 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5585 reg_attrs_htab_eq, NULL);
5587 /* Compute the word and byte modes. */
5589 byte_mode = VOIDmode;
5590 word_mode = VOIDmode;
5591 double_mode = VOIDmode;
5593 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5595 mode = GET_MODE_WIDER_MODE (mode))
5597 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5598 && byte_mode == VOIDmode)
5601 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5602 && word_mode == VOIDmode)
5606 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5608 mode = GET_MODE_WIDER_MODE (mode))
5610 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5611 && double_mode == VOIDmode)
5615 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5617 #ifdef INIT_EXPANDERS
5618 /* This is to initialize {init|mark|free}_machine_status before the first
5619 call to push_function_context_to. This is needed by the Chill front
5620 end which calls push_function_context_to before the first call to
5621 init_function_start. */
5625 /* Create the unique rtx's for certain rtx codes and operand values. */
5627 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5628 tries to use these variables. */
5629 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5630 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5631 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5633 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5634 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5635 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5637 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5639 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5640 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5641 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5646 dconsthalf = dconst1;
5647 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5649 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5651 const REAL_VALUE_TYPE *const r =
5652 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5654 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5656 mode = GET_MODE_WIDER_MODE (mode))
5657 const_tiny_rtx[i][(int) mode] =
5658 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5660 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5662 mode = GET_MODE_WIDER_MODE (mode))
5663 const_tiny_rtx[i][(int) mode] =
5664 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5666 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5668 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5670 mode = GET_MODE_WIDER_MODE (mode))
5671 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5673 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5675 mode = GET_MODE_WIDER_MODE (mode))
5676 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5679 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5681 mode = GET_MODE_WIDER_MODE (mode))
5683 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5684 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5687 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5689 mode = GET_MODE_WIDER_MODE (mode))
5691 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5692 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5695 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5697 mode = GET_MODE_WIDER_MODE (mode))
5699 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5700 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5703 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5705 mode = GET_MODE_WIDER_MODE (mode))
5707 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5708 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5711 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5713 mode = GET_MODE_WIDER_MODE (mode))
5715 FCONST0(mode).data.high = 0;
5716 FCONST0(mode).data.low = 0;
5717 FCONST0(mode).mode = mode;
5718 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5719 FCONST0 (mode), mode);
5722 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5724 mode = GET_MODE_WIDER_MODE (mode))
5726 FCONST0(mode).data.high = 0;
5727 FCONST0(mode).data.low = 0;
5728 FCONST0(mode).mode = mode;
5729 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5730 FCONST0 (mode), mode);
5733 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5735 mode = GET_MODE_WIDER_MODE (mode))
5737 FCONST0(mode).data.high = 0;
5738 FCONST0(mode).data.low = 0;
5739 FCONST0(mode).mode = mode;
5740 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5741 FCONST0 (mode), mode);
5743 /* We store the value 1. */
5744 FCONST1(mode).data.high = 0;
5745 FCONST1(mode).data.low = 0;
5746 FCONST1(mode).mode = mode;
5747 lshift_double (1, 0, GET_MODE_FBIT (mode),
5748 2 * HOST_BITS_PER_WIDE_INT,
5749 &FCONST1(mode).data.low,
5750 &FCONST1(mode).data.high,
5751 SIGNED_FIXED_POINT_MODE_P (mode));
5752 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5753 FCONST1 (mode), mode);
5756 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5758 mode = GET_MODE_WIDER_MODE (mode))
5760 FCONST0(mode).data.high = 0;
5761 FCONST0(mode).data.low = 0;
5762 FCONST0(mode).mode = mode;
5763 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5764 FCONST0 (mode), mode);
5766 /* We store the value 1. */
5767 FCONST1(mode).data.high = 0;
5768 FCONST1(mode).data.low = 0;
5769 FCONST1(mode).mode = mode;
5770 lshift_double (1, 0, GET_MODE_FBIT (mode),
5771 2 * HOST_BITS_PER_WIDE_INT,
5772 &FCONST1(mode).data.low,
5773 &FCONST1(mode).data.high,
5774 SIGNED_FIXED_POINT_MODE_P (mode));
5775 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5776 FCONST1 (mode), mode);
5779 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5781 mode = GET_MODE_WIDER_MODE (mode))
5783 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5786 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5788 mode = GET_MODE_WIDER_MODE (mode))
5790 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5793 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5795 mode = GET_MODE_WIDER_MODE (mode))
5797 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5798 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5801 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5803 mode = GET_MODE_WIDER_MODE (mode))
5805 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5806 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5809 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5810 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5811 const_tiny_rtx[0][i] = const0_rtx;
5813 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5814 if (STORE_FLAG_VALUE == 1)
5815 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5818 /* Produce exact duplicate of insn INSN after AFTER.
5819 Care updating of libcall regions if present. */
5822 emit_copy_of_insn_after (rtx insn, rtx after)
5826 switch (GET_CODE (insn))
5829 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5833 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5837 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5841 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5842 if (CALL_INSN_FUNCTION_USAGE (insn))
5843 CALL_INSN_FUNCTION_USAGE (new_rtx)
5844 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5845 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5846 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5847 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5848 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5849 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5856 /* Update LABEL_NUSES. */
5857 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5859 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5861 /* If the old insn is frame related, then so is the new one. This is
5862 primarily needed for IA-64 unwind info which marks epilogue insns,
5863 which may be duplicated by the basic block reordering code. */
5864 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5866 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5867 will make them. REG_LABEL_TARGETs are created there too, but are
5868 supposed to be sticky, so we copy them. */
5869 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5870 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5872 if (GET_CODE (link) == EXPR_LIST)
5873 add_reg_note (new_rtx, REG_NOTE_KIND (link),
5874 copy_insn_1 (XEXP (link, 0)));
5876 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
5879 INSN_CODE (new_rtx) = INSN_CODE (insn);
5883 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5885 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5887 if (hard_reg_clobbers[mode][regno])
5888 return hard_reg_clobbers[mode][regno];
5890 return (hard_reg_clobbers[mode][regno] =
5891 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5894 #include "gt-emit-rtl.h"