1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains the functions `gen_rtx', `gen_reg_rtx'
24 and `gen_label_rtx' that are the usual ways of creating rtl
25 expressions for most purposes.
27 It also has the functions for creating insns and linking
28 them in the doubly-linked chain.
30 The patterns of the insns are created by machine-dependent
31 routines in insn-emit.c, which is generated automatically from
32 the machine description. These routines use `gen_rtx' to make
33 the individual rtx's of the pattern; what is machine dependent
34 is the kind of rtx's they make and what arguments they use. */
43 #include "insn-config.h"
47 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
48 After rtl generation, it is 1 plus the largest register number used. */
50 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
52 /* This is *not* reset after each function. It gives each CODE_LABEL
53 in the entire compilation a unique label number. */
55 static int label_num = 1;
57 /* Lowest label number in current function. */
59 static int first_label_num;
61 /* Highest label number in current function.
62 Zero means use the value of label_num instead.
63 This is nonzero only when belatedly compiling an inline function. */
65 static int last_label_num;
67 /* Value label_num had when set_new_first_and_last_label_number was called.
68 If label_num has not changed since then, last_label_num is valid. */
70 static int base_label_num;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these except perhaps the floating-point CONST_DOUBLEs
79 are unique; no other rtx-object will be equal to any of these. */
81 rtx pc_rtx; /* (PC) */
82 rtx cc0_rtx; /* (CC0) */
83 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
84 rtx const0_rtx; /* (CONST_INT 0) */
85 rtx const1_rtx; /* (CONST_INT 1) */
86 rtx const2_rtx; /* (CONST_INT 2) */
87 rtx constm1_rtx; /* (CONST_INT -1) */
88 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
96 REAL_VALUE_TYPE dconst0;
97 REAL_VALUE_TYPE dconst1;
98 REAL_VALUE_TYPE dconst2;
99 REAL_VALUE_TYPE dconstm1;
101 /* All references to the following fixed hard registers go through
102 these unique rtl objects. On machines where the frame-pointer and
103 arg-pointer are the same register, they use the same unique object.
105 After register allocation, other rtl objects which used to be pseudo-regs
106 may be clobbered to refer to the frame-pointer register.
107 But references that were originally to the frame-pointer can be
108 distinguished from the others because they contain frame_pointer_rtx.
110 In an inline procedure, the stack and frame pointer rtxs may not be
111 used for anything else. */
112 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
113 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
114 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
115 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
116 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
117 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
118 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
119 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
121 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
122 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
123 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
124 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
126 /* We make one copy of (const_int C) where C is in
127 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
128 to save space during the compilation and simplify comparisons of
131 #define MAX_SAVED_CONST_INT 64
133 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
135 /* The ends of the doubly-linked chain of rtl for the current function.
136 Both are reset to null at the start of rtl generation for the function.
138 start_sequence saves both of these on `sequence_stack' and then
139 starts a new, nested sequence of insns. */
141 static rtx first_insn = NULL;
142 static rtx last_insn = NULL;
144 /* INSN_UID for next insn emitted.
145 Reset to 1 for each function compiled. */
147 static int cur_insn_uid = 1;
149 /* Line number and source file of the last line-number NOTE emitted.
150 This is used to avoid generating duplicates. */
152 static int last_linenum = 0;
153 static char *last_filename = 0;
155 /* A vector indexed by pseudo reg number. The allocated length
156 of this vector is regno_pointer_flag_length. Since this
157 vector is needed during the expansion phase when the total
158 number of registers in the function is not yet known,
159 it is copied and made bigger when necessary. */
161 char *regno_pointer_flag;
162 int regno_pointer_flag_length;
164 /* Indexed by pseudo register number, gives the rtx for that pseudo.
165 Allocated in parallel with regno_pointer_flag. */
169 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
170 Each element describes one pending sequence.
171 The main insn-chain is saved in the last element of the chain,
172 unless the chain is empty. */
174 struct sequence_stack *sequence_stack;
176 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
177 shortly thrown away. We use two mechanisms to prevent this waste:
179 First, we keep a list of the expressions used to represent the sequence
180 stack in sequence_element_free_list.
182 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
183 rtvec for use by gen_sequence. One entry for each size is sufficient
184 because most cases are calls to gen_sequence followed by immediately
185 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
186 destructive on the insn in it anyway and hence can't be redone.
188 We do not bother to save this cached data over nested function calls.
189 Instead, we just reinitialize them. */
191 #define SEQUENCE_RESULT_SIZE 5
193 static struct sequence_stack *sequence_element_free_list;
194 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
196 extern int rtx_equal_function_value_matters;
198 /* Filename and line number of last line-number note,
199 whether we actually emitted it or not. */
200 extern char *emit_filename;
201 extern int emit_lineno;
203 rtx change_address ();
206 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
208 ** This routine generates an RTX of the size specified by
209 ** <code>, which is an RTX code. The RTX structure is initialized
210 ** from the arguments <element1> through <elementn>, which are
211 ** interpreted according to the specific RTX type's format. The
212 ** special machine mode associated with the rtx (if any) is specified
215 ** gen_rtx() can be invoked in a way which resembles the lisp-like
216 ** rtx it will generate. For example, the following rtx structure:
218 ** (plus:QI (mem:QI (reg:SI 1))
219 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
221 ** ...would be generated by the following C code:
223 ** gen_rtx (PLUS, QImode,
224 ** gen_rtx (MEM, QImode,
225 ** gen_rtx (REG, SImode, 1)),
226 ** gen_rtx (MEM, QImode,
227 ** gen_rtx (PLUS, SImode,
228 ** gen_rtx (REG, SImode, 2),
229 ** gen_rtx (REG, SImode, 3)))),
239 enum machine_mode mode;
240 register int i; /* Array indices... */
241 register char *fmt; /* Current rtx's format... */
242 register rtx rt_val; /* RTX to return to caller... */
245 code = va_arg (p, enum rtx_code);
246 mode = va_arg (p, enum machine_mode);
248 if (code == CONST_INT)
250 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
252 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
253 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
255 if (const_true_rtx && arg == STORE_FLAG_VALUE)
256 return const_true_rtx;
258 rt_val = rtx_alloc (code);
259 INTVAL (rt_val) = arg;
261 else if (code == REG)
263 int regno = va_arg (p, int);
265 /* In case the MD file explicitly references the frame pointer, have
266 all such references point to the same frame pointer. This is used
267 during frame pointer elimination to distinguish the explicit
268 references to these registers from pseudos that happened to be
271 If we have eliminated the frame pointer or arg pointer, we will
272 be using it as a normal register, for example as a spill register.
273 In such cases, we might be accessing it in a mode that is not
274 Pmode and therefore cannot use the pre-allocated rtx.
276 Also don't do this when we are making new REGs in reload,
277 since we don't want to get confused with the real pointers. */
279 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
280 && ! reload_in_progress)
281 return frame_pointer_rtx;
282 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
283 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
284 && ! reload_in_progress)
285 return arg_pointer_rtx;
287 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
288 && ! reload_in_progress)
289 return stack_pointer_rtx;
292 rt_val = rtx_alloc (code);
294 REGNO (rt_val) = regno;
300 rt_val = rtx_alloc (code); /* Allocate the storage space. */
301 rt_val->mode = mode; /* Store the machine mode... */
303 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
304 for (i = 0; i < GET_RTX_LENGTH (code); i++)
308 case '0': /* Unused field. */
311 case 'i': /* An integer? */
312 XINT (rt_val, i) = va_arg (p, int);
315 case 'w': /* A wide integer? */
316 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
319 case 's': /* A string? */
320 XSTR (rt_val, i) = va_arg (p, char *);
323 case 'e': /* An expression? */
324 case 'u': /* An insn? Same except when printing. */
325 XEXP (rt_val, i) = va_arg (p, rtx);
328 case 'E': /* An RTX vector? */
329 XVEC (rt_val, i) = va_arg (p, rtvec);
338 return rt_val; /* Return the new RTX... */
341 /* gen_rtvec (n, [rt1, ..., rtn])
343 ** This routine creates an rtvec and stores within it the
344 ** pointers to rtx's which are its arguments.
360 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
362 vector = (rtx *) alloca (n * sizeof (rtx));
363 for (i = 0; i < n; i++)
364 vector[i] = va_arg (p, rtx);
367 return gen_rtvec_v (n, vector);
371 gen_rtvec_v (n, argp)
376 register rtvec rt_val;
379 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
381 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
383 for (i = 0; i < n; i++)
384 rt_val->elem[i].rtx = *argp++;
389 /* Generate a REG rtx for a new pseudo register of mode MODE.
390 This pseudo is assigned the next sequential register number. */
394 enum machine_mode mode;
398 /* Don't let anything called by or after reload create new registers
399 (actually, registers can't be created after flow, but this is a good
402 if (reload_in_progress || reload_completed)
405 /* Make sure regno_pointer_flag and regno_reg_rtx are large
406 enough to have an element for this pseudo reg number. */
408 if (reg_rtx_no == regno_pointer_flag_length)
412 (char *) oballoc (regno_pointer_flag_length * 2);
413 bzero (new, regno_pointer_flag_length * 2);
414 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
415 regno_pointer_flag = new;
417 new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx));
418 bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx));
419 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
420 regno_reg_rtx = new1;
422 regno_pointer_flag_length *= 2;
425 val = gen_rtx (REG, mode, reg_rtx_no);
426 regno_reg_rtx[reg_rtx_no++] = val;
430 /* Identify REG as a probable pointer register. */
433 mark_reg_pointer (reg)
436 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
439 /* Return 1 plus largest pseudo reg number used in the current function. */
447 /* Return 1 + the largest label number used so far in the current function. */
452 if (last_label_num && label_num == base_label_num)
453 return last_label_num;
457 /* Return first label number used in this function (if any were used). */
460 get_first_label_num ()
462 return first_label_num;
465 /* Return a value representing some low-order bits of X, where the number
466 of low-order bits is given by MODE. Note that no conversion is done
467 between floating-point and fixed-point values, rather, the bit
468 representation is returned.
470 This function handles the cases in common between gen_lowpart, below,
471 and two variants in cse.c and combine.c. These are the cases that can
472 be safely handled at all points in the compilation.
474 If this is not a case we can handle, return 0. */
477 gen_lowpart_common (mode, x)
478 enum machine_mode mode;
483 if (GET_MODE (x) == mode)
486 /* MODE must occupy no more words than the mode of X. */
487 if (GET_MODE (x) != VOIDmode
488 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
489 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
493 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
494 word = ((GET_MODE_SIZE (GET_MODE (x))
495 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
498 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
499 && GET_MODE_CLASS (mode) == MODE_INT)
501 /* If we are getting the low-order part of something that has been
502 sign- or zero-extended, we can either just use the object being
503 extended or make a narrower extension. If we want an even smaller
504 piece than the size of the object being extended, call ourselves
507 This case is used mostly by combine and cse. */
509 if (GET_MODE (XEXP (x, 0)) == mode)
511 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
512 return gen_lowpart_common (mode, XEXP (x, 0));
513 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
514 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
516 else if (GET_CODE (x) == SUBREG
517 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
518 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
519 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
521 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
522 else if (GET_CODE (x) == REG)
524 /* If the register is not valid for MODE, return 0. If we don't
525 do this, there is no way to fix up the resulting REG later. */
526 if (REGNO (x) < FIRST_PSEUDO_REGISTER
527 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode))
529 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
530 /* integrate.c can't handle parts of a return value register. */
531 && (! REG_FUNCTION_VALUE_P (x)
532 || ! rtx_equal_function_value_matters))
533 return gen_rtx (REG, mode, REGNO (x) + word);
535 return gen_rtx (SUBREG, mode, x, word);
538 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
539 from the low-order part of the constant. */
540 else if (GET_MODE_CLASS (mode) == MODE_INT && GET_MODE (x) == VOIDmode
541 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
543 /* If MODE is twice the host word size, X is already the desired
544 representation. Otherwise, if MODE is wider than a word, we can't
545 do this. If MODE is exactly a word, return just one CONST_INT.
546 If MODE is smaller than a word, clear the bits that don't belong
547 in our mode, unless they and our sign bit are all one. So we get
548 either a reasonable negative value or a reasonable unsigned value
551 if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT)
553 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
555 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
556 return (GET_CODE (x) == CONST_INT ? x
557 : GEN_INT (CONST_DOUBLE_LOW (x)));
560 /* MODE must be narrower than HOST_BITS_PER_INT. */
561 int width = GET_MODE_BITSIZE (mode);
562 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
563 : CONST_DOUBLE_LOW (x));
565 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
566 != ((HOST_WIDE_INT) (-1) << (width - 1))))
567 val &= ((HOST_WIDE_INT) 1 << width) - 1;
569 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
574 /* If X is an integral constant but we want it in floating-point, it
575 must be the case that we have a union of an integer and a floating-point
576 value. If the machine-parameters allow it, simulate that union here
577 and return the result. The two-word and single-word cases are
580 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
581 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
582 || flag_pretend_float)
583 && GET_MODE_CLASS (mode) == MODE_FLOAT
584 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
585 && GET_CODE (x) == CONST_INT
586 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
588 union {HOST_WIDE_INT i; float d; } u;
591 return immed_real_const_1 (u.d, mode);
594 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
595 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
596 || flag_pretend_float)
597 && GET_MODE_CLASS (mode) == MODE_FLOAT
598 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
599 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
600 && GET_MODE (x) == VOIDmode
601 && (sizeof (double) * HOST_BITS_PER_CHAR
602 == 2 * HOST_BITS_PER_WIDE_INT))
604 union {HOST_WIDE_INT i[2]; double d; } u;
605 HOST_WIDE_INT low, high;
607 if (GET_CODE (x) == CONST_INT)
608 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
610 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
612 #ifdef HOST_WORDS_BIG_ENDIAN
613 u.i[0] = high, u.i[1] = low;
615 u.i[0] = low, u.i[1] = high;
618 return immed_real_const_1 (u.d, mode);
621 /* Similarly, if this is converting a floating-point value into a
622 single-word integer. Only do this is the host and target parameters are
625 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
626 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
627 || flag_pretend_float)
628 && GET_MODE_CLASS (mode) == MODE_INT
629 && GET_CODE (x) == CONST_DOUBLE
630 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
631 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
632 return operand_subword (x, 0, 0, GET_MODE (x));
634 /* Similarly, if this is converting a floating-point value into a
635 two-word integer, we can do this one word at a time and make an
636 integer. Only do this is the host and target parameters are
639 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
640 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
641 || flag_pretend_float)
642 && GET_MODE_CLASS (mode) == MODE_INT
643 && GET_CODE (x) == CONST_DOUBLE
644 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
645 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
647 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
648 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
650 if (lowpart && GET_CODE (lowpart) == CONST_INT
651 && highpart && GET_CODE (highpart) == CONST_INT)
652 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
655 /* Otherwise, we can't do this. */
659 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
660 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
661 least-significant part of X.
662 MODE specifies how big a part of X to return;
663 it usually should not be larger than a word.
664 If X is a MEM whose address is a QUEUED, the value may be so also. */
667 gen_lowpart (mode, x)
668 enum machine_mode mode;
671 rtx result = gen_lowpart_common (mode, x);
675 else if (GET_CODE (x) == MEM)
677 /* The only additional case we can do is MEM. */
678 register int offset = 0;
679 if (WORDS_BIG_ENDIAN)
680 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
681 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
683 if (BYTES_BIG_ENDIAN)
684 /* Adjust the address so that the address-after-the-data
686 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
687 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
689 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
695 /* Return 1 iff X, assumed to be a SUBREG,
696 refers to the least significant part of its containing reg.
697 If X is not a SUBREG, always return 1 (it is its own low part!). */
703 if (GET_CODE (x) != SUBREG)
707 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
708 return (SUBREG_WORD (x)
709 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
710 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
713 return SUBREG_WORD (x) == 0;
716 /* Return subword I of operand OP.
717 The word number, I, is interpreted as the word number starting at the
718 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
719 otherwise it is the high-order word.
721 If we cannot extract the required word, we return zero. Otherwise, an
722 rtx corresponding to the requested word will be returned.
724 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
725 reload has completed, a valid address will always be returned. After
726 reload, if a valid address cannot be returned, we return zero.
728 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
729 it is the responsibility of the caller.
731 MODE is the mode of OP in case it is a CONST_INT. */
734 operand_subword (op, i, validate_address, mode)
737 int validate_address;
738 enum machine_mode mode;
741 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
743 if (mode == VOIDmode)
744 mode = GET_MODE (op);
746 if (mode == VOIDmode)
749 /* If OP is narrower than a word or if we want a word outside OP, fail. */
751 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
752 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
755 /* If OP is already an integer word, return it. */
756 if (GET_MODE_CLASS (mode) == MODE_INT
757 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
760 /* If OP is a REG or SUBREG, we can handle it very simply. */
761 if (GET_CODE (op) == REG)
763 /* If the register is not valid for MODE, return 0. If we don't
764 do this, there is no way to fix up the resulting REG later. */
765 if (REGNO (op) < FIRST_PSEUDO_REGISTER
766 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
768 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
769 || (REG_FUNCTION_VALUE_P (op)
770 && rtx_equal_function_value_matters))
771 return gen_rtx (SUBREG, word_mode, op, i);
773 return gen_rtx (REG, word_mode, REGNO (op) + i);
775 else if (GET_CODE (op) == SUBREG)
776 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
778 /* Form a new MEM at the requested address. */
779 if (GET_CODE (op) == MEM)
781 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
784 if (validate_address)
786 if (reload_completed)
788 if (! strict_memory_address_p (word_mode, addr))
792 addr = memory_address (word_mode, addr);
795 new = gen_rtx (MEM, word_mode, addr);
797 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
798 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
799 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
804 /* The only remaining cases are when OP is a constant. If the host and
805 target floating formats are the same, handling two-word floating
806 constants are easy. */
807 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
808 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
809 || flag_pretend_float)
810 && GET_MODE_CLASS (mode) == MODE_FLOAT
811 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
812 && GET_CODE (op) == CONST_DOUBLE)
814 /* The constant is stored in the host's word-ordering,
815 but we want to access it in the target's word-ordering. Some
816 compilers don't like a conditional inside macro args, so we have two
817 copies of the return. */
818 #ifdef HOST_WORDS_BIG_ENDIAN
819 return GEN_INT (i == WORDS_BIG_ENDIAN
820 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
822 return GEN_INT (i != WORDS_BIG_ENDIAN
823 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
827 /* Single word float is a little harder, since single- and double-word
828 values often do not have the same high-order bits. We have already
829 verified that we want the only defined word of the single-word value. */
830 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
831 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
832 || flag_pretend_float)
833 && GET_MODE_CLASS (mode) == MODE_FLOAT
834 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
835 && GET_CODE (op) == CONST_DOUBLE)
838 union {float f; HOST_WIDE_INT i; } u;
840 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
843 return GEN_INT (u.i);
846 /* The only remaining cases that we can handle are integers.
847 Convert to proper endianness now since these cases need it.
848 At this point, i == 0 means the low-order word.
850 Note that it must be that BITS_PER_WORD <= HOST_BITS_PER_INT.
851 This is because if it were greater, it could only have been two
852 times greater since we do not support making wider constants. In
853 that case, it MODE would have already been the proper size and
854 it would have been handled above. This means we do not have to
855 worry about the case where we would be returning a CONST_DOUBLE. */
857 if (GET_MODE_CLASS (mode) != MODE_INT
858 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE))
861 if (WORDS_BIG_ENDIAN)
862 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
864 /* Find out which word on the host machine this value is in and get
865 it from the constant. */
866 val = (i / size_ratio == 0
867 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
868 : (GET_CODE (op) == CONST_INT
869 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
871 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
872 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
873 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
874 & (((HOST_WIDE_INT) 1
875 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
877 return GEN_INT (val);
880 /* Similar to `operand_subword', but never return 0. If we can't extract
881 the required subword, put OP into a register and try again. If that fails,
882 abort. We always validate the address in this case. It is not valid
883 to call this function after reload; it is mostly meant for RTL
886 MODE is the mode of OP, in case it is CONST_INT. */
889 operand_subword_force (op, i, mode)
892 enum machine_mode mode;
894 rtx result = operand_subword (op, i, 1, mode);
899 if (mode != BLKmode && mode != VOIDmode)
900 op = force_reg (mode, op);
902 result = operand_subword (op, i, 1, mode);
909 /* Given a compare instruction, swap the operands.
910 A test instruction is changed into a compare of 0 against the operand. */
913 reverse_comparison (insn)
916 rtx body = PATTERN (insn);
919 if (GET_CODE (body) == SET)
920 comp = SET_SRC (body);
922 comp = SET_SRC (XVECEXP (body, 0, 0));
924 if (GET_CODE (comp) == COMPARE)
926 rtx op0 = XEXP (comp, 0);
927 rtx op1 = XEXP (comp, 1);
928 XEXP (comp, 0) = op1;
929 XEXP (comp, 1) = op0;
933 rtx new = gen_rtx (COMPARE, VOIDmode,
934 CONST0_RTX (GET_MODE (comp)), comp);
935 if (GET_CODE (body) == SET)
936 SET_SRC (body) = new;
938 SET_SRC (XVECEXP (body, 0, 0)) = new;
942 /* Return a memory reference like MEMREF, but with its mode changed
943 to MODE and its address changed to ADDR.
944 (VOIDmode means don't change the mode.
945 NULL for ADDR means don't change the address.) */
948 change_address (memref, mode, addr)
950 enum machine_mode mode;
955 if (GET_CODE (memref) != MEM)
957 if (mode == VOIDmode)
958 mode = GET_MODE (memref);
960 addr = XEXP (memref, 0);
962 /* If reload is in progress or has completed, ADDR must be valid.
963 Otherwise, we can call memory_address to make it valid. */
964 if (reload_completed || reload_in_progress)
966 if (! memory_address_p (mode, addr))
970 addr = memory_address (mode, addr);
972 new = gen_rtx (MEM, mode, addr);
973 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
974 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
975 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
979 /* Return a newly created CODE_LABEL rtx with a unique label number. */
984 register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0,
985 label_num++, NULL_PTR);
986 LABEL_NUSES (label) = 0;
990 /* For procedure integration. */
992 /* Return a newly created INLINE_HEADER rtx. Should allocate this
993 from a permanent obstack when the opportunity arises. */
996 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
997 last_labelno, max_parm_regnum, max_regnum, args_size,
998 pops_args, stack_slots, function_flags,
999 outgoing_args_size, original_arg_vector,
1000 original_decl_initial)
1001 rtx first_insn, first_parm_insn;
1002 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1006 int outgoing_args_size;
1007 rtvec original_arg_vector;
1008 rtx original_decl_initial;
1010 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
1011 cur_insn_uid++, NULL_RTX,
1012 first_insn, first_parm_insn,
1013 first_labelno, last_labelno,
1014 max_parm_regnum, max_regnum, args_size, pops_args,
1015 stack_slots, function_flags, outgoing_args_size,
1016 original_arg_vector, original_decl_initial);
1020 /* Install new pointers to the first and last insns in the chain.
1021 Used for an inline-procedure after copying the insn chain. */
1024 set_new_first_and_last_insn (first, last)
1031 /* Set the range of label numbers found in the current function.
1032 This is used when belatedly compiling an inline function. */
1035 set_new_first_and_last_label_num (first, last)
1038 base_label_num = label_num;
1039 first_label_num = first;
1040 last_label_num = last;
1043 /* Save all variables describing the current status into the structure *P.
1044 This is used before starting a nested function. */
1047 save_emit_status (p)
1050 p->reg_rtx_no = reg_rtx_no;
1051 p->first_label_num = first_label_num;
1052 p->first_insn = first_insn;
1053 p->last_insn = last_insn;
1054 p->sequence_stack = sequence_stack;
1055 p->cur_insn_uid = cur_insn_uid;
1056 p->last_linenum = last_linenum;
1057 p->last_filename = last_filename;
1058 p->regno_pointer_flag = regno_pointer_flag;
1059 p->regno_pointer_flag_length = regno_pointer_flag_length;
1060 p->regno_reg_rtx = regno_reg_rtx;
1063 /* Restore all variables describing the current status from the structure *P.
1064 This is used after a nested function. */
1067 restore_emit_status (p)
1072 reg_rtx_no = p->reg_rtx_no;
1073 first_label_num = p->first_label_num;
1074 first_insn = p->first_insn;
1075 last_insn = p->last_insn;
1076 sequence_stack = p->sequence_stack;
1077 cur_insn_uid = p->cur_insn_uid;
1078 last_linenum = p->last_linenum;
1079 last_filename = p->last_filename;
1080 regno_pointer_flag = p->regno_pointer_flag;
1081 regno_pointer_flag_length = p->regno_pointer_flag_length;
1082 regno_reg_rtx = p->regno_reg_rtx;
1084 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1085 sequence_element_free_list = 0;
1086 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1087 sequence_result[i] = 0;
1090 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1091 It does not work to do this twice, because the mark bits set here
1092 are not cleared afterwards. */
1095 unshare_all_rtl (insn)
1098 for (; insn; insn = NEXT_INSN (insn))
1099 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1100 || GET_CODE (insn) == CALL_INSN)
1102 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1103 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1104 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1107 /* Make sure the addresses of stack slots found outside the insn chain
1108 (such as, in DECL_RTL of a variable) are not shared
1109 with the insn chain.
1111 This special care is necessary when the stack slot MEM does not
1112 actually appear in the insn chain. If it does appear, its address
1113 is unshared from all else at that point. */
1115 copy_rtx_if_shared (stack_slot_list);
1118 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1119 Recursively does the same for subexpressions. */
1122 copy_rtx_if_shared (orig)
1125 register rtx x = orig;
1127 register enum rtx_code code;
1128 register char *format_ptr;
1134 code = GET_CODE (x);
1136 /* These types may be freely shared. */
1149 /* SCRATCH must be shared because they represent distinct values. */
1158 /* The chain of insns is not being copied. */
1162 /* A MEM is allowed to be shared if its address is constant
1163 or is a constant plus one of the special registers. */
1164 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1165 || XEXP (x, 0) == virtual_stack_vars_rtx
1166 || XEXP (x, 0) == virtual_incoming_args_rtx)
1169 if (GET_CODE (XEXP (x, 0)) == PLUS
1170 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1171 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1172 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1174 /* This MEM can appear in more than one place,
1175 but its address better not be shared with anything else. */
1177 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1183 /* This rtx may not be shared. If it has already been seen,
1184 replace it with a copy of itself. */
1190 copy = rtx_alloc (code);
1191 bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld)
1192 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1198 /* Now scan the subexpressions recursively.
1199 We can store any replaced subexpressions directly into X
1200 since we know X is not shared! Any vectors in X
1201 must be copied if X was copied. */
1203 format_ptr = GET_RTX_FORMAT (code);
1205 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1207 switch (*format_ptr++)
1210 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1214 if (XVEC (x, i) != NULL)
1219 XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0));
1220 for (j = 0; j < XVECLEN (x, i); j++)
1222 = copy_rtx_if_shared (XVECEXP (x, i, j));
1230 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1231 to look for shared sub-parts. */
1234 reset_used_flags (x)
1238 register enum rtx_code code;
1239 register char *format_ptr;
1245 code = GET_CODE (x);
1247 /* These types may be freely shared so we needn't do any reseting
1268 /* The chain of insns is not being copied. */
1274 format_ptr = GET_RTX_FORMAT (code);
1275 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1277 switch (*format_ptr++)
1280 reset_used_flags (XEXP (x, i));
1284 for (j = 0; j < XVECLEN (x, i); j++)
1285 reset_used_flags (XVECEXP (x, i, j));
1291 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1292 Return X or the rtx for the pseudo reg the value of X was copied into.
1293 OTHER must be valid as a SET_DEST. */
1296 make_safe_from (x, other)
1300 switch (GET_CODE (other))
1303 other = SUBREG_REG (other);
1305 case STRICT_LOW_PART:
1308 other = XEXP (other, 0);
1314 if ((GET_CODE (other) == MEM
1316 && GET_CODE (x) != REG
1317 && GET_CODE (x) != SUBREG)
1318 || (GET_CODE (other) == REG
1319 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1320 || reg_mentioned_p (other, x))))
1322 rtx temp = gen_reg_rtx (GET_MODE (x));
1323 emit_move_insn (temp, x);
1329 /* Emission of insns (adding them to the doubly-linked list). */
1331 /* Return the first insn of the current sequence or current function. */
1339 /* Return the last insn emitted in current sequence or current function. */
1347 /* Specify a new insn as the last in the chain. */
1350 set_last_insn (insn)
1353 if (NEXT_INSN (insn) != 0)
1358 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1361 get_last_insn_anywhere ()
1363 struct sequence_stack *stack;
1366 for (stack = sequence_stack; stack; stack = stack->next)
1367 if (stack->last != 0)
1372 /* Return a number larger than any instruction's uid in this function. */
1377 return cur_insn_uid;
1380 /* Return the next insn. If it is a SEQUENCE, return the first insn
1389 insn = NEXT_INSN (insn);
1390 if (insn && GET_CODE (insn) == INSN
1391 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1392 insn = XVECEXP (PATTERN (insn), 0, 0);
1398 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1402 previous_insn (insn)
1407 insn = PREV_INSN (insn);
1408 if (insn && GET_CODE (insn) == INSN
1409 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1410 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1416 /* Return the next insn after INSN that is not a NOTE. This routine does not
1417 look inside SEQUENCEs. */
1420 next_nonnote_insn (insn)
1425 insn = NEXT_INSN (insn);
1426 if (insn == 0 || GET_CODE (insn) != NOTE)
1433 /* Return the previous insn before INSN that is not a NOTE. This routine does
1434 not look inside SEQUENCEs. */
1437 prev_nonnote_insn (insn)
1442 insn = PREV_INSN (insn);
1443 if (insn == 0 || GET_CODE (insn) != NOTE)
1450 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1451 or 0, if there is none. This routine does not look inside
1455 next_real_insn (insn)
1460 insn = NEXT_INSN (insn);
1461 if (insn == 0 || GET_CODE (insn) == INSN
1462 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1469 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1470 or 0, if there is none. This routine does not look inside
1474 prev_real_insn (insn)
1479 insn = PREV_INSN (insn);
1480 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1481 || GET_CODE (insn) == JUMP_INSN)
1488 /* Find the next insn after INSN that really does something. This routine
1489 does not look inside SEQUENCEs. Until reload has completed, this is the
1490 same as next_real_insn. */
1493 next_active_insn (insn)
1498 insn = NEXT_INSN (insn);
1500 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1501 || (GET_CODE (insn) == INSN
1502 && (! reload_completed
1503 || (GET_CODE (PATTERN (insn)) != USE
1504 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1511 /* Find the last insn before INSN that really does something. This routine
1512 does not look inside SEQUENCEs. Until reload has completed, this is the
1513 same as prev_real_insn. */
1516 prev_active_insn (insn)
1521 insn = PREV_INSN (insn);
1523 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1524 || (GET_CODE (insn) == INSN
1525 && (! reload_completed
1526 || (GET_CODE (PATTERN (insn)) != USE
1527 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1534 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1542 insn = NEXT_INSN (insn);
1543 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1550 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1558 insn = PREV_INSN (insn);
1559 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1567 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1568 and REG_CC_USER notes so we can find it. */
1571 link_cc0_insns (insn)
1574 rtx user = next_nonnote_insn (insn);
1576 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
1577 user = XVECEXP (PATTERN (user), 0, 0);
1579 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
1581 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
1584 /* Return the next insn that uses CC0 after INSN, which is assumed to
1585 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1586 applied to the result of this function should yield INSN).
1588 Normally, this is simply the next insn. However, if a REG_CC_USER note
1589 is present, it contains the insn that uses CC0.
1591 Return 0 if we can't find the insn. */
1594 next_cc0_user (insn)
1597 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
1600 return XEXP (note, 0);
1602 insn = next_nonnote_insn (insn);
1603 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1604 insn = XVECEXP (PATTERN (insn), 0, 0);
1606 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1607 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
1613 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1614 note, it is the previous insn. */
1617 prev_cc0_setter (insn)
1620 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1624 return XEXP (note, 0);
1626 insn = prev_nonnote_insn (insn);
1627 if (! sets_cc0_p (PATTERN (insn)))
1634 /* Try splitting insns that can be split for better scheduling.
1635 PAT is the pattern which might split.
1636 TRIAL is the insn providing PAT.
1637 BACKWARDS is non-zero if we are scanning insns from last to first.
1639 If this routine succeeds in splitting, it returns the first or last
1640 replacement insn depending on the value of BACKWARDS. Otherwise, it
1641 returns TRIAL. If the insn to be returned can be split, it will be. */
1644 try_split (pat, trial, backwards)
1648 rtx before = PREV_INSN (trial);
1649 rtx after = NEXT_INSN (trial);
1650 rtx seq = split_insns (pat, trial);
1651 int has_barrier = 0;
1654 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
1655 We may need to handle this specially. */
1656 if (after && GET_CODE (after) == BARRIER)
1659 after = NEXT_INSN (after);
1664 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
1665 The latter case will normally arise only when being done so that
1666 it, in turn, will be split (SFmode on the 29k is an example). */
1667 if (GET_CODE (seq) == SEQUENCE)
1669 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
1670 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
1671 increment the usage count so we don't delete the label. */
1674 if (GET_CODE (trial) == JUMP_INSN)
1675 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
1676 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
1678 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
1680 if (JUMP_LABEL (trial))
1681 LABEL_NUSES (JUMP_LABEL (trial))++;
1684 tem = emit_insn_after (seq, before);
1686 delete_insn (trial);
1688 emit_barrier_after (tem);
1690 /* Avoid infinite loop if the result matches the original pattern. */
1691 else if (rtx_equal_p (seq, pat))
1695 PATTERN (trial) = seq;
1696 INSN_CODE (trial) = -1;
1699 /* Set TEM to the insn we should return. */
1700 tem = backwards ? prev_active_insn (after) : next_active_insn (before);
1701 return try_split (PATTERN (tem), tem, backwards);
1707 /* Make and return an INSN rtx, initializing all its slots.
1708 Store PATTERN in the pattern slots. */
1711 make_insn_raw (pattern)
1716 insn = rtx_alloc(INSN);
1717 INSN_UID(insn) = cur_insn_uid++;
1719 PATTERN (insn) = pattern;
1720 INSN_CODE (insn) = -1;
1721 LOG_LINKS(insn) = NULL;
1722 REG_NOTES(insn) = NULL;
1727 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
1730 make_jump_insn_raw (pattern)
1735 insn = rtx_alloc (JUMP_INSN);
1736 INSN_UID(insn) = cur_insn_uid++;
1738 PATTERN (insn) = pattern;
1739 INSN_CODE (insn) = -1;
1740 LOG_LINKS(insn) = NULL;
1741 REG_NOTES(insn) = NULL;
1742 JUMP_LABEL(insn) = NULL;
1747 /* Add INSN to the end of the doubly-linked list.
1748 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
1754 PREV_INSN (insn) = last_insn;
1755 NEXT_INSN (insn) = 0;
1757 if (NULL != last_insn)
1758 NEXT_INSN (last_insn) = insn;
1760 if (NULL == first_insn)
1766 /* Add INSN into the doubly-linked list after insn AFTER. This should be the
1767 only function called to insert an insn once delay slots have been filled
1768 since only it knows how to update a SEQUENCE. */
1771 add_insn_after (insn, after)
1774 rtx next = NEXT_INSN (after);
1776 NEXT_INSN (insn) = next;
1777 PREV_INSN (insn) = after;
1781 PREV_INSN (next) = insn;
1782 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
1783 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
1785 else if (last_insn == after)
1789 struct sequence_stack *stack = sequence_stack;
1790 /* Scan all pending sequences too. */
1791 for (; stack; stack = stack->next)
1792 if (after == stack->last)
1796 NEXT_INSN (after) = insn;
1797 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
1799 rtx sequence = PATTERN (after);
1800 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
1804 /* Delete all insns made since FROM.
1805 FROM becomes the new last instruction. */
1808 delete_insns_since (from)
1814 NEXT_INSN (from) = 0;
1818 /* Move a consecutive bunch of insns to a different place in the chain.
1819 The insns to be moved are those between FROM and TO.
1820 They are moved to a new position after the insn AFTER.
1821 AFTER must not be FROM or TO or any insn in between.
1823 This function does not know about SEQUENCEs and hence should not be
1824 called after delay-slot filling has been done. */
1827 reorder_insns (from, to, after)
1828 rtx from, to, after;
1830 /* Splice this bunch out of where it is now. */
1831 if (PREV_INSN (from))
1832 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
1834 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
1835 if (last_insn == to)
1836 last_insn = PREV_INSN (from);
1837 if (first_insn == from)
1838 first_insn = NEXT_INSN (to);
1840 /* Make the new neighbors point to it and it to them. */
1841 if (NEXT_INSN (after))
1842 PREV_INSN (NEXT_INSN (after)) = to;
1844 NEXT_INSN (to) = NEXT_INSN (after);
1845 PREV_INSN (from) = after;
1846 NEXT_INSN (after) = from;
1847 if (after == last_insn)
1851 /* Return the line note insn preceding INSN. */
1854 find_line_note (insn)
1857 if (no_line_numbers)
1860 for (; insn; insn = PREV_INSN (insn))
1861 if (GET_CODE (insn) == NOTE
1862 && NOTE_LINE_NUMBER (insn) >= 0)
1868 /* Like reorder_insns, but inserts line notes to preserve the line numbers
1869 of the moved insns when debugging. This may insert a note between AFTER
1870 and FROM, and another one after TO. */
1873 reorder_insns_with_line_notes (from, to, after)
1874 rtx from, to, after;
1876 rtx from_line = find_line_note (from);
1877 rtx after_line = find_line_note (after);
1879 reorder_insns (from, to, after);
1881 if (from_line == after_line)
1885 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
1886 NOTE_LINE_NUMBER (from_line),
1889 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
1890 NOTE_LINE_NUMBER (after_line),
1894 /* Emit an insn of given code and pattern
1895 at a specified place within the doubly-linked list. */
1897 /* Make an instruction with body PATTERN
1898 and output it before the instruction BEFORE. */
1901 emit_insn_before (pattern, before)
1902 register rtx pattern, before;
1904 register rtx insn = before;
1906 if (GET_CODE (pattern) == SEQUENCE)
1910 for (i = 0; i < XVECLEN (pattern, 0); i++)
1912 insn = XVECEXP (pattern, 0, i);
1913 add_insn_after (insn, PREV_INSN (before));
1915 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
1916 sequence_result[XVECLEN (pattern, 0)] = pattern;
1920 insn = make_insn_raw (pattern);
1921 add_insn_after (insn, PREV_INSN (before));
1927 /* Make an instruction with body PATTERN and code JUMP_INSN
1928 and output it before the instruction BEFORE. */
1931 emit_jump_insn_before (pattern, before)
1932 register rtx pattern, before;
1936 if (GET_CODE (pattern) == SEQUENCE)
1937 insn = emit_insn_before (pattern, before);
1940 insn = make_jump_insn_raw (pattern, NULL_RTVEC);
1941 add_insn_after (insn, PREV_INSN (before));
1947 /* Make an instruction with body PATTERN and code CALL_INSN
1948 and output it before the instruction BEFORE. */
1951 emit_call_insn_before (pattern, before)
1952 register rtx pattern, before;
1954 rtx insn = emit_insn_before (pattern, before);
1955 PUT_CODE (insn, CALL_INSN);
1959 /* Make an insn of code BARRIER
1960 and output it before the insn AFTER. */
1963 emit_barrier_before (before)
1964 register rtx before;
1966 register rtx insn = rtx_alloc (BARRIER);
1968 INSN_UID (insn) = cur_insn_uid++;
1970 add_insn_after (insn, PREV_INSN (before));
1974 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
1977 emit_note_before (subtype, before)
1981 register rtx note = rtx_alloc (NOTE);
1982 INSN_UID (note) = cur_insn_uid++;
1983 NOTE_SOURCE_FILE (note) = 0;
1984 NOTE_LINE_NUMBER (note) = subtype;
1986 add_insn_after (note, PREV_INSN (before));
1990 /* Make an insn of code INSN with body PATTERN
1991 and output it after the insn AFTER. */
1994 emit_insn_after (pattern, after)
1995 register rtx pattern, after;
1997 register rtx insn = after;
1999 if (GET_CODE (pattern) == SEQUENCE)
2003 for (i = 0; i < XVECLEN (pattern, 0); i++)
2005 insn = XVECEXP (pattern, 0, i);
2006 add_insn_after (insn, after);
2009 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2010 sequence_result[XVECLEN (pattern, 0)] = pattern;
2014 insn = make_insn_raw (pattern);
2015 add_insn_after (insn, after);
2021 /* Make an insn of code JUMP_INSN with body PATTERN
2022 and output it after the insn AFTER. */
2025 emit_jump_insn_after (pattern, after)
2026 register rtx pattern, after;
2030 if (GET_CODE (pattern) == SEQUENCE)
2031 insn = emit_insn_after (pattern, after);
2034 insn = make_jump_insn_raw (pattern, NULL_RTVEC);
2035 add_insn_after (insn, after);
2041 /* Make an insn of code BARRIER
2042 and output it after the insn AFTER. */
2045 emit_barrier_after (after)
2048 register rtx insn = rtx_alloc (BARRIER);
2050 INSN_UID (insn) = cur_insn_uid++;
2052 add_insn_after (insn, after);
2056 /* Emit the label LABEL after the insn AFTER. */
2059 emit_label_after (label, after)
2062 /* This can be called twice for the same label
2063 as a result of the confusion that follows a syntax error!
2064 So make it harmless. */
2065 if (INSN_UID (label) == 0)
2067 INSN_UID (label) = cur_insn_uid++;
2068 add_insn_after (label, after);
2074 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2077 emit_note_after (subtype, after)
2081 register rtx note = rtx_alloc (NOTE);
2082 INSN_UID (note) = cur_insn_uid++;
2083 NOTE_SOURCE_FILE (note) = 0;
2084 NOTE_LINE_NUMBER (note) = subtype;
2085 add_insn_after (note, after);
2089 /* Emit a line note for FILE and LINE after the insn AFTER. */
2092 emit_line_note_after (file, line, after)
2099 if (no_line_numbers && line > 0)
2105 note = rtx_alloc (NOTE);
2106 INSN_UID (note) = cur_insn_uid++;
2107 NOTE_SOURCE_FILE (note) = file;
2108 NOTE_LINE_NUMBER (note) = line;
2109 add_insn_after (note, after);
2113 /* Make an insn of code INSN with pattern PATTERN
2114 and add it to the end of the doubly-linked list.
2115 If PATTERN is a SEQUENCE, take the elements of it
2116 and emit an insn for each element.
2118 Returns the last insn emitted. */
2124 rtx insn = last_insn;
2126 if (GET_CODE (pattern) == SEQUENCE)
2130 for (i = 0; i < XVECLEN (pattern, 0); i++)
2132 insn = XVECEXP (pattern, 0, i);
2135 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2136 sequence_result[XVECLEN (pattern, 0)] = pattern;
2140 insn = make_insn_raw (pattern);
2147 /* Emit the insns in a chain starting with INSN.
2148 Return the last insn emitted. */
2158 rtx next = NEXT_INSN (insn);
2167 /* Emit the insns in a chain starting with INSN and place them in front of
2168 the insn BEFORE. Return the last insn emitted. */
2171 emit_insns_before (insn, before)
2179 rtx next = NEXT_INSN (insn);
2180 add_insn_after (insn, PREV_INSN (before));
2188 /* Emit the insns in a chain starting with FIRST and place them in back of
2189 the insn AFTER. Return the last insn emitted. */
2192 emit_insns_after (first, after)
2197 register rtx after_after;
2205 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2208 after_after = NEXT_INSN (after);
2210 NEXT_INSN (after) = first;
2211 PREV_INSN (first) = after;
2212 NEXT_INSN (last) = after_after;
2214 PREV_INSN (after_after) = last;
2219 /* Make an insn of code JUMP_INSN with pattern PATTERN
2220 and add it to the end of the doubly-linked list. */
2223 emit_jump_insn (pattern)
2226 if (GET_CODE (pattern) == SEQUENCE)
2227 return emit_insn (pattern);
2230 register rtx insn = make_jump_insn_raw (pattern, NULL_RTVEC);
2236 /* Make an insn of code CALL_INSN with pattern PATTERN
2237 and add it to the end of the doubly-linked list. */
2240 emit_call_insn (pattern)
2243 if (GET_CODE (pattern) == SEQUENCE)
2244 return emit_insn (pattern);
2247 register rtx insn = make_insn_raw (pattern);
2249 PUT_CODE (insn, CALL_INSN);
2254 /* Add the label LABEL to the end of the doubly-linked list. */
2260 /* This can be called twice for the same label
2261 as a result of the confusion that follows a syntax error!
2262 So make it harmless. */
2263 if (INSN_UID (label) == 0)
2265 INSN_UID (label) = cur_insn_uid++;
2271 /* Make an insn of code BARRIER
2272 and add it to the end of the doubly-linked list. */
2277 register rtx barrier = rtx_alloc (BARRIER);
2278 INSN_UID (barrier) = cur_insn_uid++;
2283 /* Make an insn of code NOTE
2284 with data-fields specified by FILE and LINE
2285 and add it to the end of the doubly-linked list,
2286 but only if line-numbers are desired for debugging info. */
2289 emit_line_note (file, line)
2293 emit_filename = file;
2297 if (no_line_numbers)
2301 return emit_note (file, line);
2304 /* Make an insn of code NOTE
2305 with data-fields specified by FILE and LINE
2306 and add it to the end of the doubly-linked list.
2307 If it is a line-number NOTE, omit it if it matches the previous one. */
2310 emit_note (file, line)
2318 if (file && last_filename && !strcmp (file, last_filename)
2319 && line == last_linenum)
2321 last_filename = file;
2322 last_linenum = line;
2325 if (no_line_numbers && line > 0)
2331 note = rtx_alloc (NOTE);
2332 INSN_UID (note) = cur_insn_uid++;
2333 NOTE_SOURCE_FILE (note) = file;
2334 NOTE_LINE_NUMBER (note) = line;
2339 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2342 emit_line_note_force (file, line)
2347 return emit_line_note (file, line);
2350 /* Cause next statement to emit a line note even if the line number
2351 has not changed. This is used at the beginning of a function. */
2354 force_next_line_note ()
2359 /* Return an indication of which type of insn should have X as a body.
2360 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2366 if (GET_CODE (x) == CODE_LABEL)
2368 if (GET_CODE (x) == CALL)
2370 if (GET_CODE (x) == RETURN)
2372 if (GET_CODE (x) == SET)
2374 if (SET_DEST (x) == pc_rtx)
2376 else if (GET_CODE (SET_SRC (x)) == CALL)
2381 if (GET_CODE (x) == PARALLEL)
2384 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2385 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2387 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2388 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2390 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2391 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2397 /* Emit the rtl pattern X as an appropriate kind of insn.
2398 If X is a label, it is simply added into the insn chain. */
2404 enum rtx_code code = classify_insn (x);
2406 if (code == CODE_LABEL)
2407 return emit_label (x);
2408 else if (code == INSN)
2409 return emit_insn (x);
2410 else if (code == JUMP_INSN)
2412 register rtx insn = emit_jump_insn (x);
2413 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2414 return emit_barrier ();
2417 else if (code == CALL_INSN)
2418 return emit_call_insn (x);
2423 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2428 struct sequence_stack *tem;
2430 if (sequence_element_free_list)
2432 /* Reuse a previously-saved struct sequence_stack. */
2433 tem = sequence_element_free_list;
2434 sequence_element_free_list = tem->next;
2437 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
2439 tem->next = sequence_stack;
2440 tem->first = first_insn;
2441 tem->last = last_insn;
2443 sequence_stack = tem;
2449 /* Set up the insn chain starting with FIRST
2450 as the current sequence, saving the previously current one. */
2453 push_to_sequence (first)
2460 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
2466 /* After emitting to a sequence, restore previous saved state.
2468 To get the contents of the sequence just made,
2469 you must call `gen_sequence' *before* calling here. */
2474 struct sequence_stack *tem = sequence_stack;
2476 first_insn = tem->first;
2477 last_insn = tem->last;
2478 sequence_stack = tem->next;
2480 tem->next = sequence_element_free_list;
2481 sequence_element_free_list = tem;
2484 /* Return 1 if currently emitting into a sequence. */
2489 return sequence_stack != 0;
2492 /* Generate a SEQUENCE rtx containing the insns already emitted
2493 to the current sequence.
2495 This is how the gen_... function from a DEFINE_EXPAND
2496 constructs the SEQUENCE that it returns. */
2507 /* Count the insns in the chain. */
2509 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
2512 /* If only one insn, return its pattern rather than a SEQUENCE.
2513 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
2514 the case of an empty list.) */
2516 && (GET_CODE (first_insn) == INSN
2517 || GET_CODE (first_insn) == JUMP_INSN
2518 || GET_CODE (first_insn) == CALL_INSN))
2519 return PATTERN (first_insn);
2521 /* Put them in a vector. See if we already have a SEQUENCE of the
2522 appropriate length around. */
2523 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
2524 sequence_result[len] = 0;
2527 /* Ensure that this rtl goes in saveable_obstack, since we may be
2529 int in_current_obstack = rtl_in_saveable_obstack ();
2530 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
2531 if (in_current_obstack)
2532 rtl_in_current_obstack ();
2535 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
2536 XVECEXP (result, 0, i) = tem;
2541 /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
2542 according to the chain of insns starting with FIRST.
2544 Also set cur_insn_uid to exceed the largest uid in that chain.
2546 This is used when an inline function's rtl is saved
2547 and passed to rest_of_compilation later. */
2549 static void restore_reg_data_1 ();
2552 restore_reg_data (first)
2557 register int max_uid = 0;
2559 for (insn = first; insn; insn = NEXT_INSN (insn))
2561 if (INSN_UID (insn) >= max_uid)
2562 max_uid = INSN_UID (insn);
2564 switch (GET_CODE (insn))
2574 restore_reg_data_1 (PATTERN (insn));
2579 /* Don't duplicate the uids already in use. */
2580 cur_insn_uid = max_uid + 1;
2582 /* If any regs are missing, make them up.
2584 ??? word_mode is not necessarily the right mode. Most likely these REGs
2585 are never used. At some point this should be checked. */
2587 for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++)
2588 if (regno_reg_rtx[i] == 0)
2589 regno_reg_rtx[i] = gen_rtx (REG, word_mode, i);
2593 restore_reg_data_1 (orig)
2596 register rtx x = orig;
2598 register enum rtx_code code;
2599 register char *format_ptr;
2601 code = GET_CODE (x);
2616 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
2618 /* Make sure regno_pointer_flag and regno_reg_rtx are large
2619 enough to have an element for this pseudo reg number. */
2620 if (REGNO (x) >= reg_rtx_no)
2622 reg_rtx_no = REGNO (x);
2624 if (reg_rtx_no >= regno_pointer_flag_length)
2626 int newlen = MAX (regno_pointer_flag_length * 2,
2629 char *new = (char *) oballoc (newlen);
2630 bzero (new, newlen);
2631 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
2633 new1 = (rtx *) oballoc (newlen * sizeof (rtx));
2634 bzero (new1, newlen * sizeof (rtx));
2635 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
2637 regno_pointer_flag = new;
2638 regno_reg_rtx = new1;
2639 regno_pointer_flag_length = newlen;
2643 regno_reg_rtx[REGNO (x)] = x;
2648 if (GET_CODE (XEXP (x, 0)) == REG)
2649 mark_reg_pointer (XEXP (x, 0));
2650 restore_reg_data_1 (XEXP (x, 0));
2654 /* Now scan the subexpressions recursively. */
2656 format_ptr = GET_RTX_FORMAT (code);
2658 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2660 switch (*format_ptr++)
2663 restore_reg_data_1 (XEXP (x, i));
2667 if (XVEC (x, i) != NULL)
2671 for (j = 0; j < XVECLEN (x, i); j++)
2672 restore_reg_data_1 (XVECEXP (x, i, j));
2679 /* Initialize data structures and variables in this file
2680 before generating rtl for each function. */
2690 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
2693 first_label_num = label_num;
2696 /* Clear the start_sequence/gen_sequence cache. */
2697 sequence_element_free_list = 0;
2698 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
2699 sequence_result[i] = 0;
2701 /* Init the tables that describe all the pseudo regs. */
2703 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
2706 = (char *) oballoc (regno_pointer_flag_length);
2707 bzero (regno_pointer_flag, regno_pointer_flag_length);
2710 = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx));
2711 bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
2713 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
2714 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
2715 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
2716 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
2717 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
2719 /* Indicate that the virtual registers and stack locations are
2721 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
2722 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
2723 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
2725 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
2726 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
2727 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
2728 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
2731 /* Create some permanent unique rtl objects shared between all functions.
2732 LINE_NUMBERS is nonzero if line numbers are to be generated. */
2735 init_emit_once (line_numbers)
2739 enum machine_mode mode;
2741 no_line_numbers = ! line_numbers;
2743 sequence_stack = NULL;
2745 /* Create the unique rtx's for certain rtx codes and operand values. */
2747 pc_rtx = gen_rtx (PC, VOIDmode);
2748 cc0_rtx = gen_rtx (CC0, VOIDmode);
2750 /* Don't use gen_rtx here since gen_rtx in this case
2751 tries to use these variables. */
2752 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
2754 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
2755 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
2756 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
2759 /* These four calls obtain some of the rtx expressions made above. */
2760 const0_rtx = GEN_INT (0);
2761 const1_rtx = GEN_INT (1);
2762 const2_rtx = GEN_INT (2);
2763 constm1_rtx = GEN_INT (-1);
2765 /* This will usually be one of the above constants, but may be a new rtx. */
2766 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
2768 dconst0 = REAL_VALUE_ATOF ("0");
2769 dconst1 = REAL_VALUE_ATOF ("1");
2770 dconst2 = REAL_VALUE_ATOF ("2");
2771 dconstm1 = REAL_VALUE_ATOF ("-1");
2773 for (i = 0; i <= 2; i++)
2775 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
2776 mode = GET_MODE_WIDER_MODE (mode))
2778 rtx tem = rtx_alloc (CONST_DOUBLE);
2779 union real_extract u;
2781 bzero (&u, sizeof u); /* Zero any holes in a structure. */
2782 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
2784 bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u);
2785 CONST_DOUBLE_MEM (tem) = cc0_rtx;
2786 PUT_MODE (tem, mode);
2788 const_tiny_rtx[i][(int) mode] = tem;
2791 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
2793 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2794 mode = GET_MODE_WIDER_MODE (mode))
2795 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
2798 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
2799 mode = GET_MODE_WIDER_MODE (mode))
2800 const_tiny_rtx[0][(int) mode] = const0_rtx;
2802 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
2803 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
2805 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
2806 arg_pointer_rtx = frame_pointer_rtx;
2807 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
2808 arg_pointer_rtx = stack_pointer_rtx;
2810 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
2812 /* Create the virtual registers. Do so here since the following objects
2813 might reference them. */
2815 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
2816 VIRTUAL_INCOMING_ARGS_REGNUM);
2817 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
2818 VIRTUAL_STACK_VARS_REGNUM);
2819 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
2820 VIRTUAL_STACK_DYNAMIC_REGNUM);
2821 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
2822 VIRTUAL_OUTGOING_ARGS_REGNUM);
2825 struct_value_rtx = STRUCT_VALUE;
2827 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
2830 #ifdef STRUCT_VALUE_INCOMING
2831 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
2833 #ifdef STRUCT_VALUE_INCOMING_REGNUM
2834 struct_value_incoming_rtx
2835 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
2837 struct_value_incoming_rtx = struct_value_rtx;
2841 #ifdef STATIC_CHAIN_REGNUM
2842 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
2844 #ifdef STATIC_CHAIN_INCOMING_REGNUM
2845 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
2846 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
2849 static_chain_incoming_rtx = static_chain_rtx;
2853 static_chain_rtx = STATIC_CHAIN;
2855 #ifdef STATIC_CHAIN_INCOMING
2856 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
2858 static_chain_incoming_rtx = static_chain_rtx;
2862 #ifdef PIC_OFFSET_TABLE_REGNUM
2863 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);