1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl[GR_MAX];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
108 REAL_VALUE_TYPE dconst0;
109 REAL_VALUE_TYPE dconst1;
110 REAL_VALUE_TYPE dconst2;
111 REAL_VALUE_TYPE dconstm1;
113 /* All references to the following fixed hard registers go through
114 these unique rtl objects. On machines where the frame-pointer and
115 arg-pointer are the same register, they use the same unique object.
117 After register allocation, other rtl objects which used to be pseudo-regs
118 may be clobbered to refer to the frame-pointer register.
119 But references that were originally to the frame-pointer can be
120 distinguished from the others because they contain frame_pointer_rtx.
122 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
123 tricky: until register elimination has taken place hard_frame_pointer_rtx
124 should be used if it is being set, and frame_pointer_rtx otherwise. After
125 register elimination hard_frame_pointer_rtx should always be used.
126 On machines where the two registers are same (most) then these are the
129 In an inline procedure, the stack and frame pointer rtxs may not be
130 used for anything else. */
131 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
132 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
133 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
134 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
135 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
137 /* This is used to implement __builtin_return_address for some machines.
138 See for instance the MIPS port. */
139 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
141 /* We make one copy of (const_int C) where C is in
142 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
143 to save space during the compilation and simplify comparisons of
146 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
148 /* A hash table storing CONST_INTs whose absolute value is greater
149 than MAX_SAVED_CONST_INT. */
151 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
152 htab_t const_int_htab;
154 /* A hash table storing memory attribute structures. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
156 htab_t mem_attrs_htab;
158 /* A hash table storing all CONST_DOUBLEs. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
160 htab_t const_double_htab;
162 #define first_insn (cfun->emit->x_first_insn)
163 #define last_insn (cfun->emit->x_last_insn)
164 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
165 #define last_linenum (cfun->emit->x_last_linenum)
166 #define last_filename (cfun->emit->x_last_filename)
167 #define first_label_num (cfun->emit->x_first_label_num)
169 static rtx make_jump_insn_raw PARAMS ((rtx));
170 static rtx make_call_insn_raw PARAMS ((rtx));
171 static rtx find_line_note PARAMS ((rtx));
172 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
174 static void unshare_all_rtl_1 PARAMS ((rtx));
175 static void unshare_all_decls PARAMS ((tree));
176 static void reset_used_decls PARAMS ((tree));
177 static void mark_label_nuses PARAMS ((rtx));
178 static hashval_t const_int_htab_hash PARAMS ((const void *));
179 static int const_int_htab_eq PARAMS ((const void *,
181 static hashval_t const_double_htab_hash PARAMS ((const void *));
182 static int const_double_htab_eq PARAMS ((const void *,
184 static rtx lookup_const_double PARAMS ((rtx));
185 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
186 static int mem_attrs_htab_eq PARAMS ((const void *,
188 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
191 static tree component_ref_for_mem_expr PARAMS ((tree));
192 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
194 /* Probability of the conditional branch currently proceeded by try_split.
195 Set to -1 otherwise. */
196 int split_branch_probability = -1;
198 /* Returns a hash code for X (which is a really a CONST_INT). */
201 const_int_htab_hash (x)
204 return (hashval_t) INTVAL ((struct rtx_def *) x);
207 /* Returns non-zero if the value represented by X (which is really a
208 CONST_INT) is the same as that given by Y (which is really a
212 const_int_htab_eq (x, y)
216 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
219 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
221 const_double_htab_hash (x)
228 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
229 h ^= XWINT (value, i);
233 /* Returns non-zero if the value represented by X (really a ...)
234 is the same as that represented by Y (really a ...) */
236 const_double_htab_eq (x, y)
240 rtx a = (rtx)x, b = (rtx)y;
243 if (GET_MODE (a) != GET_MODE (b))
245 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
246 if (XWINT (a, i) != XWINT (b, i))
252 /* Returns a hash code for X (which is a really a mem_attrs *). */
255 mem_attrs_htab_hash (x)
258 mem_attrs *p = (mem_attrs *) x;
260 return (p->alias ^ (p->align * 1000)
261 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
262 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
266 /* Returns non-zero if the value represented by X (which is really a
267 mem_attrs *) is the same as that given by Y (which is also really a
271 mem_attrs_htab_eq (x, y)
275 mem_attrs *p = (mem_attrs *) x;
276 mem_attrs *q = (mem_attrs *) y;
278 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
279 && p->size == q->size && p->align == q->align);
282 /* Allocate a new mem_attrs structure and insert it into the hash table if
283 one identical to it is not already in the table. We are doing this for
287 get_mem_attrs (alias, expr, offset, size, align, mode)
293 enum machine_mode mode;
298 /* If everything is the default, we can just return zero. */
299 if (alias == 0 && expr == 0 && offset == 0
301 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
302 && (align == BITS_PER_UNIT
304 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
309 attrs.offset = offset;
313 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
316 *slot = ggc_alloc (sizeof (mem_attrs));
317 memcpy (*slot, &attrs, sizeof (mem_attrs));
323 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
324 don't attempt to share with the various global pieces of rtl (such as
325 frame_pointer_rtx). */
328 gen_raw_REG (mode, regno)
329 enum machine_mode mode;
332 rtx x = gen_rtx_raw_REG (mode, regno);
333 ORIGINAL_REGNO (x) = regno;
337 /* There are some RTL codes that require special attention; the generation
338 functions do the raw handling. If you add to this list, modify
339 special_rtx in gengenrtl.c as well. */
342 gen_rtx_CONST_INT (mode, arg)
343 enum machine_mode mode ATTRIBUTE_UNUSED;
348 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
349 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
351 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
352 if (const_true_rtx && arg == STORE_FLAG_VALUE)
353 return const_true_rtx;
356 /* Look up the CONST_INT in the hash table. */
357 slot = htab_find_slot_with_hash (const_int_htab, &arg,
358 (hashval_t) arg, INSERT);
360 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
366 gen_int_mode (c, mode)
368 enum machine_mode mode;
370 return GEN_INT (trunc_int_for_mode (c, mode));
373 /* CONST_DOUBLEs might be created from pairs of integers, or from
374 REAL_VALUE_TYPEs. Also, their length is known only at run time,
375 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
377 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
378 hash table. If so, return its counterpart; otherwise add it
379 to the hash table and return it. */
381 lookup_const_double (real)
384 void **slot = htab_find_slot (const_double_htab, real, INSERT);
391 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
392 VALUE in mode MODE. */
394 const_double_from_real_value (value, mode)
395 REAL_VALUE_TYPE value;
396 enum machine_mode mode;
398 rtx real = rtx_alloc (CONST_DOUBLE);
399 PUT_MODE (real, mode);
401 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
403 return lookup_const_double (real);
406 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
407 of ints: I0 is the low-order word and I1 is the high-order word.
408 Do not use this routine for non-integer modes; convert to
409 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
412 immed_double_const (i0, i1, mode)
413 HOST_WIDE_INT i0, i1;
414 enum machine_mode mode;
419 if (mode != VOIDmode)
422 if (GET_MODE_CLASS (mode) != MODE_INT
423 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
424 /* We can get a 0 for an error mark. */
425 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
426 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
429 /* We clear out all bits that don't belong in MODE, unless they and
430 our sign bit are all one. So we get either a reasonable negative
431 value or a reasonable unsigned value for this mode. */
432 width = GET_MODE_BITSIZE (mode);
433 if (width < HOST_BITS_PER_WIDE_INT
434 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
435 != ((HOST_WIDE_INT) (-1) << (width - 1))))
436 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
437 else if (width == HOST_BITS_PER_WIDE_INT
438 && ! (i1 == ~0 && i0 < 0))
440 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
441 /* We cannot represent this value as a constant. */
444 /* If this would be an entire word for the target, but is not for
445 the host, then sign-extend on the host so that the number will
446 look the same way on the host that it would on the target.
448 For example, when building a 64 bit alpha hosted 32 bit sparc
449 targeted compiler, then we want the 32 bit unsigned value -1 to be
450 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
451 The latter confuses the sparc backend. */
453 if (width < HOST_BITS_PER_WIDE_INT
454 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
455 i0 |= ((HOST_WIDE_INT) (-1) << width);
457 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
460 ??? Strictly speaking, this is wrong if we create a CONST_INT for
461 a large unsigned constant with the size of MODE being
462 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
463 in a wider mode. In that case we will mis-interpret it as a
466 Unfortunately, the only alternative is to make a CONST_DOUBLE for
467 any constant in any mode if it is an unsigned constant larger
468 than the maximum signed integer in an int on the host. However,
469 doing this will break everyone that always expects to see a
470 CONST_INT for SImode and smaller.
472 We have always been making CONST_INTs in this case, so nothing
473 new is being broken. */
475 if (width <= HOST_BITS_PER_WIDE_INT)
476 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
479 /* If this integer fits in one word, return a CONST_INT. */
480 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
483 /* We use VOIDmode for integers. */
484 value = rtx_alloc (CONST_DOUBLE);
485 PUT_MODE (value, VOIDmode);
487 CONST_DOUBLE_LOW (value) = i0;
488 CONST_DOUBLE_HIGH (value) = i1;
490 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
491 XWINT (value, i) = 0;
493 return lookup_const_double (value);
497 gen_rtx_REG (mode, regno)
498 enum machine_mode mode;
501 /* In case the MD file explicitly references the frame pointer, have
502 all such references point to the same frame pointer. This is
503 used during frame pointer elimination to distinguish the explicit
504 references to these registers from pseudos that happened to be
507 If we have eliminated the frame pointer or arg pointer, we will
508 be using it as a normal register, for example as a spill
509 register. In such cases, we might be accessing it in a mode that
510 is not Pmode and therefore cannot use the pre-allocated rtx.
512 Also don't do this when we are making new REGs in reload, since
513 we don't want to get confused with the real pointers. */
515 if (mode == Pmode && !reload_in_progress)
517 if (regno == FRAME_POINTER_REGNUM
518 && (!reload_completed || frame_pointer_needed))
519 return frame_pointer_rtx;
520 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
521 if (regno == HARD_FRAME_POINTER_REGNUM
522 && (!reload_completed || frame_pointer_needed))
523 return hard_frame_pointer_rtx;
525 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
526 if (regno == ARG_POINTER_REGNUM)
527 return arg_pointer_rtx;
529 #ifdef RETURN_ADDRESS_POINTER_REGNUM
530 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
531 return return_address_pointer_rtx;
533 if (regno == PIC_OFFSET_TABLE_REGNUM
534 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
535 return pic_offset_table_rtx;
536 if (regno == STACK_POINTER_REGNUM)
537 return stack_pointer_rtx;
541 /* If the per-function register table has been set up, try to re-use
542 an existing entry in that table to avoid useless generation of RTL.
544 This code is disabled for now until we can fix the various backends
545 which depend on having non-shared hard registers in some cases. Long
546 term we want to re-enable this code as it can significantly cut down
547 on the amount of useless RTL that gets generated.
549 We'll also need to fix some code that runs after reload that wants to
550 set ORIGINAL_REGNO. */
555 && regno < FIRST_PSEUDO_REGISTER
556 && reg_raw_mode[regno] == mode)
557 return regno_reg_rtx[regno];
560 return gen_raw_REG (mode, regno);
564 gen_rtx_MEM (mode, addr)
565 enum machine_mode mode;
568 rtx rt = gen_rtx_raw_MEM (mode, addr);
570 /* This field is not cleared by the mere allocation of the rtx, so
578 gen_rtx_SUBREG (mode, reg, offset)
579 enum machine_mode mode;
583 /* This is the most common failure type.
584 Catch it early so we can see who does it. */
585 if ((offset % GET_MODE_SIZE (mode)) != 0)
588 /* This check isn't usable right now because combine will
589 throw arbitrary crap like a CALL into a SUBREG in
590 gen_lowpart_for_combine so we must just eat it. */
592 /* Check for this too. */
593 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
596 return gen_rtx_raw_SUBREG (mode, reg, offset);
599 /* Generate a SUBREG representing the least-significant part of REG if MODE
600 is smaller than mode of REG, otherwise paradoxical SUBREG. */
603 gen_lowpart_SUBREG (mode, reg)
604 enum machine_mode mode;
607 enum machine_mode inmode;
609 inmode = GET_MODE (reg);
610 if (inmode == VOIDmode)
612 return gen_rtx_SUBREG (mode, reg,
613 subreg_lowpart_offset (mode, inmode));
616 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
618 ** This routine generates an RTX of the size specified by
619 ** <code>, which is an RTX code. The RTX structure is initialized
620 ** from the arguments <element1> through <elementn>, which are
621 ** interpreted according to the specific RTX type's format. The
622 ** special machine mode associated with the rtx (if any) is specified
625 ** gen_rtx can be invoked in a way which resembles the lisp-like
626 ** rtx it will generate. For example, the following rtx structure:
628 ** (plus:QI (mem:QI (reg:SI 1))
629 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
631 ** ...would be generated by the following C code:
633 ** gen_rtx (PLUS, QImode,
634 ** gen_rtx (MEM, QImode,
635 ** gen_rtx (REG, SImode, 1)),
636 ** gen_rtx (MEM, QImode,
637 ** gen_rtx (PLUS, SImode,
638 ** gen_rtx (REG, SImode, 2),
639 ** gen_rtx (REG, SImode, 3)))),
644 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
646 int i; /* Array indices... */
647 const char *fmt; /* Current rtx's format... */
648 rtx rt_val; /* RTX to return to caller... */
651 VA_FIXEDARG (p, enum rtx_code, code);
652 VA_FIXEDARG (p, enum machine_mode, mode);
657 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
662 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
663 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
665 rt_val = immed_double_const (arg0, arg1, mode);
670 rt_val = gen_rtx_REG (mode, va_arg (p, int));
674 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
678 rt_val = rtx_alloc (code); /* Allocate the storage space. */
679 rt_val->mode = mode; /* Store the machine mode... */
681 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
682 for (i = 0; i < GET_RTX_LENGTH (code); i++)
686 case '0': /* Unused field. */
689 case 'i': /* An integer? */
690 XINT (rt_val, i) = va_arg (p, int);
693 case 'w': /* A wide integer? */
694 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
697 case 's': /* A string? */
698 XSTR (rt_val, i) = va_arg (p, char *);
701 case 'e': /* An expression? */
702 case 'u': /* An insn? Same except when printing. */
703 XEXP (rt_val, i) = va_arg (p, rtx);
706 case 'E': /* An RTX vector? */
707 XVEC (rt_val, i) = va_arg (p, rtvec);
710 case 'b': /* A bitmap? */
711 XBITMAP (rt_val, i) = va_arg (p, bitmap);
714 case 't': /* A tree? */
715 XTREE (rt_val, i) = va_arg (p, tree);
729 /* gen_rtvec (n, [rt1, ..., rtn])
731 ** This routine creates an rtvec and stores within it the
732 ** pointers to rtx's which are its arguments.
737 gen_rtvec VPARAMS ((int n, ...))
743 VA_FIXEDARG (p, int, n);
746 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
748 vector = (rtx *) alloca (n * sizeof (rtx));
750 for (i = 0; i < n; i++)
751 vector[i] = va_arg (p, rtx);
753 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
757 return gen_rtvec_v (save_n, vector);
761 gen_rtvec_v (n, argp)
769 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
771 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
773 for (i = 0; i < n; i++)
774 rt_val->elem[i] = *argp++;
779 /* Generate a REG rtx for a new pseudo register of mode MODE.
780 This pseudo is assigned the next sequential register number. */
784 enum machine_mode mode;
786 struct function *f = cfun;
789 /* Don't let anything called after initial flow analysis create new
794 if (generating_concat_p
795 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
796 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
798 /* For complex modes, don't make a single pseudo.
799 Instead, make a CONCAT of two pseudos.
800 This allows noncontiguous allocation of the real and imaginary parts,
801 which makes much better code. Besides, allocating DCmode
802 pseudos overstrains reload on some machines like the 386. */
803 rtx realpart, imagpart;
804 int size = GET_MODE_UNIT_SIZE (mode);
805 enum machine_mode partmode
806 = mode_for_size (size * BITS_PER_UNIT,
807 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
808 ? MODE_FLOAT : MODE_INT),
811 realpart = gen_reg_rtx (partmode);
812 imagpart = gen_reg_rtx (partmode);
813 return gen_rtx_CONCAT (mode, realpart, imagpart);
816 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
817 enough to have an element for this pseudo reg number. */
819 if (reg_rtx_no == f->emit->regno_pointer_align_length)
821 int old_size = f->emit->regno_pointer_align_length;
826 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
827 memset (new + old_size, 0, old_size);
828 f->emit->regno_pointer_align = (unsigned char *) new;
830 new1 = (rtx *) ggc_realloc (f->emit->x_regno_reg_rtx,
831 old_size * 2 * sizeof (rtx));
832 memset (new1 + old_size, 0, old_size * sizeof (rtx));
833 regno_reg_rtx = new1;
835 new2 = (tree *) ggc_realloc (f->emit->regno_decl,
836 old_size * 2 * sizeof (tree));
837 memset (new2 + old_size, 0, old_size * sizeof (tree));
838 f->emit->regno_decl = new2;
840 f->emit->regno_pointer_align_length = old_size * 2;
843 val = gen_raw_REG (mode, reg_rtx_no);
844 regno_reg_rtx[reg_rtx_no++] = val;
848 /* Identify REG (which may be a CONCAT) as a user register. */
854 if (GET_CODE (reg) == CONCAT)
856 REG_USERVAR_P (XEXP (reg, 0)) = 1;
857 REG_USERVAR_P (XEXP (reg, 1)) = 1;
859 else if (GET_CODE (reg) == REG)
860 REG_USERVAR_P (reg) = 1;
865 /* Identify REG as a probable pointer register and show its alignment
866 as ALIGN, if nonzero. */
869 mark_reg_pointer (reg, align)
873 if (! REG_POINTER (reg))
875 REG_POINTER (reg) = 1;
878 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
880 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
881 /* We can no-longer be sure just how aligned this pointer is */
882 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
885 /* Return 1 plus largest pseudo reg number used in the current function. */
893 /* Return 1 + the largest label number used so far in the current function. */
898 if (last_label_num && label_num == base_label_num)
899 return last_label_num;
903 /* Return first label number used in this function (if any were used). */
906 get_first_label_num ()
908 return first_label_num;
911 /* Return the final regno of X, which is a SUBREG of a hard
914 subreg_hard_regno (x, check_mode)
918 enum machine_mode mode = GET_MODE (x);
919 unsigned int byte_offset, base_regno, final_regno;
920 rtx reg = SUBREG_REG (x);
922 /* This is where we attempt to catch illegal subregs
923 created by the compiler. */
924 if (GET_CODE (x) != SUBREG
925 || GET_CODE (reg) != REG)
927 base_regno = REGNO (reg);
928 if (base_regno >= FIRST_PSEUDO_REGISTER)
930 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
933 /* Catch non-congruent offsets too. */
934 byte_offset = SUBREG_BYTE (x);
935 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
938 final_regno = subreg_regno (x);
943 /* Return a value representing some low-order bits of X, where the number
944 of low-order bits is given by MODE. Note that no conversion is done
945 between floating-point and fixed-point values, rather, the bit
946 representation is returned.
948 This function handles the cases in common between gen_lowpart, below,
949 and two variants in cse.c and combine.c. These are the cases that can
950 be safely handled at all points in the compilation.
952 If this is not a case we can handle, return 0. */
955 gen_lowpart_common (mode, x)
956 enum machine_mode mode;
959 int msize = GET_MODE_SIZE (mode);
960 int xsize = GET_MODE_SIZE (GET_MODE (x));
963 if (GET_MODE (x) == mode)
966 /* MODE must occupy no more words than the mode of X. */
967 if (GET_MODE (x) != VOIDmode
968 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
969 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
972 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
973 if (GET_MODE_CLASS (mode) == MODE_FLOAT
974 && GET_MODE (x) != VOIDmode && msize > xsize)
977 offset = subreg_lowpart_offset (mode, GET_MODE (x));
979 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
980 && (GET_MODE_CLASS (mode) == MODE_INT
981 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
983 /* If we are getting the low-order part of something that has been
984 sign- or zero-extended, we can either just use the object being
985 extended or make a narrower extension. If we want an even smaller
986 piece than the size of the object being extended, call ourselves
989 This case is used mostly by combine and cse. */
991 if (GET_MODE (XEXP (x, 0)) == mode)
993 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
994 return gen_lowpart_common (mode, XEXP (x, 0));
995 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
996 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
998 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
999 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1000 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1001 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1002 from the low-order part of the constant. */
1003 else if ((GET_MODE_CLASS (mode) == MODE_INT
1004 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1005 && GET_MODE (x) == VOIDmode
1006 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1008 /* If MODE is twice the host word size, X is already the desired
1009 representation. Otherwise, if MODE is wider than a word, we can't
1010 do this. If MODE is exactly a word, return just one CONST_INT. */
1012 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1014 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1016 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1017 return (GET_CODE (x) == CONST_INT ? x
1018 : GEN_INT (CONST_DOUBLE_LOW (x)));
1021 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1022 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1023 : CONST_DOUBLE_LOW (x));
1025 /* Sign extend to HOST_WIDE_INT. */
1026 val = trunc_int_for_mode (val, mode);
1028 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1033 /* The floating-point emulator can handle all conversions between
1034 FP and integer operands. This simplifies reload because it
1035 doesn't have to deal with constructs like (subreg:DI
1036 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1037 /* Single-precision floats are always 32-bits and double-precision
1038 floats are always 64-bits. */
1040 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1041 && GET_MODE_BITSIZE (mode) == 32
1042 && GET_CODE (x) == CONST_INT)
1045 long i = INTVAL (x);
1047 real_from_target (&r, &i, mode);
1048 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1050 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1051 && GET_MODE_BITSIZE (mode) == 64
1052 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1053 && GET_MODE (x) == VOIDmode)
1056 HOST_WIDE_INT low, high;
1059 if (GET_CODE (x) == CONST_INT)
1062 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1066 low = CONST_DOUBLE_LOW (x);
1067 high = CONST_DOUBLE_HIGH (x);
1070 if (HOST_BITS_PER_WIDE_INT > 32)
1071 high = low >> 31 >> 1;
1073 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1075 if (WORDS_BIG_ENDIAN)
1076 i[0] = high, i[1] = low;
1078 i[0] = low, i[1] = high;
1080 real_from_target (&r, i, mode);
1081 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1083 else if ((GET_MODE_CLASS (mode) == MODE_INT
1084 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1085 && GET_CODE (x) == CONST_DOUBLE
1086 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1089 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1090 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1092 /* Convert 'r' into an array of four 32-bit words in target word
1094 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1095 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1098 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1101 i[3 - 3 * endian] = 0;
1104 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1105 i[2 - 2 * endian] = 0;
1106 i[3 - 2 * endian] = 0;
1109 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1110 i[3 - 3 * endian] = 0;
1113 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1118 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1120 #if HOST_BITS_PER_WIDE_INT == 32
1121 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1123 if (HOST_BITS_PER_WIDE_INT != 64)
1126 return immed_double_const ((((unsigned long) i[3 * endian])
1127 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1128 (((unsigned long) i[2 - endian])
1129 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1134 /* Otherwise, we can't do this. */
1138 /* Return the real part (which has mode MODE) of a complex value X.
1139 This always comes at the low address in memory. */
1142 gen_realpart (mode, x)
1143 enum machine_mode mode;
1146 if (WORDS_BIG_ENDIAN
1147 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1149 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1151 ("can't access real part of complex value in hard register");
1152 else if (WORDS_BIG_ENDIAN)
1153 return gen_highpart (mode, x);
1155 return gen_lowpart (mode, x);
1158 /* Return the imaginary part (which has mode MODE) of a complex value X.
1159 This always comes at the high address in memory. */
1162 gen_imagpart (mode, x)
1163 enum machine_mode mode;
1166 if (WORDS_BIG_ENDIAN)
1167 return gen_lowpart (mode, x);
1168 else if (! WORDS_BIG_ENDIAN
1169 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1171 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1173 ("can't access imaginary part of complex value in hard register");
1175 return gen_highpart (mode, x);
1178 /* Return 1 iff X, assumed to be a SUBREG,
1179 refers to the real part of the complex value in its containing reg.
1180 Complex values are always stored with the real part in the first word,
1181 regardless of WORDS_BIG_ENDIAN. */
1184 subreg_realpart_p (x)
1187 if (GET_CODE (x) != SUBREG)
1190 return ((unsigned int) SUBREG_BYTE (x)
1191 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1194 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1195 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1196 least-significant part of X.
1197 MODE specifies how big a part of X to return;
1198 it usually should not be larger than a word.
1199 If X is a MEM whose address is a QUEUED, the value may be so also. */
1202 gen_lowpart (mode, x)
1203 enum machine_mode mode;
1206 rtx result = gen_lowpart_common (mode, x);
1210 else if (GET_CODE (x) == REG)
1212 /* Must be a hard reg that's not valid in MODE. */
1213 result = gen_lowpart_common (mode, copy_to_reg (x));
1218 else if (GET_CODE (x) == MEM)
1220 /* The only additional case we can do is MEM. */
1222 if (WORDS_BIG_ENDIAN)
1223 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1224 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1226 if (BYTES_BIG_ENDIAN)
1227 /* Adjust the address so that the address-after-the-data
1229 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1230 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1232 return adjust_address (x, mode, offset);
1234 else if (GET_CODE (x) == ADDRESSOF)
1235 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1240 /* Like `gen_lowpart', but refer to the most significant part.
1241 This is used to access the imaginary part of a complex number. */
1244 gen_highpart (mode, x)
1245 enum machine_mode mode;
1248 unsigned int msize = GET_MODE_SIZE (mode);
1251 /* This case loses if X is a subreg. To catch bugs early,
1252 complain if an invalid MODE is used even in other cases. */
1253 if (msize > UNITS_PER_WORD
1254 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1257 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1258 subreg_highpart_offset (mode, GET_MODE (x)));
1260 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1261 the target if we have a MEM. gen_highpart must return a valid operand,
1262 emitting code if necessary to do so. */
1263 if (result != NULL_RTX && GET_CODE (result) == MEM)
1264 result = validize_mem (result);
1271 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1272 be VOIDmode constant. */
1274 gen_highpart_mode (outermode, innermode, exp)
1275 enum machine_mode outermode, innermode;
1278 if (GET_MODE (exp) != VOIDmode)
1280 if (GET_MODE (exp) != innermode)
1282 return gen_highpart (outermode, exp);
1284 return simplify_gen_subreg (outermode, exp, innermode,
1285 subreg_highpart_offset (outermode, innermode));
1288 /* Return offset in bytes to get OUTERMODE low part
1289 of the value in mode INNERMODE stored in memory in target format. */
1292 subreg_lowpart_offset (outermode, innermode)
1293 enum machine_mode outermode, innermode;
1295 unsigned int offset = 0;
1296 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1300 if (WORDS_BIG_ENDIAN)
1301 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1302 if (BYTES_BIG_ENDIAN)
1303 offset += difference % UNITS_PER_WORD;
1309 /* Return offset in bytes to get OUTERMODE high part
1310 of the value in mode INNERMODE stored in memory in target format. */
1312 subreg_highpart_offset (outermode, innermode)
1313 enum machine_mode outermode, innermode;
1315 unsigned int offset = 0;
1316 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1318 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1323 if (! WORDS_BIG_ENDIAN)
1324 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1325 if (! BYTES_BIG_ENDIAN)
1326 offset += difference % UNITS_PER_WORD;
1332 /* Return 1 iff X, assumed to be a SUBREG,
1333 refers to the least significant part of its containing reg.
1334 If X is not a SUBREG, always return 1 (it is its own low part!). */
1337 subreg_lowpart_p (x)
1340 if (GET_CODE (x) != SUBREG)
1342 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1345 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1346 == SUBREG_BYTE (x));
1350 /* Helper routine for all the constant cases of operand_subword.
1351 Some places invoke this directly. */
1354 constant_subword (op, offset, mode)
1357 enum machine_mode mode;
1359 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1362 /* If OP is already an integer word, return it. */
1363 if (GET_MODE_CLASS (mode) == MODE_INT
1364 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1367 /* The output is some bits, the width of the target machine's word.
1368 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1370 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1371 && GET_MODE_CLASS (mode) == MODE_FLOAT
1372 && GET_MODE_BITSIZE (mode) == 64
1373 && GET_CODE (op) == CONST_DOUBLE)
1378 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1379 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1381 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1382 which the words are written depends on the word endianness.
1383 ??? This is a potential portability problem and should
1384 be fixed at some point.
1386 We must exercise caution with the sign bit. By definition there
1387 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1388 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1389 So we explicitly mask and sign-extend as necessary. */
1390 if (BITS_PER_WORD == 32)
1393 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1394 return GEN_INT (val);
1396 #if HOST_BITS_PER_WIDE_INT >= 64
1397 else if (BITS_PER_WORD >= 64 && offset == 0)
1399 val = k[! WORDS_BIG_ENDIAN];
1400 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1401 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1402 return GEN_INT (val);
1405 else if (BITS_PER_WORD == 16)
1407 val = k[offset >> 1];
1408 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1410 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1411 return GEN_INT (val);
1416 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1417 && GET_MODE_CLASS (mode) == MODE_FLOAT
1418 && GET_MODE_BITSIZE (mode) > 64
1419 && GET_CODE (op) == CONST_DOUBLE)
1424 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1425 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1427 if (BITS_PER_WORD == 32)
1430 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1431 return GEN_INT (val);
1433 #if HOST_BITS_PER_WIDE_INT >= 64
1434 else if (BITS_PER_WORD >= 64 && offset <= 1)
1436 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1437 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1438 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1439 return GEN_INT (val);
1446 /* Single word float is a little harder, since single- and double-word
1447 values often do not have the same high-order bits. We have already
1448 verified that we want the only defined word of the single-word value. */
1449 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1450 && GET_MODE_BITSIZE (mode) == 32
1451 && GET_CODE (op) == CONST_DOUBLE)
1456 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1457 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1459 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1461 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1463 if (BITS_PER_WORD == 16)
1465 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1467 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1470 return GEN_INT (val);
1473 /* The only remaining cases that we can handle are integers.
1474 Convert to proper endianness now since these cases need it.
1475 At this point, offset == 0 means the low-order word.
1477 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1478 in general. However, if OP is (const_int 0), we can just return
1481 if (op == const0_rtx)
1484 if (GET_MODE_CLASS (mode) != MODE_INT
1485 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1486 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1489 if (WORDS_BIG_ENDIAN)
1490 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1492 /* Find out which word on the host machine this value is in and get
1493 it from the constant. */
1494 val = (offset / size_ratio == 0
1495 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1496 : (GET_CODE (op) == CONST_INT
1497 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1499 /* Get the value we want into the low bits of val. */
1500 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1501 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1503 val = trunc_int_for_mode (val, word_mode);
1505 return GEN_INT (val);
1508 /* Return subword OFFSET of operand OP.
1509 The word number, OFFSET, is interpreted as the word number starting
1510 at the low-order address. OFFSET 0 is the low-order word if not
1511 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1513 If we cannot extract the required word, we return zero. Otherwise,
1514 an rtx corresponding to the requested word will be returned.
1516 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1517 reload has completed, a valid address will always be returned. After
1518 reload, if a valid address cannot be returned, we return zero.
1520 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1521 it is the responsibility of the caller.
1523 MODE is the mode of OP in case it is a CONST_INT.
1525 ??? This is still rather broken for some cases. The problem for the
1526 moment is that all callers of this thing provide no 'goal mode' to
1527 tell us to work with. This exists because all callers were written
1528 in a word based SUBREG world.
1529 Now use of this function can be deprecated by simplify_subreg in most
1534 operand_subword (op, offset, validate_address, mode)
1536 unsigned int offset;
1537 int validate_address;
1538 enum machine_mode mode;
1540 if (mode == VOIDmode)
1541 mode = GET_MODE (op);
1543 if (mode == VOIDmode)
1546 /* If OP is narrower than a word, fail. */
1548 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1551 /* If we want a word outside OP, return zero. */
1553 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1556 /* Form a new MEM at the requested address. */
1557 if (GET_CODE (op) == MEM)
1559 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1561 if (! validate_address)
1564 else if (reload_completed)
1566 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1570 return replace_equiv_address (new, XEXP (new, 0));
1573 /* Rest can be handled by simplify_subreg. */
1574 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1577 /* Similar to `operand_subword', but never return 0. If we can't extract
1578 the required subword, put OP into a register and try again. If that fails,
1579 abort. We always validate the address in this case.
1581 MODE is the mode of OP, in case it is CONST_INT. */
1584 operand_subword_force (op, offset, mode)
1586 unsigned int offset;
1587 enum machine_mode mode;
1589 rtx result = operand_subword (op, offset, 1, mode);
1594 if (mode != BLKmode && mode != VOIDmode)
1596 /* If this is a register which can not be accessed by words, copy it
1597 to a pseudo register. */
1598 if (GET_CODE (op) == REG)
1599 op = copy_to_reg (op);
1601 op = force_reg (mode, op);
1604 result = operand_subword (op, offset, 1, mode);
1611 /* Given a compare instruction, swap the operands.
1612 A test instruction is changed into a compare of 0 against the operand. */
1615 reverse_comparison (insn)
1618 rtx body = PATTERN (insn);
1621 if (GET_CODE (body) == SET)
1622 comp = SET_SRC (body);
1624 comp = SET_SRC (XVECEXP (body, 0, 0));
1626 if (GET_CODE (comp) == COMPARE)
1628 rtx op0 = XEXP (comp, 0);
1629 rtx op1 = XEXP (comp, 1);
1630 XEXP (comp, 0) = op1;
1631 XEXP (comp, 1) = op0;
1635 rtx new = gen_rtx_COMPARE (VOIDmode,
1636 CONST0_RTX (GET_MODE (comp)), comp);
1637 if (GET_CODE (body) == SET)
1638 SET_SRC (body) = new;
1640 SET_SRC (XVECEXP (body, 0, 0)) = new;
1644 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1645 or (2) a component ref of something variable. Represent the later with
1646 a NULL expression. */
1649 component_ref_for_mem_expr (ref)
1652 tree inner = TREE_OPERAND (ref, 0);
1654 if (TREE_CODE (inner) == COMPONENT_REF)
1655 inner = component_ref_for_mem_expr (inner);
1658 tree placeholder_ptr = 0;
1660 /* Now remove any conversions: they don't change what the underlying
1661 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1662 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1663 || TREE_CODE (inner) == NON_LVALUE_EXPR
1664 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1665 || TREE_CODE (inner) == SAVE_EXPR
1666 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1667 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1668 inner = find_placeholder (inner, &placeholder_ptr);
1670 inner = TREE_OPERAND (inner, 0);
1672 if (! DECL_P (inner))
1676 if (inner == TREE_OPERAND (ref, 0))
1679 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1680 TREE_OPERAND (ref, 1));
1683 /* Given REF, a MEM, and T, either the type of X or the expression
1684 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1685 if we are making a new object of this type. BITPOS is nonzero if
1686 there is an offset outstanding on T that will be applied later. */
1689 set_mem_attributes_minus_bitpos (ref, t, objectp, bitpos)
1693 HOST_WIDE_INT bitpos;
1695 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1696 tree expr = MEM_EXPR (ref);
1697 rtx offset = MEM_OFFSET (ref);
1698 rtx size = MEM_SIZE (ref);
1699 unsigned int align = MEM_ALIGN (ref);
1700 HOST_WIDE_INT apply_bitpos = 0;
1703 /* It can happen that type_for_mode was given a mode for which there
1704 is no language-level type. In which case it returns NULL, which
1709 type = TYPE_P (t) ? t : TREE_TYPE (t);
1711 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1712 wrong answer, as it assumes that DECL_RTL already has the right alias
1713 info. Callers should not set DECL_RTL until after the call to
1714 set_mem_attributes. */
1715 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1718 /* Get the alias set from the expression or type (perhaps using a
1719 front-end routine) and use it. */
1720 alias = get_alias_set (t);
1722 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1723 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1724 RTX_UNCHANGING_P (ref)
1725 |= ((lang_hooks.honor_readonly
1726 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1727 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1729 /* If we are making an object of this type, or if this is a DECL, we know
1730 that it is a scalar if the type is not an aggregate. */
1731 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1732 MEM_SCALAR_P (ref) = 1;
1734 /* We can set the alignment from the type if we are making an object,
1735 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1736 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1737 align = MAX (align, TYPE_ALIGN (type));
1739 /* If the size is known, we can set that. */
1740 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1741 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1743 /* If T is not a type, we may be able to deduce some more information about
1747 maybe_set_unchanging (ref, t);
1748 if (TREE_THIS_VOLATILE (t))
1749 MEM_VOLATILE_P (ref) = 1;
1751 /* Now remove any conversions: they don't change what the underlying
1752 object is. Likewise for SAVE_EXPR. */
1753 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1754 || TREE_CODE (t) == NON_LVALUE_EXPR
1755 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1756 || TREE_CODE (t) == SAVE_EXPR)
1757 t = TREE_OPERAND (t, 0);
1759 /* If this expression can't be addressed (e.g., it contains a reference
1760 to a non-addressable field), show we don't change its alias set. */
1761 if (! can_address_p (t))
1762 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1764 /* If this is a decl, set the attributes of the MEM from it. */
1768 offset = const0_rtx;
1769 apply_bitpos = bitpos;
1770 size = (DECL_SIZE_UNIT (t)
1771 && host_integerp (DECL_SIZE_UNIT (t), 1)
1772 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1773 align = DECL_ALIGN (t);
1776 /* If this is a constant, we know the alignment. */
1777 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1779 align = TYPE_ALIGN (type);
1780 #ifdef CONSTANT_ALIGNMENT
1781 align = CONSTANT_ALIGNMENT (t, align);
1785 /* If this is a field reference and not a bit-field, record it. */
1786 /* ??? There is some information that can be gleened from bit-fields,
1787 such as the word offset in the structure that might be modified.
1788 But skip it for now. */
1789 else if (TREE_CODE (t) == COMPONENT_REF
1790 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1792 expr = component_ref_for_mem_expr (t);
1793 offset = const0_rtx;
1794 apply_bitpos = bitpos;
1795 /* ??? Any reason the field size would be different than
1796 the size we got from the type? */
1799 /* If this is an array reference, look for an outer field reference. */
1800 else if (TREE_CODE (t) == ARRAY_REF)
1802 tree off_tree = size_zero_node;
1806 tree index = TREE_OPERAND (t, 1);
1807 tree array = TREE_OPERAND (t, 0);
1808 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1809 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1810 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1812 /* We assume all arrays have sizes that are a multiple of a byte.
1813 First subtract the lower bound, if any, in the type of the
1814 index, then convert to sizetype and multiply by the size of the
1816 if (low_bound != 0 && ! integer_zerop (low_bound))
1817 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1820 /* If the index has a self-referential type, pass it to a
1821 WITH_RECORD_EXPR; if the component size is, pass our
1822 component to one. */
1823 if (! TREE_CONSTANT (index)
1824 && contains_placeholder_p (index))
1825 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t);
1826 if (! TREE_CONSTANT (unit_size)
1827 && contains_placeholder_p (unit_size))
1828 unit_size = build (WITH_RECORD_EXPR, sizetype,
1832 = fold (build (PLUS_EXPR, sizetype,
1833 fold (build (MULT_EXPR, sizetype,
1837 t = TREE_OPERAND (t, 0);
1839 while (TREE_CODE (t) == ARRAY_REF);
1845 if (host_integerp (off_tree, 1))
1847 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1848 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1849 align = DECL_ALIGN (t);
1850 if (aoff && aoff < align)
1852 offset = GEN_INT (ioff);
1853 apply_bitpos = bitpos;
1856 else if (TREE_CODE (t) == COMPONENT_REF)
1858 expr = component_ref_for_mem_expr (t);
1859 if (host_integerp (off_tree, 1))
1861 offset = GEN_INT (tree_low_cst (off_tree, 1));
1862 apply_bitpos = bitpos;
1864 /* ??? Any reason the field size would be different than
1865 the size we got from the type? */
1867 else if (flag_argument_noalias > 1
1868 && TREE_CODE (t) == INDIRECT_REF
1869 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1876 /* If this is a Fortran indirect argument reference, record the
1878 else if (flag_argument_noalias > 1
1879 && TREE_CODE (t) == INDIRECT_REF
1880 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1887 /* If we modified OFFSET based on T, then subtract the outstanding
1888 bit position offset. Similarly, increase the size of the accessed
1889 object to contain the negative offset. */
1892 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1894 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1897 /* Now set the attributes we computed above. */
1899 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1901 /* If this is already known to be a scalar or aggregate, we are done. */
1902 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1905 /* If it is a reference into an aggregate, this is part of an aggregate.
1906 Otherwise we don't know. */
1907 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1908 || TREE_CODE (t) == ARRAY_RANGE_REF
1909 || TREE_CODE (t) == BIT_FIELD_REF)
1910 MEM_IN_STRUCT_P (ref) = 1;
1914 set_mem_attributes (ref, t, objectp)
1919 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1922 /* Set the alias set of MEM to SET. */
1925 set_mem_alias_set (mem, set)
1929 #ifdef ENABLE_CHECKING
1930 /* If the new and old alias sets don't conflict, something is wrong. */
1931 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1935 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1936 MEM_SIZE (mem), MEM_ALIGN (mem),
1940 /* Set the alignment of MEM to ALIGN bits. */
1943 set_mem_align (mem, align)
1947 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1948 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1952 /* Set the expr for MEM to EXPR. */
1955 set_mem_expr (mem, expr)
1960 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1961 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1964 /* Set the offset of MEM to OFFSET. */
1967 set_mem_offset (mem, offset)
1970 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1971 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1975 /* Set the size of MEM to SIZE. */
1978 set_mem_size (mem, size)
1981 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1982 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1986 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1987 and its address changed to ADDR. (VOIDmode means don't change the mode.
1988 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1989 returned memory location is required to be valid. The memory
1990 attributes are not changed. */
1993 change_address_1 (memref, mode, addr, validate)
1995 enum machine_mode mode;
2001 if (GET_CODE (memref) != MEM)
2003 if (mode == VOIDmode)
2004 mode = GET_MODE (memref);
2006 addr = XEXP (memref, 0);
2010 if (reload_in_progress || reload_completed)
2012 if (! memory_address_p (mode, addr))
2016 addr = memory_address (mode, addr);
2019 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2022 new = gen_rtx_MEM (mode, addr);
2023 MEM_COPY_ATTRIBUTES (new, memref);
2027 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2028 way we are changing MEMREF, so we only preserve the alias set. */
2031 change_address (memref, mode, addr)
2033 enum machine_mode mode;
2036 rtx new = change_address_1 (memref, mode, addr, 1);
2037 enum machine_mode mmode = GET_MODE (new);
2040 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2041 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2042 (mmode == BLKmode ? BITS_PER_UNIT
2043 : GET_MODE_ALIGNMENT (mmode)),
2049 /* Return a memory reference like MEMREF, but with its mode changed
2050 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2051 nonzero, the memory address is forced to be valid.
2052 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2053 and caller is responsible for adjusting MEMREF base register. */
2056 adjust_address_1 (memref, mode, offset, validate, adjust)
2058 enum machine_mode mode;
2059 HOST_WIDE_INT offset;
2060 int validate, adjust;
2062 rtx addr = XEXP (memref, 0);
2064 rtx memoffset = MEM_OFFSET (memref);
2066 unsigned int memalign = MEM_ALIGN (memref);
2068 /* ??? Prefer to create garbage instead of creating shared rtl.
2069 This may happen even if offset is non-zero -- consider
2070 (plus (plus reg reg) const_int) -- so do this always. */
2071 addr = copy_rtx (addr);
2075 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2076 object, we can merge it into the LO_SUM. */
2077 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2079 && (unsigned HOST_WIDE_INT) offset
2080 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2081 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2082 plus_constant (XEXP (addr, 1), offset));
2084 addr = plus_constant (addr, offset);
2087 new = change_address_1 (memref, mode, addr, validate);
2089 /* Compute the new values of the memory attributes due to this adjustment.
2090 We add the offsets and update the alignment. */
2092 memoffset = GEN_INT (offset + INTVAL (memoffset));
2094 /* Compute the new alignment by taking the MIN of the alignment and the
2095 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2100 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2102 /* We can compute the size in a number of ways. */
2103 if (GET_MODE (new) != BLKmode)
2104 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2105 else if (MEM_SIZE (memref))
2106 size = plus_constant (MEM_SIZE (memref), -offset);
2108 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2109 memoffset, size, memalign, GET_MODE (new));
2111 /* At some point, we should validate that this offset is within the object,
2112 if all the appropriate values are known. */
2116 /* Return a memory reference like MEMREF, but with its mode changed
2117 to MODE and its address changed to ADDR, which is assumed to be
2118 MEMREF offseted by OFFSET bytes. If VALIDATE is
2119 nonzero, the memory address is forced to be valid. */
2122 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2124 enum machine_mode mode;
2126 HOST_WIDE_INT offset;
2129 memref = change_address_1 (memref, VOIDmode, addr, validate);
2130 return adjust_address_1 (memref, mode, offset, validate, 0);
2133 /* Return a memory reference like MEMREF, but whose address is changed by
2134 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2135 known to be in OFFSET (possibly 1). */
2138 offset_address (memref, offset, pow2)
2143 rtx new, addr = XEXP (memref, 0);
2145 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2147 /* At this point we don't know _why_ the address is invalid. It
2148 could have secondary memory refereces, multiplies or anything.
2150 However, if we did go and rearrange things, we can wind up not
2151 being able to recognize the magic around pic_offset_table_rtx.
2152 This stuff is fragile, and is yet another example of why it is
2153 bad to expose PIC machinery too early. */
2154 if (! memory_address_p (GET_MODE (memref), new)
2155 && GET_CODE (addr) == PLUS
2156 && XEXP (addr, 0) == pic_offset_table_rtx)
2158 addr = force_reg (GET_MODE (addr), addr);
2159 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2162 update_temp_slot_address (XEXP (memref, 0), new);
2163 new = change_address_1 (memref, VOIDmode, new, 1);
2165 /* Update the alignment to reflect the offset. Reset the offset, which
2168 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2169 MIN (MEM_ALIGN (memref),
2170 (unsigned HOST_WIDE_INT) pow2 * BITS_PER_UNIT),
2175 /* Return a memory reference like MEMREF, but with its address changed to
2176 ADDR. The caller is asserting that the actual piece of memory pointed
2177 to is the same, just the form of the address is being changed, such as
2178 by putting something into a register. */
2181 replace_equiv_address (memref, addr)
2185 /* change_address_1 copies the memory attribute structure without change
2186 and that's exactly what we want here. */
2187 update_temp_slot_address (XEXP (memref, 0), addr);
2188 return change_address_1 (memref, VOIDmode, addr, 1);
2191 /* Likewise, but the reference is not required to be valid. */
2194 replace_equiv_address_nv (memref, addr)
2198 return change_address_1 (memref, VOIDmode, addr, 0);
2201 /* Return a memory reference like MEMREF, but with its mode widened to
2202 MODE and offset by OFFSET. This would be used by targets that e.g.
2203 cannot issue QImode memory operations and have to use SImode memory
2204 operations plus masking logic. */
2207 widen_memory_access (memref, mode, offset)
2209 enum machine_mode mode;
2210 HOST_WIDE_INT offset;
2212 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2213 tree expr = MEM_EXPR (new);
2214 rtx memoffset = MEM_OFFSET (new);
2215 unsigned int size = GET_MODE_SIZE (mode);
2217 /* If we don't know what offset we were at within the expression, then
2218 we can't know if we've overstepped the bounds. */
2224 if (TREE_CODE (expr) == COMPONENT_REF)
2226 tree field = TREE_OPERAND (expr, 1);
2228 if (! DECL_SIZE_UNIT (field))
2234 /* Is the field at least as large as the access? If so, ok,
2235 otherwise strip back to the containing structure. */
2236 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2237 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2238 && INTVAL (memoffset) >= 0)
2241 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2247 expr = TREE_OPERAND (expr, 0);
2248 memoffset = (GEN_INT (INTVAL (memoffset)
2249 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2250 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2253 /* Similarly for the decl. */
2254 else if (DECL_P (expr)
2255 && DECL_SIZE_UNIT (expr)
2256 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2257 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2258 && (! memoffset || INTVAL (memoffset) >= 0))
2262 /* The widened memory access overflows the expression, which means
2263 that it could alias another expression. Zap it. */
2270 memoffset = NULL_RTX;
2272 /* The widened memory may alias other stuff, so zap the alias set. */
2273 /* ??? Maybe use get_alias_set on any remaining expression. */
2275 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2276 MEM_ALIGN (new), mode);
2281 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2286 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2287 NULL, label_num++, NULL);
2290 /* For procedure integration. */
2292 /* Install new pointers to the first and last insns in the chain.
2293 Also, set cur_insn_uid to one higher than the last in use.
2294 Used for an inline-procedure after copying the insn chain. */
2297 set_new_first_and_last_insn (first, last)
2306 for (insn = first; insn; insn = NEXT_INSN (insn))
2307 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2312 /* Set the range of label numbers found in the current function.
2313 This is used when belatedly compiling an inline function. */
2316 set_new_first_and_last_label_num (first, last)
2319 base_label_num = label_num;
2320 first_label_num = first;
2321 last_label_num = last;
2324 /* Set the last label number found in the current function.
2325 This is used when belatedly compiling an inline function. */
2328 set_new_last_label_num (last)
2331 base_label_num = label_num;
2332 last_label_num = last;
2335 /* Restore all variables describing the current status from the structure *P.
2336 This is used after a nested function. */
2339 restore_emit_status (p)
2340 struct function *p ATTRIBUTE_UNUSED;
2345 /* Go through all the RTL insn bodies and copy any invalid shared
2346 structure. This routine should only be called once. */
2349 unshare_all_rtl (fndecl, insn)
2355 /* Make sure that virtual parameters are not shared. */
2356 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2357 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2359 /* Make sure that virtual stack slots are not shared. */
2360 unshare_all_decls (DECL_INITIAL (fndecl));
2362 /* Unshare just about everything else. */
2363 unshare_all_rtl_1 (insn);
2365 /* Make sure the addresses of stack slots found outside the insn chain
2366 (such as, in DECL_RTL of a variable) are not shared
2367 with the insn chain.
2369 This special care is necessary when the stack slot MEM does not
2370 actually appear in the insn chain. If it does appear, its address
2371 is unshared from all else at that point. */
2372 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2375 /* Go through all the RTL insn bodies and copy any invalid shared
2376 structure, again. This is a fairly expensive thing to do so it
2377 should be done sparingly. */
2380 unshare_all_rtl_again (insn)
2386 for (p = insn; p; p = NEXT_INSN (p))
2389 reset_used_flags (PATTERN (p));
2390 reset_used_flags (REG_NOTES (p));
2391 reset_used_flags (LOG_LINKS (p));
2394 /* Make sure that virtual stack slots are not shared. */
2395 reset_used_decls (DECL_INITIAL (cfun->decl));
2397 /* Make sure that virtual parameters are not shared. */
2398 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2399 reset_used_flags (DECL_RTL (decl));
2401 reset_used_flags (stack_slot_list);
2403 unshare_all_rtl (cfun->decl, insn);
2406 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2407 Assumes the mark bits are cleared at entry. */
2410 unshare_all_rtl_1 (insn)
2413 for (; insn; insn = NEXT_INSN (insn))
2416 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2417 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2418 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2422 /* Go through all virtual stack slots of a function and copy any
2423 shared structure. */
2425 unshare_all_decls (blk)
2430 /* Copy shared decls. */
2431 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2432 if (DECL_RTL_SET_P (t))
2433 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2435 /* Now process sub-blocks. */
2436 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2437 unshare_all_decls (t);
2440 /* Go through all virtual stack slots of a function and mark them as
2443 reset_used_decls (blk)
2449 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2450 if (DECL_RTL_SET_P (t))
2451 reset_used_flags (DECL_RTL (t));
2453 /* Now process sub-blocks. */
2454 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2455 reset_used_decls (t);
2458 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2459 placed in the result directly, rather than being copied. MAY_SHARE is
2460 either a MEM of an EXPR_LIST of MEMs. */
2463 copy_most_rtx (orig, may_share)
2470 const char *format_ptr;
2472 if (orig == may_share
2473 || (GET_CODE (may_share) == EXPR_LIST
2474 && in_expr_list_p (may_share, orig)))
2477 code = GET_CODE (orig);
2495 copy = rtx_alloc (code);
2496 PUT_MODE (copy, GET_MODE (orig));
2497 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2498 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2499 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2500 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2501 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2503 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2505 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2507 switch (*format_ptr++)
2510 XEXP (copy, i) = XEXP (orig, i);
2511 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2512 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2516 XEXP (copy, i) = XEXP (orig, i);
2521 XVEC (copy, i) = XVEC (orig, i);
2522 if (XVEC (orig, i) != NULL)
2524 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2525 for (j = 0; j < XVECLEN (copy, i); j++)
2526 XVECEXP (copy, i, j)
2527 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2532 XWINT (copy, i) = XWINT (orig, i);
2537 XINT (copy, i) = XINT (orig, i);
2541 XTREE (copy, i) = XTREE (orig, i);
2546 XSTR (copy, i) = XSTR (orig, i);
2550 /* Copy this through the wide int field; that's safest. */
2551 X0WINT (copy, i) = X0WINT (orig, i);
2561 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2562 Recursively does the same for subexpressions. */
2565 copy_rtx_if_shared (orig)
2571 const char *format_ptr;
2577 code = GET_CODE (x);
2579 /* These types may be freely shared. */
2593 /* SCRATCH must be shared because they represent distinct values. */
2597 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2598 a LABEL_REF, it isn't sharable. */
2599 if (GET_CODE (XEXP (x, 0)) == PLUS
2600 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2601 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2610 /* The chain of insns is not being copied. */
2614 /* A MEM is allowed to be shared if its address is constant.
2616 We used to allow sharing of MEMs which referenced
2617 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2618 that can lose. instantiate_virtual_regs will not unshare
2619 the MEMs, and combine may change the structure of the address
2620 because it looks safe and profitable in one context, but
2621 in some other context it creates unrecognizable RTL. */
2622 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2631 /* This rtx may not be shared. If it has already been seen,
2632 replace it with a copy of itself. */
2634 if (RTX_FLAG (x, used))
2638 copy = rtx_alloc (code);
2640 (sizeof (*copy) - sizeof (copy->fld)
2641 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2645 RTX_FLAG (x, used) = 1;
2647 /* Now scan the subexpressions recursively.
2648 We can store any replaced subexpressions directly into X
2649 since we know X is not shared! Any vectors in X
2650 must be copied if X was copied. */
2652 format_ptr = GET_RTX_FORMAT (code);
2654 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2656 switch (*format_ptr++)
2659 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2663 if (XVEC (x, i) != NULL)
2666 int len = XVECLEN (x, i);
2668 if (copied && len > 0)
2669 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2670 for (j = 0; j < len; j++)
2671 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2679 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2680 to look for shared sub-parts. */
2683 reset_used_flags (x)
2688 const char *format_ptr;
2693 code = GET_CODE (x);
2695 /* These types may be freely shared so we needn't do any resetting
2717 /* The chain of insns is not being copied. */
2724 RTX_FLAG (x, used) = 0;
2726 format_ptr = GET_RTX_FORMAT (code);
2727 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2729 switch (*format_ptr++)
2732 reset_used_flags (XEXP (x, i));
2736 for (j = 0; j < XVECLEN (x, i); j++)
2737 reset_used_flags (XVECEXP (x, i, j));
2743 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2744 Return X or the rtx for the pseudo reg the value of X was copied into.
2745 OTHER must be valid as a SET_DEST. */
2748 make_safe_from (x, other)
2752 switch (GET_CODE (other))
2755 other = SUBREG_REG (other);
2757 case STRICT_LOW_PART:
2760 other = XEXP (other, 0);
2766 if ((GET_CODE (other) == MEM
2768 && GET_CODE (x) != REG
2769 && GET_CODE (x) != SUBREG)
2770 || (GET_CODE (other) == REG
2771 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2772 || reg_mentioned_p (other, x))))
2774 rtx temp = gen_reg_rtx (GET_MODE (x));
2775 emit_move_insn (temp, x);
2781 /* Emission of insns (adding them to the doubly-linked list). */
2783 /* Return the first insn of the current sequence or current function. */
2791 /* Specify a new insn as the first in the chain. */
2794 set_first_insn (insn)
2797 if (PREV_INSN (insn) != 0)
2802 /* Return the last insn emitted in current sequence or current function. */
2810 /* Specify a new insn as the last in the chain. */
2813 set_last_insn (insn)
2816 if (NEXT_INSN (insn) != 0)
2821 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2824 get_last_insn_anywhere ()
2826 struct sequence_stack *stack;
2829 for (stack = seq_stack; stack; stack = stack->next)
2830 if (stack->last != 0)
2835 /* Return the first nonnote insn emitted in current sequence or current
2836 function. This routine looks inside SEQUENCEs. */
2839 get_first_nonnote_insn ()
2841 rtx insn = first_insn;
2845 insn = next_insn (insn);
2846 if (insn == 0 || GET_CODE (insn) != NOTE)
2853 /* Return the last nonnote insn emitted in current sequence or current
2854 function. This routine looks inside SEQUENCEs. */
2857 get_last_nonnote_insn ()
2859 rtx insn = last_insn;
2863 insn = previous_insn (insn);
2864 if (insn == 0 || GET_CODE (insn) != NOTE)
2871 /* Return a number larger than any instruction's uid in this function. */
2876 return cur_insn_uid;
2879 /* Renumber instructions so that no instruction UIDs are wasted. */
2882 renumber_insns (stream)
2887 /* If we're not supposed to renumber instructions, don't. */
2888 if (!flag_renumber_insns)
2891 /* If there aren't that many instructions, then it's not really
2892 worth renumbering them. */
2893 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2898 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2901 fprintf (stream, "Renumbering insn %d to %d\n",
2902 INSN_UID (insn), cur_insn_uid);
2903 INSN_UID (insn) = cur_insn_uid++;
2907 /* Return the next insn. If it is a SEQUENCE, return the first insn
2916 insn = NEXT_INSN (insn);
2917 if (insn && GET_CODE (insn) == INSN
2918 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2919 insn = XVECEXP (PATTERN (insn), 0, 0);
2925 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2929 previous_insn (insn)
2934 insn = PREV_INSN (insn);
2935 if (insn && GET_CODE (insn) == INSN
2936 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2937 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2943 /* Return the next insn after INSN that is not a NOTE. This routine does not
2944 look inside SEQUENCEs. */
2947 next_nonnote_insn (insn)
2952 insn = NEXT_INSN (insn);
2953 if (insn == 0 || GET_CODE (insn) != NOTE)
2960 /* Return the previous insn before INSN that is not a NOTE. This routine does
2961 not look inside SEQUENCEs. */
2964 prev_nonnote_insn (insn)
2969 insn = PREV_INSN (insn);
2970 if (insn == 0 || GET_CODE (insn) != NOTE)
2977 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2978 or 0, if there is none. This routine does not look inside
2982 next_real_insn (insn)
2987 insn = NEXT_INSN (insn);
2988 if (insn == 0 || GET_CODE (insn) == INSN
2989 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2996 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2997 or 0, if there is none. This routine does not look inside
3001 prev_real_insn (insn)
3006 insn = PREV_INSN (insn);
3007 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3008 || GET_CODE (insn) == JUMP_INSN)
3015 /* Find the next insn after INSN that really does something. This routine
3016 does not look inside SEQUENCEs. Until reload has completed, this is the
3017 same as next_real_insn. */
3020 active_insn_p (insn)
3023 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3024 || (GET_CODE (insn) == INSN
3025 && (! reload_completed
3026 || (GET_CODE (PATTERN (insn)) != USE
3027 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3031 next_active_insn (insn)
3036 insn = NEXT_INSN (insn);
3037 if (insn == 0 || active_insn_p (insn))
3044 /* Find the last insn before INSN that really does something. This routine
3045 does not look inside SEQUENCEs. Until reload has completed, this is the
3046 same as prev_real_insn. */
3049 prev_active_insn (insn)
3054 insn = PREV_INSN (insn);
3055 if (insn == 0 || active_insn_p (insn))
3062 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3070 insn = NEXT_INSN (insn);
3071 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3078 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3086 insn = PREV_INSN (insn);
3087 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3095 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3096 and REG_CC_USER notes so we can find it. */
3099 link_cc0_insns (insn)
3102 rtx user = next_nonnote_insn (insn);
3104 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3105 user = XVECEXP (PATTERN (user), 0, 0);
3107 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3109 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3112 /* Return the next insn that uses CC0 after INSN, which is assumed to
3113 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3114 applied to the result of this function should yield INSN).
3116 Normally, this is simply the next insn. However, if a REG_CC_USER note
3117 is present, it contains the insn that uses CC0.
3119 Return 0 if we can't find the insn. */
3122 next_cc0_user (insn)
3125 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3128 return XEXP (note, 0);
3130 insn = next_nonnote_insn (insn);
3131 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3132 insn = XVECEXP (PATTERN (insn), 0, 0);
3134 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3140 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3141 note, it is the previous insn. */
3144 prev_cc0_setter (insn)
3147 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3150 return XEXP (note, 0);
3152 insn = prev_nonnote_insn (insn);
3153 if (! sets_cc0_p (PATTERN (insn)))
3160 /* Increment the label uses for all labels present in rtx. */
3163 mark_label_nuses (x)
3170 code = GET_CODE (x);
3171 if (code == LABEL_REF)
3172 LABEL_NUSES (XEXP (x, 0))++;
3174 fmt = GET_RTX_FORMAT (code);
3175 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3178 mark_label_nuses (XEXP (x, i));
3179 else if (fmt[i] == 'E')
3180 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3181 mark_label_nuses (XVECEXP (x, i, j));
3186 /* Try splitting insns that can be split for better scheduling.
3187 PAT is the pattern which might split.
3188 TRIAL is the insn providing PAT.
3189 LAST is non-zero if we should return the last insn of the sequence produced.
3191 If this routine succeeds in splitting, it returns the first or last
3192 replacement insn depending on the value of LAST. Otherwise, it
3193 returns TRIAL. If the insn to be returned can be split, it will be. */
3196 try_split (pat, trial, last)
3200 rtx before = PREV_INSN (trial);
3201 rtx after = NEXT_INSN (trial);
3202 int has_barrier = 0;
3207 if (any_condjump_p (trial)
3208 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3209 split_branch_probability = INTVAL (XEXP (note, 0));
3210 probability = split_branch_probability;
3212 seq = split_insns (pat, trial);
3214 split_branch_probability = -1;
3216 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3217 We may need to handle this specially. */
3218 if (after && GET_CODE (after) == BARRIER)
3221 after = NEXT_INSN (after);
3226 /* Sometimes there will be only one insn in that list, this case will
3227 normally arise only when we want it in turn to be split (SFmode on
3228 the 29k is an example). */
3229 if (NEXT_INSN (seq) != NULL_RTX)
3231 rtx insn_last, insn;
3234 /* Avoid infinite loop if any insn of the result matches
3235 the original pattern. */
3239 if (INSN_P (insn_last)
3240 && rtx_equal_p (PATTERN (insn_last), pat))
3242 if (NEXT_INSN (insn_last) == NULL_RTX)
3244 insn_last = NEXT_INSN (insn_last);
3249 while (insn != NULL_RTX)
3251 if (GET_CODE (insn) == JUMP_INSN)
3253 mark_jump_label (PATTERN (insn), insn, 0);
3255 if (probability != -1
3256 && any_condjump_p (insn)
3257 && !find_reg_note (insn, REG_BR_PROB, 0))
3259 /* We can preserve the REG_BR_PROB notes only if exactly
3260 one jump is created, otherwise the machine description
3261 is responsible for this step using
3262 split_branch_probability variable. */
3266 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3267 GEN_INT (probability),
3272 insn = PREV_INSN (insn);
3275 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3276 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3277 if (GET_CODE (trial) == CALL_INSN)
3280 while (insn != NULL_RTX)
3282 if (GET_CODE (insn) == CALL_INSN)
3283 CALL_INSN_FUNCTION_USAGE (insn)
3284 = CALL_INSN_FUNCTION_USAGE (trial);
3286 insn = PREV_INSN (insn);
3290 /* Copy notes, particularly those related to the CFG. */
3291 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3293 switch (REG_NOTE_KIND (note))
3297 while (insn != NULL_RTX)
3299 if (GET_CODE (insn) == CALL_INSN
3300 || (flag_non_call_exceptions
3301 && may_trap_p (PATTERN (insn))))
3303 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3306 insn = PREV_INSN (insn);
3312 case REG_ALWAYS_RETURN:
3314 while (insn != NULL_RTX)
3316 if (GET_CODE (insn) == CALL_INSN)
3318 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3321 insn = PREV_INSN (insn);
3325 case REG_NON_LOCAL_GOTO:
3327 while (insn != NULL_RTX)
3329 if (GET_CODE (insn) == JUMP_INSN)
3331 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3334 insn = PREV_INSN (insn);
3343 /* If there are LABELS inside the split insns increment the
3344 usage count so we don't delete the label. */
3345 if (GET_CODE (trial) == INSN)
3348 while (insn != NULL_RTX)
3350 if (GET_CODE (insn) == INSN)
3351 mark_label_nuses (PATTERN (insn));
3353 insn = PREV_INSN (insn);
3357 tem = emit_insn_after_scope (seq, trial, INSN_SCOPE (trial));
3359 delete_insn (trial);
3361 emit_barrier_after (tem);
3363 /* Recursively call try_split for each new insn created; by the
3364 time control returns here that insn will be fully split, so
3365 set LAST and continue from the insn after the one returned.
3366 We can't use next_active_insn here since AFTER may be a note.
3367 Ignore deleted insns, which can be occur if not optimizing. */
3368 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3369 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3370 tem = try_split (PATTERN (tem), tem, 1);
3372 /* Avoid infinite loop if the result matches the original pattern. */
3373 else if (rtx_equal_p (PATTERN (seq), pat))
3377 PATTERN (trial) = PATTERN (seq);
3378 INSN_CODE (trial) = -1;
3379 try_split (PATTERN (trial), trial, last);
3382 /* Return either the first or the last insn, depending on which was
3385 ? (after ? PREV_INSN (after) : last_insn)
3386 : NEXT_INSN (before);
3392 /* Make and return an INSN rtx, initializing all its slots.
3393 Store PATTERN in the pattern slots. */
3396 make_insn_raw (pattern)
3401 insn = rtx_alloc (INSN);
3403 INSN_UID (insn) = cur_insn_uid++;
3404 PATTERN (insn) = pattern;
3405 INSN_CODE (insn) = -1;
3406 LOG_LINKS (insn) = NULL;
3407 REG_NOTES (insn) = NULL;
3408 INSN_SCOPE (insn) = NULL;
3409 BLOCK_FOR_INSN (insn) = NULL;
3411 #ifdef ENABLE_RTL_CHECKING
3414 && (returnjump_p (insn)
3415 || (GET_CODE (insn) == SET
3416 && SET_DEST (insn) == pc_rtx)))
3418 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3426 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3429 make_jump_insn_raw (pattern)
3434 insn = rtx_alloc (JUMP_INSN);
3435 INSN_UID (insn) = cur_insn_uid++;
3437 PATTERN (insn) = pattern;
3438 INSN_CODE (insn) = -1;
3439 LOG_LINKS (insn) = NULL;
3440 REG_NOTES (insn) = NULL;
3441 JUMP_LABEL (insn) = NULL;
3442 INSN_SCOPE (insn) = NULL;
3443 BLOCK_FOR_INSN (insn) = NULL;
3448 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3451 make_call_insn_raw (pattern)
3456 insn = rtx_alloc (CALL_INSN);
3457 INSN_UID (insn) = cur_insn_uid++;
3459 PATTERN (insn) = pattern;
3460 INSN_CODE (insn) = -1;
3461 LOG_LINKS (insn) = NULL;
3462 REG_NOTES (insn) = NULL;
3463 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3464 INSN_SCOPE (insn) = NULL;
3465 BLOCK_FOR_INSN (insn) = NULL;
3470 /* Add INSN to the end of the doubly-linked list.
3471 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3477 PREV_INSN (insn) = last_insn;
3478 NEXT_INSN (insn) = 0;
3480 if (NULL != last_insn)
3481 NEXT_INSN (last_insn) = insn;
3483 if (NULL == first_insn)
3489 /* Add INSN into the doubly-linked list after insn AFTER. This and
3490 the next should be the only functions called to insert an insn once
3491 delay slots have been filled since only they know how to update a
3495 add_insn_after (insn, after)
3498 rtx next = NEXT_INSN (after);
3501 if (optimize && INSN_DELETED_P (after))
3504 NEXT_INSN (insn) = next;
3505 PREV_INSN (insn) = after;
3509 PREV_INSN (next) = insn;
3510 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3511 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3513 else if (last_insn == after)
3517 struct sequence_stack *stack = seq_stack;
3518 /* Scan all pending sequences too. */
3519 for (; stack; stack = stack->next)
3520 if (after == stack->last)
3530 if (GET_CODE (after) != BARRIER
3531 && GET_CODE (insn) != BARRIER
3532 && (bb = BLOCK_FOR_INSN (after)))
3534 set_block_for_insn (insn, bb);
3536 bb->flags |= BB_DIRTY;
3537 /* Should not happen as first in the BB is always
3538 either NOTE or LABEL. */
3539 if (bb->end == after
3540 /* Avoid clobbering of structure when creating new BB. */
3541 && GET_CODE (insn) != BARRIER
3542 && (GET_CODE (insn) != NOTE
3543 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3547 NEXT_INSN (after) = insn;
3548 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3550 rtx sequence = PATTERN (after);
3551 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3555 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3556 the previous should be the only functions called to insert an insn once
3557 delay slots have been filled since only they know how to update a
3561 add_insn_before (insn, before)
3564 rtx prev = PREV_INSN (before);
3567 if (optimize && INSN_DELETED_P (before))
3570 PREV_INSN (insn) = prev;
3571 NEXT_INSN (insn) = before;
3575 NEXT_INSN (prev) = insn;
3576 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3578 rtx sequence = PATTERN (prev);
3579 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3582 else if (first_insn == before)
3586 struct sequence_stack *stack = seq_stack;
3587 /* Scan all pending sequences too. */
3588 for (; stack; stack = stack->next)
3589 if (before == stack->first)
3591 stack->first = insn;
3599 if (GET_CODE (before) != BARRIER
3600 && GET_CODE (insn) != BARRIER
3601 && (bb = BLOCK_FOR_INSN (before)))
3603 set_block_for_insn (insn, bb);
3605 bb->flags |= BB_DIRTY;
3606 /* Should not happen as first in the BB is always
3607 either NOTE or LABEl. */
3608 if (bb->head == insn
3609 /* Avoid clobbering of structure when creating new BB. */
3610 && GET_CODE (insn) != BARRIER
3611 && (GET_CODE (insn) != NOTE
3612 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3616 PREV_INSN (before) = insn;
3617 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3618 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3621 /* Remove an insn from its doubly-linked list. This function knows how
3622 to handle sequences. */
3627 rtx next = NEXT_INSN (insn);
3628 rtx prev = PREV_INSN (insn);
3633 NEXT_INSN (prev) = next;
3634 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3636 rtx sequence = PATTERN (prev);
3637 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3640 else if (first_insn == insn)
3644 struct sequence_stack *stack = seq_stack;
3645 /* Scan all pending sequences too. */
3646 for (; stack; stack = stack->next)
3647 if (insn == stack->first)
3649 stack->first = next;
3659 PREV_INSN (next) = prev;
3660 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3661 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3663 else if (last_insn == insn)
3667 struct sequence_stack *stack = seq_stack;
3668 /* Scan all pending sequences too. */
3669 for (; stack; stack = stack->next)
3670 if (insn == stack->last)
3679 if (GET_CODE (insn) != BARRIER
3680 && (bb = BLOCK_FOR_INSN (insn)))
3683 bb->flags |= BB_DIRTY;
3684 if (bb->head == insn)
3686 /* Never ever delete the basic block note without deleting whole
3688 if (GET_CODE (insn) == NOTE)
3692 if (bb->end == insn)
3697 /* Delete all insns made since FROM.
3698 FROM becomes the new last instruction. */
3701 delete_insns_since (from)
3707 NEXT_INSN (from) = 0;
3711 /* This function is deprecated, please use sequences instead.
3713 Move a consecutive bunch of insns to a different place in the chain.
3714 The insns to be moved are those between FROM and TO.
3715 They are moved to a new position after the insn AFTER.
3716 AFTER must not be FROM or TO or any insn in between.
3718 This function does not know about SEQUENCEs and hence should not be
3719 called after delay-slot filling has been done. */
3722 reorder_insns_nobb (from, to, after)
3723 rtx from, to, after;
3725 /* Splice this bunch out of where it is now. */
3726 if (PREV_INSN (from))
3727 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3729 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3730 if (last_insn == to)
3731 last_insn = PREV_INSN (from);
3732 if (first_insn == from)
3733 first_insn = NEXT_INSN (to);
3735 /* Make the new neighbors point to it and it to them. */
3736 if (NEXT_INSN (after))
3737 PREV_INSN (NEXT_INSN (after)) = to;
3739 NEXT_INSN (to) = NEXT_INSN (after);
3740 PREV_INSN (from) = after;
3741 NEXT_INSN (after) = from;
3742 if (after == last_insn)
3746 /* Same as function above, but take care to update BB boundaries. */
3748 reorder_insns (from, to, after)
3749 rtx from, to, after;
3751 rtx prev = PREV_INSN (from);
3752 basic_block bb, bb2;
3754 reorder_insns_nobb (from, to, after);
3756 if (GET_CODE (after) != BARRIER
3757 && (bb = BLOCK_FOR_INSN (after)))
3760 bb->flags |= BB_DIRTY;
3762 if (GET_CODE (from) != BARRIER
3763 && (bb2 = BLOCK_FOR_INSN (from)))
3767 bb2->flags |= BB_DIRTY;
3770 if (bb->end == after)
3773 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3774 set_block_for_insn (x, bb);
3778 /* Return the line note insn preceding INSN. */
3781 find_line_note (insn)
3784 if (no_line_numbers)
3787 for (; insn; insn = PREV_INSN (insn))
3788 if (GET_CODE (insn) == NOTE
3789 && NOTE_LINE_NUMBER (insn) >= 0)
3795 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3796 of the moved insns when debugging. This may insert a note between AFTER
3797 and FROM, and another one after TO. */
3800 reorder_insns_with_line_notes (from, to, after)
3801 rtx from, to, after;
3803 rtx from_line = find_line_note (from);
3804 rtx after_line = find_line_note (after);
3806 reorder_insns (from, to, after);
3808 if (from_line == after_line)
3812 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3813 NOTE_LINE_NUMBER (from_line),
3816 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3817 NOTE_LINE_NUMBER (after_line),
3821 /* Remove unnecessary notes from the instruction stream. */
3824 remove_unnecessary_notes ()
3826 rtx block_stack = NULL_RTX;
3827 rtx eh_stack = NULL_RTX;
3832 /* We must not remove the first instruction in the function because
3833 the compiler depends on the first instruction being a note. */
3834 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3836 /* Remember what's next. */
3837 next = NEXT_INSN (insn);
3839 /* We're only interested in notes. */
3840 if (GET_CODE (insn) != NOTE)
3843 switch (NOTE_LINE_NUMBER (insn))
3845 case NOTE_INSN_DELETED:
3846 case NOTE_INSN_LOOP_END_TOP_COND:
3850 case NOTE_INSN_EH_REGION_BEG:
3851 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3854 case NOTE_INSN_EH_REGION_END:
3855 /* Too many end notes. */
3856 if (eh_stack == NULL_RTX)
3858 /* Mismatched nesting. */
3859 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3862 eh_stack = XEXP (eh_stack, 1);
3863 free_INSN_LIST_node (tmp);
3866 case NOTE_INSN_BLOCK_BEG:
3867 /* By now, all notes indicating lexical blocks should have
3868 NOTE_BLOCK filled in. */
3869 if (NOTE_BLOCK (insn) == NULL_TREE)
3871 block_stack = alloc_INSN_LIST (insn, block_stack);
3874 case NOTE_INSN_BLOCK_END:
3875 /* Too many end notes. */
3876 if (block_stack == NULL_RTX)
3878 /* Mismatched nesting. */
3879 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3882 block_stack = XEXP (block_stack, 1);
3883 free_INSN_LIST_node (tmp);
3885 /* Scan back to see if there are any non-note instructions
3886 between INSN and the beginning of this block. If not,
3887 then there is no PC range in the generated code that will
3888 actually be in this block, so there's no point in
3889 remembering the existence of the block. */
3890 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3892 /* This block contains a real instruction. Note that we
3893 don't include labels; if the only thing in the block
3894 is a label, then there are still no PC values that
3895 lie within the block. */
3899 /* We're only interested in NOTEs. */
3900 if (GET_CODE (tmp) != NOTE)
3903 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3905 /* We just verified that this BLOCK matches us with
3906 the block_stack check above. Never delete the
3907 BLOCK for the outermost scope of the function; we
3908 can refer to names from that scope even if the
3909 block notes are messed up. */
3910 if (! is_body_block (NOTE_BLOCK (insn))
3911 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3918 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3919 /* There's a nested block. We need to leave the
3920 current block in place since otherwise the debugger
3921 wouldn't be able to show symbols from our block in
3922 the nested block. */
3928 /* Too many begin notes. */
3929 if (block_stack || eh_stack)
3934 /* Emit insn(s) of given code and pattern
3935 at a specified place within the doubly-linked list.
3937 All of the emit_foo global entry points accept an object
3938 X which is either an insn list or a PATTERN of a single
3941 There are thus a few canonical ways to generate code and
3942 emit it at a specific place in the instruction stream. For
3943 example, consider the instruction named SPOT and the fact that
3944 we would like to emit some instructions before SPOT. We might
3948 ... emit the new instructions ...
3949 insns_head = get_insns ();
3952 emit_insn_before (insns_head, SPOT);
3954 It used to be common to generate SEQUENCE rtl instead, but that
3955 is a relic of the past which no longer occurs. The reason is that
3956 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3957 generated would almost certainly die right after it was created. */
3959 /* Make X be output before the instruction BEFORE. */
3962 emit_insn_before (x, before)
3968 #ifdef ENABLE_RTL_CHECKING
3969 if (before == NULL_RTX)
3976 switch (GET_CODE (x))
3987 rtx next = NEXT_INSN (insn);
3988 add_insn_before (insn, before);
3994 #ifdef ENABLE_RTL_CHECKING
4001 last = make_insn_raw (x);
4002 add_insn_before (last, before);
4009 /* Make an instruction with body X and code JUMP_INSN
4010 and output it before the instruction BEFORE. */
4013 emit_jump_insn_before (x, before)
4016 rtx insn, last = NULL_RTX;
4018 #ifdef ENABLE_RTL_CHECKING
4019 if (before == NULL_RTX)
4023 switch (GET_CODE (x))
4034 rtx next = NEXT_INSN (insn);
4035 add_insn_before (insn, before);
4041 #ifdef ENABLE_RTL_CHECKING
4048 last = make_jump_insn_raw (x);
4049 add_insn_before (last, before);
4056 /* Make an instruction with body X and code CALL_INSN
4057 and output it before the instruction BEFORE. */
4060 emit_call_insn_before (x, before)
4063 rtx last = NULL_RTX, insn;
4065 #ifdef ENABLE_RTL_CHECKING
4066 if (before == NULL_RTX)
4070 switch (GET_CODE (x))
4081 rtx next = NEXT_INSN (insn);
4082 add_insn_before (insn, before);
4088 #ifdef ENABLE_RTL_CHECKING
4095 last = make_call_insn_raw (x);
4096 add_insn_before (last, before);
4103 /* Make an insn of code BARRIER
4104 and output it before the insn BEFORE. */
4107 emit_barrier_before (before)
4110 rtx insn = rtx_alloc (BARRIER);
4112 INSN_UID (insn) = cur_insn_uid++;
4114 add_insn_before (insn, before);
4118 /* Emit the label LABEL before the insn BEFORE. */
4121 emit_label_before (label, before)
4124 /* This can be called twice for the same label as a result of the
4125 confusion that follows a syntax error! So make it harmless. */
4126 if (INSN_UID (label) == 0)
4128 INSN_UID (label) = cur_insn_uid++;
4129 add_insn_before (label, before);
4135 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4138 emit_note_before (subtype, before)
4142 rtx note = rtx_alloc (NOTE);
4143 INSN_UID (note) = cur_insn_uid++;
4144 NOTE_SOURCE_FILE (note) = 0;
4145 NOTE_LINE_NUMBER (note) = subtype;
4146 BLOCK_FOR_INSN (note) = NULL;
4148 add_insn_before (note, before);
4152 /* Helper for emit_insn_after, handles lists of instructions
4155 static rtx emit_insn_after_1 PARAMS ((rtx, rtx));
4158 emit_insn_after_1 (first, after)
4165 if (GET_CODE (after) != BARRIER
4166 && (bb = BLOCK_FOR_INSN (after)))
4168 bb->flags |= BB_DIRTY;
4169 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4170 if (GET_CODE (last) != BARRIER)
4171 set_block_for_insn (last, bb);
4172 if (GET_CODE (last) != BARRIER)
4173 set_block_for_insn (last, bb);
4174 if (bb->end == after)
4178 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4181 after_after = NEXT_INSN (after);
4183 NEXT_INSN (after) = first;
4184 PREV_INSN (first) = after;
4185 NEXT_INSN (last) = after_after;
4187 PREV_INSN (after_after) = last;
4189 if (after == last_insn)
4194 /* Make X be output after the insn AFTER. */
4197 emit_insn_after (x, after)
4202 #ifdef ENABLE_RTL_CHECKING
4203 if (after == NULL_RTX)
4210 switch (GET_CODE (x))
4218 last = emit_insn_after_1 (x, after);
4221 #ifdef ENABLE_RTL_CHECKING
4228 last = make_insn_raw (x);
4229 add_insn_after (last, after);
4236 /* Similar to emit_insn_after, except that line notes are to be inserted so
4237 as to act as if this insn were at FROM. */
4240 emit_insn_after_with_line_notes (x, after, from)
4243 rtx from_line = find_line_note (from);
4244 rtx after_line = find_line_note (after);
4245 rtx insn = emit_insn_after (x, after);
4248 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
4249 NOTE_LINE_NUMBER (from_line),
4253 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
4254 NOTE_LINE_NUMBER (after_line),
4258 /* Make an insn of code JUMP_INSN with body X
4259 and output it after the insn AFTER. */
4262 emit_jump_insn_after (x, after)
4267 #ifdef ENABLE_RTL_CHECKING
4268 if (after == NULL_RTX)
4272 switch (GET_CODE (x))
4280 last = emit_insn_after_1 (x, after);
4283 #ifdef ENABLE_RTL_CHECKING
4290 last = make_jump_insn_raw (x);
4291 add_insn_after (last, after);
4298 /* Make an instruction with body X and code CALL_INSN
4299 and output it after the instruction AFTER. */
4302 emit_call_insn_after (x, after)
4307 #ifdef ENABLE_RTL_CHECKING
4308 if (after == NULL_RTX)
4312 switch (GET_CODE (x))
4320 last = emit_insn_after_1 (x, after);
4323 #ifdef ENABLE_RTL_CHECKING
4330 last = make_call_insn_raw (x);
4331 add_insn_after (last, after);
4338 /* Make an insn of code BARRIER
4339 and output it after the insn AFTER. */
4342 emit_barrier_after (after)
4345 rtx insn = rtx_alloc (BARRIER);
4347 INSN_UID (insn) = cur_insn_uid++;
4349 add_insn_after (insn, after);
4353 /* Emit the label LABEL after the insn AFTER. */
4356 emit_label_after (label, after)
4359 /* This can be called twice for the same label
4360 as a result of the confusion that follows a syntax error!
4361 So make it harmless. */
4362 if (INSN_UID (label) == 0)
4364 INSN_UID (label) = cur_insn_uid++;
4365 add_insn_after (label, after);
4371 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4374 emit_note_after (subtype, after)
4378 rtx note = rtx_alloc (NOTE);
4379 INSN_UID (note) = cur_insn_uid++;
4380 NOTE_SOURCE_FILE (note) = 0;
4381 NOTE_LINE_NUMBER (note) = subtype;
4382 BLOCK_FOR_INSN (note) = NULL;
4383 add_insn_after (note, after);
4387 /* Emit a line note for FILE and LINE after the insn AFTER. */
4390 emit_line_note_after (file, line, after)
4397 if (no_line_numbers && line > 0)
4403 note = rtx_alloc (NOTE);
4404 INSN_UID (note) = cur_insn_uid++;
4405 NOTE_SOURCE_FILE (note) = file;
4406 NOTE_LINE_NUMBER (note) = line;
4407 BLOCK_FOR_INSN (note) = NULL;
4408 add_insn_after (note, after);
4412 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4414 emit_insn_after_scope (pattern, after, scope)
4418 rtx last = emit_insn_after (pattern, after);
4420 after = NEXT_INSN (after);
4423 if (active_insn_p (after))
4424 INSN_SCOPE (after) = scope;
4427 after = NEXT_INSN (after);
4432 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4434 emit_jump_insn_after_scope (pattern, after, scope)
4438 rtx last = emit_jump_insn_after (pattern, after);
4440 after = NEXT_INSN (after);
4443 if (active_insn_p (after))
4444 INSN_SCOPE (after) = scope;
4447 after = NEXT_INSN (after);
4452 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4454 emit_call_insn_after_scope (pattern, after, scope)
4458 rtx last = emit_call_insn_after (pattern, after);
4460 after = NEXT_INSN (after);
4463 if (active_insn_p (after))
4464 INSN_SCOPE (after) = scope;
4467 after = NEXT_INSN (after);
4472 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4474 emit_insn_before_scope (pattern, before, scope)
4475 rtx pattern, before;
4478 rtx first = PREV_INSN (before);
4479 rtx last = emit_insn_before (pattern, before);
4481 first = NEXT_INSN (first);
4484 if (active_insn_p (first))
4485 INSN_SCOPE (first) = scope;
4488 first = NEXT_INSN (first);
4493 /* Take X and emit it at the end of the doubly-linked
4496 Returns the last insn emitted. */
4502 rtx last = last_insn;
4508 switch (GET_CODE (x))
4519 rtx next = NEXT_INSN (insn);
4526 #ifdef ENABLE_RTL_CHECKING
4533 last = make_insn_raw (x);
4541 /* Make an insn of code JUMP_INSN with pattern X
4542 and add it to the end of the doubly-linked list. */
4548 rtx last = NULL_RTX, insn;
4550 switch (GET_CODE (x))
4561 rtx next = NEXT_INSN (insn);
4568 #ifdef ENABLE_RTL_CHECKING
4575 last = make_jump_insn_raw (x);
4583 /* Make an insn of code CALL_INSN with pattern X
4584 and add it to the end of the doubly-linked list. */
4592 switch (GET_CODE (x))
4600 insn = emit_insn (x);
4603 #ifdef ENABLE_RTL_CHECKING
4610 insn = make_call_insn_raw (x);
4618 /* Add the label LABEL to the end of the doubly-linked list. */
4624 /* This can be called twice for the same label
4625 as a result of the confusion that follows a syntax error!
4626 So make it harmless. */
4627 if (INSN_UID (label) == 0)
4629 INSN_UID (label) = cur_insn_uid++;
4635 /* Make an insn of code BARRIER
4636 and add it to the end of the doubly-linked list. */
4641 rtx barrier = rtx_alloc (BARRIER);
4642 INSN_UID (barrier) = cur_insn_uid++;
4647 /* Make an insn of code NOTE
4648 with data-fields specified by FILE and LINE
4649 and add it to the end of the doubly-linked list,
4650 but only if line-numbers are desired for debugging info. */
4653 emit_line_note (file, line)
4657 set_file_and_line_for_stmt (file, line);
4660 if (no_line_numbers)
4664 return emit_note (file, line);
4667 /* Make an insn of code NOTE
4668 with data-fields specified by FILE and LINE
4669 and add it to the end of the doubly-linked list.
4670 If it is a line-number NOTE, omit it if it matches the previous one. */
4673 emit_note (file, line)
4681 if (file && last_filename && !strcmp (file, last_filename)
4682 && line == last_linenum)
4684 last_filename = file;
4685 last_linenum = line;
4688 if (no_line_numbers && line > 0)
4694 note = rtx_alloc (NOTE);
4695 INSN_UID (note) = cur_insn_uid++;
4696 NOTE_SOURCE_FILE (note) = file;
4697 NOTE_LINE_NUMBER (note) = line;
4698 BLOCK_FOR_INSN (note) = NULL;
4703 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4706 emit_line_note_force (file, line)
4711 return emit_line_note (file, line);
4714 /* Cause next statement to emit a line note even if the line number
4715 has not changed. This is used at the beginning of a function. */
4718 force_next_line_note ()
4723 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4724 note of this type already exists, remove it first. */
4727 set_unique_reg_note (insn, kind, datum)
4732 rtx note = find_reg_note (insn, kind, NULL_RTX);
4738 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4739 has multiple sets (some callers assume single_set
4740 means the insn only has one set, when in fact it
4741 means the insn only has one * useful * set). */
4742 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4749 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4750 It serves no useful purpose and breaks eliminate_regs. */
4751 if (GET_CODE (datum) == ASM_OPERANDS)
4761 XEXP (note, 0) = datum;
4765 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4766 return REG_NOTES (insn);
4769 /* Return an indication of which type of insn should have X as a body.
4770 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4776 if (GET_CODE (x) == CODE_LABEL)
4778 if (GET_CODE (x) == CALL)
4780 if (GET_CODE (x) == RETURN)
4782 if (GET_CODE (x) == SET)
4784 if (SET_DEST (x) == pc_rtx)
4786 else if (GET_CODE (SET_SRC (x)) == CALL)
4791 if (GET_CODE (x) == PARALLEL)
4794 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4795 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4797 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4798 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4800 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4801 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4807 /* Emit the rtl pattern X as an appropriate kind of insn.
4808 If X is a label, it is simply added into the insn chain. */
4814 enum rtx_code code = classify_insn (x);
4816 if (code == CODE_LABEL)
4817 return emit_label (x);
4818 else if (code == INSN)
4819 return emit_insn (x);
4820 else if (code == JUMP_INSN)
4822 rtx insn = emit_jump_insn (x);
4823 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4824 return emit_barrier ();
4827 else if (code == CALL_INSN)
4828 return emit_call_insn (x);
4833 /* Space for free sequence stack entries. */
4834 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4836 /* Begin emitting insns to a sequence which can be packaged in an
4837 RTL_EXPR. If this sequence will contain something that might cause
4838 the compiler to pop arguments to function calls (because those
4839 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4840 details), use do_pending_stack_adjust before calling this function.
4841 That will ensure that the deferred pops are not accidentally
4842 emitted in the middle of this sequence. */
4847 struct sequence_stack *tem;
4849 if (free_sequence_stack != NULL)
4851 tem = free_sequence_stack;
4852 free_sequence_stack = tem->next;
4855 tem = (struct sequence_stack *) ggc_alloc (sizeof (struct sequence_stack));
4857 tem->next = seq_stack;
4858 tem->first = first_insn;
4859 tem->last = last_insn;
4860 tem->sequence_rtl_expr = seq_rtl_expr;
4868 /* Similarly, but indicate that this sequence will be placed in T, an
4869 RTL_EXPR. See the documentation for start_sequence for more
4870 information about how to use this function. */
4873 start_sequence_for_rtl_expr (t)
4881 /* Set up the insn chain starting with FIRST as the current sequence,
4882 saving the previously current one. See the documentation for
4883 start_sequence for more information about how to use this function. */
4886 push_to_sequence (first)
4893 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4899 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4902 push_to_full_sequence (first, last)
4908 /* We really should have the end of the insn chain here. */
4909 if (last && NEXT_INSN (last))
4913 /* Set up the outer-level insn chain
4914 as the current sequence, saving the previously current one. */
4917 push_topmost_sequence ()
4919 struct sequence_stack *stack, *top = NULL;
4923 for (stack = seq_stack; stack; stack = stack->next)
4926 first_insn = top->first;
4927 last_insn = top->last;
4928 seq_rtl_expr = top->sequence_rtl_expr;
4931 /* After emitting to the outer-level insn chain, update the outer-level
4932 insn chain, and restore the previous saved state. */
4935 pop_topmost_sequence ()
4937 struct sequence_stack *stack, *top = NULL;
4939 for (stack = seq_stack; stack; stack = stack->next)
4942 top->first = first_insn;
4943 top->last = last_insn;
4944 /* ??? Why don't we save seq_rtl_expr here? */
4949 /* After emitting to a sequence, restore previous saved state.
4951 To get the contents of the sequence just made, you must call
4952 `get_insns' *before* calling here.
4954 If the compiler might have deferred popping arguments while
4955 generating this sequence, and this sequence will not be immediately
4956 inserted into the instruction stream, use do_pending_stack_adjust
4957 before calling get_insns. That will ensure that the deferred
4958 pops are inserted into this sequence, and not into some random
4959 location in the instruction stream. See INHIBIT_DEFER_POP for more
4960 information about deferred popping of arguments. */
4965 struct sequence_stack *tem = seq_stack;
4967 first_insn = tem->first;
4968 last_insn = tem->last;
4969 seq_rtl_expr = tem->sequence_rtl_expr;
4970 seq_stack = tem->next;
4972 memset (tem, 0, sizeof (*tem));
4973 tem->next = free_sequence_stack;
4974 free_sequence_stack = tem;
4977 /* This works like end_sequence, but records the old sequence in FIRST
4981 end_full_sequence (first, last)
4984 *first = first_insn;
4989 /* Return 1 if currently emitting into a sequence. */
4994 return seq_stack != 0;
4997 /* Put the various virtual registers into REGNO_REG_RTX. */
5000 init_virtual_regs (es)
5001 struct emit_status *es;
5003 rtx *ptr = es->x_regno_reg_rtx;
5004 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5005 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5006 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5007 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5008 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5012 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5013 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5014 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5015 static int copy_insn_n_scratches;
5017 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5018 copied an ASM_OPERANDS.
5019 In that case, it is the original input-operand vector. */
5020 static rtvec orig_asm_operands_vector;
5022 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5023 copied an ASM_OPERANDS.
5024 In that case, it is the copied input-operand vector. */
5025 static rtvec copy_asm_operands_vector;
5027 /* Likewise for the constraints vector. */
5028 static rtvec orig_asm_constraints_vector;
5029 static rtvec copy_asm_constraints_vector;
5031 /* Recursively create a new copy of an rtx for copy_insn.
5032 This function differs from copy_rtx in that it handles SCRATCHes and
5033 ASM_OPERANDs properly.
5034 Normally, this function is not used directly; use copy_insn as front end.
5035 However, you could first copy an insn pattern with copy_insn and then use
5036 this function afterwards to properly copy any REG_NOTEs containing
5046 const char *format_ptr;
5048 code = GET_CODE (orig);
5065 for (i = 0; i < copy_insn_n_scratches; i++)
5066 if (copy_insn_scratch_in[i] == orig)
5067 return copy_insn_scratch_out[i];
5071 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5072 a LABEL_REF, it isn't sharable. */
5073 if (GET_CODE (XEXP (orig, 0)) == PLUS
5074 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5075 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5079 /* A MEM with a constant address is not sharable. The problem is that
5080 the constant address may need to be reloaded. If the mem is shared,
5081 then reloading one copy of this mem will cause all copies to appear
5082 to have been reloaded. */
5088 copy = rtx_alloc (code);
5090 /* Copy the various flags, and other information. We assume that
5091 all fields need copying, and then clear the fields that should
5092 not be copied. That is the sensible default behavior, and forces
5093 us to explicitly document why we are *not* copying a flag. */
5094 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
5096 /* We do not copy the USED flag, which is used as a mark bit during
5097 walks over the RTL. */
5098 RTX_FLAG (copy, used) = 0;
5100 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5101 if (GET_RTX_CLASS (code) == 'i')
5103 RTX_FLAG (copy, jump) = 0;
5104 RTX_FLAG (copy, call) = 0;
5105 RTX_FLAG (copy, frame_related) = 0;
5108 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5110 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5112 copy->fld[i] = orig->fld[i];
5113 switch (*format_ptr++)
5116 if (XEXP (orig, i) != NULL)
5117 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5122 if (XVEC (orig, i) == orig_asm_constraints_vector)
5123 XVEC (copy, i) = copy_asm_constraints_vector;
5124 else if (XVEC (orig, i) == orig_asm_operands_vector)
5125 XVEC (copy, i) = copy_asm_operands_vector;
5126 else if (XVEC (orig, i) != NULL)
5128 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5129 for (j = 0; j < XVECLEN (copy, i); j++)
5130 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5141 /* These are left unchanged. */
5149 if (code == SCRATCH)
5151 i = copy_insn_n_scratches++;
5152 if (i >= MAX_RECOG_OPERANDS)
5154 copy_insn_scratch_in[i] = orig;
5155 copy_insn_scratch_out[i] = copy;
5157 else if (code == ASM_OPERANDS)
5159 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5160 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5161 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5162 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5168 /* Create a new copy of an rtx.
5169 This function differs from copy_rtx in that it handles SCRATCHes and
5170 ASM_OPERANDs properly.
5171 INSN doesn't really have to be a full INSN; it could be just the
5177 copy_insn_n_scratches = 0;
5178 orig_asm_operands_vector = 0;
5179 orig_asm_constraints_vector = 0;
5180 copy_asm_operands_vector = 0;
5181 copy_asm_constraints_vector = 0;
5182 return copy_insn_1 (insn);
5185 /* Initialize data structures and variables in this file
5186 before generating rtl for each function. */
5191 struct function *f = cfun;
5193 f->emit = (struct emit_status *) ggc_alloc (sizeof (struct emit_status));
5196 seq_rtl_expr = NULL;
5198 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5201 first_label_num = label_num;
5205 /* Init the tables that describe all the pseudo regs. */
5207 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5209 f->emit->regno_pointer_align
5210 = (unsigned char *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5211 * sizeof (unsigned char));
5214 = (rtx *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5218 = (tree *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5221 /* Put copies of all the hard registers into regno_reg_rtx. */
5222 memcpy (regno_reg_rtx,
5223 static_regno_reg_rtx,
5224 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5226 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5227 init_virtual_regs (f->emit);
5229 /* Indicate that the virtual registers and stack locations are
5231 REG_POINTER (stack_pointer_rtx) = 1;
5232 REG_POINTER (frame_pointer_rtx) = 1;
5233 REG_POINTER (hard_frame_pointer_rtx) = 1;
5234 REG_POINTER (arg_pointer_rtx) = 1;
5236 REG_POINTER (virtual_incoming_args_rtx) = 1;
5237 REG_POINTER (virtual_stack_vars_rtx) = 1;
5238 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5239 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5240 REG_POINTER (virtual_cfa_rtx) = 1;
5242 #ifdef STACK_BOUNDARY
5243 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5244 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5245 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5246 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5248 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5249 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5250 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5251 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5252 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5255 #ifdef INIT_EXPANDERS
5260 /* Generate the constant 0. */
5263 gen_const_vector_0 (mode)
5264 enum machine_mode mode;
5269 enum machine_mode inner;
5271 units = GET_MODE_NUNITS (mode);
5272 inner = GET_MODE_INNER (mode);
5274 v = rtvec_alloc (units);
5276 /* We need to call this function after we to set CONST0_RTX first. */
5277 if (!CONST0_RTX (inner))
5280 for (i = 0; i < units; ++i)
5281 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5283 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5287 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5288 all elements are zero. */
5290 gen_rtx_CONST_VECTOR (mode, v)
5291 enum machine_mode mode;
5294 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5297 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5298 if (RTVEC_ELT (v, i) != inner_zero)
5299 return gen_rtx_raw_CONST_VECTOR (mode, v);
5300 return CONST0_RTX (mode);
5303 /* Create some permanent unique rtl objects shared between all functions.
5304 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5307 init_emit_once (line_numbers)
5311 enum machine_mode mode;
5312 enum machine_mode double_mode;
5314 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5316 const_int_htab = htab_create (37, const_int_htab_hash,
5317 const_int_htab_eq, NULL);
5319 const_double_htab = htab_create (37, const_double_htab_hash,
5320 const_double_htab_eq, NULL);
5322 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
5323 mem_attrs_htab_eq, NULL);
5325 no_line_numbers = ! line_numbers;
5327 /* Compute the word and byte modes. */
5329 byte_mode = VOIDmode;
5330 word_mode = VOIDmode;
5331 double_mode = VOIDmode;
5333 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5334 mode = GET_MODE_WIDER_MODE (mode))
5336 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5337 && byte_mode == VOIDmode)
5340 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5341 && word_mode == VOIDmode)
5345 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5346 mode = GET_MODE_WIDER_MODE (mode))
5348 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5349 && double_mode == VOIDmode)
5353 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5355 /* Assign register numbers to the globally defined register rtx.
5356 This must be done at runtime because the register number field
5357 is in a union and some compilers can't initialize unions. */
5359 pc_rtx = gen_rtx (PC, VOIDmode);
5360 cc0_rtx = gen_rtx (CC0, VOIDmode);
5361 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5362 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5363 if (hard_frame_pointer_rtx == 0)
5364 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5365 HARD_FRAME_POINTER_REGNUM);
5366 if (arg_pointer_rtx == 0)
5367 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5368 virtual_incoming_args_rtx =
5369 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5370 virtual_stack_vars_rtx =
5371 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5372 virtual_stack_dynamic_rtx =
5373 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5374 virtual_outgoing_args_rtx =
5375 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5376 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5378 /* Initialize RTL for commonly used hard registers. These are
5379 copied into regno_reg_rtx as we begin to compile each function. */
5380 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5381 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5383 #ifdef INIT_EXPANDERS
5384 /* This is to initialize {init|mark|free}_machine_status before the first
5385 call to push_function_context_to. This is needed by the Chill front
5386 end which calls push_function_context_to before the first call to
5387 init_function_start. */
5391 /* Create the unique rtx's for certain rtx codes and operand values. */
5393 /* Don't use gen_rtx here since gen_rtx in this case
5394 tries to use these variables. */
5395 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5396 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5397 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5399 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5400 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5401 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5403 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5405 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5406 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5407 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5408 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5410 for (i = 0; i <= 2; i++)
5412 REAL_VALUE_TYPE *r =
5413 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5415 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5416 mode = GET_MODE_WIDER_MODE (mode))
5417 const_tiny_rtx[i][(int) mode] =
5418 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5420 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5422 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5423 mode = GET_MODE_WIDER_MODE (mode))
5424 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5426 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5428 mode = GET_MODE_WIDER_MODE (mode))
5429 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5432 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5434 mode = GET_MODE_WIDER_MODE (mode))
5435 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5437 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5439 mode = GET_MODE_WIDER_MODE (mode))
5440 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5442 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5443 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5444 const_tiny_rtx[0][i] = const0_rtx;
5446 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5447 if (STORE_FLAG_VALUE == 1)
5448 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5450 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5451 return_address_pointer_rtx
5452 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5456 struct_value_rtx = STRUCT_VALUE;
5458 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5461 #ifdef STRUCT_VALUE_INCOMING
5462 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5464 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5465 struct_value_incoming_rtx
5466 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5468 struct_value_incoming_rtx = struct_value_rtx;
5472 #ifdef STATIC_CHAIN_REGNUM
5473 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5475 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5476 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5477 static_chain_incoming_rtx
5478 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5481 static_chain_incoming_rtx = static_chain_rtx;
5485 static_chain_rtx = STATIC_CHAIN;
5487 #ifdef STATIC_CHAIN_INCOMING
5488 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5490 static_chain_incoming_rtx = static_chain_rtx;
5494 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5495 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5498 /* Query and clear/ restore no_line_numbers. This is used by the
5499 switch / case handling in stmt.c to give proper line numbers in
5500 warnings about unreachable code. */
5503 force_line_numbers ()
5505 int old = no_line_numbers;
5507 no_line_numbers = 0;
5509 force_next_line_note ();
5514 restore_line_number_status (old_value)
5517 no_line_numbers = old_value;
5520 /* Produce exact duplicate of insn INSN after AFTER.
5521 Care updating of libcall regions if present. */
5524 emit_copy_of_insn_after (insn, after)
5528 rtx note1, note2, link;
5530 switch (GET_CODE (insn))
5533 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5537 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5541 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5542 if (CALL_INSN_FUNCTION_USAGE (insn))
5543 CALL_INSN_FUNCTION_USAGE (new)
5544 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5545 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5546 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5553 /* Update LABEL_NUSES. */
5554 mark_jump_label (PATTERN (new), new, 0);
5556 INSN_SCOPE (new) = INSN_SCOPE (insn);
5558 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5560 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5561 if (REG_NOTE_KIND (link) != REG_LABEL)
5563 if (GET_CODE (link) == EXPR_LIST)
5565 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5570 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5575 /* Fix the libcall sequences. */
5576 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5579 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5581 XEXP (note1, 0) = p;
5582 XEXP (note2, 0) = new;
5587 #include "gt-emit-rtl.h"