1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
46 #include "hard-reg-set.h"
47 #include "insn-config.h"
54 /* Commonly used modes. */
56 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
57 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
58 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
59 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
62 /* This is *not* reset after each function. It gives each CODE_LABEL
63 in the entire compilation a unique label number. */
65 static int label_num = 1;
67 /* Highest label number in current function.
68 Zero means use the value of label_num instead.
69 This is nonzero only when belatedly compiling an inline function. */
71 static int last_label_num;
73 /* Value label_num had when set_new_first_and_last_label_number was called.
74 If label_num has not changed since then, last_label_num is valid. */
76 static int base_label_num;
78 /* Nonzero means do not generate NOTEs for source line numbers. */
80 static int no_line_numbers;
82 /* Commonly used rtx's, so that we only need space for one copy.
83 These are initialized once for the entire compilation.
84 All of these except perhaps the floating-point CONST_DOUBLEs
85 are unique; no other rtx-object will be equal to any of these. */
87 rtx global_rtl[GR_MAX];
89 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
90 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
91 record a copy of const[012]_rtx. */
93 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
97 REAL_VALUE_TYPE dconst0;
98 REAL_VALUE_TYPE dconst1;
99 REAL_VALUE_TYPE dconst2;
100 REAL_VALUE_TYPE dconstm1;
102 /* All references to the following fixed hard registers go through
103 these unique rtl objects. On machines where the frame-pointer and
104 arg-pointer are the same register, they use the same unique object.
106 After register allocation, other rtl objects which used to be pseudo-regs
107 may be clobbered to refer to the frame-pointer register.
108 But references that were originally to the frame-pointer can be
109 distinguished from the others because they contain frame_pointer_rtx.
111 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
112 tricky: until register elimination has taken place hard_frame_pointer_rtx
113 should be used if it is being set, and frame_pointer_rtx otherwise. After
114 register elimination hard_frame_pointer_rtx should always be used.
115 On machines where the two registers are same (most) then these are the
118 In an inline procedure, the stack and frame pointer rtxs may not be
119 used for anything else. */
120 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
121 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
122 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
123 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
124 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
126 /* This is used to implement __builtin_return_address for some machines.
127 See for instance the MIPS port. */
128 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
130 /* We make one copy of (const_int C) where C is in
131 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
132 to save space during the compilation and simplify comparisons of
135 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
137 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
138 shortly thrown away. We use two mechanisms to prevent this waste:
140 For sizes up to 5 elements, we keep a SEQUENCE and its associated
141 rtvec for use by gen_sequence. One entry for each size is
142 sufficient because most cases are calls to gen_sequence followed by
143 immediately emitting the SEQUENCE. Reuse is safe since emitting a
144 sequence is destructive on the insn in it anyway and hence can't be
147 We do not bother to save this cached data over nested function calls.
148 Instead, we just reinitialize them. */
150 #define SEQUENCE_RESULT_SIZE 5
152 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
154 /* During RTL generation, we also keep a list of free INSN rtl codes. */
155 static rtx free_insn;
157 #define first_insn (current_function->emit->x_first_insn)
158 #define last_insn (current_function->emit->x_last_insn)
159 #define cur_insn_uid (current_function->emit->x_cur_insn_uid)
160 #define last_linenum (current_function->emit->x_last_linenum)
161 #define last_filename (current_function->emit->x_last_filename)
162 #define first_label_num (current_function->emit->x_first_label_num)
164 static rtx make_jump_insn_raw PROTO((rtx));
165 static rtx make_call_insn_raw PROTO((rtx));
166 static rtx find_line_note PROTO((rtx));
167 static void mark_sequence_stack PROTO((struct sequence_stack *));
169 /* There are some RTL codes that require special attention; the generation
170 functions do the raw handling. If you add to this list, modify
171 special_rtx in gengenrtl.c as well. */
174 gen_rtx_CONST_INT (mode, arg)
175 enum machine_mode mode;
178 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
179 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
181 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
182 if (const_true_rtx && arg == STORE_FLAG_VALUE)
183 return const_true_rtx;
186 return gen_rtx_raw_CONST_INT (mode, arg);
189 /* CONST_DOUBLEs needs special handling because its length is known
192 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
193 enum machine_mode mode;
195 HOST_WIDE_INT arg1, arg2;
197 rtx r = rtx_alloc (CONST_DOUBLE);
202 X0EXP (r, 1) = NULL_RTX;
206 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
213 gen_rtx_REG (mode, regno)
214 enum machine_mode mode;
217 /* In case the MD file explicitly references the frame pointer, have
218 all such references point to the same frame pointer. This is
219 used during frame pointer elimination to distinguish the explicit
220 references to these registers from pseudos that happened to be
223 If we have eliminated the frame pointer or arg pointer, we will
224 be using it as a normal register, for example as a spill
225 register. In such cases, we might be accessing it in a mode that
226 is not Pmode and therefore cannot use the pre-allocated rtx.
228 Also don't do this when we are making new REGs in reload, since
229 we don't want to get confused with the real pointers. */
231 if (mode == Pmode && !reload_in_progress)
233 if (regno == FRAME_POINTER_REGNUM)
234 return frame_pointer_rtx;
235 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
236 if (regno == HARD_FRAME_POINTER_REGNUM)
237 return hard_frame_pointer_rtx;
239 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
240 if (regno == ARG_POINTER_REGNUM)
241 return arg_pointer_rtx;
243 #ifdef RETURN_ADDRESS_POINTER_REGNUM
244 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
245 return return_address_pointer_rtx;
247 if (regno == STACK_POINTER_REGNUM)
248 return stack_pointer_rtx;
251 return gen_rtx_raw_REG (mode, regno);
255 gen_rtx_MEM (mode, addr)
256 enum machine_mode mode;
259 rtx rt = gen_rtx_raw_MEM (mode, addr);
261 /* This field is not cleared by the mere allocation of the rtx, so
263 MEM_ALIAS_SET (rt) = 0;
268 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
270 ** This routine generates an RTX of the size specified by
271 ** <code>, which is an RTX code. The RTX structure is initialized
272 ** from the arguments <element1> through <elementn>, which are
273 ** interpreted according to the specific RTX type's format. The
274 ** special machine mode associated with the rtx (if any) is specified
277 ** gen_rtx can be invoked in a way which resembles the lisp-like
278 ** rtx it will generate. For example, the following rtx structure:
280 ** (plus:QI (mem:QI (reg:SI 1))
281 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
283 ** ...would be generated by the following C code:
285 ** gen_rtx (PLUS, QImode,
286 ** gen_rtx (MEM, QImode,
287 ** gen_rtx (REG, SImode, 1)),
288 ** gen_rtx (MEM, QImode,
289 ** gen_rtx (PLUS, SImode,
290 ** gen_rtx (REG, SImode, 2),
291 ** gen_rtx (REG, SImode, 3)))),
296 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
298 #ifndef ANSI_PROTOTYPES
300 enum machine_mode mode;
303 register int i; /* Array indices... */
304 register const char *fmt; /* Current rtx's format... */
305 register rtx rt_val; /* RTX to return to caller... */
309 #ifndef ANSI_PROTOTYPES
310 code = va_arg (p, enum rtx_code);
311 mode = va_arg (p, enum machine_mode);
317 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
322 rtx arg0 = va_arg (p, rtx);
323 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
324 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
325 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
330 rt_val = gen_rtx_REG (mode, va_arg (p, int));
334 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
338 rt_val = rtx_alloc (code); /* Allocate the storage space. */
339 rt_val->mode = mode; /* Store the machine mode... */
341 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
342 for (i = 0; i < GET_RTX_LENGTH (code); i++)
346 case '0': /* Unused field. */
349 case 'i': /* An integer? */
350 XINT (rt_val, i) = va_arg (p, int);
353 case 'w': /* A wide integer? */
354 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
357 case 's': /* A string? */
358 XSTR (rt_val, i) = va_arg (p, char *);
361 case 'e': /* An expression? */
362 case 'u': /* An insn? Same except when printing. */
363 XEXP (rt_val, i) = va_arg (p, rtx);
366 case 'E': /* An RTX vector? */
367 XVEC (rt_val, i) = va_arg (p, rtvec);
370 case 'b': /* A bitmap? */
371 XBITMAP (rt_val, i) = va_arg (p, bitmap);
374 case 't': /* A tree? */
375 XTREE (rt_val, i) = va_arg (p, tree);
389 /* gen_rtvec (n, [rt1, ..., rtn])
391 ** This routine creates an rtvec and stores within it the
392 ** pointers to rtx's which are its arguments.
397 gen_rtvec VPROTO((int n, ...))
399 #ifndef ANSI_PROTOTYPES
408 #ifndef ANSI_PROTOTYPES
413 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
415 vector = (rtx *) alloca (n * sizeof (rtx));
417 for (i = 0; i < n; i++)
418 vector[i] = va_arg (p, rtx);
421 return gen_rtvec_v (n, vector);
425 gen_rtvec_v (n, argp)
430 register rtvec rt_val;
433 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
435 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
437 for (i = 0; i < n; i++)
438 rt_val->elem[i] = *argp++;
444 /* Generate a REG rtx for a new pseudo register of mode MODE.
445 This pseudo is assigned the next sequential register number. */
449 enum machine_mode mode;
451 struct function *f = current_function;
454 /* Don't let anything called after initial flow analysis create new
459 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
460 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
462 /* For complex modes, don't make a single pseudo.
463 Instead, make a CONCAT of two pseudos.
464 This allows noncontiguous allocation of the real and imaginary parts,
465 which makes much better code. Besides, allocating DCmode
466 pseudos overstrains reload on some machines like the 386. */
467 rtx realpart, imagpart;
468 int size = GET_MODE_UNIT_SIZE (mode);
469 enum machine_mode partmode
470 = mode_for_size (size * BITS_PER_UNIT,
471 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
472 ? MODE_FLOAT : MODE_INT),
475 realpart = gen_reg_rtx (partmode);
476 imagpart = gen_reg_rtx (partmode);
477 return gen_rtx_CONCAT (mode, realpart, imagpart);
480 /* Make sure regno_pointer_flag and regno_reg_rtx are large
481 enough to have an element for this pseudo reg number. */
483 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
485 int old_size = f->emit->regno_pointer_flag_length;
488 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
489 memset (new + old_size, 0, old_size);
490 f->emit->regno_pointer_flag = new;
492 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
493 memset (new + old_size, 0, old_size);
494 f->emit->regno_pointer_align = new;
496 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
497 old_size * 2 * sizeof (rtx));
498 memset (new1 + old_size, 0, old_size * sizeof (rtx));
499 regno_reg_rtx = new1;
501 f->emit->regno_pointer_flag_length = old_size * 2;
504 val = gen_rtx_raw_REG (mode, reg_rtx_no);
505 regno_reg_rtx[reg_rtx_no++] = val;
509 /* Identify REG (which may be a CONCAT) as a user register. */
515 if (GET_CODE (reg) == CONCAT)
517 REG_USERVAR_P (XEXP (reg, 0)) = 1;
518 REG_USERVAR_P (XEXP (reg, 1)) = 1;
520 else if (GET_CODE (reg) == REG)
521 REG_USERVAR_P (reg) = 1;
526 /* Identify REG as a probable pointer register and show its alignment
527 as ALIGN, if nonzero. */
530 mark_reg_pointer (reg, align)
534 if (! REGNO_POINTER_FLAG (REGNO (reg)))
536 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
539 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
541 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
542 /* We can no-longer be sure just how aligned this pointer is */
543 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
546 /* Return 1 plus largest pseudo reg number used in the current function. */
554 /* Return 1 + the largest label number used so far in the current function. */
559 if (last_label_num && label_num == base_label_num)
560 return last_label_num;
564 /* Return first label number used in this function (if any were used). */
567 get_first_label_num ()
569 return first_label_num;
572 /* Return a value representing some low-order bits of X, where the number
573 of low-order bits is given by MODE. Note that no conversion is done
574 between floating-point and fixed-point values, rather, the bit
575 representation is returned.
577 This function handles the cases in common between gen_lowpart, below,
578 and two variants in cse.c and combine.c. These are the cases that can
579 be safely handled at all points in the compilation.
581 If this is not a case we can handle, return 0. */
584 gen_lowpart_common (mode, x)
585 enum machine_mode mode;
590 if (GET_MODE (x) == mode)
593 /* MODE must occupy no more words than the mode of X. */
594 if (GET_MODE (x) != VOIDmode
595 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
596 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
600 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
601 word = ((GET_MODE_SIZE (GET_MODE (x))
602 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
605 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
606 && (GET_MODE_CLASS (mode) == MODE_INT
607 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
609 /* If we are getting the low-order part of something that has been
610 sign- or zero-extended, we can either just use the object being
611 extended or make a narrower extension. If we want an even smaller
612 piece than the size of the object being extended, call ourselves
615 This case is used mostly by combine and cse. */
617 if (GET_MODE (XEXP (x, 0)) == mode)
619 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
620 return gen_lowpart_common (mode, XEXP (x, 0));
621 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
622 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
624 else if (GET_CODE (x) == SUBREG
625 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
626 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
627 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
629 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
630 else if (GET_CODE (x) == REG)
632 /* Let the backend decide how many registers to skip. This is needed
633 in particular for Sparc64 where fp regs are smaller than a word. */
634 /* ??? Note that subregs are now ambiguous, in that those against
635 pseudos are sized by the Word Size, while those against hard
636 regs are sized by the underlying register size. Better would be
637 to always interpret the subreg offset parameter as bytes or bits. */
639 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
640 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
641 - HARD_REGNO_NREGS (REGNO (x), mode));
643 /* If the register is not valid for MODE, return 0. If we don't
644 do this, there is no way to fix up the resulting REG later.
645 But we do do this if the current REG is not valid for its
646 mode. This latter is a kludge, but is required due to the
647 way that parameters are passed on some machines, most
649 if (REGNO (x) < FIRST_PSEUDO_REGISTER
650 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
651 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
653 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
654 /* integrate.c can't handle parts of a return value register. */
655 && (! REG_FUNCTION_VALUE_P (x)
656 || ! rtx_equal_function_value_matters)
657 #ifdef CLASS_CANNOT_CHANGE_SIZE
658 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
659 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
660 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
661 && (TEST_HARD_REG_BIT
662 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
665 /* We want to keep the stack, frame, and arg pointers
667 && x != frame_pointer_rtx
668 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
669 && x != arg_pointer_rtx
671 && x != stack_pointer_rtx)
672 return gen_rtx_REG (mode, REGNO (x) + word);
674 return gen_rtx_SUBREG (mode, x, word);
676 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
677 from the low-order part of the constant. */
678 else if ((GET_MODE_CLASS (mode) == MODE_INT
679 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
680 && GET_MODE (x) == VOIDmode
681 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
683 /* If MODE is twice the host word size, X is already the desired
684 representation. Otherwise, if MODE is wider than a word, we can't
685 do this. If MODE is exactly a word, return just one CONST_INT.
686 If MODE is smaller than a word, clear the bits that don't belong
687 in our mode, unless they and our sign bit are all one. So we get
688 either a reasonable negative value or a reasonable unsigned value
691 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
693 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
695 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
696 return (GET_CODE (x) == CONST_INT ? x
697 : GEN_INT (CONST_DOUBLE_LOW (x)));
700 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
701 int width = GET_MODE_BITSIZE (mode);
702 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
703 : CONST_DOUBLE_LOW (x));
705 /* Sign extend to HOST_WIDE_INT. */
706 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
708 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
713 /* If X is an integral constant but we want it in floating-point, it
714 must be the case that we have a union of an integer and a floating-point
715 value. If the machine-parameters allow it, simulate that union here
716 and return the result. The two-word and single-word cases are
719 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
720 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
721 || flag_pretend_float)
722 && GET_MODE_CLASS (mode) == MODE_FLOAT
723 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
724 && GET_CODE (x) == CONST_INT
725 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
726 #ifdef REAL_ARITHMETIC
732 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
733 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
737 union {HOST_WIDE_INT i; float d; } u;
740 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
743 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
744 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
745 || flag_pretend_float)
746 && GET_MODE_CLASS (mode) == MODE_FLOAT
747 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
748 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
749 && GET_MODE (x) == VOIDmode
750 && (sizeof (double) * HOST_BITS_PER_CHAR
751 == 2 * HOST_BITS_PER_WIDE_INT))
752 #ifdef REAL_ARITHMETIC
756 HOST_WIDE_INT low, high;
758 if (GET_CODE (x) == CONST_INT)
759 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
761 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
763 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
765 if (WORDS_BIG_ENDIAN)
766 i[0] = high, i[1] = low;
768 i[0] = low, i[1] = high;
770 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
771 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
775 union {HOST_WIDE_INT i[2]; double d; } u;
776 HOST_WIDE_INT low, high;
778 if (GET_CODE (x) == CONST_INT)
779 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
781 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
783 #ifdef HOST_WORDS_BIG_ENDIAN
784 u.i[0] = high, u.i[1] = low;
786 u.i[0] = low, u.i[1] = high;
789 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
793 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
794 same as sizeof (double) or when sizeof (float) is larger than the
795 size of a word on the target machine. */
796 #ifdef REAL_ARITHMETIC
797 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
803 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
804 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
806 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
807 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
808 || flag_pretend_float)
809 && GET_MODE_CLASS (mode) == MODE_FLOAT
810 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
811 && GET_CODE (x) == CONST_INT
812 && (sizeof (double) * HOST_BITS_PER_CHAR
813 == HOST_BITS_PER_WIDE_INT))
819 r = REAL_VALUE_FROM_TARGET_DOUBLE (&i);
820 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
824 /* Similarly, if this is converting a floating-point value into a
825 single-word integer. Only do this is the host and target parameters are
828 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
829 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
830 || flag_pretend_float)
831 && (GET_MODE_CLASS (mode) == MODE_INT
832 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
833 && GET_CODE (x) == CONST_DOUBLE
834 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
835 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
836 return operand_subword (x, word, 0, GET_MODE (x));
838 /* Similarly, if this is converting a floating-point value into a
839 two-word integer, we can do this one word at a time and make an
840 integer. Only do this is the host and target parameters are
843 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
844 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
845 || flag_pretend_float)
846 && (GET_MODE_CLASS (mode) == MODE_INT
847 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
848 && GET_CODE (x) == CONST_DOUBLE
849 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
850 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
853 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
855 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
857 if (lowpart && GET_CODE (lowpart) == CONST_INT
858 && highpart && GET_CODE (highpart) == CONST_INT)
859 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
862 /* Otherwise, we can't do this. */
866 /* Return the real part (which has mode MODE) of a complex value X.
867 This always comes at the low address in memory. */
870 gen_realpart (mode, x)
871 enum machine_mode mode;
874 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
876 else if (WORDS_BIG_ENDIAN
877 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
879 && REGNO (x) < FIRST_PSEUDO_REGISTER)
880 fatal ("Unable to access real part of complex value in a hard register on this target");
881 else if (WORDS_BIG_ENDIAN)
882 return gen_highpart (mode, x);
884 return gen_lowpart (mode, x);
887 /* Return the imaginary part (which has mode MODE) of a complex value X.
888 This always comes at the high address in memory. */
891 gen_imagpart (mode, x)
892 enum machine_mode mode;
895 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
897 else if (WORDS_BIG_ENDIAN)
898 return gen_lowpart (mode, x);
899 else if (!WORDS_BIG_ENDIAN
900 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
902 && REGNO (x) < FIRST_PSEUDO_REGISTER)
903 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
905 return gen_highpart (mode, x);
908 /* Return 1 iff X, assumed to be a SUBREG,
909 refers to the real part of the complex value in its containing reg.
910 Complex values are always stored with the real part in the first word,
911 regardless of WORDS_BIG_ENDIAN. */
914 subreg_realpart_p (x)
917 if (GET_CODE (x) != SUBREG)
920 return SUBREG_WORD (x) * UNITS_PER_WORD < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)));
923 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
924 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
925 least-significant part of X.
926 MODE specifies how big a part of X to return;
927 it usually should not be larger than a word.
928 If X is a MEM whose address is a QUEUED, the value may be so also. */
931 gen_lowpart (mode, x)
932 enum machine_mode mode;
935 rtx result = gen_lowpart_common (mode, x);
939 else if (GET_CODE (x) == REG)
941 /* Must be a hard reg that's not valid in MODE. */
942 result = gen_lowpart_common (mode, copy_to_reg (x));
947 else if (GET_CODE (x) == MEM)
949 /* The only additional case we can do is MEM. */
950 register int offset = 0;
951 if (WORDS_BIG_ENDIAN)
952 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
953 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
955 if (BYTES_BIG_ENDIAN)
956 /* Adjust the address so that the address-after-the-data
958 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
959 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
961 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
963 else if (GET_CODE (x) == ADDRESSOF)
964 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
969 /* Like `gen_lowpart', but refer to the most significant part.
970 This is used to access the imaginary part of a complex number. */
973 gen_highpart (mode, x)
974 enum machine_mode mode;
977 /* This case loses if X is a subreg. To catch bugs early,
978 complain if an invalid MODE is used even in other cases. */
979 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
980 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
982 if (GET_CODE (x) == CONST_DOUBLE
983 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
984 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
987 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
988 else if (GET_CODE (x) == CONST_INT)
990 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
992 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
994 else if (GET_CODE (x) == MEM)
996 register int offset = 0;
997 if (! WORDS_BIG_ENDIAN)
998 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
999 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1001 if (! BYTES_BIG_ENDIAN
1002 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1003 offset -= (GET_MODE_SIZE (mode)
1004 - MIN (UNITS_PER_WORD,
1005 GET_MODE_SIZE (GET_MODE (x))));
1007 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1009 else if (GET_CODE (x) == SUBREG)
1011 /* The only time this should occur is when we are looking at a
1012 multi-word item with a SUBREG whose mode is the same as that of the
1013 item. It isn't clear what we would do if it wasn't. */
1014 if (SUBREG_WORD (x) != 0)
1016 return gen_highpart (mode, SUBREG_REG (x));
1018 else if (GET_CODE (x) == REG)
1022 /* Let the backend decide how many registers to skip. This is needed
1023 in particular for sparc64 where fp regs are smaller than a word. */
1024 /* ??? Note that subregs are now ambiguous, in that those against
1025 pseudos are sized by the word size, while those against hard
1026 regs are sized by the underlying register size. Better would be
1027 to always interpret the subreg offset parameter as bytes or bits. */
1029 if (WORDS_BIG_ENDIAN)
1031 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1032 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1033 - HARD_REGNO_NREGS (REGNO (x), mode));
1035 word = ((GET_MODE_SIZE (GET_MODE (x))
1036 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1039 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1040 /* integrate.c can't handle parts of a return value register. */
1041 && (! REG_FUNCTION_VALUE_P (x)
1042 || ! rtx_equal_function_value_matters)
1043 /* We want to keep the stack, frame, and arg pointers special. */
1044 && x != frame_pointer_rtx
1045 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1046 && x != arg_pointer_rtx
1048 && x != stack_pointer_rtx)
1049 return gen_rtx_REG (mode, REGNO (x) + word);
1051 return gen_rtx_SUBREG (mode, x, word);
1057 /* Return 1 iff X, assumed to be a SUBREG,
1058 refers to the least significant part of its containing reg.
1059 If X is not a SUBREG, always return 1 (it is its own low part!). */
1062 subreg_lowpart_p (x)
1065 if (GET_CODE (x) != SUBREG)
1067 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1070 if (WORDS_BIG_ENDIAN
1071 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1072 return (SUBREG_WORD (x)
1073 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1074 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1077 return SUBREG_WORD (x) == 0;
1080 /* Return subword I of operand OP.
1081 The word number, I, is interpreted as the word number starting at the
1082 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1083 otherwise it is the high-order word.
1085 If we cannot extract the required word, we return zero. Otherwise, an
1086 rtx corresponding to the requested word will be returned.
1088 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1089 reload has completed, a valid address will always be returned. After
1090 reload, if a valid address cannot be returned, we return zero.
1092 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1093 it is the responsibility of the caller.
1095 MODE is the mode of OP in case it is a CONST_INT. */
1098 operand_subword (op, i, validate_address, mode)
1101 int validate_address;
1102 enum machine_mode mode;
1105 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1107 if (mode == VOIDmode)
1108 mode = GET_MODE (op);
1110 if (mode == VOIDmode)
1113 /* If OP is narrower than a word, fail. */
1115 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1118 /* If we want a word outside OP, return zero. */
1120 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1123 /* If OP is already an integer word, return it. */
1124 if (GET_MODE_CLASS (mode) == MODE_INT
1125 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1128 /* If OP is a REG or SUBREG, we can handle it very simply. */
1129 if (GET_CODE (op) == REG)
1131 /* ??? There is a potential problem with this code. It does not
1132 properly handle extractions of a subword from a hard register
1133 that is larger than word_mode. Presumably the check for
1134 HARD_REGNO_MODE_OK catches these most of these cases. */
1136 /* If OP is a hard register, but OP + I is not a hard register,
1137 then extracting a subword is impossible.
1139 For example, consider if OP is the last hard register and it is
1140 larger than word_mode. If we wanted word N (for N > 0) because a
1141 part of that hard register was known to contain a useful value,
1142 then OP + I would refer to a pseudo, not the hard register we
1144 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1145 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1148 /* If the register is not valid for MODE, return 0. Note we
1149 have to check both OP and OP + I since they may refer to
1150 different parts of the register file.
1152 Consider if OP refers to the last 96bit FP register and we want
1153 subword 3 because that subword is known to contain a value we
1155 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1156 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1157 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1159 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1160 || (REG_FUNCTION_VALUE_P (op)
1161 && rtx_equal_function_value_matters)
1162 /* We want to keep the stack, frame, and arg pointers
1164 || op == frame_pointer_rtx
1165 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1166 || op == arg_pointer_rtx
1168 || op == stack_pointer_rtx)
1169 return gen_rtx_SUBREG (word_mode, op, i);
1171 return gen_rtx_REG (word_mode, REGNO (op) + i);
1173 else if (GET_CODE (op) == SUBREG)
1174 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1175 else if (GET_CODE (op) == CONCAT)
1177 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1179 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1180 return operand_subword (XEXP (op, 1), i - partwords,
1181 validate_address, mode);
1184 /* Form a new MEM at the requested address. */
1185 if (GET_CODE (op) == MEM)
1187 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1190 if (validate_address)
1192 if (reload_completed)
1194 if (! strict_memory_address_p (word_mode, addr))
1198 addr = memory_address (word_mode, addr);
1201 new = gen_rtx_MEM (word_mode, addr);
1203 MEM_COPY_ATTRIBUTES (new, op);
1204 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1205 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (op);
1210 /* The only remaining cases are when OP is a constant. If the host and
1211 target floating formats are the same, handling two-word floating
1212 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1213 are defined as returning one or two 32 bit values, respectively,
1214 and not values of BITS_PER_WORD bits. */
1215 #ifdef REAL_ARITHMETIC
1216 /* The output is some bits, the width of the target machine's word.
1217 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1219 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1220 && GET_MODE_CLASS (mode) == MODE_FLOAT
1221 && GET_MODE_BITSIZE (mode) == 64
1222 && GET_CODE (op) == CONST_DOUBLE)
1227 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1228 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1230 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1231 which the words are written depends on the word endianness.
1232 ??? This is a potential portability problem and should
1233 be fixed at some point.
1235 We must excercise caution with the sign bit. By definition there
1236 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1237 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1238 So we explicitly mask and sign-extend as necessary. */
1239 if (BITS_PER_WORD == 32)
1242 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1243 return GEN_INT (val);
1245 #if HOST_BITS_PER_WIDE_INT >= 64
1246 else if (BITS_PER_WORD >= 64 && i == 0)
1248 val = k[! WORDS_BIG_ENDIAN];
1249 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1250 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1251 return GEN_INT (val);
1254 else if (BITS_PER_WORD == 16)
1257 if ((i & 1) == !WORDS_BIG_ENDIAN)
1260 return GEN_INT (val);
1265 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1266 && GET_MODE_CLASS (mode) == MODE_FLOAT
1267 && GET_MODE_BITSIZE (mode) > 64
1268 && GET_CODE (op) == CONST_DOUBLE)
1273 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1274 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1276 if (BITS_PER_WORD == 32)
1279 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1280 return GEN_INT (val);
1285 #else /* no REAL_ARITHMETIC */
1286 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1287 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1288 || flag_pretend_float)
1289 && GET_MODE_CLASS (mode) == MODE_FLOAT
1290 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1291 && GET_CODE (op) == CONST_DOUBLE)
1293 /* The constant is stored in the host's word-ordering,
1294 but we want to access it in the target's word-ordering. Some
1295 compilers don't like a conditional inside macro args, so we have two
1296 copies of the return. */
1297 #ifdef HOST_WORDS_BIG_ENDIAN
1298 return GEN_INT (i == WORDS_BIG_ENDIAN
1299 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1301 return GEN_INT (i != WORDS_BIG_ENDIAN
1302 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1305 #endif /* no REAL_ARITHMETIC */
1307 /* Single word float is a little harder, since single- and double-word
1308 values often do not have the same high-order bits. We have already
1309 verified that we want the only defined word of the single-word value. */
1310 #ifdef REAL_ARITHMETIC
1311 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1312 && GET_MODE_BITSIZE (mode) == 32
1313 && GET_CODE (op) == CONST_DOUBLE)
1318 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1319 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1321 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1323 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1325 if (BITS_PER_WORD == 16)
1327 if ((i & 1) == !WORDS_BIG_ENDIAN)
1332 return GEN_INT (val);
1335 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1336 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1337 || flag_pretend_float)
1338 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1339 && GET_MODE_CLASS (mode) == MODE_FLOAT
1340 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1341 && GET_CODE (op) == CONST_DOUBLE)
1344 union {float f; HOST_WIDE_INT i; } u;
1346 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1349 return GEN_INT (u.i);
1351 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1352 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1353 || flag_pretend_float)
1354 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1355 && GET_MODE_CLASS (mode) == MODE_FLOAT
1356 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1357 && GET_CODE (op) == CONST_DOUBLE)
1360 union {double d; HOST_WIDE_INT i; } u;
1362 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1365 return GEN_INT (u.i);
1367 #endif /* no REAL_ARITHMETIC */
1369 /* The only remaining cases that we can handle are integers.
1370 Convert to proper endianness now since these cases need it.
1371 At this point, i == 0 means the low-order word.
1373 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1374 in general. However, if OP is (const_int 0), we can just return
1377 if (op == const0_rtx)
1380 if (GET_MODE_CLASS (mode) != MODE_INT
1381 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1382 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1385 if (WORDS_BIG_ENDIAN)
1386 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1388 /* Find out which word on the host machine this value is in and get
1389 it from the constant. */
1390 val = (i / size_ratio == 0
1391 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1392 : (GET_CODE (op) == CONST_INT
1393 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1395 /* Get the value we want into the low bits of val. */
1396 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1397 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1399 val = trunc_int_for_mode (val, word_mode);
1401 return GEN_INT (val);
1404 /* Similar to `operand_subword', but never return 0. If we can't extract
1405 the required subword, put OP into a register and try again. If that fails,
1406 abort. We always validate the address in this case. It is not valid
1407 to call this function after reload; it is mostly meant for RTL
1410 MODE is the mode of OP, in case it is CONST_INT. */
1413 operand_subword_force (op, i, mode)
1416 enum machine_mode mode;
1418 rtx result = operand_subword (op, i, 1, mode);
1423 if (mode != BLKmode && mode != VOIDmode)
1425 /* If this is a register which can not be accessed by words, copy it
1426 to a pseudo register. */
1427 if (GET_CODE (op) == REG)
1428 op = copy_to_reg (op);
1430 op = force_reg (mode, op);
1433 result = operand_subword (op, i, 1, mode);
1440 /* Given a compare instruction, swap the operands.
1441 A test instruction is changed into a compare of 0 against the operand. */
1444 reverse_comparison (insn)
1447 rtx body = PATTERN (insn);
1450 if (GET_CODE (body) == SET)
1451 comp = SET_SRC (body);
1453 comp = SET_SRC (XVECEXP (body, 0, 0));
1455 if (GET_CODE (comp) == COMPARE)
1457 rtx op0 = XEXP (comp, 0);
1458 rtx op1 = XEXP (comp, 1);
1459 XEXP (comp, 0) = op1;
1460 XEXP (comp, 1) = op0;
1464 rtx new = gen_rtx_COMPARE (VOIDmode,
1465 CONST0_RTX (GET_MODE (comp)), comp);
1466 if (GET_CODE (body) == SET)
1467 SET_SRC (body) = new;
1469 SET_SRC (XVECEXP (body, 0, 0)) = new;
1473 /* Return a memory reference like MEMREF, but with its mode changed
1474 to MODE and its address changed to ADDR.
1475 (VOIDmode means don't change the mode.
1476 NULL for ADDR means don't change the address.) */
1479 change_address (memref, mode, addr)
1481 enum machine_mode mode;
1486 if (GET_CODE (memref) != MEM)
1488 if (mode == VOIDmode)
1489 mode = GET_MODE (memref);
1491 addr = XEXP (memref, 0);
1493 /* If reload is in progress or has completed, ADDR must be valid.
1494 Otherwise, we can call memory_address to make it valid. */
1495 if (reload_completed || reload_in_progress)
1497 if (! memory_address_p (mode, addr))
1501 addr = memory_address (mode, addr);
1503 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1506 new = gen_rtx_MEM (mode, addr);
1507 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1508 MEM_COPY_ATTRIBUTES (new, memref);
1509 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (memref);
1513 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1520 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1521 NULL_RTX, label_num++, NULL_PTR);
1523 LABEL_NUSES (label) = 0;
1527 /* For procedure integration. */
1529 /* Install new pointers to the first and last insns in the chain.
1530 Also, set cur_insn_uid to one higher than the last in use.
1531 Used for an inline-procedure after copying the insn chain. */
1534 set_new_first_and_last_insn (first, last)
1543 for (insn = first; insn; insn = NEXT_INSN (insn))
1544 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1549 /* Set the range of label numbers found in the current function.
1550 This is used when belatedly compiling an inline function. */
1553 set_new_first_and_last_label_num (first, last)
1556 base_label_num = label_num;
1557 first_label_num = first;
1558 last_label_num = last;
1561 /* Set the last label number found in the current function.
1562 This is used when belatedly compiling an inline function. */
1565 set_new_last_label_num (last)
1568 base_label_num = label_num;
1569 last_label_num = last;
1572 /* Restore all variables describing the current status from the structure *P.
1573 This is used after a nested function. */
1576 restore_emit_status (p)
1580 clear_emit_caches ();
1583 /* Clear out all parts of the state in F that can safely be discarded
1584 after the function has been compiled, to let garbage collection
1585 reclaim the memory. */
1588 free_emit_status (f)
1591 free (f->emit->x_regno_reg_rtx);
1592 free (f->emit->regno_pointer_flag);
1593 free (f->emit->regno_pointer_align);
1598 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1599 It does not work to do this twice, because the mark bits set here
1600 are not cleared afterwards. */
1603 unshare_all_rtl (insn)
1606 for (; insn; insn = NEXT_INSN (insn))
1607 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1608 || GET_CODE (insn) == CALL_INSN)
1610 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1611 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1612 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1615 /* Make sure the addresses of stack slots found outside the insn chain
1616 (such as, in DECL_RTL of a variable) are not shared
1617 with the insn chain.
1619 This special care is necessary when the stack slot MEM does not
1620 actually appear in the insn chain. If it does appear, its address
1621 is unshared from all else at that point. */
1623 copy_rtx_if_shared (stack_slot_list);
1626 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1627 Recursively does the same for subexpressions. */
1630 copy_rtx_if_shared (orig)
1633 register rtx x = orig;
1635 register enum rtx_code code;
1636 register const char *format_ptr;
1642 code = GET_CODE (x);
1644 /* These types may be freely shared. */
1657 /* SCRATCH must be shared because they represent distinct values. */
1661 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1662 a LABEL_REF, it isn't sharable. */
1663 if (GET_CODE (XEXP (x, 0)) == PLUS
1664 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1665 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1674 /* The chain of insns is not being copied. */
1678 /* A MEM is allowed to be shared if its address is constant.
1680 We used to allow sharing of MEMs which referenced
1681 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1682 that can lose. instantiate_virtual_regs will not unshare
1683 the MEMs, and combine may change the structure of the address
1684 because it looks safe and profitable in one context, but
1685 in some other context it creates unrecognizable RTL. */
1686 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1695 /* This rtx may not be shared. If it has already been seen,
1696 replace it with a copy of itself. */
1702 copy = rtx_alloc (code);
1703 bcopy ((char *) x, (char *) copy,
1704 (sizeof (*copy) - sizeof (copy->fld)
1705 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1711 /* Now scan the subexpressions recursively.
1712 We can store any replaced subexpressions directly into X
1713 since we know X is not shared! Any vectors in X
1714 must be copied if X was copied. */
1716 format_ptr = GET_RTX_FORMAT (code);
1718 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1720 switch (*format_ptr++)
1723 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1727 if (XVEC (x, i) != NULL)
1730 int len = XVECLEN (x, i);
1732 if (copied && len > 0)
1733 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1734 for (j = 0; j < len; j++)
1735 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1743 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1744 to look for shared sub-parts. */
1747 reset_used_flags (x)
1751 register enum rtx_code code;
1752 register const char *format_ptr;
1757 code = GET_CODE (x);
1759 /* These types may be freely shared so we needn't do any resetting
1780 /* The chain of insns is not being copied. */
1789 format_ptr = GET_RTX_FORMAT (code);
1790 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1792 switch (*format_ptr++)
1795 reset_used_flags (XEXP (x, i));
1799 for (j = 0; j < XVECLEN (x, i); j++)
1800 reset_used_flags (XVECEXP (x, i, j));
1806 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1807 Return X or the rtx for the pseudo reg the value of X was copied into.
1808 OTHER must be valid as a SET_DEST. */
1811 make_safe_from (x, other)
1815 switch (GET_CODE (other))
1818 other = SUBREG_REG (other);
1820 case STRICT_LOW_PART:
1823 other = XEXP (other, 0);
1829 if ((GET_CODE (other) == MEM
1831 && GET_CODE (x) != REG
1832 && GET_CODE (x) != SUBREG)
1833 || (GET_CODE (other) == REG
1834 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1835 || reg_mentioned_p (other, x))))
1837 rtx temp = gen_reg_rtx (GET_MODE (x));
1838 emit_move_insn (temp, x);
1844 /* Emission of insns (adding them to the doubly-linked list). */
1846 /* Return the first insn of the current sequence or current function. */
1854 /* Return the last insn emitted in current sequence or current function. */
1862 /* Specify a new insn as the last in the chain. */
1865 set_last_insn (insn)
1868 if (NEXT_INSN (insn) != 0)
1873 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1876 get_last_insn_anywhere ()
1878 struct sequence_stack *stack;
1881 for (stack = seq_stack; stack; stack = stack->next)
1882 if (stack->last != 0)
1887 /* Return a number larger than any instruction's uid in this function. */
1892 return cur_insn_uid;
1895 /* Return the next insn. If it is a SEQUENCE, return the first insn
1904 insn = NEXT_INSN (insn);
1905 if (insn && GET_CODE (insn) == INSN
1906 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1907 insn = XVECEXP (PATTERN (insn), 0, 0);
1913 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1917 previous_insn (insn)
1922 insn = PREV_INSN (insn);
1923 if (insn && GET_CODE (insn) == INSN
1924 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1925 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1931 /* Return the next insn after INSN that is not a NOTE. This routine does not
1932 look inside SEQUENCEs. */
1935 next_nonnote_insn (insn)
1940 insn = NEXT_INSN (insn);
1941 if (insn == 0 || GET_CODE (insn) != NOTE)
1948 /* Return the previous insn before INSN that is not a NOTE. This routine does
1949 not look inside SEQUENCEs. */
1952 prev_nonnote_insn (insn)
1957 insn = PREV_INSN (insn);
1958 if (insn == 0 || GET_CODE (insn) != NOTE)
1965 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1966 or 0, if there is none. This routine does not look inside
1970 next_real_insn (insn)
1975 insn = NEXT_INSN (insn);
1976 if (insn == 0 || GET_CODE (insn) == INSN
1977 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1984 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1985 or 0, if there is none. This routine does not look inside
1989 prev_real_insn (insn)
1994 insn = PREV_INSN (insn);
1995 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1996 || GET_CODE (insn) == JUMP_INSN)
2003 /* Find the next insn after INSN that really does something. This routine
2004 does not look inside SEQUENCEs. Until reload has completed, this is the
2005 same as next_real_insn. */
2008 next_active_insn (insn)
2013 insn = NEXT_INSN (insn);
2015 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2016 || (GET_CODE (insn) == INSN
2017 && (! reload_completed
2018 || (GET_CODE (PATTERN (insn)) != USE
2019 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2026 /* Find the last insn before INSN that really does something. This routine
2027 does not look inside SEQUENCEs. Until reload has completed, this is the
2028 same as prev_real_insn. */
2031 prev_active_insn (insn)
2036 insn = PREV_INSN (insn);
2038 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2039 || (GET_CODE (insn) == INSN
2040 && (! reload_completed
2041 || (GET_CODE (PATTERN (insn)) != USE
2042 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2049 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2057 insn = NEXT_INSN (insn);
2058 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2065 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2073 insn = PREV_INSN (insn);
2074 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2082 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2083 and REG_CC_USER notes so we can find it. */
2086 link_cc0_insns (insn)
2089 rtx user = next_nonnote_insn (insn);
2091 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2092 user = XVECEXP (PATTERN (user), 0, 0);
2094 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2096 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2099 /* Return the next insn that uses CC0 after INSN, which is assumed to
2100 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2101 applied to the result of this function should yield INSN).
2103 Normally, this is simply the next insn. However, if a REG_CC_USER note
2104 is present, it contains the insn that uses CC0.
2106 Return 0 if we can't find the insn. */
2109 next_cc0_user (insn)
2112 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2115 return XEXP (note, 0);
2117 insn = next_nonnote_insn (insn);
2118 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2119 insn = XVECEXP (PATTERN (insn), 0, 0);
2121 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2122 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2128 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2129 note, it is the previous insn. */
2132 prev_cc0_setter (insn)
2135 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2138 return XEXP (note, 0);
2140 insn = prev_nonnote_insn (insn);
2141 if (! sets_cc0_p (PATTERN (insn)))
2148 /* Try splitting insns that can be split for better scheduling.
2149 PAT is the pattern which might split.
2150 TRIAL is the insn providing PAT.
2151 LAST is non-zero if we should return the last insn of the sequence produced.
2153 If this routine succeeds in splitting, it returns the first or last
2154 replacement insn depending on the value of LAST. Otherwise, it
2155 returns TRIAL. If the insn to be returned can be split, it will be. */
2158 try_split (pat, trial, last)
2162 rtx before = PREV_INSN (trial);
2163 rtx after = NEXT_INSN (trial);
2164 rtx seq = split_insns (pat, trial);
2165 int has_barrier = 0;
2168 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2169 We may need to handle this specially. */
2170 if (after && GET_CODE (after) == BARRIER)
2173 after = NEXT_INSN (after);
2178 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2179 The latter case will normally arise only when being done so that
2180 it, in turn, will be split (SFmode on the 29k is an example). */
2181 if (GET_CODE (seq) == SEQUENCE)
2183 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2184 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2185 increment the usage count so we don't delete the label. */
2188 if (GET_CODE (trial) == JUMP_INSN)
2189 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2190 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2192 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2194 if (JUMP_LABEL (trial))
2195 LABEL_NUSES (JUMP_LABEL (trial))++;
2198 tem = emit_insn_after (seq, before);
2200 delete_insn (trial);
2202 emit_barrier_after (tem);
2204 /* Recursively call try_split for each new insn created; by the
2205 time control returns here that insn will be fully split, so
2206 set LAST and continue from the insn after the one returned.
2207 We can't use next_active_insn here since AFTER may be a note.
2208 Ignore deleted insns, which can be occur if not optimizing. */
2209 for (tem = NEXT_INSN (before); tem != after;
2210 tem = NEXT_INSN (tem))
2211 if (! INSN_DELETED_P (tem)
2212 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2213 tem = try_split (PATTERN (tem), tem, 1);
2215 /* Avoid infinite loop if the result matches the original pattern. */
2216 else if (rtx_equal_p (seq, pat))
2220 PATTERN (trial) = seq;
2221 INSN_CODE (trial) = -1;
2222 try_split (seq, trial, last);
2225 /* Return either the first or the last insn, depending on which was
2227 return last ? prev_active_insn (after) : next_active_insn (before);
2233 /* Make and return an INSN rtx, initializing all its slots.
2234 Store PATTERN in the pattern slots. */
2237 make_insn_raw (pattern)
2242 /* If in RTL generation phase, see if FREE_INSN can be used. */
2243 if (!ggc_p && free_insn != 0 && rtx_equal_function_value_matters)
2246 free_insn = NEXT_INSN (free_insn);
2247 PUT_CODE (insn, INSN);
2250 insn = rtx_alloc (INSN);
2252 INSN_UID (insn) = cur_insn_uid++;
2253 PATTERN (insn) = pattern;
2254 INSN_CODE (insn) = -1;
2255 LOG_LINKS (insn) = NULL;
2256 REG_NOTES (insn) = NULL;
2261 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2264 make_jump_insn_raw (pattern)
2269 insn = rtx_alloc (JUMP_INSN);
2270 INSN_UID (insn) = cur_insn_uid++;
2272 PATTERN (insn) = pattern;
2273 INSN_CODE (insn) = -1;
2274 LOG_LINKS (insn) = NULL;
2275 REG_NOTES (insn) = NULL;
2276 JUMP_LABEL (insn) = NULL;
2281 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2284 make_call_insn_raw (pattern)
2289 insn = rtx_alloc (CALL_INSN);
2290 INSN_UID (insn) = cur_insn_uid++;
2292 PATTERN (insn) = pattern;
2293 INSN_CODE (insn) = -1;
2294 LOG_LINKS (insn) = NULL;
2295 REG_NOTES (insn) = NULL;
2296 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2301 /* Add INSN to the end of the doubly-linked list.
2302 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2308 PREV_INSN (insn) = last_insn;
2309 NEXT_INSN (insn) = 0;
2311 if (NULL != last_insn)
2312 NEXT_INSN (last_insn) = insn;
2314 if (NULL == first_insn)
2320 /* Add INSN into the doubly-linked list after insn AFTER. This and
2321 the next should be the only functions called to insert an insn once
2322 delay slots have been filled since only they know how to update a
2326 add_insn_after (insn, after)
2329 rtx next = NEXT_INSN (after);
2331 if (optimize && INSN_DELETED_P (after))
2334 NEXT_INSN (insn) = next;
2335 PREV_INSN (insn) = after;
2339 PREV_INSN (next) = insn;
2340 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2341 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2343 else if (last_insn == after)
2347 struct sequence_stack *stack = seq_stack;
2348 /* Scan all pending sequences too. */
2349 for (; stack; stack = stack->next)
2350 if (after == stack->last)
2360 NEXT_INSN (after) = insn;
2361 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2363 rtx sequence = PATTERN (after);
2364 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2368 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2369 the previous should be the only functions called to insert an insn once
2370 delay slots have been filled since only they know how to update a
2374 add_insn_before (insn, before)
2377 rtx prev = PREV_INSN (before);
2379 if (optimize && INSN_DELETED_P (before))
2382 PREV_INSN (insn) = prev;
2383 NEXT_INSN (insn) = before;
2387 NEXT_INSN (prev) = insn;
2388 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2390 rtx sequence = PATTERN (prev);
2391 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2394 else if (first_insn == before)
2398 struct sequence_stack *stack = seq_stack;
2399 /* Scan all pending sequences too. */
2400 for (; stack; stack = stack->next)
2401 if (before == stack->first)
2403 stack->first = insn;
2411 PREV_INSN (before) = insn;
2412 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2413 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2416 /* Remove an insn from its doubly-linked list. This function knows how
2417 to handle sequences. */
2422 rtx next = NEXT_INSN (insn);
2423 rtx prev = PREV_INSN (insn);
2426 NEXT_INSN (prev) = next;
2427 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2429 rtx sequence = PATTERN (prev);
2430 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2433 else if (first_insn == insn)
2437 struct sequence_stack *stack = seq_stack;
2438 /* Scan all pending sequences too. */
2439 for (; stack; stack = stack->next)
2440 if (insn == stack->first)
2442 stack->first = next;
2452 PREV_INSN (next) = prev;
2453 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2454 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2456 else if (last_insn == insn)
2460 struct sequence_stack *stack = seq_stack;
2461 /* Scan all pending sequences too. */
2462 for (; stack; stack = stack->next)
2463 if (insn == stack->last)
2474 /* Delete all insns made since FROM.
2475 FROM becomes the new last instruction. */
2478 delete_insns_since (from)
2484 NEXT_INSN (from) = 0;
2488 /* This function is deprecated, please use sequences instead.
2490 Move a consecutive bunch of insns to a different place in the chain.
2491 The insns to be moved are those between FROM and TO.
2492 They are moved to a new position after the insn AFTER.
2493 AFTER must not be FROM or TO or any insn in between.
2495 This function does not know about SEQUENCEs and hence should not be
2496 called after delay-slot filling has been done. */
2499 reorder_insns (from, to, after)
2500 rtx from, to, after;
2502 /* Splice this bunch out of where it is now. */
2503 if (PREV_INSN (from))
2504 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2506 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2507 if (last_insn == to)
2508 last_insn = PREV_INSN (from);
2509 if (first_insn == from)
2510 first_insn = NEXT_INSN (to);
2512 /* Make the new neighbors point to it and it to them. */
2513 if (NEXT_INSN (after))
2514 PREV_INSN (NEXT_INSN (after)) = to;
2516 NEXT_INSN (to) = NEXT_INSN (after);
2517 PREV_INSN (from) = after;
2518 NEXT_INSN (after) = from;
2519 if (after == last_insn)
2523 /* Return the line note insn preceding INSN. */
2526 find_line_note (insn)
2529 if (no_line_numbers)
2532 for (; insn; insn = PREV_INSN (insn))
2533 if (GET_CODE (insn) == NOTE
2534 && NOTE_LINE_NUMBER (insn) >= 0)
2540 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2541 of the moved insns when debugging. This may insert a note between AFTER
2542 and FROM, and another one after TO. */
2545 reorder_insns_with_line_notes (from, to, after)
2546 rtx from, to, after;
2548 rtx from_line = find_line_note (from);
2549 rtx after_line = find_line_note (after);
2551 reorder_insns (from, to, after);
2553 if (from_line == after_line)
2557 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2558 NOTE_LINE_NUMBER (from_line),
2561 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2562 NOTE_LINE_NUMBER (after_line),
2566 /* Emit an insn of given code and pattern
2567 at a specified place within the doubly-linked list. */
2569 /* Make an instruction with body PATTERN
2570 and output it before the instruction BEFORE. */
2573 emit_insn_before (pattern, before)
2574 register rtx pattern, before;
2576 register rtx insn = before;
2578 if (GET_CODE (pattern) == SEQUENCE)
2582 for (i = 0; i < XVECLEN (pattern, 0); i++)
2584 insn = XVECEXP (pattern, 0, i);
2585 add_insn_before (insn, before);
2587 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2588 sequence_result[XVECLEN (pattern, 0)] = pattern;
2592 insn = make_insn_raw (pattern);
2593 add_insn_before (insn, before);
2599 /* Make an instruction with body PATTERN and code JUMP_INSN
2600 and output it before the instruction BEFORE. */
2603 emit_jump_insn_before (pattern, before)
2604 register rtx pattern, before;
2608 if (GET_CODE (pattern) == SEQUENCE)
2609 insn = emit_insn_before (pattern, before);
2612 insn = make_jump_insn_raw (pattern);
2613 add_insn_before (insn, before);
2619 /* Make an instruction with body PATTERN and code CALL_INSN
2620 and output it before the instruction BEFORE. */
2623 emit_call_insn_before (pattern, before)
2624 register rtx pattern, before;
2628 if (GET_CODE (pattern) == SEQUENCE)
2629 insn = emit_insn_before (pattern, before);
2632 insn = make_call_insn_raw (pattern);
2633 add_insn_before (insn, before);
2634 PUT_CODE (insn, CALL_INSN);
2640 /* Make an insn of code BARRIER
2641 and output it before the insn BEFORE. */
2644 emit_barrier_before (before)
2645 register rtx before;
2647 register rtx insn = rtx_alloc (BARRIER);
2649 INSN_UID (insn) = cur_insn_uid++;
2651 add_insn_before (insn, before);
2655 /* Emit the label LABEL before the insn BEFORE. */
2658 emit_label_before (label, before)
2661 /* This can be called twice for the same label as a result of the
2662 confusion that follows a syntax error! So make it harmless. */
2663 if (INSN_UID (label) == 0)
2665 INSN_UID (label) = cur_insn_uid++;
2666 add_insn_before (label, before);
2672 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2675 emit_note_before (subtype, before)
2679 register rtx note = rtx_alloc (NOTE);
2680 INSN_UID (note) = cur_insn_uid++;
2681 NOTE_SOURCE_FILE (note) = 0;
2682 NOTE_LINE_NUMBER (note) = subtype;
2684 add_insn_before (note, before);
2688 /* Make an insn of code INSN with body PATTERN
2689 and output it after the insn AFTER. */
2692 emit_insn_after (pattern, after)
2693 register rtx pattern, after;
2695 register rtx insn = after;
2697 if (GET_CODE (pattern) == SEQUENCE)
2701 for (i = 0; i < XVECLEN (pattern, 0); i++)
2703 insn = XVECEXP (pattern, 0, i);
2704 add_insn_after (insn, after);
2707 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2708 sequence_result[XVECLEN (pattern, 0)] = pattern;
2712 insn = make_insn_raw (pattern);
2713 add_insn_after (insn, after);
2719 /* Similar to emit_insn_after, except that line notes are to be inserted so
2720 as to act as if this insn were at FROM. */
2723 emit_insn_after_with_line_notes (pattern, after, from)
2724 rtx pattern, after, from;
2726 rtx from_line = find_line_note (from);
2727 rtx after_line = find_line_note (after);
2728 rtx insn = emit_insn_after (pattern, after);
2731 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2732 NOTE_LINE_NUMBER (from_line),
2736 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2737 NOTE_LINE_NUMBER (after_line),
2741 /* Make an insn of code JUMP_INSN with body PATTERN
2742 and output it after the insn AFTER. */
2745 emit_jump_insn_after (pattern, after)
2746 register rtx pattern, after;
2750 if (GET_CODE (pattern) == SEQUENCE)
2751 insn = emit_insn_after (pattern, after);
2754 insn = make_jump_insn_raw (pattern);
2755 add_insn_after (insn, after);
2761 /* Make an insn of code BARRIER
2762 and output it after the insn AFTER. */
2765 emit_barrier_after (after)
2768 register rtx insn = rtx_alloc (BARRIER);
2770 INSN_UID (insn) = cur_insn_uid++;
2772 add_insn_after (insn, after);
2776 /* Emit the label LABEL after the insn AFTER. */
2779 emit_label_after (label, after)
2782 /* This can be called twice for the same label
2783 as a result of the confusion that follows a syntax error!
2784 So make it harmless. */
2785 if (INSN_UID (label) == 0)
2787 INSN_UID (label) = cur_insn_uid++;
2788 add_insn_after (label, after);
2794 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2797 emit_note_after (subtype, after)
2801 register rtx note = rtx_alloc (NOTE);
2802 INSN_UID (note) = cur_insn_uid++;
2803 NOTE_SOURCE_FILE (note) = 0;
2804 NOTE_LINE_NUMBER (note) = subtype;
2805 add_insn_after (note, after);
2809 /* Emit a line note for FILE and LINE after the insn AFTER. */
2812 emit_line_note_after (file, line, after)
2819 if (no_line_numbers && line > 0)
2825 note = rtx_alloc (NOTE);
2826 INSN_UID (note) = cur_insn_uid++;
2827 NOTE_SOURCE_FILE (note) = file;
2828 NOTE_LINE_NUMBER (note) = line;
2829 add_insn_after (note, after);
2833 /* Make an insn of code INSN with pattern PATTERN
2834 and add it to the end of the doubly-linked list.
2835 If PATTERN is a SEQUENCE, take the elements of it
2836 and emit an insn for each element.
2838 Returns the last insn emitted. */
2844 rtx insn = last_insn;
2846 if (GET_CODE (pattern) == SEQUENCE)
2850 for (i = 0; i < XVECLEN (pattern, 0); i++)
2852 insn = XVECEXP (pattern, 0, i);
2855 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2856 sequence_result[XVECLEN (pattern, 0)] = pattern;
2860 insn = make_insn_raw (pattern);
2867 /* Emit the insns in a chain starting with INSN.
2868 Return the last insn emitted. */
2878 rtx next = NEXT_INSN (insn);
2887 /* Emit the insns in a chain starting with INSN and place them in front of
2888 the insn BEFORE. Return the last insn emitted. */
2891 emit_insns_before (insn, before)
2899 rtx next = NEXT_INSN (insn);
2900 add_insn_before (insn, before);
2908 /* Emit the insns in a chain starting with FIRST and place them in back of
2909 the insn AFTER. Return the last insn emitted. */
2912 emit_insns_after (first, after)
2917 register rtx after_after;
2925 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2928 after_after = NEXT_INSN (after);
2930 NEXT_INSN (after) = first;
2931 PREV_INSN (first) = after;
2932 NEXT_INSN (last) = after_after;
2934 PREV_INSN (after_after) = last;
2936 if (after == last_insn)
2941 /* Make an insn of code JUMP_INSN with pattern PATTERN
2942 and add it to the end of the doubly-linked list. */
2945 emit_jump_insn (pattern)
2948 if (GET_CODE (pattern) == SEQUENCE)
2949 return emit_insn (pattern);
2952 register rtx insn = make_jump_insn_raw (pattern);
2958 /* Make an insn of code CALL_INSN with pattern PATTERN
2959 and add it to the end of the doubly-linked list. */
2962 emit_call_insn (pattern)
2965 if (GET_CODE (pattern) == SEQUENCE)
2966 return emit_insn (pattern);
2969 register rtx insn = make_call_insn_raw (pattern);
2971 PUT_CODE (insn, CALL_INSN);
2976 /* Add the label LABEL to the end of the doubly-linked list. */
2982 /* This can be called twice for the same label
2983 as a result of the confusion that follows a syntax error!
2984 So make it harmless. */
2985 if (INSN_UID (label) == 0)
2987 INSN_UID (label) = cur_insn_uid++;
2993 /* Make an insn of code BARRIER
2994 and add it to the end of the doubly-linked list. */
2999 register rtx barrier = rtx_alloc (BARRIER);
3000 INSN_UID (barrier) = cur_insn_uid++;
3005 /* Make an insn of code NOTE
3006 with data-fields specified by FILE and LINE
3007 and add it to the end of the doubly-linked list,
3008 but only if line-numbers are desired for debugging info. */
3011 emit_line_note (file, line)
3015 set_file_and_line_for_stmt (file, line);
3018 if (no_line_numbers)
3022 return emit_note (file, line);
3025 /* Make an insn of code NOTE
3026 with data-fields specified by FILE and LINE
3027 and add it to the end of the doubly-linked list.
3028 If it is a line-number NOTE, omit it if it matches the previous one. */
3031 emit_note (file, line)
3039 if (file && last_filename && !strcmp (file, last_filename)
3040 && line == last_linenum)
3042 last_filename = file;
3043 last_linenum = line;
3046 if (no_line_numbers && line > 0)
3052 note = rtx_alloc (NOTE);
3053 INSN_UID (note) = cur_insn_uid++;
3054 NOTE_SOURCE_FILE (note) = file;
3055 NOTE_LINE_NUMBER (note) = line;
3060 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3063 emit_line_note_force (file, line)
3068 return emit_line_note (file, line);
3071 /* Cause next statement to emit a line note even if the line number
3072 has not changed. This is used at the beginning of a function. */
3075 force_next_line_note ()
3080 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3081 note of this type already exists, remove it first. */
3084 set_unique_reg_note (insn, kind, datum)
3089 rtx note = find_reg_note (insn, kind, NULL_RTX);
3091 /* First remove the note if there already is one. */
3093 remove_note (insn, note);
3095 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3098 /* Return an indication of which type of insn should have X as a body.
3099 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3105 if (GET_CODE (x) == CODE_LABEL)
3107 if (GET_CODE (x) == CALL)
3109 if (GET_CODE (x) == RETURN)
3111 if (GET_CODE (x) == SET)
3113 if (SET_DEST (x) == pc_rtx)
3115 else if (GET_CODE (SET_SRC (x)) == CALL)
3120 if (GET_CODE (x) == PARALLEL)
3123 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3124 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3126 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3127 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3129 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3130 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3136 /* Emit the rtl pattern X as an appropriate kind of insn.
3137 If X is a label, it is simply added into the insn chain. */
3143 enum rtx_code code = classify_insn (x);
3145 if (code == CODE_LABEL)
3146 return emit_label (x);
3147 else if (code == INSN)
3148 return emit_insn (x);
3149 else if (code == JUMP_INSN)
3151 register rtx insn = emit_jump_insn (x);
3152 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3153 return emit_barrier ();
3156 else if (code == CALL_INSN)
3157 return emit_call_insn (x);
3162 /* Begin emitting insns to a sequence which can be packaged in an
3163 RTL_EXPR. If this sequence will contain something that might cause
3164 the compiler to pop arguments to function calls (because those
3165 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3166 details), use do_pending_stack_adjust before calling this function.
3167 That will ensure that the deferred pops are not accidentally
3168 emitted in the middel of this sequence. */
3173 struct sequence_stack *tem;
3175 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3177 tem->next = seq_stack;
3178 tem->first = first_insn;
3179 tem->last = last_insn;
3180 tem->sequence_rtl_expr = seq_rtl_expr;
3188 /* Similarly, but indicate that this sequence will be placed in T, an
3189 RTL_EXPR. See the documentation for start_sequence for more
3190 information about how to use this function. */
3193 start_sequence_for_rtl_expr (t)
3201 /* Set up the insn chain starting with FIRST as the current sequence,
3202 saving the previously current one. See the documentation for
3203 start_sequence for more information about how to use this function. */
3206 push_to_sequence (first)
3213 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3219 /* Set up the outer-level insn chain
3220 as the current sequence, saving the previously current one. */
3223 push_topmost_sequence ()
3225 struct sequence_stack *stack, *top = NULL;
3229 for (stack = seq_stack; stack; stack = stack->next)
3232 first_insn = top->first;
3233 last_insn = top->last;
3234 seq_rtl_expr = top->sequence_rtl_expr;
3237 /* After emitting to the outer-level insn chain, update the outer-level
3238 insn chain, and restore the previous saved state. */
3241 pop_topmost_sequence ()
3243 struct sequence_stack *stack, *top = NULL;
3245 for (stack = seq_stack; stack; stack = stack->next)
3248 top->first = first_insn;
3249 top->last = last_insn;
3250 /* ??? Why don't we save seq_rtl_expr here? */
3255 /* After emitting to a sequence, restore previous saved state.
3257 To get the contents of the sequence just made, you must call
3258 `gen_sequence' *before* calling here.
3260 If the compiler might have deferred popping arguments while
3261 generating this sequence, and this sequence will not be immediately
3262 inserted into the instruction stream, use do_pending_stack_adjust
3263 before calling gen_sequence. That will ensure that the deferred
3264 pops are inserted into this sequence, and not into some random
3265 location in the instruction stream. See INHIBIT_DEFER_POP for more
3266 information about deferred popping of arguments. */
3271 struct sequence_stack *tem = seq_stack;
3273 first_insn = tem->first;
3274 last_insn = tem->last;
3275 seq_rtl_expr = tem->sequence_rtl_expr;
3276 seq_stack = tem->next;
3281 /* Return 1 if currently emitting into a sequence. */
3286 return seq_stack != 0;
3289 /* Generate a SEQUENCE rtx containing the insns already emitted
3290 to the current sequence.
3292 This is how the gen_... function from a DEFINE_EXPAND
3293 constructs the SEQUENCE that it returns. */
3303 /* Count the insns in the chain. */
3305 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3308 /* If only one insn, return its pattern rather than a SEQUENCE.
3309 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3310 the case of an empty list.) */
3312 && ! RTX_FRAME_RELATED_P (first_insn)
3313 && (GET_CODE (first_insn) == INSN
3314 || GET_CODE (first_insn) == JUMP_INSN
3315 /* Don't discard the call usage field. */
3316 || (GET_CODE (first_insn) == CALL_INSN
3317 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3321 NEXT_INSN (first_insn) = free_insn;
3322 free_insn = first_insn;
3324 return PATTERN (first_insn);
3327 /* Put them in a vector. See if we already have a SEQUENCE of the
3328 appropriate length around. */
3329 if (!ggc_p && len < SEQUENCE_RESULT_SIZE
3330 && (result = sequence_result[len]) != 0)
3331 sequence_result[len] = 0;
3334 /* Ensure that this rtl goes in saveable_obstack, since we may
3336 push_obstacks_nochange ();
3337 rtl_in_saveable_obstack ();
3338 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3342 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3343 XVECEXP (result, 0, i) = tem;
3348 /* Put the various virtual registers into REGNO_REG_RTX. */
3351 init_virtual_regs (es)
3352 struct emit_status *es;
3354 rtx *ptr = es->x_regno_reg_rtx;
3355 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3356 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3357 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3358 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3359 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3363 clear_emit_caches ()
3367 /* Clear the start_sequence/gen_sequence cache. */
3368 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3369 sequence_result[i] = 0;
3373 /* Initialize data structures and variables in this file
3374 before generating rtl for each function. */
3379 struct function *f = current_function;
3381 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3384 seq_rtl_expr = NULL;
3386 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3389 first_label_num = label_num;
3393 clear_emit_caches ();
3395 /* Init the tables that describe all the pseudo regs. */
3397 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3399 f->emit->regno_pointer_flag
3400 = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
3402 f->emit->regno_pointer_align
3403 = (char *) xcalloc (f->emit->regno_pointer_flag_length,
3407 = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
3410 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3411 init_virtual_regs (f->emit);
3413 /* Indicate that the virtual registers and stack locations are
3415 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3416 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3417 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3418 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3420 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3421 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3422 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3423 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3424 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3426 #ifdef STACK_BOUNDARY
3427 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3428 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3429 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3430 = STACK_BOUNDARY / BITS_PER_UNIT;
3431 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3433 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3434 = STACK_BOUNDARY / BITS_PER_UNIT;
3435 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3436 = STACK_BOUNDARY / BITS_PER_UNIT;
3437 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3438 = STACK_BOUNDARY / BITS_PER_UNIT;
3439 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3440 = STACK_BOUNDARY / BITS_PER_UNIT;
3441 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
3444 #ifdef INIT_EXPANDERS
3449 /* Mark SS for GC. */
3452 mark_sequence_stack (ss)
3453 struct sequence_stack *ss;
3457 ggc_mark_rtx (ss->first);
3458 ggc_mark_tree (ss->sequence_rtl_expr);
3463 /* Mark ES for GC. */
3466 mark_emit_status (es)
3467 struct emit_status *es;
3475 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
3479 mark_sequence_stack (es->sequence_stack);
3480 ggc_mark_tree (es->sequence_rtl_expr);
3481 ggc_mark_rtx (es->x_first_insn);
3484 /* Create some permanent unique rtl objects shared between all functions.
3485 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3488 init_emit_once (line_numbers)
3492 enum machine_mode mode;
3493 enum machine_mode double_mode;
3495 no_line_numbers = ! line_numbers;
3497 /* Assign register numbers to the globally defined register rtx.
3498 This must be done at runtime because the register number field
3499 is in a union and some compilers can't initialize unions. */
3501 pc_rtx = gen_rtx (PC, VOIDmode);
3502 cc0_rtx = gen_rtx (CC0, VOIDmode);
3503 stack_pointer_rtx = gen_rtx_raw_REG (Pmode, STACK_POINTER_REGNUM);
3504 frame_pointer_rtx = gen_rtx_raw_REG (Pmode, FRAME_POINTER_REGNUM);
3505 if (hard_frame_pointer_rtx == 0)
3506 hard_frame_pointer_rtx = gen_rtx_raw_REG (Pmode,
3507 HARD_FRAME_POINTER_REGNUM);
3508 if (arg_pointer_rtx == 0)
3509 arg_pointer_rtx = gen_rtx_raw_REG (Pmode, ARG_POINTER_REGNUM);
3510 virtual_incoming_args_rtx =
3511 gen_rtx_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
3512 virtual_stack_vars_rtx =
3513 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
3514 virtual_stack_dynamic_rtx =
3515 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
3516 virtual_outgoing_args_rtx =
3517 gen_rtx_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
3518 virtual_cfa_rtx = gen_rtx_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
3520 /* These rtx must be roots if GC is enabled. */
3522 ggc_add_rtx_root (global_rtl, GR_MAX);
3524 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3525 return_address_pointer_rtx
3526 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3530 struct_value_rtx = STRUCT_VALUE;
3532 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3535 #ifdef STRUCT_VALUE_INCOMING
3536 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3538 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3539 struct_value_incoming_rtx
3540 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3542 struct_value_incoming_rtx = struct_value_rtx;
3546 #ifdef STATIC_CHAIN_REGNUM
3547 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3549 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3550 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3551 static_chain_incoming_rtx
3552 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3555 static_chain_incoming_rtx = static_chain_rtx;
3559 static_chain_rtx = STATIC_CHAIN;
3561 #ifdef STATIC_CHAIN_INCOMING
3562 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3564 static_chain_incoming_rtx = static_chain_rtx;
3568 #ifdef PIC_OFFSET_TABLE_REGNUM
3569 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3572 #ifdef INIT_EXPANDERS
3573 /* This is to initialize save_machine_status and restore_machine_status before
3574 the first call to push_function_context_to. This is needed by the Chill
3575 front end which calls push_function_context_to before the first cal to
3576 init_function_start. */
3580 /* Compute the word and byte modes. */
3582 byte_mode = VOIDmode;
3583 word_mode = VOIDmode;
3584 double_mode = VOIDmode;
3586 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3587 mode = GET_MODE_WIDER_MODE (mode))
3589 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3590 && byte_mode == VOIDmode)
3593 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3594 && word_mode == VOIDmode)
3598 #ifndef DOUBLE_TYPE_SIZE
3599 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3602 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3603 mode = GET_MODE_WIDER_MODE (mode))
3605 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3606 && double_mode == VOIDmode)
3610 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3612 /* Create the unique rtx's for certain rtx codes and operand values. */
3614 /* Don't use gen_rtx here since gen_rtx in this case
3615 tries to use these variables. */
3616 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3617 const_int_rtx[i + MAX_SAVED_CONST_INT] =
3618 gen_rtx_raw_CONST_INT (VOIDmode, i);
3620 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
3622 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3623 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3624 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3626 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3628 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3629 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3630 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3631 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3633 for (i = 0; i <= 2; i++)
3635 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3636 mode = GET_MODE_WIDER_MODE (mode))
3638 rtx tem = rtx_alloc (CONST_DOUBLE);
3639 union real_extract u;
3641 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3642 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3644 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3645 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3646 PUT_MODE (tem, mode);
3648 const_tiny_rtx[i][(int) mode] = tem;
3651 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3653 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3654 mode = GET_MODE_WIDER_MODE (mode))
3655 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3657 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3659 mode = GET_MODE_WIDER_MODE (mode))
3660 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3663 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
3664 if (GET_MODE_CLASS (mode) == MODE_CC)
3665 const_tiny_rtx[0][(int) mode] = const0_rtx;
3667 ggc_add_rtx_root (&const_tiny_rtx[0][0], sizeof(const_tiny_rtx)/sizeof(rtx));
3669 ggc_add_rtx_root (&const_true_rtx, 1);
3670 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
3671 ggc_add_rtx_root (&struct_value_rtx, 1);
3672 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
3673 ggc_add_rtx_root (&static_chain_rtx, 1);
3674 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
3675 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
3678 /* Query and clear/ restore no_line_numbers. This is used by the
3679 switch / case handling in stmt.c to give proper line numbers in
3680 warnings about unreachable code. */
3683 force_line_numbers ()
3685 int old = no_line_numbers;
3687 no_line_numbers = 0;
3689 force_next_line_note ();
3694 restore_line_number_status (old_value)
3697 no_line_numbers = old_value;