1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains the functions `gen_rtx', `gen_reg_rtx'
24 and `gen_label_rtx' that are the usual ways of creating rtl
25 expressions for most purposes.
27 It also has the functions for creating insns and linking
28 them in the doubly-linked chain.
30 The patterns of the insns are created by machine-dependent
31 routines in insn-emit.c, which is generated automatically from
32 the machine description. These routines use `gen_rtx' to make
33 the individual rtx's of the pattern; what is machine dependent
34 is the kind of rtx's they make and what arguments they use. */
43 #include "insn-config.h"
47 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
48 After rtl generation, it is 1 plus the largest register number used. */
50 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
52 /* This is *not* reset after each function. It gives each CODE_LABEL
53 in the entire compilation a unique label number. */
55 static int label_num = 1;
57 /* Lowest label number in current function. */
59 static int first_label_num;
61 /* Highest label number in current function.
62 Zero means use the value of label_num instead.
63 This is nonzero only when belatedly compiling an inline function. */
65 static int last_label_num;
67 /* Value label_num had when set_new_first_and_last_label_number was called.
68 If label_num has not changed since then, last_label_num is valid. */
70 static int base_label_num;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these except perhaps the floating-point CONST_DOUBLEs
79 are unique; no other rtx-object will be equal to any of these. */
81 rtx pc_rtx; /* (PC) */
82 rtx cc0_rtx; /* (CC0) */
83 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
84 rtx const0_rtx; /* (CONST_INT 0) */
85 rtx const1_rtx; /* (CONST_INT 1) */
86 rtx const2_rtx; /* (CONST_INT 2) */
87 rtx constm1_rtx; /* (CONST_INT -1) */
88 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
96 REAL_VALUE_TYPE dconst0;
97 REAL_VALUE_TYPE dconst1;
98 REAL_VALUE_TYPE dconst2;
99 REAL_VALUE_TYPE dconstm1;
101 /* All references to the following fixed hard registers go through
102 these unique rtl objects. On machines where the frame-pointer and
103 arg-pointer are the same register, they use the same unique object.
105 After register allocation, other rtl objects which used to be pseudo-regs
106 may be clobbered to refer to the frame-pointer register.
107 But references that were originally to the frame-pointer can be
108 distinguished from the others because they contain frame_pointer_rtx.
110 In an inline procedure, the stack and frame pointer rtxs may not be
111 used for anything else. */
112 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
113 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
114 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
115 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
116 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
117 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
118 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
119 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
121 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
122 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
123 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
124 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
126 /* We make one copy of (const_int C) where C is in
127 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
128 to save space during the compilation and simplify comparisons of
131 #define MAX_SAVED_CONST_INT 64
133 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
135 /* The ends of the doubly-linked chain of rtl for the current function.
136 Both are reset to null at the start of rtl generation for the function.
138 start_sequence saves both of these on `sequence_stack' and then
139 starts a new, nested sequence of insns. */
141 static rtx first_insn = NULL;
142 static rtx last_insn = NULL;
144 /* INSN_UID for next insn emitted.
145 Reset to 1 for each function compiled. */
147 static int cur_insn_uid = 1;
149 /* Line number and source file of the last line-number NOTE emitted.
150 This is used to avoid generating duplicates. */
152 static int last_linenum = 0;
153 static char *last_filename = 0;
155 /* A vector indexed by pseudo reg number. The allocated length
156 of this vector is regno_pointer_flag_length. Since this
157 vector is needed during the expansion phase when the total
158 number of registers in the function is not yet known,
159 it is copied and made bigger when necessary. */
161 char *regno_pointer_flag;
162 int regno_pointer_flag_length;
164 /* Indexed by pseudo register number, gives the rtx for that pseudo.
165 Allocated in parallel with regno_pointer_flag. */
169 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
170 Each element describes one pending sequence.
171 The main insn-chain is saved in the last element of the chain,
172 unless the chain is empty. */
174 struct sequence_stack *sequence_stack;
176 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
177 shortly thrown away. We use two mechanisms to prevent this waste:
179 First, we keep a list of the expressions used to represent the sequence
180 stack in sequence_element_free_list.
182 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
183 rtvec for use by gen_sequence. One entry for each size is sufficient
184 because most cases are calls to gen_sequence followed by immediately
185 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
186 destructive on the insn in it anyway and hence can't be redone.
188 We do not bother to save this cached data over nested function calls.
189 Instead, we just reinitialize them. */
191 #define SEQUENCE_RESULT_SIZE 5
193 static struct sequence_stack *sequence_element_free_list;
194 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
196 extern int rtx_equal_function_value_matters;
198 /* Filename and line number of last line-number note,
199 whether we actually emitted it or not. */
200 extern char *emit_filename;
201 extern int emit_lineno;
203 rtx change_address ();
206 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
208 ** This routine generates an RTX of the size specified by
209 ** <code>, which is an RTX code. The RTX structure is initialized
210 ** from the arguments <element1> through <elementn>, which are
211 ** interpreted according to the specific RTX type's format. The
212 ** special machine mode associated with the rtx (if any) is specified
215 ** gen_rtx() can be invoked in a way which resembles the lisp-like
216 ** rtx it will generate. For example, the following rtx structure:
218 ** (plus:QI (mem:QI (reg:SI 1))
219 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
221 ** ...would be generated by the following C code:
223 ** gen_rtx (PLUS, QImode,
224 ** gen_rtx (MEM, QImode,
225 ** gen_rtx (REG, SImode, 1)),
226 ** gen_rtx (MEM, QImode,
227 ** gen_rtx (PLUS, SImode,
228 ** gen_rtx (REG, SImode, 2),
229 ** gen_rtx (REG, SImode, 3)))),
239 enum machine_mode mode;
240 register int i; /* Array indices... */
241 register char *fmt; /* Current rtx's format... */
242 register rtx rt_val; /* RTX to return to caller... */
245 code = va_arg (p, enum rtx_code);
246 mode = va_arg (p, enum machine_mode);
248 if (code == CONST_INT)
250 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
252 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
253 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
255 if (const_true_rtx && arg == STORE_FLAG_VALUE)
256 return const_true_rtx;
258 rt_val = rtx_alloc (code);
259 INTVAL (rt_val) = arg;
261 else if (code == REG)
263 int regno = va_arg (p, int);
265 /* In case the MD file explicitly references the frame pointer, have
266 all such references point to the same frame pointer. This is used
267 during frame pointer elimination to distinguish the explicit
268 references to these registers from pseudos that happened to be
271 If we have eliminated the frame pointer or arg pointer, we will
272 be using it as a normal register, for example as a spill register.
273 In such cases, we might be accessing it in a mode that is not
274 Pmode and therefore cannot use the pre-allocated rtx.
276 Also don't do this when we are making new REGs in reload,
277 since we don't want to get confused with the real pointers. */
279 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
280 && ! reload_in_progress)
281 return frame_pointer_rtx;
282 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
283 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
284 && ! reload_in_progress)
285 return arg_pointer_rtx;
287 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
288 && ! reload_in_progress)
289 return stack_pointer_rtx;
292 rt_val = rtx_alloc (code);
294 REGNO (rt_val) = regno;
300 rt_val = rtx_alloc (code); /* Allocate the storage space. */
301 rt_val->mode = mode; /* Store the machine mode... */
303 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
304 for (i = 0; i < GET_RTX_LENGTH (code); i++)
308 case '0': /* Unused field. */
311 case 'i': /* An integer? */
312 XINT (rt_val, i) = va_arg (p, int);
315 case 'w': /* A wide integer? */
316 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
319 case 's': /* A string? */
320 XSTR (rt_val, i) = va_arg (p, char *);
323 case 'e': /* An expression? */
324 case 'u': /* An insn? Same except when printing. */
325 XEXP (rt_val, i) = va_arg (p, rtx);
328 case 'E': /* An RTX vector? */
329 XVEC (rt_val, i) = va_arg (p, rtvec);
338 return rt_val; /* Return the new RTX... */
341 /* gen_rtvec (n, [rt1, ..., rtn])
343 ** This routine creates an rtvec and stores within it the
344 ** pointers to rtx's which are its arguments.
360 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
362 vector = (rtx *) alloca (n * sizeof (rtx));
363 for (i = 0; i < n; i++)
364 vector[i] = va_arg (p, rtx);
367 return gen_rtvec_v (n, vector);
371 gen_rtvec_v (n, argp)
376 register rtvec rt_val;
379 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
381 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
383 for (i = 0; i < n; i++)
384 rt_val->elem[i].rtx = *argp++;
389 /* Generate a REG rtx for a new pseudo register of mode MODE.
390 This pseudo is assigned the next sequential register number. */
394 enum machine_mode mode;
398 /* Don't let anything called by or after reload create new registers
399 (actually, registers can't be created after flow, but this is a good
402 if (reload_in_progress || reload_completed)
405 /* Make sure regno_pointer_flag and regno_reg_rtx are large
406 enough to have an element for this pseudo reg number. */
408 if (reg_rtx_no == regno_pointer_flag_length)
412 (char *) oballoc (regno_pointer_flag_length * 2);
413 bzero (new, regno_pointer_flag_length * 2);
414 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
415 regno_pointer_flag = new;
417 new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx));
418 bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx));
419 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
420 regno_reg_rtx = new1;
422 regno_pointer_flag_length *= 2;
425 val = gen_rtx (REG, mode, reg_rtx_no);
426 regno_reg_rtx[reg_rtx_no++] = val;
430 /* Identify REG as a probable pointer register. */
433 mark_reg_pointer (reg)
436 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
439 /* Return 1 plus largest pseudo reg number used in the current function. */
447 /* Return 1 + the largest label number used so far in the current function. */
452 if (last_label_num && label_num == base_label_num)
453 return last_label_num;
457 /* Return first label number used in this function (if any were used). */
460 get_first_label_num ()
462 return first_label_num;
465 /* Return a value representing some low-order bits of X, where the number
466 of low-order bits is given by MODE. Note that no conversion is done
467 between floating-point and fixed-point values, rather, the bit
468 representation is returned.
470 This function handles the cases in common between gen_lowpart, below,
471 and two variants in cse.c and combine.c. These are the cases that can
472 be safely handled at all points in the compilation.
474 If this is not a case we can handle, return 0. */
477 gen_lowpart_common (mode, x)
478 enum machine_mode mode;
483 if (GET_MODE (x) == mode)
486 /* MODE must occupy no more words than the mode of X. */
487 if (GET_MODE (x) != VOIDmode
488 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
489 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
493 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
494 word = ((GET_MODE_SIZE (GET_MODE (x))
495 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
498 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
499 && GET_MODE_CLASS (mode) == MODE_INT)
501 /* If we are getting the low-order part of something that has been
502 sign- or zero-extended, we can either just use the object being
503 extended or make a narrower extension. If we want an even smaller
504 piece than the size of the object being extended, call ourselves
507 This case is used mostly by combine and cse. */
509 if (GET_MODE (XEXP (x, 0)) == mode)
511 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
512 return gen_lowpart_common (mode, XEXP (x, 0));
513 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
514 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
516 else if (GET_CODE (x) == SUBREG
517 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
518 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
519 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
521 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
522 else if (GET_CODE (x) == REG)
524 /* If the register is not valid for MODE, return 0. If we don't
525 do this, there is no way to fix up the resulting REG later. */
526 if (REGNO (x) < FIRST_PSEUDO_REGISTER
527 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode))
529 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
530 /* integrate.c can't handle parts of a return value register. */
531 && (! REG_FUNCTION_VALUE_P (x)
532 || ! rtx_equal_function_value_matters))
533 return gen_rtx (REG, mode, REGNO (x) + word);
535 return gen_rtx (SUBREG, mode, x, word);
538 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
539 from the low-order part of the constant. */
540 else if (GET_MODE_CLASS (mode) == MODE_INT && GET_MODE (x) == VOIDmode
541 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
543 /* If MODE is twice the host word size, X is already the desired
544 representation. Otherwise, if MODE is wider than a word, we can't
545 do this. If MODE is exactly a word, return just one CONST_INT.
546 If MODE is smaller than a word, clear the bits that don't belong
547 in our mode, unless they and our sign bit are all one. So we get
548 either a reasonable negative value or a reasonable unsigned value
551 if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT)
553 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
555 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
556 return (GET_CODE (x) == CONST_INT ? x
557 : GEN_INT (CONST_DOUBLE_LOW (x)));
560 /* MODE must be narrower than HOST_BITS_PER_INT. */
561 int width = GET_MODE_BITSIZE (mode);
562 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
563 : CONST_DOUBLE_LOW (x));
565 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
566 != ((HOST_WIDE_INT) (-1) << (width - 1))))
567 val &= ((HOST_WIDE_INT) 1 << width) - 1;
569 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
574 /* If X is an integral constant but we want it in floating-point, it
575 must be the case that we have a union of an integer and a floating-point
576 value. If the machine-parameters allow it, simulate that union here
577 and return the result. The two-word and single-word cases are
580 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
581 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
582 || flag_pretend_float)
583 && GET_MODE_CLASS (mode) == MODE_FLOAT
584 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
585 && GET_CODE (x) == CONST_INT
586 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
588 union {HOST_WIDE_INT i; float d; } u;
591 return immed_real_const_1 (u.d, mode);
594 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
595 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
596 || flag_pretend_float)
597 && GET_MODE_CLASS (mode) == MODE_FLOAT
598 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
599 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
600 && GET_MODE (x) == VOIDmode
601 && (sizeof (double) * HOST_BITS_PER_CHAR
602 == 2 * HOST_BITS_PER_WIDE_INT))
604 union {HOST_WIDE_INT i[2]; double d; } u;
605 HOST_WIDE_INT low, high;
607 if (GET_CODE (x) == CONST_INT)
608 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
610 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
612 #ifdef HOST_WORDS_BIG_ENDIAN
613 u.i[0] = high, u.i[1] = low;
615 u.i[0] = low, u.i[1] = high;
618 return immed_real_const_1 (u.d, mode);
621 /* Similarly, if this is converting a floating-point value into a
622 single-word integer. Only do this is the host and target parameters are
625 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
626 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
627 || flag_pretend_float)
628 && GET_MODE_CLASS (mode) == MODE_INT
629 && GET_CODE (x) == CONST_DOUBLE
630 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
631 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
632 return operand_subword (x, 0, 0, GET_MODE (x));
634 /* Similarly, if this is converting a floating-point value into a
635 two-word integer, we can do this one word at a time and make an
636 integer. Only do this is the host and target parameters are
639 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
640 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
641 || flag_pretend_float)
642 && GET_MODE_CLASS (mode) == MODE_INT
643 && GET_CODE (x) == CONST_DOUBLE
644 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
645 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
647 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
648 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
650 if (lowpart && GET_CODE (lowpart) == CONST_INT
651 && highpart && GET_CODE (highpart) == CONST_INT)
652 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
655 /* Otherwise, we can't do this. */
659 /* Return the real part (which has mode MODE) of a complex value X.
660 This always comes at the low address in memory. */
663 gen_realpart (mode, x)
664 enum machine_mode mode;
667 if (WORDS_BIG_ENDIAN)
668 return gen_highpart (mode, x);
670 return gen_lowpart (mode, x);
673 /* Return the imaginary part (which has mode MODE) of a complex value X.
674 This always comes at the high address in memory. */
677 gen_imagpart (mode, x)
678 enum machine_mode mode;
681 if (WORDS_BIG_ENDIAN)
682 return gen_lowpart (mode, x);
684 return gen_highpart (mode, x);
687 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
688 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
689 least-significant part of X.
690 MODE specifies how big a part of X to return;
691 it usually should not be larger than a word.
692 If X is a MEM whose address is a QUEUED, the value may be so also. */
695 gen_lowpart (mode, x)
696 enum machine_mode mode;
699 rtx result = gen_lowpart_common (mode, x);
703 else if (GET_CODE (x) == MEM)
705 /* The only additional case we can do is MEM. */
706 register int offset = 0;
707 if (WORDS_BIG_ENDIAN)
708 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
709 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
711 if (BYTES_BIG_ENDIAN)
712 /* Adjust the address so that the address-after-the-data
714 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
715 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
717 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
723 /* Like `gen_lowpart', but refer to the most significant part.
724 This is used to access the imaginary part of a complex number. */
727 gen_highpart (mode, x)
728 enum machine_mode mode;
731 /* This case loses if X is a subreg. To catch bugs early,
732 complain if an invalid MODE is used even in other cases. */
733 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
734 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
736 if (GET_CODE (x) == CONST_DOUBLE
737 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined(REAL_IS_NOT_DOUBLE))
738 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
741 return gen_rtx (CONST_INT, VOIDmode,
742 CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
743 else if (GET_CODE (x) == CONST_INT)
745 else if (GET_CODE (x) == MEM)
747 register int offset = 0;
748 #if !WORDS_BIG_ENDIAN
749 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
750 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
752 #if !BYTES_BIG_ENDIAN
753 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
754 offset -= (GET_MODE_SIZE (mode)
755 - MIN (UNITS_PER_WORD,
756 GET_MODE_SIZE (GET_MODE (x))));
758 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
760 else if (GET_CODE (x) == SUBREG)
762 /* The only time this should occur is when we are looking at a
763 multi-word item with a SUBREG whose mode is the same as that of the
764 item. It isn't clear what we would do if it wasn't. */
765 if (SUBREG_WORD (x) != 0)
767 return gen_highpart (mode, SUBREG_REG (x));
769 else if (GET_CODE (x) == REG)
773 #if !WORDS_BIG_ENDIAN
774 if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
775 word = ((GET_MODE_SIZE (GET_MODE (x))
776 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
779 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
780 return gen_rtx (REG, mode, REGNO (x) + word);
782 return gen_rtx (SUBREG, mode, x, word);
788 /* Return 1 iff X, assumed to be a SUBREG,
789 refers to the least significant part of its containing reg.
790 If X is not a SUBREG, always return 1 (it is its own low part!). */
796 if (GET_CODE (x) != SUBREG)
800 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
801 return (SUBREG_WORD (x)
802 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
803 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
806 return SUBREG_WORD (x) == 0;
809 /* Return subword I of operand OP.
810 The word number, I, is interpreted as the word number starting at the
811 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
812 otherwise it is the high-order word.
814 If we cannot extract the required word, we return zero. Otherwise, an
815 rtx corresponding to the requested word will be returned.
817 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
818 reload has completed, a valid address will always be returned. After
819 reload, if a valid address cannot be returned, we return zero.
821 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
822 it is the responsibility of the caller.
824 MODE is the mode of OP in case it is a CONST_INT. */
827 operand_subword (op, i, validate_address, mode)
830 int validate_address;
831 enum machine_mode mode;
834 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
836 if (mode == VOIDmode)
837 mode = GET_MODE (op);
839 if (mode == VOIDmode)
842 /* If OP is narrower than a word or if we want a word outside OP, fail. */
844 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
845 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
848 /* If OP is already an integer word, return it. */
849 if (GET_MODE_CLASS (mode) == MODE_INT
850 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
853 /* If OP is a REG or SUBREG, we can handle it very simply. */
854 if (GET_CODE (op) == REG)
856 /* If the register is not valid for MODE, return 0. If we don't
857 do this, there is no way to fix up the resulting REG later. */
858 if (REGNO (op) < FIRST_PSEUDO_REGISTER
859 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
861 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
862 || (REG_FUNCTION_VALUE_P (op)
863 && rtx_equal_function_value_matters))
864 return gen_rtx (SUBREG, word_mode, op, i);
866 return gen_rtx (REG, word_mode, REGNO (op) + i);
868 else if (GET_CODE (op) == SUBREG)
869 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
871 /* Form a new MEM at the requested address. */
872 if (GET_CODE (op) == MEM)
874 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
877 if (validate_address)
879 if (reload_completed)
881 if (! strict_memory_address_p (word_mode, addr))
885 addr = memory_address (word_mode, addr);
888 new = gen_rtx (MEM, word_mode, addr);
890 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
891 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
892 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
897 /* The only remaining cases are when OP is a constant. If the host and
898 target floating formats are the same, handling two-word floating
899 constants are easy. */
900 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
901 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
902 || flag_pretend_float)
903 && GET_MODE_CLASS (mode) == MODE_FLOAT
904 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
905 && GET_CODE (op) == CONST_DOUBLE)
907 /* The constant is stored in the host's word-ordering,
908 but we want to access it in the target's word-ordering. Some
909 compilers don't like a conditional inside macro args, so we have two
910 copies of the return. */
911 #ifdef HOST_WORDS_BIG_ENDIAN
912 return GEN_INT (i == WORDS_BIG_ENDIAN
913 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
915 return GEN_INT (i != WORDS_BIG_ENDIAN
916 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
920 /* Single word float is a little harder, since single- and double-word
921 values often do not have the same high-order bits. We have already
922 verified that we want the only defined word of the single-word value. */
923 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
924 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
925 || flag_pretend_float)
926 && GET_MODE_CLASS (mode) == MODE_FLOAT
927 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
928 && GET_CODE (op) == CONST_DOUBLE)
931 union {float f; HOST_WIDE_INT i; } u;
933 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
936 return GEN_INT (u.i);
939 /* The only remaining cases that we can handle are integers.
940 Convert to proper endianness now since these cases need it.
941 At this point, i == 0 means the low-order word.
943 Note that it must be that BITS_PER_WORD <= HOST_BITS_PER_INT.
944 This is because if it were greater, it could only have been two
945 times greater since we do not support making wider constants. In
946 that case, it MODE would have already been the proper size and
947 it would have been handled above. This means we do not have to
948 worry about the case where we would be returning a CONST_DOUBLE. */
950 if (GET_MODE_CLASS (mode) != MODE_INT
951 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE))
954 if (WORDS_BIG_ENDIAN)
955 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
957 /* Find out which word on the host machine this value is in and get
958 it from the constant. */
959 val = (i / size_ratio == 0
960 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
961 : (GET_CODE (op) == CONST_INT
962 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
964 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
965 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
966 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
967 & (((HOST_WIDE_INT) 1
968 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
970 return GEN_INT (val);
973 /* Similar to `operand_subword', but never return 0. If we can't extract
974 the required subword, put OP into a register and try again. If that fails,
975 abort. We always validate the address in this case. It is not valid
976 to call this function after reload; it is mostly meant for RTL
979 MODE is the mode of OP, in case it is CONST_INT. */
982 operand_subword_force (op, i, mode)
985 enum machine_mode mode;
987 rtx result = operand_subword (op, i, 1, mode);
992 if (mode != BLKmode && mode != VOIDmode)
993 op = force_reg (mode, op);
995 result = operand_subword (op, i, 1, mode);
1002 /* Given a compare instruction, swap the operands.
1003 A test instruction is changed into a compare of 0 against the operand. */
1006 reverse_comparison (insn)
1009 rtx body = PATTERN (insn);
1012 if (GET_CODE (body) == SET)
1013 comp = SET_SRC (body);
1015 comp = SET_SRC (XVECEXP (body, 0, 0));
1017 if (GET_CODE (comp) == COMPARE)
1019 rtx op0 = XEXP (comp, 0);
1020 rtx op1 = XEXP (comp, 1);
1021 XEXP (comp, 0) = op1;
1022 XEXP (comp, 1) = op0;
1026 rtx new = gen_rtx (COMPARE, VOIDmode,
1027 CONST0_RTX (GET_MODE (comp)), comp);
1028 if (GET_CODE (body) == SET)
1029 SET_SRC (body) = new;
1031 SET_SRC (XVECEXP (body, 0, 0)) = new;
1035 /* Return a memory reference like MEMREF, but with its mode changed
1036 to MODE and its address changed to ADDR.
1037 (VOIDmode means don't change the mode.
1038 NULL for ADDR means don't change the address.) */
1041 change_address (memref, mode, addr)
1043 enum machine_mode mode;
1048 if (GET_CODE (memref) != MEM)
1050 if (mode == VOIDmode)
1051 mode = GET_MODE (memref);
1053 addr = XEXP (memref, 0);
1055 /* If reload is in progress or has completed, ADDR must be valid.
1056 Otherwise, we can call memory_address to make it valid. */
1057 if (reload_completed || reload_in_progress)
1059 if (! memory_address_p (mode, addr))
1063 addr = memory_address (mode, addr);
1065 new = gen_rtx (MEM, mode, addr);
1066 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1067 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1068 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1072 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1077 register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0,
1078 label_num++, NULL_PTR);
1079 LABEL_NUSES (label) = 0;
1083 /* For procedure integration. */
1085 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1086 from a permanent obstack when the opportunity arises. */
1089 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1090 last_labelno, max_parm_regnum, max_regnum, args_size,
1091 pops_args, stack_slots, function_flags,
1092 outgoing_args_size, original_arg_vector,
1093 original_decl_initial)
1094 rtx first_insn, first_parm_insn;
1095 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1099 int outgoing_args_size;
1100 rtvec original_arg_vector;
1101 rtx original_decl_initial;
1103 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
1104 cur_insn_uid++, NULL_RTX,
1105 first_insn, first_parm_insn,
1106 first_labelno, last_labelno,
1107 max_parm_regnum, max_regnum, args_size, pops_args,
1108 stack_slots, function_flags, outgoing_args_size,
1109 original_arg_vector, original_decl_initial);
1113 /* Install new pointers to the first and last insns in the chain.
1114 Used for an inline-procedure after copying the insn chain. */
1117 set_new_first_and_last_insn (first, last)
1124 /* Set the range of label numbers found in the current function.
1125 This is used when belatedly compiling an inline function. */
1128 set_new_first_and_last_label_num (first, last)
1131 base_label_num = label_num;
1132 first_label_num = first;
1133 last_label_num = last;
1136 /* Save all variables describing the current status into the structure *P.
1137 This is used before starting a nested function. */
1140 save_emit_status (p)
1143 p->reg_rtx_no = reg_rtx_no;
1144 p->first_label_num = first_label_num;
1145 p->first_insn = first_insn;
1146 p->last_insn = last_insn;
1147 p->sequence_stack = sequence_stack;
1148 p->cur_insn_uid = cur_insn_uid;
1149 p->last_linenum = last_linenum;
1150 p->last_filename = last_filename;
1151 p->regno_pointer_flag = regno_pointer_flag;
1152 p->regno_pointer_flag_length = regno_pointer_flag_length;
1153 p->regno_reg_rtx = regno_reg_rtx;
1156 /* Restore all variables describing the current status from the structure *P.
1157 This is used after a nested function. */
1160 restore_emit_status (p)
1165 reg_rtx_no = p->reg_rtx_no;
1166 first_label_num = p->first_label_num;
1167 first_insn = p->first_insn;
1168 last_insn = p->last_insn;
1169 sequence_stack = p->sequence_stack;
1170 cur_insn_uid = p->cur_insn_uid;
1171 last_linenum = p->last_linenum;
1172 last_filename = p->last_filename;
1173 regno_pointer_flag = p->regno_pointer_flag;
1174 regno_pointer_flag_length = p->regno_pointer_flag_length;
1175 regno_reg_rtx = p->regno_reg_rtx;
1177 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1178 sequence_element_free_list = 0;
1179 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1180 sequence_result[i] = 0;
1183 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1184 It does not work to do this twice, because the mark bits set here
1185 are not cleared afterwards. */
1188 unshare_all_rtl (insn)
1191 for (; insn; insn = NEXT_INSN (insn))
1192 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1193 || GET_CODE (insn) == CALL_INSN)
1195 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1196 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1197 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1200 /* Make sure the addresses of stack slots found outside the insn chain
1201 (such as, in DECL_RTL of a variable) are not shared
1202 with the insn chain.
1204 This special care is necessary when the stack slot MEM does not
1205 actually appear in the insn chain. If it does appear, its address
1206 is unshared from all else at that point. */
1208 copy_rtx_if_shared (stack_slot_list);
1211 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1212 Recursively does the same for subexpressions. */
1215 copy_rtx_if_shared (orig)
1218 register rtx x = orig;
1220 register enum rtx_code code;
1221 register char *format_ptr;
1227 code = GET_CODE (x);
1229 /* These types may be freely shared. */
1242 /* SCRATCH must be shared because they represent distinct values. */
1251 /* The chain of insns is not being copied. */
1255 /* A MEM is allowed to be shared if its address is constant
1256 or is a constant plus one of the special registers. */
1257 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1258 || XEXP (x, 0) == virtual_stack_vars_rtx
1259 || XEXP (x, 0) == virtual_incoming_args_rtx)
1262 if (GET_CODE (XEXP (x, 0)) == PLUS
1263 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1264 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1265 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1267 /* This MEM can appear in more than one place,
1268 but its address better not be shared with anything else. */
1270 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1276 /* This rtx may not be shared. If it has already been seen,
1277 replace it with a copy of itself. */
1283 copy = rtx_alloc (code);
1284 bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld)
1285 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1291 /* Now scan the subexpressions recursively.
1292 We can store any replaced subexpressions directly into X
1293 since we know X is not shared! Any vectors in X
1294 must be copied if X was copied. */
1296 format_ptr = GET_RTX_FORMAT (code);
1298 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1300 switch (*format_ptr++)
1303 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1307 if (XVEC (x, i) != NULL)
1312 XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0));
1313 for (j = 0; j < XVECLEN (x, i); j++)
1315 = copy_rtx_if_shared (XVECEXP (x, i, j));
1323 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1324 to look for shared sub-parts. */
1327 reset_used_flags (x)
1331 register enum rtx_code code;
1332 register char *format_ptr;
1338 code = GET_CODE (x);
1340 /* These types may be freely shared so we needn't do any reseting
1361 /* The chain of insns is not being copied. */
1367 format_ptr = GET_RTX_FORMAT (code);
1368 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1370 switch (*format_ptr++)
1373 reset_used_flags (XEXP (x, i));
1377 for (j = 0; j < XVECLEN (x, i); j++)
1378 reset_used_flags (XVECEXP (x, i, j));
1384 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1385 Return X or the rtx for the pseudo reg the value of X was copied into.
1386 OTHER must be valid as a SET_DEST. */
1389 make_safe_from (x, other)
1393 switch (GET_CODE (other))
1396 other = SUBREG_REG (other);
1398 case STRICT_LOW_PART:
1401 other = XEXP (other, 0);
1407 if ((GET_CODE (other) == MEM
1409 && GET_CODE (x) != REG
1410 && GET_CODE (x) != SUBREG)
1411 || (GET_CODE (other) == REG
1412 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1413 || reg_mentioned_p (other, x))))
1415 rtx temp = gen_reg_rtx (GET_MODE (x));
1416 emit_move_insn (temp, x);
1422 /* Emission of insns (adding them to the doubly-linked list). */
1424 /* Return the first insn of the current sequence or current function. */
1432 /* Return the last insn emitted in current sequence or current function. */
1440 /* Specify a new insn as the last in the chain. */
1443 set_last_insn (insn)
1446 if (NEXT_INSN (insn) != 0)
1451 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1454 get_last_insn_anywhere ()
1456 struct sequence_stack *stack;
1459 for (stack = sequence_stack; stack; stack = stack->next)
1460 if (stack->last != 0)
1465 /* Return a number larger than any instruction's uid in this function. */
1470 return cur_insn_uid;
1473 /* Return the next insn. If it is a SEQUENCE, return the first insn
1482 insn = NEXT_INSN (insn);
1483 if (insn && GET_CODE (insn) == INSN
1484 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1485 insn = XVECEXP (PATTERN (insn), 0, 0);
1491 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1495 previous_insn (insn)
1500 insn = PREV_INSN (insn);
1501 if (insn && GET_CODE (insn) == INSN
1502 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1503 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1509 /* Return the next insn after INSN that is not a NOTE. This routine does not
1510 look inside SEQUENCEs. */
1513 next_nonnote_insn (insn)
1518 insn = NEXT_INSN (insn);
1519 if (insn == 0 || GET_CODE (insn) != NOTE)
1526 /* Return the previous insn before INSN that is not a NOTE. This routine does
1527 not look inside SEQUENCEs. */
1530 prev_nonnote_insn (insn)
1535 insn = PREV_INSN (insn);
1536 if (insn == 0 || GET_CODE (insn) != NOTE)
1543 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1544 or 0, if there is none. This routine does not look inside
1548 next_real_insn (insn)
1553 insn = NEXT_INSN (insn);
1554 if (insn == 0 || GET_CODE (insn) == INSN
1555 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1562 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1563 or 0, if there is none. This routine does not look inside
1567 prev_real_insn (insn)
1572 insn = PREV_INSN (insn);
1573 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1574 || GET_CODE (insn) == JUMP_INSN)
1581 /* Find the next insn after INSN that really does something. This routine
1582 does not look inside SEQUENCEs. Until reload has completed, this is the
1583 same as next_real_insn. */
1586 next_active_insn (insn)
1591 insn = NEXT_INSN (insn);
1593 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1594 || (GET_CODE (insn) == INSN
1595 && (! reload_completed
1596 || (GET_CODE (PATTERN (insn)) != USE
1597 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1604 /* Find the last insn before INSN that really does something. This routine
1605 does not look inside SEQUENCEs. Until reload has completed, this is the
1606 same as prev_real_insn. */
1609 prev_active_insn (insn)
1614 insn = PREV_INSN (insn);
1616 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1617 || (GET_CODE (insn) == INSN
1618 && (! reload_completed
1619 || (GET_CODE (PATTERN (insn)) != USE
1620 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1627 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1635 insn = NEXT_INSN (insn);
1636 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1643 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1651 insn = PREV_INSN (insn);
1652 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1660 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1661 and REG_CC_USER notes so we can find it. */
1664 link_cc0_insns (insn)
1667 rtx user = next_nonnote_insn (insn);
1669 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
1670 user = XVECEXP (PATTERN (user), 0, 0);
1672 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
1674 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
1677 /* Return the next insn that uses CC0 after INSN, which is assumed to
1678 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1679 applied to the result of this function should yield INSN).
1681 Normally, this is simply the next insn. However, if a REG_CC_USER note
1682 is present, it contains the insn that uses CC0.
1684 Return 0 if we can't find the insn. */
1687 next_cc0_user (insn)
1690 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
1693 return XEXP (note, 0);
1695 insn = next_nonnote_insn (insn);
1696 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1697 insn = XVECEXP (PATTERN (insn), 0, 0);
1699 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1700 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
1706 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1707 note, it is the previous insn. */
1710 prev_cc0_setter (insn)
1713 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1717 return XEXP (note, 0);
1719 insn = prev_nonnote_insn (insn);
1720 if (! sets_cc0_p (PATTERN (insn)))
1727 /* Try splitting insns that can be split for better scheduling.
1728 PAT is the pattern which might split.
1729 TRIAL is the insn providing PAT.
1730 BACKWARDS is non-zero if we are scanning insns from last to first.
1732 If this routine succeeds in splitting, it returns the first or last
1733 replacement insn depending on the value of BACKWARDS. Otherwise, it
1734 returns TRIAL. If the insn to be returned can be split, it will be. */
1737 try_split (pat, trial, backwards)
1741 rtx before = PREV_INSN (trial);
1742 rtx after = NEXT_INSN (trial);
1743 rtx seq = split_insns (pat, trial);
1744 int has_barrier = 0;
1747 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
1748 We may need to handle this specially. */
1749 if (after && GET_CODE (after) == BARRIER)
1752 after = NEXT_INSN (after);
1757 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
1758 The latter case will normally arise only when being done so that
1759 it, in turn, will be split (SFmode on the 29k is an example). */
1760 if (GET_CODE (seq) == SEQUENCE)
1762 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
1763 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
1764 increment the usage count so we don't delete the label. */
1767 if (GET_CODE (trial) == JUMP_INSN)
1768 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
1769 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
1771 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
1773 if (JUMP_LABEL (trial))
1774 LABEL_NUSES (JUMP_LABEL (trial))++;
1777 tem = emit_insn_after (seq, before);
1779 delete_insn (trial);
1781 emit_barrier_after (tem);
1783 /* Avoid infinite loop if the result matches the original pattern. */
1784 else if (rtx_equal_p (seq, pat))
1788 PATTERN (trial) = seq;
1789 INSN_CODE (trial) = -1;
1792 /* Set TEM to the insn we should return. */
1793 tem = backwards ? prev_active_insn (after) : next_active_insn (before);
1794 return try_split (PATTERN (tem), tem, backwards);
1800 /* Make and return an INSN rtx, initializing all its slots.
1801 Store PATTERN in the pattern slots. */
1804 make_insn_raw (pattern)
1809 insn = rtx_alloc(INSN);
1810 INSN_UID(insn) = cur_insn_uid++;
1812 PATTERN (insn) = pattern;
1813 INSN_CODE (insn) = -1;
1814 LOG_LINKS(insn) = NULL;
1815 REG_NOTES(insn) = NULL;
1820 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
1823 make_jump_insn_raw (pattern)
1828 insn = rtx_alloc (JUMP_INSN);
1829 INSN_UID(insn) = cur_insn_uid++;
1831 PATTERN (insn) = pattern;
1832 INSN_CODE (insn) = -1;
1833 LOG_LINKS(insn) = NULL;
1834 REG_NOTES(insn) = NULL;
1835 JUMP_LABEL(insn) = NULL;
1840 /* Add INSN to the end of the doubly-linked list.
1841 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
1847 PREV_INSN (insn) = last_insn;
1848 NEXT_INSN (insn) = 0;
1850 if (NULL != last_insn)
1851 NEXT_INSN (last_insn) = insn;
1853 if (NULL == first_insn)
1859 /* Add INSN into the doubly-linked list after insn AFTER. This should be the
1860 only function called to insert an insn once delay slots have been filled
1861 since only it knows how to update a SEQUENCE. */
1864 add_insn_after (insn, after)
1867 rtx next = NEXT_INSN (after);
1869 NEXT_INSN (insn) = next;
1870 PREV_INSN (insn) = after;
1874 PREV_INSN (next) = insn;
1875 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
1876 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
1878 else if (last_insn == after)
1882 struct sequence_stack *stack = sequence_stack;
1883 /* Scan all pending sequences too. */
1884 for (; stack; stack = stack->next)
1885 if (after == stack->last)
1889 NEXT_INSN (after) = insn;
1890 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
1892 rtx sequence = PATTERN (after);
1893 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
1897 /* Delete all insns made since FROM.
1898 FROM becomes the new last instruction. */
1901 delete_insns_since (from)
1907 NEXT_INSN (from) = 0;
1911 /* Move a consecutive bunch of insns to a different place in the chain.
1912 The insns to be moved are those between FROM and TO.
1913 They are moved to a new position after the insn AFTER.
1914 AFTER must not be FROM or TO or any insn in between.
1916 This function does not know about SEQUENCEs and hence should not be
1917 called after delay-slot filling has been done. */
1920 reorder_insns (from, to, after)
1921 rtx from, to, after;
1923 /* Splice this bunch out of where it is now. */
1924 if (PREV_INSN (from))
1925 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
1927 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
1928 if (last_insn == to)
1929 last_insn = PREV_INSN (from);
1930 if (first_insn == from)
1931 first_insn = NEXT_INSN (to);
1933 /* Make the new neighbors point to it and it to them. */
1934 if (NEXT_INSN (after))
1935 PREV_INSN (NEXT_INSN (after)) = to;
1937 NEXT_INSN (to) = NEXT_INSN (after);
1938 PREV_INSN (from) = after;
1939 NEXT_INSN (after) = from;
1940 if (after == last_insn)
1944 /* Return the line note insn preceding INSN. */
1947 find_line_note (insn)
1950 if (no_line_numbers)
1953 for (; insn; insn = PREV_INSN (insn))
1954 if (GET_CODE (insn) == NOTE
1955 && NOTE_LINE_NUMBER (insn) >= 0)
1961 /* Like reorder_insns, but inserts line notes to preserve the line numbers
1962 of the moved insns when debugging. This may insert a note between AFTER
1963 and FROM, and another one after TO. */
1966 reorder_insns_with_line_notes (from, to, after)
1967 rtx from, to, after;
1969 rtx from_line = find_line_note (from);
1970 rtx after_line = find_line_note (after);
1972 reorder_insns (from, to, after);
1974 if (from_line == after_line)
1978 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
1979 NOTE_LINE_NUMBER (from_line),
1982 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
1983 NOTE_LINE_NUMBER (after_line),
1987 /* Emit an insn of given code and pattern
1988 at a specified place within the doubly-linked list. */
1990 /* Make an instruction with body PATTERN
1991 and output it before the instruction BEFORE. */
1994 emit_insn_before (pattern, before)
1995 register rtx pattern, before;
1997 register rtx insn = before;
1999 if (GET_CODE (pattern) == SEQUENCE)
2003 for (i = 0; i < XVECLEN (pattern, 0); i++)
2005 insn = XVECEXP (pattern, 0, i);
2006 add_insn_after (insn, PREV_INSN (before));
2008 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2009 sequence_result[XVECLEN (pattern, 0)] = pattern;
2013 insn = make_insn_raw (pattern);
2014 add_insn_after (insn, PREV_INSN (before));
2020 /* Make an instruction with body PATTERN and code JUMP_INSN
2021 and output it before the instruction BEFORE. */
2024 emit_jump_insn_before (pattern, before)
2025 register rtx pattern, before;
2029 if (GET_CODE (pattern) == SEQUENCE)
2030 insn = emit_insn_before (pattern, before);
2033 insn = make_jump_insn_raw (pattern, NULL_RTVEC);
2034 add_insn_after (insn, PREV_INSN (before));
2040 /* Make an instruction with body PATTERN and code CALL_INSN
2041 and output it before the instruction BEFORE. */
2044 emit_call_insn_before (pattern, before)
2045 register rtx pattern, before;
2047 rtx insn = emit_insn_before (pattern, before);
2048 PUT_CODE (insn, CALL_INSN);
2052 /* Make an insn of code BARRIER
2053 and output it before the insn AFTER. */
2056 emit_barrier_before (before)
2057 register rtx before;
2059 register rtx insn = rtx_alloc (BARRIER);
2061 INSN_UID (insn) = cur_insn_uid++;
2063 add_insn_after (insn, PREV_INSN (before));
2067 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2070 emit_note_before (subtype, before)
2074 register rtx note = rtx_alloc (NOTE);
2075 INSN_UID (note) = cur_insn_uid++;
2076 NOTE_SOURCE_FILE (note) = 0;
2077 NOTE_LINE_NUMBER (note) = subtype;
2079 add_insn_after (note, PREV_INSN (before));
2083 /* Make an insn of code INSN with body PATTERN
2084 and output it after the insn AFTER. */
2087 emit_insn_after (pattern, after)
2088 register rtx pattern, after;
2090 register rtx insn = after;
2092 if (GET_CODE (pattern) == SEQUENCE)
2096 for (i = 0; i < XVECLEN (pattern, 0); i++)
2098 insn = XVECEXP (pattern, 0, i);
2099 add_insn_after (insn, after);
2102 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2103 sequence_result[XVECLEN (pattern, 0)] = pattern;
2107 insn = make_insn_raw (pattern);
2108 add_insn_after (insn, after);
2114 /* Similar to emit_insn_after, except that line notes are to be inserted so
2115 as to act as if this insn were at FROM. */
2118 emit_insn_after_with_line_notes (pattern, after, from)
2119 rtx pattern, after, from;
2121 rtx from_line = find_line_note (from);
2122 rtx after_line = find_line_note (after);
2123 rtx insn = emit_insn_after (pattern, after);
2126 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2127 NOTE_LINE_NUMBER (from_line),
2131 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2132 NOTE_LINE_NUMBER (after_line),
2136 /* Make an insn of code JUMP_INSN with body PATTERN
2137 and output it after the insn AFTER. */
2140 emit_jump_insn_after (pattern, after)
2141 register rtx pattern, after;
2145 if (GET_CODE (pattern) == SEQUENCE)
2146 insn = emit_insn_after (pattern, after);
2149 insn = make_jump_insn_raw (pattern, NULL_RTVEC);
2150 add_insn_after (insn, after);
2156 /* Make an insn of code BARRIER
2157 and output it after the insn AFTER. */
2160 emit_barrier_after (after)
2163 register rtx insn = rtx_alloc (BARRIER);
2165 INSN_UID (insn) = cur_insn_uid++;
2167 add_insn_after (insn, after);
2171 /* Emit the label LABEL after the insn AFTER. */
2174 emit_label_after (label, after)
2177 /* This can be called twice for the same label
2178 as a result of the confusion that follows a syntax error!
2179 So make it harmless. */
2180 if (INSN_UID (label) == 0)
2182 INSN_UID (label) = cur_insn_uid++;
2183 add_insn_after (label, after);
2189 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2192 emit_note_after (subtype, after)
2196 register rtx note = rtx_alloc (NOTE);
2197 INSN_UID (note) = cur_insn_uid++;
2198 NOTE_SOURCE_FILE (note) = 0;
2199 NOTE_LINE_NUMBER (note) = subtype;
2200 add_insn_after (note, after);
2204 /* Emit a line note for FILE and LINE after the insn AFTER. */
2207 emit_line_note_after (file, line, after)
2214 if (no_line_numbers && line > 0)
2220 note = rtx_alloc (NOTE);
2221 INSN_UID (note) = cur_insn_uid++;
2222 NOTE_SOURCE_FILE (note) = file;
2223 NOTE_LINE_NUMBER (note) = line;
2224 add_insn_after (note, after);
2228 /* Make an insn of code INSN with pattern PATTERN
2229 and add it to the end of the doubly-linked list.
2230 If PATTERN is a SEQUENCE, take the elements of it
2231 and emit an insn for each element.
2233 Returns the last insn emitted. */
2239 rtx insn = last_insn;
2241 if (GET_CODE (pattern) == SEQUENCE)
2245 for (i = 0; i < XVECLEN (pattern, 0); i++)
2247 insn = XVECEXP (pattern, 0, i);
2250 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2251 sequence_result[XVECLEN (pattern, 0)] = pattern;
2255 insn = make_insn_raw (pattern);
2262 /* Emit the insns in a chain starting with INSN.
2263 Return the last insn emitted. */
2273 rtx next = NEXT_INSN (insn);
2282 /* Emit the insns in a chain starting with INSN and place them in front of
2283 the insn BEFORE. Return the last insn emitted. */
2286 emit_insns_before (insn, before)
2294 rtx next = NEXT_INSN (insn);
2295 add_insn_after (insn, PREV_INSN (before));
2303 /* Emit the insns in a chain starting with FIRST and place them in back of
2304 the insn AFTER. Return the last insn emitted. */
2307 emit_insns_after (first, after)
2312 register rtx after_after;
2320 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2323 after_after = NEXT_INSN (after);
2325 NEXT_INSN (after) = first;
2326 PREV_INSN (first) = after;
2327 NEXT_INSN (last) = after_after;
2329 PREV_INSN (after_after) = last;
2331 if (after == last_insn)
2336 /* Make an insn of code JUMP_INSN with pattern PATTERN
2337 and add it to the end of the doubly-linked list. */
2340 emit_jump_insn (pattern)
2343 if (GET_CODE (pattern) == SEQUENCE)
2344 return emit_insn (pattern);
2347 register rtx insn = make_jump_insn_raw (pattern, NULL_RTVEC);
2353 /* Make an insn of code CALL_INSN with pattern PATTERN
2354 and add it to the end of the doubly-linked list. */
2357 emit_call_insn (pattern)
2360 if (GET_CODE (pattern) == SEQUENCE)
2361 return emit_insn (pattern);
2364 register rtx insn = make_insn_raw (pattern);
2366 PUT_CODE (insn, CALL_INSN);
2371 /* Add the label LABEL to the end of the doubly-linked list. */
2377 /* This can be called twice for the same label
2378 as a result of the confusion that follows a syntax error!
2379 So make it harmless. */
2380 if (INSN_UID (label) == 0)
2382 INSN_UID (label) = cur_insn_uid++;
2388 /* Make an insn of code BARRIER
2389 and add it to the end of the doubly-linked list. */
2394 register rtx barrier = rtx_alloc (BARRIER);
2395 INSN_UID (barrier) = cur_insn_uid++;
2400 /* Make an insn of code NOTE
2401 with data-fields specified by FILE and LINE
2402 and add it to the end of the doubly-linked list,
2403 but only if line-numbers are desired for debugging info. */
2406 emit_line_note (file, line)
2410 emit_filename = file;
2414 if (no_line_numbers)
2418 return emit_note (file, line);
2421 /* Make an insn of code NOTE
2422 with data-fields specified by FILE and LINE
2423 and add it to the end of the doubly-linked list.
2424 If it is a line-number NOTE, omit it if it matches the previous one. */
2427 emit_note (file, line)
2435 if (file && last_filename && !strcmp (file, last_filename)
2436 && line == last_linenum)
2438 last_filename = file;
2439 last_linenum = line;
2442 if (no_line_numbers && line > 0)
2448 note = rtx_alloc (NOTE);
2449 INSN_UID (note) = cur_insn_uid++;
2450 NOTE_SOURCE_FILE (note) = file;
2451 NOTE_LINE_NUMBER (note) = line;
2456 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2459 emit_line_note_force (file, line)
2464 return emit_line_note (file, line);
2467 /* Cause next statement to emit a line note even if the line number
2468 has not changed. This is used at the beginning of a function. */
2471 force_next_line_note ()
2476 /* Return an indication of which type of insn should have X as a body.
2477 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2483 if (GET_CODE (x) == CODE_LABEL)
2485 if (GET_CODE (x) == CALL)
2487 if (GET_CODE (x) == RETURN)
2489 if (GET_CODE (x) == SET)
2491 if (SET_DEST (x) == pc_rtx)
2493 else if (GET_CODE (SET_SRC (x)) == CALL)
2498 if (GET_CODE (x) == PARALLEL)
2501 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2502 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2504 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2505 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2507 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2508 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2514 /* Emit the rtl pattern X as an appropriate kind of insn.
2515 If X is a label, it is simply added into the insn chain. */
2521 enum rtx_code code = classify_insn (x);
2523 if (code == CODE_LABEL)
2524 return emit_label (x);
2525 else if (code == INSN)
2526 return emit_insn (x);
2527 else if (code == JUMP_INSN)
2529 register rtx insn = emit_jump_insn (x);
2530 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2531 return emit_barrier ();
2534 else if (code == CALL_INSN)
2535 return emit_call_insn (x);
2540 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2545 struct sequence_stack *tem;
2547 if (sequence_element_free_list)
2549 /* Reuse a previously-saved struct sequence_stack. */
2550 tem = sequence_element_free_list;
2551 sequence_element_free_list = tem->next;
2554 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
2556 tem->next = sequence_stack;
2557 tem->first = first_insn;
2558 tem->last = last_insn;
2560 sequence_stack = tem;
2566 /* Set up the insn chain starting with FIRST
2567 as the current sequence, saving the previously current one. */
2570 push_to_sequence (first)
2577 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
2583 /* After emitting to a sequence, restore previous saved state.
2585 To get the contents of the sequence just made,
2586 you must call `gen_sequence' *before* calling here. */
2591 struct sequence_stack *tem = sequence_stack;
2593 first_insn = tem->first;
2594 last_insn = tem->last;
2595 sequence_stack = tem->next;
2597 tem->next = sequence_element_free_list;
2598 sequence_element_free_list = tem;
2601 /* Return 1 if currently emitting into a sequence. */
2606 return sequence_stack != 0;
2609 /* Generate a SEQUENCE rtx containing the insns already emitted
2610 to the current sequence.
2612 This is how the gen_... function from a DEFINE_EXPAND
2613 constructs the SEQUENCE that it returns. */
2624 /* Count the insns in the chain. */
2626 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
2629 /* If only one insn, return its pattern rather than a SEQUENCE.
2630 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
2631 the case of an empty list.) */
2633 && (GET_CODE (first_insn) == INSN
2634 || GET_CODE (first_insn) == JUMP_INSN
2635 || GET_CODE (first_insn) == CALL_INSN))
2636 return PATTERN (first_insn);
2638 /* Put them in a vector. See if we already have a SEQUENCE of the
2639 appropriate length around. */
2640 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
2641 sequence_result[len] = 0;
2644 /* Ensure that this rtl goes in saveable_obstack, since we may be
2646 int in_current_obstack = rtl_in_saveable_obstack ();
2647 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
2648 if (in_current_obstack)
2649 rtl_in_current_obstack ();
2652 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
2653 XVECEXP (result, 0, i) = tem;
2658 /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
2659 according to the chain of insns starting with FIRST.
2661 Also set cur_insn_uid to exceed the largest uid in that chain.
2663 This is used when an inline function's rtl is saved
2664 and passed to rest_of_compilation later. */
2666 static void restore_reg_data_1 ();
2669 restore_reg_data (first)
2674 register int max_uid = 0;
2676 for (insn = first; insn; insn = NEXT_INSN (insn))
2678 if (INSN_UID (insn) >= max_uid)
2679 max_uid = INSN_UID (insn);
2681 switch (GET_CODE (insn))
2691 restore_reg_data_1 (PATTERN (insn));
2696 /* Don't duplicate the uids already in use. */
2697 cur_insn_uid = max_uid + 1;
2699 /* If any regs are missing, make them up.
2701 ??? word_mode is not necessarily the right mode. Most likely these REGs
2702 are never used. At some point this should be checked. */
2704 for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++)
2705 if (regno_reg_rtx[i] == 0)
2706 regno_reg_rtx[i] = gen_rtx (REG, word_mode, i);
2710 restore_reg_data_1 (orig)
2713 register rtx x = orig;
2715 register enum rtx_code code;
2716 register char *format_ptr;
2718 code = GET_CODE (x);
2733 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
2735 /* Make sure regno_pointer_flag and regno_reg_rtx are large
2736 enough to have an element for this pseudo reg number. */
2737 if (REGNO (x) >= reg_rtx_no)
2739 reg_rtx_no = REGNO (x);
2741 if (reg_rtx_no >= regno_pointer_flag_length)
2743 int newlen = MAX (regno_pointer_flag_length * 2,
2746 char *new = (char *) oballoc (newlen);
2747 bzero (new, newlen);
2748 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
2750 new1 = (rtx *) oballoc (newlen * sizeof (rtx));
2751 bzero (new1, newlen * sizeof (rtx));
2752 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
2754 regno_pointer_flag = new;
2755 regno_reg_rtx = new1;
2756 regno_pointer_flag_length = newlen;
2760 regno_reg_rtx[REGNO (x)] = x;
2765 if (GET_CODE (XEXP (x, 0)) == REG)
2766 mark_reg_pointer (XEXP (x, 0));
2767 restore_reg_data_1 (XEXP (x, 0));
2771 /* Now scan the subexpressions recursively. */
2773 format_ptr = GET_RTX_FORMAT (code);
2775 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2777 switch (*format_ptr++)
2780 restore_reg_data_1 (XEXP (x, i));
2784 if (XVEC (x, i) != NULL)
2788 for (j = 0; j < XVECLEN (x, i); j++)
2789 restore_reg_data_1 (XVECEXP (x, i, j));
2796 /* Initialize data structures and variables in this file
2797 before generating rtl for each function. */
2807 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
2810 first_label_num = label_num;
2813 /* Clear the start_sequence/gen_sequence cache. */
2814 sequence_element_free_list = 0;
2815 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
2816 sequence_result[i] = 0;
2818 /* Init the tables that describe all the pseudo regs. */
2820 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
2823 = (char *) oballoc (regno_pointer_flag_length);
2824 bzero (regno_pointer_flag, regno_pointer_flag_length);
2827 = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx));
2828 bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
2830 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
2831 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
2832 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
2833 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
2834 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
2836 /* Indicate that the virtual registers and stack locations are
2838 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
2839 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
2840 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
2842 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
2843 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
2844 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
2845 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
2848 /* Create some permanent unique rtl objects shared between all functions.
2849 LINE_NUMBERS is nonzero if line numbers are to be generated. */
2852 init_emit_once (line_numbers)
2856 enum machine_mode mode;
2858 no_line_numbers = ! line_numbers;
2860 sequence_stack = NULL;
2862 /* Create the unique rtx's for certain rtx codes and operand values. */
2864 pc_rtx = gen_rtx (PC, VOIDmode);
2865 cc0_rtx = gen_rtx (CC0, VOIDmode);
2867 /* Don't use gen_rtx here since gen_rtx in this case
2868 tries to use these variables. */
2869 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
2871 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
2872 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
2873 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
2876 /* These four calls obtain some of the rtx expressions made above. */
2877 const0_rtx = GEN_INT (0);
2878 const1_rtx = GEN_INT (1);
2879 const2_rtx = GEN_INT (2);
2880 constm1_rtx = GEN_INT (-1);
2882 /* This will usually be one of the above constants, but may be a new rtx. */
2883 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
2885 dconst0 = REAL_VALUE_ATOF ("0");
2886 dconst1 = REAL_VALUE_ATOF ("1");
2887 dconst2 = REAL_VALUE_ATOF ("2");
2888 dconstm1 = REAL_VALUE_ATOF ("-1");
2890 for (i = 0; i <= 2; i++)
2892 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
2893 mode = GET_MODE_WIDER_MODE (mode))
2895 rtx tem = rtx_alloc (CONST_DOUBLE);
2896 union real_extract u;
2898 bzero (&u, sizeof u); /* Zero any holes in a structure. */
2899 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
2901 bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u);
2902 CONST_DOUBLE_MEM (tem) = cc0_rtx;
2903 PUT_MODE (tem, mode);
2905 const_tiny_rtx[i][(int) mode] = tem;
2908 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
2910 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2911 mode = GET_MODE_WIDER_MODE (mode))
2912 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
2915 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
2916 mode = GET_MODE_WIDER_MODE (mode))
2917 const_tiny_rtx[0][(int) mode] = const0_rtx;
2919 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
2920 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
2922 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
2923 arg_pointer_rtx = frame_pointer_rtx;
2924 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
2925 arg_pointer_rtx = stack_pointer_rtx;
2927 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
2929 /* Create the virtual registers. Do so here since the following objects
2930 might reference them. */
2932 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
2933 VIRTUAL_INCOMING_ARGS_REGNUM);
2934 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
2935 VIRTUAL_STACK_VARS_REGNUM);
2936 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
2937 VIRTUAL_STACK_DYNAMIC_REGNUM);
2938 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
2939 VIRTUAL_OUTGOING_ARGS_REGNUM);
2942 struct_value_rtx = STRUCT_VALUE;
2944 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
2947 #ifdef STRUCT_VALUE_INCOMING
2948 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
2950 #ifdef STRUCT_VALUE_INCOMING_REGNUM
2951 struct_value_incoming_rtx
2952 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
2954 struct_value_incoming_rtx = struct_value_rtx;
2958 #ifdef STATIC_CHAIN_REGNUM
2959 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
2961 #ifdef STATIC_CHAIN_INCOMING_REGNUM
2962 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
2963 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
2966 static_chain_incoming_rtx = static_chain_rtx;
2970 static_chain_rtx = STATIC_CHAIN;
2972 #ifdef STATIC_CHAIN_INCOMING
2973 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
2975 static_chain_incoming_rtx = static_chain_rtx;
2979 #ifdef PIC_OFFSET_TABLE_REGNUM
2980 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);