1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
64 struct target_rtl default_target_rtl;
66 struct target_rtl *this_target_rtl = &default_target_rtl;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num = 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
106 REAL_VALUE_TYPE dconsthalf;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
110 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
117 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
119 /* A hash table storing CONST_INTs whose absolute value is greater
120 than MAX_SAVED_CONST_INT. */
122 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
123 htab_t const_int_htab;
125 /* A hash table storing memory attribute structures. */
126 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
127 htab_t mem_attrs_htab;
129 /* A hash table storing register attribute structures. */
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
131 htab_t reg_attrs_htab;
133 /* A hash table storing all CONST_DOUBLEs. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
135 htab_t const_double_htab;
137 /* A hash table storing all CONST_FIXEDs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
139 htab_t const_fixed_htab;
141 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
142 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
143 #define last_location (crtl->emit.x_last_location)
144 #define first_label_num (crtl->emit.x_first_label_num)
146 static rtx make_call_insn_raw (rtx);
147 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
148 static void set_used_decls (tree);
149 static void mark_label_nuses (rtx);
150 static hashval_t const_int_htab_hash (const void *);
151 static int const_int_htab_eq (const void *, const void *);
152 static hashval_t const_double_htab_hash (const void *);
153 static int const_double_htab_eq (const void *, const void *);
154 static rtx lookup_const_double (rtx);
155 static hashval_t const_fixed_htab_hash (const void *);
156 static int const_fixed_htab_eq (const void *, const void *);
157 static rtx lookup_const_fixed (rtx);
158 static hashval_t mem_attrs_htab_hash (const void *);
159 static int mem_attrs_htab_eq (const void *, const void *);
160 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
161 addr_space_t, enum machine_mode);
162 static hashval_t reg_attrs_htab_hash (const void *);
163 static int reg_attrs_htab_eq (const void *, const void *);
164 static reg_attrs *get_reg_attrs (tree, int);
165 static rtx gen_const_vector (enum machine_mode, int);
166 static void copy_rtx_if_shared_1 (rtx *orig);
168 /* Probability of the conditional branch currently proceeded by try_split.
169 Set to -1 otherwise. */
170 int split_branch_probability = -1;
172 /* Returns a hash code for X (which is a really a CONST_INT). */
175 const_int_htab_hash (const void *x)
177 return (hashval_t) INTVAL ((const_rtx) x);
180 /* Returns nonzero if the value represented by X (which is really a
181 CONST_INT) is the same as that given by Y (which is really a
185 const_int_htab_eq (const void *x, const void *y)
187 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
190 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
192 const_double_htab_hash (const void *x)
194 const_rtx const value = (const_rtx) x;
197 if (GET_MODE (value) == VOIDmode)
198 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
201 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
202 /* MODE is used in the comparison, so it should be in the hash. */
203 h ^= GET_MODE (value);
208 /* Returns nonzero if the value represented by X (really a ...)
209 is the same as that represented by Y (really a ...) */
211 const_double_htab_eq (const void *x, const void *y)
213 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
215 if (GET_MODE (a) != GET_MODE (b))
217 if (GET_MODE (a) == VOIDmode)
218 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
219 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
221 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
222 CONST_DOUBLE_REAL_VALUE (b));
225 /* Returns a hash code for X (which is really a CONST_FIXED). */
228 const_fixed_htab_hash (const void *x)
230 const_rtx const value = (const_rtx) x;
233 h = fixed_hash (CONST_FIXED_VALUE (value));
234 /* MODE is used in the comparison, so it should be in the hash. */
235 h ^= GET_MODE (value);
239 /* Returns nonzero if the value represented by X (really a ...)
240 is the same as that represented by Y (really a ...). */
243 const_fixed_htab_eq (const void *x, const void *y)
245 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
247 if (GET_MODE (a) != GET_MODE (b))
249 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
252 /* Returns a hash code for X (which is a really a mem_attrs *). */
255 mem_attrs_htab_hash (const void *x)
257 const mem_attrs *const p = (const mem_attrs *) x;
259 return (p->alias ^ (p->align * 1000)
260 ^ (p->addrspace * 4000)
261 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
262 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
263 ^ (size_t) iterative_hash_expr (p->expr, 0));
266 /* Returns nonzero if the value represented by X (which is really a
267 mem_attrs *) is the same as that given by Y (which is also really a
271 mem_attrs_htab_eq (const void *x, const void *y)
273 const mem_attrs *const p = (const mem_attrs *) x;
274 const mem_attrs *const q = (const mem_attrs *) y;
276 return (p->alias == q->alias && p->offset == q->offset
277 && p->size == q->size && p->align == q->align
278 && p->addrspace == q->addrspace
279 && (p->expr == q->expr
280 || (p->expr != NULL_TREE && q->expr != NULL_TREE
281 && operand_equal_p (p->expr, q->expr, 0))));
284 /* Allocate a new mem_attrs structure and insert it into the hash table if
285 one identical to it is not already in the table. We are doing this for
289 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
290 unsigned int align, addr_space_t addrspace, enum machine_mode mode)
295 /* If everything is the default, we can just return zero.
296 This must match what the corresponding MEM_* macros return when the
297 field is not present. */
298 if (alias == 0 && expr == 0 && offset == 0 && addrspace == 0
300 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
301 && (STRICT_ALIGNMENT && mode != BLKmode
302 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
307 attrs.offset = offset;
310 attrs.addrspace = addrspace;
312 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
315 *slot = ggc_alloc_mem_attrs ();
316 memcpy (*slot, &attrs, sizeof (mem_attrs));
319 return (mem_attrs *) *slot;
322 /* Returns a hash code for X (which is a really a reg_attrs *). */
325 reg_attrs_htab_hash (const void *x)
327 const reg_attrs *const p = (const reg_attrs *) x;
329 return ((p->offset * 1000) ^ (long) p->decl);
332 /* Returns nonzero if the value represented by X (which is really a
333 reg_attrs *) is the same as that given by Y (which is also really a
337 reg_attrs_htab_eq (const void *x, const void *y)
339 const reg_attrs *const p = (const reg_attrs *) x;
340 const reg_attrs *const q = (const reg_attrs *) y;
342 return (p->decl == q->decl && p->offset == q->offset);
344 /* Allocate a new reg_attrs structure and insert it into the hash table if
345 one identical to it is not already in the table. We are doing this for
349 get_reg_attrs (tree decl, int offset)
354 /* If everything is the default, we can just return zero. */
355 if (decl == 0 && offset == 0)
359 attrs.offset = offset;
361 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
364 *slot = ggc_alloc_reg_attrs ();
365 memcpy (*slot, &attrs, sizeof (reg_attrs));
368 return (reg_attrs *) *slot;
373 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
379 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
380 MEM_VOLATILE_P (x) = true;
386 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
387 don't attempt to share with the various global pieces of rtl (such as
388 frame_pointer_rtx). */
391 gen_raw_REG (enum machine_mode mode, int regno)
393 rtx x = gen_rtx_raw_REG (mode, regno);
394 ORIGINAL_REGNO (x) = regno;
398 /* There are some RTL codes that require special attention; the generation
399 functions do the raw handling. If you add to this list, modify
400 special_rtx in gengenrtl.c as well. */
403 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
407 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
408 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
410 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
411 if (const_true_rtx && arg == STORE_FLAG_VALUE)
412 return const_true_rtx;
415 /* Look up the CONST_INT in the hash table. */
416 slot = htab_find_slot_with_hash (const_int_htab, &arg,
417 (hashval_t) arg, INSERT);
419 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
425 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
427 return GEN_INT (trunc_int_for_mode (c, mode));
430 /* CONST_DOUBLEs might be created from pairs of integers, or from
431 REAL_VALUE_TYPEs. Also, their length is known only at run time,
432 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
434 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
435 hash table. If so, return its counterpart; otherwise add it
436 to the hash table and return it. */
438 lookup_const_double (rtx real)
440 void **slot = htab_find_slot (const_double_htab, real, INSERT);
447 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
448 VALUE in mode MODE. */
450 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
452 rtx real = rtx_alloc (CONST_DOUBLE);
453 PUT_MODE (real, mode);
457 return lookup_const_double (real);
460 /* Determine whether FIXED, a CONST_FIXED, already exists in the
461 hash table. If so, return its counterpart; otherwise add it
462 to the hash table and return it. */
465 lookup_const_fixed (rtx fixed)
467 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
474 /* Return a CONST_FIXED rtx for a fixed-point value specified by
475 VALUE in mode MODE. */
478 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
480 rtx fixed = rtx_alloc (CONST_FIXED);
481 PUT_MODE (fixed, mode);
485 return lookup_const_fixed (fixed);
488 /* Constructs double_int from rtx CST. */
491 rtx_to_double_int (const_rtx cst)
495 if (CONST_INT_P (cst))
496 r = shwi_to_double_int (INTVAL (cst));
497 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
499 r.low = CONST_DOUBLE_LOW (cst);
500 r.high = CONST_DOUBLE_HIGH (cst);
509 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
513 immed_double_int_const (double_int i, enum machine_mode mode)
515 return immed_double_const (i.low, i.high, mode);
518 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
519 of ints: I0 is the low-order word and I1 is the high-order word.
520 Do not use this routine for non-integer modes; convert to
521 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
524 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
529 /* There are the following cases (note that there are no modes with
530 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
532 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
534 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
535 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
536 from copies of the sign bit, and sign of i0 and i1 are the same), then
537 we return a CONST_INT for i0.
538 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
539 if (mode != VOIDmode)
541 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
542 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
543 /* We can get a 0 for an error mark. */
544 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
545 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
547 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
548 return gen_int_mode (i0, mode);
550 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
553 /* If this integer fits in one word, return a CONST_INT. */
554 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
557 /* We use VOIDmode for integers. */
558 value = rtx_alloc (CONST_DOUBLE);
559 PUT_MODE (value, VOIDmode);
561 CONST_DOUBLE_LOW (value) = i0;
562 CONST_DOUBLE_HIGH (value) = i1;
564 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
565 XWINT (value, i) = 0;
567 return lookup_const_double (value);
571 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
573 /* In case the MD file explicitly references the frame pointer, have
574 all such references point to the same frame pointer. This is
575 used during frame pointer elimination to distinguish the explicit
576 references to these registers from pseudos that happened to be
579 If we have eliminated the frame pointer or arg pointer, we will
580 be using it as a normal register, for example as a spill
581 register. In such cases, we might be accessing it in a mode that
582 is not Pmode and therefore cannot use the pre-allocated rtx.
584 Also don't do this when we are making new REGs in reload, since
585 we don't want to get confused with the real pointers. */
587 if (mode == Pmode && !reload_in_progress)
589 if (regno == FRAME_POINTER_REGNUM
590 && (!reload_completed || frame_pointer_needed))
591 return frame_pointer_rtx;
592 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
593 if (regno == HARD_FRAME_POINTER_REGNUM
594 && (!reload_completed || frame_pointer_needed))
595 return hard_frame_pointer_rtx;
597 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
598 if (regno == ARG_POINTER_REGNUM)
599 return arg_pointer_rtx;
601 #ifdef RETURN_ADDRESS_POINTER_REGNUM
602 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
603 return return_address_pointer_rtx;
605 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
606 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
607 return pic_offset_table_rtx;
608 if (regno == STACK_POINTER_REGNUM)
609 return stack_pointer_rtx;
613 /* If the per-function register table has been set up, try to re-use
614 an existing entry in that table to avoid useless generation of RTL.
616 This code is disabled for now until we can fix the various backends
617 which depend on having non-shared hard registers in some cases. Long
618 term we want to re-enable this code as it can significantly cut down
619 on the amount of useless RTL that gets generated.
621 We'll also need to fix some code that runs after reload that wants to
622 set ORIGINAL_REGNO. */
627 && regno < FIRST_PSEUDO_REGISTER
628 && reg_raw_mode[regno] == mode)
629 return regno_reg_rtx[regno];
632 return gen_raw_REG (mode, regno);
636 gen_rtx_MEM (enum machine_mode mode, rtx addr)
638 rtx rt = gen_rtx_raw_MEM (mode, addr);
640 /* This field is not cleared by the mere allocation of the rtx, so
647 /* Generate a memory referring to non-trapping constant memory. */
650 gen_const_mem (enum machine_mode mode, rtx addr)
652 rtx mem = gen_rtx_MEM (mode, addr);
653 MEM_READONLY_P (mem) = 1;
654 MEM_NOTRAP_P (mem) = 1;
658 /* Generate a MEM referring to fixed portions of the frame, e.g., register
662 gen_frame_mem (enum machine_mode mode, rtx addr)
664 rtx mem = gen_rtx_MEM (mode, addr);
665 MEM_NOTRAP_P (mem) = 1;
666 set_mem_alias_set (mem, get_frame_alias_set ());
670 /* Generate a MEM referring to a temporary use of the stack, not part
671 of the fixed stack frame. For example, something which is pushed
672 by a target splitter. */
674 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
676 rtx mem = gen_rtx_MEM (mode, addr);
677 MEM_NOTRAP_P (mem) = 1;
678 if (!cfun->calls_alloca)
679 set_mem_alias_set (mem, get_frame_alias_set ());
683 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
684 this construct would be valid, and false otherwise. */
687 validate_subreg (enum machine_mode omode, enum machine_mode imode,
688 const_rtx reg, unsigned int offset)
690 unsigned int isize = GET_MODE_SIZE (imode);
691 unsigned int osize = GET_MODE_SIZE (omode);
693 /* All subregs must be aligned. */
694 if (offset % osize != 0)
697 /* The subreg offset cannot be outside the inner object. */
701 /* ??? This should not be here. Temporarily continue to allow word_mode
702 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
703 Generally, backends are doing something sketchy but it'll take time to
705 if (omode == word_mode)
707 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
708 is the culprit here, and not the backends. */
709 else if (osize >= UNITS_PER_WORD && isize >= osize)
711 /* Allow component subregs of complex and vector. Though given the below
712 extraction rules, it's not always clear what that means. */
713 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
714 && GET_MODE_INNER (imode) == omode)
716 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
717 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
718 represent this. It's questionable if this ought to be represented at
719 all -- why can't this all be hidden in post-reload splitters that make
720 arbitrarily mode changes to the registers themselves. */
721 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
723 /* Subregs involving floating point modes are not allowed to
724 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
725 (subreg:SI (reg:DF) 0) isn't. */
726 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
732 /* Paradoxical subregs must have offset zero. */
736 /* This is a normal subreg. Verify that the offset is representable. */
738 /* For hard registers, we already have most of these rules collected in
739 subreg_offset_representable_p. */
740 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
742 unsigned int regno = REGNO (reg);
744 #ifdef CANNOT_CHANGE_MODE_CLASS
745 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
746 && GET_MODE_INNER (imode) == omode)
748 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
752 return subreg_offset_representable_p (regno, imode, offset, omode);
755 /* For pseudo registers, we want most of the same checks. Namely:
756 If the register no larger than a word, the subreg must be lowpart.
757 If the register is larger than a word, the subreg must be the lowpart
758 of a subword. A subreg does *not* perform arbitrary bit extraction.
759 Given that we've already checked mode/offset alignment, we only have
760 to check subword subregs here. */
761 if (osize < UNITS_PER_WORD)
763 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
764 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
765 if (offset % UNITS_PER_WORD != low_off)
772 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
774 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
775 return gen_rtx_raw_SUBREG (mode, reg, offset);
778 /* Generate a SUBREG representing the least-significant part of REG if MODE
779 is smaller than mode of REG, otherwise paradoxical SUBREG. */
782 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
784 enum machine_mode inmode;
786 inmode = GET_MODE (reg);
787 if (inmode == VOIDmode)
789 return gen_rtx_SUBREG (mode, reg,
790 subreg_lowpart_offset (mode, inmode));
794 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
797 gen_rtvec (int n, ...)
805 /* Don't allocate an empty rtvec... */
809 rt_val = rtvec_alloc (n);
811 for (i = 0; i < n; i++)
812 rt_val->elem[i] = va_arg (p, rtx);
819 gen_rtvec_v (int n, rtx *argp)
824 /* Don't allocate an empty rtvec... */
828 rt_val = rtvec_alloc (n);
830 for (i = 0; i < n; i++)
831 rt_val->elem[i] = *argp++;
836 /* Return the number of bytes between the start of an OUTER_MODE
837 in-memory value and the start of an INNER_MODE in-memory value,
838 given that the former is a lowpart of the latter. It may be a
839 paradoxical lowpart, in which case the offset will be negative
840 on big-endian targets. */
843 byte_lowpart_offset (enum machine_mode outer_mode,
844 enum machine_mode inner_mode)
846 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
847 return subreg_lowpart_offset (outer_mode, inner_mode);
849 return -subreg_lowpart_offset (inner_mode, outer_mode);
852 /* Generate a REG rtx for a new pseudo register of mode MODE.
853 This pseudo is assigned the next sequential register number. */
856 gen_reg_rtx (enum machine_mode mode)
859 unsigned int align = GET_MODE_ALIGNMENT (mode);
861 gcc_assert (can_create_pseudo_p ());
863 /* If a virtual register with bigger mode alignment is generated,
864 increase stack alignment estimation because it might be spilled
866 if (SUPPORTS_STACK_ALIGNMENT
867 && crtl->stack_alignment_estimated < align
868 && !crtl->stack_realign_processed)
870 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
871 if (crtl->stack_alignment_estimated < min_align)
872 crtl->stack_alignment_estimated = min_align;
875 if (generating_concat_p
876 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
877 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
879 /* For complex modes, don't make a single pseudo.
880 Instead, make a CONCAT of two pseudos.
881 This allows noncontiguous allocation of the real and imaginary parts,
882 which makes much better code. Besides, allocating DCmode
883 pseudos overstrains reload on some machines like the 386. */
884 rtx realpart, imagpart;
885 enum machine_mode partmode = GET_MODE_INNER (mode);
887 realpart = gen_reg_rtx (partmode);
888 imagpart = gen_reg_rtx (partmode);
889 return gen_rtx_CONCAT (mode, realpart, imagpart);
892 /* Make sure regno_pointer_align, and regno_reg_rtx are large
893 enough to have an element for this pseudo reg number. */
895 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
897 int old_size = crtl->emit.regno_pointer_align_length;
901 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
902 memset (tmp + old_size, 0, old_size);
903 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
905 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
906 memset (new1 + old_size, 0, old_size * sizeof (rtx));
907 regno_reg_rtx = new1;
909 crtl->emit.regno_pointer_align_length = old_size * 2;
912 val = gen_raw_REG (mode, reg_rtx_no);
913 regno_reg_rtx[reg_rtx_no++] = val;
917 /* Update NEW with the same attributes as REG, but with OFFSET added
918 to the REG_OFFSET. */
921 update_reg_offset (rtx new_rtx, rtx reg, int offset)
923 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
924 REG_OFFSET (reg) + offset);
927 /* Generate a register with same attributes as REG, but with OFFSET
928 added to the REG_OFFSET. */
931 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
934 rtx new_rtx = gen_rtx_REG (mode, regno);
936 update_reg_offset (new_rtx, reg, offset);
940 /* Generate a new pseudo-register with the same attributes as REG, but
941 with OFFSET added to the REG_OFFSET. */
944 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
946 rtx new_rtx = gen_reg_rtx (mode);
948 update_reg_offset (new_rtx, reg, offset);
952 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
953 new register is a (possibly paradoxical) lowpart of the old one. */
956 adjust_reg_mode (rtx reg, enum machine_mode mode)
958 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
959 PUT_MODE (reg, mode);
962 /* Copy REG's attributes from X, if X has any attributes. If REG and X
963 have different modes, REG is a (possibly paradoxical) lowpart of X. */
966 set_reg_attrs_from_value (rtx reg, rtx x)
970 /* Hard registers can be reused for multiple purposes within the same
971 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
973 if (HARD_REGISTER_P (reg))
976 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
979 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
981 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
983 mark_reg_pointer (reg, 0);
988 update_reg_offset (reg, x, offset);
990 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
994 /* Generate a REG rtx for a new pseudo register, copying the mode
995 and attributes from X. */
998 gen_reg_rtx_and_attrs (rtx x)
1000 rtx reg = gen_reg_rtx (GET_MODE (x));
1001 set_reg_attrs_from_value (reg, x);
1005 /* Set the register attributes for registers contained in PARM_RTX.
1006 Use needed values from memory attributes of MEM. */
1009 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1011 if (REG_P (parm_rtx))
1012 set_reg_attrs_from_value (parm_rtx, mem);
1013 else if (GET_CODE (parm_rtx) == PARALLEL)
1015 /* Check for a NULL entry in the first slot, used to indicate that the
1016 parameter goes both on the stack and in registers. */
1017 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1018 for (; i < XVECLEN (parm_rtx, 0); i++)
1020 rtx x = XVECEXP (parm_rtx, 0, i);
1021 if (REG_P (XEXP (x, 0)))
1022 REG_ATTRS (XEXP (x, 0))
1023 = get_reg_attrs (MEM_EXPR (mem),
1024 INTVAL (XEXP (x, 1)));
1029 /* Set the REG_ATTRS for registers in value X, given that X represents
1033 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1035 if (GET_CODE (x) == SUBREG)
1037 gcc_assert (subreg_lowpart_p (x));
1042 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1044 if (GET_CODE (x) == CONCAT)
1046 if (REG_P (XEXP (x, 0)))
1047 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1048 if (REG_P (XEXP (x, 1)))
1049 REG_ATTRS (XEXP (x, 1))
1050 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1052 if (GET_CODE (x) == PARALLEL)
1056 /* Check for a NULL entry, used to indicate that the parameter goes
1057 both on the stack and in registers. */
1058 if (XEXP (XVECEXP (x, 0, 0), 0))
1063 for (i = start; i < XVECLEN (x, 0); i++)
1065 rtx y = XVECEXP (x, 0, i);
1066 if (REG_P (XEXP (y, 0)))
1067 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1072 /* Assign the RTX X to declaration T. */
1075 set_decl_rtl (tree t, rtx x)
1077 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1079 set_reg_attrs_for_decl_rtl (t, x);
1082 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1083 if the ABI requires the parameter to be passed by reference. */
1086 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1088 DECL_INCOMING_RTL (t) = x;
1089 if (x && !by_reference_p)
1090 set_reg_attrs_for_decl_rtl (t, x);
1093 /* Identify REG (which may be a CONCAT) as a user register. */
1096 mark_user_reg (rtx reg)
1098 if (GET_CODE (reg) == CONCAT)
1100 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1101 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1105 gcc_assert (REG_P (reg));
1106 REG_USERVAR_P (reg) = 1;
1110 /* Identify REG as a probable pointer register and show its alignment
1111 as ALIGN, if nonzero. */
1114 mark_reg_pointer (rtx reg, int align)
1116 if (! REG_POINTER (reg))
1118 REG_POINTER (reg) = 1;
1121 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1123 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1124 /* We can no-longer be sure just how aligned this pointer is. */
1125 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1128 /* Return 1 plus largest pseudo reg number used in the current function. */
1136 /* Return 1 + the largest label number used so far in the current function. */
1139 max_label_num (void)
1144 /* Return first label number used in this function (if any were used). */
1147 get_first_label_num (void)
1149 return first_label_num;
1152 /* If the rtx for label was created during the expansion of a nested
1153 function, then first_label_num won't include this label number.
1154 Fix this now so that array indices work later. */
1157 maybe_set_first_label_num (rtx x)
1159 if (CODE_LABEL_NUMBER (x) < first_label_num)
1160 first_label_num = CODE_LABEL_NUMBER (x);
1163 /* Return a value representing some low-order bits of X, where the number
1164 of low-order bits is given by MODE. Note that no conversion is done
1165 between floating-point and fixed-point values, rather, the bit
1166 representation is returned.
1168 This function handles the cases in common between gen_lowpart, below,
1169 and two variants in cse.c and combine.c. These are the cases that can
1170 be safely handled at all points in the compilation.
1172 If this is not a case we can handle, return 0. */
1175 gen_lowpart_common (enum machine_mode mode, rtx x)
1177 int msize = GET_MODE_SIZE (mode);
1180 enum machine_mode innermode;
1182 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1183 so we have to make one up. Yuk. */
1184 innermode = GET_MODE (x);
1186 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1187 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1188 else if (innermode == VOIDmode)
1189 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1191 xsize = GET_MODE_SIZE (innermode);
1193 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1195 if (innermode == mode)
1198 /* MODE must occupy no more words than the mode of X. */
1199 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1200 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1203 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1204 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1207 offset = subreg_lowpart_offset (mode, innermode);
1209 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1210 && (GET_MODE_CLASS (mode) == MODE_INT
1211 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1213 /* If we are getting the low-order part of something that has been
1214 sign- or zero-extended, we can either just use the object being
1215 extended or make a narrower extension. If we want an even smaller
1216 piece than the size of the object being extended, call ourselves
1219 This case is used mostly by combine and cse. */
1221 if (GET_MODE (XEXP (x, 0)) == mode)
1223 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1224 return gen_lowpart_common (mode, XEXP (x, 0));
1225 else if (msize < xsize)
1226 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1228 else if (GET_CODE (x) == SUBREG || REG_P (x)
1229 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1230 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1231 return simplify_gen_subreg (mode, x, innermode, offset);
1233 /* Otherwise, we can't do this. */
1238 gen_highpart (enum machine_mode mode, rtx x)
1240 unsigned int msize = GET_MODE_SIZE (mode);
1243 /* This case loses if X is a subreg. To catch bugs early,
1244 complain if an invalid MODE is used even in other cases. */
1245 gcc_assert (msize <= UNITS_PER_WORD
1246 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1248 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1249 subreg_highpart_offset (mode, GET_MODE (x)));
1250 gcc_assert (result);
1252 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1253 the target if we have a MEM. gen_highpart must return a valid operand,
1254 emitting code if necessary to do so. */
1257 result = validize_mem (result);
1258 gcc_assert (result);
1264 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1265 be VOIDmode constant. */
1267 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1269 if (GET_MODE (exp) != VOIDmode)
1271 gcc_assert (GET_MODE (exp) == innermode);
1272 return gen_highpart (outermode, exp);
1274 return simplify_gen_subreg (outermode, exp, innermode,
1275 subreg_highpart_offset (outermode, innermode));
1278 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1281 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1283 unsigned int offset = 0;
1284 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1288 if (WORDS_BIG_ENDIAN)
1289 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1290 if (BYTES_BIG_ENDIAN)
1291 offset += difference % UNITS_PER_WORD;
1297 /* Return offset in bytes to get OUTERMODE high part
1298 of the value in mode INNERMODE stored in memory in target format. */
1300 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1302 unsigned int offset = 0;
1303 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1305 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1309 if (! WORDS_BIG_ENDIAN)
1310 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1311 if (! BYTES_BIG_ENDIAN)
1312 offset += difference % UNITS_PER_WORD;
1318 /* Return 1 iff X, assumed to be a SUBREG,
1319 refers to the least significant part of its containing reg.
1320 If X is not a SUBREG, always return 1 (it is its own low part!). */
1323 subreg_lowpart_p (const_rtx x)
1325 if (GET_CODE (x) != SUBREG)
1327 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1330 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1331 == SUBREG_BYTE (x));
1334 /* Return subword OFFSET of operand OP.
1335 The word number, OFFSET, is interpreted as the word number starting
1336 at the low-order address. OFFSET 0 is the low-order word if not
1337 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1339 If we cannot extract the required word, we return zero. Otherwise,
1340 an rtx corresponding to the requested word will be returned.
1342 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1343 reload has completed, a valid address will always be returned. After
1344 reload, if a valid address cannot be returned, we return zero.
1346 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1347 it is the responsibility of the caller.
1349 MODE is the mode of OP in case it is a CONST_INT.
1351 ??? This is still rather broken for some cases. The problem for the
1352 moment is that all callers of this thing provide no 'goal mode' to
1353 tell us to work with. This exists because all callers were written
1354 in a word based SUBREG world.
1355 Now use of this function can be deprecated by simplify_subreg in most
1360 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1362 if (mode == VOIDmode)
1363 mode = GET_MODE (op);
1365 gcc_assert (mode != VOIDmode);
1367 /* If OP is narrower than a word, fail. */
1369 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1372 /* If we want a word outside OP, return zero. */
1374 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1377 /* Form a new MEM at the requested address. */
1380 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1382 if (! validate_address)
1385 else if (reload_completed)
1387 if (! strict_memory_address_addr_space_p (word_mode,
1389 MEM_ADDR_SPACE (op)))
1393 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1396 /* Rest can be handled by simplify_subreg. */
1397 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1400 /* Similar to `operand_subword', but never return 0. If we can't
1401 extract the required subword, put OP into a register and try again.
1402 The second attempt must succeed. We always validate the address in
1405 MODE is the mode of OP, in case it is CONST_INT. */
1408 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1410 rtx result = operand_subword (op, offset, 1, mode);
1415 if (mode != BLKmode && mode != VOIDmode)
1417 /* If this is a register which can not be accessed by words, copy it
1418 to a pseudo register. */
1420 op = copy_to_reg (op);
1422 op = force_reg (mode, op);
1425 result = operand_subword (op, offset, 1, mode);
1426 gcc_assert (result);
1431 /* Returns 1 if both MEM_EXPR can be considered equal
1435 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1440 if (! expr1 || ! expr2)
1443 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1446 return operand_equal_p (expr1, expr2, 0);
1449 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1450 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1454 get_mem_align_offset (rtx mem, unsigned int align)
1457 unsigned HOST_WIDE_INT offset;
1459 /* This function can't use
1460 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1461 || !CONST_INT_P (MEM_OFFSET (mem))
1462 || (MAX (MEM_ALIGN (mem),
1463 get_object_alignment (MEM_EXPR (mem), align))
1467 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1469 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1470 for <variable>. get_inner_reference doesn't handle it and
1471 even if it did, the alignment in that case needs to be determined
1472 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1473 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1474 isn't sufficiently aligned, the object it is in might be. */
1475 gcc_assert (MEM_P (mem));
1476 expr = MEM_EXPR (mem);
1477 if (expr == NULL_TREE
1478 || MEM_OFFSET (mem) == NULL_RTX
1479 || !CONST_INT_P (MEM_OFFSET (mem)))
1482 offset = INTVAL (MEM_OFFSET (mem));
1485 if (DECL_ALIGN (expr) < align)
1488 else if (INDIRECT_REF_P (expr))
1490 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1493 else if (TREE_CODE (expr) == COMPONENT_REF)
1497 tree inner = TREE_OPERAND (expr, 0);
1498 tree field = TREE_OPERAND (expr, 1);
1499 tree byte_offset = component_ref_field_offset (expr);
1500 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1503 || !host_integerp (byte_offset, 1)
1504 || !host_integerp (bit_offset, 1))
1507 offset += tree_low_cst (byte_offset, 1);
1508 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1510 if (inner == NULL_TREE)
1512 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1513 < (unsigned int) align)
1517 else if (DECL_P (inner))
1519 if (DECL_ALIGN (inner) < align)
1523 else if (TREE_CODE (inner) != COMPONENT_REF)
1531 return offset & ((align / BITS_PER_UNIT) - 1);
1534 /* Given REF (a MEM) and T, either the type of X or the expression
1535 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1536 if we are making a new object of this type. BITPOS is nonzero if
1537 there is an offset outstanding on T that will be applied later. */
1540 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1541 HOST_WIDE_INT bitpos)
1543 alias_set_type alias = MEM_ALIAS_SET (ref);
1544 tree expr = MEM_EXPR (ref);
1545 rtx offset = MEM_OFFSET (ref);
1546 rtx size = MEM_SIZE (ref);
1547 unsigned int align = MEM_ALIGN (ref);
1548 HOST_WIDE_INT apply_bitpos = 0;
1551 /* It can happen that type_for_mode was given a mode for which there
1552 is no language-level type. In which case it returns NULL, which
1557 type = TYPE_P (t) ? t : TREE_TYPE (t);
1558 if (type == error_mark_node)
1561 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1562 wrong answer, as it assumes that DECL_RTL already has the right alias
1563 info. Callers should not set DECL_RTL until after the call to
1564 set_mem_attributes. */
1565 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1567 /* Get the alias set from the expression or type (perhaps using a
1568 front-end routine) and use it. */
1569 alias = get_alias_set (t);
1571 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1572 MEM_IN_STRUCT_P (ref)
1573 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1574 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1576 /* If we are making an object of this type, or if this is a DECL, we know
1577 that it is a scalar if the type is not an aggregate. */
1578 if ((objectp || DECL_P (t))
1579 && ! AGGREGATE_TYPE_P (type)
1580 && TREE_CODE (type) != COMPLEX_TYPE)
1581 MEM_SCALAR_P (ref) = 1;
1583 /* We can set the alignment from the type if we are making an object,
1584 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1585 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1586 align = MAX (align, TYPE_ALIGN (type));
1588 else if (TREE_CODE (t) == MEM_REF)
1590 tree op0 = TREE_OPERAND (t, 0);
1591 if (TREE_CODE (op0) == ADDR_EXPR
1592 && (DECL_P (TREE_OPERAND (op0, 0))
1593 || CONSTANT_CLASS_P (TREE_OPERAND (op0, 0))))
1595 if (DECL_P (TREE_OPERAND (op0, 0)))
1596 align = DECL_ALIGN (TREE_OPERAND (op0, 0));
1597 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0)))
1599 align = TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0, 0)));
1600 #ifdef CONSTANT_ALIGNMENT
1601 align = CONSTANT_ALIGNMENT (TREE_OPERAND (op0, 0), align);
1604 if (TREE_INT_CST_LOW (TREE_OPERAND (t, 1)) != 0)
1606 unsigned HOST_WIDE_INT ioff
1607 = TREE_INT_CST_LOW (TREE_OPERAND (t, 1));
1608 unsigned HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1609 align = MIN (aoff, align);
1613 /* ??? This isn't fully correct, we can't set the alignment from the
1614 type in all cases. */
1615 align = MAX (align, TYPE_ALIGN (type));
1618 else if (TREE_CODE (t) == TARGET_MEM_REF)
1619 /* ??? This isn't fully correct, we can't set the alignment from the
1620 type in all cases. */
1621 align = MAX (align, TYPE_ALIGN (type));
1623 else if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1625 if (integer_zerop (TREE_OPERAND (t, 1)))
1626 /* We don't know anything about the alignment. */
1627 align = BITS_PER_UNIT;
1629 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1632 /* If the size is known, we can set that. */
1633 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1634 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1636 /* If T is not a type, we may be able to deduce some more information about
1641 bool align_computed = false;
1643 if (TREE_THIS_VOLATILE (t))
1644 MEM_VOLATILE_P (ref) = 1;
1646 /* Now remove any conversions: they don't change what the underlying
1647 object is. Likewise for SAVE_EXPR. */
1648 while (CONVERT_EXPR_P (t)
1649 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1650 || TREE_CODE (t) == SAVE_EXPR)
1651 t = TREE_OPERAND (t, 0);
1653 /* We may look through structure-like accesses for the purposes of
1654 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1656 while (TREE_CODE (base) == COMPONENT_REF
1657 || TREE_CODE (base) == REALPART_EXPR
1658 || TREE_CODE (base) == IMAGPART_EXPR
1659 || TREE_CODE (base) == BIT_FIELD_REF)
1660 base = TREE_OPERAND (base, 0);
1662 if (TREE_CODE (base) == MEM_REF
1663 && TREE_CODE (TREE_OPERAND (base, 0)) == ADDR_EXPR)
1664 base = TREE_OPERAND (TREE_OPERAND (base, 0), 0);
1667 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1668 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1670 MEM_NOTRAP_P (ref) = 1;
1673 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1675 base = get_base_address (base);
1676 if (base && DECL_P (base)
1677 && TREE_READONLY (base)
1678 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1679 MEM_READONLY_P (ref) = 1;
1681 /* If this expression uses it's parent's alias set, mark it such
1682 that we won't change it. */
1683 if (component_uses_parent_alias_set (t))
1684 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1686 /* If this is a decl, set the attributes of the MEM from it. */
1690 offset = const0_rtx;
1691 apply_bitpos = bitpos;
1692 size = (DECL_SIZE_UNIT (t)
1693 && host_integerp (DECL_SIZE_UNIT (t), 1)
1694 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1695 align = DECL_ALIGN (t);
1696 align_computed = true;
1699 /* If this is a constant, we know the alignment. */
1700 else if (CONSTANT_CLASS_P (t))
1702 align = TYPE_ALIGN (type);
1703 #ifdef CONSTANT_ALIGNMENT
1704 align = CONSTANT_ALIGNMENT (t, align);
1706 align_computed = true;
1709 /* If this is a field reference and not a bit-field, record it. */
1710 /* ??? There is some information that can be gleaned from bit-fields,
1711 such as the word offset in the structure that might be modified.
1712 But skip it for now. */
1713 else if (TREE_CODE (t) == COMPONENT_REF
1714 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1717 offset = const0_rtx;
1718 apply_bitpos = bitpos;
1719 /* ??? Any reason the field size would be different than
1720 the size we got from the type? */
1723 /* If this is an array reference, look for an outer field reference. */
1724 else if (TREE_CODE (t) == ARRAY_REF)
1726 tree off_tree = size_zero_node;
1727 /* We can't modify t, because we use it at the end of the
1733 tree index = TREE_OPERAND (t2, 1);
1734 tree low_bound = array_ref_low_bound (t2);
1735 tree unit_size = array_ref_element_size (t2);
1737 /* We assume all arrays have sizes that are a multiple of a byte.
1738 First subtract the lower bound, if any, in the type of the
1739 index, then convert to sizetype and multiply by the size of
1740 the array element. */
1741 if (! integer_zerop (low_bound))
1742 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1745 off_tree = size_binop (PLUS_EXPR,
1746 size_binop (MULT_EXPR,
1747 fold_convert (sizetype,
1751 t2 = TREE_OPERAND (t2, 0);
1753 while (TREE_CODE (t2) == ARRAY_REF);
1759 if (host_integerp (off_tree, 1))
1761 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1762 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1763 align = DECL_ALIGN (t2);
1764 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1766 align_computed = true;
1767 offset = GEN_INT (ioff);
1768 apply_bitpos = bitpos;
1771 else if (TREE_CODE (t2) == COMPONENT_REF)
1775 if (host_integerp (off_tree, 1))
1777 offset = GEN_INT (tree_low_cst (off_tree, 1));
1778 apply_bitpos = bitpos;
1780 /* ??? Any reason the field size would be different than
1781 the size we got from the type? */
1784 /* If this is an indirect reference, record it. */
1785 else if (TREE_CODE (t) == MEM_REF
1786 || TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1789 offset = const0_rtx;
1790 apply_bitpos = bitpos;
1794 /* If this is an indirect reference, record it. */
1795 else if (TREE_CODE (t) == MEM_REF
1796 || TREE_CODE (t) == TARGET_MEM_REF
1797 || TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1800 offset = const0_rtx;
1801 apply_bitpos = bitpos;
1804 if (!align_computed && !INDIRECT_REF_P (t))
1806 unsigned int obj_align = get_object_alignment (t, BIGGEST_ALIGNMENT);
1807 align = MAX (align, obj_align);
1811 /* If we modified OFFSET based on T, then subtract the outstanding
1812 bit position offset. Similarly, increase the size of the accessed
1813 object to contain the negative offset. */
1816 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1818 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1821 /* Now set the attributes we computed above. */
1823 = get_mem_attrs (alias, expr, offset, size, align,
1824 TYPE_ADDR_SPACE (type), GET_MODE (ref));
1826 /* If this is already known to be a scalar or aggregate, we are done. */
1827 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1830 /* If it is a reference into an aggregate, this is part of an aggregate.
1831 Otherwise we don't know. */
1832 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1833 || TREE_CODE (t) == ARRAY_RANGE_REF
1834 || TREE_CODE (t) == BIT_FIELD_REF)
1835 MEM_IN_STRUCT_P (ref) = 1;
1839 set_mem_attributes (rtx ref, tree t, int objectp)
1841 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1844 /* Set the alias set of MEM to SET. */
1847 set_mem_alias_set (rtx mem, alias_set_type set)
1849 #ifdef ENABLE_CHECKING
1850 /* If the new and old alias sets don't conflict, something is wrong. */
1851 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1854 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1855 MEM_SIZE (mem), MEM_ALIGN (mem),
1856 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1859 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1862 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1864 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1865 MEM_OFFSET (mem), MEM_SIZE (mem),
1866 MEM_ALIGN (mem), addrspace, GET_MODE (mem));
1869 /* Set the alignment of MEM to ALIGN bits. */
1872 set_mem_align (rtx mem, unsigned int align)
1874 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1875 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1876 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1879 /* Set the expr for MEM to EXPR. */
1882 set_mem_expr (rtx mem, tree expr)
1885 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1886 MEM_SIZE (mem), MEM_ALIGN (mem),
1887 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1890 /* Set the offset of MEM to OFFSET. */
1893 set_mem_offset (rtx mem, rtx offset)
1895 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1896 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1897 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1900 /* Set the size of MEM to SIZE. */
1903 set_mem_size (rtx mem, rtx size)
1905 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1906 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1907 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1910 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1911 and its address changed to ADDR. (VOIDmode means don't change the mode.
1912 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1913 returned memory location is required to be valid. The memory
1914 attributes are not changed. */
1917 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1922 gcc_assert (MEM_P (memref));
1923 as = MEM_ADDR_SPACE (memref);
1924 if (mode == VOIDmode)
1925 mode = GET_MODE (memref);
1927 addr = XEXP (memref, 0);
1928 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1929 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1934 if (reload_in_progress || reload_completed)
1935 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1937 addr = memory_address_addr_space (mode, addr, as);
1940 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1943 new_rtx = gen_rtx_MEM (mode, addr);
1944 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1948 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1949 way we are changing MEMREF, so we only preserve the alias set. */
1952 change_address (rtx memref, enum machine_mode mode, rtx addr)
1954 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1955 enum machine_mode mmode = GET_MODE (new_rtx);
1958 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1959 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1961 /* If there are no changes, just return the original memory reference. */
1962 if (new_rtx == memref)
1964 if (MEM_ATTRS (memref) == 0
1965 || (MEM_EXPR (memref) == NULL
1966 && MEM_OFFSET (memref) == NULL
1967 && MEM_SIZE (memref) == size
1968 && MEM_ALIGN (memref) == align))
1971 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1972 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1976 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align,
1977 MEM_ADDR_SPACE (memref), mmode);
1982 /* Return a memory reference like MEMREF, but with its mode changed
1983 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1984 nonzero, the memory address is forced to be valid.
1985 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1986 and caller is responsible for adjusting MEMREF base register. */
1989 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1990 int validate, int adjust)
1992 rtx addr = XEXP (memref, 0);
1994 rtx memoffset = MEM_OFFSET (memref);
1996 unsigned int memalign = MEM_ALIGN (memref);
1997 addr_space_t as = MEM_ADDR_SPACE (memref);
1998 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
2001 /* If there are no changes, just return the original memory reference. */
2002 if (mode == GET_MODE (memref) && !offset
2003 && (!validate || memory_address_addr_space_p (mode, addr, as)))
2006 /* ??? Prefer to create garbage instead of creating shared rtl.
2007 This may happen even if offset is nonzero -- consider
2008 (plus (plus reg reg) const_int) -- so do this always. */
2009 addr = copy_rtx (addr);
2011 /* Convert a possibly large offset to a signed value within the
2012 range of the target address space. */
2013 pbits = GET_MODE_BITSIZE (address_mode);
2014 if (HOST_BITS_PER_WIDE_INT > pbits)
2016 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2017 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2023 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2024 object, we can merge it into the LO_SUM. */
2025 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2027 && (unsigned HOST_WIDE_INT) offset
2028 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2029 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2030 plus_constant (XEXP (addr, 1), offset));
2032 addr = plus_constant (addr, offset);
2035 new_rtx = change_address_1 (memref, mode, addr, validate);
2037 /* If the address is a REG, change_address_1 rightfully returns memref,
2038 but this would destroy memref's MEM_ATTRS. */
2039 if (new_rtx == memref && offset != 0)
2040 new_rtx = copy_rtx (new_rtx);
2042 /* Compute the new values of the memory attributes due to this adjustment.
2043 We add the offsets and update the alignment. */
2045 memoffset = GEN_INT (offset + INTVAL (memoffset));
2047 /* Compute the new alignment by taking the MIN of the alignment and the
2048 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2053 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2055 /* We can compute the size in a number of ways. */
2056 if (GET_MODE (new_rtx) != BLKmode)
2057 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2058 else if (MEM_SIZE (memref))
2059 size = plus_constant (MEM_SIZE (memref), -offset);
2061 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2062 memoffset, size, memalign, as,
2063 GET_MODE (new_rtx));
2065 /* At some point, we should validate that this offset is within the object,
2066 if all the appropriate values are known. */
2070 /* Return a memory reference like MEMREF, but with its mode changed
2071 to MODE and its address changed to ADDR, which is assumed to be
2072 MEMREF offset by OFFSET bytes. If VALIDATE is
2073 nonzero, the memory address is forced to be valid. */
2076 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2077 HOST_WIDE_INT offset, int validate)
2079 memref = change_address_1 (memref, VOIDmode, addr, validate);
2080 return adjust_address_1 (memref, mode, offset, validate, 0);
2083 /* Return a memory reference like MEMREF, but whose address is changed by
2084 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2085 known to be in OFFSET (possibly 1). */
2088 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2090 rtx new_rtx, addr = XEXP (memref, 0);
2091 addr_space_t as = MEM_ADDR_SPACE (memref);
2092 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
2094 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2096 /* At this point we don't know _why_ the address is invalid. It
2097 could have secondary memory references, multiplies or anything.
2099 However, if we did go and rearrange things, we can wind up not
2100 being able to recognize the magic around pic_offset_table_rtx.
2101 This stuff is fragile, and is yet another example of why it is
2102 bad to expose PIC machinery too early. */
2103 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx, as)
2104 && GET_CODE (addr) == PLUS
2105 && XEXP (addr, 0) == pic_offset_table_rtx)
2107 addr = force_reg (GET_MODE (addr), addr);
2108 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2111 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2112 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2114 /* If there are no changes, just return the original memory reference. */
2115 if (new_rtx == memref)
2118 /* Update the alignment to reflect the offset. Reset the offset, which
2121 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2122 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2123 as, GET_MODE (new_rtx));
2127 /* Return a memory reference like MEMREF, but with its address changed to
2128 ADDR. The caller is asserting that the actual piece of memory pointed
2129 to is the same, just the form of the address is being changed, such as
2130 by putting something into a register. */
2133 replace_equiv_address (rtx memref, rtx addr)
2135 /* change_address_1 copies the memory attribute structure without change
2136 and that's exactly what we want here. */
2137 update_temp_slot_address (XEXP (memref, 0), addr);
2138 return change_address_1 (memref, VOIDmode, addr, 1);
2141 /* Likewise, but the reference is not required to be valid. */
2144 replace_equiv_address_nv (rtx memref, rtx addr)
2146 return change_address_1 (memref, VOIDmode, addr, 0);
2149 /* Return a memory reference like MEMREF, but with its mode widened to
2150 MODE and offset by OFFSET. This would be used by targets that e.g.
2151 cannot issue QImode memory operations and have to use SImode memory
2152 operations plus masking logic. */
2155 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2157 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2158 tree expr = MEM_EXPR (new_rtx);
2159 rtx memoffset = MEM_OFFSET (new_rtx);
2160 unsigned int size = GET_MODE_SIZE (mode);
2162 /* If there are no changes, just return the original memory reference. */
2163 if (new_rtx == memref)
2166 /* If we don't know what offset we were at within the expression, then
2167 we can't know if we've overstepped the bounds. */
2173 if (TREE_CODE (expr) == COMPONENT_REF)
2175 tree field = TREE_OPERAND (expr, 1);
2176 tree offset = component_ref_field_offset (expr);
2178 if (! DECL_SIZE_UNIT (field))
2184 /* Is the field at least as large as the access? If so, ok,
2185 otherwise strip back to the containing structure. */
2186 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2187 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2188 && INTVAL (memoffset) >= 0)
2191 if (! host_integerp (offset, 1))
2197 expr = TREE_OPERAND (expr, 0);
2199 = (GEN_INT (INTVAL (memoffset)
2200 + tree_low_cst (offset, 1)
2201 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2204 /* Similarly for the decl. */
2205 else if (DECL_P (expr)
2206 && DECL_SIZE_UNIT (expr)
2207 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2208 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2209 && (! memoffset || INTVAL (memoffset) >= 0))
2213 /* The widened memory access overflows the expression, which means
2214 that it could alias another expression. Zap it. */
2221 memoffset = NULL_RTX;
2223 /* The widened memory may alias other stuff, so zap the alias set. */
2224 /* ??? Maybe use get_alias_set on any remaining expression. */
2226 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2227 MEM_ALIGN (new_rtx),
2228 MEM_ADDR_SPACE (new_rtx), mode);
2233 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2234 static GTY(()) tree spill_slot_decl;
2237 get_spill_slot_decl (bool force_build_p)
2239 tree d = spill_slot_decl;
2242 if (d || !force_build_p)
2245 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2246 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2247 DECL_ARTIFICIAL (d) = 1;
2248 DECL_IGNORED_P (d) = 1;
2250 TREE_THIS_NOTRAP (d) = 1;
2251 spill_slot_decl = d;
2253 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2254 MEM_NOTRAP_P (rd) = 1;
2255 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2256 NULL_RTX, 0, ADDR_SPACE_GENERIC, BLKmode);
2257 SET_DECL_RTL (d, rd);
2262 /* Given MEM, a result from assign_stack_local, fill in the memory
2263 attributes as appropriate for a register allocator spill slot.
2264 These slots are not aliasable by other memory. We arrange for
2265 them all to use a single MEM_EXPR, so that the aliasing code can
2266 work properly in the case of shared spill slots. */
2269 set_mem_attrs_for_spill (rtx mem)
2271 alias_set_type alias;
2275 expr = get_spill_slot_decl (true);
2276 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2278 /* We expect the incoming memory to be of the form:
2279 (mem:MODE (plus (reg sfp) (const_int offset)))
2280 with perhaps the plus missing for offset = 0. */
2281 addr = XEXP (mem, 0);
2282 offset = const0_rtx;
2283 if (GET_CODE (addr) == PLUS
2284 && CONST_INT_P (XEXP (addr, 1)))
2285 offset = XEXP (addr, 1);
2287 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2288 MEM_SIZE (mem), MEM_ALIGN (mem),
2289 ADDR_SPACE_GENERIC, GET_MODE (mem));
2290 MEM_NOTRAP_P (mem) = 1;
2293 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2296 gen_label_rtx (void)
2298 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2299 NULL, label_num++, NULL);
2302 /* For procedure integration. */
2304 /* Install new pointers to the first and last insns in the chain.
2305 Also, set cur_insn_uid to one higher than the last in use.
2306 Used for an inline-procedure after copying the insn chain. */
2309 set_new_first_and_last_insn (rtx first, rtx last)
2313 set_first_insn (first);
2314 set_last_insn (last);
2317 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2319 int debug_count = 0;
2321 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2322 cur_debug_insn_uid = 0;
2324 for (insn = first; insn; insn = NEXT_INSN (insn))
2325 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2326 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2329 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2330 if (DEBUG_INSN_P (insn))
2335 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2337 cur_debug_insn_uid++;
2340 for (insn = first; insn; insn = NEXT_INSN (insn))
2341 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2346 /* Go through all the RTL insn bodies and copy any invalid shared
2347 structure. This routine should only be called once. */
2350 unshare_all_rtl_1 (rtx insn)
2352 /* Unshare just about everything else. */
2353 unshare_all_rtl_in_chain (insn);
2355 /* Make sure the addresses of stack slots found outside the insn chain
2356 (such as, in DECL_RTL of a variable) are not shared
2357 with the insn chain.
2359 This special care is necessary when the stack slot MEM does not
2360 actually appear in the insn chain. If it does appear, its address
2361 is unshared from all else at that point. */
2362 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2365 /* Go through all the RTL insn bodies and copy any invalid shared
2366 structure, again. This is a fairly expensive thing to do so it
2367 should be done sparingly. */
2370 unshare_all_rtl_again (rtx insn)
2375 for (p = insn; p; p = NEXT_INSN (p))
2378 reset_used_flags (PATTERN (p));
2379 reset_used_flags (REG_NOTES (p));
2382 /* Make sure that virtual stack slots are not shared. */
2383 set_used_decls (DECL_INITIAL (cfun->decl));
2385 /* Make sure that virtual parameters are not shared. */
2386 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2387 set_used_flags (DECL_RTL (decl));
2389 reset_used_flags (stack_slot_list);
2391 unshare_all_rtl_1 (insn);
2395 unshare_all_rtl (void)
2397 unshare_all_rtl_1 (get_insns ());
2401 struct rtl_opt_pass pass_unshare_all_rtl =
2405 "unshare", /* name */
2407 unshare_all_rtl, /* execute */
2410 0, /* static_pass_number */
2411 TV_NONE, /* tv_id */
2412 0, /* properties_required */
2413 0, /* properties_provided */
2414 0, /* properties_destroyed */
2415 0, /* todo_flags_start */
2416 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2421 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2422 Recursively does the same for subexpressions. */
2425 verify_rtx_sharing (rtx orig, rtx insn)
2430 const char *format_ptr;
2435 code = GET_CODE (x);
2437 /* These types may be freely shared. */
2455 /* SCRATCH must be shared because they represent distinct values. */
2457 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2462 if (shared_const_p (orig))
2467 /* A MEM is allowed to be shared if its address is constant. */
2468 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2469 || reload_completed || reload_in_progress)
2478 /* This rtx may not be shared. If it has already been seen,
2479 replace it with a copy of itself. */
2480 #ifdef ENABLE_CHECKING
2481 if (RTX_FLAG (x, used))
2483 error ("invalid rtl sharing found in the insn");
2485 error ("shared rtx");
2487 internal_error ("internal consistency failure");
2490 gcc_assert (!RTX_FLAG (x, used));
2492 RTX_FLAG (x, used) = 1;
2494 /* Now scan the subexpressions recursively. */
2496 format_ptr = GET_RTX_FORMAT (code);
2498 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2500 switch (*format_ptr++)
2503 verify_rtx_sharing (XEXP (x, i), insn);
2507 if (XVEC (x, i) != NULL)
2510 int len = XVECLEN (x, i);
2512 for (j = 0; j < len; j++)
2514 /* We allow sharing of ASM_OPERANDS inside single
2516 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2517 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2519 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2521 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2530 /* Go through all the RTL insn bodies and check that there is no unexpected
2531 sharing in between the subexpressions. */
2534 verify_rtl_sharing (void)
2538 for (p = get_insns (); p; p = NEXT_INSN (p))
2541 reset_used_flags (PATTERN (p));
2542 reset_used_flags (REG_NOTES (p));
2543 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2546 rtx q, sequence = PATTERN (p);
2548 for (i = 0; i < XVECLEN (sequence, 0); i++)
2550 q = XVECEXP (sequence, 0, i);
2551 gcc_assert (INSN_P (q));
2552 reset_used_flags (PATTERN (q));
2553 reset_used_flags (REG_NOTES (q));
2558 for (p = get_insns (); p; p = NEXT_INSN (p))
2561 verify_rtx_sharing (PATTERN (p), p);
2562 verify_rtx_sharing (REG_NOTES (p), p);
2566 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2567 Assumes the mark bits are cleared at entry. */
2570 unshare_all_rtl_in_chain (rtx insn)
2572 for (; insn; insn = NEXT_INSN (insn))
2575 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2576 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2580 /* Go through all virtual stack slots of a function and mark them as
2581 shared. We never replace the DECL_RTLs themselves with a copy,
2582 but expressions mentioned into a DECL_RTL cannot be shared with
2583 expressions in the instruction stream.
2585 Note that reload may convert pseudo registers into memories in-place.
2586 Pseudo registers are always shared, but MEMs never are. Thus if we
2587 reset the used flags on MEMs in the instruction stream, we must set
2588 them again on MEMs that appear in DECL_RTLs. */
2591 set_used_decls (tree blk)
2596 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2597 if (DECL_RTL_SET_P (t))
2598 set_used_flags (DECL_RTL (t));
2600 /* Now process sub-blocks. */
2601 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2605 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2606 Recursively does the same for subexpressions. Uses
2607 copy_rtx_if_shared_1 to reduce stack space. */
2610 copy_rtx_if_shared (rtx orig)
2612 copy_rtx_if_shared_1 (&orig);
2616 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2617 use. Recursively does the same for subexpressions. */
2620 copy_rtx_if_shared_1 (rtx *orig1)
2626 const char *format_ptr;
2630 /* Repeat is used to turn tail-recursion into iteration. */
2637 code = GET_CODE (x);
2639 /* These types may be freely shared. */
2656 /* SCRATCH must be shared because they represent distinct values. */
2659 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2664 if (shared_const_p (x))
2674 /* The chain of insns is not being copied. */
2681 /* This rtx may not be shared. If it has already been seen,
2682 replace it with a copy of itself. */
2684 if (RTX_FLAG (x, used))
2686 x = shallow_copy_rtx (x);
2689 RTX_FLAG (x, used) = 1;
2691 /* Now scan the subexpressions recursively.
2692 We can store any replaced subexpressions directly into X
2693 since we know X is not shared! Any vectors in X
2694 must be copied if X was copied. */
2696 format_ptr = GET_RTX_FORMAT (code);
2697 length = GET_RTX_LENGTH (code);
2700 for (i = 0; i < length; i++)
2702 switch (*format_ptr++)
2706 copy_rtx_if_shared_1 (last_ptr);
2707 last_ptr = &XEXP (x, i);
2711 if (XVEC (x, i) != NULL)
2714 int len = XVECLEN (x, i);
2716 /* Copy the vector iff I copied the rtx and the length
2718 if (copied && len > 0)
2719 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2721 /* Call recursively on all inside the vector. */
2722 for (j = 0; j < len; j++)
2725 copy_rtx_if_shared_1 (last_ptr);
2726 last_ptr = &XVECEXP (x, i, j);
2741 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2742 to look for shared sub-parts. */
2745 reset_used_flags (rtx x)
2749 const char *format_ptr;
2752 /* Repeat is used to turn tail-recursion into iteration. */
2757 code = GET_CODE (x);
2759 /* These types may be freely shared so we needn't do any resetting
2784 /* The chain of insns is not being copied. */
2791 RTX_FLAG (x, used) = 0;
2793 format_ptr = GET_RTX_FORMAT (code);
2794 length = GET_RTX_LENGTH (code);
2796 for (i = 0; i < length; i++)
2798 switch (*format_ptr++)
2806 reset_used_flags (XEXP (x, i));
2810 for (j = 0; j < XVECLEN (x, i); j++)
2811 reset_used_flags (XVECEXP (x, i, j));
2817 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2818 to look for shared sub-parts. */
2821 set_used_flags (rtx x)
2825 const char *format_ptr;
2830 code = GET_CODE (x);
2832 /* These types may be freely shared so we needn't do any resetting
2857 /* The chain of insns is not being copied. */
2864 RTX_FLAG (x, used) = 1;
2866 format_ptr = GET_RTX_FORMAT (code);
2867 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2869 switch (*format_ptr++)
2872 set_used_flags (XEXP (x, i));
2876 for (j = 0; j < XVECLEN (x, i); j++)
2877 set_used_flags (XVECEXP (x, i, j));
2883 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2884 Return X or the rtx for the pseudo reg the value of X was copied into.
2885 OTHER must be valid as a SET_DEST. */
2888 make_safe_from (rtx x, rtx other)
2891 switch (GET_CODE (other))
2894 other = SUBREG_REG (other);
2896 case STRICT_LOW_PART:
2899 other = XEXP (other, 0);
2908 && GET_CODE (x) != SUBREG)
2910 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2911 || reg_mentioned_p (other, x))))
2913 rtx temp = gen_reg_rtx (GET_MODE (x));
2914 emit_move_insn (temp, x);
2920 /* Emission of insns (adding them to the doubly-linked list). */
2922 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2925 get_last_insn_anywhere (void)
2927 struct sequence_stack *stack;
2928 if (get_last_insn ())
2929 return get_last_insn ();
2930 for (stack = seq_stack; stack; stack = stack->next)
2931 if (stack->last != 0)
2936 /* Return the first nonnote insn emitted in current sequence or current
2937 function. This routine looks inside SEQUENCEs. */
2940 get_first_nonnote_insn (void)
2942 rtx insn = get_insns ();
2947 for (insn = next_insn (insn);
2948 insn && NOTE_P (insn);
2949 insn = next_insn (insn))
2953 if (NONJUMP_INSN_P (insn)
2954 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2955 insn = XVECEXP (PATTERN (insn), 0, 0);
2962 /* Return the last nonnote insn emitted in current sequence or current
2963 function. This routine looks inside SEQUENCEs. */
2966 get_last_nonnote_insn (void)
2968 rtx insn = get_last_insn ();
2973 for (insn = previous_insn (insn);
2974 insn && NOTE_P (insn);
2975 insn = previous_insn (insn))
2979 if (NONJUMP_INSN_P (insn)
2980 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2981 insn = XVECEXP (PATTERN (insn), 0,
2982 XVECLEN (PATTERN (insn), 0) - 1);
2989 /* Return the number of actual (non-debug) insns emitted in this
2993 get_max_insn_count (void)
2995 int n = cur_insn_uid;
2997 /* The table size must be stable across -g, to avoid codegen
2998 differences due to debug insns, and not be affected by
2999 -fmin-insn-uid, to avoid excessive table size and to simplify
3000 debugging of -fcompare-debug failures. */
3001 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3002 n -= cur_debug_insn_uid;
3004 n -= MIN_NONDEBUG_INSN_UID;
3010 /* Return the next insn. If it is a SEQUENCE, return the first insn
3014 next_insn (rtx insn)
3018 insn = NEXT_INSN (insn);
3019 if (insn && NONJUMP_INSN_P (insn)
3020 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3021 insn = XVECEXP (PATTERN (insn), 0, 0);
3027 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3031 previous_insn (rtx insn)
3035 insn = PREV_INSN (insn);
3036 if (insn && NONJUMP_INSN_P (insn)
3037 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3038 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3044 /* Return the next insn after INSN that is not a NOTE. This routine does not
3045 look inside SEQUENCEs. */
3048 next_nonnote_insn (rtx insn)
3052 insn = NEXT_INSN (insn);
3053 if (insn == 0 || !NOTE_P (insn))
3060 /* Return the next insn after INSN that is not a NOTE, but stop the
3061 search before we enter another basic block. This routine does not
3062 look inside SEQUENCEs. */
3065 next_nonnote_insn_bb (rtx insn)
3069 insn = NEXT_INSN (insn);
3070 if (insn == 0 || !NOTE_P (insn))
3072 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3079 /* Return the previous insn before INSN that is not a NOTE. This routine does
3080 not look inside SEQUENCEs. */
3083 prev_nonnote_insn (rtx insn)
3087 insn = PREV_INSN (insn);
3088 if (insn == 0 || !NOTE_P (insn))
3095 /* Return the previous insn before INSN that is not a NOTE, but stop
3096 the search before we enter another basic block. This routine does
3097 not look inside SEQUENCEs. */
3100 prev_nonnote_insn_bb (rtx insn)
3104 insn = PREV_INSN (insn);
3105 if (insn == 0 || !NOTE_P (insn))
3107 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3114 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3115 routine does not look inside SEQUENCEs. */
3118 next_nondebug_insn (rtx insn)
3122 insn = NEXT_INSN (insn);
3123 if (insn == 0 || !DEBUG_INSN_P (insn))
3130 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3131 This routine does not look inside SEQUENCEs. */
3134 prev_nondebug_insn (rtx insn)
3138 insn = PREV_INSN (insn);
3139 if (insn == 0 || !DEBUG_INSN_P (insn))
3146 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3147 This routine does not look inside SEQUENCEs. */
3150 next_nonnote_nondebug_insn (rtx insn)
3154 insn = NEXT_INSN (insn);
3155 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3162 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3163 This routine does not look inside SEQUENCEs. */
3166 prev_nonnote_nondebug_insn (rtx insn)
3170 insn = PREV_INSN (insn);
3171 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3178 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3179 or 0, if there is none. This routine does not look inside
3183 next_real_insn (rtx insn)
3187 insn = NEXT_INSN (insn);
3188 if (insn == 0 || INSN_P (insn))
3195 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3196 or 0, if there is none. This routine does not look inside
3200 prev_real_insn (rtx insn)
3204 insn = PREV_INSN (insn);
3205 if (insn == 0 || INSN_P (insn))
3212 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3213 This routine does not look inside SEQUENCEs. */
3216 last_call_insn (void)
3220 for (insn = get_last_insn ();
3221 insn && !CALL_P (insn);
3222 insn = PREV_INSN (insn))
3228 /* Find the next insn after INSN that really does something. This routine
3229 does not look inside SEQUENCEs. After reload this also skips over
3230 standalone USE and CLOBBER insn. */
3233 active_insn_p (const_rtx insn)
3235 return (CALL_P (insn) || JUMP_P (insn)
3236 || (NONJUMP_INSN_P (insn)
3237 && (! reload_completed
3238 || (GET_CODE (PATTERN (insn)) != USE
3239 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3243 next_active_insn (rtx insn)
3247 insn = NEXT_INSN (insn);
3248 if (insn == 0 || active_insn_p (insn))
3255 /* Find the last insn before INSN that really does something. This routine
3256 does not look inside SEQUENCEs. After reload this also skips over
3257 standalone USE and CLOBBER insn. */
3260 prev_active_insn (rtx insn)
3264 insn = PREV_INSN (insn);
3265 if (insn == 0 || active_insn_p (insn))
3272 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3275 next_label (rtx insn)
3279 insn = NEXT_INSN (insn);
3280 if (insn == 0 || LABEL_P (insn))
3287 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3290 prev_label (rtx insn)
3294 insn = PREV_INSN (insn);
3295 if (insn == 0 || LABEL_P (insn))
3302 /* Return the last label to mark the same position as LABEL. Return null
3303 if LABEL itself is null. */
3306 skip_consecutive_labels (rtx label)
3310 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3318 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3319 and REG_CC_USER notes so we can find it. */
3322 link_cc0_insns (rtx insn)
3324 rtx user = next_nonnote_insn (insn);
3326 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3327 user = XVECEXP (PATTERN (user), 0, 0);
3329 add_reg_note (user, REG_CC_SETTER, insn);
3330 add_reg_note (insn, REG_CC_USER, user);
3333 /* Return the next insn that uses CC0 after INSN, which is assumed to
3334 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3335 applied to the result of this function should yield INSN).
3337 Normally, this is simply the next insn. However, if a REG_CC_USER note
3338 is present, it contains the insn that uses CC0.
3340 Return 0 if we can't find the insn. */
3343 next_cc0_user (rtx insn)
3345 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3348 return XEXP (note, 0);
3350 insn = next_nonnote_insn (insn);
3351 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3352 insn = XVECEXP (PATTERN (insn), 0, 0);
3354 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3360 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3361 note, it is the previous insn. */
3364 prev_cc0_setter (rtx insn)
3366 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3369 return XEXP (note, 0);
3371 insn = prev_nonnote_insn (insn);
3372 gcc_assert (sets_cc0_p (PATTERN (insn)));
3379 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3382 find_auto_inc (rtx *xp, void *data)
3385 rtx reg = (rtx) data;
3387 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3390 switch (GET_CODE (x))
3398 if (rtx_equal_p (reg, XEXP (x, 0)))
3409 /* Increment the label uses for all labels present in rtx. */
3412 mark_label_nuses (rtx x)
3418 code = GET_CODE (x);
3419 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3420 LABEL_NUSES (XEXP (x, 0))++;
3422 fmt = GET_RTX_FORMAT (code);
3423 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3426 mark_label_nuses (XEXP (x, i));
3427 else if (fmt[i] == 'E')
3428 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3429 mark_label_nuses (XVECEXP (x, i, j));
3434 /* Try splitting insns that can be split for better scheduling.
3435 PAT is the pattern which might split.
3436 TRIAL is the insn providing PAT.
3437 LAST is nonzero if we should return the last insn of the sequence produced.
3439 If this routine succeeds in splitting, it returns the first or last
3440 replacement insn depending on the value of LAST. Otherwise, it
3441 returns TRIAL. If the insn to be returned can be split, it will be. */
3444 try_split (rtx pat, rtx trial, int last)
3446 rtx before = PREV_INSN (trial);
3447 rtx after = NEXT_INSN (trial);
3448 int has_barrier = 0;
3451 rtx insn_last, insn;
3454 /* We're not good at redistributing frame information. */
3455 if (RTX_FRAME_RELATED_P (trial))
3458 if (any_condjump_p (trial)
3459 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3460 split_branch_probability = INTVAL (XEXP (note, 0));
3461 probability = split_branch_probability;
3463 seq = split_insns (pat, trial);
3465 split_branch_probability = -1;
3467 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3468 We may need to handle this specially. */
3469 if (after && BARRIER_P (after))
3472 after = NEXT_INSN (after);
3478 /* Avoid infinite loop if any insn of the result matches
3479 the original pattern. */
3483 if (INSN_P (insn_last)
3484 && rtx_equal_p (PATTERN (insn_last), pat))
3486 if (!NEXT_INSN (insn_last))
3488 insn_last = NEXT_INSN (insn_last);
3491 /* We will be adding the new sequence to the function. The splitters
3492 may have introduced invalid RTL sharing, so unshare the sequence now. */
3493 unshare_all_rtl_in_chain (seq);
3496 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3500 mark_jump_label (PATTERN (insn), insn, 0);
3502 if (probability != -1
3503 && any_condjump_p (insn)
3504 && !find_reg_note (insn, REG_BR_PROB, 0))
3506 /* We can preserve the REG_BR_PROB notes only if exactly
3507 one jump is created, otherwise the machine description
3508 is responsible for this step using
3509 split_branch_probability variable. */
3510 gcc_assert (njumps == 1);
3511 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3516 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3517 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3520 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3523 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3526 *p = CALL_INSN_FUNCTION_USAGE (trial);
3527 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3529 /* Update the debug information for the CALL_INSN. */
3530 if (flag_enable_icf_debug)
3531 (*debug_hooks->copy_call_info) (trial, insn);
3535 /* Copy notes, particularly those related to the CFG. */
3536 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3538 switch (REG_NOTE_KIND (note))
3541 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3546 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3549 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3553 case REG_NON_LOCAL_GOTO:
3554 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3557 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3563 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3565 rtx reg = XEXP (note, 0);
3566 if (!FIND_REG_INC_NOTE (insn, reg)
3567 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3568 add_reg_note (insn, REG_INC, reg);
3578 /* If there are LABELS inside the split insns increment the
3579 usage count so we don't delete the label. */
3583 while (insn != NULL_RTX)
3585 /* JUMP_P insns have already been "marked" above. */
3586 if (NONJUMP_INSN_P (insn))
3587 mark_label_nuses (PATTERN (insn));
3589 insn = PREV_INSN (insn);
3593 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3595 delete_insn (trial);
3597 emit_barrier_after (tem);
3599 /* Recursively call try_split for each new insn created; by the
3600 time control returns here that insn will be fully split, so
3601 set LAST and continue from the insn after the one returned.
3602 We can't use next_active_insn here since AFTER may be a note.
3603 Ignore deleted insns, which can be occur if not optimizing. */
3604 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3605 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3606 tem = try_split (PATTERN (tem), tem, 1);
3608 /* Return either the first or the last insn, depending on which was
3611 ? (after ? PREV_INSN (after) : get_last_insn ())
3612 : NEXT_INSN (before);
3615 /* Make and return an INSN rtx, initializing all its slots.
3616 Store PATTERN in the pattern slots. */
3619 make_insn_raw (rtx pattern)
3623 insn = rtx_alloc (INSN);
3625 INSN_UID (insn) = cur_insn_uid++;
3626 PATTERN (insn) = pattern;
3627 INSN_CODE (insn) = -1;
3628 REG_NOTES (insn) = NULL;
3629 INSN_LOCATOR (insn) = curr_insn_locator ();
3630 BLOCK_FOR_INSN (insn) = NULL;
3632 #ifdef ENABLE_RTL_CHECKING
3635 && (returnjump_p (insn)
3636 || (GET_CODE (insn) == SET
3637 && SET_DEST (insn) == pc_rtx)))
3639 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3647 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3650 make_debug_insn_raw (rtx pattern)
3654 insn = rtx_alloc (DEBUG_INSN);
3655 INSN_UID (insn) = cur_debug_insn_uid++;
3656 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3657 INSN_UID (insn) = cur_insn_uid++;
3659 PATTERN (insn) = pattern;
3660 INSN_CODE (insn) = -1;
3661 REG_NOTES (insn) = NULL;
3662 INSN_LOCATOR (insn) = curr_insn_locator ();
3663 BLOCK_FOR_INSN (insn) = NULL;
3668 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3671 make_jump_insn_raw (rtx pattern)
3675 insn = rtx_alloc (JUMP_INSN);
3676 INSN_UID (insn) = cur_insn_uid++;
3678 PATTERN (insn) = pattern;
3679 INSN_CODE (insn) = -1;
3680 REG_NOTES (insn) = NULL;
3681 JUMP_LABEL (insn) = NULL;
3682 INSN_LOCATOR (insn) = curr_insn_locator ();
3683 BLOCK_FOR_INSN (insn) = NULL;
3688 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3691 make_call_insn_raw (rtx pattern)
3695 insn = rtx_alloc (CALL_INSN);
3696 INSN_UID (insn) = cur_insn_uid++;
3698 PATTERN (insn) = pattern;
3699 INSN_CODE (insn) = -1;
3700 REG_NOTES (insn) = NULL;
3701 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3702 INSN_LOCATOR (insn) = curr_insn_locator ();
3703 BLOCK_FOR_INSN (insn) = NULL;
3708 /* Add INSN to the end of the doubly-linked list.
3709 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3714 PREV_INSN (insn) = get_last_insn();
3715 NEXT_INSN (insn) = 0;
3717 if (NULL != get_last_insn())
3718 NEXT_INSN (get_last_insn ()) = insn;
3720 if (NULL == get_insns ())
3721 set_first_insn (insn);
3723 set_last_insn (insn);
3726 /* Add INSN into the doubly-linked list after insn AFTER. This and
3727 the next should be the only functions called to insert an insn once
3728 delay slots have been filled since only they know how to update a
3732 add_insn_after (rtx insn, rtx after, basic_block bb)
3734 rtx next = NEXT_INSN (after);
3736 gcc_assert (!optimize || !INSN_DELETED_P (after));
3738 NEXT_INSN (insn) = next;
3739 PREV_INSN (insn) = after;
3743 PREV_INSN (next) = insn;
3744 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3745 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3747 else if (get_last_insn () == after)
3748 set_last_insn (insn);
3751 struct sequence_stack *stack = seq_stack;
3752 /* Scan all pending sequences too. */
3753 for (; stack; stack = stack->next)
3754 if (after == stack->last)
3763 if (!BARRIER_P (after)
3764 && !BARRIER_P (insn)
3765 && (bb = BLOCK_FOR_INSN (after)))
3767 set_block_for_insn (insn, bb);
3769 df_insn_rescan (insn);
3770 /* Should not happen as first in the BB is always
3771 either NOTE or LABEL. */
3772 if (BB_END (bb) == after
3773 /* Avoid clobbering of structure when creating new BB. */
3774 && !BARRIER_P (insn)
3775 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3779 NEXT_INSN (after) = insn;
3780 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3782 rtx sequence = PATTERN (after);
3783 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3787 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3788 the previous should be the only functions called to insert an insn
3789 once delay slots have been filled since only they know how to
3790 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3794 add_insn_before (rtx insn, rtx before, basic_block bb)
3796 rtx prev = PREV_INSN (before);
3798 gcc_assert (!optimize || !INSN_DELETED_P (before));
3800 PREV_INSN (insn) = prev;
3801 NEXT_INSN (insn) = before;
3805 NEXT_INSN (prev) = insn;
3806 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3808 rtx sequence = PATTERN (prev);
3809 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3812 else if (get_insns () == before)
3813 set_first_insn (insn);
3816 struct sequence_stack *stack = seq_stack;
3817 /* Scan all pending sequences too. */
3818 for (; stack; stack = stack->next)
3819 if (before == stack->first)
3821 stack->first = insn;
3829 && !BARRIER_P (before)
3830 && !BARRIER_P (insn))
3831 bb = BLOCK_FOR_INSN (before);
3835 set_block_for_insn (insn, bb);
3837 df_insn_rescan (insn);
3838 /* Should not happen as first in the BB is always either NOTE or
3840 gcc_assert (BB_HEAD (bb) != insn
3841 /* Avoid clobbering of structure when creating new BB. */
3843 || NOTE_INSN_BASIC_BLOCK_P (insn));
3846 PREV_INSN (before) = insn;
3847 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3848 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3852 /* Replace insn with an deleted instruction note. */
3855 set_insn_deleted (rtx insn)
3857 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3858 PUT_CODE (insn, NOTE);
3859 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3863 /* Remove an insn from its doubly-linked list. This function knows how
3864 to handle sequences. */
3866 remove_insn (rtx insn)
3868 rtx next = NEXT_INSN (insn);
3869 rtx prev = PREV_INSN (insn);
3872 /* Later in the code, the block will be marked dirty. */
3873 df_insn_delete (NULL, INSN_UID (insn));
3877 NEXT_INSN (prev) = next;
3878 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3880 rtx sequence = PATTERN (prev);
3881 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3884 else if (get_insns () == insn)
3887 PREV_INSN (next) = NULL;
3888 set_first_insn (next);
3892 struct sequence_stack *stack = seq_stack;
3893 /* Scan all pending sequences too. */
3894 for (; stack; stack = stack->next)
3895 if (insn == stack->first)
3897 stack->first = next;
3906 PREV_INSN (next) = prev;
3907 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3908 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3910 else if (get_last_insn () == insn)
3911 set_last_insn (prev);
3914 struct sequence_stack *stack = seq_stack;
3915 /* Scan all pending sequences too. */
3916 for (; stack; stack = stack->next)
3917 if (insn == stack->last)
3925 if (!BARRIER_P (insn)
3926 && (bb = BLOCK_FOR_INSN (insn)))
3929 df_set_bb_dirty (bb);
3930 if (BB_HEAD (bb) == insn)
3932 /* Never ever delete the basic block note without deleting whole
3934 gcc_assert (!NOTE_P (insn));
3935 BB_HEAD (bb) = next;
3937 if (BB_END (bb) == insn)
3942 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3945 add_function_usage_to (rtx call_insn, rtx call_fusage)
3947 gcc_assert (call_insn && CALL_P (call_insn));
3949 /* Put the register usage information on the CALL. If there is already
3950 some usage information, put ours at the end. */
3951 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3955 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3956 link = XEXP (link, 1))
3959 XEXP (link, 1) = call_fusage;
3962 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3965 /* Delete all insns made since FROM.
3966 FROM becomes the new last instruction. */
3969 delete_insns_since (rtx from)
3974 NEXT_INSN (from) = 0;
3975 set_last_insn (from);
3978 /* This function is deprecated, please use sequences instead.
3980 Move a consecutive bunch of insns to a different place in the chain.
3981 The insns to be moved are those between FROM and TO.
3982 They are moved to a new position after the insn AFTER.
3983 AFTER must not be FROM or TO or any insn in between.
3985 This function does not know about SEQUENCEs and hence should not be
3986 called after delay-slot filling has been done. */
3989 reorder_insns_nobb (rtx from, rtx to, rtx after)
3991 /* Splice this bunch out of where it is now. */
3992 if (PREV_INSN (from))
3993 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3995 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3996 if (get_last_insn () == to)
3997 set_last_insn (PREV_INSN (from));
3998 if (get_insns () == from)
3999 set_first_insn (NEXT_INSN (to));
4001 /* Make the new neighbors point to it and it to them. */
4002 if (NEXT_INSN (after))
4003 PREV_INSN (NEXT_INSN (after)) = to;
4005 NEXT_INSN (to) = NEXT_INSN (after);
4006 PREV_INSN (from) = after;
4007 NEXT_INSN (after) = from;
4008 if (after == get_last_insn())
4012 /* Same as function above, but take care to update BB boundaries. */
4014 reorder_insns (rtx from, rtx to, rtx after)
4016 rtx prev = PREV_INSN (from);
4017 basic_block bb, bb2;
4019 reorder_insns_nobb (from, to, after);
4021 if (!BARRIER_P (after)
4022 && (bb = BLOCK_FOR_INSN (after)))
4025 df_set_bb_dirty (bb);
4027 if (!BARRIER_P (from)
4028 && (bb2 = BLOCK_FOR_INSN (from)))
4030 if (BB_END (bb2) == to)
4031 BB_END (bb2) = prev;
4032 df_set_bb_dirty (bb2);
4035 if (BB_END (bb) == after)
4038 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4040 df_insn_change_bb (x, bb);
4045 /* Emit insn(s) of given code and pattern
4046 at a specified place within the doubly-linked list.
4048 All of the emit_foo global entry points accept an object
4049 X which is either an insn list or a PATTERN of a single
4052 There are thus a few canonical ways to generate code and
4053 emit it at a specific place in the instruction stream. For
4054 example, consider the instruction named SPOT and the fact that
4055 we would like to emit some instructions before SPOT. We might
4059 ... emit the new instructions ...
4060 insns_head = get_insns ();
4063 emit_insn_before (insns_head, SPOT);
4065 It used to be common to generate SEQUENCE rtl instead, but that
4066 is a relic of the past which no longer occurs. The reason is that
4067 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4068 generated would almost certainly die right after it was created. */
4070 /* Make X be output before the instruction BEFORE. */
4073 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4078 gcc_assert (before);
4083 switch (GET_CODE (x))
4095 rtx next = NEXT_INSN (insn);
4096 add_insn_before (insn, before, bb);
4102 #ifdef ENABLE_RTL_CHECKING
4109 last = make_insn_raw (x);
4110 add_insn_before (last, before, bb);
4117 /* Make an instruction with body X and code JUMP_INSN
4118 and output it before the instruction BEFORE. */
4121 emit_jump_insn_before_noloc (rtx x, rtx before)
4123 rtx insn, last = NULL_RTX;
4125 gcc_assert (before);
4127 switch (GET_CODE (x))
4139 rtx next = NEXT_INSN (insn);
4140 add_insn_before (insn, before, NULL);
4146 #ifdef ENABLE_RTL_CHECKING
4153 last = make_jump_insn_raw (x);
4154 add_insn_before (last, before, NULL);
4161 /* Make an instruction with body X and code CALL_INSN
4162 and output it before the instruction BEFORE. */
4165 emit_call_insn_before_noloc (rtx x, rtx before)
4167 rtx last = NULL_RTX, insn;
4169 gcc_assert (before);
4171 switch (GET_CODE (x))
4183 rtx next = NEXT_INSN (insn);
4184 add_insn_before (insn, before, NULL);
4190 #ifdef ENABLE_RTL_CHECKING
4197 last = make_call_insn_raw (x);
4198 add_insn_before (last, before, NULL);
4205 /* Make an instruction with body X and code DEBUG_INSN
4206 and output it before the instruction BEFORE. */
4209 emit_debug_insn_before_noloc (rtx x, rtx before)
4211 rtx last = NULL_RTX, insn;
4213 gcc_assert (before);
4215 switch (GET_CODE (x))
4227 rtx next = NEXT_INSN (insn);
4228 add_insn_before (insn, before, NULL);
4234 #ifdef ENABLE_RTL_CHECKING
4241 last = make_debug_insn_raw (x);
4242 add_insn_before (last, before, NULL);
4249 /* Make an insn of code BARRIER
4250 and output it before the insn BEFORE. */
4253 emit_barrier_before (rtx before)
4255 rtx insn = rtx_alloc (BARRIER);
4257 INSN_UID (insn) = cur_insn_uid++;
4259 add_insn_before (insn, before, NULL);
4263 /* Emit the label LABEL before the insn BEFORE. */
4266 emit_label_before (rtx label, rtx before)
4268 /* This can be called twice for the same label as a result of the
4269 confusion that follows a syntax error! So make it harmless. */
4270 if (INSN_UID (label) == 0)
4272 INSN_UID (label) = cur_insn_uid++;
4273 add_insn_before (label, before, NULL);
4279 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4282 emit_note_before (enum insn_note subtype, rtx before)
4284 rtx note = rtx_alloc (NOTE);
4285 INSN_UID (note) = cur_insn_uid++;
4286 NOTE_KIND (note) = subtype;
4287 BLOCK_FOR_INSN (note) = NULL;
4288 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4290 add_insn_before (note, before, NULL);
4294 /* Helper for emit_insn_after, handles lists of instructions
4298 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4302 if (!bb && !BARRIER_P (after))
4303 bb = BLOCK_FOR_INSN (after);
4307 df_set_bb_dirty (bb);
4308 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4309 if (!BARRIER_P (last))
4311 set_block_for_insn (last, bb);
4312 df_insn_rescan (last);
4314 if (!BARRIER_P (last))
4316 set_block_for_insn (last, bb);
4317 df_insn_rescan (last);
4319 if (BB_END (bb) == after)
4323 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4326 after_after = NEXT_INSN (after);
4328 NEXT_INSN (after) = first;
4329 PREV_INSN (first) = after;
4330 NEXT_INSN (last) = after_after;
4332 PREV_INSN (after_after) = last;
4334 if (after == get_last_insn())
4335 set_last_insn (last);
4340 /* Make X be output after the insn AFTER and set the BB of insn. If
4341 BB is NULL, an attempt is made to infer the BB from AFTER. */
4344 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4353 switch (GET_CODE (x))
4362 last = emit_insn_after_1 (x, after, bb);
4365 #ifdef ENABLE_RTL_CHECKING
4372 last = make_insn_raw (x);
4373 add_insn_after (last, after, bb);
4381 /* Make an insn of code JUMP_INSN with body X
4382 and output it after the insn AFTER. */
4385 emit_jump_insn_after_noloc (rtx x, rtx after)
4391 switch (GET_CODE (x))
4400 last = emit_insn_after_1 (x, after, NULL);
4403 #ifdef ENABLE_RTL_CHECKING
4410 last = make_jump_insn_raw (x);
4411 add_insn_after (last, after, NULL);
4418 /* Make an instruction with body X and code CALL_INSN
4419 and output it after the instruction AFTER. */
4422 emit_call_insn_after_noloc (rtx x, rtx after)
4428 switch (GET_CODE (x))
4437 last = emit_insn_after_1 (x, after, NULL);
4440 #ifdef ENABLE_RTL_CHECKING
4447 last = make_call_insn_raw (x);
4448 add_insn_after (last, after, NULL);
4455 /* Make an instruction with body X and code CALL_INSN
4456 and output it after the instruction AFTER. */
4459 emit_debug_insn_after_noloc (rtx x, rtx after)
4465 switch (GET_CODE (x))
4474 last = emit_insn_after_1 (x, after, NULL);
4477 #ifdef ENABLE_RTL_CHECKING
4484 last = make_debug_insn_raw (x);
4485 add_insn_after (last, after, NULL);
4492 /* Make an insn of code BARRIER
4493 and output it after the insn AFTER. */
4496 emit_barrier_after (rtx after)
4498 rtx insn = rtx_alloc (BARRIER);
4500 INSN_UID (insn) = cur_insn_uid++;
4502 add_insn_after (insn, after, NULL);
4506 /* Emit the label LABEL after the insn AFTER. */
4509 emit_label_after (rtx label, rtx after)
4511 /* This can be called twice for the same label
4512 as a result of the confusion that follows a syntax error!
4513 So make it harmless. */
4514 if (INSN_UID (label) == 0)
4516 INSN_UID (label) = cur_insn_uid++;
4517 add_insn_after (label, after, NULL);
4523 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4526 emit_note_after (enum insn_note subtype, rtx after)
4528 rtx note = rtx_alloc (NOTE);
4529 INSN_UID (note) = cur_insn_uid++;
4530 NOTE_KIND (note) = subtype;
4531 BLOCK_FOR_INSN (note) = NULL;
4532 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4533 add_insn_after (note, after, NULL);
4537 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4539 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4541 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4543 if (pattern == NULL_RTX || !loc)
4546 after = NEXT_INSN (after);
4549 if (active_insn_p (after) && !INSN_LOCATOR (after))
4550 INSN_LOCATOR (after) = loc;
4553 after = NEXT_INSN (after);
4558 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4560 emit_insn_after (rtx pattern, rtx after)
4564 while (DEBUG_INSN_P (prev))
4565 prev = PREV_INSN (prev);
4568 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4570 return emit_insn_after_noloc (pattern, after, NULL);
4573 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4575 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4577 rtx last = emit_jump_insn_after_noloc (pattern, after);
4579 if (pattern == NULL_RTX || !loc)
4582 after = NEXT_INSN (after);
4585 if (active_insn_p (after) && !INSN_LOCATOR (after))
4586 INSN_LOCATOR (after) = loc;
4589 after = NEXT_INSN (after);
4594 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4596 emit_jump_insn_after (rtx pattern, rtx after)
4600 while (DEBUG_INSN_P (prev))
4601 prev = PREV_INSN (prev);
4604 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4606 return emit_jump_insn_after_noloc (pattern, after);
4609 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4611 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4613 rtx last = emit_call_insn_after_noloc (pattern, after);
4615 if (pattern == NULL_RTX || !loc)
4618 after = NEXT_INSN (after);
4621 if (active_insn_p (after) && !INSN_LOCATOR (after))
4622 INSN_LOCATOR (after) = loc;
4625 after = NEXT_INSN (after);
4630 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4632 emit_call_insn_after (rtx pattern, rtx after)
4636 while (DEBUG_INSN_P (prev))
4637 prev = PREV_INSN (prev);
4640 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4642 return emit_call_insn_after_noloc (pattern, after);
4645 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4647 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4649 rtx last = emit_debug_insn_after_noloc (pattern, after);
4651 if (pattern == NULL_RTX || !loc)
4654 after = NEXT_INSN (after);
4657 if (active_insn_p (after) && !INSN_LOCATOR (after))
4658 INSN_LOCATOR (after) = loc;
4661 after = NEXT_INSN (after);
4666 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4668 emit_debug_insn_after (rtx pattern, rtx after)
4671 return emit_debug_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4673 return emit_debug_insn_after_noloc (pattern, after);
4676 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4678 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4680 rtx first = PREV_INSN (before);
4681 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4683 if (pattern == NULL_RTX || !loc)
4687 first = get_insns ();
4689 first = NEXT_INSN (first);
4692 if (active_insn_p (first) && !INSN_LOCATOR (first))
4693 INSN_LOCATOR (first) = loc;
4696 first = NEXT_INSN (first);
4701 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4703 emit_insn_before (rtx pattern, rtx before)
4707 while (DEBUG_INSN_P (next))
4708 next = PREV_INSN (next);
4711 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4713 return emit_insn_before_noloc (pattern, before, NULL);
4716 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4718 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4720 rtx first = PREV_INSN (before);
4721 rtx last = emit_jump_insn_before_noloc (pattern, before);
4723 if (pattern == NULL_RTX)
4726 first = NEXT_INSN (first);
4729 if (active_insn_p (first) && !INSN_LOCATOR (first))
4730 INSN_LOCATOR (first) = loc;
4733 first = NEXT_INSN (first);
4738 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4740 emit_jump_insn_before (rtx pattern, rtx before)
4744 while (DEBUG_INSN_P (next))
4745 next = PREV_INSN (next);
4748 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4750 return emit_jump_insn_before_noloc (pattern, before);
4753 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4755 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4757 rtx first = PREV_INSN (before);
4758 rtx last = emit_call_insn_before_noloc (pattern, before);
4760 if (pattern == NULL_RTX)
4763 first = NEXT_INSN (first);
4766 if (active_insn_p (first) && !INSN_LOCATOR (first))
4767 INSN_LOCATOR (first) = loc;
4770 first = NEXT_INSN (first);
4775 /* like emit_call_insn_before_noloc,
4776 but set insn_locator according to before. */
4778 emit_call_insn_before (rtx pattern, rtx before)
4782 while (DEBUG_INSN_P (next))
4783 next = PREV_INSN (next);
4786 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4788 return emit_call_insn_before_noloc (pattern, before);
4791 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4793 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4795 rtx first = PREV_INSN (before);
4796 rtx last = emit_debug_insn_before_noloc (pattern, before);
4798 if (pattern == NULL_RTX)
4801 first = NEXT_INSN (first);
4804 if (active_insn_p (first) && !INSN_LOCATOR (first))
4805 INSN_LOCATOR (first) = loc;
4808 first = NEXT_INSN (first);
4813 /* like emit_debug_insn_before_noloc,
4814 but set insn_locator according to before. */
4816 emit_debug_insn_before (rtx pattern, rtx before)
4818 if (INSN_P (before))
4819 return emit_debug_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4821 return emit_debug_insn_before_noloc (pattern, before);
4824 /* Take X and emit it at the end of the doubly-linked
4827 Returns the last insn emitted. */
4832 rtx last = get_last_insn();
4838 switch (GET_CODE (x))
4850 rtx next = NEXT_INSN (insn);
4857 #ifdef ENABLE_RTL_CHECKING
4864 last = make_insn_raw (x);
4872 /* Make an insn of code DEBUG_INSN with pattern X
4873 and add it to the end of the doubly-linked list. */
4876 emit_debug_insn (rtx x)
4878 rtx last = get_last_insn();
4884 switch (GET_CODE (x))
4896 rtx next = NEXT_INSN (insn);
4903 #ifdef ENABLE_RTL_CHECKING
4910 last = make_debug_insn_raw (x);
4918 /* Make an insn of code JUMP_INSN with pattern X
4919 and add it to the end of the doubly-linked list. */
4922 emit_jump_insn (rtx x)
4924 rtx last = NULL_RTX, insn;
4926 switch (GET_CODE (x))
4938 rtx next = NEXT_INSN (insn);
4945 #ifdef ENABLE_RTL_CHECKING
4952 last = make_jump_insn_raw (x);
4960 /* Make an insn of code CALL_INSN with pattern X
4961 and add it to the end of the doubly-linked list. */
4964 emit_call_insn (rtx x)
4968 switch (GET_CODE (x))
4977 insn = emit_insn (x);
4980 #ifdef ENABLE_RTL_CHECKING
4987 insn = make_call_insn_raw (x);
4995 /* Add the label LABEL to the end of the doubly-linked list. */
4998 emit_label (rtx label)
5000 /* This can be called twice for the same label
5001 as a result of the confusion that follows a syntax error!
5002 So make it harmless. */
5003 if (INSN_UID (label) == 0)
5005 INSN_UID (label) = cur_insn_uid++;
5011 /* Make an insn of code BARRIER
5012 and add it to the end of the doubly-linked list. */
5017 rtx barrier = rtx_alloc (BARRIER);
5018 INSN_UID (barrier) = cur_insn_uid++;
5023 /* Emit a copy of note ORIG. */
5026 emit_note_copy (rtx orig)
5030 note = rtx_alloc (NOTE);
5032 INSN_UID (note) = cur_insn_uid++;
5033 NOTE_DATA (note) = NOTE_DATA (orig);
5034 NOTE_KIND (note) = NOTE_KIND (orig);
5035 BLOCK_FOR_INSN (note) = NULL;
5041 /* Make an insn of code NOTE or type NOTE_NO
5042 and add it to the end of the doubly-linked list. */
5045 emit_note (enum insn_note kind)
5049 note = rtx_alloc (NOTE);
5050 INSN_UID (note) = cur_insn_uid++;
5051 NOTE_KIND (note) = kind;
5052 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
5053 BLOCK_FOR_INSN (note) = NULL;
5058 /* Emit a clobber of lvalue X. */
5061 emit_clobber (rtx x)
5063 /* CONCATs should not appear in the insn stream. */
5064 if (GET_CODE (x) == CONCAT)
5066 emit_clobber (XEXP (x, 0));
5067 return emit_clobber (XEXP (x, 1));
5069 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5072 /* Return a sequence of insns to clobber lvalue X. */
5086 /* Emit a use of rvalue X. */
5091 /* CONCATs should not appear in the insn stream. */
5092 if (GET_CODE (x) == CONCAT)
5094 emit_use (XEXP (x, 0));
5095 return emit_use (XEXP (x, 1));
5097 return emit_insn (gen_rtx_USE (VOIDmode, x));
5100 /* Return a sequence of insns to use rvalue X. */
5114 /* Cause next statement to emit a line note even if the line number
5118 force_next_line_note (void)
5123 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5124 note of this type already exists, remove it first. */
5127 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5129 rtx note = find_reg_note (insn, kind, NULL_RTX);
5135 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5136 has multiple sets (some callers assume single_set
5137 means the insn only has one set, when in fact it
5138 means the insn only has one * useful * set). */
5139 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
5145 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5146 It serves no useful purpose and breaks eliminate_regs. */
5147 if (GET_CODE (datum) == ASM_OPERANDS)
5152 XEXP (note, 0) = datum;
5153 df_notes_rescan (insn);
5161 XEXP (note, 0) = datum;
5167 add_reg_note (insn, kind, datum);
5173 df_notes_rescan (insn);
5179 return REG_NOTES (insn);
5182 /* Return an indication of which type of insn should have X as a body.
5183 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5185 static enum rtx_code
5186 classify_insn (rtx x)
5190 if (GET_CODE (x) == CALL)
5192 if (GET_CODE (x) == RETURN)
5194 if (GET_CODE (x) == SET)
5196 if (SET_DEST (x) == pc_rtx)
5198 else if (GET_CODE (SET_SRC (x)) == CALL)
5203 if (GET_CODE (x) == PARALLEL)
5206 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5207 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5209 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5210 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5212 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5213 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5219 /* Emit the rtl pattern X as an appropriate kind of insn.
5220 If X is a label, it is simply added into the insn chain. */
5225 enum rtx_code code = classify_insn (x);
5230 return emit_label (x);
5232 return emit_insn (x);
5235 rtx insn = emit_jump_insn (x);
5236 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5237 return emit_barrier ();
5241 return emit_call_insn (x);
5243 return emit_debug_insn (x);
5249 /* Space for free sequence stack entries. */
5250 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5252 /* Begin emitting insns to a sequence. If this sequence will contain
5253 something that might cause the compiler to pop arguments to function
5254 calls (because those pops have previously been deferred; see
5255 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5256 before calling this function. That will ensure that the deferred
5257 pops are not accidentally emitted in the middle of this sequence. */
5260 start_sequence (void)
5262 struct sequence_stack *tem;
5264 if (free_sequence_stack != NULL)
5266 tem = free_sequence_stack;
5267 free_sequence_stack = tem->next;
5270 tem = ggc_alloc_sequence_stack ();
5272 tem->next = seq_stack;
5273 tem->first = get_insns ();
5274 tem->last = get_last_insn ();
5282 /* Set up the insn chain starting with FIRST as the current sequence,
5283 saving the previously current one. See the documentation for
5284 start_sequence for more information about how to use this function. */
5287 push_to_sequence (rtx first)
5293 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5295 set_first_insn (first);
5296 set_last_insn (last);
5299 /* Like push_to_sequence, but take the last insn as an argument to avoid
5300 looping through the list. */
5303 push_to_sequence2 (rtx first, rtx last)
5307 set_first_insn (first);
5308 set_last_insn (last);
5311 /* Set up the outer-level insn chain
5312 as the current sequence, saving the previously current one. */
5315 push_topmost_sequence (void)
5317 struct sequence_stack *stack, *top = NULL;
5321 for (stack = seq_stack; stack; stack = stack->next)
5324 set_first_insn (top->first);
5325 set_last_insn (top->last);
5328 /* After emitting to the outer-level insn chain, update the outer-level
5329 insn chain, and restore the previous saved state. */
5332 pop_topmost_sequence (void)
5334 struct sequence_stack *stack, *top = NULL;
5336 for (stack = seq_stack; stack; stack = stack->next)
5339 top->first = get_insns ();
5340 top->last = get_last_insn ();
5345 /* After emitting to a sequence, restore previous saved state.
5347 To get the contents of the sequence just made, you must call
5348 `get_insns' *before* calling here.
5350 If the compiler might have deferred popping arguments while
5351 generating this sequence, and this sequence will not be immediately
5352 inserted into the instruction stream, use do_pending_stack_adjust
5353 before calling get_insns. That will ensure that the deferred
5354 pops are inserted into this sequence, and not into some random
5355 location in the instruction stream. See INHIBIT_DEFER_POP for more
5356 information about deferred popping of arguments. */
5361 struct sequence_stack *tem = seq_stack;
5363 set_first_insn (tem->first);
5364 set_last_insn (tem->last);
5365 seq_stack = tem->next;
5367 memset (tem, 0, sizeof (*tem));
5368 tem->next = free_sequence_stack;
5369 free_sequence_stack = tem;
5372 /* Return 1 if currently emitting into a sequence. */
5375 in_sequence_p (void)
5377 return seq_stack != 0;
5380 /* Put the various virtual registers into REGNO_REG_RTX. */
5383 init_virtual_regs (void)
5385 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5386 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5387 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5388 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5389 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5393 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5394 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5395 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5396 static int copy_insn_n_scratches;
5398 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5399 copied an ASM_OPERANDS.
5400 In that case, it is the original input-operand vector. */
5401 static rtvec orig_asm_operands_vector;
5403 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5404 copied an ASM_OPERANDS.
5405 In that case, it is the copied input-operand vector. */
5406 static rtvec copy_asm_operands_vector;
5408 /* Likewise for the constraints vector. */
5409 static rtvec orig_asm_constraints_vector;
5410 static rtvec copy_asm_constraints_vector;
5412 /* Recursively create a new copy of an rtx for copy_insn.
5413 This function differs from copy_rtx in that it handles SCRATCHes and
5414 ASM_OPERANDs properly.
5415 Normally, this function is not used directly; use copy_insn as front end.
5416 However, you could first copy an insn pattern with copy_insn and then use
5417 this function afterwards to properly copy any REG_NOTEs containing
5421 copy_insn_1 (rtx orig)
5426 const char *format_ptr;
5431 code = GET_CODE (orig);
5446 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5451 for (i = 0; i < copy_insn_n_scratches; i++)
5452 if (copy_insn_scratch_in[i] == orig)
5453 return copy_insn_scratch_out[i];
5457 if (shared_const_p (orig))
5461 /* A MEM with a constant address is not sharable. The problem is that
5462 the constant address may need to be reloaded. If the mem is shared,
5463 then reloading one copy of this mem will cause all copies to appear
5464 to have been reloaded. */
5470 /* Copy the various flags, fields, and other information. We assume
5471 that all fields need copying, and then clear the fields that should
5472 not be copied. That is the sensible default behavior, and forces
5473 us to explicitly document why we are *not* copying a flag. */
5474 copy = shallow_copy_rtx (orig);
5476 /* We do not copy the USED flag, which is used as a mark bit during
5477 walks over the RTL. */
5478 RTX_FLAG (copy, used) = 0;
5480 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5483 RTX_FLAG (copy, jump) = 0;
5484 RTX_FLAG (copy, call) = 0;
5485 RTX_FLAG (copy, frame_related) = 0;
5488 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5490 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5491 switch (*format_ptr++)
5494 if (XEXP (orig, i) != NULL)
5495 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5500 if (XVEC (orig, i) == orig_asm_constraints_vector)
5501 XVEC (copy, i) = copy_asm_constraints_vector;
5502 else if (XVEC (orig, i) == orig_asm_operands_vector)
5503 XVEC (copy, i) = copy_asm_operands_vector;
5504 else if (XVEC (orig, i) != NULL)
5506 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5507 for (j = 0; j < XVECLEN (copy, i); j++)
5508 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5519 /* These are left unchanged. */
5526 if (code == SCRATCH)
5528 i = copy_insn_n_scratches++;
5529 gcc_assert (i < MAX_RECOG_OPERANDS);
5530 copy_insn_scratch_in[i] = orig;
5531 copy_insn_scratch_out[i] = copy;
5533 else if (code == ASM_OPERANDS)
5535 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5536 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5537 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5538 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5544 /* Create a new copy of an rtx.
5545 This function differs from copy_rtx in that it handles SCRATCHes and
5546 ASM_OPERANDs properly.
5547 INSN doesn't really have to be a full INSN; it could be just the
5550 copy_insn (rtx insn)
5552 copy_insn_n_scratches = 0;
5553 orig_asm_operands_vector = 0;
5554 orig_asm_constraints_vector = 0;
5555 copy_asm_operands_vector = 0;
5556 copy_asm_constraints_vector = 0;
5557 return copy_insn_1 (insn);
5560 /* Initialize data structures and variables in this file
5561 before generating rtl for each function. */
5566 set_first_insn (NULL);
5567 set_last_insn (NULL);
5568 if (MIN_NONDEBUG_INSN_UID)
5569 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5572 cur_debug_insn_uid = 1;
5573 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5574 last_location = UNKNOWN_LOCATION;
5575 first_label_num = label_num;
5578 /* Init the tables that describe all the pseudo regs. */
5580 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5582 crtl->emit.regno_pointer_align
5583 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5585 regno_reg_rtx = ggc_alloc_vec_rtx (crtl->emit.regno_pointer_align_length);
5587 /* Put copies of all the hard registers into regno_reg_rtx. */
5588 memcpy (regno_reg_rtx,
5589 initial_regno_reg_rtx,
5590 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5592 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5593 init_virtual_regs ();
5595 /* Indicate that the virtual registers and stack locations are
5597 REG_POINTER (stack_pointer_rtx) = 1;
5598 REG_POINTER (frame_pointer_rtx) = 1;
5599 REG_POINTER (hard_frame_pointer_rtx) = 1;
5600 REG_POINTER (arg_pointer_rtx) = 1;
5602 REG_POINTER (virtual_incoming_args_rtx) = 1;
5603 REG_POINTER (virtual_stack_vars_rtx) = 1;
5604 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5605 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5606 REG_POINTER (virtual_cfa_rtx) = 1;
5608 #ifdef STACK_BOUNDARY
5609 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5610 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5611 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5612 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5614 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5615 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5616 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5617 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5618 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5621 #ifdef INIT_EXPANDERS
5626 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5629 gen_const_vector (enum machine_mode mode, int constant)
5634 enum machine_mode inner;
5636 units = GET_MODE_NUNITS (mode);
5637 inner = GET_MODE_INNER (mode);
5639 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5641 v = rtvec_alloc (units);
5643 /* We need to call this function after we set the scalar const_tiny_rtx
5645 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5647 for (i = 0; i < units; ++i)
5648 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5650 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5654 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5655 all elements are zero, and the one vector when all elements are one. */
5657 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5659 enum machine_mode inner = GET_MODE_INNER (mode);
5660 int nunits = GET_MODE_NUNITS (mode);
5664 /* Check to see if all of the elements have the same value. */
5665 x = RTVEC_ELT (v, nunits - 1);
5666 for (i = nunits - 2; i >= 0; i--)
5667 if (RTVEC_ELT (v, i) != x)
5670 /* If the values are all the same, check to see if we can use one of the
5671 standard constant vectors. */
5674 if (x == CONST0_RTX (inner))
5675 return CONST0_RTX (mode);
5676 else if (x == CONST1_RTX (inner))
5677 return CONST1_RTX (mode);
5680 return gen_rtx_raw_CONST_VECTOR (mode, v);
5683 /* Initialise global register information required by all functions. */
5686 init_emit_regs (void)
5690 /* Reset register attributes */
5691 htab_empty (reg_attrs_htab);
5693 /* We need reg_raw_mode, so initialize the modes now. */
5694 init_reg_modes_target ();
5696 /* Assign register numbers to the globally defined register rtx. */
5697 pc_rtx = gen_rtx_PC (VOIDmode);
5698 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5699 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5700 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5701 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5702 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5703 virtual_incoming_args_rtx =
5704 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5705 virtual_stack_vars_rtx =
5706 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5707 virtual_stack_dynamic_rtx =
5708 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5709 virtual_outgoing_args_rtx =
5710 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5711 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5713 /* Initialize RTL for commonly used hard registers. These are
5714 copied into regno_reg_rtx as we begin to compile each function. */
5715 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5716 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5718 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5719 return_address_pointer_rtx
5720 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5723 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5724 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5726 pic_offset_table_rtx = NULL_RTX;
5729 /* Create some permanent unique rtl objects shared between all functions. */
5732 init_emit_once (void)
5735 enum machine_mode mode;
5736 enum machine_mode double_mode;
5738 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5740 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5741 const_int_htab_eq, NULL);
5743 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5744 const_double_htab_eq, NULL);
5746 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5747 const_fixed_htab_eq, NULL);
5749 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5750 mem_attrs_htab_eq, NULL);
5751 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5752 reg_attrs_htab_eq, NULL);
5754 /* Compute the word and byte modes. */
5756 byte_mode = VOIDmode;
5757 word_mode = VOIDmode;
5758 double_mode = VOIDmode;
5760 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5762 mode = GET_MODE_WIDER_MODE (mode))
5764 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5765 && byte_mode == VOIDmode)
5768 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5769 && word_mode == VOIDmode)
5773 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5775 mode = GET_MODE_WIDER_MODE (mode))
5777 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5778 && double_mode == VOIDmode)
5782 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5784 #ifdef INIT_EXPANDERS
5785 /* This is to initialize {init|mark|free}_machine_status before the first
5786 call to push_function_context_to. This is needed by the Chill front
5787 end which calls push_function_context_to before the first call to
5788 init_function_start. */
5792 /* Create the unique rtx's for certain rtx codes and operand values. */
5794 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5795 tries to use these variables. */
5796 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5797 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5798 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5800 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5801 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5802 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5804 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5806 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5807 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5808 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5813 dconsthalf = dconst1;
5814 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5816 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5818 const REAL_VALUE_TYPE *const r =
5819 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5821 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5823 mode = GET_MODE_WIDER_MODE (mode))
5824 const_tiny_rtx[i][(int) mode] =
5825 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5827 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5829 mode = GET_MODE_WIDER_MODE (mode))
5830 const_tiny_rtx[i][(int) mode] =
5831 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5833 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5835 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5837 mode = GET_MODE_WIDER_MODE (mode))
5838 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5840 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5842 mode = GET_MODE_WIDER_MODE (mode))
5843 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5846 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5848 mode = GET_MODE_WIDER_MODE (mode))
5850 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5851 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5854 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5856 mode = GET_MODE_WIDER_MODE (mode))
5858 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5859 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5862 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5864 mode = GET_MODE_WIDER_MODE (mode))
5866 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5867 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5870 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5872 mode = GET_MODE_WIDER_MODE (mode))
5874 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5875 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5878 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5880 mode = GET_MODE_WIDER_MODE (mode))
5882 FCONST0(mode).data.high = 0;
5883 FCONST0(mode).data.low = 0;
5884 FCONST0(mode).mode = mode;
5885 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5886 FCONST0 (mode), mode);
5889 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5891 mode = GET_MODE_WIDER_MODE (mode))
5893 FCONST0(mode).data.high = 0;
5894 FCONST0(mode).data.low = 0;
5895 FCONST0(mode).mode = mode;
5896 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5897 FCONST0 (mode), mode);
5900 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5902 mode = GET_MODE_WIDER_MODE (mode))
5904 FCONST0(mode).data.high = 0;
5905 FCONST0(mode).data.low = 0;
5906 FCONST0(mode).mode = mode;
5907 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5908 FCONST0 (mode), mode);
5910 /* We store the value 1. */
5911 FCONST1(mode).data.high = 0;
5912 FCONST1(mode).data.low = 0;
5913 FCONST1(mode).mode = mode;
5914 lshift_double (1, 0, GET_MODE_FBIT (mode),
5915 2 * HOST_BITS_PER_WIDE_INT,
5916 &FCONST1(mode).data.low,
5917 &FCONST1(mode).data.high,
5918 SIGNED_FIXED_POINT_MODE_P (mode));
5919 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5920 FCONST1 (mode), mode);
5923 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5925 mode = GET_MODE_WIDER_MODE (mode))
5927 FCONST0(mode).data.high = 0;
5928 FCONST0(mode).data.low = 0;
5929 FCONST0(mode).mode = mode;
5930 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5931 FCONST0 (mode), mode);
5933 /* We store the value 1. */
5934 FCONST1(mode).data.high = 0;
5935 FCONST1(mode).data.low = 0;
5936 FCONST1(mode).mode = mode;
5937 lshift_double (1, 0, GET_MODE_FBIT (mode),
5938 2 * HOST_BITS_PER_WIDE_INT,
5939 &FCONST1(mode).data.low,
5940 &FCONST1(mode).data.high,
5941 SIGNED_FIXED_POINT_MODE_P (mode));
5942 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5943 FCONST1 (mode), mode);
5946 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5948 mode = GET_MODE_WIDER_MODE (mode))
5950 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5953 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5955 mode = GET_MODE_WIDER_MODE (mode))
5957 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5960 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5962 mode = GET_MODE_WIDER_MODE (mode))
5964 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5965 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5968 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5970 mode = GET_MODE_WIDER_MODE (mode))
5972 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5973 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5976 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5977 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5978 const_tiny_rtx[0][i] = const0_rtx;
5980 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5981 if (STORE_FLAG_VALUE == 1)
5982 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5985 /* Produce exact duplicate of insn INSN after AFTER.
5986 Care updating of libcall regions if present. */
5989 emit_copy_of_insn_after (rtx insn, rtx after)
5993 switch (GET_CODE (insn))
5996 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
6000 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
6004 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
6008 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
6009 if (CALL_INSN_FUNCTION_USAGE (insn))
6010 CALL_INSN_FUNCTION_USAGE (new_rtx)
6011 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
6012 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6013 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6014 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6015 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6016 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6023 /* Update LABEL_NUSES. */
6024 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6026 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
6028 /* If the old insn is frame related, then so is the new one. This is
6029 primarily needed for IA-64 unwind info which marks epilogue insns,
6030 which may be duplicated by the basic block reordering code. */
6031 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6033 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6034 will make them. REG_LABEL_TARGETs are created there too, but are
6035 supposed to be sticky, so we copy them. */
6036 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6037 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6039 if (GET_CODE (link) == EXPR_LIST)
6040 add_reg_note (new_rtx, REG_NOTE_KIND (link),
6041 copy_insn_1 (XEXP (link, 0)));
6043 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
6046 INSN_CODE (new_rtx) = INSN_CODE (insn);
6050 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6052 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
6054 if (hard_reg_clobbers[mode][regno])
6055 return hard_reg_clobbers[mode][regno];
6057 return (hard_reg_clobbers[mode][regno] =
6058 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6061 #include "gt-emit-rtl.h"