1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
51 #include "hard-reg-set.h"
52 #include "insn-config.h"
57 /* Commonly used modes. */
59 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
60 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
61 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
63 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
64 After rtl generation, it is 1 plus the largest register number used. */
66 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Lowest label number in current function. */
75 static int first_label_num;
77 /* Highest label number in current function.
78 Zero means use the value of label_num instead.
79 This is nonzero only when belatedly compiling an inline function. */
81 static int last_label_num;
83 /* Value label_num had when set_new_first_and_last_label_number was called.
84 If label_num has not changed since then, last_label_num is valid. */
86 static int base_label_num;
88 /* Nonzero means do not generate NOTEs for source line numbers. */
90 static int no_line_numbers;
92 /* Commonly used rtx's, so that we only need space for one copy.
93 These are initialized once for the entire compilation.
94 All of these except perhaps the floating-point CONST_DOUBLEs
95 are unique; no other rtx-object will be equal to any of these. */
97 struct _global_rtl global_rtl =
99 {PC, VOIDmode}, /* pc_rtx */
100 {CC0, VOIDmode}, /* cc0_rtx */
101 {REG}, /* stack_pointer_rtx */
102 {REG}, /* frame_pointer_rtx */
103 {REG}, /* hard_frame_pointer_rtx */
104 {REG}, /* arg_pointer_rtx */
105 {REG}, /* virtual_incoming_args_rtx */
106 {REG}, /* virtual_stack_vars_rtx */
107 {REG}, /* virtual_stack_dynamic_rtx */
108 {REG}, /* virtual_outgoing_args_rtx */
111 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
112 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
113 record a copy of const[012]_rtx. */
115 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
119 REAL_VALUE_TYPE dconst0;
120 REAL_VALUE_TYPE dconst1;
121 REAL_VALUE_TYPE dconst2;
122 REAL_VALUE_TYPE dconstm1;
124 /* All references to the following fixed hard registers go through
125 these unique rtl objects. On machines where the frame-pointer and
126 arg-pointer are the same register, they use the same unique object.
128 After register allocation, other rtl objects which used to be pseudo-regs
129 may be clobbered to refer to the frame-pointer register.
130 But references that were originally to the frame-pointer can be
131 distinguished from the others because they contain frame_pointer_rtx.
133 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
134 tricky: until register elimination has taken place hard_frame_pointer_rtx
135 should be used if it is being set, and frame_pointer_rtx otherwise. After
136 register elimination hard_frame_pointer_rtx should always be used.
137 On machines where the two registers are same (most) then these are the
140 In an inline procedure, the stack and frame pointer rtxs may not be
141 used for anything else. */
142 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
143 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
144 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
145 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
146 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
148 /* This is used to implement __builtin_return_address for some machines.
149 See for instance the MIPS port. */
150 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
152 /* We make one copy of (const_int C) where C is in
153 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
154 to save space during the compilation and simplify comparisons of
157 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
159 /* The ends of the doubly-linked chain of rtl for the current function.
160 Both are reset to null at the start of rtl generation for the function.
162 start_sequence saves both of these on `sequence_stack' along with
163 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
165 static rtx first_insn = NULL;
166 static rtx last_insn = NULL;
168 /* RTL_EXPR within which the current sequence will be placed. Use to
169 prevent reuse of any temporaries within the sequence until after the
170 RTL_EXPR is emitted. */
172 tree sequence_rtl_expr = NULL;
174 /* INSN_UID for next insn emitted.
175 Reset to 1 for each function compiled. */
177 static int cur_insn_uid = 1;
179 /* Line number and source file of the last line-number NOTE emitted.
180 This is used to avoid generating duplicates. */
182 static int last_linenum = 0;
183 static char *last_filename = 0;
185 /* A vector indexed by pseudo reg number. The allocated length
186 of this vector is regno_pointer_flag_length. Since this
187 vector is needed during the expansion phase when the total
188 number of registers in the function is not yet known,
189 it is copied and made bigger when necessary. */
191 char *regno_pointer_flag;
192 int regno_pointer_flag_length;
194 /* Indexed by pseudo register number, if nonzero gives the known alignment
195 for that pseudo (if regno_pointer_flag is set).
196 Allocated in parallel with regno_pointer_flag. */
197 char *regno_pointer_align;
199 /* Indexed by pseudo register number, gives the rtx for that pseudo.
200 Allocated in parallel with regno_pointer_flag. */
204 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
205 Each element describes one pending sequence.
206 The main insn-chain is saved in the last element of the chain,
207 unless the chain is empty. */
209 struct sequence_stack *sequence_stack;
211 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
212 shortly thrown away. We use two mechanisms to prevent this waste:
214 First, we keep a list of the expressions used to represent the sequence
215 stack in sequence_element_free_list.
217 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
218 rtvec for use by gen_sequence. One entry for each size is sufficient
219 because most cases are calls to gen_sequence followed by immediately
220 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
221 destructive on the insn in it anyway and hence can't be redone.
223 We do not bother to save this cached data over nested function calls.
224 Instead, we just reinitialize them. */
226 #define SEQUENCE_RESULT_SIZE 5
228 static struct sequence_stack *sequence_element_free_list;
229 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
231 /* During RTL generation, we also keep a list of free INSN rtl codes. */
232 static rtx free_insn;
234 extern int rtx_equal_function_value_matters;
236 /* Filename and line number of last line-number note,
237 whether we actually emitted it or not. */
238 extern char *emit_filename;
239 extern int emit_lineno;
241 static rtx make_jump_insn_raw PROTO((rtx));
242 static rtx make_call_insn_raw PROTO((rtx));
243 static rtx find_line_note PROTO((rtx));
246 gen_rtx_CONST_INT (mode, arg)
247 enum machine_mode mode;
250 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
251 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
253 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
254 if (const_true_rtx && arg == STORE_FLAG_VALUE)
255 return const_true_rtx;
258 return gen_rtx_raw_CONST_INT (mode, arg);
262 gen_rtx_REG (mode, regno)
263 enum machine_mode mode;
266 /* In case the MD file explicitly references the frame pointer, have
267 all such references point to the same frame pointer. This is
268 used during frame pointer elimination to distinguish the explicit
269 references to these registers from pseudos that happened to be
272 If we have eliminated the frame pointer or arg pointer, we will
273 be using it as a normal register, for example as a spill
274 register. In such cases, we might be accessing it in a mode that
275 is not Pmode and therefore cannot use the pre-allocated rtx.
277 Also don't do this when we are making new REGs in reload, since
278 we don't want to get confused with the real pointers. */
280 if (mode == Pmode && !reload_in_progress)
282 if (regno == FRAME_POINTER_REGNUM)
283 return frame_pointer_rtx;
284 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
285 if (regno == HARD_FRAME_POINTER_REGNUM)
286 return hard_frame_pointer_rtx;
288 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
289 if (regno == ARG_POINTER_REGNUM)
290 return arg_pointer_rtx;
292 #ifdef RETURN_ADDRESS_POINTER_REGNUM
293 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
294 return return_address_pointer_rtx;
296 if (regno == STACK_POINTER_REGNUM)
297 return stack_pointer_rtx;
300 return gen_rtx_raw_REG (mode, regno);
303 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
305 ** This routine generates an RTX of the size specified by
306 ** <code>, which is an RTX code. The RTX structure is initialized
307 ** from the arguments <element1> through <elementn>, which are
308 ** interpreted according to the specific RTX type's format. The
309 ** special machine mode associated with the rtx (if any) is specified
312 ** gen_rtx can be invoked in a way which resembles the lisp-like
313 ** rtx it will generate. For example, the following rtx structure:
315 ** (plus:QI (mem:QI (reg:SI 1))
316 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
318 ** ...would be generated by the following C code:
320 ** gen_rtx (PLUS, QImode,
321 ** gen_rtx (MEM, QImode,
322 ** gen_rtx (REG, SImode, 1)),
323 ** gen_rtx (MEM, QImode,
324 ** gen_rtx (PLUS, SImode,
325 ** gen_rtx (REG, SImode, 2),
326 ** gen_rtx (REG, SImode, 3)))),
331 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
335 enum machine_mode mode;
338 register int i; /* Array indices... */
339 register char *fmt; /* Current rtx's format... */
340 register rtx rt_val; /* RTX to return to caller... */
345 code = va_arg (p, enum rtx_code);
346 mode = va_arg (p, enum machine_mode);
349 if (code == CONST_INT)
350 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
351 else if (code == REG)
352 rt_val = gen_rtx_REG (mode, va_arg (p, int));
355 rt_val = rtx_alloc (code); /* Allocate the storage space. */
356 rt_val->mode = mode; /* Store the machine mode... */
358 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
359 for (i = 0; i < GET_RTX_LENGTH (code); i++)
363 case '0': /* Unused field. */
366 case 'i': /* An integer? */
367 XINT (rt_val, i) = va_arg (p, int);
370 case 'w': /* A wide integer? */
371 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
374 case 's': /* A string? */
375 XSTR (rt_val, i) = va_arg (p, char *);
378 case 'e': /* An expression? */
379 case 'u': /* An insn? Same except when printing. */
380 XEXP (rt_val, i) = va_arg (p, rtx);
383 case 'E': /* An RTX vector? */
384 XVEC (rt_val, i) = va_arg (p, rtvec);
393 return rt_val; /* Return the new RTX... */
396 /* gen_rtvec (n, [rt1, ..., rtn])
398 ** This routine creates an rtvec and stores within it the
399 ** pointers to rtx's which are its arguments.
404 gen_rtvec VPROTO((int n, ...))
420 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
422 vector = (rtx *) alloca (n * sizeof (rtx));
424 for (i = 0; i < n; i++)
425 vector[i] = va_arg (p, rtx);
428 return gen_rtvec_v (n, vector);
432 gen_rtvec_v (n, argp)
437 register rtvec rt_val;
440 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
442 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
444 for (i = 0; i < n; i++)
445 rt_val->elem[i].rtx = *argp++;
451 gen_rtvec_vv (n, argp)
456 register rtvec rt_val;
459 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
461 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
463 for (i = 0; i < n; i++)
464 rt_val->elem[i].rtx = (argp++)->rtx;
469 /* Generate a REG rtx for a new pseudo register of mode MODE.
470 This pseudo is assigned the next sequential register number. */
474 enum machine_mode mode;
478 /* Don't let anything called by or after reload create new registers
479 (actually, registers can't be created after flow, but this is a good
482 if (reload_in_progress || reload_completed)
485 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
486 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
488 /* For complex modes, don't make a single pseudo.
489 Instead, make a CONCAT of two pseudos.
490 This allows noncontiguous allocation of the real and imaginary parts,
491 which makes much better code. Besides, allocating DCmode
492 pseudos overstrains reload on some machines like the 386. */
493 rtx realpart, imagpart;
494 int size = GET_MODE_UNIT_SIZE (mode);
495 enum machine_mode partmode
496 = mode_for_size (size * BITS_PER_UNIT,
497 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
498 ? MODE_FLOAT : MODE_INT),
501 realpart = gen_reg_rtx (partmode);
502 imagpart = gen_reg_rtx (partmode);
503 return gen_rtx_CONCAT (mode, realpart, imagpart);
506 /* Make sure regno_pointer_flag and regno_reg_rtx are large
507 enough to have an element for this pseudo reg number. */
509 if (reg_rtx_no == regno_pointer_flag_length)
513 (char *) savealloc (regno_pointer_flag_length * 2);
514 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
515 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
516 regno_pointer_flag = new;
518 new = (char *) savealloc (regno_pointer_flag_length * 2);
519 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
520 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
521 regno_pointer_align = new;
523 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
524 bcopy ((char *) regno_reg_rtx, (char *) new1,
525 regno_pointer_flag_length * sizeof (rtx));
526 bzero ((char *) &new1[regno_pointer_flag_length],
527 regno_pointer_flag_length * sizeof (rtx));
528 regno_reg_rtx = new1;
530 regno_pointer_flag_length *= 2;
533 val = gen_rtx_raw_REG (mode, reg_rtx_no);
534 regno_reg_rtx[reg_rtx_no++] = val;
538 /* Identify REG (which may be a CONCAT) as a user register. */
544 if (GET_CODE (reg) == CONCAT)
546 REG_USERVAR_P (XEXP (reg, 0)) = 1;
547 REG_USERVAR_P (XEXP (reg, 1)) = 1;
549 else if (GET_CODE (reg) == REG)
550 REG_USERVAR_P (reg) = 1;
555 /* Identify REG as a probable pointer register and show its alignment
556 as ALIGN, if nonzero. */
559 mark_reg_pointer (reg, align)
563 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
566 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
569 /* Return 1 plus largest pseudo reg number used in the current function. */
577 /* Return 1 + the largest label number used so far in the current function. */
582 if (last_label_num && label_num == base_label_num)
583 return last_label_num;
587 /* Return first label number used in this function (if any were used). */
590 get_first_label_num ()
592 return first_label_num;
595 /* Return a value representing some low-order bits of X, where the number
596 of low-order bits is given by MODE. Note that no conversion is done
597 between floating-point and fixed-point values, rather, the bit
598 representation is returned.
600 This function handles the cases in common between gen_lowpart, below,
601 and two variants in cse.c and combine.c. These are the cases that can
602 be safely handled at all points in the compilation.
604 If this is not a case we can handle, return 0. */
607 gen_lowpart_common (mode, x)
608 enum machine_mode mode;
613 if (GET_MODE (x) == mode)
616 /* MODE must occupy no more words than the mode of X. */
617 if (GET_MODE (x) != VOIDmode
618 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
619 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
623 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
624 word = ((GET_MODE_SIZE (GET_MODE (x))
625 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
628 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
629 && (GET_MODE_CLASS (mode) == MODE_INT
630 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
632 /* If we are getting the low-order part of something that has been
633 sign- or zero-extended, we can either just use the object being
634 extended or make a narrower extension. If we want an even smaller
635 piece than the size of the object being extended, call ourselves
638 This case is used mostly by combine and cse. */
640 if (GET_MODE (XEXP (x, 0)) == mode)
642 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
643 return gen_lowpart_common (mode, XEXP (x, 0));
644 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
645 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
647 else if (GET_CODE (x) == SUBREG
648 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
649 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
650 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
652 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
653 else if (GET_CODE (x) == REG)
655 /* Let the backend decide how many registers to skip. This is needed
656 in particular for Sparc64 where fp regs are smaller than a word. */
657 /* ??? Note that subregs are now ambiguous, in that those against
658 pseudos are sized by the Word Size, while those against hard
659 regs are sized by the underlying register size. Better would be
660 to always interpret the subreg offset parameter as bytes or bits. */
662 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
663 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
664 - HARD_REGNO_NREGS (REGNO (x), mode));
666 /* If the register is not valid for MODE, return 0. If we don't
667 do this, there is no way to fix up the resulting REG later.
668 But we do do this if the current REG is not valid for its
669 mode. This latter is a kludge, but is required due to the
670 way that parameters are passed on some machines, most
672 if (REGNO (x) < FIRST_PSEUDO_REGISTER
673 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
674 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
676 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
677 /* integrate.c can't handle parts of a return value register. */
678 && (! REG_FUNCTION_VALUE_P (x)
679 || ! rtx_equal_function_value_matters)
680 #ifdef CLASS_CANNOT_CHANGE_SIZE
681 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
682 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
683 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
684 && (TEST_HARD_REG_BIT
685 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
688 /* We want to keep the stack, frame, and arg pointers
690 && x != frame_pointer_rtx
691 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
692 && x != arg_pointer_rtx
694 && x != stack_pointer_rtx)
695 return gen_rtx_REG (mode, REGNO (x) + word);
697 return gen_rtx_SUBREG (mode, x, word);
699 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
700 from the low-order part of the constant. */
701 else if ((GET_MODE_CLASS (mode) == MODE_INT
702 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
703 && GET_MODE (x) == VOIDmode
704 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
706 /* If MODE is twice the host word size, X is already the desired
707 representation. Otherwise, if MODE is wider than a word, we can't
708 do this. If MODE is exactly a word, return just one CONST_INT.
709 If MODE is smaller than a word, clear the bits that don't belong
710 in our mode, unless they and our sign bit are all one. So we get
711 either a reasonable negative value or a reasonable unsigned value
714 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
716 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
718 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
719 return (GET_CODE (x) == CONST_INT ? x
720 : GEN_INT (CONST_DOUBLE_LOW (x)));
723 /* MODE must be narrower than HOST_BITS_PER_INT. */
724 int width = GET_MODE_BITSIZE (mode);
725 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
726 : CONST_DOUBLE_LOW (x));
728 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
729 != ((HOST_WIDE_INT) (-1) << (width - 1))))
730 val &= ((HOST_WIDE_INT) 1 << width) - 1;
732 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
737 /* If X is an integral constant but we want it in floating-point, it
738 must be the case that we have a union of an integer and a floating-point
739 value. If the machine-parameters allow it, simulate that union here
740 and return the result. The two-word and single-word cases are
743 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
744 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
745 || flag_pretend_float)
746 && GET_MODE_CLASS (mode) == MODE_FLOAT
747 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
748 && GET_CODE (x) == CONST_INT
749 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
750 #ifdef REAL_ARITHMETIC
756 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
757 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
761 union {HOST_WIDE_INT i; float d; } u;
764 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
767 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
768 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
769 || flag_pretend_float)
770 && GET_MODE_CLASS (mode) == MODE_FLOAT
771 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
772 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
773 && GET_MODE (x) == VOIDmode
774 && (sizeof (double) * HOST_BITS_PER_CHAR
775 == 2 * HOST_BITS_PER_WIDE_INT))
776 #ifdef REAL_ARITHMETIC
780 HOST_WIDE_INT low, high;
782 if (GET_CODE (x) == CONST_INT)
783 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
785 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
787 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
789 if (WORDS_BIG_ENDIAN)
790 i[0] = high, i[1] = low;
792 i[0] = low, i[1] = high;
794 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
795 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
799 union {HOST_WIDE_INT i[2]; double d; } u;
800 HOST_WIDE_INT low, high;
802 if (GET_CODE (x) == CONST_INT)
803 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
805 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
807 #ifdef HOST_WORDS_BIG_ENDIAN
808 u.i[0] = high, u.i[1] = low;
810 u.i[0] = low, u.i[1] = high;
813 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
817 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
818 same as sizeof (double) or when sizeof (float) is larger than the
819 size of a word on the target machine. */
820 #ifdef REAL_ARITHMETIC
821 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
827 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
828 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
832 /* Similarly, if this is converting a floating-point value into a
833 single-word integer. Only do this is the host and target parameters are
836 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
837 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
838 || flag_pretend_float)
839 && (GET_MODE_CLASS (mode) == MODE_INT
840 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
841 && GET_CODE (x) == CONST_DOUBLE
842 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
843 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
844 return operand_subword (x, word, 0, GET_MODE (x));
846 /* Similarly, if this is converting a floating-point value into a
847 two-word integer, we can do this one word at a time and make an
848 integer. Only do this is the host and target parameters are
851 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
852 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
853 || flag_pretend_float)
854 && (GET_MODE_CLASS (mode) == MODE_INT
855 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
856 && GET_CODE (x) == CONST_DOUBLE
857 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
858 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
861 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
863 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
865 if (lowpart && GET_CODE (lowpart) == CONST_INT
866 && highpart && GET_CODE (highpart) == CONST_INT)
867 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
870 /* Otherwise, we can't do this. */
874 /* Return the real part (which has mode MODE) of a complex value X.
875 This always comes at the low address in memory. */
878 gen_realpart (mode, x)
879 enum machine_mode mode;
882 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
884 else if (WORDS_BIG_ENDIAN)
885 return gen_highpart (mode, x);
887 return gen_lowpart (mode, x);
890 /* Return the imaginary part (which has mode MODE) of a complex value X.
891 This always comes at the high address in memory. */
894 gen_imagpart (mode, x)
895 enum machine_mode mode;
898 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
900 else if (WORDS_BIG_ENDIAN)
901 return gen_lowpart (mode, x);
903 return gen_highpart (mode, x);
906 /* Return 1 iff X, assumed to be a SUBREG,
907 refers to the real part of the complex value in its containing reg.
908 Complex values are always stored with the real part in the first word,
909 regardless of WORDS_BIG_ENDIAN. */
912 subreg_realpart_p (x)
915 if (GET_CODE (x) != SUBREG)
918 return SUBREG_WORD (x) == 0;
921 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
922 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
923 least-significant part of X.
924 MODE specifies how big a part of X to return;
925 it usually should not be larger than a word.
926 If X is a MEM whose address is a QUEUED, the value may be so also. */
929 gen_lowpart (mode, x)
930 enum machine_mode mode;
933 rtx result = gen_lowpart_common (mode, x);
937 else if (GET_CODE (x) == REG)
939 /* Must be a hard reg that's not valid in MODE. */
940 result = gen_lowpart_common (mode, copy_to_reg (x));
945 else if (GET_CODE (x) == MEM)
947 /* The only additional case we can do is MEM. */
948 register int offset = 0;
949 if (WORDS_BIG_ENDIAN)
950 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
951 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
953 if (BYTES_BIG_ENDIAN)
954 /* Adjust the address so that the address-after-the-data
956 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
957 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
959 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
961 else if (GET_CODE (x) == ADDRESSOF)
962 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
967 /* Like `gen_lowpart', but refer to the most significant part.
968 This is used to access the imaginary part of a complex number. */
971 gen_highpart (mode, x)
972 enum machine_mode mode;
975 /* This case loses if X is a subreg. To catch bugs early,
976 complain if an invalid MODE is used even in other cases. */
977 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
978 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
980 if (GET_CODE (x) == CONST_DOUBLE
981 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
982 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
985 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
986 else if (GET_CODE (x) == CONST_INT)
988 else if (GET_CODE (x) == MEM)
990 register int offset = 0;
991 if (! WORDS_BIG_ENDIAN)
992 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
993 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
995 if (! BYTES_BIG_ENDIAN
996 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
997 offset -= (GET_MODE_SIZE (mode)
998 - MIN (UNITS_PER_WORD,
999 GET_MODE_SIZE (GET_MODE (x))));
1001 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1003 else if (GET_CODE (x) == SUBREG)
1005 /* The only time this should occur is when we are looking at a
1006 multi-word item with a SUBREG whose mode is the same as that of the
1007 item. It isn't clear what we would do if it wasn't. */
1008 if (SUBREG_WORD (x) != 0)
1010 return gen_highpart (mode, SUBREG_REG (x));
1012 else if (GET_CODE (x) == REG)
1016 /* Let the backend decide how many registers to skip. This is needed
1017 in particular for sparc64 where fp regs are smaller than a word. */
1018 /* ??? Note that subregs are now ambiguous, in that those against
1019 pseudos are sized by the Word Size, while those against hard
1020 regs are sized by the underlying register size. Better would be
1021 to always interpret the subreg offset parameter as bytes or bits. */
1023 if (! WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
1024 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1025 - HARD_REGNO_NREGS (REGNO (x), mode));
1027 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1028 /* integrate.c can't handle parts of a return value register. */
1029 && (! REG_FUNCTION_VALUE_P (x)
1030 || ! rtx_equal_function_value_matters)
1031 /* We want to keep the stack, frame, and arg pointers special. */
1032 && x != frame_pointer_rtx
1033 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1034 && x != arg_pointer_rtx
1036 && x != stack_pointer_rtx)
1037 return gen_rtx_REG (mode, REGNO (x) + word);
1039 return gen_rtx_SUBREG (mode, x, word);
1045 /* Return 1 iff X, assumed to be a SUBREG,
1046 refers to the least significant part of its containing reg.
1047 If X is not a SUBREG, always return 1 (it is its own low part!). */
1050 subreg_lowpart_p (x)
1053 if (GET_CODE (x) != SUBREG)
1055 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1058 if (WORDS_BIG_ENDIAN
1059 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1060 return (SUBREG_WORD (x)
1061 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1062 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1065 return SUBREG_WORD (x) == 0;
1068 /* Return subword I of operand OP.
1069 The word number, I, is interpreted as the word number starting at the
1070 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1071 otherwise it is the high-order word.
1073 If we cannot extract the required word, we return zero. Otherwise, an
1074 rtx corresponding to the requested word will be returned.
1076 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1077 reload has completed, a valid address will always be returned. After
1078 reload, if a valid address cannot be returned, we return zero.
1080 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1081 it is the responsibility of the caller.
1083 MODE is the mode of OP in case it is a CONST_INT. */
1086 operand_subword (op, i, validate_address, mode)
1089 int validate_address;
1090 enum machine_mode mode;
1093 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1095 if (mode == VOIDmode)
1096 mode = GET_MODE (op);
1098 if (mode == VOIDmode)
1101 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1103 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1104 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1107 /* If OP is already an integer word, return it. */
1108 if (GET_MODE_CLASS (mode) == MODE_INT
1109 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1112 /* If OP is a REG or SUBREG, we can handle it very simply. */
1113 if (GET_CODE (op) == REG)
1115 /* If the register is not valid for MODE, return 0. If we don't
1116 do this, there is no way to fix up the resulting REG later. */
1117 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1118 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1120 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1121 || (REG_FUNCTION_VALUE_P (op)
1122 && rtx_equal_function_value_matters)
1123 /* We want to keep the stack, frame, and arg pointers
1125 || op == frame_pointer_rtx
1126 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1127 || op == arg_pointer_rtx
1129 || op == stack_pointer_rtx)
1130 return gen_rtx_SUBREG (word_mode, op, i);
1132 return gen_rtx_REG (word_mode, REGNO (op) + i);
1134 else if (GET_CODE (op) == SUBREG)
1135 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1136 else if (GET_CODE (op) == CONCAT)
1138 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1140 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1141 return operand_subword (XEXP (op, 1), i - partwords,
1142 validate_address, mode);
1145 /* Form a new MEM at the requested address. */
1146 if (GET_CODE (op) == MEM)
1148 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1151 if (validate_address)
1153 if (reload_completed)
1155 if (! strict_memory_address_p (word_mode, addr))
1159 addr = memory_address (word_mode, addr);
1162 new = gen_rtx_MEM (word_mode, addr);
1164 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1165 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1166 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1171 /* The only remaining cases are when OP is a constant. If the host and
1172 target floating formats are the same, handling two-word floating
1173 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1174 are defined as returning one or two 32 bit values, respectively,
1175 and not values of BITS_PER_WORD bits. */
1176 #ifdef REAL_ARITHMETIC
1177 /* The output is some bits, the width of the target machine's word.
1178 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1180 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1181 && GET_MODE_CLASS (mode) == MODE_FLOAT
1182 && GET_MODE_BITSIZE (mode) == 64
1183 && GET_CODE (op) == CONST_DOUBLE)
1188 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1189 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1191 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1192 which the words are written depends on the word endianness.
1194 ??? This is a potential portability problem and should
1195 be fixed at some point. */
1196 if (BITS_PER_WORD == 32)
1197 return GEN_INT ((HOST_WIDE_INT) k[i]);
1198 #if HOST_BITS_PER_WIDE_INT > 32
1199 else if (BITS_PER_WORD >= 64 && i == 0)
1200 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1201 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1203 else if (BITS_PER_WORD == 16)
1207 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1210 return GEN_INT ((HOST_WIDE_INT) value);
1215 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1216 && GET_MODE_CLASS (mode) == MODE_FLOAT
1217 && GET_MODE_BITSIZE (mode) > 64
1218 && GET_CODE (op) == CONST_DOUBLE)
1223 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1224 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1226 if (BITS_PER_WORD == 32)
1227 return GEN_INT ((HOST_WIDE_INT) k[i]);
1229 #else /* no REAL_ARITHMETIC */
1230 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1231 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1232 || flag_pretend_float)
1233 && GET_MODE_CLASS (mode) == MODE_FLOAT
1234 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1235 && GET_CODE (op) == CONST_DOUBLE)
1237 /* The constant is stored in the host's word-ordering,
1238 but we want to access it in the target's word-ordering. Some
1239 compilers don't like a conditional inside macro args, so we have two
1240 copies of the return. */
1241 #ifdef HOST_WORDS_BIG_ENDIAN
1242 return GEN_INT (i == WORDS_BIG_ENDIAN
1243 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1245 return GEN_INT (i != WORDS_BIG_ENDIAN
1246 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1249 #endif /* no REAL_ARITHMETIC */
1251 /* Single word float is a little harder, since single- and double-word
1252 values often do not have the same high-order bits. We have already
1253 verified that we want the only defined word of the single-word value. */
1254 #ifdef REAL_ARITHMETIC
1255 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1256 && GET_MODE_BITSIZE (mode) == 32
1257 && GET_CODE (op) == CONST_DOUBLE)
1262 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1263 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1265 if (BITS_PER_WORD == 16)
1267 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1271 return GEN_INT ((HOST_WIDE_INT) l);
1274 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1275 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1276 || flag_pretend_float)
1277 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1278 && GET_MODE_CLASS (mode) == MODE_FLOAT
1279 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1280 && GET_CODE (op) == CONST_DOUBLE)
1283 union {float f; HOST_WIDE_INT i; } u;
1285 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1288 return GEN_INT (u.i);
1290 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1291 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1292 || flag_pretend_float)
1293 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1294 && GET_MODE_CLASS (mode) == MODE_FLOAT
1295 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1296 && GET_CODE (op) == CONST_DOUBLE)
1299 union {double d; HOST_WIDE_INT i; } u;
1301 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1304 return GEN_INT (u.i);
1306 #endif /* no REAL_ARITHMETIC */
1308 /* The only remaining cases that we can handle are integers.
1309 Convert to proper endianness now since these cases need it.
1310 At this point, i == 0 means the low-order word.
1312 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1313 in general. However, if OP is (const_int 0), we can just return
1316 if (op == const0_rtx)
1319 if (GET_MODE_CLASS (mode) != MODE_INT
1320 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1321 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1324 if (WORDS_BIG_ENDIAN)
1325 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1327 /* Find out which word on the host machine this value is in and get
1328 it from the constant. */
1329 val = (i / size_ratio == 0
1330 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1331 : (GET_CODE (op) == CONST_INT
1332 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1334 /* Get the value we want into the low bits of val. */
1335 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1336 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1338 /* Clear the bits that don't belong in our mode, unless they and our sign
1339 bit are all one. So we get either a reasonable negative value or a
1340 reasonable unsigned value for this mode. */
1341 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1342 && ((val & ((HOST_WIDE_INT) (-1) << (BITS_PER_WORD - 1)))
1343 != ((HOST_WIDE_INT) (-1) << (BITS_PER_WORD - 1))))
1344 val &= ((HOST_WIDE_INT) 1 << BITS_PER_WORD) - 1;
1346 /* If this would be an entire word for the target, but is not for
1347 the host, then sign-extend on the host so that the number will look
1348 the same way on the host that it would on the target.
1350 For example, when building a 64 bit alpha hosted 32 bit sparc
1351 targeted compiler, then we want the 32 bit unsigned value -1 to be
1352 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1353 The later confuses the sparc backend. */
1355 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1356 && (val & ((HOST_WIDE_INT) 1 << (BITS_PER_WORD - 1))))
1357 val |= ((HOST_WIDE_INT) (-1) << BITS_PER_WORD);
1359 return GEN_INT (val);
1362 /* Similar to `operand_subword', but never return 0. If we can't extract
1363 the required subword, put OP into a register and try again. If that fails,
1364 abort. We always validate the address in this case. It is not valid
1365 to call this function after reload; it is mostly meant for RTL
1368 MODE is the mode of OP, in case it is CONST_INT. */
1371 operand_subword_force (op, i, mode)
1374 enum machine_mode mode;
1376 rtx result = operand_subword (op, i, 1, mode);
1381 if (mode != BLKmode && mode != VOIDmode)
1382 op = force_reg (mode, op);
1384 result = operand_subword (op, i, 1, mode);
1391 /* Given a compare instruction, swap the operands.
1392 A test instruction is changed into a compare of 0 against the operand. */
1395 reverse_comparison (insn)
1398 rtx body = PATTERN (insn);
1401 if (GET_CODE (body) == SET)
1402 comp = SET_SRC (body);
1404 comp = SET_SRC (XVECEXP (body, 0, 0));
1406 if (GET_CODE (comp) == COMPARE)
1408 rtx op0 = XEXP (comp, 0);
1409 rtx op1 = XEXP (comp, 1);
1410 XEXP (comp, 0) = op1;
1411 XEXP (comp, 1) = op0;
1415 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1416 if (GET_CODE (body) == SET)
1417 SET_SRC (body) = new;
1419 SET_SRC (XVECEXP (body, 0, 0)) = new;
1423 /* Return a memory reference like MEMREF, but with its mode changed
1424 to MODE and its address changed to ADDR.
1425 (VOIDmode means don't change the mode.
1426 NULL for ADDR means don't change the address.) */
1429 change_address (memref, mode, addr)
1431 enum machine_mode mode;
1436 if (GET_CODE (memref) != MEM)
1438 if (mode == VOIDmode)
1439 mode = GET_MODE (memref);
1441 addr = XEXP (memref, 0);
1443 /* If reload is in progress or has completed, ADDR must be valid.
1444 Otherwise, we can call memory_address to make it valid. */
1445 if (reload_completed || reload_in_progress)
1447 if (! memory_address_p (mode, addr))
1451 addr = memory_address (mode, addr);
1453 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1456 new = gen_rtx_MEM (mode, addr);
1457 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1458 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1459 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1463 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1470 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1471 NULL_RTX, label_num++, NULL_PTR);
1473 LABEL_NUSES (label) = 0;
1477 /* For procedure integration. */
1479 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1480 from a permanent obstack when the opportunity arises. */
1483 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1484 last_labelno, max_parm_regnum, max_regnum, args_size,
1485 pops_args, stack_slots, forced_labels, function_flags,
1486 outgoing_args_size, original_arg_vector,
1487 original_decl_initial, regno_rtx, regno_flag,
1488 regno_align, parm_reg_stack_loc)
1489 rtx first_insn, first_parm_insn;
1490 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1495 int outgoing_args_size;
1496 rtvec original_arg_vector;
1497 rtx original_decl_initial;
1501 rtvec parm_reg_stack_loc;
1503 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1504 cur_insn_uid++, NULL_RTX,
1505 first_insn, first_parm_insn,
1506 first_labelno, last_labelno,
1507 max_parm_regnum, max_regnum, args_size,
1508 pops_args, stack_slots, forced_labels,
1509 function_flags, outgoing_args_size,
1510 original_arg_vector,
1511 original_decl_initial,
1512 regno_rtx, regno_flag, regno_align,
1513 parm_reg_stack_loc);
1517 /* Install new pointers to the first and last insns in the chain.
1518 Also, set cur_insn_uid to one higher than the last in use.
1519 Used for an inline-procedure after copying the insn chain. */
1522 set_new_first_and_last_insn (first, last)
1531 for (insn = first; insn; insn = NEXT_INSN (insn))
1532 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1537 /* Set the range of label numbers found in the current function.
1538 This is used when belatedly compiling an inline function. */
1541 set_new_first_and_last_label_num (first, last)
1544 base_label_num = label_num;
1545 first_label_num = first;
1546 last_label_num = last;
1549 /* Save all variables describing the current status into the structure *P.
1550 This is used before starting a nested function. */
1553 save_emit_status (p)
1556 p->reg_rtx_no = reg_rtx_no;
1557 p->first_label_num = first_label_num;
1558 p->first_insn = first_insn;
1559 p->last_insn = last_insn;
1560 p->sequence_rtl_expr = sequence_rtl_expr;
1561 p->sequence_stack = sequence_stack;
1562 p->cur_insn_uid = cur_insn_uid;
1563 p->last_linenum = last_linenum;
1564 p->last_filename = last_filename;
1565 p->regno_pointer_flag = regno_pointer_flag;
1566 p->regno_pointer_align = regno_pointer_align;
1567 p->regno_pointer_flag_length = regno_pointer_flag_length;
1568 p->regno_reg_rtx = regno_reg_rtx;
1571 /* Restore all variables describing the current status from the structure *P.
1572 This is used after a nested function. */
1575 restore_emit_status (p)
1580 reg_rtx_no = p->reg_rtx_no;
1581 first_label_num = p->first_label_num;
1583 first_insn = p->first_insn;
1584 last_insn = p->last_insn;
1585 sequence_rtl_expr = p->sequence_rtl_expr;
1586 sequence_stack = p->sequence_stack;
1587 cur_insn_uid = p->cur_insn_uid;
1588 last_linenum = p->last_linenum;
1589 last_filename = p->last_filename;
1590 regno_pointer_flag = p->regno_pointer_flag;
1591 regno_pointer_align = p->regno_pointer_align;
1592 regno_pointer_flag_length = p->regno_pointer_flag_length;
1593 regno_reg_rtx = p->regno_reg_rtx;
1595 /* Clear our cache of rtx expressions for start_sequence and
1597 sequence_element_free_list = 0;
1598 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1599 sequence_result[i] = 0;
1604 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1605 It does not work to do this twice, because the mark bits set here
1606 are not cleared afterwards. */
1609 unshare_all_rtl (insn)
1612 for (; insn; insn = NEXT_INSN (insn))
1613 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1614 || GET_CODE (insn) == CALL_INSN)
1616 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1617 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1618 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1621 /* Make sure the addresses of stack slots found outside the insn chain
1622 (such as, in DECL_RTL of a variable) are not shared
1623 with the insn chain.
1625 This special care is necessary when the stack slot MEM does not
1626 actually appear in the insn chain. If it does appear, its address
1627 is unshared from all else at that point. */
1629 copy_rtx_if_shared (stack_slot_list);
1632 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1633 Recursively does the same for subexpressions. */
1636 copy_rtx_if_shared (orig)
1639 register rtx x = orig;
1641 register enum rtx_code code;
1642 register char *format_ptr;
1648 code = GET_CODE (x);
1650 /* These types may be freely shared. */
1663 /* SCRATCH must be shared because they represent distinct values. */
1667 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1668 a LABEL_REF, it isn't sharable. */
1669 if (GET_CODE (XEXP (x, 0)) == PLUS
1670 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1671 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1680 /* The chain of insns is not being copied. */
1684 /* A MEM is allowed to be shared if its address is constant
1685 or is a constant plus one of the special registers. */
1686 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1687 || XEXP (x, 0) == virtual_stack_vars_rtx
1688 || XEXP (x, 0) == virtual_incoming_args_rtx)
1691 if (GET_CODE (XEXP (x, 0)) == PLUS
1692 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1693 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1694 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1696 /* This MEM can appear in more than one place,
1697 but its address better not be shared with anything else. */
1699 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1709 /* This rtx may not be shared. If it has already been seen,
1710 replace it with a copy of itself. */
1716 copy = rtx_alloc (code);
1717 bcopy ((char *) x, (char *) copy,
1718 (sizeof (*copy) - sizeof (copy->fld)
1719 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1725 /* Now scan the subexpressions recursively.
1726 We can store any replaced subexpressions directly into X
1727 since we know X is not shared! Any vectors in X
1728 must be copied if X was copied. */
1730 format_ptr = GET_RTX_FORMAT (code);
1732 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1734 switch (*format_ptr++)
1737 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1741 if (XVEC (x, i) != NULL)
1744 int len = XVECLEN (x, i);
1746 if (copied && len > 0)
1747 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1748 for (j = 0; j < len; j++)
1749 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1757 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1758 to look for shared sub-parts. */
1761 reset_used_flags (x)
1765 register enum rtx_code code;
1766 register char *format_ptr;
1771 code = GET_CODE (x);
1773 /* These types may be freely shared so we needn't do any resetting
1794 /* The chain of insns is not being copied. */
1803 format_ptr = GET_RTX_FORMAT (code);
1804 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1806 switch (*format_ptr++)
1809 reset_used_flags (XEXP (x, i));
1813 for (j = 0; j < XVECLEN (x, i); j++)
1814 reset_used_flags (XVECEXP (x, i, j));
1820 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1821 Return X or the rtx for the pseudo reg the value of X was copied into.
1822 OTHER must be valid as a SET_DEST. */
1825 make_safe_from (x, other)
1829 switch (GET_CODE (other))
1832 other = SUBREG_REG (other);
1834 case STRICT_LOW_PART:
1837 other = XEXP (other, 0);
1843 if ((GET_CODE (other) == MEM
1845 && GET_CODE (x) != REG
1846 && GET_CODE (x) != SUBREG)
1847 || (GET_CODE (other) == REG
1848 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1849 || reg_mentioned_p (other, x))))
1851 rtx temp = gen_reg_rtx (GET_MODE (x));
1852 emit_move_insn (temp, x);
1858 /* Emission of insns (adding them to the doubly-linked list). */
1860 /* Return the first insn of the current sequence or current function. */
1868 /* Return the last insn emitted in current sequence or current function. */
1876 /* Specify a new insn as the last in the chain. */
1879 set_last_insn (insn)
1882 if (NEXT_INSN (insn) != 0)
1887 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1890 get_last_insn_anywhere ()
1892 struct sequence_stack *stack;
1895 for (stack = sequence_stack; stack; stack = stack->next)
1896 if (stack->last != 0)
1901 /* Return a number larger than any instruction's uid in this function. */
1906 return cur_insn_uid;
1909 /* Return the next insn. If it is a SEQUENCE, return the first insn
1918 insn = NEXT_INSN (insn);
1919 if (insn && GET_CODE (insn) == INSN
1920 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1921 insn = XVECEXP (PATTERN (insn), 0, 0);
1927 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1931 previous_insn (insn)
1936 insn = PREV_INSN (insn);
1937 if (insn && GET_CODE (insn) == INSN
1938 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1939 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1945 /* Return the next insn after INSN that is not a NOTE. This routine does not
1946 look inside SEQUENCEs. */
1949 next_nonnote_insn (insn)
1954 insn = NEXT_INSN (insn);
1955 if (insn == 0 || GET_CODE (insn) != NOTE)
1962 /* Return the previous insn before INSN that is not a NOTE. This routine does
1963 not look inside SEQUENCEs. */
1966 prev_nonnote_insn (insn)
1971 insn = PREV_INSN (insn);
1972 if (insn == 0 || GET_CODE (insn) != NOTE)
1979 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1980 or 0, if there is none. This routine does not look inside
1984 next_real_insn (insn)
1989 insn = NEXT_INSN (insn);
1990 if (insn == 0 || GET_CODE (insn) == INSN
1991 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1998 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1999 or 0, if there is none. This routine does not look inside
2003 prev_real_insn (insn)
2008 insn = PREV_INSN (insn);
2009 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2010 || GET_CODE (insn) == JUMP_INSN)
2017 /* Find the next insn after INSN that really does something. This routine
2018 does not look inside SEQUENCEs. Until reload has completed, this is the
2019 same as next_real_insn. */
2022 next_active_insn (insn)
2027 insn = NEXT_INSN (insn);
2029 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2030 || (GET_CODE (insn) == INSN
2031 && (! reload_completed
2032 || (GET_CODE (PATTERN (insn)) != USE
2033 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2040 /* Find the last insn before INSN that really does something. This routine
2041 does not look inside SEQUENCEs. Until reload has completed, this is the
2042 same as prev_real_insn. */
2045 prev_active_insn (insn)
2050 insn = PREV_INSN (insn);
2052 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2053 || (GET_CODE (insn) == INSN
2054 && (! reload_completed
2055 || (GET_CODE (PATTERN (insn)) != USE
2056 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2063 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2071 insn = NEXT_INSN (insn);
2072 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2079 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2087 insn = PREV_INSN (insn);
2088 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2096 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2097 and REG_CC_USER notes so we can find it. */
2100 link_cc0_insns (insn)
2103 rtx user = next_nonnote_insn (insn);
2105 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2106 user = XVECEXP (PATTERN (user), 0, 0);
2108 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2109 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2112 /* Return the next insn that uses CC0 after INSN, which is assumed to
2113 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2114 applied to the result of this function should yield INSN).
2116 Normally, this is simply the next insn. However, if a REG_CC_USER note
2117 is present, it contains the insn that uses CC0.
2119 Return 0 if we can't find the insn. */
2122 next_cc0_user (insn)
2125 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2128 return XEXP (note, 0);
2130 insn = next_nonnote_insn (insn);
2131 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2132 insn = XVECEXP (PATTERN (insn), 0, 0);
2134 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2135 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2141 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2142 note, it is the previous insn. */
2145 prev_cc0_setter (insn)
2148 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2151 return XEXP (note, 0);
2153 insn = prev_nonnote_insn (insn);
2154 if (! sets_cc0_p (PATTERN (insn)))
2161 /* Try splitting insns that can be split for better scheduling.
2162 PAT is the pattern which might split.
2163 TRIAL is the insn providing PAT.
2164 LAST is non-zero if we should return the last insn of the sequence produced.
2166 If this routine succeeds in splitting, it returns the first or last
2167 replacement insn depending on the value of LAST. Otherwise, it
2168 returns TRIAL. If the insn to be returned can be split, it will be. */
2171 try_split (pat, trial, last)
2175 rtx before = PREV_INSN (trial);
2176 rtx after = NEXT_INSN (trial);
2177 rtx seq = split_insns (pat, trial);
2178 int has_barrier = 0;
2181 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2182 We may need to handle this specially. */
2183 if (after && GET_CODE (after) == BARRIER)
2186 after = NEXT_INSN (after);
2191 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2192 The latter case will normally arise only when being done so that
2193 it, in turn, will be split (SFmode on the 29k is an example). */
2194 if (GET_CODE (seq) == SEQUENCE)
2196 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2197 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2198 increment the usage count so we don't delete the label. */
2201 if (GET_CODE (trial) == JUMP_INSN)
2202 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2203 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2205 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2207 if (JUMP_LABEL (trial))
2208 LABEL_NUSES (JUMP_LABEL (trial))++;
2211 tem = emit_insn_after (seq, before);
2213 delete_insn (trial);
2215 emit_barrier_after (tem);
2217 /* Recursively call try_split for each new insn created; by the
2218 time control returns here that insn will be fully split, so
2219 set LAST and continue from the insn after the one returned.
2220 We can't use next_active_insn here since AFTER may be a note.
2221 Ignore deleted insns, which can be occur if not optimizing. */
2222 for (tem = NEXT_INSN (before); tem != after;
2223 tem = NEXT_INSN (tem))
2224 if (! INSN_DELETED_P (tem))
2225 tem = try_split (PATTERN (tem), tem, 1);
2227 /* Avoid infinite loop if the result matches the original pattern. */
2228 else if (rtx_equal_p (seq, pat))
2232 PATTERN (trial) = seq;
2233 INSN_CODE (trial) = -1;
2234 try_split (seq, trial, last);
2237 /* Return either the first or the last insn, depending on which was
2239 return last ? prev_active_insn (after) : next_active_insn (before);
2245 /* Make and return an INSN rtx, initializing all its slots.
2246 Store PATTERN in the pattern slots. */
2249 make_insn_raw (pattern)
2254 /* If in RTL generation phase, see if FREE_INSN can be used. */
2255 if (free_insn != 0 && rtx_equal_function_value_matters)
2258 free_insn = NEXT_INSN (free_insn);
2259 PUT_CODE (insn, INSN);
2262 insn = rtx_alloc (INSN);
2264 INSN_UID (insn) = cur_insn_uid++;
2265 PATTERN (insn) = pattern;
2266 INSN_CODE (insn) = -1;
2267 LOG_LINKS (insn) = NULL;
2268 REG_NOTES (insn) = NULL;
2273 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2276 make_jump_insn_raw (pattern)
2281 insn = rtx_alloc (JUMP_INSN);
2282 INSN_UID (insn) = cur_insn_uid++;
2284 PATTERN (insn) = pattern;
2285 INSN_CODE (insn) = -1;
2286 LOG_LINKS (insn) = NULL;
2287 REG_NOTES (insn) = NULL;
2288 JUMP_LABEL (insn) = NULL;
2293 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2296 make_call_insn_raw (pattern)
2301 insn = rtx_alloc (CALL_INSN);
2302 INSN_UID (insn) = cur_insn_uid++;
2304 PATTERN (insn) = pattern;
2305 INSN_CODE (insn) = -1;
2306 LOG_LINKS (insn) = NULL;
2307 REG_NOTES (insn) = NULL;
2308 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2313 /* Add INSN to the end of the doubly-linked list.
2314 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2320 PREV_INSN (insn) = last_insn;
2321 NEXT_INSN (insn) = 0;
2323 if (NULL != last_insn)
2324 NEXT_INSN (last_insn) = insn;
2326 if (NULL == first_insn)
2332 /* Add INSN into the doubly-linked list after insn AFTER. This and
2333 the next should be the only functions called to insert an insn once
2334 delay slots have been filled since only they know how to update a
2338 add_insn_after (insn, after)
2341 rtx next = NEXT_INSN (after);
2343 if (optimize && INSN_DELETED_P (after))
2346 NEXT_INSN (insn) = next;
2347 PREV_INSN (insn) = after;
2351 PREV_INSN (next) = insn;
2352 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2353 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2355 else if (last_insn == after)
2359 struct sequence_stack *stack = sequence_stack;
2360 /* Scan all pending sequences too. */
2361 for (; stack; stack = stack->next)
2362 if (after == stack->last)
2372 NEXT_INSN (after) = insn;
2373 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2375 rtx sequence = PATTERN (after);
2376 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2380 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2381 the previous should be the only functions called to insert an insn once
2382 delay slots have been filled since only they know how to update a
2386 add_insn_before (insn, before)
2389 rtx prev = PREV_INSN (before);
2391 if (optimize && INSN_DELETED_P (before))
2394 PREV_INSN (insn) = prev;
2395 NEXT_INSN (insn) = before;
2399 NEXT_INSN (prev) = insn;
2400 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2402 rtx sequence = PATTERN (prev);
2403 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2406 else if (first_insn == before)
2410 struct sequence_stack *stack = sequence_stack;
2411 /* Scan all pending sequences too. */
2412 for (; stack; stack = stack->next)
2413 if (before == stack->first)
2415 stack->first = insn;
2423 PREV_INSN (before) = insn;
2424 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2425 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2428 /* Delete all insns made since FROM.
2429 FROM becomes the new last instruction. */
2432 delete_insns_since (from)
2438 NEXT_INSN (from) = 0;
2442 /* This function is deprecated, please use sequences instead.
2444 Move a consecutive bunch of insns to a different place in the chain.
2445 The insns to be moved are those between FROM and TO.
2446 They are moved to a new position after the insn AFTER.
2447 AFTER must not be FROM or TO or any insn in between.
2449 This function does not know about SEQUENCEs and hence should not be
2450 called after delay-slot filling has been done. */
2453 reorder_insns (from, to, after)
2454 rtx from, to, after;
2456 /* Splice this bunch out of where it is now. */
2457 if (PREV_INSN (from))
2458 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2460 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2461 if (last_insn == to)
2462 last_insn = PREV_INSN (from);
2463 if (first_insn == from)
2464 first_insn = NEXT_INSN (to);
2466 /* Make the new neighbors point to it and it to them. */
2467 if (NEXT_INSN (after))
2468 PREV_INSN (NEXT_INSN (after)) = to;
2470 NEXT_INSN (to) = NEXT_INSN (after);
2471 PREV_INSN (from) = after;
2472 NEXT_INSN (after) = from;
2473 if (after == last_insn)
2477 /* Return the line note insn preceding INSN. */
2480 find_line_note (insn)
2483 if (no_line_numbers)
2486 for (; insn; insn = PREV_INSN (insn))
2487 if (GET_CODE (insn) == NOTE
2488 && NOTE_LINE_NUMBER (insn) >= 0)
2494 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2495 of the moved insns when debugging. This may insert a note between AFTER
2496 and FROM, and another one after TO. */
2499 reorder_insns_with_line_notes (from, to, after)
2500 rtx from, to, after;
2502 rtx from_line = find_line_note (from);
2503 rtx after_line = find_line_note (after);
2505 reorder_insns (from, to, after);
2507 if (from_line == after_line)
2511 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2512 NOTE_LINE_NUMBER (from_line),
2515 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2516 NOTE_LINE_NUMBER (after_line),
2520 /* Emit an insn of given code and pattern
2521 at a specified place within the doubly-linked list. */
2523 /* Make an instruction with body PATTERN
2524 and output it before the instruction BEFORE. */
2527 emit_insn_before (pattern, before)
2528 register rtx pattern, before;
2530 register rtx insn = before;
2532 if (GET_CODE (pattern) == SEQUENCE)
2536 for (i = 0; i < XVECLEN (pattern, 0); i++)
2538 insn = XVECEXP (pattern, 0, i);
2539 add_insn_before (insn, before);
2541 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2542 sequence_result[XVECLEN (pattern, 0)] = pattern;
2546 insn = make_insn_raw (pattern);
2547 add_insn_before (insn, before);
2553 /* Make an instruction with body PATTERN and code JUMP_INSN
2554 and output it before the instruction BEFORE. */
2557 emit_jump_insn_before (pattern, before)
2558 register rtx pattern, before;
2562 if (GET_CODE (pattern) == SEQUENCE)
2563 insn = emit_insn_before (pattern, before);
2566 insn = make_jump_insn_raw (pattern);
2567 add_insn_before (insn, before);
2573 /* Make an instruction with body PATTERN and code CALL_INSN
2574 and output it before the instruction BEFORE. */
2577 emit_call_insn_before (pattern, before)
2578 register rtx pattern, before;
2582 if (GET_CODE (pattern) == SEQUENCE)
2583 insn = emit_insn_before (pattern, before);
2586 insn = make_call_insn_raw (pattern);
2587 add_insn_before (insn, before);
2588 PUT_CODE (insn, CALL_INSN);
2594 /* Make an insn of code BARRIER
2595 and output it before the insn AFTER. */
2598 emit_barrier_before (before)
2599 register rtx before;
2601 register rtx insn = rtx_alloc (BARRIER);
2603 INSN_UID (insn) = cur_insn_uid++;
2605 add_insn_before (insn, before);
2609 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2612 emit_note_before (subtype, before)
2616 register rtx note = rtx_alloc (NOTE);
2617 INSN_UID (note) = cur_insn_uid++;
2618 NOTE_SOURCE_FILE (note) = 0;
2619 NOTE_LINE_NUMBER (note) = subtype;
2621 add_insn_before (note, before);
2625 /* Make an insn of code INSN with body PATTERN
2626 and output it after the insn AFTER. */
2629 emit_insn_after (pattern, after)
2630 register rtx pattern, after;
2632 register rtx insn = after;
2634 if (GET_CODE (pattern) == SEQUENCE)
2638 for (i = 0; i < XVECLEN (pattern, 0); i++)
2640 insn = XVECEXP (pattern, 0, i);
2641 add_insn_after (insn, after);
2644 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2645 sequence_result[XVECLEN (pattern, 0)] = pattern;
2649 insn = make_insn_raw (pattern);
2650 add_insn_after (insn, after);
2656 /* Similar to emit_insn_after, except that line notes are to be inserted so
2657 as to act as if this insn were at FROM. */
2660 emit_insn_after_with_line_notes (pattern, after, from)
2661 rtx pattern, after, from;
2663 rtx from_line = find_line_note (from);
2664 rtx after_line = find_line_note (after);
2665 rtx insn = emit_insn_after (pattern, after);
2668 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2669 NOTE_LINE_NUMBER (from_line),
2673 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2674 NOTE_LINE_NUMBER (after_line),
2678 /* Make an insn of code JUMP_INSN with body PATTERN
2679 and output it after the insn AFTER. */
2682 emit_jump_insn_after (pattern, after)
2683 register rtx pattern, after;
2687 if (GET_CODE (pattern) == SEQUENCE)
2688 insn = emit_insn_after (pattern, after);
2691 insn = make_jump_insn_raw (pattern);
2692 add_insn_after (insn, after);
2698 /* Make an insn of code BARRIER
2699 and output it after the insn AFTER. */
2702 emit_barrier_after (after)
2705 register rtx insn = rtx_alloc (BARRIER);
2707 INSN_UID (insn) = cur_insn_uid++;
2709 add_insn_after (insn, after);
2713 /* Emit the label LABEL after the insn AFTER. */
2716 emit_label_after (label, after)
2719 /* This can be called twice for the same label
2720 as a result of the confusion that follows a syntax error!
2721 So make it harmless. */
2722 if (INSN_UID (label) == 0)
2724 INSN_UID (label) = cur_insn_uid++;
2725 add_insn_after (label, after);
2731 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2734 emit_note_after (subtype, after)
2738 register rtx note = rtx_alloc (NOTE);
2739 INSN_UID (note) = cur_insn_uid++;
2740 NOTE_SOURCE_FILE (note) = 0;
2741 NOTE_LINE_NUMBER (note) = subtype;
2742 add_insn_after (note, after);
2746 /* Emit a line note for FILE and LINE after the insn AFTER. */
2749 emit_line_note_after (file, line, after)
2756 if (no_line_numbers && line > 0)
2762 note = rtx_alloc (NOTE);
2763 INSN_UID (note) = cur_insn_uid++;
2764 NOTE_SOURCE_FILE (note) = file;
2765 NOTE_LINE_NUMBER (note) = line;
2766 add_insn_after (note, after);
2770 /* Make an insn of code INSN with pattern PATTERN
2771 and add it to the end of the doubly-linked list.
2772 If PATTERN is a SEQUENCE, take the elements of it
2773 and emit an insn for each element.
2775 Returns the last insn emitted. */
2781 rtx insn = last_insn;
2783 if (GET_CODE (pattern) == SEQUENCE)
2787 for (i = 0; i < XVECLEN (pattern, 0); i++)
2789 insn = XVECEXP (pattern, 0, i);
2792 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2793 sequence_result[XVECLEN (pattern, 0)] = pattern;
2797 insn = make_insn_raw (pattern);
2804 /* Emit the insns in a chain starting with INSN.
2805 Return the last insn emitted. */
2815 rtx next = NEXT_INSN (insn);
2824 /* Emit the insns in a chain starting with INSN and place them in front of
2825 the insn BEFORE. Return the last insn emitted. */
2828 emit_insns_before (insn, before)
2836 rtx next = NEXT_INSN (insn);
2837 add_insn_before (insn, before);
2845 /* Emit the insns in a chain starting with FIRST and place them in back of
2846 the insn AFTER. Return the last insn emitted. */
2849 emit_insns_after (first, after)
2854 register rtx after_after;
2862 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2865 after_after = NEXT_INSN (after);
2867 NEXT_INSN (after) = first;
2868 PREV_INSN (first) = after;
2869 NEXT_INSN (last) = after_after;
2871 PREV_INSN (after_after) = last;
2873 if (after == last_insn)
2878 /* Make an insn of code JUMP_INSN with pattern PATTERN
2879 and add it to the end of the doubly-linked list. */
2882 emit_jump_insn (pattern)
2885 if (GET_CODE (pattern) == SEQUENCE)
2886 return emit_insn (pattern);
2889 register rtx insn = make_jump_insn_raw (pattern);
2895 /* Make an insn of code CALL_INSN with pattern PATTERN
2896 and add it to the end of the doubly-linked list. */
2899 emit_call_insn (pattern)
2902 if (GET_CODE (pattern) == SEQUENCE)
2903 return emit_insn (pattern);
2906 register rtx insn = make_call_insn_raw (pattern);
2908 PUT_CODE (insn, CALL_INSN);
2913 /* Add the label LABEL to the end of the doubly-linked list. */
2919 /* This can be called twice for the same label
2920 as a result of the confusion that follows a syntax error!
2921 So make it harmless. */
2922 if (INSN_UID (label) == 0)
2924 INSN_UID (label) = cur_insn_uid++;
2930 /* Make an insn of code BARRIER
2931 and add it to the end of the doubly-linked list. */
2936 register rtx barrier = rtx_alloc (BARRIER);
2937 INSN_UID (barrier) = cur_insn_uid++;
2942 /* Make an insn of code NOTE
2943 with data-fields specified by FILE and LINE
2944 and add it to the end of the doubly-linked list,
2945 but only if line-numbers are desired for debugging info. */
2948 emit_line_note (file, line)
2952 emit_filename = file;
2956 if (no_line_numbers)
2960 return emit_note (file, line);
2963 /* Make an insn of code NOTE
2964 with data-fields specified by FILE and LINE
2965 and add it to the end of the doubly-linked list.
2966 If it is a line-number NOTE, omit it if it matches the previous one. */
2969 emit_note (file, line)
2977 if (file && last_filename && !strcmp (file, last_filename)
2978 && line == last_linenum)
2980 last_filename = file;
2981 last_linenum = line;
2984 if (no_line_numbers && line > 0)
2990 note = rtx_alloc (NOTE);
2991 INSN_UID (note) = cur_insn_uid++;
2992 NOTE_SOURCE_FILE (note) = file;
2993 NOTE_LINE_NUMBER (note) = line;
2998 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
3001 emit_line_note_force (file, line)
3006 return emit_line_note (file, line);
3009 /* Cause next statement to emit a line note even if the line number
3010 has not changed. This is used at the beginning of a function. */
3013 force_next_line_note ()
3018 /* Return an indication of which type of insn should have X as a body.
3019 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3025 if (GET_CODE (x) == CODE_LABEL)
3027 if (GET_CODE (x) == CALL)
3029 if (GET_CODE (x) == RETURN)
3031 if (GET_CODE (x) == SET)
3033 if (SET_DEST (x) == pc_rtx)
3035 else if (GET_CODE (SET_SRC (x)) == CALL)
3040 if (GET_CODE (x) == PARALLEL)
3043 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3044 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3046 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3047 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3049 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3050 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3056 /* Emit the rtl pattern X as an appropriate kind of insn.
3057 If X is a label, it is simply added into the insn chain. */
3063 enum rtx_code code = classify_insn (x);
3065 if (code == CODE_LABEL)
3066 return emit_label (x);
3067 else if (code == INSN)
3068 return emit_insn (x);
3069 else if (code == JUMP_INSN)
3071 register rtx insn = emit_jump_insn (x);
3072 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3073 return emit_barrier ();
3076 else if (code == CALL_INSN)
3077 return emit_call_insn (x);
3082 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3087 struct sequence_stack *tem;
3089 if (sequence_element_free_list)
3091 /* Reuse a previously-saved struct sequence_stack. */
3092 tem = sequence_element_free_list;
3093 sequence_element_free_list = tem->next;
3096 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3098 tem->next = sequence_stack;
3099 tem->first = first_insn;
3100 tem->last = last_insn;
3101 tem->sequence_rtl_expr = sequence_rtl_expr;
3103 sequence_stack = tem;
3109 /* Similarly, but indicate that this sequence will be placed in
3113 start_sequence_for_rtl_expr (t)
3118 sequence_rtl_expr = t;
3121 /* Set up the insn chain starting with FIRST
3122 as the current sequence, saving the previously current one. */
3125 push_to_sequence (first)
3132 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3138 /* Set up the outer-level insn chain
3139 as the current sequence, saving the previously current one. */
3142 push_topmost_sequence ()
3144 struct sequence_stack *stack, *top = NULL;
3148 for (stack = sequence_stack; stack; stack = stack->next)
3151 first_insn = top->first;
3152 last_insn = top->last;
3153 sequence_rtl_expr = top->sequence_rtl_expr;
3156 /* After emitting to the outer-level insn chain, update the outer-level
3157 insn chain, and restore the previous saved state. */
3160 pop_topmost_sequence ()
3162 struct sequence_stack *stack, *top = NULL;
3164 for (stack = sequence_stack; stack; stack = stack->next)
3167 top->first = first_insn;
3168 top->last = last_insn;
3169 /* ??? Why don't we save sequence_rtl_expr here? */
3174 /* After emitting to a sequence, restore previous saved state.
3176 To get the contents of the sequence just made,
3177 you must call `gen_sequence' *before* calling here. */
3182 struct sequence_stack *tem = sequence_stack;
3184 first_insn = tem->first;
3185 last_insn = tem->last;
3186 sequence_rtl_expr = tem->sequence_rtl_expr;
3187 sequence_stack = tem->next;
3189 tem->next = sequence_element_free_list;
3190 sequence_element_free_list = tem;
3193 /* Return 1 if currently emitting into a sequence. */
3198 return sequence_stack != 0;
3201 /* Generate a SEQUENCE rtx containing the insns already emitted
3202 to the current sequence.
3204 This is how the gen_... function from a DEFINE_EXPAND
3205 constructs the SEQUENCE that it returns. */
3215 /* Count the insns in the chain. */
3217 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3220 /* If only one insn, return its pattern rather than a SEQUENCE.
3221 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3222 the case of an empty list.) */
3224 && ! RTX_FRAME_RELATED_P (first_insn)
3225 && (GET_CODE (first_insn) == INSN
3226 || GET_CODE (first_insn) == JUMP_INSN
3227 /* Don't discard the call usage field. */
3228 || (GET_CODE (first_insn) == CALL_INSN
3229 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3231 NEXT_INSN (first_insn) = free_insn;
3232 free_insn = first_insn;
3233 return PATTERN (first_insn);
3236 /* Put them in a vector. See if we already have a SEQUENCE of the
3237 appropriate length around. */
3238 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3239 sequence_result[len] = 0;
3242 /* Ensure that this rtl goes in saveable_obstack, since we may
3244 push_obstacks_nochange ();
3245 rtl_in_saveable_obstack ();
3246 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3250 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3251 XVECEXP (result, 0, i) = tem;
3256 /* Initialize data structures and variables in this file
3257 before generating rtl for each function. */
3266 sequence_rtl_expr = NULL;
3268 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3271 first_label_num = label_num;
3273 sequence_stack = NULL;
3275 /* Clear the start_sequence/gen_sequence cache. */
3276 sequence_element_free_list = 0;
3277 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3278 sequence_result[i] = 0;
3281 /* Init the tables that describe all the pseudo regs. */
3283 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3286 = (char *) savealloc (regno_pointer_flag_length);
3287 bzero (regno_pointer_flag, regno_pointer_flag_length);
3290 = (char *) savealloc (regno_pointer_flag_length);
3291 bzero (regno_pointer_align, regno_pointer_flag_length);
3294 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3295 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3297 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3298 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3299 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3300 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3301 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3303 /* Indicate that the virtual registers and stack locations are
3305 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3306 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3307 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3308 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3310 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3311 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3312 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3313 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3315 #ifdef STACK_BOUNDARY
3316 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3317 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3318 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3319 = STACK_BOUNDARY / BITS_PER_UNIT;
3320 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3322 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3323 = STACK_BOUNDARY / BITS_PER_UNIT;
3324 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3325 = STACK_BOUNDARY / BITS_PER_UNIT;
3326 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3327 = STACK_BOUNDARY / BITS_PER_UNIT;
3328 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3329 = STACK_BOUNDARY / BITS_PER_UNIT;
3332 #ifdef INIT_EXPANDERS
3337 /* Create some permanent unique rtl objects shared between all functions.
3338 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3341 init_emit_once (line_numbers)
3345 enum machine_mode mode;
3347 no_line_numbers = ! line_numbers;
3349 sequence_stack = NULL;
3351 /* Compute the word and byte modes. */
3353 byte_mode = VOIDmode;
3354 word_mode = VOIDmode;
3356 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3357 mode = GET_MODE_WIDER_MODE (mode))
3359 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3360 && byte_mode == VOIDmode)
3363 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3364 && word_mode == VOIDmode)
3368 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3370 /* Create the unique rtx's for certain rtx codes and operand values. */
3372 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3374 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3375 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3376 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3379 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3380 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3381 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3383 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3385 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3386 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3387 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3388 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3390 for (i = 0; i <= 2; i++)
3392 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3393 mode = GET_MODE_WIDER_MODE (mode))
3395 rtx tem = rtx_alloc (CONST_DOUBLE);
3396 union real_extract u;
3398 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3399 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3401 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3402 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3403 PUT_MODE (tem, mode);
3405 const_tiny_rtx[i][(int) mode] = tem;
3408 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3410 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3411 mode = GET_MODE_WIDER_MODE (mode))
3412 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3414 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3416 mode = GET_MODE_WIDER_MODE (mode))
3417 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3420 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3421 mode = GET_MODE_WIDER_MODE (mode))
3422 const_tiny_rtx[0][(int) mode] = const0_rtx;
3425 /* Assign register numbers to the globally defined register rtx.
3426 This must be done at runtime because the register number field
3427 is in a union and some compilers can't initialize unions. */
3429 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3430 PUT_MODE (stack_pointer_rtx, Pmode);
3431 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3432 PUT_MODE (frame_pointer_rtx, Pmode);
3433 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3434 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3435 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3437 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3438 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3439 PUT_MODE (arg_pointer_rtx, Pmode);
3442 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3443 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3444 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3445 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3446 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3447 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3448 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3449 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3451 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3452 return_address_pointer_rtx
3453 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3457 struct_value_rtx = STRUCT_VALUE;
3459 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3462 #ifdef STRUCT_VALUE_INCOMING
3463 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3465 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3466 struct_value_incoming_rtx
3467 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3469 struct_value_incoming_rtx = struct_value_rtx;
3473 #ifdef STATIC_CHAIN_REGNUM
3474 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3476 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3477 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3478 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3481 static_chain_incoming_rtx = static_chain_rtx;
3485 static_chain_rtx = STATIC_CHAIN;
3487 #ifdef STATIC_CHAIN_INCOMING
3488 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3490 static_chain_incoming_rtx = static_chain_rtx;
3494 #ifdef PIC_OFFSET_TABLE_REGNUM
3495 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3499 /* Query and clear/ restore no_line_numbers. This is used by the
3500 switch / case handling in stmt.c to give proper line numbers in
3501 warnings about unreachable code. */
3504 force_line_numbers ()
3506 int old = no_line_numbers;
3508 no_line_numbers = 0;
3510 force_next_line_note ();
3515 restore_line_number_status (old_value)
3518 no_line_numbers = old_value;