1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconst3;
114 REAL_VALUE_TYPE dconst10;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconstm2;
117 REAL_VALUE_TYPE dconsthalf;
118 REAL_VALUE_TYPE dconstthird;
119 REAL_VALUE_TYPE dconstpi;
120 REAL_VALUE_TYPE dconste;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_int_htab;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
163 htab_t mem_attrs_htab;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
167 htab_t reg_attrs_htab;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
171 htab_t const_double_htab;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx make_jump_insn_raw (rtx);
180 static rtx make_call_insn_raw (rtx);
181 static rtx find_line_note (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void unshare_all_decls (tree);
184 static void reset_used_decls (tree);
185 static void mark_label_nuses (rtx);
186 static hashval_t const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx lookup_const_double (rtx);
191 static hashval_t mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
195 static hashval_t reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs *get_reg_attrs (tree, int);
198 static tree component_ref_for_mem_expr (tree);
199 static rtx gen_const_vector_0 (enum machine_mode);
200 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
202 /* Probability of the conditional branch currently proceeded by try_split.
203 Set to -1 otherwise. */
204 int split_branch_probability = -1;
206 /* Returns a hash code for X (which is a really a CONST_INT). */
209 const_int_htab_hash (const void *x)
211 return (hashval_t) INTVAL ((rtx) x);
214 /* Returns nonzero if the value represented by X (which is really a
215 CONST_INT) is the same as that given by Y (which is really a
219 const_int_htab_eq (const void *x, const void *y)
221 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
224 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
226 const_double_htab_hash (const void *x)
231 if (GET_MODE (value) == VOIDmode)
232 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
235 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
236 /* MODE is used in the comparison, so it should be in the hash. */
237 h ^= GET_MODE (value);
242 /* Returns nonzero if the value represented by X (really a ...)
243 is the same as that represented by Y (really a ...) */
245 const_double_htab_eq (const void *x, const void *y)
247 rtx a = (rtx)x, b = (rtx)y;
249 if (GET_MODE (a) != GET_MODE (b))
251 if (GET_MODE (a) == VOIDmode)
252 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
253 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
255 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
256 CONST_DOUBLE_REAL_VALUE (b));
259 /* Returns a hash code for X (which is a really a mem_attrs *). */
262 mem_attrs_htab_hash (const void *x)
264 mem_attrs *p = (mem_attrs *) x;
266 return (p->alias ^ (p->align * 1000)
267 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
268 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
272 /* Returns nonzero if the value represented by X (which is really a
273 mem_attrs *) is the same as that given by Y (which is also really a
277 mem_attrs_htab_eq (const void *x, const void *y)
279 mem_attrs *p = (mem_attrs *) x;
280 mem_attrs *q = (mem_attrs *) y;
282 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
283 && p->size == q->size && p->align == q->align);
286 /* Allocate a new mem_attrs structure and insert it into the hash table if
287 one identical to it is not already in the table. We are doing this for
291 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
292 unsigned int align, enum machine_mode mode)
297 /* If everything is the default, we can just return zero.
298 This must match what the corresponding MEM_* macros return when the
299 field is not present. */
300 if (alias == 0 && expr == 0 && offset == 0
302 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
303 && (STRICT_ALIGNMENT && mode != BLKmode
304 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
309 attrs.offset = offset;
313 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
316 *slot = ggc_alloc (sizeof (mem_attrs));
317 memcpy (*slot, &attrs, sizeof (mem_attrs));
323 /* Returns a hash code for X (which is a really a reg_attrs *). */
326 reg_attrs_htab_hash (const void *x)
328 reg_attrs *p = (reg_attrs *) x;
330 return ((p->offset * 1000) ^ (long) p->decl);
333 /* Returns nonzero if the value represented by X (which is really a
334 reg_attrs *) is the same as that given by Y (which is also really a
338 reg_attrs_htab_eq (const void *x, const void *y)
340 reg_attrs *p = (reg_attrs *) x;
341 reg_attrs *q = (reg_attrs *) y;
343 return (p->decl == q->decl && p->offset == q->offset);
345 /* Allocate a new reg_attrs structure and insert it into the hash table if
346 one identical to it is not already in the table. We are doing this for
350 get_reg_attrs (tree decl, int offset)
355 /* If everything is the default, we can just return zero. */
356 if (decl == 0 && offset == 0)
360 attrs.offset = offset;
362 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
365 *slot = ggc_alloc (sizeof (reg_attrs));
366 memcpy (*slot, &attrs, sizeof (reg_attrs));
372 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
373 don't attempt to share with the various global pieces of rtl (such as
374 frame_pointer_rtx). */
377 gen_raw_REG (enum machine_mode mode, int regno)
379 rtx x = gen_rtx_raw_REG (mode, regno);
380 ORIGINAL_REGNO (x) = regno;
384 /* There are some RTL codes that require special attention; the generation
385 functions do the raw handling. If you add to this list, modify
386 special_rtx in gengenrtl.c as well. */
389 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
393 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
394 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
396 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
397 if (const_true_rtx && arg == STORE_FLAG_VALUE)
398 return const_true_rtx;
401 /* Look up the CONST_INT in the hash table. */
402 slot = htab_find_slot_with_hash (const_int_htab, &arg,
403 (hashval_t) arg, INSERT);
405 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
411 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
413 return GEN_INT (trunc_int_for_mode (c, mode));
416 /* CONST_DOUBLEs might be created from pairs of integers, or from
417 REAL_VALUE_TYPEs. Also, their length is known only at run time,
418 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
420 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
421 hash table. If so, return its counterpart; otherwise add it
422 to the hash table and return it. */
424 lookup_const_double (rtx real)
426 void **slot = htab_find_slot (const_double_htab, real, INSERT);
433 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
434 VALUE in mode MODE. */
436 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
438 rtx real = rtx_alloc (CONST_DOUBLE);
439 PUT_MODE (real, mode);
441 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
443 return lookup_const_double (real);
446 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
447 of ints: I0 is the low-order word and I1 is the high-order word.
448 Do not use this routine for non-integer modes; convert to
449 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
452 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
457 if (mode != VOIDmode)
460 if (GET_MODE_CLASS (mode) != MODE_INT
461 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
462 /* We can get a 0 for an error mark. */
463 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
467 /* We clear out all bits that don't belong in MODE, unless they and
468 our sign bit are all one. So we get either a reasonable negative
469 value or a reasonable unsigned value for this mode. */
470 width = GET_MODE_BITSIZE (mode);
471 if (width < HOST_BITS_PER_WIDE_INT
472 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
473 != ((HOST_WIDE_INT) (-1) << (width - 1))))
474 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
475 else if (width == HOST_BITS_PER_WIDE_INT
476 && ! (i1 == ~0 && i0 < 0))
478 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
479 /* We cannot represent this value as a constant. */
482 /* If this would be an entire word for the target, but is not for
483 the host, then sign-extend on the host so that the number will
484 look the same way on the host that it would on the target.
486 For example, when building a 64 bit alpha hosted 32 bit sparc
487 targeted compiler, then we want the 32 bit unsigned value -1 to be
488 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
489 The latter confuses the sparc backend. */
491 if (width < HOST_BITS_PER_WIDE_INT
492 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
493 i0 |= ((HOST_WIDE_INT) (-1) << width);
495 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
498 ??? Strictly speaking, this is wrong if we create a CONST_INT for
499 a large unsigned constant with the size of MODE being
500 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
501 in a wider mode. In that case we will mis-interpret it as a
504 Unfortunately, the only alternative is to make a CONST_DOUBLE for
505 any constant in any mode if it is an unsigned constant larger
506 than the maximum signed integer in an int on the host. However,
507 doing this will break everyone that always expects to see a
508 CONST_INT for SImode and smaller.
510 We have always been making CONST_INTs in this case, so nothing
511 new is being broken. */
513 if (width <= HOST_BITS_PER_WIDE_INT)
514 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
517 /* If this integer fits in one word, return a CONST_INT. */
518 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
521 /* We use VOIDmode for integers. */
522 value = rtx_alloc (CONST_DOUBLE);
523 PUT_MODE (value, VOIDmode);
525 CONST_DOUBLE_LOW (value) = i0;
526 CONST_DOUBLE_HIGH (value) = i1;
528 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
529 XWINT (value, i) = 0;
531 return lookup_const_double (value);
535 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
537 /* In case the MD file explicitly references the frame pointer, have
538 all such references point to the same frame pointer. This is
539 used during frame pointer elimination to distinguish the explicit
540 references to these registers from pseudos that happened to be
543 If we have eliminated the frame pointer or arg pointer, we will
544 be using it as a normal register, for example as a spill
545 register. In such cases, we might be accessing it in a mode that
546 is not Pmode and therefore cannot use the pre-allocated rtx.
548 Also don't do this when we are making new REGs in reload, since
549 we don't want to get confused with the real pointers. */
551 if (mode == Pmode && !reload_in_progress)
553 if (regno == FRAME_POINTER_REGNUM
554 && (!reload_completed || frame_pointer_needed))
555 return frame_pointer_rtx;
556 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
557 if (regno == HARD_FRAME_POINTER_REGNUM
558 && (!reload_completed || frame_pointer_needed))
559 return hard_frame_pointer_rtx;
561 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
562 if (regno == ARG_POINTER_REGNUM)
563 return arg_pointer_rtx;
565 #ifdef RETURN_ADDRESS_POINTER_REGNUM
566 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
567 return return_address_pointer_rtx;
569 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
570 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
571 return pic_offset_table_rtx;
572 if (regno == STACK_POINTER_REGNUM)
573 return stack_pointer_rtx;
577 /* If the per-function register table has been set up, try to re-use
578 an existing entry in that table to avoid useless generation of RTL.
580 This code is disabled for now until we can fix the various backends
581 which depend on having non-shared hard registers in some cases. Long
582 term we want to re-enable this code as it can significantly cut down
583 on the amount of useless RTL that gets generated.
585 We'll also need to fix some code that runs after reload that wants to
586 set ORIGINAL_REGNO. */
591 && regno < FIRST_PSEUDO_REGISTER
592 && reg_raw_mode[regno] == mode)
593 return regno_reg_rtx[regno];
596 return gen_raw_REG (mode, regno);
600 gen_rtx_MEM (enum machine_mode mode, rtx addr)
602 rtx rt = gen_rtx_raw_MEM (mode, addr);
604 /* This field is not cleared by the mere allocation of the rtx, so
612 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
614 /* This is the most common failure type.
615 Catch it early so we can see who does it. */
616 if ((offset % GET_MODE_SIZE (mode)) != 0)
619 /* This check isn't usable right now because combine will
620 throw arbitrary crap like a CALL into a SUBREG in
621 gen_lowpart_for_combine so we must just eat it. */
623 /* Check for this too. */
624 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
627 return gen_rtx_raw_SUBREG (mode, reg, offset);
630 /* Generate a SUBREG representing the least-significant part of REG if MODE
631 is smaller than mode of REG, otherwise paradoxical SUBREG. */
634 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
636 enum machine_mode inmode;
638 inmode = GET_MODE (reg);
639 if (inmode == VOIDmode)
641 return gen_rtx_SUBREG (mode, reg,
642 subreg_lowpart_offset (mode, inmode));
645 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
647 ** This routine generates an RTX of the size specified by
648 ** <code>, which is an RTX code. The RTX structure is initialized
649 ** from the arguments <element1> through <elementn>, which are
650 ** interpreted according to the specific RTX type's format. The
651 ** special machine mode associated with the rtx (if any) is specified
654 ** gen_rtx can be invoked in a way which resembles the lisp-like
655 ** rtx it will generate. For example, the following rtx structure:
657 ** (plus:QI (mem:QI (reg:SI 1))
658 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
660 ** ...would be generated by the following C code:
662 ** gen_rtx (PLUS, QImode,
663 ** gen_rtx (MEM, QImode,
664 ** gen_rtx (REG, SImode, 1)),
665 ** gen_rtx (MEM, QImode,
666 ** gen_rtx (PLUS, SImode,
667 ** gen_rtx (REG, SImode, 2),
668 ** gen_rtx (REG, SImode, 3)))),
673 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
675 int i; /* Array indices... */
676 const char *fmt; /* Current rtx's format... */
677 rtx rt_val; /* RTX to return to caller... */
685 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
690 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
691 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
693 rt_val = immed_double_const (arg0, arg1, mode);
698 rt_val = gen_rtx_REG (mode, va_arg (p, int));
702 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
706 rt_val = rtx_alloc (code); /* Allocate the storage space. */
707 rt_val->mode = mode; /* Store the machine mode... */
709 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
710 for (i = 0; i < GET_RTX_LENGTH (code); i++)
714 case '0': /* Field with unknown use. Zero it. */
715 X0EXP (rt_val, i) = NULL_RTX;
718 case 'i': /* An integer? */
719 XINT (rt_val, i) = va_arg (p, int);
722 case 'w': /* A wide integer? */
723 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
726 case 's': /* A string? */
727 XSTR (rt_val, i) = va_arg (p, char *);
730 case 'e': /* An expression? */
731 case 'u': /* An insn? Same except when printing. */
732 XEXP (rt_val, i) = va_arg (p, rtx);
735 case 'E': /* An RTX vector? */
736 XVEC (rt_val, i) = va_arg (p, rtvec);
739 case 'b': /* A bitmap? */
740 XBITMAP (rt_val, i) = va_arg (p, bitmap);
743 case 't': /* A tree? */
744 XTREE (rt_val, i) = va_arg (p, tree);
758 /* gen_rtvec (n, [rt1, ..., rtn])
760 ** This routine creates an rtvec and stores within it the
761 ** pointers to rtx's which are its arguments.
766 gen_rtvec (int n, ...)
775 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
777 vector = alloca (n * sizeof (rtx));
779 for (i = 0; i < n; i++)
780 vector[i] = va_arg (p, rtx);
782 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
786 return gen_rtvec_v (save_n, vector);
790 gen_rtvec_v (int n, rtx *argp)
796 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
798 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
800 for (i = 0; i < n; i++)
801 rt_val->elem[i] = *argp++;
806 /* Generate a REG rtx for a new pseudo register of mode MODE.
807 This pseudo is assigned the next sequential register number. */
810 gen_reg_rtx (enum machine_mode mode)
812 struct function *f = cfun;
815 /* Don't let anything called after initial flow analysis create new
820 if (generating_concat_p
821 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
822 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
824 /* For complex modes, don't make a single pseudo.
825 Instead, make a CONCAT of two pseudos.
826 This allows noncontiguous allocation of the real and imaginary parts,
827 which makes much better code. Besides, allocating DCmode
828 pseudos overstrains reload on some machines like the 386. */
829 rtx realpart, imagpart;
830 enum machine_mode partmode = GET_MODE_INNER (mode);
832 realpart = gen_reg_rtx (partmode);
833 imagpart = gen_reg_rtx (partmode);
834 return gen_rtx_CONCAT (mode, realpart, imagpart);
837 /* Make sure regno_pointer_align, and regno_reg_rtx are large
838 enough to have an element for this pseudo reg number. */
840 if (reg_rtx_no == f->emit->regno_pointer_align_length)
842 int old_size = f->emit->regno_pointer_align_length;
846 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
847 memset (new + old_size, 0, old_size);
848 f->emit->regno_pointer_align = (unsigned char *) new;
850 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
851 old_size * 2 * sizeof (rtx));
852 memset (new1 + old_size, 0, old_size * sizeof (rtx));
853 regno_reg_rtx = new1;
855 f->emit->regno_pointer_align_length = old_size * 2;
858 val = gen_raw_REG (mode, reg_rtx_no);
859 regno_reg_rtx[reg_rtx_no++] = val;
863 /* Generate a register with same attributes as REG,
864 but offsetted by OFFSET. */
867 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
869 rtx new = gen_rtx_REG (mode, regno);
870 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
871 REG_OFFSET (reg) + offset);
875 /* Set the decl for MEM to DECL. */
878 set_reg_attrs_from_mem (rtx reg, rtx mem)
880 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
882 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
885 /* Set the register attributes for registers contained in PARM_RTX.
886 Use needed values from memory attributes of MEM. */
889 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
891 if (GET_CODE (parm_rtx) == REG)
892 set_reg_attrs_from_mem (parm_rtx, mem);
893 else if (GET_CODE (parm_rtx) == PARALLEL)
895 /* Check for a NULL entry in the first slot, used to indicate that the
896 parameter goes both on the stack and in registers. */
897 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
898 for (; i < XVECLEN (parm_rtx, 0); i++)
900 rtx x = XVECEXP (parm_rtx, 0, i);
901 if (GET_CODE (XEXP (x, 0)) == REG)
902 REG_ATTRS (XEXP (x, 0))
903 = get_reg_attrs (MEM_EXPR (mem),
904 INTVAL (XEXP (x, 1)));
909 /* Assign the RTX X to declaration T. */
911 set_decl_rtl (tree t, rtx x)
913 DECL_CHECK (t)->decl.rtl = x;
917 /* For register, we maintain the reverse information too. */
918 if (GET_CODE (x) == REG)
919 REG_ATTRS (x) = get_reg_attrs (t, 0);
920 else if (GET_CODE (x) == SUBREG)
921 REG_ATTRS (SUBREG_REG (x))
922 = get_reg_attrs (t, -SUBREG_BYTE (x));
923 if (GET_CODE (x) == CONCAT)
925 if (REG_P (XEXP (x, 0)))
926 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
927 if (REG_P (XEXP (x, 1)))
928 REG_ATTRS (XEXP (x, 1))
929 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
931 if (GET_CODE (x) == PARALLEL)
934 for (i = 0; i < XVECLEN (x, 0); i++)
936 rtx y = XVECEXP (x, 0, i);
937 if (REG_P (XEXP (y, 0)))
938 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
943 /* Identify REG (which may be a CONCAT) as a user register. */
946 mark_user_reg (rtx reg)
948 if (GET_CODE (reg) == CONCAT)
950 REG_USERVAR_P (XEXP (reg, 0)) = 1;
951 REG_USERVAR_P (XEXP (reg, 1)) = 1;
953 else if (GET_CODE (reg) == REG)
954 REG_USERVAR_P (reg) = 1;
959 /* Identify REG as a probable pointer register and show its alignment
960 as ALIGN, if nonzero. */
963 mark_reg_pointer (rtx reg, int align)
965 if (! REG_POINTER (reg))
967 REG_POINTER (reg) = 1;
970 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
972 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
973 /* We can no-longer be sure just how aligned this pointer is */
974 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
977 /* Return 1 plus largest pseudo reg number used in the current function. */
985 /* Return 1 + the largest label number used so far in the current function. */
990 if (last_label_num && label_num == base_label_num)
991 return last_label_num;
995 /* Return first label number used in this function (if any were used). */
998 get_first_label_num (void)
1000 return first_label_num;
1003 /* Return the final regno of X, which is a SUBREG of a hard
1006 subreg_hard_regno (rtx x, int check_mode)
1008 enum machine_mode mode = GET_MODE (x);
1009 unsigned int byte_offset, base_regno, final_regno;
1010 rtx reg = SUBREG_REG (x);
1012 /* This is where we attempt to catch illegal subregs
1013 created by the compiler. */
1014 if (GET_CODE (x) != SUBREG
1015 || GET_CODE (reg) != REG)
1017 base_regno = REGNO (reg);
1018 if (base_regno >= FIRST_PSEUDO_REGISTER)
1020 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1022 #ifdef ENABLE_CHECKING
1023 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1024 SUBREG_BYTE (x), mode))
1027 /* Catch non-congruent offsets too. */
1028 byte_offset = SUBREG_BYTE (x);
1029 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1032 final_regno = subreg_regno (x);
1037 /* Return a value representing some low-order bits of X, where the number
1038 of low-order bits is given by MODE. Note that no conversion is done
1039 between floating-point and fixed-point values, rather, the bit
1040 representation is returned.
1042 This function handles the cases in common between gen_lowpart, below,
1043 and two variants in cse.c and combine.c. These are the cases that can
1044 be safely handled at all points in the compilation.
1046 If this is not a case we can handle, return 0. */
1049 gen_lowpart_common (enum machine_mode mode, rtx x)
1051 int msize = GET_MODE_SIZE (mode);
1052 int xsize = GET_MODE_SIZE (GET_MODE (x));
1055 if (GET_MODE (x) == mode)
1058 /* MODE must occupy no more words than the mode of X. */
1059 if (GET_MODE (x) != VOIDmode
1060 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1061 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
1064 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1065 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1066 && GET_MODE (x) != VOIDmode && msize > xsize)
1069 offset = subreg_lowpart_offset (mode, GET_MODE (x));
1071 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1072 && (GET_MODE_CLASS (mode) == MODE_INT
1073 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1075 /* If we are getting the low-order part of something that has been
1076 sign- or zero-extended, we can either just use the object being
1077 extended or make a narrower extension. If we want an even smaller
1078 piece than the size of the object being extended, call ourselves
1081 This case is used mostly by combine and cse. */
1083 if (GET_MODE (XEXP (x, 0)) == mode)
1085 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1086 return gen_lowpart_common (mode, XEXP (x, 0));
1087 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
1088 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1090 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1091 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1092 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1093 else if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
1094 return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
1095 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1096 from the low-order part of the constant. */
1097 else if ((GET_MODE_CLASS (mode) == MODE_INT
1098 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1099 && GET_MODE (x) == VOIDmode
1100 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1102 /* If MODE is twice the host word size, X is already the desired
1103 representation. Otherwise, if MODE is wider than a word, we can't
1104 do this. If MODE is exactly a word, return just one CONST_INT. */
1106 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1108 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1110 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1111 return (GET_CODE (x) == CONST_INT ? x
1112 : GEN_INT (CONST_DOUBLE_LOW (x)));
1115 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1116 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1117 : CONST_DOUBLE_LOW (x));
1119 /* Sign extend to HOST_WIDE_INT. */
1120 val = trunc_int_for_mode (val, mode);
1122 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1127 /* The floating-point emulator can handle all conversions between
1128 FP and integer operands. This simplifies reload because it
1129 doesn't have to deal with constructs like (subreg:DI
1130 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1131 /* Single-precision floats are always 32-bits and double-precision
1132 floats are always 64-bits. */
1134 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1135 && GET_MODE_BITSIZE (mode) == 32
1136 && GET_CODE (x) == CONST_INT)
1139 long i = INTVAL (x);
1141 real_from_target (&r, &i, mode);
1142 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1144 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1145 && GET_MODE_BITSIZE (mode) == 64
1146 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1147 && GET_MODE (x) == VOIDmode)
1150 HOST_WIDE_INT low, high;
1153 if (GET_CODE (x) == CONST_INT)
1156 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1160 low = CONST_DOUBLE_LOW (x);
1161 high = CONST_DOUBLE_HIGH (x);
1164 if (HOST_BITS_PER_WIDE_INT > 32)
1165 high = low >> 31 >> 1;
1167 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1169 if (WORDS_BIG_ENDIAN)
1170 i[0] = high, i[1] = low;
1172 i[0] = low, i[1] = high;
1174 real_from_target (&r, i, mode);
1175 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1177 else if ((GET_MODE_CLASS (mode) == MODE_INT
1178 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1179 && GET_CODE (x) == CONST_DOUBLE
1180 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1183 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1184 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1186 /* Convert 'r' into an array of four 32-bit words in target word
1188 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1189 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1192 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1195 i[3 - 3 * endian] = 0;
1198 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1199 i[2 - 2 * endian] = 0;
1200 i[3 - 2 * endian] = 0;
1203 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1204 i[3 - 3 * endian] = 0;
1207 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1212 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1214 #if HOST_BITS_PER_WIDE_INT == 32
1215 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1217 if (HOST_BITS_PER_WIDE_INT != 64)
1220 return immed_double_const ((((unsigned long) i[3 * endian])
1221 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1222 (((unsigned long) i[2 - endian])
1223 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1227 /* If MODE is a condition code and X is a CONST_INT, the value of X
1228 must already have been "recognized" by the back-end, and we can
1229 assume that it is valid for this mode. */
1230 else if (GET_MODE_CLASS (mode) == MODE_CC
1231 && GET_CODE (x) == CONST_INT)
1234 /* Otherwise, we can't do this. */
1238 /* Return the constant real or imaginary part (which has mode MODE)
1239 of a complex value X. The IMAGPART_P argument determines whether
1240 the real or complex component should be returned. This function
1241 returns NULL_RTX if the component isn't a constant. */
1244 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1248 if (GET_CODE (x) == MEM
1249 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1251 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1252 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1254 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1255 if (TREE_CODE (part) == REAL_CST
1256 || TREE_CODE (part) == INTEGER_CST)
1257 return expand_expr (part, NULL_RTX, mode, 0);
1263 /* Return the real part (which has mode MODE) of a complex value X.
1264 This always comes at the low address in memory. */
1267 gen_realpart (enum machine_mode mode, rtx x)
1271 /* Handle complex constants. */
1272 part = gen_complex_constant_part (mode, x, 0);
1273 if (part != NULL_RTX)
1276 if (WORDS_BIG_ENDIAN
1277 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1279 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1281 ("can't access real part of complex value in hard register");
1282 else if (WORDS_BIG_ENDIAN)
1283 return gen_highpart (mode, x);
1285 return gen_lowpart (mode, x);
1288 /* Return the imaginary part (which has mode MODE) of a complex value X.
1289 This always comes at the high address in memory. */
1292 gen_imagpart (enum machine_mode mode, rtx x)
1296 /* Handle complex constants. */
1297 part = gen_complex_constant_part (mode, x, 1);
1298 if (part != NULL_RTX)
1301 if (WORDS_BIG_ENDIAN)
1302 return gen_lowpart (mode, x);
1303 else if (! WORDS_BIG_ENDIAN
1304 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1306 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1308 ("can't access imaginary part of complex value in hard register");
1310 return gen_highpart (mode, x);
1313 /* Return 1 iff X, assumed to be a SUBREG,
1314 refers to the real part of the complex value in its containing reg.
1315 Complex values are always stored with the real part in the first word,
1316 regardless of WORDS_BIG_ENDIAN. */
1319 subreg_realpart_p (rtx x)
1321 if (GET_CODE (x) != SUBREG)
1324 return ((unsigned int) SUBREG_BYTE (x)
1325 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1328 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1329 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1330 least-significant part of X.
1331 MODE specifies how big a part of X to return;
1332 it usually should not be larger than a word.
1333 If X is a MEM whose address is a QUEUED, the value may be so also. */
1336 gen_lowpart (enum machine_mode mode, rtx x)
1338 rtx result = gen_lowpart_common (mode, x);
1342 else if (GET_CODE (x) == REG)
1344 /* Must be a hard reg that's not valid in MODE. */
1345 result = gen_lowpart_common (mode, copy_to_reg (x));
1350 else if (GET_CODE (x) == MEM)
1352 /* The only additional case we can do is MEM. */
1355 /* The following exposes the use of "x" to CSE. */
1356 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1357 && SCALAR_INT_MODE_P (GET_MODE (x))
1358 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1359 GET_MODE_BITSIZE (GET_MODE (x)))
1360 && ! no_new_pseudos)
1361 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1363 if (WORDS_BIG_ENDIAN)
1364 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1365 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1367 if (BYTES_BIG_ENDIAN)
1368 /* Adjust the address so that the address-after-the-data
1370 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1371 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1373 return adjust_address (x, mode, offset);
1375 else if (GET_CODE (x) == ADDRESSOF)
1376 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1381 /* Like `gen_lowpart', but refer to the most significant part.
1382 This is used to access the imaginary part of a complex number. */
1385 gen_highpart (enum machine_mode mode, rtx x)
1387 unsigned int msize = GET_MODE_SIZE (mode);
1390 /* This case loses if X is a subreg. To catch bugs early,
1391 complain if an invalid MODE is used even in other cases. */
1392 if (msize > UNITS_PER_WORD
1393 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1396 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1397 subreg_highpart_offset (mode, GET_MODE (x)));
1399 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1400 the target if we have a MEM. gen_highpart must return a valid operand,
1401 emitting code if necessary to do so. */
1402 if (result != NULL_RTX && GET_CODE (result) == MEM)
1403 result = validize_mem (result);
1410 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1411 be VOIDmode constant. */
1413 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1415 if (GET_MODE (exp) != VOIDmode)
1417 if (GET_MODE (exp) != innermode)
1419 return gen_highpart (outermode, exp);
1421 return simplify_gen_subreg (outermode, exp, innermode,
1422 subreg_highpart_offset (outermode, innermode));
1425 /* Return offset in bytes to get OUTERMODE low part
1426 of the value in mode INNERMODE stored in memory in target format. */
1429 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1431 unsigned int offset = 0;
1432 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1436 if (WORDS_BIG_ENDIAN)
1437 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1438 if (BYTES_BIG_ENDIAN)
1439 offset += difference % UNITS_PER_WORD;
1445 /* Return offset in bytes to get OUTERMODE high part
1446 of the value in mode INNERMODE stored in memory in target format. */
1448 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1450 unsigned int offset = 0;
1451 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1453 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1458 if (! WORDS_BIG_ENDIAN)
1459 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1460 if (! BYTES_BIG_ENDIAN)
1461 offset += difference % UNITS_PER_WORD;
1467 /* Return 1 iff X, assumed to be a SUBREG,
1468 refers to the least significant part of its containing reg.
1469 If X is not a SUBREG, always return 1 (it is its own low part!). */
1472 subreg_lowpart_p (rtx x)
1474 if (GET_CODE (x) != SUBREG)
1476 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1479 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1480 == SUBREG_BYTE (x));
1484 /* Helper routine for all the constant cases of operand_subword.
1485 Some places invoke this directly. */
1488 constant_subword (rtx op, int offset, enum machine_mode mode)
1490 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1493 /* If OP is already an integer word, return it. */
1494 if (GET_MODE_CLASS (mode) == MODE_INT
1495 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1498 /* The output is some bits, the width of the target machine's word.
1499 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1501 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1502 && GET_MODE_CLASS (mode) == MODE_FLOAT
1503 && GET_MODE_BITSIZE (mode) == 64
1504 && GET_CODE (op) == CONST_DOUBLE)
1509 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1510 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1512 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1513 which the words are written depends on the word endianness.
1514 ??? This is a potential portability problem and should
1515 be fixed at some point.
1517 We must exercise caution with the sign bit. By definition there
1518 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1519 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1520 So we explicitly mask and sign-extend as necessary. */
1521 if (BITS_PER_WORD == 32)
1524 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1525 return GEN_INT (val);
1527 #if HOST_BITS_PER_WIDE_INT >= 64
1528 else if (BITS_PER_WORD >= 64 && offset == 0)
1530 val = k[! WORDS_BIG_ENDIAN];
1531 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1532 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1533 return GEN_INT (val);
1536 else if (BITS_PER_WORD == 16)
1538 val = k[offset >> 1];
1539 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1541 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1542 return GEN_INT (val);
1547 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1548 && GET_MODE_CLASS (mode) == MODE_FLOAT
1549 && GET_MODE_BITSIZE (mode) > 64
1550 && GET_CODE (op) == CONST_DOUBLE)
1555 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1556 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1558 if (BITS_PER_WORD == 32)
1561 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1562 return GEN_INT (val);
1564 #if HOST_BITS_PER_WIDE_INT >= 64
1565 else if (BITS_PER_WORD >= 64 && offset <= 1)
1567 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1568 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1569 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1570 return GEN_INT (val);
1577 /* Single word float is a little harder, since single- and double-word
1578 values often do not have the same high-order bits. We have already
1579 verified that we want the only defined word of the single-word value. */
1580 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1581 && GET_MODE_BITSIZE (mode) == 32
1582 && GET_CODE (op) == CONST_DOUBLE)
1587 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1588 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1590 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1592 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1594 if (BITS_PER_WORD == 16)
1596 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1598 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1601 return GEN_INT (val);
1604 /* The only remaining cases that we can handle are integers.
1605 Convert to proper endianness now since these cases need it.
1606 At this point, offset == 0 means the low-order word.
1608 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1609 in general. However, if OP is (const_int 0), we can just return
1612 if (op == const0_rtx)
1615 if (GET_MODE_CLASS (mode) != MODE_INT
1616 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1617 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1620 if (WORDS_BIG_ENDIAN)
1621 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1623 /* Find out which word on the host machine this value is in and get
1624 it from the constant. */
1625 val = (offset / size_ratio == 0
1626 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1627 : (GET_CODE (op) == CONST_INT
1628 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1630 /* Get the value we want into the low bits of val. */
1631 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1632 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1634 val = trunc_int_for_mode (val, word_mode);
1636 return GEN_INT (val);
1639 /* Return subword OFFSET of operand OP.
1640 The word number, OFFSET, is interpreted as the word number starting
1641 at the low-order address. OFFSET 0 is the low-order word if not
1642 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1644 If we cannot extract the required word, we return zero. Otherwise,
1645 an rtx corresponding to the requested word will be returned.
1647 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1648 reload has completed, a valid address will always be returned. After
1649 reload, if a valid address cannot be returned, we return zero.
1651 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1652 it is the responsibility of the caller.
1654 MODE is the mode of OP in case it is a CONST_INT.
1656 ??? This is still rather broken for some cases. The problem for the
1657 moment is that all callers of this thing provide no 'goal mode' to
1658 tell us to work with. This exists because all callers were written
1659 in a word based SUBREG world.
1660 Now use of this function can be deprecated by simplify_subreg in most
1665 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1667 if (mode == VOIDmode)
1668 mode = GET_MODE (op);
1670 if (mode == VOIDmode)
1673 /* If OP is narrower than a word, fail. */
1675 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1678 /* If we want a word outside OP, return zero. */
1680 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1683 /* Form a new MEM at the requested address. */
1684 if (GET_CODE (op) == MEM)
1686 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1688 if (! validate_address)
1691 else if (reload_completed)
1693 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1697 return replace_equiv_address (new, XEXP (new, 0));
1700 /* Rest can be handled by simplify_subreg. */
1701 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1704 /* Similar to `operand_subword', but never return 0. If we can't extract
1705 the required subword, put OP into a register and try again. If that fails,
1706 abort. We always validate the address in this case.
1708 MODE is the mode of OP, in case it is CONST_INT. */
1711 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1713 rtx result = operand_subword (op, offset, 1, mode);
1718 if (mode != BLKmode && mode != VOIDmode)
1720 /* If this is a register which can not be accessed by words, copy it
1721 to a pseudo register. */
1722 if (GET_CODE (op) == REG)
1723 op = copy_to_reg (op);
1725 op = force_reg (mode, op);
1728 result = operand_subword (op, offset, 1, mode);
1735 /* Given a compare instruction, swap the operands.
1736 A test instruction is changed into a compare of 0 against the operand. */
1739 reverse_comparison (rtx insn)
1741 rtx body = PATTERN (insn);
1744 if (GET_CODE (body) == SET)
1745 comp = SET_SRC (body);
1747 comp = SET_SRC (XVECEXP (body, 0, 0));
1749 if (GET_CODE (comp) == COMPARE)
1751 rtx op0 = XEXP (comp, 0);
1752 rtx op1 = XEXP (comp, 1);
1753 XEXP (comp, 0) = op1;
1754 XEXP (comp, 1) = op0;
1758 rtx new = gen_rtx_COMPARE (VOIDmode,
1759 CONST0_RTX (GET_MODE (comp)), comp);
1760 if (GET_CODE (body) == SET)
1761 SET_SRC (body) = new;
1763 SET_SRC (XVECEXP (body, 0, 0)) = new;
1767 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1768 or (2) a component ref of something variable. Represent the later with
1769 a NULL expression. */
1772 component_ref_for_mem_expr (tree ref)
1774 tree inner = TREE_OPERAND (ref, 0);
1776 if (TREE_CODE (inner) == COMPONENT_REF)
1777 inner = component_ref_for_mem_expr (inner);
1780 tree placeholder_ptr = 0;
1782 /* Now remove any conversions: they don't change what the underlying
1783 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1784 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1785 || TREE_CODE (inner) == NON_LVALUE_EXPR
1786 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1787 || TREE_CODE (inner) == SAVE_EXPR
1788 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1789 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1790 inner = find_placeholder (inner, &placeholder_ptr);
1792 inner = TREE_OPERAND (inner, 0);
1794 if (! DECL_P (inner))
1798 if (inner == TREE_OPERAND (ref, 0))
1801 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1802 TREE_OPERAND (ref, 1));
1805 /* Given REF, a MEM, and T, either the type of X or the expression
1806 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1807 if we are making a new object of this type. BITPOS is nonzero if
1808 there is an offset outstanding on T that will be applied later. */
1811 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1812 HOST_WIDE_INT bitpos)
1814 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1815 tree expr = MEM_EXPR (ref);
1816 rtx offset = MEM_OFFSET (ref);
1817 rtx size = MEM_SIZE (ref);
1818 unsigned int align = MEM_ALIGN (ref);
1819 HOST_WIDE_INT apply_bitpos = 0;
1822 /* It can happen that type_for_mode was given a mode for which there
1823 is no language-level type. In which case it returns NULL, which
1828 type = TYPE_P (t) ? t : TREE_TYPE (t);
1829 if (type == error_mark_node)
1832 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1833 wrong answer, as it assumes that DECL_RTL already has the right alias
1834 info. Callers should not set DECL_RTL until after the call to
1835 set_mem_attributes. */
1836 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1839 /* Get the alias set from the expression or type (perhaps using a
1840 front-end routine) and use it. */
1841 alias = get_alias_set (t);
1843 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1844 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1845 RTX_UNCHANGING_P (ref)
1846 |= ((lang_hooks.honor_readonly
1847 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1848 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1850 /* If we are making an object of this type, or if this is a DECL, we know
1851 that it is a scalar if the type is not an aggregate. */
1852 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1853 MEM_SCALAR_P (ref) = 1;
1855 /* We can set the alignment from the type if we are making an object,
1856 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1857 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1858 align = MAX (align, TYPE_ALIGN (type));
1860 /* If the size is known, we can set that. */
1861 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1862 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1864 /* If T is not a type, we may be able to deduce some more information about
1868 maybe_set_unchanging (ref, t);
1869 if (TREE_THIS_VOLATILE (t))
1870 MEM_VOLATILE_P (ref) = 1;
1872 /* Now remove any conversions: they don't change what the underlying
1873 object is. Likewise for SAVE_EXPR. */
1874 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1875 || TREE_CODE (t) == NON_LVALUE_EXPR
1876 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1877 || TREE_CODE (t) == SAVE_EXPR)
1878 t = TREE_OPERAND (t, 0);
1880 /* If this expression can't be addressed (e.g., it contains a reference
1881 to a non-addressable field), show we don't change its alias set. */
1882 if (! can_address_p (t))
1883 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1885 /* If this is a decl, set the attributes of the MEM from it. */
1889 offset = const0_rtx;
1890 apply_bitpos = bitpos;
1891 size = (DECL_SIZE_UNIT (t)
1892 && host_integerp (DECL_SIZE_UNIT (t), 1)
1893 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1894 align = DECL_ALIGN (t);
1897 /* If this is a constant, we know the alignment. */
1898 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1900 align = TYPE_ALIGN (type);
1901 #ifdef CONSTANT_ALIGNMENT
1902 align = CONSTANT_ALIGNMENT (t, align);
1906 /* If this is a field reference and not a bit-field, record it. */
1907 /* ??? There is some information that can be gleened from bit-fields,
1908 such as the word offset in the structure that might be modified.
1909 But skip it for now. */
1910 else if (TREE_CODE (t) == COMPONENT_REF
1911 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1913 expr = component_ref_for_mem_expr (t);
1914 offset = const0_rtx;
1915 apply_bitpos = bitpos;
1916 /* ??? Any reason the field size would be different than
1917 the size we got from the type? */
1920 /* If this is an array reference, look for an outer field reference. */
1921 else if (TREE_CODE (t) == ARRAY_REF)
1923 tree off_tree = size_zero_node;
1924 /* We can't modify t, because we use it at the end of the
1930 tree index = TREE_OPERAND (t2, 1);
1931 tree array = TREE_OPERAND (t2, 0);
1932 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1933 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1934 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1936 /* We assume all arrays have sizes that are a multiple of a byte.
1937 First subtract the lower bound, if any, in the type of the
1938 index, then convert to sizetype and multiply by the size of the
1940 if (low_bound != 0 && ! integer_zerop (low_bound))
1941 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1944 /* If the index has a self-referential type, pass it to a
1945 WITH_RECORD_EXPR; if the component size is, pass our
1946 component to one. */
1947 if (CONTAINS_PLACEHOLDER_P (index))
1948 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1949 if (CONTAINS_PLACEHOLDER_P (unit_size))
1950 unit_size = build (WITH_RECORD_EXPR, sizetype,
1954 = fold (build (PLUS_EXPR, sizetype,
1955 fold (build (MULT_EXPR, sizetype,
1959 t2 = TREE_OPERAND (t2, 0);
1961 while (TREE_CODE (t2) == ARRAY_REF);
1967 if (host_integerp (off_tree, 1))
1969 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1970 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1971 align = DECL_ALIGN (t2);
1972 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1974 offset = GEN_INT (ioff);
1975 apply_bitpos = bitpos;
1978 else if (TREE_CODE (t2) == COMPONENT_REF)
1980 expr = component_ref_for_mem_expr (t2);
1981 if (host_integerp (off_tree, 1))
1983 offset = GEN_INT (tree_low_cst (off_tree, 1));
1984 apply_bitpos = bitpos;
1986 /* ??? Any reason the field size would be different than
1987 the size we got from the type? */
1989 else if (flag_argument_noalias > 1
1990 && TREE_CODE (t2) == INDIRECT_REF
1991 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1998 /* If this is a Fortran indirect argument reference, record the
2000 else if (flag_argument_noalias > 1
2001 && TREE_CODE (t) == INDIRECT_REF
2002 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
2009 /* If we modified OFFSET based on T, then subtract the outstanding
2010 bit position offset. Similarly, increase the size of the accessed
2011 object to contain the negative offset. */
2014 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
2016 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
2019 /* Now set the attributes we computed above. */
2021 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
2023 /* If this is already known to be a scalar or aggregate, we are done. */
2024 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
2027 /* If it is a reference into an aggregate, this is part of an aggregate.
2028 Otherwise we don't know. */
2029 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
2030 || TREE_CODE (t) == ARRAY_RANGE_REF
2031 || TREE_CODE (t) == BIT_FIELD_REF)
2032 MEM_IN_STRUCT_P (ref) = 1;
2036 set_mem_attributes (rtx ref, tree t, int objectp)
2038 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2041 /* Set the decl for MEM to DECL. */
2044 set_mem_attrs_from_reg (rtx mem, rtx reg)
2047 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
2048 GEN_INT (REG_OFFSET (reg)),
2049 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2052 /* Set the alias set of MEM to SET. */
2055 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
2057 #ifdef ENABLE_CHECKING
2058 /* If the new and old alias sets don't conflict, something is wrong. */
2059 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
2063 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
2064 MEM_SIZE (mem), MEM_ALIGN (mem),
2068 /* Set the alignment of MEM to ALIGN bits. */
2071 set_mem_align (rtx mem, unsigned int align)
2073 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2074 MEM_OFFSET (mem), MEM_SIZE (mem), align,
2078 /* Set the expr for MEM to EXPR. */
2081 set_mem_expr (rtx mem, tree expr)
2084 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
2085 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2088 /* Set the offset of MEM to OFFSET. */
2091 set_mem_offset (rtx mem, rtx offset)
2093 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2094 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
2098 /* Set the size of MEM to SIZE. */
2101 set_mem_size (rtx mem, rtx size)
2103 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2104 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
2108 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2109 and its address changed to ADDR. (VOIDmode means don't change the mode.
2110 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2111 returned memory location is required to be valid. The memory
2112 attributes are not changed. */
2115 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
2119 if (GET_CODE (memref) != MEM)
2121 if (mode == VOIDmode)
2122 mode = GET_MODE (memref);
2124 addr = XEXP (memref, 0);
2128 if (reload_in_progress || reload_completed)
2130 if (! memory_address_p (mode, addr))
2134 addr = memory_address (mode, addr);
2137 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2140 new = gen_rtx_MEM (mode, addr);
2141 MEM_COPY_ATTRIBUTES (new, memref);
2145 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2146 way we are changing MEMREF, so we only preserve the alias set. */
2149 change_address (rtx memref, enum machine_mode mode, rtx addr)
2151 rtx new = change_address_1 (memref, mode, addr, 1);
2152 enum machine_mode mmode = GET_MODE (new);
2155 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2156 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2157 (mmode == BLKmode ? BITS_PER_UNIT
2158 : GET_MODE_ALIGNMENT (mmode)),
2164 /* Return a memory reference like MEMREF, but with its mode changed
2165 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2166 nonzero, the memory address is forced to be valid.
2167 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2168 and caller is responsible for adjusting MEMREF base register. */
2171 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2172 int validate, int adjust)
2174 rtx addr = XEXP (memref, 0);
2176 rtx memoffset = MEM_OFFSET (memref);
2178 unsigned int memalign = MEM_ALIGN (memref);
2180 /* ??? Prefer to create garbage instead of creating shared rtl.
2181 This may happen even if offset is nonzero -- consider
2182 (plus (plus reg reg) const_int) -- so do this always. */
2183 addr = copy_rtx (addr);
2187 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2188 object, we can merge it into the LO_SUM. */
2189 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2191 && (unsigned HOST_WIDE_INT) offset
2192 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2193 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2194 plus_constant (XEXP (addr, 1), offset));
2196 addr = plus_constant (addr, offset);
2199 new = change_address_1 (memref, mode, addr, validate);
2201 /* Compute the new values of the memory attributes due to this adjustment.
2202 We add the offsets and update the alignment. */
2204 memoffset = GEN_INT (offset + INTVAL (memoffset));
2206 /* Compute the new alignment by taking the MIN of the alignment and the
2207 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2212 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2214 /* We can compute the size in a number of ways. */
2215 if (GET_MODE (new) != BLKmode)
2216 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2217 else if (MEM_SIZE (memref))
2218 size = plus_constant (MEM_SIZE (memref), -offset);
2220 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2221 memoffset, size, memalign, GET_MODE (new));
2223 /* At some point, we should validate that this offset is within the object,
2224 if all the appropriate values are known. */
2228 /* Return a memory reference like MEMREF, but with its mode changed
2229 to MODE and its address changed to ADDR, which is assumed to be
2230 MEMREF offseted by OFFSET bytes. If VALIDATE is
2231 nonzero, the memory address is forced to be valid. */
2234 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2235 HOST_WIDE_INT offset, int validate)
2237 memref = change_address_1 (memref, VOIDmode, addr, validate);
2238 return adjust_address_1 (memref, mode, offset, validate, 0);
2241 /* Return a memory reference like MEMREF, but whose address is changed by
2242 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2243 known to be in OFFSET (possibly 1). */
2246 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2248 rtx new, addr = XEXP (memref, 0);
2250 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2252 /* At this point we don't know _why_ the address is invalid. It
2253 could have secondary memory references, multiplies or anything.
2255 However, if we did go and rearrange things, we can wind up not
2256 being able to recognize the magic around pic_offset_table_rtx.
2257 This stuff is fragile, and is yet another example of why it is
2258 bad to expose PIC machinery too early. */
2259 if (! memory_address_p (GET_MODE (memref), new)
2260 && GET_CODE (addr) == PLUS
2261 && XEXP (addr, 0) == pic_offset_table_rtx)
2263 addr = force_reg (GET_MODE (addr), addr);
2264 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2267 update_temp_slot_address (XEXP (memref, 0), new);
2268 new = change_address_1 (memref, VOIDmode, new, 1);
2270 /* Update the alignment to reflect the offset. Reset the offset, which
2273 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2274 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2279 /* Return a memory reference like MEMREF, but with its address changed to
2280 ADDR. The caller is asserting that the actual piece of memory pointed
2281 to is the same, just the form of the address is being changed, such as
2282 by putting something into a register. */
2285 replace_equiv_address (rtx memref, rtx addr)
2287 /* change_address_1 copies the memory attribute structure without change
2288 and that's exactly what we want here. */
2289 update_temp_slot_address (XEXP (memref, 0), addr);
2290 return change_address_1 (memref, VOIDmode, addr, 1);
2293 /* Likewise, but the reference is not required to be valid. */
2296 replace_equiv_address_nv (rtx memref, rtx addr)
2298 return change_address_1 (memref, VOIDmode, addr, 0);
2301 /* Return a memory reference like MEMREF, but with its mode widened to
2302 MODE and offset by OFFSET. This would be used by targets that e.g.
2303 cannot issue QImode memory operations and have to use SImode memory
2304 operations plus masking logic. */
2307 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2309 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2310 tree expr = MEM_EXPR (new);
2311 rtx memoffset = MEM_OFFSET (new);
2312 unsigned int size = GET_MODE_SIZE (mode);
2314 /* If we don't know what offset we were at within the expression, then
2315 we can't know if we've overstepped the bounds. */
2321 if (TREE_CODE (expr) == COMPONENT_REF)
2323 tree field = TREE_OPERAND (expr, 1);
2325 if (! DECL_SIZE_UNIT (field))
2331 /* Is the field at least as large as the access? If so, ok,
2332 otherwise strip back to the containing structure. */
2333 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2334 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2335 && INTVAL (memoffset) >= 0)
2338 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2344 expr = TREE_OPERAND (expr, 0);
2345 memoffset = (GEN_INT (INTVAL (memoffset)
2346 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2347 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2350 /* Similarly for the decl. */
2351 else if (DECL_P (expr)
2352 && DECL_SIZE_UNIT (expr)
2353 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2354 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2355 && (! memoffset || INTVAL (memoffset) >= 0))
2359 /* The widened memory access overflows the expression, which means
2360 that it could alias another expression. Zap it. */
2367 memoffset = NULL_RTX;
2369 /* The widened memory may alias other stuff, so zap the alias set. */
2370 /* ??? Maybe use get_alias_set on any remaining expression. */
2372 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2373 MEM_ALIGN (new), mode);
2378 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2381 gen_label_rtx (void)
2383 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2384 NULL, label_num++, NULL);
2387 /* For procedure integration. */
2389 /* Install new pointers to the first and last insns in the chain.
2390 Also, set cur_insn_uid to one higher than the last in use.
2391 Used for an inline-procedure after copying the insn chain. */
2394 set_new_first_and_last_insn (rtx first, rtx last)
2402 for (insn = first; insn; insn = NEXT_INSN (insn))
2403 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2408 /* Set the range of label numbers found in the current function.
2409 This is used when belatedly compiling an inline function. */
2412 set_new_first_and_last_label_num (int first, int last)
2414 base_label_num = label_num;
2415 first_label_num = first;
2416 last_label_num = last;
2419 /* Set the last label number found in the current function.
2420 This is used when belatedly compiling an inline function. */
2423 set_new_last_label_num (int last)
2425 base_label_num = label_num;
2426 last_label_num = last;
2429 /* Restore all variables describing the current status from the structure *P.
2430 This is used after a nested function. */
2433 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2438 /* Go through all the RTL insn bodies and copy any invalid shared
2439 structure. This routine should only be called once. */
2442 unshare_all_rtl (tree fndecl, rtx insn)
2446 /* Make sure that virtual parameters are not shared. */
2447 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2448 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2450 /* Make sure that virtual stack slots are not shared. */
2451 unshare_all_decls (DECL_INITIAL (fndecl));
2453 /* Unshare just about everything else. */
2454 unshare_all_rtl_in_chain (insn);
2456 /* Make sure the addresses of stack slots found outside the insn chain
2457 (such as, in DECL_RTL of a variable) are not shared
2458 with the insn chain.
2460 This special care is necessary when the stack slot MEM does not
2461 actually appear in the insn chain. If it does appear, its address
2462 is unshared from all else at that point. */
2463 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2466 /* Go through all the RTL insn bodies and copy any invalid shared
2467 structure, again. This is a fairly expensive thing to do so it
2468 should be done sparingly. */
2471 unshare_all_rtl_again (rtx insn)
2476 for (p = insn; p; p = NEXT_INSN (p))
2479 reset_used_flags (PATTERN (p));
2480 reset_used_flags (REG_NOTES (p));
2481 reset_used_flags (LOG_LINKS (p));
2484 /* Make sure that virtual stack slots are not shared. */
2485 reset_used_decls (DECL_INITIAL (cfun->decl));
2487 /* Make sure that virtual parameters are not shared. */
2488 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2489 reset_used_flags (DECL_RTL (decl));
2491 reset_used_flags (stack_slot_list);
2493 unshare_all_rtl (cfun->decl, insn);
2496 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2497 Recursively does the same for subexpressions. */
2500 verify_rtx_sharing (rtx orig, rtx insn)
2505 const char *format_ptr;
2510 code = GET_CODE (x);
2512 /* These types may be freely shared. */
2527 /* SCRATCH must be shared because they represent distinct values. */
2531 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2532 a LABEL_REF, it isn't sharable. */
2533 if (GET_CODE (XEXP (x, 0)) == PLUS
2534 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2535 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2540 /* A MEM is allowed to be shared if its address is constant. */
2541 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2542 || reload_completed || reload_in_progress)
2551 /* This rtx may not be shared. If it has already been seen,
2552 replace it with a copy of itself. */
2554 if (RTX_FLAG (x, used))
2556 error ("Invalid rtl sharing found in the insn");
2558 error ("Shared rtx");
2562 RTX_FLAG (x, used) = 1;
2564 /* Now scan the subexpressions recursively. */
2566 format_ptr = GET_RTX_FORMAT (code);
2568 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2570 switch (*format_ptr++)
2573 verify_rtx_sharing (XEXP (x, i), insn);
2577 if (XVEC (x, i) != NULL)
2580 int len = XVECLEN (x, i);
2582 for (j = 0; j < len; j++)
2584 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2585 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2586 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2587 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2589 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2598 /* Go through all the RTL insn bodies and chec that there is no inexpected
2599 sharing in between the subexpressions. */
2602 verify_rtl_sharing (void)
2606 for (p = get_insns (); p; p = NEXT_INSN (p))
2609 reset_used_flags (PATTERN (p));
2610 reset_used_flags (REG_NOTES (p));
2611 reset_used_flags (LOG_LINKS (p));
2614 for (p = get_insns (); p; p = NEXT_INSN (p))
2617 verify_rtx_sharing (PATTERN (p), p);
2618 verify_rtx_sharing (REG_NOTES (p), p);
2619 verify_rtx_sharing (LOG_LINKS (p), p);
2623 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2624 Assumes the mark bits are cleared at entry. */
2627 unshare_all_rtl_in_chain (rtx insn)
2629 for (; insn; insn = NEXT_INSN (insn))
2632 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2633 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2634 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2638 /* Go through all virtual stack slots of a function and copy any
2639 shared structure. */
2641 unshare_all_decls (tree blk)
2645 /* Copy shared decls. */
2646 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2647 if (DECL_RTL_SET_P (t))
2648 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2650 /* Now process sub-blocks. */
2651 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2652 unshare_all_decls (t);
2655 /* Go through all virtual stack slots of a function and mark them as
2658 reset_used_decls (tree blk)
2663 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2664 if (DECL_RTL_SET_P (t))
2665 reset_used_flags (DECL_RTL (t));
2667 /* Now process sub-blocks. */
2668 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2669 reset_used_decls (t);
2672 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2673 placed in the result directly, rather than being copied. MAY_SHARE is
2674 either a MEM of an EXPR_LIST of MEMs. */
2677 copy_most_rtx (rtx orig, rtx may_share)
2682 const char *format_ptr;
2684 if (orig == may_share
2685 || (GET_CODE (may_share) == EXPR_LIST
2686 && in_expr_list_p (may_share, orig)))
2689 code = GET_CODE (orig);
2707 copy = rtx_alloc (code);
2708 PUT_MODE (copy, GET_MODE (orig));
2709 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2710 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2711 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2712 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2713 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2715 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2717 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2719 switch (*format_ptr++)
2722 XEXP (copy, i) = XEXP (orig, i);
2723 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2724 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2728 XEXP (copy, i) = XEXP (orig, i);
2733 XVEC (copy, i) = XVEC (orig, i);
2734 if (XVEC (orig, i) != NULL)
2736 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2737 for (j = 0; j < XVECLEN (copy, i); j++)
2738 XVECEXP (copy, i, j)
2739 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2744 XWINT (copy, i) = XWINT (orig, i);
2749 XINT (copy, i) = XINT (orig, i);
2753 XTREE (copy, i) = XTREE (orig, i);
2758 XSTR (copy, i) = XSTR (orig, i);
2762 X0ANY (copy, i) = X0ANY (orig, i);
2772 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2773 Recursively does the same for subexpressions. */
2776 copy_rtx_if_shared (rtx orig)
2781 const char *format_ptr;
2787 code = GET_CODE (x);
2789 /* These types may be freely shared. */
2804 /* SCRATCH must be shared because they represent distinct values. */
2808 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2809 a LABEL_REF, it isn't sharable. */
2810 if (GET_CODE (XEXP (x, 0)) == PLUS
2811 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2812 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2821 /* The chain of insns is not being copied. */
2828 /* This rtx may not be shared. If it has already been seen,
2829 replace it with a copy of itself. */
2831 if (RTX_FLAG (x, used))
2835 copy = rtx_alloc (code);
2836 memcpy (copy, x, RTX_SIZE (code));
2840 RTX_FLAG (x, used) = 1;
2842 /* Now scan the subexpressions recursively.
2843 We can store any replaced subexpressions directly into X
2844 since we know X is not shared! Any vectors in X
2845 must be copied if X was copied. */
2847 format_ptr = GET_RTX_FORMAT (code);
2849 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2851 switch (*format_ptr++)
2854 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2858 if (XVEC (x, i) != NULL)
2861 int len = XVECLEN (x, i);
2863 if (copied && len > 0)
2864 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2865 for (j = 0; j < len; j++)
2866 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2874 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2875 to look for shared sub-parts. */
2878 reset_used_flags (rtx x)
2882 const char *format_ptr;
2887 code = GET_CODE (x);
2889 /* These types may be freely shared so we needn't do any resetting
2911 /* The chain of insns is not being copied. */
2918 RTX_FLAG (x, used) = 0;
2920 format_ptr = GET_RTX_FORMAT (code);
2921 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2923 switch (*format_ptr++)
2926 reset_used_flags (XEXP (x, i));
2930 for (j = 0; j < XVECLEN (x, i); j++)
2931 reset_used_flags (XVECEXP (x, i, j));
2937 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2938 to look for shared sub-parts. */
2941 set_used_flags (rtx x)
2945 const char *format_ptr;
2950 code = GET_CODE (x);
2952 /* These types may be freely shared so we needn't do any resetting
2974 /* The chain of insns is not being copied. */
2981 RTX_FLAG (x, used) = 1;
2983 format_ptr = GET_RTX_FORMAT (code);
2984 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2986 switch (*format_ptr++)
2989 set_used_flags (XEXP (x, i));
2993 for (j = 0; j < XVECLEN (x, i); j++)
2994 set_used_flags (XVECEXP (x, i, j));
3000 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3001 Return X or the rtx for the pseudo reg the value of X was copied into.
3002 OTHER must be valid as a SET_DEST. */
3005 make_safe_from (rtx x, rtx other)
3008 switch (GET_CODE (other))
3011 other = SUBREG_REG (other);
3013 case STRICT_LOW_PART:
3016 other = XEXP (other, 0);
3022 if ((GET_CODE (other) == MEM
3024 && GET_CODE (x) != REG
3025 && GET_CODE (x) != SUBREG)
3026 || (GET_CODE (other) == REG
3027 && (REGNO (other) < FIRST_PSEUDO_REGISTER
3028 || reg_mentioned_p (other, x))))
3030 rtx temp = gen_reg_rtx (GET_MODE (x));
3031 emit_move_insn (temp, x);
3037 /* Emission of insns (adding them to the doubly-linked list). */
3039 /* Return the first insn of the current sequence or current function. */
3047 /* Specify a new insn as the first in the chain. */
3050 set_first_insn (rtx insn)
3052 if (PREV_INSN (insn) != 0)
3057 /* Return the last insn emitted in current sequence or current function. */
3060 get_last_insn (void)
3065 /* Specify a new insn as the last in the chain. */
3068 set_last_insn (rtx insn)
3070 if (NEXT_INSN (insn) != 0)
3075 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3078 get_last_insn_anywhere (void)
3080 struct sequence_stack *stack;
3083 for (stack = seq_stack; stack; stack = stack->next)
3084 if (stack->last != 0)
3089 /* Return the first nonnote insn emitted in current sequence or current
3090 function. This routine looks inside SEQUENCEs. */
3093 get_first_nonnote_insn (void)
3095 rtx insn = first_insn;
3099 insn = next_insn (insn);
3100 if (insn == 0 || GET_CODE (insn) != NOTE)
3107 /* Return the last nonnote insn emitted in current sequence or current
3108 function. This routine looks inside SEQUENCEs. */
3111 get_last_nonnote_insn (void)
3113 rtx insn = last_insn;
3117 insn = previous_insn (insn);
3118 if (insn == 0 || GET_CODE (insn) != NOTE)
3125 /* Return a number larger than any instruction's uid in this function. */
3130 return cur_insn_uid;
3133 /* Renumber instructions so that no instruction UIDs are wasted. */
3136 renumber_insns (FILE *stream)
3140 /* If we're not supposed to renumber instructions, don't. */
3141 if (!flag_renumber_insns)
3144 /* If there aren't that many instructions, then it's not really
3145 worth renumbering them. */
3146 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
3151 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3154 fprintf (stream, "Renumbering insn %d to %d\n",
3155 INSN_UID (insn), cur_insn_uid);
3156 INSN_UID (insn) = cur_insn_uid++;
3160 /* Return the next insn. If it is a SEQUENCE, return the first insn
3164 next_insn (rtx insn)
3168 insn = NEXT_INSN (insn);
3169 if (insn && GET_CODE (insn) == INSN
3170 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3171 insn = XVECEXP (PATTERN (insn), 0, 0);
3177 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3181 previous_insn (rtx insn)
3185 insn = PREV_INSN (insn);
3186 if (insn && GET_CODE (insn) == INSN
3187 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3188 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3194 /* Return the next insn after INSN that is not a NOTE. This routine does not
3195 look inside SEQUENCEs. */
3198 next_nonnote_insn (rtx insn)
3202 insn = NEXT_INSN (insn);
3203 if (insn == 0 || GET_CODE (insn) != NOTE)
3210 /* Return the previous insn before INSN that is not a NOTE. This routine does
3211 not look inside SEQUENCEs. */
3214 prev_nonnote_insn (rtx insn)
3218 insn = PREV_INSN (insn);
3219 if (insn == 0 || GET_CODE (insn) != NOTE)
3226 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3227 or 0, if there is none. This routine does not look inside
3231 next_real_insn (rtx insn)
3235 insn = NEXT_INSN (insn);
3236 if (insn == 0 || GET_CODE (insn) == INSN
3237 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3244 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3245 or 0, if there is none. This routine does not look inside
3249 prev_real_insn (rtx insn)
3253 insn = PREV_INSN (insn);
3254 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3255 || GET_CODE (insn) == JUMP_INSN)
3262 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3263 This routine does not look inside SEQUENCEs. */
3266 last_call_insn (void)
3270 for (insn = get_last_insn ();
3271 insn && GET_CODE (insn) != CALL_INSN;
3272 insn = PREV_INSN (insn))
3278 /* Find the next insn after INSN that really does something. This routine
3279 does not look inside SEQUENCEs. Until reload has completed, this is the
3280 same as next_real_insn. */
3283 active_insn_p (rtx insn)
3285 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3286 || (GET_CODE (insn) == INSN
3287 && (! reload_completed
3288 || (GET_CODE (PATTERN (insn)) != USE
3289 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3293 next_active_insn (rtx insn)
3297 insn = NEXT_INSN (insn);
3298 if (insn == 0 || active_insn_p (insn))
3305 /* Find the last insn before INSN that really does something. This routine
3306 does not look inside SEQUENCEs. Until reload has completed, this is the
3307 same as prev_real_insn. */
3310 prev_active_insn (rtx insn)
3314 insn = PREV_INSN (insn);
3315 if (insn == 0 || active_insn_p (insn))
3322 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3325 next_label (rtx insn)
3329 insn = NEXT_INSN (insn);
3330 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3337 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3340 prev_label (rtx insn)
3344 insn = PREV_INSN (insn);
3345 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3353 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3354 and REG_CC_USER notes so we can find it. */
3357 link_cc0_insns (rtx insn)
3359 rtx user = next_nonnote_insn (insn);
3361 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3362 user = XVECEXP (PATTERN (user), 0, 0);
3364 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3366 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3369 /* Return the next insn that uses CC0 after INSN, which is assumed to
3370 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3371 applied to the result of this function should yield INSN).
3373 Normally, this is simply the next insn. However, if a REG_CC_USER note
3374 is present, it contains the insn that uses CC0.
3376 Return 0 if we can't find the insn. */
3379 next_cc0_user (rtx insn)
3381 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3384 return XEXP (note, 0);
3386 insn = next_nonnote_insn (insn);
3387 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3388 insn = XVECEXP (PATTERN (insn), 0, 0);
3390 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3396 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3397 note, it is the previous insn. */
3400 prev_cc0_setter (rtx insn)
3402 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3405 return XEXP (note, 0);
3407 insn = prev_nonnote_insn (insn);
3408 if (! sets_cc0_p (PATTERN (insn)))
3415 /* Increment the label uses for all labels present in rtx. */
3418 mark_label_nuses (rtx x)
3424 code = GET_CODE (x);
3425 if (code == LABEL_REF)
3426 LABEL_NUSES (XEXP (x, 0))++;
3428 fmt = GET_RTX_FORMAT (code);
3429 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3432 mark_label_nuses (XEXP (x, i));
3433 else if (fmt[i] == 'E')
3434 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3435 mark_label_nuses (XVECEXP (x, i, j));
3440 /* Try splitting insns that can be split for better scheduling.
3441 PAT is the pattern which might split.
3442 TRIAL is the insn providing PAT.
3443 LAST is nonzero if we should return the last insn of the sequence produced.
3445 If this routine succeeds in splitting, it returns the first or last
3446 replacement insn depending on the value of LAST. Otherwise, it
3447 returns TRIAL. If the insn to be returned can be split, it will be. */
3450 try_split (rtx pat, rtx trial, int last)
3452 rtx before = PREV_INSN (trial);
3453 rtx after = NEXT_INSN (trial);
3454 int has_barrier = 0;
3458 rtx insn_last, insn;
3461 if (any_condjump_p (trial)
3462 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3463 split_branch_probability = INTVAL (XEXP (note, 0));
3464 probability = split_branch_probability;
3466 seq = split_insns (pat, trial);
3468 split_branch_probability = -1;
3470 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3471 We may need to handle this specially. */
3472 if (after && GET_CODE (after) == BARRIER)
3475 after = NEXT_INSN (after);
3481 /* Avoid infinite loop if any insn of the result matches
3482 the original pattern. */
3486 if (INSN_P (insn_last)
3487 && rtx_equal_p (PATTERN (insn_last), pat))
3489 if (!NEXT_INSN (insn_last))
3491 insn_last = NEXT_INSN (insn_last);
3495 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3497 if (GET_CODE (insn) == JUMP_INSN)
3499 mark_jump_label (PATTERN (insn), insn, 0);
3501 if (probability != -1
3502 && any_condjump_p (insn)
3503 && !find_reg_note (insn, REG_BR_PROB, 0))
3505 /* We can preserve the REG_BR_PROB notes only if exactly
3506 one jump is created, otherwise the machine description
3507 is responsible for this step using
3508 split_branch_probability variable. */
3512 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3513 GEN_INT (probability),
3519 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3520 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3521 if (GET_CODE (trial) == CALL_INSN)
3523 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3524 if (GET_CODE (insn) == CALL_INSN)
3526 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3529 *p = CALL_INSN_FUNCTION_USAGE (trial);
3530 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3534 /* Copy notes, particularly those related to the CFG. */
3535 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3537 switch (REG_NOTE_KIND (note))
3541 while (insn != NULL_RTX)
3543 if (GET_CODE (insn) == CALL_INSN
3544 || (flag_non_call_exceptions
3545 && may_trap_p (PATTERN (insn))))
3547 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3550 insn = PREV_INSN (insn);
3556 case REG_ALWAYS_RETURN:
3558 while (insn != NULL_RTX)
3560 if (GET_CODE (insn) == CALL_INSN)
3562 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3565 insn = PREV_INSN (insn);
3569 case REG_NON_LOCAL_GOTO:
3571 while (insn != NULL_RTX)
3573 if (GET_CODE (insn) == JUMP_INSN)
3575 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3578 insn = PREV_INSN (insn);
3587 /* If there are LABELS inside the split insns increment the
3588 usage count so we don't delete the label. */
3589 if (GET_CODE (trial) == INSN)
3592 while (insn != NULL_RTX)
3594 if (GET_CODE (insn) == INSN)
3595 mark_label_nuses (PATTERN (insn));
3597 insn = PREV_INSN (insn);
3601 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3603 delete_insn (trial);
3605 emit_barrier_after (tem);
3607 /* Recursively call try_split for each new insn created; by the
3608 time control returns here that insn will be fully split, so
3609 set LAST and continue from the insn after the one returned.
3610 We can't use next_active_insn here since AFTER may be a note.
3611 Ignore deleted insns, which can be occur if not optimizing. */
3612 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3613 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3614 tem = try_split (PATTERN (tem), tem, 1);
3616 /* Return either the first or the last insn, depending on which was
3619 ? (after ? PREV_INSN (after) : last_insn)
3620 : NEXT_INSN (before);
3623 /* Make and return an INSN rtx, initializing all its slots.
3624 Store PATTERN in the pattern slots. */
3627 make_insn_raw (rtx pattern)
3631 insn = rtx_alloc (INSN);
3633 INSN_UID (insn) = cur_insn_uid++;
3634 PATTERN (insn) = pattern;
3635 INSN_CODE (insn) = -1;
3636 LOG_LINKS (insn) = NULL;
3637 REG_NOTES (insn) = NULL;
3638 INSN_LOCATOR (insn) = 0;
3639 BLOCK_FOR_INSN (insn) = NULL;
3641 #ifdef ENABLE_RTL_CHECKING
3644 && (returnjump_p (insn)
3645 || (GET_CODE (insn) == SET
3646 && SET_DEST (insn) == pc_rtx)))
3648 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3656 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3659 make_jump_insn_raw (rtx pattern)
3663 insn = rtx_alloc (JUMP_INSN);
3664 INSN_UID (insn) = cur_insn_uid++;
3666 PATTERN (insn) = pattern;
3667 INSN_CODE (insn) = -1;
3668 LOG_LINKS (insn) = NULL;
3669 REG_NOTES (insn) = NULL;
3670 JUMP_LABEL (insn) = NULL;
3671 INSN_LOCATOR (insn) = 0;
3672 BLOCK_FOR_INSN (insn) = NULL;
3677 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3680 make_call_insn_raw (rtx pattern)
3684 insn = rtx_alloc (CALL_INSN);
3685 INSN_UID (insn) = cur_insn_uid++;
3687 PATTERN (insn) = pattern;
3688 INSN_CODE (insn) = -1;
3689 LOG_LINKS (insn) = NULL;
3690 REG_NOTES (insn) = NULL;
3691 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3692 INSN_LOCATOR (insn) = 0;
3693 BLOCK_FOR_INSN (insn) = NULL;
3698 /* Add INSN to the end of the doubly-linked list.
3699 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3704 PREV_INSN (insn) = last_insn;
3705 NEXT_INSN (insn) = 0;
3707 if (NULL != last_insn)
3708 NEXT_INSN (last_insn) = insn;
3710 if (NULL == first_insn)
3716 /* Add INSN into the doubly-linked list after insn AFTER. This and
3717 the next should be the only functions called to insert an insn once
3718 delay slots have been filled since only they know how to update a
3722 add_insn_after (rtx insn, rtx after)
3724 rtx next = NEXT_INSN (after);
3727 if (optimize && INSN_DELETED_P (after))
3730 NEXT_INSN (insn) = next;
3731 PREV_INSN (insn) = after;
3735 PREV_INSN (next) = insn;
3736 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3737 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3739 else if (last_insn == after)
3743 struct sequence_stack *stack = seq_stack;
3744 /* Scan all pending sequences too. */
3745 for (; stack; stack = stack->next)
3746 if (after == stack->last)
3756 if (GET_CODE (after) != BARRIER
3757 && GET_CODE (insn) != BARRIER
3758 && (bb = BLOCK_FOR_INSN (after)))
3760 set_block_for_insn (insn, bb);
3762 bb->flags |= BB_DIRTY;
3763 /* Should not happen as first in the BB is always
3764 either NOTE or LABEL. */
3765 if (bb->end == after
3766 /* Avoid clobbering of structure when creating new BB. */
3767 && GET_CODE (insn) != BARRIER
3768 && (GET_CODE (insn) != NOTE
3769 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3773 NEXT_INSN (after) = insn;
3774 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3776 rtx sequence = PATTERN (after);
3777 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3781 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3782 the previous should be the only functions called to insert an insn once
3783 delay slots have been filled since only they know how to update a
3787 add_insn_before (rtx insn, rtx before)
3789 rtx prev = PREV_INSN (before);
3792 if (optimize && INSN_DELETED_P (before))
3795 PREV_INSN (insn) = prev;
3796 NEXT_INSN (insn) = before;
3800 NEXT_INSN (prev) = insn;
3801 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3803 rtx sequence = PATTERN (prev);
3804 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3807 else if (first_insn == before)
3811 struct sequence_stack *stack = seq_stack;
3812 /* Scan all pending sequences too. */
3813 for (; stack; stack = stack->next)
3814 if (before == stack->first)
3816 stack->first = insn;
3824 if (GET_CODE (before) != BARRIER
3825 && GET_CODE (insn) != BARRIER
3826 && (bb = BLOCK_FOR_INSN (before)))
3828 set_block_for_insn (insn, bb);
3830 bb->flags |= BB_DIRTY;
3831 /* Should not happen as first in the BB is always
3832 either NOTE or LABEl. */
3833 if (bb->head == insn
3834 /* Avoid clobbering of structure when creating new BB. */
3835 && GET_CODE (insn) != BARRIER
3836 && (GET_CODE (insn) != NOTE
3837 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3841 PREV_INSN (before) = insn;
3842 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3843 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3846 /* Remove an insn from its doubly-linked list. This function knows how
3847 to handle sequences. */
3849 remove_insn (rtx insn)
3851 rtx next = NEXT_INSN (insn);
3852 rtx prev = PREV_INSN (insn);
3857 NEXT_INSN (prev) = next;
3858 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3860 rtx sequence = PATTERN (prev);
3861 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3864 else if (first_insn == insn)
3868 struct sequence_stack *stack = seq_stack;
3869 /* Scan all pending sequences too. */
3870 for (; stack; stack = stack->next)
3871 if (insn == stack->first)
3873 stack->first = next;
3883 PREV_INSN (next) = prev;
3884 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3885 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3887 else if (last_insn == insn)
3891 struct sequence_stack *stack = seq_stack;
3892 /* Scan all pending sequences too. */
3893 for (; stack; stack = stack->next)
3894 if (insn == stack->last)
3903 if (GET_CODE (insn) != BARRIER
3904 && (bb = BLOCK_FOR_INSN (insn)))
3907 bb->flags |= BB_DIRTY;
3908 if (bb->head == insn)
3910 /* Never ever delete the basic block note without deleting whole
3912 if (GET_CODE (insn) == NOTE)
3916 if (bb->end == insn)
3921 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3924 add_function_usage_to (rtx call_insn, rtx call_fusage)
3926 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3929 /* Put the register usage information on the CALL. If there is already
3930 some usage information, put ours at the end. */
3931 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3935 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3936 link = XEXP (link, 1))
3939 XEXP (link, 1) = call_fusage;
3942 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3945 /* Delete all insns made since FROM.
3946 FROM becomes the new last instruction. */
3949 delete_insns_since (rtx from)
3954 NEXT_INSN (from) = 0;
3958 /* This function is deprecated, please use sequences instead.
3960 Move a consecutive bunch of insns to a different place in the chain.
3961 The insns to be moved are those between FROM and TO.
3962 They are moved to a new position after the insn AFTER.
3963 AFTER must not be FROM or TO or any insn in between.
3965 This function does not know about SEQUENCEs and hence should not be
3966 called after delay-slot filling has been done. */
3969 reorder_insns_nobb (rtx from, rtx to, rtx after)
3971 /* Splice this bunch out of where it is now. */
3972 if (PREV_INSN (from))
3973 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3975 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3976 if (last_insn == to)
3977 last_insn = PREV_INSN (from);
3978 if (first_insn == from)
3979 first_insn = NEXT_INSN (to);
3981 /* Make the new neighbors point to it and it to them. */
3982 if (NEXT_INSN (after))
3983 PREV_INSN (NEXT_INSN (after)) = to;
3985 NEXT_INSN (to) = NEXT_INSN (after);
3986 PREV_INSN (from) = after;
3987 NEXT_INSN (after) = from;
3988 if (after == last_insn)
3992 /* Same as function above, but take care to update BB boundaries. */
3994 reorder_insns (rtx from, rtx to, rtx after)
3996 rtx prev = PREV_INSN (from);
3997 basic_block bb, bb2;
3999 reorder_insns_nobb (from, to, after);
4001 if (GET_CODE (after) != BARRIER
4002 && (bb = BLOCK_FOR_INSN (after)))
4005 bb->flags |= BB_DIRTY;
4007 if (GET_CODE (from) != BARRIER
4008 && (bb2 = BLOCK_FOR_INSN (from)))
4012 bb2->flags |= BB_DIRTY;
4015 if (bb->end == after)
4018 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4019 set_block_for_insn (x, bb);
4023 /* Return the line note insn preceding INSN. */
4026 find_line_note (rtx insn)
4028 if (no_line_numbers)
4031 for (; insn; insn = PREV_INSN (insn))
4032 if (GET_CODE (insn) == NOTE
4033 && NOTE_LINE_NUMBER (insn) >= 0)
4039 /* Like reorder_insns, but inserts line notes to preserve the line numbers
4040 of the moved insns when debugging. This may insert a note between AFTER
4041 and FROM, and another one after TO. */
4044 reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
4046 rtx from_line = find_line_note (from);
4047 rtx after_line = find_line_note (after);
4049 reorder_insns (from, to, after);
4051 if (from_line == after_line)
4055 emit_note_copy_after (from_line, after);
4057 emit_note_copy_after (after_line, to);
4060 /* Remove unnecessary notes from the instruction stream. */
4063 remove_unnecessary_notes (void)
4065 rtx block_stack = NULL_RTX;
4066 rtx eh_stack = NULL_RTX;
4071 /* We must not remove the first instruction in the function because
4072 the compiler depends on the first instruction being a note. */
4073 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
4075 /* Remember what's next. */
4076 next = NEXT_INSN (insn);
4078 /* We're only interested in notes. */
4079 if (GET_CODE (insn) != NOTE)
4082 switch (NOTE_LINE_NUMBER (insn))
4084 case NOTE_INSN_DELETED:
4085 case NOTE_INSN_LOOP_END_TOP_COND:
4089 case NOTE_INSN_EH_REGION_BEG:
4090 eh_stack = alloc_INSN_LIST (insn, eh_stack);
4093 case NOTE_INSN_EH_REGION_END:
4094 /* Too many end notes. */
4095 if (eh_stack == NULL_RTX)
4097 /* Mismatched nesting. */
4098 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
4101 eh_stack = XEXP (eh_stack, 1);
4102 free_INSN_LIST_node (tmp);
4105 case NOTE_INSN_BLOCK_BEG:
4106 /* By now, all notes indicating lexical blocks should have
4107 NOTE_BLOCK filled in. */
4108 if (NOTE_BLOCK (insn) == NULL_TREE)
4110 block_stack = alloc_INSN_LIST (insn, block_stack);
4113 case NOTE_INSN_BLOCK_END:
4114 /* Too many end notes. */
4115 if (block_stack == NULL_RTX)
4117 /* Mismatched nesting. */
4118 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
4121 block_stack = XEXP (block_stack, 1);
4122 free_INSN_LIST_node (tmp);
4124 /* Scan back to see if there are any non-note instructions
4125 between INSN and the beginning of this block. If not,
4126 then there is no PC range in the generated code that will
4127 actually be in this block, so there's no point in
4128 remembering the existence of the block. */
4129 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
4131 /* This block contains a real instruction. Note that we
4132 don't include labels; if the only thing in the block
4133 is a label, then there are still no PC values that
4134 lie within the block. */
4138 /* We're only interested in NOTEs. */
4139 if (GET_CODE (tmp) != NOTE)
4142 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
4144 /* We just verified that this BLOCK matches us with
4145 the block_stack check above. Never delete the
4146 BLOCK for the outermost scope of the function; we
4147 can refer to names from that scope even if the
4148 block notes are messed up. */
4149 if (! is_body_block (NOTE_BLOCK (insn))
4150 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
4157 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
4158 /* There's a nested block. We need to leave the
4159 current block in place since otherwise the debugger
4160 wouldn't be able to show symbols from our block in
4161 the nested block. */
4167 /* Too many begin notes. */
4168 if (block_stack || eh_stack)
4173 /* Emit insn(s) of given code and pattern
4174 at a specified place within the doubly-linked list.
4176 All of the emit_foo global entry points accept an object
4177 X which is either an insn list or a PATTERN of a single
4180 There are thus a few canonical ways to generate code and
4181 emit it at a specific place in the instruction stream. For
4182 example, consider the instruction named SPOT and the fact that
4183 we would like to emit some instructions before SPOT. We might
4187 ... emit the new instructions ...
4188 insns_head = get_insns ();
4191 emit_insn_before (insns_head, SPOT);
4193 It used to be common to generate SEQUENCE rtl instead, but that
4194 is a relic of the past which no longer occurs. The reason is that
4195 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4196 generated would almost certainly die right after it was created. */
4198 /* Make X be output before the instruction BEFORE. */
4201 emit_insn_before (rtx x, rtx before)
4206 #ifdef ENABLE_RTL_CHECKING
4207 if (before == NULL_RTX)
4214 switch (GET_CODE (x))
4225 rtx next = NEXT_INSN (insn);
4226 add_insn_before (insn, before);
4232 #ifdef ENABLE_RTL_CHECKING
4239 last = make_insn_raw (x);
4240 add_insn_before (last, before);
4247 /* Make an instruction with body X and code JUMP_INSN
4248 and output it before the instruction BEFORE. */
4251 emit_jump_insn_before (rtx x, rtx before)
4253 rtx insn, last = NULL_RTX;
4255 #ifdef ENABLE_RTL_CHECKING
4256 if (before == NULL_RTX)
4260 switch (GET_CODE (x))
4271 rtx next = NEXT_INSN (insn);
4272 add_insn_before (insn, before);
4278 #ifdef ENABLE_RTL_CHECKING
4285 last = make_jump_insn_raw (x);
4286 add_insn_before (last, before);
4293 /* Make an instruction with body X and code CALL_INSN
4294 and output it before the instruction BEFORE. */
4297 emit_call_insn_before (rtx x, rtx before)
4299 rtx last = NULL_RTX, insn;
4301 #ifdef ENABLE_RTL_CHECKING
4302 if (before == NULL_RTX)
4306 switch (GET_CODE (x))
4317 rtx next = NEXT_INSN (insn);
4318 add_insn_before (insn, before);
4324 #ifdef ENABLE_RTL_CHECKING
4331 last = make_call_insn_raw (x);
4332 add_insn_before (last, before);
4339 /* Make an insn of code BARRIER
4340 and output it before the insn BEFORE. */
4343 emit_barrier_before (rtx before)
4345 rtx insn = rtx_alloc (BARRIER);
4347 INSN_UID (insn) = cur_insn_uid++;
4349 add_insn_before (insn, before);
4353 /* Emit the label LABEL before the insn BEFORE. */
4356 emit_label_before (rtx label, rtx before)
4358 /* This can be called twice for the same label as a result of the
4359 confusion that follows a syntax error! So make it harmless. */
4360 if (INSN_UID (label) == 0)
4362 INSN_UID (label) = cur_insn_uid++;
4363 add_insn_before (label, before);
4369 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4372 emit_note_before (int subtype, rtx before)
4374 rtx note = rtx_alloc (NOTE);
4375 INSN_UID (note) = cur_insn_uid++;
4376 NOTE_SOURCE_FILE (note) = 0;
4377 NOTE_LINE_NUMBER (note) = subtype;
4378 BLOCK_FOR_INSN (note) = NULL;
4380 add_insn_before (note, before);
4384 /* Helper for emit_insn_after, handles lists of instructions
4387 static rtx emit_insn_after_1 (rtx, rtx);
4390 emit_insn_after_1 (rtx first, rtx after)
4396 if (GET_CODE (after) != BARRIER
4397 && (bb = BLOCK_FOR_INSN (after)))
4399 bb->flags |= BB_DIRTY;
4400 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4401 if (GET_CODE (last) != BARRIER)
4402 set_block_for_insn (last, bb);
4403 if (GET_CODE (last) != BARRIER)
4404 set_block_for_insn (last, bb);
4405 if (bb->end == after)
4409 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4412 after_after = NEXT_INSN (after);
4414 NEXT_INSN (after) = first;
4415 PREV_INSN (first) = after;
4416 NEXT_INSN (last) = after_after;
4418 PREV_INSN (after_after) = last;
4420 if (after == last_insn)
4425 /* Make X be output after the insn AFTER. */
4428 emit_insn_after (rtx x, rtx after)
4432 #ifdef ENABLE_RTL_CHECKING
4433 if (after == NULL_RTX)
4440 switch (GET_CODE (x))
4448 last = emit_insn_after_1 (x, after);
4451 #ifdef ENABLE_RTL_CHECKING
4458 last = make_insn_raw (x);
4459 add_insn_after (last, after);
4466 /* Similar to emit_insn_after, except that line notes are to be inserted so
4467 as to act as if this insn were at FROM. */
4470 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4472 rtx from_line = find_line_note (from);
4473 rtx after_line = find_line_note (after);
4474 rtx insn = emit_insn_after (x, after);
4477 emit_note_copy_after (from_line, after);
4480 emit_note_copy_after (after_line, insn);
4483 /* Make an insn of code JUMP_INSN with body X
4484 and output it after the insn AFTER. */
4487 emit_jump_insn_after (rtx x, rtx after)
4491 #ifdef ENABLE_RTL_CHECKING
4492 if (after == NULL_RTX)
4496 switch (GET_CODE (x))
4504 last = emit_insn_after_1 (x, after);
4507 #ifdef ENABLE_RTL_CHECKING
4514 last = make_jump_insn_raw (x);
4515 add_insn_after (last, after);
4522 /* Make an instruction with body X and code CALL_INSN
4523 and output it after the instruction AFTER. */
4526 emit_call_insn_after (rtx x, rtx after)
4530 #ifdef ENABLE_RTL_CHECKING
4531 if (after == NULL_RTX)
4535 switch (GET_CODE (x))
4543 last = emit_insn_after_1 (x, after);
4546 #ifdef ENABLE_RTL_CHECKING
4553 last = make_call_insn_raw (x);
4554 add_insn_after (last, after);
4561 /* Make an insn of code BARRIER
4562 and output it after the insn AFTER. */
4565 emit_barrier_after (rtx after)
4567 rtx insn = rtx_alloc (BARRIER);
4569 INSN_UID (insn) = cur_insn_uid++;
4571 add_insn_after (insn, after);
4575 /* Emit the label LABEL after the insn AFTER. */
4578 emit_label_after (rtx label, rtx after)
4580 /* This can be called twice for the same label
4581 as a result of the confusion that follows a syntax error!
4582 So make it harmless. */
4583 if (INSN_UID (label) == 0)
4585 INSN_UID (label) = cur_insn_uid++;
4586 add_insn_after (label, after);
4592 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4595 emit_note_after (int subtype, rtx after)
4597 rtx note = rtx_alloc (NOTE);
4598 INSN_UID (note) = cur_insn_uid++;
4599 NOTE_SOURCE_FILE (note) = 0;
4600 NOTE_LINE_NUMBER (note) = subtype;
4601 BLOCK_FOR_INSN (note) = NULL;
4602 add_insn_after (note, after);
4606 /* Emit a copy of note ORIG after the insn AFTER. */
4609 emit_note_copy_after (rtx orig, rtx after)
4613 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4619 note = rtx_alloc (NOTE);
4620 INSN_UID (note) = cur_insn_uid++;
4621 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4622 NOTE_DATA (note) = NOTE_DATA (orig);
4623 BLOCK_FOR_INSN (note) = NULL;
4624 add_insn_after (note, after);
4628 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4630 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4632 rtx last = emit_insn_after (pattern, after);
4634 after = NEXT_INSN (after);
4637 if (active_insn_p (after))
4638 INSN_LOCATOR (after) = loc;
4641 after = NEXT_INSN (after);
4646 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4648 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4650 rtx last = emit_jump_insn_after (pattern, after);
4652 after = NEXT_INSN (after);
4655 if (active_insn_p (after))
4656 INSN_LOCATOR (after) = loc;
4659 after = NEXT_INSN (after);
4664 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4666 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4668 rtx last = emit_call_insn_after (pattern, after);
4670 after = NEXT_INSN (after);
4673 if (active_insn_p (after))
4674 INSN_LOCATOR (after) = loc;
4677 after = NEXT_INSN (after);
4682 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4684 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4686 rtx first = PREV_INSN (before);
4687 rtx last = emit_insn_before (pattern, before);
4689 first = NEXT_INSN (first);
4692 if (active_insn_p (first))
4693 INSN_LOCATOR (first) = loc;
4696 first = NEXT_INSN (first);
4701 /* Take X and emit it at the end of the doubly-linked
4704 Returns the last insn emitted. */
4709 rtx last = last_insn;
4715 switch (GET_CODE (x))
4726 rtx next = NEXT_INSN (insn);
4733 #ifdef ENABLE_RTL_CHECKING
4740 last = make_insn_raw (x);
4748 /* Make an insn of code JUMP_INSN with pattern X
4749 and add it to the end of the doubly-linked list. */
4752 emit_jump_insn (rtx x)
4754 rtx last = NULL_RTX, insn;
4756 switch (GET_CODE (x))
4767 rtx next = NEXT_INSN (insn);
4774 #ifdef ENABLE_RTL_CHECKING
4781 last = make_jump_insn_raw (x);
4789 /* Make an insn of code CALL_INSN with pattern X
4790 and add it to the end of the doubly-linked list. */
4793 emit_call_insn (rtx x)
4797 switch (GET_CODE (x))
4805 insn = emit_insn (x);
4808 #ifdef ENABLE_RTL_CHECKING
4815 insn = make_call_insn_raw (x);
4823 /* Add the label LABEL to the end of the doubly-linked list. */
4826 emit_label (rtx label)
4828 /* This can be called twice for the same label
4829 as a result of the confusion that follows a syntax error!
4830 So make it harmless. */
4831 if (INSN_UID (label) == 0)
4833 INSN_UID (label) = cur_insn_uid++;
4839 /* Make an insn of code BARRIER
4840 and add it to the end of the doubly-linked list. */
4845 rtx barrier = rtx_alloc (BARRIER);
4846 INSN_UID (barrier) = cur_insn_uid++;
4851 /* Make line numbering NOTE insn for LOCATION add it to the end
4852 of the doubly-linked list, but only if line-numbers are desired for
4853 debugging info and it doesn't match the previous one. */
4856 emit_line_note (location_t location)
4860 set_file_and_line_for_stmt (location);
4862 if (location.file && last_location.file
4863 && !strcmp (location.file, last_location.file)
4864 && location.line == last_location.line)
4866 last_location = location;
4868 if (no_line_numbers)
4874 note = emit_note (location.line);
4875 NOTE_SOURCE_FILE (note) = location.file;
4880 /* Emit a copy of note ORIG. */
4883 emit_note_copy (rtx orig)
4887 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4893 note = rtx_alloc (NOTE);
4895 INSN_UID (note) = cur_insn_uid++;
4896 NOTE_DATA (note) = NOTE_DATA (orig);
4897 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4898 BLOCK_FOR_INSN (note) = NULL;
4904 /* Make an insn of code NOTE or type NOTE_NO
4905 and add it to the end of the doubly-linked list. */
4908 emit_note (int note_no)
4912 note = rtx_alloc (NOTE);
4913 INSN_UID (note) = cur_insn_uid++;
4914 NOTE_LINE_NUMBER (note) = note_no;
4915 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4916 BLOCK_FOR_INSN (note) = NULL;
4921 /* Cause next statement to emit a line note even if the line number
4925 force_next_line_note (void)
4927 last_location.line = -1;
4930 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4931 note of this type already exists, remove it first. */
4934 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4936 rtx note = find_reg_note (insn, kind, NULL_RTX);
4942 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4943 has multiple sets (some callers assume single_set
4944 means the insn only has one set, when in fact it
4945 means the insn only has one * useful * set). */
4946 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4953 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4954 It serves no useful purpose and breaks eliminate_regs. */
4955 if (GET_CODE (datum) == ASM_OPERANDS)
4965 XEXP (note, 0) = datum;
4969 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4970 return REG_NOTES (insn);
4973 /* Return an indication of which type of insn should have X as a body.
4974 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4977 classify_insn (rtx x)
4979 if (GET_CODE (x) == CODE_LABEL)
4981 if (GET_CODE (x) == CALL)
4983 if (GET_CODE (x) == RETURN)
4985 if (GET_CODE (x) == SET)
4987 if (SET_DEST (x) == pc_rtx)
4989 else if (GET_CODE (SET_SRC (x)) == CALL)
4994 if (GET_CODE (x) == PARALLEL)
4997 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4998 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5000 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5001 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5003 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5004 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5010 /* Emit the rtl pattern X as an appropriate kind of insn.
5011 If X is a label, it is simply added into the insn chain. */
5016 enum rtx_code code = classify_insn (x);
5018 if (code == CODE_LABEL)
5019 return emit_label (x);
5020 else if (code == INSN)
5021 return emit_insn (x);
5022 else if (code == JUMP_INSN)
5024 rtx insn = emit_jump_insn (x);
5025 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5026 return emit_barrier ();
5029 else if (code == CALL_INSN)
5030 return emit_call_insn (x);
5035 /* Space for free sequence stack entries. */
5036 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
5038 /* Begin emitting insns to a sequence which can be packaged in an
5039 RTL_EXPR. If this sequence will contain something that might cause
5040 the compiler to pop arguments to function calls (because those
5041 pops have previously been deferred; see INHIBIT_DEFER_POP for more
5042 details), use do_pending_stack_adjust before calling this function.
5043 That will ensure that the deferred pops are not accidentally
5044 emitted in the middle of this sequence. */
5047 start_sequence (void)
5049 struct sequence_stack *tem;
5051 if (free_sequence_stack != NULL)
5053 tem = free_sequence_stack;
5054 free_sequence_stack = tem->next;
5057 tem = ggc_alloc (sizeof (struct sequence_stack));
5059 tem->next = seq_stack;
5060 tem->first = first_insn;
5061 tem->last = last_insn;
5062 tem->sequence_rtl_expr = seq_rtl_expr;
5070 /* Similarly, but indicate that this sequence will be placed in T, an
5071 RTL_EXPR. See the documentation for start_sequence for more
5072 information about how to use this function. */
5075 start_sequence_for_rtl_expr (tree t)
5082 /* Set up the insn chain starting with FIRST as the current sequence,
5083 saving the previously current one. See the documentation for
5084 start_sequence for more information about how to use this function. */
5087 push_to_sequence (rtx first)
5093 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5099 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5102 push_to_full_sequence (rtx first, rtx last)
5107 /* We really should have the end of the insn chain here. */
5108 if (last && NEXT_INSN (last))
5112 /* Set up the outer-level insn chain
5113 as the current sequence, saving the previously current one. */
5116 push_topmost_sequence (void)
5118 struct sequence_stack *stack, *top = NULL;
5122 for (stack = seq_stack; stack; stack = stack->next)
5125 first_insn = top->first;
5126 last_insn = top->last;
5127 seq_rtl_expr = top->sequence_rtl_expr;
5130 /* After emitting to the outer-level insn chain, update the outer-level
5131 insn chain, and restore the previous saved state. */
5134 pop_topmost_sequence (void)
5136 struct sequence_stack *stack, *top = NULL;
5138 for (stack = seq_stack; stack; stack = stack->next)
5141 top->first = first_insn;
5142 top->last = last_insn;
5143 /* ??? Why don't we save seq_rtl_expr here? */
5148 /* After emitting to a sequence, restore previous saved state.
5150 To get the contents of the sequence just made, you must call
5151 `get_insns' *before* calling here.
5153 If the compiler might have deferred popping arguments while
5154 generating this sequence, and this sequence will not be immediately
5155 inserted into the instruction stream, use do_pending_stack_adjust
5156 before calling get_insns. That will ensure that the deferred
5157 pops are inserted into this sequence, and not into some random
5158 location in the instruction stream. See INHIBIT_DEFER_POP for more
5159 information about deferred popping of arguments. */
5164 struct sequence_stack *tem = seq_stack;
5166 first_insn = tem->first;
5167 last_insn = tem->last;
5168 seq_rtl_expr = tem->sequence_rtl_expr;
5169 seq_stack = tem->next;
5171 memset (tem, 0, sizeof (*tem));
5172 tem->next = free_sequence_stack;
5173 free_sequence_stack = tem;
5176 /* This works like end_sequence, but records the old sequence in FIRST
5180 end_full_sequence (rtx *first, rtx *last)
5182 *first = first_insn;
5187 /* Return 1 if currently emitting into a sequence. */
5190 in_sequence_p (void)
5192 return seq_stack != 0;
5195 /* Put the various virtual registers into REGNO_REG_RTX. */
5198 init_virtual_regs (struct emit_status *es)
5200 rtx *ptr = es->x_regno_reg_rtx;
5201 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5202 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5203 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5204 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5205 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5209 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5210 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5211 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5212 static int copy_insn_n_scratches;
5214 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5215 copied an ASM_OPERANDS.
5216 In that case, it is the original input-operand vector. */
5217 static rtvec orig_asm_operands_vector;
5219 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5220 copied an ASM_OPERANDS.
5221 In that case, it is the copied input-operand vector. */
5222 static rtvec copy_asm_operands_vector;
5224 /* Likewise for the constraints vector. */
5225 static rtvec orig_asm_constraints_vector;
5226 static rtvec copy_asm_constraints_vector;
5228 /* Recursively create a new copy of an rtx for copy_insn.
5229 This function differs from copy_rtx in that it handles SCRATCHes and
5230 ASM_OPERANDs properly.
5231 Normally, this function is not used directly; use copy_insn as front end.
5232 However, you could first copy an insn pattern with copy_insn and then use
5233 this function afterwards to properly copy any REG_NOTEs containing
5237 copy_insn_1 (rtx orig)
5242 const char *format_ptr;
5244 code = GET_CODE (orig);
5261 for (i = 0; i < copy_insn_n_scratches; i++)
5262 if (copy_insn_scratch_in[i] == orig)
5263 return copy_insn_scratch_out[i];
5267 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5268 a LABEL_REF, it isn't sharable. */
5269 if (GET_CODE (XEXP (orig, 0)) == PLUS
5270 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5271 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5275 /* A MEM with a constant address is not sharable. The problem is that
5276 the constant address may need to be reloaded. If the mem is shared,
5277 then reloading one copy of this mem will cause all copies to appear
5278 to have been reloaded. */
5284 copy = rtx_alloc (code);
5286 /* Copy the various flags, and other information. We assume that
5287 all fields need copying, and then clear the fields that should
5288 not be copied. That is the sensible default behavior, and forces
5289 us to explicitly document why we are *not* copying a flag. */
5290 memcpy (copy, orig, RTX_HDR_SIZE);
5292 /* We do not copy the USED flag, which is used as a mark bit during
5293 walks over the RTL. */
5294 RTX_FLAG (copy, used) = 0;
5296 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5297 if (GET_RTX_CLASS (code) == 'i')
5299 RTX_FLAG (copy, jump) = 0;
5300 RTX_FLAG (copy, call) = 0;
5301 RTX_FLAG (copy, frame_related) = 0;
5304 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5306 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5308 copy->u.fld[i] = orig->u.fld[i];
5309 switch (*format_ptr++)
5312 if (XEXP (orig, i) != NULL)
5313 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5318 if (XVEC (orig, i) == orig_asm_constraints_vector)
5319 XVEC (copy, i) = copy_asm_constraints_vector;
5320 else if (XVEC (orig, i) == orig_asm_operands_vector)
5321 XVEC (copy, i) = copy_asm_operands_vector;
5322 else if (XVEC (orig, i) != NULL)
5324 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5325 for (j = 0; j < XVECLEN (copy, i); j++)
5326 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5337 /* These are left unchanged. */
5345 if (code == SCRATCH)
5347 i = copy_insn_n_scratches++;
5348 if (i >= MAX_RECOG_OPERANDS)
5350 copy_insn_scratch_in[i] = orig;
5351 copy_insn_scratch_out[i] = copy;
5353 else if (code == ASM_OPERANDS)
5355 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5356 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5357 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5358 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5364 /* Create a new copy of an rtx.
5365 This function differs from copy_rtx in that it handles SCRATCHes and
5366 ASM_OPERANDs properly.
5367 INSN doesn't really have to be a full INSN; it could be just the
5370 copy_insn (rtx insn)
5372 copy_insn_n_scratches = 0;
5373 orig_asm_operands_vector = 0;
5374 orig_asm_constraints_vector = 0;
5375 copy_asm_operands_vector = 0;
5376 copy_asm_constraints_vector = 0;
5377 return copy_insn_1 (insn);
5380 /* Initialize data structures and variables in this file
5381 before generating rtl for each function. */
5386 struct function *f = cfun;
5388 f->emit = ggc_alloc (sizeof (struct emit_status));
5391 seq_rtl_expr = NULL;
5393 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5394 last_location.line = 0;
5395 last_location.file = 0;
5396 first_label_num = label_num;
5400 /* Init the tables that describe all the pseudo regs. */
5402 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5404 f->emit->regno_pointer_align
5405 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5406 * sizeof (unsigned char));
5409 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5411 /* Put copies of all the hard registers into regno_reg_rtx. */
5412 memcpy (regno_reg_rtx,
5413 static_regno_reg_rtx,
5414 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5416 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5417 init_virtual_regs (f->emit);
5419 /* Indicate that the virtual registers and stack locations are
5421 REG_POINTER (stack_pointer_rtx) = 1;
5422 REG_POINTER (frame_pointer_rtx) = 1;
5423 REG_POINTER (hard_frame_pointer_rtx) = 1;
5424 REG_POINTER (arg_pointer_rtx) = 1;
5426 REG_POINTER (virtual_incoming_args_rtx) = 1;
5427 REG_POINTER (virtual_stack_vars_rtx) = 1;
5428 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5429 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5430 REG_POINTER (virtual_cfa_rtx) = 1;
5432 #ifdef STACK_BOUNDARY
5433 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5434 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5435 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5436 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5438 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5439 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5440 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5441 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5442 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5445 #ifdef INIT_EXPANDERS
5450 /* Generate the constant 0. */
5453 gen_const_vector_0 (enum machine_mode mode)
5458 enum machine_mode inner;
5460 units = GET_MODE_NUNITS (mode);
5461 inner = GET_MODE_INNER (mode);
5463 v = rtvec_alloc (units);
5465 /* We need to call this function after we to set CONST0_RTX first. */
5466 if (!CONST0_RTX (inner))
5469 for (i = 0; i < units; ++i)
5470 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5472 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5476 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5477 all elements are zero. */
5479 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5481 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5484 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5485 if (RTVEC_ELT (v, i) != inner_zero)
5486 return gen_rtx_raw_CONST_VECTOR (mode, v);
5487 return CONST0_RTX (mode);
5490 /* Create some permanent unique rtl objects shared between all functions.
5491 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5494 init_emit_once (int line_numbers)
5497 enum machine_mode mode;
5498 enum machine_mode double_mode;
5500 /* We need reg_raw_mode, so initialize the modes now. */
5501 init_reg_modes_once ();
5503 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5505 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5506 const_int_htab_eq, NULL);
5508 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5509 const_double_htab_eq, NULL);
5511 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5512 mem_attrs_htab_eq, NULL);
5513 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5514 reg_attrs_htab_eq, NULL);
5516 no_line_numbers = ! line_numbers;
5518 /* Compute the word and byte modes. */
5520 byte_mode = VOIDmode;
5521 word_mode = VOIDmode;
5522 double_mode = VOIDmode;
5524 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5525 mode = GET_MODE_WIDER_MODE (mode))
5527 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5528 && byte_mode == VOIDmode)
5531 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5532 && word_mode == VOIDmode)
5536 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5537 mode = GET_MODE_WIDER_MODE (mode))
5539 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5540 && double_mode == VOIDmode)
5544 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5546 /* Assign register numbers to the globally defined register rtx.
5547 This must be done at runtime because the register number field
5548 is in a union and some compilers can't initialize unions. */
5550 pc_rtx = gen_rtx (PC, VOIDmode);
5551 cc0_rtx = gen_rtx (CC0, VOIDmode);
5552 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5553 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5554 if (hard_frame_pointer_rtx == 0)
5555 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5556 HARD_FRAME_POINTER_REGNUM);
5557 if (arg_pointer_rtx == 0)
5558 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5559 virtual_incoming_args_rtx =
5560 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5561 virtual_stack_vars_rtx =
5562 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5563 virtual_stack_dynamic_rtx =
5564 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5565 virtual_outgoing_args_rtx =
5566 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5567 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5569 /* Initialize RTL for commonly used hard registers. These are
5570 copied into regno_reg_rtx as we begin to compile each function. */
5571 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5572 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5574 #ifdef INIT_EXPANDERS
5575 /* This is to initialize {init|mark|free}_machine_status before the first
5576 call to push_function_context_to. This is needed by the Chill front
5577 end which calls push_function_context_to before the first call to
5578 init_function_start. */
5582 /* Create the unique rtx's for certain rtx codes and operand values. */
5584 /* Don't use gen_rtx here since gen_rtx in this case
5585 tries to use these variables. */
5586 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5587 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5588 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5590 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5591 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5592 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5594 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5596 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5597 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5598 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5599 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5600 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5601 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5602 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5604 dconsthalf = dconst1;
5607 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5609 /* Initialize mathematical constants for constant folding builtins.
5610 These constants need to be given to at least 160 bits precision. */
5611 real_from_string (&dconstpi,
5612 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5613 real_from_string (&dconste,
5614 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5616 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5618 REAL_VALUE_TYPE *r =
5619 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5621 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5622 mode = GET_MODE_WIDER_MODE (mode))
5623 const_tiny_rtx[i][(int) mode] =
5624 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5626 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5628 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5629 mode = GET_MODE_WIDER_MODE (mode))
5630 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5632 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5634 mode = GET_MODE_WIDER_MODE (mode))
5635 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5638 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5640 mode = GET_MODE_WIDER_MODE (mode))
5641 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5643 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5645 mode = GET_MODE_WIDER_MODE (mode))
5646 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5648 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5649 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5650 const_tiny_rtx[0][i] = const0_rtx;
5652 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5653 if (STORE_FLAG_VALUE == 1)
5654 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5656 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5657 return_address_pointer_rtx
5658 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5661 #ifdef STATIC_CHAIN_REGNUM
5662 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5664 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5665 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5666 static_chain_incoming_rtx
5667 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5670 static_chain_incoming_rtx = static_chain_rtx;
5674 static_chain_rtx = STATIC_CHAIN;
5676 #ifdef STATIC_CHAIN_INCOMING
5677 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5679 static_chain_incoming_rtx = static_chain_rtx;
5683 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5684 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5687 /* Query and clear/ restore no_line_numbers. This is used by the
5688 switch / case handling in stmt.c to give proper line numbers in
5689 warnings about unreachable code. */
5692 force_line_numbers (void)
5694 int old = no_line_numbers;
5696 no_line_numbers = 0;
5698 force_next_line_note ();
5703 restore_line_number_status (int old_value)
5705 no_line_numbers = old_value;
5708 /* Produce exact duplicate of insn INSN after AFTER.
5709 Care updating of libcall regions if present. */
5712 emit_copy_of_insn_after (rtx insn, rtx after)
5715 rtx note1, note2, link;
5717 switch (GET_CODE (insn))
5720 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5724 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5728 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5729 if (CALL_INSN_FUNCTION_USAGE (insn))
5730 CALL_INSN_FUNCTION_USAGE (new)
5731 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5732 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5733 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5740 /* Update LABEL_NUSES. */
5741 mark_jump_label (PATTERN (new), new, 0);
5743 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5745 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5747 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5748 if (REG_NOTE_KIND (link) != REG_LABEL)
5750 if (GET_CODE (link) == EXPR_LIST)
5752 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5757 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5762 /* Fix the libcall sequences. */
5763 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5766 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5768 XEXP (note1, 0) = p;
5769 XEXP (note2, 0) = new;
5771 INSN_CODE (new) = INSN_CODE (insn);
5775 #include "gt-emit-rtl.h"