1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these except perhaps the floating-point CONST_DOUBLEs
91 are unique; no other rtx-object will be equal to any of these. */
93 rtx global_rtl[GR_MAX];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static htab_t mem_attrs_htab;
151 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
152 shortly thrown away. We use two mechanisms to prevent this waste:
154 For sizes up to 5 elements, we keep a SEQUENCE and its associated
155 rtvec for use by gen_sequence. One entry for each size is
156 sufficient because most cases are calls to gen_sequence followed by
157 immediately emitting the SEQUENCE. Reuse is safe since emitting a
158 sequence is destructive on the insn in it anyway and hence can't be
161 We do not bother to save this cached data over nested function calls.
162 Instead, we just reinitialize them. */
164 #define SEQUENCE_RESULT_SIZE 5
166 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
168 /* During RTL generation, we also keep a list of free INSN rtl codes. */
169 static rtx free_insn;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_linenum (cfun->emit->x_last_linenum)
175 #define last_filename (cfun->emit->x_last_filename)
176 #define first_label_num (cfun->emit->x_first_label_num)
178 static rtx make_jump_insn_raw PARAMS ((rtx));
179 static rtx make_call_insn_raw PARAMS ((rtx));
180 static rtx find_line_note PARAMS ((rtx));
181 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
182 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
184 static void unshare_all_rtl_1 PARAMS ((rtx));
185 static void unshare_all_decls PARAMS ((tree));
186 static void reset_used_decls PARAMS ((tree));
187 static void mark_label_nuses PARAMS ((rtx));
188 static hashval_t const_int_htab_hash PARAMS ((const void *));
189 static int const_int_htab_eq PARAMS ((const void *,
191 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
192 static int mem_attrs_htab_eq PARAMS ((const void *,
194 static void mem_attrs_mark PARAMS ((const void *));
195 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
199 /* Probability of the conditional branch currently proceeded by try_split.
200 Set to -1 otherwise. */
201 int split_branch_probability = -1;
203 /* Returns a hash code for X (which is a really a CONST_INT). */
206 const_int_htab_hash (x)
209 return (hashval_t) INTVAL ((const struct rtx_def *) x);
212 /* Returns non-zero if the value represented by X (which is really a
213 CONST_INT) is the same as that given by Y (which is really a
217 const_int_htab_eq (x, y)
221 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
224 /* Returns a hash code for X (which is a really a mem_attrs *). */
227 mem_attrs_htab_hash (x)
230 mem_attrs *p = (mem_attrs *) x;
232 return (p->alias ^ (p->align * 1000)
233 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
234 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
238 /* Returns non-zero if the value represented by X (which is really a
239 mem_attrs *) is the same as that given by Y (which is also really a
243 mem_attrs_htab_eq (x, y)
247 mem_attrs *p = (mem_attrs *) x;
248 mem_attrs *q = (mem_attrs *) y;
250 return (p->alias == q->alias && p->decl == q->decl && p->offset == q->offset
251 && p->size == q->size && p->align == q->align);
254 /* This routine is called when we determine that we need a mem_attrs entry.
255 It marks the associated decl and RTL as being used, if present. */
261 mem_attrs *p = (mem_attrs *) x;
264 ggc_mark_tree (p->decl);
267 ggc_mark_rtx (p->offset);
270 ggc_mark_rtx (p->size);
273 /* Allocate a new mem_attrs structure and insert it into the hash table if
274 one identical to it is not already in the table. We are doing this for
278 get_mem_attrs (alias, decl, offset, size, align, mode)
284 enum machine_mode mode;
289 /* If everything is the default, we can just return zero. */
290 if (alias == 0 && decl == 0 && offset == 0
292 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
294 || (mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
299 attrs.offset = offset;
303 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
306 *slot = ggc_alloc (sizeof (mem_attrs));
307 memcpy (*slot, &attrs, sizeof (mem_attrs));
313 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
314 don't attempt to share with the various global pieces of rtl (such as
315 frame_pointer_rtx). */
318 gen_raw_REG (mode, regno)
319 enum machine_mode mode;
322 rtx x = gen_rtx_raw_REG (mode, regno);
323 ORIGINAL_REGNO (x) = regno;
327 /* There are some RTL codes that require special attention; the generation
328 functions do the raw handling. If you add to this list, modify
329 special_rtx in gengenrtl.c as well. */
332 gen_rtx_CONST_INT (mode, arg)
333 enum machine_mode mode ATTRIBUTE_UNUSED;
338 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
339 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
341 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
342 if (const_true_rtx && arg == STORE_FLAG_VALUE)
343 return const_true_rtx;
346 /* Look up the CONST_INT in the hash table. */
347 slot = htab_find_slot_with_hash (const_int_htab, &arg,
348 (hashval_t) arg, INSERT);
350 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
355 /* CONST_DOUBLEs needs special handling because their length is known
359 gen_rtx_CONST_DOUBLE (mode, arg0, arg1)
360 enum machine_mode mode;
361 HOST_WIDE_INT arg0, arg1;
363 rtx r = rtx_alloc (CONST_DOUBLE);
367 X0EXP (r, 0) = NULL_RTX;
371 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 2; --i)
378 gen_rtx_REG (mode, regno)
379 enum machine_mode mode;
382 /* In case the MD file explicitly references the frame pointer, have
383 all such references point to the same frame pointer. This is
384 used during frame pointer elimination to distinguish the explicit
385 references to these registers from pseudos that happened to be
388 If we have eliminated the frame pointer or arg pointer, we will
389 be using it as a normal register, for example as a spill
390 register. In such cases, we might be accessing it in a mode that
391 is not Pmode and therefore cannot use the pre-allocated rtx.
393 Also don't do this when we are making new REGs in reload, since
394 we don't want to get confused with the real pointers. */
396 if (mode == Pmode && !reload_in_progress)
398 if (regno == FRAME_POINTER_REGNUM)
399 return frame_pointer_rtx;
400 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
401 if (regno == HARD_FRAME_POINTER_REGNUM)
402 return hard_frame_pointer_rtx;
404 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
405 if (regno == ARG_POINTER_REGNUM)
406 return arg_pointer_rtx;
408 #ifdef RETURN_ADDRESS_POINTER_REGNUM
409 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
410 return return_address_pointer_rtx;
412 if (regno == STACK_POINTER_REGNUM)
413 return stack_pointer_rtx;
416 return gen_raw_REG (mode, regno);
420 gen_rtx_MEM (mode, addr)
421 enum machine_mode mode;
424 rtx rt = gen_rtx_raw_MEM (mode, addr);
426 /* This field is not cleared by the mere allocation of the rtx, so
434 gen_rtx_SUBREG (mode, reg, offset)
435 enum machine_mode mode;
439 /* This is the most common failure type.
440 Catch it early so we can see who does it. */
441 if ((offset % GET_MODE_SIZE (mode)) != 0)
444 /* This check isn't usable right now because combine will
445 throw arbitrary crap like a CALL into a SUBREG in
446 gen_lowpart_for_combine so we must just eat it. */
448 /* Check for this too. */
449 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
452 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
455 /* Generate a SUBREG representing the least-significant part of REG if MODE
456 is smaller than mode of REG, otherwise paradoxical SUBREG. */
459 gen_lowpart_SUBREG (mode, reg)
460 enum machine_mode mode;
463 enum machine_mode inmode;
465 inmode = GET_MODE (reg);
466 if (inmode == VOIDmode)
468 return gen_rtx_SUBREG (mode, reg,
469 subreg_lowpart_offset (mode, inmode));
472 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
474 ** This routine generates an RTX of the size specified by
475 ** <code>, which is an RTX code. The RTX structure is initialized
476 ** from the arguments <element1> through <elementn>, which are
477 ** interpreted according to the specific RTX type's format. The
478 ** special machine mode associated with the rtx (if any) is specified
481 ** gen_rtx can be invoked in a way which resembles the lisp-like
482 ** rtx it will generate. For example, the following rtx structure:
484 ** (plus:QI (mem:QI (reg:SI 1))
485 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
487 ** ...would be generated by the following C code:
489 ** gen_rtx (PLUS, QImode,
490 ** gen_rtx (MEM, QImode,
491 ** gen_rtx (REG, SImode, 1)),
492 ** gen_rtx (MEM, QImode,
493 ** gen_rtx (PLUS, SImode,
494 ** gen_rtx (REG, SImode, 2),
495 ** gen_rtx (REG, SImode, 3)))),
500 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
502 int i; /* Array indices... */
503 const char *fmt; /* Current rtx's format... */
504 rtx rt_val; /* RTX to return to caller... */
507 VA_FIXEDARG (p, enum rtx_code, code);
508 VA_FIXEDARG (p, enum machine_mode, mode);
513 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
518 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
519 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
521 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1);
526 rt_val = gen_rtx_REG (mode, va_arg (p, int));
530 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
534 rt_val = rtx_alloc (code); /* Allocate the storage space. */
535 rt_val->mode = mode; /* Store the machine mode... */
537 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
538 for (i = 0; i < GET_RTX_LENGTH (code); i++)
542 case '0': /* Unused field. */
545 case 'i': /* An integer? */
546 XINT (rt_val, i) = va_arg (p, int);
549 case 'w': /* A wide integer? */
550 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
553 case 's': /* A string? */
554 XSTR (rt_val, i) = va_arg (p, char *);
557 case 'e': /* An expression? */
558 case 'u': /* An insn? Same except when printing. */
559 XEXP (rt_val, i) = va_arg (p, rtx);
562 case 'E': /* An RTX vector? */
563 XVEC (rt_val, i) = va_arg (p, rtvec);
566 case 'b': /* A bitmap? */
567 XBITMAP (rt_val, i) = va_arg (p, bitmap);
570 case 't': /* A tree? */
571 XTREE (rt_val, i) = va_arg (p, tree);
585 /* gen_rtvec (n, [rt1, ..., rtn])
587 ** This routine creates an rtvec and stores within it the
588 ** pointers to rtx's which are its arguments.
593 gen_rtvec VPARAMS ((int n, ...))
599 VA_FIXEDARG (p, int, n);
602 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
604 vector = (rtx *) alloca (n * sizeof (rtx));
606 for (i = 0; i < n; i++)
607 vector[i] = va_arg (p, rtx);
609 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
613 return gen_rtvec_v (save_n, vector);
617 gen_rtvec_v (n, argp)
625 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
627 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
629 for (i = 0; i < n; i++)
630 rt_val->elem[i] = *argp++;
635 /* Generate a REG rtx for a new pseudo register of mode MODE.
636 This pseudo is assigned the next sequential register number. */
640 enum machine_mode mode;
642 struct function *f = cfun;
645 /* Don't let anything called after initial flow analysis create new
650 if (generating_concat_p
651 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
652 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
654 /* For complex modes, don't make a single pseudo.
655 Instead, make a CONCAT of two pseudos.
656 This allows noncontiguous allocation of the real and imaginary parts,
657 which makes much better code. Besides, allocating DCmode
658 pseudos overstrains reload on some machines like the 386. */
659 rtx realpart, imagpart;
660 int size = GET_MODE_UNIT_SIZE (mode);
661 enum machine_mode partmode
662 = mode_for_size (size * BITS_PER_UNIT,
663 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
664 ? MODE_FLOAT : MODE_INT),
667 realpart = gen_reg_rtx (partmode);
668 imagpart = gen_reg_rtx (partmode);
669 return gen_rtx_CONCAT (mode, realpart, imagpart);
672 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
673 enough to have an element for this pseudo reg number. */
675 if (reg_rtx_no == f->emit->regno_pointer_align_length)
677 int old_size = f->emit->regno_pointer_align_length;
682 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
683 memset (new + old_size, 0, old_size);
684 f->emit->regno_pointer_align = (unsigned char *) new;
686 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
687 old_size * 2 * sizeof (rtx));
688 memset (new1 + old_size, 0, old_size * sizeof (rtx));
689 regno_reg_rtx = new1;
691 new2 = (tree *) xrealloc (f->emit->regno_decl,
692 old_size * 2 * sizeof (tree));
693 memset (new2 + old_size, 0, old_size * sizeof (tree));
694 f->emit->regno_decl = new2;
696 f->emit->regno_pointer_align_length = old_size * 2;
699 val = gen_raw_REG (mode, reg_rtx_no);
700 regno_reg_rtx[reg_rtx_no++] = val;
704 /* Identify REG (which may be a CONCAT) as a user register. */
710 if (GET_CODE (reg) == CONCAT)
712 REG_USERVAR_P (XEXP (reg, 0)) = 1;
713 REG_USERVAR_P (XEXP (reg, 1)) = 1;
715 else if (GET_CODE (reg) == REG)
716 REG_USERVAR_P (reg) = 1;
721 /* Identify REG as a probable pointer register and show its alignment
722 as ALIGN, if nonzero. */
725 mark_reg_pointer (reg, align)
729 if (! REG_POINTER (reg))
731 REG_POINTER (reg) = 1;
734 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
736 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
737 /* We can no-longer be sure just how aligned this pointer is */
738 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
741 /* Return 1 plus largest pseudo reg number used in the current function. */
749 /* Return 1 + the largest label number used so far in the current function. */
754 if (last_label_num && label_num == base_label_num)
755 return last_label_num;
759 /* Return first label number used in this function (if any were used). */
762 get_first_label_num ()
764 return first_label_num;
767 /* Return the final regno of X, which is a SUBREG of a hard
770 subreg_hard_regno (x, check_mode)
774 enum machine_mode mode = GET_MODE (x);
775 unsigned int byte_offset, base_regno, final_regno;
776 rtx reg = SUBREG_REG (x);
778 /* This is where we attempt to catch illegal subregs
779 created by the compiler. */
780 if (GET_CODE (x) != SUBREG
781 || GET_CODE (reg) != REG)
783 base_regno = REGNO (reg);
784 if (base_regno >= FIRST_PSEUDO_REGISTER)
786 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
789 /* Catch non-congruent offsets too. */
790 byte_offset = SUBREG_BYTE (x);
791 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
794 final_regno = subreg_regno (x);
799 /* Return a value representing some low-order bits of X, where the number
800 of low-order bits is given by MODE. Note that no conversion is done
801 between floating-point and fixed-point values, rather, the bit
802 representation is returned.
804 This function handles the cases in common between gen_lowpart, below,
805 and two variants in cse.c and combine.c. These are the cases that can
806 be safely handled at all points in the compilation.
808 If this is not a case we can handle, return 0. */
811 gen_lowpart_common (mode, x)
812 enum machine_mode mode;
815 int msize = GET_MODE_SIZE (mode);
816 int xsize = GET_MODE_SIZE (GET_MODE (x));
819 if (GET_MODE (x) == mode)
822 /* MODE must occupy no more words than the mode of X. */
823 if (GET_MODE (x) != VOIDmode
824 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
825 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
828 offset = subreg_lowpart_offset (mode, GET_MODE (x));
830 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
831 && (GET_MODE_CLASS (mode) == MODE_INT
832 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
834 /* If we are getting the low-order part of something that has been
835 sign- or zero-extended, we can either just use the object being
836 extended or make a narrower extension. If we want an even smaller
837 piece than the size of the object being extended, call ourselves
840 This case is used mostly by combine and cse. */
842 if (GET_MODE (XEXP (x, 0)) == mode)
844 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
845 return gen_lowpart_common (mode, XEXP (x, 0));
846 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
847 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
849 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
850 || GET_CODE (x) == CONCAT)
851 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
852 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
853 from the low-order part of the constant. */
854 else if ((GET_MODE_CLASS (mode) == MODE_INT
855 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
856 && GET_MODE (x) == VOIDmode
857 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
859 /* If MODE is twice the host word size, X is already the desired
860 representation. Otherwise, if MODE is wider than a word, we can't
861 do this. If MODE is exactly a word, return just one CONST_INT. */
863 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
865 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
867 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
868 return (GET_CODE (x) == CONST_INT ? x
869 : GEN_INT (CONST_DOUBLE_LOW (x)));
872 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
873 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
874 : CONST_DOUBLE_LOW (x));
876 /* Sign extend to HOST_WIDE_INT. */
877 val = trunc_int_for_mode (val, mode);
879 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
884 #ifndef REAL_ARITHMETIC
885 /* If X is an integral constant but we want it in floating-point, it
886 must be the case that we have a union of an integer and a floating-point
887 value. If the machine-parameters allow it, simulate that union here
888 and return the result. The two-word and single-word cases are
891 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
892 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
893 || flag_pretend_float)
894 && GET_MODE_CLASS (mode) == MODE_FLOAT
895 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
896 && GET_CODE (x) == CONST_INT
897 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
899 union {HOST_WIDE_INT i; float d; } u;
902 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
904 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
905 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
906 || flag_pretend_float)
907 && GET_MODE_CLASS (mode) == MODE_FLOAT
908 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
909 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
910 && GET_MODE (x) == VOIDmode
911 && (sizeof (double) * HOST_BITS_PER_CHAR
912 == 2 * HOST_BITS_PER_WIDE_INT))
914 union {HOST_WIDE_INT i[2]; double d; } u;
915 HOST_WIDE_INT low, high;
917 if (GET_CODE (x) == CONST_INT)
918 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
920 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
922 #ifdef HOST_WORDS_BIG_ENDIAN
923 u.i[0] = high, u.i[1] = low;
925 u.i[0] = low, u.i[1] = high;
928 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
931 /* Similarly, if this is converting a floating-point value into a
932 single-word integer. Only do this is the host and target parameters are
935 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
936 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
937 || flag_pretend_float)
938 && (GET_MODE_CLASS (mode) == MODE_INT
939 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
940 && GET_CODE (x) == CONST_DOUBLE
941 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
942 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
943 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
945 /* Similarly, if this is converting a floating-point value into a
946 two-word integer, we can do this one word at a time and make an
947 integer. Only do this is the host and target parameters are
950 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
951 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
952 || flag_pretend_float)
953 && (GET_MODE_CLASS (mode) == MODE_INT
954 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
955 && GET_CODE (x) == CONST_DOUBLE
956 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
957 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
959 rtx lowpart, highpart;
961 lowpart = constant_subword (x,
962 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
964 highpart = constant_subword (x,
965 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
967 if (lowpart && GET_CODE (lowpart) == CONST_INT
968 && highpart && GET_CODE (highpart) == CONST_INT)
969 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
971 #else /* ifndef REAL_ARITHMETIC */
973 /* When we have a FP emulator, we can handle all conversions between
974 FP and integer operands. This simplifies reload because it
975 doesn't have to deal with constructs like (subreg:DI
976 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
977 /* Single-precision floats are always 32-bits and double-precision
978 floats are always 64-bits. */
980 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
981 && GET_MODE_BITSIZE (mode) == 32
982 && GET_CODE (x) == CONST_INT)
988 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
989 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
991 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
992 && GET_MODE_BITSIZE (mode) == 64
993 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
994 && GET_MODE (x) == VOIDmode)
998 HOST_WIDE_INT low, high;
1000 if (GET_CODE (x) == CONST_INT)
1003 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1007 low = CONST_DOUBLE_LOW (x);
1008 high = CONST_DOUBLE_HIGH (x);
1011 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1013 if (WORDS_BIG_ENDIAN)
1014 i[0] = high, i[1] = low;
1016 i[0] = low, i[1] = high;
1018 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1019 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1021 else if ((GET_MODE_CLASS (mode) == MODE_INT
1022 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1023 && GET_CODE (x) == CONST_DOUBLE
1024 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1027 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1028 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1030 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1031 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1034 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
1038 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
1041 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1045 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1051 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1053 #if HOST_BITS_PER_WIDE_INT == 32
1054 return immed_double_const (i[endian], i[1 - endian], mode);
1059 if (HOST_BITS_PER_WIDE_INT != 64)
1062 for (c = 0; c < 4; c++)
1065 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1069 return immed_double_const (((unsigned long) i[endian]) |
1070 (((HOST_WIDE_INT) i[1-endian]) << 32),
1074 return immed_double_const (((unsigned long) i[endian*3]) |
1075 (((HOST_WIDE_INT) i[1+endian]) << 32),
1076 ((unsigned long) i[2-endian]) |
1077 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1085 #endif /* ifndef REAL_ARITHMETIC */
1087 /* Otherwise, we can't do this. */
1091 /* Return the real part (which has mode MODE) of a complex value X.
1092 This always comes at the low address in memory. */
1095 gen_realpart (mode, x)
1096 enum machine_mode mode;
1099 if (WORDS_BIG_ENDIAN
1100 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1102 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1104 ("Can't access real part of complex value in hard register");
1105 else if (WORDS_BIG_ENDIAN)
1106 return gen_highpart (mode, x);
1108 return gen_lowpart (mode, x);
1111 /* Return the imaginary part (which has mode MODE) of a complex value X.
1112 This always comes at the high address in memory. */
1115 gen_imagpart (mode, x)
1116 enum machine_mode mode;
1119 if (WORDS_BIG_ENDIAN)
1120 return gen_lowpart (mode, x);
1121 else if (! WORDS_BIG_ENDIAN
1122 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1124 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1126 ("can't access imaginary part of complex value in hard register");
1128 return gen_highpart (mode, x);
1131 /* Return 1 iff X, assumed to be a SUBREG,
1132 refers to the real part of the complex value in its containing reg.
1133 Complex values are always stored with the real part in the first word,
1134 regardless of WORDS_BIG_ENDIAN. */
1137 subreg_realpart_p (x)
1140 if (GET_CODE (x) != SUBREG)
1143 return ((unsigned int) SUBREG_BYTE (x)
1144 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1147 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1148 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1149 least-significant part of X.
1150 MODE specifies how big a part of X to return;
1151 it usually should not be larger than a word.
1152 If X is a MEM whose address is a QUEUED, the value may be so also. */
1155 gen_lowpart (mode, x)
1156 enum machine_mode mode;
1159 rtx result = gen_lowpart_common (mode, x);
1163 else if (GET_CODE (x) == REG)
1165 /* Must be a hard reg that's not valid in MODE. */
1166 result = gen_lowpart_common (mode, copy_to_reg (x));
1171 else if (GET_CODE (x) == MEM)
1173 /* The only additional case we can do is MEM. */
1175 if (WORDS_BIG_ENDIAN)
1176 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1177 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1179 if (BYTES_BIG_ENDIAN)
1180 /* Adjust the address so that the address-after-the-data
1182 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1183 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1185 return adjust_address (x, mode, offset);
1187 else if (GET_CODE (x) == ADDRESSOF)
1188 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1193 /* Like `gen_lowpart', but refer to the most significant part.
1194 This is used to access the imaginary part of a complex number. */
1197 gen_highpart (mode, x)
1198 enum machine_mode mode;
1201 unsigned int msize = GET_MODE_SIZE (mode);
1204 /* This case loses if X is a subreg. To catch bugs early,
1205 complain if an invalid MODE is used even in other cases. */
1206 if (msize > UNITS_PER_WORD
1207 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1210 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1211 subreg_highpart_offset (mode, GET_MODE (x)));
1213 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1214 the target if we have a MEM. gen_highpart must return a valid operand,
1215 emitting code if necessary to do so. */
1216 if (GET_CODE (result) == MEM)
1217 result = validize_mem (result);
1224 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1225 be VOIDmode constant. */
1227 gen_highpart_mode (outermode, innermode, exp)
1228 enum machine_mode outermode, innermode;
1231 if (GET_MODE (exp) != VOIDmode)
1233 if (GET_MODE (exp) != innermode)
1235 return gen_highpart (outermode, exp);
1237 return simplify_gen_subreg (outermode, exp, innermode,
1238 subreg_highpart_offset (outermode, innermode));
1240 /* Return offset in bytes to get OUTERMODE low part
1241 of the value in mode INNERMODE stored in memory in target format. */
1244 subreg_lowpart_offset (outermode, innermode)
1245 enum machine_mode outermode, innermode;
1247 unsigned int offset = 0;
1248 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1252 if (WORDS_BIG_ENDIAN)
1253 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1254 if (BYTES_BIG_ENDIAN)
1255 offset += difference % UNITS_PER_WORD;
1261 /* Return offset in bytes to get OUTERMODE high part
1262 of the value in mode INNERMODE stored in memory in target format. */
1264 subreg_highpart_offset (outermode, innermode)
1265 enum machine_mode outermode, innermode;
1267 unsigned int offset = 0;
1268 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1270 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1275 if (! WORDS_BIG_ENDIAN)
1276 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1277 if (! BYTES_BIG_ENDIAN)
1278 offset += difference % UNITS_PER_WORD;
1284 /* Return 1 iff X, assumed to be a SUBREG,
1285 refers to the least significant part of its containing reg.
1286 If X is not a SUBREG, always return 1 (it is its own low part!). */
1289 subreg_lowpart_p (x)
1292 if (GET_CODE (x) != SUBREG)
1294 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1297 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1298 == SUBREG_BYTE (x));
1302 /* Helper routine for all the constant cases of operand_subword.
1303 Some places invoke this directly. */
1306 constant_subword (op, offset, mode)
1309 enum machine_mode mode;
1311 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1314 /* If OP is already an integer word, return it. */
1315 if (GET_MODE_CLASS (mode) == MODE_INT
1316 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1319 #ifdef REAL_ARITHMETIC
1320 /* The output is some bits, the width of the target machine's word.
1321 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1323 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1324 && GET_MODE_CLASS (mode) == MODE_FLOAT
1325 && GET_MODE_BITSIZE (mode) == 64
1326 && GET_CODE (op) == CONST_DOUBLE)
1331 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1332 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1334 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1335 which the words are written depends on the word endianness.
1336 ??? This is a potential portability problem and should
1337 be fixed at some point.
1339 We must excercise caution with the sign bit. By definition there
1340 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1341 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1342 So we explicitly mask and sign-extend as necessary. */
1343 if (BITS_PER_WORD == 32)
1346 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1347 return GEN_INT (val);
1349 #if HOST_BITS_PER_WIDE_INT >= 64
1350 else if (BITS_PER_WORD >= 64 && offset == 0)
1352 val = k[! WORDS_BIG_ENDIAN];
1353 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1354 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1355 return GEN_INT (val);
1358 else if (BITS_PER_WORD == 16)
1360 val = k[offset >> 1];
1361 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1363 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1364 return GEN_INT (val);
1369 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1370 && GET_MODE_CLASS (mode) == MODE_FLOAT
1371 && GET_MODE_BITSIZE (mode) > 64
1372 && GET_CODE (op) == CONST_DOUBLE)
1377 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1378 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1380 if (BITS_PER_WORD == 32)
1383 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1384 return GEN_INT (val);
1386 #if HOST_BITS_PER_WIDE_INT >= 64
1387 else if (BITS_PER_WORD >= 64 && offset <= 1)
1389 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1390 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1391 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1392 return GEN_INT (val);
1398 #else /* no REAL_ARITHMETIC */
1399 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1400 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1401 || flag_pretend_float)
1402 && GET_MODE_CLASS (mode) == MODE_FLOAT
1403 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1404 && GET_CODE (op) == CONST_DOUBLE)
1406 /* The constant is stored in the host's word-ordering,
1407 but we want to access it in the target's word-ordering. Some
1408 compilers don't like a conditional inside macro args, so we have two
1409 copies of the return. */
1410 #ifdef HOST_WORDS_BIG_ENDIAN
1411 return GEN_INT (offset == WORDS_BIG_ENDIAN
1412 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1414 return GEN_INT (offset != WORDS_BIG_ENDIAN
1415 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1418 #endif /* no REAL_ARITHMETIC */
1420 /* Single word float is a little harder, since single- and double-word
1421 values often do not have the same high-order bits. We have already
1422 verified that we want the only defined word of the single-word value. */
1423 #ifdef REAL_ARITHMETIC
1424 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1425 && GET_MODE_BITSIZE (mode) == 32
1426 && GET_CODE (op) == CONST_DOUBLE)
1431 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1432 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1434 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1436 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1438 if (BITS_PER_WORD == 16)
1440 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1442 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1445 return GEN_INT (val);
1448 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1449 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1450 || flag_pretend_float)
1451 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1452 && GET_MODE_CLASS (mode) == MODE_FLOAT
1453 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1454 && GET_CODE (op) == CONST_DOUBLE)
1457 union {float f; HOST_WIDE_INT i; } u;
1459 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1462 return GEN_INT (u.i);
1464 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1465 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1466 || flag_pretend_float)
1467 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1468 && GET_MODE_CLASS (mode) == MODE_FLOAT
1469 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1470 && GET_CODE (op) == CONST_DOUBLE)
1473 union {double d; HOST_WIDE_INT i; } u;
1475 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1478 return GEN_INT (u.i);
1480 #endif /* no REAL_ARITHMETIC */
1482 /* The only remaining cases that we can handle are integers.
1483 Convert to proper endianness now since these cases need it.
1484 At this point, offset == 0 means the low-order word.
1486 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1487 in general. However, if OP is (const_int 0), we can just return
1490 if (op == const0_rtx)
1493 if (GET_MODE_CLASS (mode) != MODE_INT
1494 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1495 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1498 if (WORDS_BIG_ENDIAN)
1499 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1501 /* Find out which word on the host machine this value is in and get
1502 it from the constant. */
1503 val = (offset / size_ratio == 0
1504 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1505 : (GET_CODE (op) == CONST_INT
1506 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1508 /* Get the value we want into the low bits of val. */
1509 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1510 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1512 val = trunc_int_for_mode (val, word_mode);
1514 return GEN_INT (val);
1517 /* Return subword OFFSET of operand OP.
1518 The word number, OFFSET, is interpreted as the word number starting
1519 at the low-order address. OFFSET 0 is the low-order word if not
1520 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1522 If we cannot extract the required word, we return zero. Otherwise,
1523 an rtx corresponding to the requested word will be returned.
1525 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1526 reload has completed, a valid address will always be returned. After
1527 reload, if a valid address cannot be returned, we return zero.
1529 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1530 it is the responsibility of the caller.
1532 MODE is the mode of OP in case it is a CONST_INT.
1534 ??? This is still rather broken for some cases. The problem for the
1535 moment is that all callers of this thing provide no 'goal mode' to
1536 tell us to work with. This exists because all callers were written
1537 in a word based SUBREG world.
1538 Now use of this function can be deprecated by simplify_subreg in most
1543 operand_subword (op, offset, validate_address, mode)
1545 unsigned int offset;
1546 int validate_address;
1547 enum machine_mode mode;
1549 if (mode == VOIDmode)
1550 mode = GET_MODE (op);
1552 if (mode == VOIDmode)
1555 /* If OP is narrower than a word, fail. */
1557 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1560 /* If we want a word outside OP, return zero. */
1562 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1565 /* Form a new MEM at the requested address. */
1566 if (GET_CODE (op) == MEM)
1568 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1570 if (! validate_address)
1573 else if (reload_completed)
1575 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1579 return replace_equiv_address (new, XEXP (new, 0));
1582 /* Rest can be handled by simplify_subreg. */
1583 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1586 /* Similar to `operand_subword', but never return 0. If we can't extract
1587 the required subword, put OP into a register and try again. If that fails,
1588 abort. We always validate the address in this case.
1590 MODE is the mode of OP, in case it is CONST_INT. */
1593 operand_subword_force (op, offset, mode)
1595 unsigned int offset;
1596 enum machine_mode mode;
1598 rtx result = operand_subword (op, offset, 1, mode);
1603 if (mode != BLKmode && mode != VOIDmode)
1605 /* If this is a register which can not be accessed by words, copy it
1606 to a pseudo register. */
1607 if (GET_CODE (op) == REG)
1608 op = copy_to_reg (op);
1610 op = force_reg (mode, op);
1613 result = operand_subword (op, offset, 1, mode);
1620 /* Given a compare instruction, swap the operands.
1621 A test instruction is changed into a compare of 0 against the operand. */
1624 reverse_comparison (insn)
1627 rtx body = PATTERN (insn);
1630 if (GET_CODE (body) == SET)
1631 comp = SET_SRC (body);
1633 comp = SET_SRC (XVECEXP (body, 0, 0));
1635 if (GET_CODE (comp) == COMPARE)
1637 rtx op0 = XEXP (comp, 0);
1638 rtx op1 = XEXP (comp, 1);
1639 XEXP (comp, 0) = op1;
1640 XEXP (comp, 1) = op0;
1644 rtx new = gen_rtx_COMPARE (VOIDmode,
1645 CONST0_RTX (GET_MODE (comp)), comp);
1646 if (GET_CODE (body) == SET)
1647 SET_SRC (body) = new;
1649 SET_SRC (XVECEXP (body, 0, 0)) = new;
1654 /* Given REF, a MEM, and T, either the type of X or the expression
1655 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1656 if we are making a new object of this type. */
1659 set_mem_attributes (ref, t, objectp)
1664 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1665 tree decl = MEM_DECL (ref);
1666 rtx offset = MEM_OFFSET (ref);
1667 rtx size = MEM_SIZE (ref);
1668 unsigned int align = MEM_ALIGN (ref);
1671 /* It can happen that type_for_mode was given a mode for which there
1672 is no language-level type. In which case it returns NULL, which
1677 type = TYPE_P (t) ? t : TREE_TYPE (t);
1679 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1680 wrong answer, as it assumes that DECL_RTL already has the right alias
1681 info. Callers should not set DECL_RTL until after the call to
1682 set_mem_attributes. */
1683 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1686 /* Get the alias set from the expression or type (perhaps using a
1687 front-end routine) and use it. */
1688 alias = get_alias_set (t);
1690 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1691 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1692 RTX_UNCHANGING_P (ref)
1693 |= ((lang_hooks.honor_readonly
1694 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1695 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1697 /* If we are making an object of this type, or if this is a DECL, we know
1698 that it is a scalar if the type is not an aggregate. */
1699 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1700 MEM_SCALAR_P (ref) = 1;
1702 /* If the size is known, we can set that. */
1703 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1704 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1706 /* If T is not a type, we may be able to deduce some more information about
1710 maybe_set_unchanging (ref, t);
1711 if (TREE_THIS_VOLATILE (t))
1712 MEM_VOLATILE_P (ref) = 1;
1714 /* Now remove any NOPs: they don't change what the underlying object is.
1715 Likewise for SAVE_EXPR. */
1716 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1717 || TREE_CODE (t) == NON_LVALUE_EXPR || TREE_CODE (t) == SAVE_EXPR)
1718 t = TREE_OPERAND (t, 0);
1720 /* If this expression can't be addressed (e.g., it contains a reference
1721 to a non-addressable field), show we don't change its alias set. */
1722 if (! can_address_p (t))
1723 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1725 /* If this is a decl, set the attributes of the MEM from it. */
1729 offset = GEN_INT (0);
1730 size = (DECL_SIZE_UNIT (t)
1731 && host_integerp (DECL_SIZE_UNIT (t), 1)
1732 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1733 align = DECL_ALIGN (t);
1736 /* If this is an INDIRECT_REF, we know its alignment. */
1737 else if (TREE_CODE (t) == INDIRECT_REF)
1738 align = TYPE_ALIGN (type);
1740 /* Likewise for constants. */
1741 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1743 align = TYPE_ALIGN (type);
1744 #ifdef CONSTANT_ALIGNMENT
1745 align = CONSTANT_ALIGNMENT (t, align);
1750 /* Now set the attributes we computed above. */
1752 = get_mem_attrs (alias, decl, offset, size, align, GET_MODE (ref));
1754 /* If this is already known to be a scalar or aggregate, we are done. */
1755 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1758 /* If it is a reference into an aggregate, this is part of an aggregate.
1759 Otherwise we don't know. */
1760 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1761 || TREE_CODE (t) == ARRAY_RANGE_REF
1762 || TREE_CODE (t) == BIT_FIELD_REF)
1763 MEM_IN_STRUCT_P (ref) = 1;
1766 /* Set the alias set of MEM to SET. */
1769 set_mem_alias_set (mem, set)
1773 #ifdef ENABLE_CHECKING
1774 /* If the new and old alias sets don't conflict, something is wrong. */
1775 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1779 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_DECL (mem), MEM_OFFSET (mem),
1780 MEM_SIZE (mem), MEM_ALIGN (mem),
1784 /* Set the alignment of MEM to ALIGN bits. */
1787 set_mem_align (mem, align)
1791 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_DECL (mem),
1792 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1796 /* Set the decl for MEM to DECL. */
1799 set_mem_decl (mem, decl)
1804 = get_mem_attrs (MEM_ALIAS_SET (mem), decl, MEM_OFFSET (mem),
1805 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1808 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1809 and its address changed to ADDR. (VOIDmode means don't change the mode.
1810 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1811 returned memory location is required to be valid. The memory
1812 attributes are not changed. */
1815 change_address_1 (memref, mode, addr, validate)
1817 enum machine_mode mode;
1823 if (GET_CODE (memref) != MEM)
1825 if (mode == VOIDmode)
1826 mode = GET_MODE (memref);
1828 addr = XEXP (memref, 0);
1832 if (reload_in_progress || reload_completed)
1834 if (! memory_address_p (mode, addr))
1838 addr = memory_address (mode, addr);
1841 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1844 new = gen_rtx_MEM (mode, addr);
1845 MEM_COPY_ATTRIBUTES (new, memref);
1849 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1850 way we are changing MEMREF, so we only preserve the alias set. */
1853 change_address (memref, mode, addr)
1855 enum machine_mode mode;
1858 rtx new = change_address_1 (memref, mode, addr, 1);
1859 enum machine_mode mmode = GET_MODE (new);
1862 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1863 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1864 (mmode == BLKmode ? 1
1865 : GET_MODE_ALIGNMENT (mmode) / BITS_PER_UNIT),
1871 /* Return a memory reference like MEMREF, but with its mode changed
1872 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1873 nonzero, the memory address is forced to be valid. */
1876 adjust_address_1 (memref, mode, offset, validate)
1878 enum machine_mode mode;
1879 HOST_WIDE_INT offset;
1882 rtx addr = XEXP (memref, 0);
1884 rtx memoffset = MEM_OFFSET (memref);
1886 unsigned int memalign = MEM_ALIGN (memref);
1888 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1889 object, we can merge it into the LO_SUM. */
1890 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1892 && (unsigned HOST_WIDE_INT) offset
1893 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1894 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1895 plus_constant (XEXP (addr, 1), offset));
1896 else if (offset == 0)
1897 /* ??? Prefer to create garbage instead of creating shared rtl. */
1898 addr = copy_rtx (addr);
1900 addr = plus_constant (addr, offset);
1902 new = change_address_1 (memref, mode, addr, validate);
1904 /* Compute the new values of the memory attributes due to this adjustment.
1905 We add the offsets and update the alignment. */
1907 memoffset = GEN_INT (offset + INTVAL (memoffset));
1909 /* Compute the new alignment by taking the MIN of the alignment and the
1910 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1913 memalign = MIN (memalign, (offset & -offset) * BITS_PER_UNIT);
1915 /* We can compute the size in a number of ways. */
1916 if (mode != BLKmode)
1917 size = GEN_INT (GET_MODE_SIZE (mode));
1918 else if (MEM_SIZE (memref))
1919 size = plus_constant (MEM_SIZE (memref), -offset);
1921 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref),
1922 memoffset, size, memalign, GET_MODE (new));
1924 /* At some point, we should validate that this offset is within the object,
1925 if all the appropriate values are known. */
1929 /* Return a memory reference like MEMREF, but whose address is changed by
1930 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1931 known to be in OFFSET (possibly 1). */
1934 offset_address (memref, offset, pow2)
1939 rtx new = change_address_1 (memref, VOIDmode,
1940 gen_rtx_PLUS (Pmode, XEXP (memref, 0),
1941 force_reg (Pmode, offset)), 1);
1943 /* Update the alignment to reflect the offset. Reset the offset, which
1945 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref),
1946 0, 0, MIN (MEM_ALIGN (memref),
1947 pow2 * BITS_PER_UNIT),
1952 /* Return a memory reference like MEMREF, but with its address changed to
1953 ADDR. The caller is asserting that the actual piece of memory pointed
1954 to is the same, just the form of the address is being changed, such as
1955 by putting something into a register. */
1958 replace_equiv_address (memref, addr)
1962 /* change_address_1 copies the memory attribute structure without change
1963 and that's exactly what we want here. */
1964 return change_address_1 (memref, VOIDmode, addr, 1);
1967 /* Likewise, but the reference is not required to be valid. */
1970 replace_equiv_address_nv (memref, addr)
1974 return change_address_1 (memref, VOIDmode, addr, 0);
1977 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1984 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1985 NULL_RTX, label_num++, NULL, NULL);
1987 LABEL_NUSES (label) = 0;
1988 LABEL_ALTERNATE_NAME (label) = NULL;
1992 /* For procedure integration. */
1994 /* Install new pointers to the first and last insns in the chain.
1995 Also, set cur_insn_uid to one higher than the last in use.
1996 Used for an inline-procedure after copying the insn chain. */
1999 set_new_first_and_last_insn (first, last)
2008 for (insn = first; insn; insn = NEXT_INSN (insn))
2009 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2014 /* Set the range of label numbers found in the current function.
2015 This is used when belatedly compiling an inline function. */
2018 set_new_first_and_last_label_num (first, last)
2021 base_label_num = label_num;
2022 first_label_num = first;
2023 last_label_num = last;
2026 /* Set the last label number found in the current function.
2027 This is used when belatedly compiling an inline function. */
2030 set_new_last_label_num (last)
2033 base_label_num = label_num;
2034 last_label_num = last;
2037 /* Restore all variables describing the current status from the structure *P.
2038 This is used after a nested function. */
2041 restore_emit_status (p)
2042 struct function *p ATTRIBUTE_UNUSED;
2045 clear_emit_caches ();
2048 /* Clear out all parts of the state in F that can safely be discarded
2049 after the function has been compiled, to let garbage collection
2050 reclaim the memory. */
2053 free_emit_status (f)
2056 free (f->emit->x_regno_reg_rtx);
2057 free (f->emit->regno_pointer_align);
2058 free (f->emit->regno_decl);
2063 /* Go through all the RTL insn bodies and copy any invalid shared
2064 structure. This routine should only be called once. */
2067 unshare_all_rtl (fndecl, insn)
2073 /* Make sure that virtual parameters are not shared. */
2074 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2075 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2077 /* Make sure that virtual stack slots are not shared. */
2078 unshare_all_decls (DECL_INITIAL (fndecl));
2080 /* Unshare just about everything else. */
2081 unshare_all_rtl_1 (insn);
2083 /* Make sure the addresses of stack slots found outside the insn chain
2084 (such as, in DECL_RTL of a variable) are not shared
2085 with the insn chain.
2087 This special care is necessary when the stack slot MEM does not
2088 actually appear in the insn chain. If it does appear, its address
2089 is unshared from all else at that point. */
2090 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2093 /* Go through all the RTL insn bodies and copy any invalid shared
2094 structure, again. This is a fairly expensive thing to do so it
2095 should be done sparingly. */
2098 unshare_all_rtl_again (insn)
2104 for (p = insn; p; p = NEXT_INSN (p))
2107 reset_used_flags (PATTERN (p));
2108 reset_used_flags (REG_NOTES (p));
2109 reset_used_flags (LOG_LINKS (p));
2112 /* Make sure that virtual stack slots are not shared. */
2113 reset_used_decls (DECL_INITIAL (cfun->decl));
2115 /* Make sure that virtual parameters are not shared. */
2116 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2117 reset_used_flags (DECL_RTL (decl));
2119 reset_used_flags (stack_slot_list);
2121 unshare_all_rtl (cfun->decl, insn);
2124 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2125 Assumes the mark bits are cleared at entry. */
2128 unshare_all_rtl_1 (insn)
2131 for (; insn; insn = NEXT_INSN (insn))
2134 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2135 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2136 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2140 /* Go through all virtual stack slots of a function and copy any
2141 shared structure. */
2143 unshare_all_decls (blk)
2148 /* Copy shared decls. */
2149 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2150 if (DECL_RTL_SET_P (t))
2151 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2153 /* Now process sub-blocks. */
2154 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2155 unshare_all_decls (t);
2158 /* Go through all virtual stack slots of a function and mark them as
2161 reset_used_decls (blk)
2167 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2168 if (DECL_RTL_SET_P (t))
2169 reset_used_flags (DECL_RTL (t));
2171 /* Now process sub-blocks. */
2172 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2173 reset_used_decls (t);
2176 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2177 Recursively does the same for subexpressions. */
2180 copy_rtx_if_shared (orig)
2186 const char *format_ptr;
2192 code = GET_CODE (x);
2194 /* These types may be freely shared. */
2207 /* SCRATCH must be shared because they represent distinct values. */
2211 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2212 a LABEL_REF, it isn't sharable. */
2213 if (GET_CODE (XEXP (x, 0)) == PLUS
2214 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2215 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2224 /* The chain of insns is not being copied. */
2228 /* A MEM is allowed to be shared if its address is constant.
2230 We used to allow sharing of MEMs which referenced
2231 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2232 that can lose. instantiate_virtual_regs will not unshare
2233 the MEMs, and combine may change the structure of the address
2234 because it looks safe and profitable in one context, but
2235 in some other context it creates unrecognizable RTL. */
2236 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2245 /* This rtx may not be shared. If it has already been seen,
2246 replace it with a copy of itself. */
2252 copy = rtx_alloc (code);
2254 (sizeof (*copy) - sizeof (copy->fld)
2255 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2261 /* Now scan the subexpressions recursively.
2262 We can store any replaced subexpressions directly into X
2263 since we know X is not shared! Any vectors in X
2264 must be copied if X was copied. */
2266 format_ptr = GET_RTX_FORMAT (code);
2268 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2270 switch (*format_ptr++)
2273 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2277 if (XVEC (x, i) != NULL)
2280 int len = XVECLEN (x, i);
2282 if (copied && len > 0)
2283 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2284 for (j = 0; j < len; j++)
2285 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2293 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2294 to look for shared sub-parts. */
2297 reset_used_flags (x)
2302 const char *format_ptr;
2307 code = GET_CODE (x);
2309 /* These types may be freely shared so we needn't do any resetting
2330 /* The chain of insns is not being copied. */
2339 format_ptr = GET_RTX_FORMAT (code);
2340 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2342 switch (*format_ptr++)
2345 reset_used_flags (XEXP (x, i));
2349 for (j = 0; j < XVECLEN (x, i); j++)
2350 reset_used_flags (XVECEXP (x, i, j));
2356 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2357 Return X or the rtx for the pseudo reg the value of X was copied into.
2358 OTHER must be valid as a SET_DEST. */
2361 make_safe_from (x, other)
2365 switch (GET_CODE (other))
2368 other = SUBREG_REG (other);
2370 case STRICT_LOW_PART:
2373 other = XEXP (other, 0);
2379 if ((GET_CODE (other) == MEM
2381 && GET_CODE (x) != REG
2382 && GET_CODE (x) != SUBREG)
2383 || (GET_CODE (other) == REG
2384 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2385 || reg_mentioned_p (other, x))))
2387 rtx temp = gen_reg_rtx (GET_MODE (x));
2388 emit_move_insn (temp, x);
2394 /* Emission of insns (adding them to the doubly-linked list). */
2396 /* Return the first insn of the current sequence or current function. */
2404 /* Return the last insn emitted in current sequence or current function. */
2412 /* Specify a new insn as the last in the chain. */
2415 set_last_insn (insn)
2418 if (NEXT_INSN (insn) != 0)
2423 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2426 get_last_insn_anywhere ()
2428 struct sequence_stack *stack;
2431 for (stack = seq_stack; stack; stack = stack->next)
2432 if (stack->last != 0)
2437 /* Return a number larger than any instruction's uid in this function. */
2442 return cur_insn_uid;
2445 /* Renumber instructions so that no instruction UIDs are wasted. */
2448 renumber_insns (stream)
2453 /* If we're not supposed to renumber instructions, don't. */
2454 if (!flag_renumber_insns)
2457 /* If there aren't that many instructions, then it's not really
2458 worth renumbering them. */
2459 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2464 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2467 fprintf (stream, "Renumbering insn %d to %d\n",
2468 INSN_UID (insn), cur_insn_uid);
2469 INSN_UID (insn) = cur_insn_uid++;
2473 /* Return the next insn. If it is a SEQUENCE, return the first insn
2482 insn = NEXT_INSN (insn);
2483 if (insn && GET_CODE (insn) == INSN
2484 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2485 insn = XVECEXP (PATTERN (insn), 0, 0);
2491 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2495 previous_insn (insn)
2500 insn = PREV_INSN (insn);
2501 if (insn && GET_CODE (insn) == INSN
2502 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2503 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2509 /* Return the next insn after INSN that is not a NOTE. This routine does not
2510 look inside SEQUENCEs. */
2513 next_nonnote_insn (insn)
2518 insn = NEXT_INSN (insn);
2519 if (insn == 0 || GET_CODE (insn) != NOTE)
2526 /* Return the previous insn before INSN that is not a NOTE. This routine does
2527 not look inside SEQUENCEs. */
2530 prev_nonnote_insn (insn)
2535 insn = PREV_INSN (insn);
2536 if (insn == 0 || GET_CODE (insn) != NOTE)
2543 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2544 or 0, if there is none. This routine does not look inside
2548 next_real_insn (insn)
2553 insn = NEXT_INSN (insn);
2554 if (insn == 0 || GET_CODE (insn) == INSN
2555 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2562 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2563 or 0, if there is none. This routine does not look inside
2567 prev_real_insn (insn)
2572 insn = PREV_INSN (insn);
2573 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2574 || GET_CODE (insn) == JUMP_INSN)
2581 /* Find the next insn after INSN that really does something. This routine
2582 does not look inside SEQUENCEs. Until reload has completed, this is the
2583 same as next_real_insn. */
2586 active_insn_p (insn)
2589 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2590 || (GET_CODE (insn) == INSN
2591 && (! reload_completed
2592 || (GET_CODE (PATTERN (insn)) != USE
2593 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2597 next_active_insn (insn)
2602 insn = NEXT_INSN (insn);
2603 if (insn == 0 || active_insn_p (insn))
2610 /* Find the last insn before INSN that really does something. This routine
2611 does not look inside SEQUENCEs. Until reload has completed, this is the
2612 same as prev_real_insn. */
2615 prev_active_insn (insn)
2620 insn = PREV_INSN (insn);
2621 if (insn == 0 || active_insn_p (insn))
2628 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2636 insn = NEXT_INSN (insn);
2637 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2644 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2652 insn = PREV_INSN (insn);
2653 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2661 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2662 and REG_CC_USER notes so we can find it. */
2665 link_cc0_insns (insn)
2668 rtx user = next_nonnote_insn (insn);
2670 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2671 user = XVECEXP (PATTERN (user), 0, 0);
2673 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2675 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2678 /* Return the next insn that uses CC0 after INSN, which is assumed to
2679 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2680 applied to the result of this function should yield INSN).
2682 Normally, this is simply the next insn. However, if a REG_CC_USER note
2683 is present, it contains the insn that uses CC0.
2685 Return 0 if we can't find the insn. */
2688 next_cc0_user (insn)
2691 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2694 return XEXP (note, 0);
2696 insn = next_nonnote_insn (insn);
2697 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2698 insn = XVECEXP (PATTERN (insn), 0, 0);
2700 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2706 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2707 note, it is the previous insn. */
2710 prev_cc0_setter (insn)
2713 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2716 return XEXP (note, 0);
2718 insn = prev_nonnote_insn (insn);
2719 if (! sets_cc0_p (PATTERN (insn)))
2726 /* Increment the label uses for all labels present in rtx. */
2736 code = GET_CODE (x);
2737 if (code == LABEL_REF)
2738 LABEL_NUSES (XEXP (x, 0))++;
2740 fmt = GET_RTX_FORMAT (code);
2741 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2744 mark_label_nuses (XEXP (x, i));
2745 else if (fmt[i] == 'E')
2746 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2747 mark_label_nuses (XVECEXP (x, i, j));
2752 /* Try splitting insns that can be split for better scheduling.
2753 PAT is the pattern which might split.
2754 TRIAL is the insn providing PAT.
2755 LAST is non-zero if we should return the last insn of the sequence produced.
2757 If this routine succeeds in splitting, it returns the first or last
2758 replacement insn depending on the value of LAST. Otherwise, it
2759 returns TRIAL. If the insn to be returned can be split, it will be. */
2762 try_split (pat, trial, last)
2766 rtx before = PREV_INSN (trial);
2767 rtx after = NEXT_INSN (trial);
2768 int has_barrier = 0;
2773 if (any_condjump_p (trial)
2774 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2775 split_branch_probability = INTVAL (XEXP (note, 0));
2776 probability = split_branch_probability;
2778 seq = split_insns (pat, trial);
2780 split_branch_probability = -1;
2782 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2783 We may need to handle this specially. */
2784 if (after && GET_CODE (after) == BARRIER)
2787 after = NEXT_INSN (after);
2792 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2793 The latter case will normally arise only when being done so that
2794 it, in turn, will be split (SFmode on the 29k is an example). */
2795 if (GET_CODE (seq) == SEQUENCE)
2799 /* Avoid infinite loop if any insn of the result matches
2800 the original pattern. */
2801 for (i = 0; i < XVECLEN (seq, 0); i++)
2802 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2803 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2807 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2808 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2810 rtx insn = XVECEXP (seq, 0, i);
2811 mark_jump_label (PATTERN (insn),
2812 XVECEXP (seq, 0, i), 0);
2814 if (probability != -1
2815 && any_condjump_p (insn)
2816 && !find_reg_note (insn, REG_BR_PROB, 0))
2818 /* We can preserve the REG_BR_PROB notes only if exactly
2819 one jump is created, otherwise the machinde description
2820 is responsible for this step using
2821 split_branch_probability variable. */
2825 = gen_rtx_EXPR_LIST (REG_BR_PROB,
2826 GEN_INT (probability),
2831 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2832 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2833 if (GET_CODE (trial) == CALL_INSN)
2834 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2835 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2836 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2837 = CALL_INSN_FUNCTION_USAGE (trial);
2839 /* Copy notes, particularly those related to the CFG. */
2840 for (note = REG_NOTES (trial); note ; note = XEXP (note, 1))
2842 switch (REG_NOTE_KIND (note))
2845 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2847 rtx insn = XVECEXP (seq, 0, i);
2848 if (GET_CODE (insn) == CALL_INSN
2849 || (flag_non_call_exceptions
2850 && may_trap_p (PATTERN (insn))))
2852 = gen_rtx_EXPR_LIST (REG_EH_REGION,
2860 case REG_ALWAYS_RETURN:
2861 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2863 rtx insn = XVECEXP (seq, 0, i);
2864 if (GET_CODE (insn) == CALL_INSN)
2866 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2872 case REG_NON_LOCAL_GOTO:
2873 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2875 rtx insn = XVECEXP (seq, 0, i);
2876 if (GET_CODE (insn) == JUMP_INSN)
2878 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2889 /* If there are LABELS inside the split insns increment the
2890 usage count so we don't delete the label. */
2891 if (GET_CODE (trial) == INSN)
2892 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2893 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2894 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2896 tem = emit_insn_after (seq, trial);
2898 delete_related_insns (trial);
2900 emit_barrier_after (tem);
2902 /* Recursively call try_split for each new insn created; by the
2903 time control returns here that insn will be fully split, so
2904 set LAST and continue from the insn after the one returned.
2905 We can't use next_active_insn here since AFTER may be a note.
2906 Ignore deleted insns, which can be occur if not optimizing. */
2907 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2908 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2909 tem = try_split (PATTERN (tem), tem, 1);
2911 /* Avoid infinite loop if the result matches the original pattern. */
2912 else if (rtx_equal_p (seq, pat))
2916 PATTERN (trial) = seq;
2917 INSN_CODE (trial) = -1;
2918 try_split (seq, trial, last);
2921 /* Return either the first or the last insn, depending on which was
2924 ? (after ? PREV_INSN (after) : last_insn)
2925 : NEXT_INSN (before);
2931 /* Make and return an INSN rtx, initializing all its slots.
2932 Store PATTERN in the pattern slots. */
2935 make_insn_raw (pattern)
2940 insn = rtx_alloc (INSN);
2942 INSN_UID (insn) = cur_insn_uid++;
2943 PATTERN (insn) = pattern;
2944 INSN_CODE (insn) = -1;
2945 LOG_LINKS (insn) = NULL;
2946 REG_NOTES (insn) = NULL;
2948 #ifdef ENABLE_RTL_CHECKING
2951 && (returnjump_p (insn)
2952 || (GET_CODE (insn) == SET
2953 && SET_DEST (insn) == pc_rtx)))
2955 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2963 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2966 make_jump_insn_raw (pattern)
2971 insn = rtx_alloc (JUMP_INSN);
2972 INSN_UID (insn) = cur_insn_uid++;
2974 PATTERN (insn) = pattern;
2975 INSN_CODE (insn) = -1;
2976 LOG_LINKS (insn) = NULL;
2977 REG_NOTES (insn) = NULL;
2978 JUMP_LABEL (insn) = NULL;
2983 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2986 make_call_insn_raw (pattern)
2991 insn = rtx_alloc (CALL_INSN);
2992 INSN_UID (insn) = cur_insn_uid++;
2994 PATTERN (insn) = pattern;
2995 INSN_CODE (insn) = -1;
2996 LOG_LINKS (insn) = NULL;
2997 REG_NOTES (insn) = NULL;
2998 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3003 /* Add INSN to the end of the doubly-linked list.
3004 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3010 PREV_INSN (insn) = last_insn;
3011 NEXT_INSN (insn) = 0;
3013 if (NULL != last_insn)
3014 NEXT_INSN (last_insn) = insn;
3016 if (NULL == first_insn)
3022 /* Add INSN into the doubly-linked list after insn AFTER. This and
3023 the next should be the only functions called to insert an insn once
3024 delay slots have been filled since only they know how to update a
3028 add_insn_after (insn, after)
3031 rtx next = NEXT_INSN (after);
3034 if (optimize && INSN_DELETED_P (after))
3037 NEXT_INSN (insn) = next;
3038 PREV_INSN (insn) = after;
3042 PREV_INSN (next) = insn;
3043 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3044 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3046 else if (last_insn == after)
3050 struct sequence_stack *stack = seq_stack;
3051 /* Scan all pending sequences too. */
3052 for (; stack; stack = stack->next)
3053 if (after == stack->last)
3063 if (basic_block_for_insn
3064 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3065 && (bb = BLOCK_FOR_INSN (after)))
3067 set_block_for_insn (insn, bb);
3068 /* Should not happen as first in the BB is always
3069 eigther NOTE or LABEL. */
3070 if (bb->end == after
3071 /* Avoid clobbering of structure when creating new BB. */
3072 && GET_CODE (insn) != BARRIER
3073 && (GET_CODE (insn) != NOTE
3074 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3078 NEXT_INSN (after) = insn;
3079 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3081 rtx sequence = PATTERN (after);
3082 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3086 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3087 the previous should be the only functions called to insert an insn once
3088 delay slots have been filled since only they know how to update a
3092 add_insn_before (insn, before)
3095 rtx prev = PREV_INSN (before);
3098 if (optimize && INSN_DELETED_P (before))
3101 PREV_INSN (insn) = prev;
3102 NEXT_INSN (insn) = before;
3106 NEXT_INSN (prev) = insn;
3107 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3109 rtx sequence = PATTERN (prev);
3110 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3113 else if (first_insn == before)
3117 struct sequence_stack *stack = seq_stack;
3118 /* Scan all pending sequences too. */
3119 for (; stack; stack = stack->next)
3120 if (before == stack->first)
3122 stack->first = insn;
3130 if (basic_block_for_insn
3131 && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements
3132 && (bb = BLOCK_FOR_INSN (before)))
3134 set_block_for_insn (insn, bb);
3135 /* Should not happen as first in the BB is always
3136 eigther NOTE or LABEl. */
3137 if (bb->head == insn
3138 /* Avoid clobbering of structure when creating new BB. */
3139 && GET_CODE (insn) != BARRIER
3140 && (GET_CODE (insn) != NOTE
3141 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3145 PREV_INSN (before) = insn;
3146 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3147 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3150 /* Remove an insn from its doubly-linked list. This function knows how
3151 to handle sequences. */
3156 rtx next = NEXT_INSN (insn);
3157 rtx prev = PREV_INSN (insn);
3162 NEXT_INSN (prev) = next;
3163 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3165 rtx sequence = PATTERN (prev);
3166 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3169 else if (first_insn == insn)
3173 struct sequence_stack *stack = seq_stack;
3174 /* Scan all pending sequences too. */
3175 for (; stack; stack = stack->next)
3176 if (insn == stack->first)
3178 stack->first = next;
3188 PREV_INSN (next) = prev;
3189 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3190 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3192 else if (last_insn == insn)
3196 struct sequence_stack *stack = seq_stack;
3197 /* Scan all pending sequences too. */
3198 for (; stack; stack = stack->next)
3199 if (insn == stack->last)
3208 if (basic_block_for_insn
3209 && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements
3210 && (bb = BLOCK_FOR_INSN (insn)))
3212 if (bb->head == insn)
3214 /* Never ever delete the basic block note without deleting whole basic
3216 if (GET_CODE (insn) == NOTE)
3220 if (bb->end == insn)
3225 /* Delete all insns made since FROM.
3226 FROM becomes the new last instruction. */
3229 delete_insns_since (from)
3235 NEXT_INSN (from) = 0;
3239 /* This function is deprecated, please use sequences instead.
3241 Move a consecutive bunch of insns to a different place in the chain.
3242 The insns to be moved are those between FROM and TO.
3243 They are moved to a new position after the insn AFTER.
3244 AFTER must not be FROM or TO or any insn in between.
3246 This function does not know about SEQUENCEs and hence should not be
3247 called after delay-slot filling has been done. */
3250 reorder_insns_nobb (from, to, after)
3251 rtx from, to, after;
3253 /* Splice this bunch out of where it is now. */
3254 if (PREV_INSN (from))
3255 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3257 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3258 if (last_insn == to)
3259 last_insn = PREV_INSN (from);
3260 if (first_insn == from)
3261 first_insn = NEXT_INSN (to);
3263 /* Make the new neighbors point to it and it to them. */
3264 if (NEXT_INSN (after))
3265 PREV_INSN (NEXT_INSN (after)) = to;
3267 NEXT_INSN (to) = NEXT_INSN (after);
3268 PREV_INSN (from) = after;
3269 NEXT_INSN (after) = from;
3270 if (after == last_insn)
3274 /* Same as function above, but take care to update BB boundaries. */
3276 reorder_insns (from, to, after)
3277 rtx from, to, after;
3279 rtx prev = PREV_INSN (from);
3280 basic_block bb, bb2;
3282 reorder_insns_nobb (from, to, after);
3284 if (basic_block_for_insn
3285 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3286 && (bb = BLOCK_FOR_INSN (after)))
3290 if (basic_block_for_insn
3291 && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements
3292 && (bb2 = BLOCK_FOR_INSN (from)))
3298 if (bb->end == after)
3301 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3302 set_block_for_insn (x, bb);
3306 /* Return the line note insn preceding INSN. */
3309 find_line_note (insn)
3312 if (no_line_numbers)
3315 for (; insn; insn = PREV_INSN (insn))
3316 if (GET_CODE (insn) == NOTE
3317 && NOTE_LINE_NUMBER (insn) >= 0)
3323 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3324 of the moved insns when debugging. This may insert a note between AFTER
3325 and FROM, and another one after TO. */
3328 reorder_insns_with_line_notes (from, to, after)
3329 rtx from, to, after;
3331 rtx from_line = find_line_note (from);
3332 rtx after_line = find_line_note (after);
3334 reorder_insns (from, to, after);
3336 if (from_line == after_line)
3340 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3341 NOTE_LINE_NUMBER (from_line),
3344 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3345 NOTE_LINE_NUMBER (after_line),
3349 /* Remove unnecessary notes from the instruction stream. */
3352 remove_unnecessary_notes ()
3354 rtx block_stack = NULL_RTX;
3355 rtx eh_stack = NULL_RTX;
3360 /* We must not remove the first instruction in the function because
3361 the compiler depends on the first instruction being a note. */
3362 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3364 /* Remember what's next. */
3365 next = NEXT_INSN (insn);
3367 /* We're only interested in notes. */
3368 if (GET_CODE (insn) != NOTE)
3371 switch (NOTE_LINE_NUMBER (insn))
3373 case NOTE_INSN_DELETED:
3377 case NOTE_INSN_EH_REGION_BEG:
3378 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3381 case NOTE_INSN_EH_REGION_END:
3382 /* Too many end notes. */
3383 if (eh_stack == NULL_RTX)
3385 /* Mismatched nesting. */
3386 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3389 eh_stack = XEXP (eh_stack, 1);
3390 free_INSN_LIST_node (tmp);
3393 case NOTE_INSN_BLOCK_BEG:
3394 /* By now, all notes indicating lexical blocks should have
3395 NOTE_BLOCK filled in. */
3396 if (NOTE_BLOCK (insn) == NULL_TREE)
3398 block_stack = alloc_INSN_LIST (insn, block_stack);
3401 case NOTE_INSN_BLOCK_END:
3402 /* Too many end notes. */
3403 if (block_stack == NULL_RTX)
3405 /* Mismatched nesting. */
3406 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3409 block_stack = XEXP (block_stack, 1);
3410 free_INSN_LIST_node (tmp);
3412 /* Scan back to see if there are any non-note instructions
3413 between INSN and the beginning of this block. If not,
3414 then there is no PC range in the generated code that will
3415 actually be in this block, so there's no point in
3416 remembering the existence of the block. */
3417 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3419 /* This block contains a real instruction. Note that we
3420 don't include labels; if the only thing in the block
3421 is a label, then there are still no PC values that
3422 lie within the block. */
3426 /* We're only interested in NOTEs. */
3427 if (GET_CODE (tmp) != NOTE)
3430 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3432 /* We just verified that this BLOCK matches us with
3433 the block_stack check above. Never delete the
3434 BLOCK for the outermost scope of the function; we
3435 can refer to names from that scope even if the
3436 block notes are messed up. */
3437 if (! is_body_block (NOTE_BLOCK (insn))
3438 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3445 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3446 /* There's a nested block. We need to leave the
3447 current block in place since otherwise the debugger
3448 wouldn't be able to show symbols from our block in
3449 the nested block. */
3455 /* Too many begin notes. */
3456 if (block_stack || eh_stack)
3461 /* Emit an insn of given code and pattern
3462 at a specified place within the doubly-linked list. */
3464 /* Make an instruction with body PATTERN
3465 and output it before the instruction BEFORE. */
3468 emit_insn_before (pattern, before)
3469 rtx pattern, before;
3473 if (GET_CODE (pattern) == SEQUENCE)
3477 for (i = 0; i < XVECLEN (pattern, 0); i++)
3479 insn = XVECEXP (pattern, 0, i);
3480 add_insn_before (insn, before);
3485 insn = make_insn_raw (pattern);
3486 add_insn_before (insn, before);
3492 /* Make an instruction with body PATTERN and code JUMP_INSN
3493 and output it before the instruction BEFORE. */
3496 emit_jump_insn_before (pattern, before)
3497 rtx pattern, before;
3501 if (GET_CODE (pattern) == SEQUENCE)
3502 insn = emit_insn_before (pattern, before);
3505 insn = make_jump_insn_raw (pattern);
3506 add_insn_before (insn, before);
3512 /* Make an instruction with body PATTERN and code CALL_INSN
3513 and output it before the instruction BEFORE. */
3516 emit_call_insn_before (pattern, before)
3517 rtx pattern, before;
3521 if (GET_CODE (pattern) == SEQUENCE)
3522 insn = emit_insn_before (pattern, before);
3525 insn = make_call_insn_raw (pattern);
3526 add_insn_before (insn, before);
3527 PUT_CODE (insn, CALL_INSN);
3533 /* Make an insn of code BARRIER
3534 and output it before the insn BEFORE. */
3537 emit_barrier_before (before)
3540 rtx insn = rtx_alloc (BARRIER);
3542 INSN_UID (insn) = cur_insn_uid++;
3544 add_insn_before (insn, before);
3548 /* Emit the label LABEL before the insn BEFORE. */
3551 emit_label_before (label, before)
3554 /* This can be called twice for the same label as a result of the
3555 confusion that follows a syntax error! So make it harmless. */
3556 if (INSN_UID (label) == 0)
3558 INSN_UID (label) = cur_insn_uid++;
3559 add_insn_before (label, before);
3565 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3568 emit_note_before (subtype, before)
3572 rtx note = rtx_alloc (NOTE);
3573 INSN_UID (note) = cur_insn_uid++;
3574 NOTE_SOURCE_FILE (note) = 0;
3575 NOTE_LINE_NUMBER (note) = subtype;
3577 add_insn_before (note, before);
3581 /* Make an insn of code INSN with body PATTERN
3582 and output it after the insn AFTER. */
3585 emit_insn_after (pattern, after)
3590 if (GET_CODE (pattern) == SEQUENCE)
3594 for (i = 0; i < XVECLEN (pattern, 0); i++)
3596 insn = XVECEXP (pattern, 0, i);
3597 add_insn_after (insn, after);
3603 insn = make_insn_raw (pattern);
3604 add_insn_after (insn, after);
3610 /* Similar to emit_insn_after, except that line notes are to be inserted so
3611 as to act as if this insn were at FROM. */
3614 emit_insn_after_with_line_notes (pattern, after, from)
3615 rtx pattern, after, from;
3617 rtx from_line = find_line_note (from);
3618 rtx after_line = find_line_note (after);
3619 rtx insn = emit_insn_after (pattern, after);
3622 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3623 NOTE_LINE_NUMBER (from_line),
3627 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3628 NOTE_LINE_NUMBER (after_line),
3632 /* Make an insn of code JUMP_INSN with body PATTERN
3633 and output it after the insn AFTER. */
3636 emit_jump_insn_after (pattern, after)
3641 if (GET_CODE (pattern) == SEQUENCE)
3642 insn = emit_insn_after (pattern, after);
3645 insn = make_jump_insn_raw (pattern);
3646 add_insn_after (insn, after);
3652 /* Make an insn of code BARRIER
3653 and output it after the insn AFTER. */
3656 emit_barrier_after (after)
3659 rtx insn = rtx_alloc (BARRIER);
3661 INSN_UID (insn) = cur_insn_uid++;
3663 add_insn_after (insn, after);
3667 /* Emit the label LABEL after the insn AFTER. */
3670 emit_label_after (label, after)
3673 /* This can be called twice for the same label
3674 as a result of the confusion that follows a syntax error!
3675 So make it harmless. */
3676 if (INSN_UID (label) == 0)
3678 INSN_UID (label) = cur_insn_uid++;
3679 add_insn_after (label, after);
3685 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3688 emit_note_after (subtype, after)
3692 rtx note = rtx_alloc (NOTE);
3693 INSN_UID (note) = cur_insn_uid++;
3694 NOTE_SOURCE_FILE (note) = 0;
3695 NOTE_LINE_NUMBER (note) = subtype;
3696 add_insn_after (note, after);
3700 /* Emit a line note for FILE and LINE after the insn AFTER. */
3703 emit_line_note_after (file, line, after)
3710 if (no_line_numbers && line > 0)
3716 note = rtx_alloc (NOTE);
3717 INSN_UID (note) = cur_insn_uid++;
3718 NOTE_SOURCE_FILE (note) = file;
3719 NOTE_LINE_NUMBER (note) = line;
3720 add_insn_after (note, after);
3724 /* Make an insn of code INSN with pattern PATTERN
3725 and add it to the end of the doubly-linked list.
3726 If PATTERN is a SEQUENCE, take the elements of it
3727 and emit an insn for each element.
3729 Returns the last insn emitted. */
3735 rtx insn = last_insn;
3737 if (GET_CODE (pattern) == SEQUENCE)
3741 for (i = 0; i < XVECLEN (pattern, 0); i++)
3743 insn = XVECEXP (pattern, 0, i);
3749 insn = make_insn_raw (pattern);
3756 /* Emit the insns in a chain starting with INSN.
3757 Return the last insn emitted. */
3767 rtx next = NEXT_INSN (insn);
3776 /* Emit the insns in a chain starting with INSN and place them in front of
3777 the insn BEFORE. Return the last insn emitted. */
3780 emit_insns_before (insn, before)
3788 rtx next = NEXT_INSN (insn);
3789 add_insn_before (insn, before);
3797 /* Emit the insns in a chain starting with FIRST and place them in back of
3798 the insn AFTER. Return the last insn emitted. */
3801 emit_insns_after (first, after)
3815 if (basic_block_for_insn
3816 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3817 && (bb = BLOCK_FOR_INSN (after)))
3819 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3820 set_block_for_insn (last, bb);
3821 set_block_for_insn (last, bb);
3822 if (bb->end == after)
3826 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3829 after_after = NEXT_INSN (after);
3831 NEXT_INSN (after) = first;
3832 PREV_INSN (first) = after;
3833 NEXT_INSN (last) = after_after;
3835 PREV_INSN (after_after) = last;
3837 if (after == last_insn)
3842 /* Make an insn of code JUMP_INSN with pattern PATTERN
3843 and add it to the end of the doubly-linked list. */
3846 emit_jump_insn (pattern)
3849 if (GET_CODE (pattern) == SEQUENCE)
3850 return emit_insn (pattern);
3853 rtx insn = make_jump_insn_raw (pattern);
3859 /* Make an insn of code CALL_INSN with pattern PATTERN
3860 and add it to the end of the doubly-linked list. */
3863 emit_call_insn (pattern)
3866 if (GET_CODE (pattern) == SEQUENCE)
3867 return emit_insn (pattern);
3870 rtx insn = make_call_insn_raw (pattern);
3872 PUT_CODE (insn, CALL_INSN);
3877 /* Add the label LABEL to the end of the doubly-linked list. */
3883 /* This can be called twice for the same label
3884 as a result of the confusion that follows a syntax error!
3885 So make it harmless. */
3886 if (INSN_UID (label) == 0)
3888 INSN_UID (label) = cur_insn_uid++;
3894 /* Make an insn of code BARRIER
3895 and add it to the end of the doubly-linked list. */
3900 rtx barrier = rtx_alloc (BARRIER);
3901 INSN_UID (barrier) = cur_insn_uid++;
3906 /* Make an insn of code NOTE
3907 with data-fields specified by FILE and LINE
3908 and add it to the end of the doubly-linked list,
3909 but only if line-numbers are desired for debugging info. */
3912 emit_line_note (file, line)
3916 set_file_and_line_for_stmt (file, line);
3919 if (no_line_numbers)
3923 return emit_note (file, line);
3926 /* Make an insn of code NOTE
3927 with data-fields specified by FILE and LINE
3928 and add it to the end of the doubly-linked list.
3929 If it is a line-number NOTE, omit it if it matches the previous one. */
3932 emit_note (file, line)
3940 if (file && last_filename && !strcmp (file, last_filename)
3941 && line == last_linenum)
3943 last_filename = file;
3944 last_linenum = line;
3947 if (no_line_numbers && line > 0)
3953 note = rtx_alloc (NOTE);
3954 INSN_UID (note) = cur_insn_uid++;
3955 NOTE_SOURCE_FILE (note) = file;
3956 NOTE_LINE_NUMBER (note) = line;
3961 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3964 emit_line_note_force (file, line)
3969 return emit_line_note (file, line);
3972 /* Cause next statement to emit a line note even if the line number
3973 has not changed. This is used at the beginning of a function. */
3976 force_next_line_note ()
3981 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3982 note of this type already exists, remove it first. */
3985 set_unique_reg_note (insn, kind, datum)
3990 rtx note = find_reg_note (insn, kind, NULL_RTX);
3992 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
3993 It serves no useful purpose and breaks eliminate_regs. */
3994 if ((kind == REG_EQUAL || kind == REG_EQUIV)
3995 && GET_CODE (datum) == ASM_OPERANDS)
4000 XEXP (note, 0) = datum;
4004 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4005 return REG_NOTES (insn);
4008 /* Return an indication of which type of insn should have X as a body.
4009 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4015 if (GET_CODE (x) == CODE_LABEL)
4017 if (GET_CODE (x) == CALL)
4019 if (GET_CODE (x) == RETURN)
4021 if (GET_CODE (x) == SET)
4023 if (SET_DEST (x) == pc_rtx)
4025 else if (GET_CODE (SET_SRC (x)) == CALL)
4030 if (GET_CODE (x) == PARALLEL)
4033 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4034 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4036 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4037 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4039 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4040 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4046 /* Emit the rtl pattern X as an appropriate kind of insn.
4047 If X is a label, it is simply added into the insn chain. */
4053 enum rtx_code code = classify_insn (x);
4055 if (code == CODE_LABEL)
4056 return emit_label (x);
4057 else if (code == INSN)
4058 return emit_insn (x);
4059 else if (code == JUMP_INSN)
4061 rtx insn = emit_jump_insn (x);
4062 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4063 return emit_barrier ();
4066 else if (code == CALL_INSN)
4067 return emit_call_insn (x);
4072 /* Begin emitting insns to a sequence which can be packaged in an
4073 RTL_EXPR. If this sequence will contain something that might cause
4074 the compiler to pop arguments to function calls (because those
4075 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4076 details), use do_pending_stack_adjust before calling this function.
4077 That will ensure that the deferred pops are not accidentally
4078 emitted in the middle of this sequence. */
4083 struct sequence_stack *tem;
4085 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4087 tem->next = seq_stack;
4088 tem->first = first_insn;
4089 tem->last = last_insn;
4090 tem->sequence_rtl_expr = seq_rtl_expr;
4098 /* Similarly, but indicate that this sequence will be placed in T, an
4099 RTL_EXPR. See the documentation for start_sequence for more
4100 information about how to use this function. */
4103 start_sequence_for_rtl_expr (t)
4111 /* Set up the insn chain starting with FIRST as the current sequence,
4112 saving the previously current one. See the documentation for
4113 start_sequence for more information about how to use this function. */
4116 push_to_sequence (first)
4123 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4129 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4132 push_to_full_sequence (first, last)
4138 /* We really should have the end of the insn chain here. */
4139 if (last && NEXT_INSN (last))
4143 /* Set up the outer-level insn chain
4144 as the current sequence, saving the previously current one. */
4147 push_topmost_sequence ()
4149 struct sequence_stack *stack, *top = NULL;
4153 for (stack = seq_stack; stack; stack = stack->next)
4156 first_insn = top->first;
4157 last_insn = top->last;
4158 seq_rtl_expr = top->sequence_rtl_expr;
4161 /* After emitting to the outer-level insn chain, update the outer-level
4162 insn chain, and restore the previous saved state. */
4165 pop_topmost_sequence ()
4167 struct sequence_stack *stack, *top = NULL;
4169 for (stack = seq_stack; stack; stack = stack->next)
4172 top->first = first_insn;
4173 top->last = last_insn;
4174 /* ??? Why don't we save seq_rtl_expr here? */
4179 /* After emitting to a sequence, restore previous saved state.
4181 To get the contents of the sequence just made, you must call
4182 `gen_sequence' *before* calling here.
4184 If the compiler might have deferred popping arguments while
4185 generating this sequence, and this sequence will not be immediately
4186 inserted into the instruction stream, use do_pending_stack_adjust
4187 before calling gen_sequence. That will ensure that the deferred
4188 pops are inserted into this sequence, and not into some random
4189 location in the instruction stream. See INHIBIT_DEFER_POP for more
4190 information about deferred popping of arguments. */
4195 struct sequence_stack *tem = seq_stack;
4197 first_insn = tem->first;
4198 last_insn = tem->last;
4199 seq_rtl_expr = tem->sequence_rtl_expr;
4200 seq_stack = tem->next;
4205 /* This works like end_sequence, but records the old sequence in FIRST
4209 end_full_sequence (first, last)
4212 *first = first_insn;
4217 /* Return 1 if currently emitting into a sequence. */
4222 return seq_stack != 0;
4225 /* Generate a SEQUENCE rtx containing the insns already emitted
4226 to the current sequence.
4228 This is how the gen_... function from a DEFINE_EXPAND
4229 constructs the SEQUENCE that it returns. */
4239 /* Count the insns in the chain. */
4241 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4244 /* If only one insn, return it rather than a SEQUENCE.
4245 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4246 the case of an empty list.)
4247 We only return the pattern of an insn if its code is INSN and it
4248 has no notes. This ensures that no information gets lost. */
4250 && ! RTX_FRAME_RELATED_P (first_insn)
4251 && GET_CODE (first_insn) == INSN
4252 /* Don't throw away any reg notes. */
4253 && REG_NOTES (first_insn) == 0)
4254 return PATTERN (first_insn);
4256 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4258 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4259 XVECEXP (result, 0, i) = tem;
4264 /* Put the various virtual registers into REGNO_REG_RTX. */
4267 init_virtual_regs (es)
4268 struct emit_status *es;
4270 rtx *ptr = es->x_regno_reg_rtx;
4271 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4272 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4273 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4274 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4275 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4279 clear_emit_caches ()
4283 /* Clear the start_sequence/gen_sequence cache. */
4284 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4285 sequence_result[i] = 0;
4289 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4290 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4291 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4292 static int copy_insn_n_scratches;
4294 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4295 copied an ASM_OPERANDS.
4296 In that case, it is the original input-operand vector. */
4297 static rtvec orig_asm_operands_vector;
4299 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4300 copied an ASM_OPERANDS.
4301 In that case, it is the copied input-operand vector. */
4302 static rtvec copy_asm_operands_vector;
4304 /* Likewise for the constraints vector. */
4305 static rtvec orig_asm_constraints_vector;
4306 static rtvec copy_asm_constraints_vector;
4308 /* Recursively create a new copy of an rtx for copy_insn.
4309 This function differs from copy_rtx in that it handles SCRATCHes and
4310 ASM_OPERANDs properly.
4311 Normally, this function is not used directly; use copy_insn as front end.
4312 However, you could first copy an insn pattern with copy_insn and then use
4313 this function afterwards to properly copy any REG_NOTEs containing
4323 const char *format_ptr;
4325 code = GET_CODE (orig);
4341 for (i = 0; i < copy_insn_n_scratches; i++)
4342 if (copy_insn_scratch_in[i] == orig)
4343 return copy_insn_scratch_out[i];
4347 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4348 a LABEL_REF, it isn't sharable. */
4349 if (GET_CODE (XEXP (orig, 0)) == PLUS
4350 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4351 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4355 /* A MEM with a constant address is not sharable. The problem is that
4356 the constant address may need to be reloaded. If the mem is shared,
4357 then reloading one copy of this mem will cause all copies to appear
4358 to have been reloaded. */
4364 copy = rtx_alloc (code);
4366 /* Copy the various flags, and other information. We assume that
4367 all fields need copying, and then clear the fields that should
4368 not be copied. That is the sensible default behavior, and forces
4369 us to explicitly document why we are *not* copying a flag. */
4370 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4372 /* We do not copy the USED flag, which is used as a mark bit during
4373 walks over the RTL. */
4376 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4377 if (GET_RTX_CLASS (code) == 'i')
4381 copy->frame_related = 0;
4384 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4386 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4388 copy->fld[i] = orig->fld[i];
4389 switch (*format_ptr++)
4392 if (XEXP (orig, i) != NULL)
4393 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4398 if (XVEC (orig, i) == orig_asm_constraints_vector)
4399 XVEC (copy, i) = copy_asm_constraints_vector;
4400 else if (XVEC (orig, i) == orig_asm_operands_vector)
4401 XVEC (copy, i) = copy_asm_operands_vector;
4402 else if (XVEC (orig, i) != NULL)
4404 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4405 for (j = 0; j < XVECLEN (copy, i); j++)
4406 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4417 /* These are left unchanged. */
4425 if (code == SCRATCH)
4427 i = copy_insn_n_scratches++;
4428 if (i >= MAX_RECOG_OPERANDS)
4430 copy_insn_scratch_in[i] = orig;
4431 copy_insn_scratch_out[i] = copy;
4433 else if (code == ASM_OPERANDS)
4435 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4436 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4437 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4438 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4444 /* Create a new copy of an rtx.
4445 This function differs from copy_rtx in that it handles SCRATCHes and
4446 ASM_OPERANDs properly.
4447 INSN doesn't really have to be a full INSN; it could be just the
4453 copy_insn_n_scratches = 0;
4454 orig_asm_operands_vector = 0;
4455 orig_asm_constraints_vector = 0;
4456 copy_asm_operands_vector = 0;
4457 copy_asm_constraints_vector = 0;
4458 return copy_insn_1 (insn);
4461 /* Initialize data structures and variables in this file
4462 before generating rtl for each function. */
4467 struct function *f = cfun;
4469 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4472 seq_rtl_expr = NULL;
4474 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4477 first_label_num = label_num;
4481 clear_emit_caches ();
4483 /* Init the tables that describe all the pseudo regs. */
4485 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4487 f->emit->regno_pointer_align
4488 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4489 sizeof (unsigned char));
4492 = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx));
4495 = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree));
4497 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4498 init_virtual_regs (f->emit);
4500 /* Indicate that the virtual registers and stack locations are
4502 REG_POINTER (stack_pointer_rtx) = 1;
4503 REG_POINTER (frame_pointer_rtx) = 1;
4504 REG_POINTER (hard_frame_pointer_rtx) = 1;
4505 REG_POINTER (arg_pointer_rtx) = 1;
4507 REG_POINTER (virtual_incoming_args_rtx) = 1;
4508 REG_POINTER (virtual_stack_vars_rtx) = 1;
4509 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4510 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4511 REG_POINTER (virtual_cfa_rtx) = 1;
4513 #ifdef STACK_BOUNDARY
4514 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4515 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4516 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4517 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4519 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4520 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4521 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4522 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4523 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4526 #ifdef INIT_EXPANDERS
4531 /* Mark SS for GC. */
4534 mark_sequence_stack (ss)
4535 struct sequence_stack *ss;
4539 ggc_mark_rtx (ss->first);
4540 ggc_mark_tree (ss->sequence_rtl_expr);
4545 /* Mark ES for GC. */
4548 mark_emit_status (es)
4549 struct emit_status *es;
4558 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx,
4560 i > 0; --i, ++r, ++t)
4566 mark_sequence_stack (es->sequence_stack);
4567 ggc_mark_tree (es->sequence_rtl_expr);
4568 ggc_mark_rtx (es->x_first_insn);
4571 /* Create some permanent unique rtl objects shared between all functions.
4572 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4575 init_emit_once (line_numbers)
4579 enum machine_mode mode;
4580 enum machine_mode double_mode;
4582 /* Initialize the CONST_INT and memory attribute hash tables. */
4583 const_int_htab = htab_create (37, const_int_htab_hash,
4584 const_int_htab_eq, NULL);
4585 ggc_add_deletable_htab (const_int_htab, 0, 0);
4587 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4588 mem_attrs_htab_eq, NULL);
4589 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4591 no_line_numbers = ! line_numbers;
4593 /* Compute the word and byte modes. */
4595 byte_mode = VOIDmode;
4596 word_mode = VOIDmode;
4597 double_mode = VOIDmode;
4599 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4600 mode = GET_MODE_WIDER_MODE (mode))
4602 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4603 && byte_mode == VOIDmode)
4606 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4607 && word_mode == VOIDmode)
4611 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4612 mode = GET_MODE_WIDER_MODE (mode))
4614 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4615 && double_mode == VOIDmode)
4619 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4621 /* Assign register numbers to the globally defined register rtx.
4622 This must be done at runtime because the register number field
4623 is in a union and some compilers can't initialize unions. */
4625 pc_rtx = gen_rtx (PC, VOIDmode);
4626 cc0_rtx = gen_rtx (CC0, VOIDmode);
4627 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4628 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4629 if (hard_frame_pointer_rtx == 0)
4630 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4631 HARD_FRAME_POINTER_REGNUM);
4632 if (arg_pointer_rtx == 0)
4633 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4634 virtual_incoming_args_rtx =
4635 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4636 virtual_stack_vars_rtx =
4637 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4638 virtual_stack_dynamic_rtx =
4639 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4640 virtual_outgoing_args_rtx =
4641 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4642 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4644 /* These rtx must be roots if GC is enabled. */
4645 ggc_add_rtx_root (global_rtl, GR_MAX);
4647 #ifdef INIT_EXPANDERS
4648 /* This is to initialize {init|mark|free}_machine_status before the first
4649 call to push_function_context_to. This is needed by the Chill front
4650 end which calls push_function_context_to before the first cal to
4651 init_function_start. */
4655 /* Create the unique rtx's for certain rtx codes and operand values. */
4657 /* Don't use gen_rtx here since gen_rtx in this case
4658 tries to use these variables. */
4659 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4660 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4661 gen_rtx_raw_CONST_INT (VOIDmode, i);
4662 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4664 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4665 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4666 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4668 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4670 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4671 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4672 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4673 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4675 for (i = 0; i <= 2; i++)
4677 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4678 mode = GET_MODE_WIDER_MODE (mode))
4680 rtx tem = rtx_alloc (CONST_DOUBLE);
4681 union real_extract u;
4683 /* Zero any holes in a structure. */
4684 memset ((char *) &u, 0, sizeof u);
4685 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4687 /* Avoid trailing garbage in the rtx. */
4688 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4689 CONST_DOUBLE_LOW (tem) = 0;
4690 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4691 CONST_DOUBLE_HIGH (tem) = 0;
4693 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4694 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4695 PUT_MODE (tem, mode);
4697 const_tiny_rtx[i][(int) mode] = tem;
4700 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4702 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4703 mode = GET_MODE_WIDER_MODE (mode))
4704 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4706 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4708 mode = GET_MODE_WIDER_MODE (mode))
4709 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4712 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4713 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4714 const_tiny_rtx[0][i] = const0_rtx;
4716 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4717 if (STORE_FLAG_VALUE == 1)
4718 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4720 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4721 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4722 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4723 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4724 ggc_add_rtx_root (&const_true_rtx, 1);
4726 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4727 return_address_pointer_rtx
4728 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4732 struct_value_rtx = STRUCT_VALUE;
4734 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4737 #ifdef STRUCT_VALUE_INCOMING
4738 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4740 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4741 struct_value_incoming_rtx
4742 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4744 struct_value_incoming_rtx = struct_value_rtx;
4748 #ifdef STATIC_CHAIN_REGNUM
4749 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4751 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4752 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4753 static_chain_incoming_rtx
4754 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4757 static_chain_incoming_rtx = static_chain_rtx;
4761 static_chain_rtx = STATIC_CHAIN;
4763 #ifdef STATIC_CHAIN_INCOMING
4764 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4766 static_chain_incoming_rtx = static_chain_rtx;
4770 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4771 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4773 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4774 ggc_add_rtx_root (&struct_value_rtx, 1);
4775 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4776 ggc_add_rtx_root (&static_chain_rtx, 1);
4777 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4778 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4781 /* Query and clear/ restore no_line_numbers. This is used by the
4782 switch / case handling in stmt.c to give proper line numbers in
4783 warnings about unreachable code. */
4786 force_line_numbers ()
4788 int old = no_line_numbers;
4790 no_line_numbers = 0;
4792 force_next_line_note ();
4797 restore_line_number_status (old_value)
4800 no_line_numbers = old_value;