1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* Datastructures maintained for currently processed function in RTL form. */
71 struct rtl_data x_rtl;
73 /* Indexed by pseudo register number, gives the rtx for that pseudo.
74 Allocated in parallel with regno_pointer_align.
75 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
76 with length attribute nested in top level structures. */
80 /* This is *not* reset after each function. It gives each CODE_LABEL
81 in the entire compilation a unique label number. */
83 static GTY(()) int label_num = 1;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconsthalf;
116 /* Record fixed-point constant 0 and 1. */
117 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
118 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
157 htab_t const_int_htab;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
161 htab_t mem_attrs_htab;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
165 htab_t reg_attrs_htab;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_double_htab;
171 /* A hash table storing all CONST_FIXEDs. */
172 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
173 htab_t const_fixed_htab;
175 #define first_insn (crtl->emit.x_first_insn)
176 #define last_insn (crtl->emit.x_last_insn)
177 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
178 #define last_location (crtl->emit.x_last_location)
179 #define first_label_num (crtl->emit.x_first_label_num)
181 static rtx make_call_insn_raw (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void set_used_decls (tree);
184 static void mark_label_nuses (rtx);
185 static hashval_t const_int_htab_hash (const void *);
186 static int const_int_htab_eq (const void *, const void *);
187 static hashval_t const_double_htab_hash (const void *);
188 static int const_double_htab_eq (const void *, const void *);
189 static rtx lookup_const_double (rtx);
190 static hashval_t const_fixed_htab_hash (const void *);
191 static int const_fixed_htab_eq (const void *, const void *);
192 static rtx lookup_const_fixed (rtx);
193 static hashval_t mem_attrs_htab_hash (const void *);
194 static int mem_attrs_htab_eq (const void *, const void *);
195 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
197 static hashval_t reg_attrs_htab_hash (const void *);
198 static int reg_attrs_htab_eq (const void *, const void *);
199 static reg_attrs *get_reg_attrs (tree, int);
200 static rtx gen_const_vector (enum machine_mode, int);
201 static void copy_rtx_if_shared_1 (rtx *orig);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x)
212 return (hashval_t) INTVAL ((const_rtx) x);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x, const void *y)
222 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x)
229 const_rtx const value = (const_rtx) x;
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x, const void *y)
248 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
250 if (GET_MODE (a) != GET_MODE (b))
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
260 /* Returns a hash code for X (which is really a CONST_FIXED). */
263 const_fixed_htab_hash (const void *x)
265 const_rtx const value = (const_rtx) x;
268 h = fixed_hash (CONST_FIXED_VALUE (value));
269 /* MODE is used in the comparison, so it should be in the hash. */
270 h ^= GET_MODE (value);
274 /* Returns nonzero if the value represented by X (really a ...)
275 is the same as that represented by Y (really a ...). */
278 const_fixed_htab_eq (const void *x, const void *y)
280 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
282 if (GET_MODE (a) != GET_MODE (b))
284 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
287 /* Returns a hash code for X (which is a really a mem_attrs *). */
290 mem_attrs_htab_hash (const void *x)
292 const mem_attrs *const p = (const mem_attrs *) x;
294 return (p->alias ^ (p->align * 1000)
295 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
296 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
297 ^ (size_t) iterative_hash_expr (p->expr, 0));
300 /* Returns nonzero if the value represented by X (which is really a
301 mem_attrs *) is the same as that given by Y (which is also really a
305 mem_attrs_htab_eq (const void *x, const void *y)
307 const mem_attrs *const p = (const mem_attrs *) x;
308 const mem_attrs *const q = (const mem_attrs *) y;
310 return (p->alias == q->alias && p->offset == q->offset
311 && p->size == q->size && p->align == q->align
312 && (p->expr == q->expr
313 || (p->expr != NULL_TREE && q->expr != NULL_TREE
314 && operand_equal_p (p->expr, q->expr, 0))));
317 /* Allocate a new mem_attrs structure and insert it into the hash table if
318 one identical to it is not already in the table. We are doing this for
322 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
323 unsigned int align, enum machine_mode mode)
328 /* If everything is the default, we can just return zero.
329 This must match what the corresponding MEM_* macros return when the
330 field is not present. */
331 if (alias == 0 && expr == 0 && offset == 0
333 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
334 && (STRICT_ALIGNMENT && mode != BLKmode
335 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
340 attrs.offset = offset;
344 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
347 *slot = ggc_alloc (sizeof (mem_attrs));
348 memcpy (*slot, &attrs, sizeof (mem_attrs));
351 return (mem_attrs *) *slot;
354 /* Returns a hash code for X (which is a really a reg_attrs *). */
357 reg_attrs_htab_hash (const void *x)
359 const reg_attrs *const p = (const reg_attrs *) x;
361 return ((p->offset * 1000) ^ (long) p->decl);
364 /* Returns nonzero if the value represented by X (which is really a
365 reg_attrs *) is the same as that given by Y (which is also really a
369 reg_attrs_htab_eq (const void *x, const void *y)
371 const reg_attrs *const p = (const reg_attrs *) x;
372 const reg_attrs *const q = (const reg_attrs *) y;
374 return (p->decl == q->decl && p->offset == q->offset);
376 /* Allocate a new reg_attrs structure and insert it into the hash table if
377 one identical to it is not already in the table. We are doing this for
381 get_reg_attrs (tree decl, int offset)
386 /* If everything is the default, we can just return zero. */
387 if (decl == 0 && offset == 0)
391 attrs.offset = offset;
393 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
396 *slot = ggc_alloc (sizeof (reg_attrs));
397 memcpy (*slot, &attrs, sizeof (reg_attrs));
400 return (reg_attrs *) *slot;
405 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
411 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
412 MEM_VOLATILE_P (x) = true;
418 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
419 don't attempt to share with the various global pieces of rtl (such as
420 frame_pointer_rtx). */
423 gen_raw_REG (enum machine_mode mode, int regno)
425 rtx x = gen_rtx_raw_REG (mode, regno);
426 ORIGINAL_REGNO (x) = regno;
430 /* There are some RTL codes that require special attention; the generation
431 functions do the raw handling. If you add to this list, modify
432 special_rtx in gengenrtl.c as well. */
435 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
439 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
440 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
442 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
443 if (const_true_rtx && arg == STORE_FLAG_VALUE)
444 return const_true_rtx;
447 /* Look up the CONST_INT in the hash table. */
448 slot = htab_find_slot_with_hash (const_int_htab, &arg,
449 (hashval_t) arg, INSERT);
451 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
457 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
459 return GEN_INT (trunc_int_for_mode (c, mode));
462 /* CONST_DOUBLEs might be created from pairs of integers, or from
463 REAL_VALUE_TYPEs. Also, their length is known only at run time,
464 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
466 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
467 hash table. If so, return its counterpart; otherwise add it
468 to the hash table and return it. */
470 lookup_const_double (rtx real)
472 void **slot = htab_find_slot (const_double_htab, real, INSERT);
479 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
480 VALUE in mode MODE. */
482 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
484 rtx real = rtx_alloc (CONST_DOUBLE);
485 PUT_MODE (real, mode);
489 return lookup_const_double (real);
492 /* Determine whether FIXED, a CONST_FIXED, already exists in the
493 hash table. If so, return its counterpart; otherwise add it
494 to the hash table and return it. */
497 lookup_const_fixed (rtx fixed)
499 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
506 /* Return a CONST_FIXED rtx for a fixed-point value specified by
507 VALUE in mode MODE. */
510 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
512 rtx fixed = rtx_alloc (CONST_FIXED);
513 PUT_MODE (fixed, mode);
517 return lookup_const_fixed (fixed);
520 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
521 of ints: I0 is the low-order word and I1 is the high-order word.
522 Do not use this routine for non-integer modes; convert to
523 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
526 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
531 /* There are the following cases (note that there are no modes with
532 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
534 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
536 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
537 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
538 from copies of the sign bit, and sign of i0 and i1 are the same), then
539 we return a CONST_INT for i0.
540 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
541 if (mode != VOIDmode)
543 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
544 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
545 /* We can get a 0 for an error mark. */
546 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
547 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
549 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
550 return gen_int_mode (i0, mode);
552 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
555 /* If this integer fits in one word, return a CONST_INT. */
556 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
559 /* We use VOIDmode for integers. */
560 value = rtx_alloc (CONST_DOUBLE);
561 PUT_MODE (value, VOIDmode);
563 CONST_DOUBLE_LOW (value) = i0;
564 CONST_DOUBLE_HIGH (value) = i1;
566 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
567 XWINT (value, i) = 0;
569 return lookup_const_double (value);
573 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
575 /* In case the MD file explicitly references the frame pointer, have
576 all such references point to the same frame pointer. This is
577 used during frame pointer elimination to distinguish the explicit
578 references to these registers from pseudos that happened to be
581 If we have eliminated the frame pointer or arg pointer, we will
582 be using it as a normal register, for example as a spill
583 register. In such cases, we might be accessing it in a mode that
584 is not Pmode and therefore cannot use the pre-allocated rtx.
586 Also don't do this when we are making new REGs in reload, since
587 we don't want to get confused with the real pointers. */
589 if (mode == Pmode && !reload_in_progress)
591 if (regno == FRAME_POINTER_REGNUM
592 && (!reload_completed || frame_pointer_needed))
593 return frame_pointer_rtx;
594 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
595 if (regno == HARD_FRAME_POINTER_REGNUM
596 && (!reload_completed || frame_pointer_needed))
597 return hard_frame_pointer_rtx;
599 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
600 if (regno == ARG_POINTER_REGNUM)
601 return arg_pointer_rtx;
603 #ifdef RETURN_ADDRESS_POINTER_REGNUM
604 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
605 return return_address_pointer_rtx;
607 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
608 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
609 return pic_offset_table_rtx;
610 if (regno == STACK_POINTER_REGNUM)
611 return stack_pointer_rtx;
615 /* If the per-function register table has been set up, try to re-use
616 an existing entry in that table to avoid useless generation of RTL.
618 This code is disabled for now until we can fix the various backends
619 which depend on having non-shared hard registers in some cases. Long
620 term we want to re-enable this code as it can significantly cut down
621 on the amount of useless RTL that gets generated.
623 We'll also need to fix some code that runs after reload that wants to
624 set ORIGINAL_REGNO. */
629 && regno < FIRST_PSEUDO_REGISTER
630 && reg_raw_mode[regno] == mode)
631 return regno_reg_rtx[regno];
634 return gen_raw_REG (mode, regno);
638 gen_rtx_MEM (enum machine_mode mode, rtx addr)
640 rtx rt = gen_rtx_raw_MEM (mode, addr);
642 /* This field is not cleared by the mere allocation of the rtx, so
649 /* Generate a memory referring to non-trapping constant memory. */
652 gen_const_mem (enum machine_mode mode, rtx addr)
654 rtx mem = gen_rtx_MEM (mode, addr);
655 MEM_READONLY_P (mem) = 1;
656 MEM_NOTRAP_P (mem) = 1;
660 /* Generate a MEM referring to fixed portions of the frame, e.g., register
664 gen_frame_mem (enum machine_mode mode, rtx addr)
666 rtx mem = gen_rtx_MEM (mode, addr);
667 MEM_NOTRAP_P (mem) = 1;
668 set_mem_alias_set (mem, get_frame_alias_set ());
672 /* Generate a MEM referring to a temporary use of the stack, not part
673 of the fixed stack frame. For example, something which is pushed
674 by a target splitter. */
676 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
678 rtx mem = gen_rtx_MEM (mode, addr);
679 MEM_NOTRAP_P (mem) = 1;
680 if (!cfun->calls_alloca)
681 set_mem_alias_set (mem, get_frame_alias_set ());
685 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
686 this construct would be valid, and false otherwise. */
689 validate_subreg (enum machine_mode omode, enum machine_mode imode,
690 const_rtx reg, unsigned int offset)
692 unsigned int isize = GET_MODE_SIZE (imode);
693 unsigned int osize = GET_MODE_SIZE (omode);
695 /* All subregs must be aligned. */
696 if (offset % osize != 0)
699 /* The subreg offset cannot be outside the inner object. */
703 /* ??? This should not be here. Temporarily continue to allow word_mode
704 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
705 Generally, backends are doing something sketchy but it'll take time to
707 if (omode == word_mode)
709 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
710 is the culprit here, and not the backends. */
711 else if (osize >= UNITS_PER_WORD && isize >= osize)
713 /* Allow component subregs of complex and vector. Though given the below
714 extraction rules, it's not always clear what that means. */
715 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
716 && GET_MODE_INNER (imode) == omode)
718 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
719 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
720 represent this. It's questionable if this ought to be represented at
721 all -- why can't this all be hidden in post-reload splitters that make
722 arbitrarily mode changes to the registers themselves. */
723 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
725 /* Subregs involving floating point modes are not allowed to
726 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
727 (subreg:SI (reg:DF) 0) isn't. */
728 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
734 /* Paradoxical subregs must have offset zero. */
738 /* This is a normal subreg. Verify that the offset is representable. */
740 /* For hard registers, we already have most of these rules collected in
741 subreg_offset_representable_p. */
742 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
744 unsigned int regno = REGNO (reg);
746 #ifdef CANNOT_CHANGE_MODE_CLASS
747 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
748 && GET_MODE_INNER (imode) == omode)
750 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
754 return subreg_offset_representable_p (regno, imode, offset, omode);
757 /* For pseudo registers, we want most of the same checks. Namely:
758 If the register no larger than a word, the subreg must be lowpart.
759 If the register is larger than a word, the subreg must be the lowpart
760 of a subword. A subreg does *not* perform arbitrary bit extraction.
761 Given that we've already checked mode/offset alignment, we only have
762 to check subword subregs here. */
763 if (osize < UNITS_PER_WORD)
765 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
766 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
767 if (offset % UNITS_PER_WORD != low_off)
774 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
776 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
777 return gen_rtx_raw_SUBREG (mode, reg, offset);
780 /* Generate a SUBREG representing the least-significant part of REG if MODE
781 is smaller than mode of REG, otherwise paradoxical SUBREG. */
784 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
786 enum machine_mode inmode;
788 inmode = GET_MODE (reg);
789 if (inmode == VOIDmode)
791 return gen_rtx_SUBREG (mode, reg,
792 subreg_lowpart_offset (mode, inmode));
796 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
799 gen_rtvec (int n, ...)
807 /* Don't allocate an empty rtvec... */
811 rt_val = rtvec_alloc (n);
813 for (i = 0; i < n; i++)
814 rt_val->elem[i] = va_arg (p, rtx);
821 gen_rtvec_v (int n, rtx *argp)
826 /* Don't allocate an empty rtvec... */
830 rt_val = rtvec_alloc (n);
832 for (i = 0; i < n; i++)
833 rt_val->elem[i] = *argp++;
838 /* Return the number of bytes between the start of an OUTER_MODE
839 in-memory value and the start of an INNER_MODE in-memory value,
840 given that the former is a lowpart of the latter. It may be a
841 paradoxical lowpart, in which case the offset will be negative
842 on big-endian targets. */
845 byte_lowpart_offset (enum machine_mode outer_mode,
846 enum machine_mode inner_mode)
848 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
849 return subreg_lowpart_offset (outer_mode, inner_mode);
851 return -subreg_lowpart_offset (inner_mode, outer_mode);
854 /* Generate a REG rtx for a new pseudo register of mode MODE.
855 This pseudo is assigned the next sequential register number. */
858 gen_reg_rtx (enum machine_mode mode)
861 unsigned int align = GET_MODE_ALIGNMENT (mode);
863 gcc_assert (can_create_pseudo_p ());
865 /* If a virtual register with bigger mode alignment is generated,
866 increase stack alignment estimation because it might be spilled
868 if (SUPPORTS_STACK_ALIGNMENT
869 && crtl->stack_alignment_estimated < align
870 && !crtl->stack_realign_processed)
872 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
873 if (crtl->stack_alignment_estimated < min_align)
874 crtl->stack_alignment_estimated = min_align;
877 if (generating_concat_p
878 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
879 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
881 /* For complex modes, don't make a single pseudo.
882 Instead, make a CONCAT of two pseudos.
883 This allows noncontiguous allocation of the real and imaginary parts,
884 which makes much better code. Besides, allocating DCmode
885 pseudos overstrains reload on some machines like the 386. */
886 rtx realpart, imagpart;
887 enum machine_mode partmode = GET_MODE_INNER (mode);
889 realpart = gen_reg_rtx (partmode);
890 imagpart = gen_reg_rtx (partmode);
891 return gen_rtx_CONCAT (mode, realpart, imagpart);
894 /* Make sure regno_pointer_align, and regno_reg_rtx are large
895 enough to have an element for this pseudo reg number. */
897 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
899 int old_size = crtl->emit.regno_pointer_align_length;
903 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
904 memset (tmp + old_size, 0, old_size);
905 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
907 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
908 memset (new1 + old_size, 0, old_size * sizeof (rtx));
909 regno_reg_rtx = new1;
911 crtl->emit.regno_pointer_align_length = old_size * 2;
914 val = gen_raw_REG (mode, reg_rtx_no);
915 regno_reg_rtx[reg_rtx_no++] = val;
919 /* Update NEW with the same attributes as REG, but with OFFSET added
920 to the REG_OFFSET. */
923 update_reg_offset (rtx new_rtx, rtx reg, int offset)
925 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
926 REG_OFFSET (reg) + offset);
929 /* Generate a register with same attributes as REG, but with OFFSET
930 added to the REG_OFFSET. */
933 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
936 rtx new_rtx = gen_rtx_REG (mode, regno);
938 update_reg_offset (new_rtx, reg, offset);
942 /* Generate a new pseudo-register with the same attributes as REG, but
943 with OFFSET added to the REG_OFFSET. */
946 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
948 rtx new_rtx = gen_reg_rtx (mode);
950 update_reg_offset (new_rtx, reg, offset);
954 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
955 new register is a (possibly paradoxical) lowpart of the old one. */
958 adjust_reg_mode (rtx reg, enum machine_mode mode)
960 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
961 PUT_MODE (reg, mode);
964 /* Copy REG's attributes from X, if X has any attributes. If REG and X
965 have different modes, REG is a (possibly paradoxical) lowpart of X. */
968 set_reg_attrs_from_value (rtx reg, rtx x)
972 /* Hard registers can be reused for multiple purposes within the same
973 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
975 if (HARD_REGISTER_P (reg))
978 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
981 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
983 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
985 mark_reg_pointer (reg, 0);
990 update_reg_offset (reg, x, offset);
992 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
996 /* Generate a REG rtx for a new pseudo register, copying the mode
997 and attributes from X. */
1000 gen_reg_rtx_and_attrs (rtx x)
1002 rtx reg = gen_reg_rtx (GET_MODE (x));
1003 set_reg_attrs_from_value (reg, x);
1007 /* Set the register attributes for registers contained in PARM_RTX.
1008 Use needed values from memory attributes of MEM. */
1011 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1013 if (REG_P (parm_rtx))
1014 set_reg_attrs_from_value (parm_rtx, mem);
1015 else if (GET_CODE (parm_rtx) == PARALLEL)
1017 /* Check for a NULL entry in the first slot, used to indicate that the
1018 parameter goes both on the stack and in registers. */
1019 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1020 for (; i < XVECLEN (parm_rtx, 0); i++)
1022 rtx x = XVECEXP (parm_rtx, 0, i);
1023 if (REG_P (XEXP (x, 0)))
1024 REG_ATTRS (XEXP (x, 0))
1025 = get_reg_attrs (MEM_EXPR (mem),
1026 INTVAL (XEXP (x, 1)));
1031 /* Set the REG_ATTRS for registers in value X, given that X represents
1035 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1037 if (GET_CODE (x) == SUBREG)
1039 gcc_assert (subreg_lowpart_p (x));
1044 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1046 if (GET_CODE (x) == CONCAT)
1048 if (REG_P (XEXP (x, 0)))
1049 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1050 if (REG_P (XEXP (x, 1)))
1051 REG_ATTRS (XEXP (x, 1))
1052 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1054 if (GET_CODE (x) == PARALLEL)
1058 /* Check for a NULL entry, used to indicate that the parameter goes
1059 both on the stack and in registers. */
1060 if (XEXP (XVECEXP (x, 0, 0), 0))
1065 for (i = start; i < XVECLEN (x, 0); i++)
1067 rtx y = XVECEXP (x, 0, i);
1068 if (REG_P (XEXP (y, 0)))
1069 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1074 /* Assign the RTX X to declaration T. */
1077 set_decl_rtl (tree t, rtx x)
1079 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1081 set_reg_attrs_for_decl_rtl (t, x);
1084 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1085 if the ABI requires the parameter to be passed by reference. */
1088 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1090 DECL_INCOMING_RTL (t) = x;
1091 if (x && !by_reference_p)
1092 set_reg_attrs_for_decl_rtl (t, x);
1095 /* Identify REG (which may be a CONCAT) as a user register. */
1098 mark_user_reg (rtx reg)
1100 if (GET_CODE (reg) == CONCAT)
1102 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1103 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1107 gcc_assert (REG_P (reg));
1108 REG_USERVAR_P (reg) = 1;
1112 /* Identify REG as a probable pointer register and show its alignment
1113 as ALIGN, if nonzero. */
1116 mark_reg_pointer (rtx reg, int align)
1118 if (! REG_POINTER (reg))
1120 REG_POINTER (reg) = 1;
1123 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1125 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1126 /* We can no-longer be sure just how aligned this pointer is. */
1127 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1130 /* Return 1 plus largest pseudo reg number used in the current function. */
1138 /* Return 1 + the largest label number used so far in the current function. */
1141 max_label_num (void)
1146 /* Return first label number used in this function (if any were used). */
1149 get_first_label_num (void)
1151 return first_label_num;
1154 /* If the rtx for label was created during the expansion of a nested
1155 function, then first_label_num won't include this label number.
1156 Fix this now so that array indices work later. */
1159 maybe_set_first_label_num (rtx x)
1161 if (CODE_LABEL_NUMBER (x) < first_label_num)
1162 first_label_num = CODE_LABEL_NUMBER (x);
1165 /* Return a value representing some low-order bits of X, where the number
1166 of low-order bits is given by MODE. Note that no conversion is done
1167 between floating-point and fixed-point values, rather, the bit
1168 representation is returned.
1170 This function handles the cases in common between gen_lowpart, below,
1171 and two variants in cse.c and combine.c. These are the cases that can
1172 be safely handled at all points in the compilation.
1174 If this is not a case we can handle, return 0. */
1177 gen_lowpart_common (enum machine_mode mode, rtx x)
1179 int msize = GET_MODE_SIZE (mode);
1182 enum machine_mode innermode;
1184 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1185 so we have to make one up. Yuk. */
1186 innermode = GET_MODE (x);
1188 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1189 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1190 else if (innermode == VOIDmode)
1191 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1193 xsize = GET_MODE_SIZE (innermode);
1195 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1197 if (innermode == mode)
1200 /* MODE must occupy no more words than the mode of X. */
1201 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1202 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1205 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1206 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1209 offset = subreg_lowpart_offset (mode, innermode);
1211 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1212 && (GET_MODE_CLASS (mode) == MODE_INT
1213 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1215 /* If we are getting the low-order part of something that has been
1216 sign- or zero-extended, we can either just use the object being
1217 extended or make a narrower extension. If we want an even smaller
1218 piece than the size of the object being extended, call ourselves
1221 This case is used mostly by combine and cse. */
1223 if (GET_MODE (XEXP (x, 0)) == mode)
1225 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1226 return gen_lowpart_common (mode, XEXP (x, 0));
1227 else if (msize < xsize)
1228 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1230 else if (GET_CODE (x) == SUBREG || REG_P (x)
1231 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1232 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1233 return simplify_gen_subreg (mode, x, innermode, offset);
1235 /* Otherwise, we can't do this. */
1240 gen_highpart (enum machine_mode mode, rtx x)
1242 unsigned int msize = GET_MODE_SIZE (mode);
1245 /* This case loses if X is a subreg. To catch bugs early,
1246 complain if an invalid MODE is used even in other cases. */
1247 gcc_assert (msize <= UNITS_PER_WORD
1248 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1250 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1251 subreg_highpart_offset (mode, GET_MODE (x)));
1252 gcc_assert (result);
1254 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1255 the target if we have a MEM. gen_highpart must return a valid operand,
1256 emitting code if necessary to do so. */
1259 result = validize_mem (result);
1260 gcc_assert (result);
1266 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1267 be VOIDmode constant. */
1269 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1271 if (GET_MODE (exp) != VOIDmode)
1273 gcc_assert (GET_MODE (exp) == innermode);
1274 return gen_highpart (outermode, exp);
1276 return simplify_gen_subreg (outermode, exp, innermode,
1277 subreg_highpart_offset (outermode, innermode));
1280 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1283 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1285 unsigned int offset = 0;
1286 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1290 if (WORDS_BIG_ENDIAN)
1291 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1292 if (BYTES_BIG_ENDIAN)
1293 offset += difference % UNITS_PER_WORD;
1299 /* Return offset in bytes to get OUTERMODE high part
1300 of the value in mode INNERMODE stored in memory in target format. */
1302 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1304 unsigned int offset = 0;
1305 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1307 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1311 if (! WORDS_BIG_ENDIAN)
1312 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1313 if (! BYTES_BIG_ENDIAN)
1314 offset += difference % UNITS_PER_WORD;
1320 /* Return 1 iff X, assumed to be a SUBREG,
1321 refers to the least significant part of its containing reg.
1322 If X is not a SUBREG, always return 1 (it is its own low part!). */
1325 subreg_lowpart_p (const_rtx x)
1327 if (GET_CODE (x) != SUBREG)
1329 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1332 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1333 == SUBREG_BYTE (x));
1336 /* Return subword OFFSET of operand OP.
1337 The word number, OFFSET, is interpreted as the word number starting
1338 at the low-order address. OFFSET 0 is the low-order word if not
1339 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1341 If we cannot extract the required word, we return zero. Otherwise,
1342 an rtx corresponding to the requested word will be returned.
1344 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1345 reload has completed, a valid address will always be returned. After
1346 reload, if a valid address cannot be returned, we return zero.
1348 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1349 it is the responsibility of the caller.
1351 MODE is the mode of OP in case it is a CONST_INT.
1353 ??? This is still rather broken for some cases. The problem for the
1354 moment is that all callers of this thing provide no 'goal mode' to
1355 tell us to work with. This exists because all callers were written
1356 in a word based SUBREG world.
1357 Now use of this function can be deprecated by simplify_subreg in most
1362 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1364 if (mode == VOIDmode)
1365 mode = GET_MODE (op);
1367 gcc_assert (mode != VOIDmode);
1369 /* If OP is narrower than a word, fail. */
1371 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1374 /* If we want a word outside OP, return zero. */
1376 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1379 /* Form a new MEM at the requested address. */
1382 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1384 if (! validate_address)
1387 else if (reload_completed)
1389 if (! strict_memory_address_p (word_mode, XEXP (new_rtx, 0)))
1393 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1396 /* Rest can be handled by simplify_subreg. */
1397 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1400 /* Similar to `operand_subword', but never return 0. If we can't
1401 extract the required subword, put OP into a register and try again.
1402 The second attempt must succeed. We always validate the address in
1405 MODE is the mode of OP, in case it is CONST_INT. */
1408 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1410 rtx result = operand_subword (op, offset, 1, mode);
1415 if (mode != BLKmode && mode != VOIDmode)
1417 /* If this is a register which can not be accessed by words, copy it
1418 to a pseudo register. */
1420 op = copy_to_reg (op);
1422 op = force_reg (mode, op);
1425 result = operand_subword (op, offset, 1, mode);
1426 gcc_assert (result);
1431 /* Returns 1 if both MEM_EXPR can be considered equal
1435 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1440 if (! expr1 || ! expr2)
1443 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1446 return operand_equal_p (expr1, expr2, 0);
1449 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1450 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1454 get_mem_align_offset (rtx mem, unsigned int align)
1457 unsigned HOST_WIDE_INT offset;
1459 /* This function can't use
1460 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1461 || !CONST_INT_P (MEM_OFFSET (mem))
1462 || (get_object_alignment (MEM_EXPR (mem), MEM_ALIGN (mem), align)
1466 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1468 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1469 for <variable>. get_inner_reference doesn't handle it and
1470 even if it did, the alignment in that case needs to be determined
1471 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1472 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1473 isn't sufficiently aligned, the object it is in might be. */
1474 gcc_assert (MEM_P (mem));
1475 expr = MEM_EXPR (mem);
1476 if (expr == NULL_TREE
1477 || MEM_OFFSET (mem) == NULL_RTX
1478 || !CONST_INT_P (MEM_OFFSET (mem)))
1481 offset = INTVAL (MEM_OFFSET (mem));
1484 if (DECL_ALIGN (expr) < align)
1487 else if (INDIRECT_REF_P (expr))
1489 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1492 else if (TREE_CODE (expr) == COMPONENT_REF)
1496 tree inner = TREE_OPERAND (expr, 0);
1497 tree field = TREE_OPERAND (expr, 1);
1498 tree byte_offset = component_ref_field_offset (expr);
1499 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1502 || !host_integerp (byte_offset, 1)
1503 || !host_integerp (bit_offset, 1))
1506 offset += tree_low_cst (byte_offset, 1);
1507 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1509 if (inner == NULL_TREE)
1511 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1512 < (unsigned int) align)
1516 else if (DECL_P (inner))
1518 if (DECL_ALIGN (inner) < align)
1522 else if (TREE_CODE (inner) != COMPONENT_REF)
1530 return offset & ((align / BITS_PER_UNIT) - 1);
1533 /* Given REF (a MEM) and T, either the type of X or the expression
1534 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1535 if we are making a new object of this type. BITPOS is nonzero if
1536 there is an offset outstanding on T that will be applied later. */
1539 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1540 HOST_WIDE_INT bitpos)
1542 alias_set_type alias = MEM_ALIAS_SET (ref);
1543 tree expr = MEM_EXPR (ref);
1544 rtx offset = MEM_OFFSET (ref);
1545 rtx size = MEM_SIZE (ref);
1546 unsigned int align = MEM_ALIGN (ref);
1547 HOST_WIDE_INT apply_bitpos = 0;
1550 /* It can happen that type_for_mode was given a mode for which there
1551 is no language-level type. In which case it returns NULL, which
1556 type = TYPE_P (t) ? t : TREE_TYPE (t);
1557 if (type == error_mark_node)
1560 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1561 wrong answer, as it assumes that DECL_RTL already has the right alias
1562 info. Callers should not set DECL_RTL until after the call to
1563 set_mem_attributes. */
1564 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1566 /* Get the alias set from the expression or type (perhaps using a
1567 front-end routine) and use it. */
1568 alias = get_alias_set (t);
1570 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1571 MEM_IN_STRUCT_P (ref)
1572 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1573 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1575 /* If we are making an object of this type, or if this is a DECL, we know
1576 that it is a scalar if the type is not an aggregate. */
1577 if ((objectp || DECL_P (t))
1578 && ! AGGREGATE_TYPE_P (type)
1579 && TREE_CODE (type) != COMPLEX_TYPE)
1580 MEM_SCALAR_P (ref) = 1;
1582 /* We can set the alignment from the type if we are making an object,
1583 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1584 if (objectp || TREE_CODE (t) == INDIRECT_REF
1585 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1586 || TYPE_ALIGN_OK (type))
1587 align = MAX (align, TYPE_ALIGN (type));
1589 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1591 if (integer_zerop (TREE_OPERAND (t, 1)))
1592 /* We don't know anything about the alignment. */
1593 align = BITS_PER_UNIT;
1595 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1598 /* If the size is known, we can set that. */
1599 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1600 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1602 /* If T is not a type, we may be able to deduce some more information about
1607 bool align_computed = false;
1609 if (TREE_THIS_VOLATILE (t))
1610 MEM_VOLATILE_P (ref) = 1;
1612 /* Now remove any conversions: they don't change what the underlying
1613 object is. Likewise for SAVE_EXPR. */
1614 while (CONVERT_EXPR_P (t)
1615 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1616 || TREE_CODE (t) == SAVE_EXPR)
1617 t = TREE_OPERAND (t, 0);
1619 /* We may look through structure-like accesses for the purposes of
1620 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1622 while (TREE_CODE (base) == COMPONENT_REF
1623 || TREE_CODE (base) == REALPART_EXPR
1624 || TREE_CODE (base) == IMAGPART_EXPR
1625 || TREE_CODE (base) == BIT_FIELD_REF)
1626 base = TREE_OPERAND (base, 0);
1630 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1631 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1633 MEM_NOTRAP_P (ref) = 1;
1636 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1638 base = get_base_address (base);
1639 if (base && DECL_P (base)
1640 && TREE_READONLY (base)
1641 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1643 tree base_type = TREE_TYPE (base);
1644 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1645 || DECL_ARTIFICIAL (base));
1646 MEM_READONLY_P (ref) = 1;
1649 /* If this expression uses it's parent's alias set, mark it such
1650 that we won't change it. */
1651 if (component_uses_parent_alias_set (t))
1652 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1654 /* If this is a decl, set the attributes of the MEM from it. */
1658 offset = const0_rtx;
1659 apply_bitpos = bitpos;
1660 size = (DECL_SIZE_UNIT (t)
1661 && host_integerp (DECL_SIZE_UNIT (t), 1)
1662 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1663 align = DECL_ALIGN (t);
1664 align_computed = true;
1667 /* If this is a constant, we know the alignment. */
1668 else if (CONSTANT_CLASS_P (t))
1670 align = TYPE_ALIGN (type);
1671 #ifdef CONSTANT_ALIGNMENT
1672 align = CONSTANT_ALIGNMENT (t, align);
1674 align_computed = true;
1677 /* If this is a field reference and not a bit-field, record it. */
1678 /* ??? There is some information that can be gleaned from bit-fields,
1679 such as the word offset in the structure that might be modified.
1680 But skip it for now. */
1681 else if (TREE_CODE (t) == COMPONENT_REF
1682 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1685 offset = const0_rtx;
1686 apply_bitpos = bitpos;
1687 /* ??? Any reason the field size would be different than
1688 the size we got from the type? */
1691 /* If this is an array reference, look for an outer field reference. */
1692 else if (TREE_CODE (t) == ARRAY_REF)
1694 tree off_tree = size_zero_node;
1695 /* We can't modify t, because we use it at the end of the
1701 tree index = TREE_OPERAND (t2, 1);
1702 tree low_bound = array_ref_low_bound (t2);
1703 tree unit_size = array_ref_element_size (t2);
1705 /* We assume all arrays have sizes that are a multiple of a byte.
1706 First subtract the lower bound, if any, in the type of the
1707 index, then convert to sizetype and multiply by the size of
1708 the array element. */
1709 if (! integer_zerop (low_bound))
1710 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1713 off_tree = size_binop (PLUS_EXPR,
1714 size_binop (MULT_EXPR,
1715 fold_convert (sizetype,
1719 t2 = TREE_OPERAND (t2, 0);
1721 while (TREE_CODE (t2) == ARRAY_REF);
1727 if (host_integerp (off_tree, 1))
1729 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1730 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1731 align = DECL_ALIGN (t2);
1732 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1734 align_computed = true;
1735 offset = GEN_INT (ioff);
1736 apply_bitpos = bitpos;
1739 else if (TREE_CODE (t2) == COMPONENT_REF)
1743 if (host_integerp (off_tree, 1))
1745 offset = GEN_INT (tree_low_cst (off_tree, 1));
1746 apply_bitpos = bitpos;
1748 /* ??? Any reason the field size would be different than
1749 the size we got from the type? */
1751 else if (flag_argument_noalias > 1
1752 && (INDIRECT_REF_P (t2))
1753 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1760 /* If this is a Fortran indirect argument reference, record the
1762 else if (flag_argument_noalias > 1
1763 && (INDIRECT_REF_P (t))
1764 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1770 if (!align_computed && !INDIRECT_REF_P (t))
1772 unsigned int obj_align
1773 = get_object_alignment (t, align, BIGGEST_ALIGNMENT);
1774 align = MAX (align, obj_align);
1778 /* If we modified OFFSET based on T, then subtract the outstanding
1779 bit position offset. Similarly, increase the size of the accessed
1780 object to contain the negative offset. */
1783 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1785 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1788 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1790 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1791 we're overlapping. */
1796 /* Now set the attributes we computed above. */
1798 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1800 /* If this is already known to be a scalar or aggregate, we are done. */
1801 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1804 /* If it is a reference into an aggregate, this is part of an aggregate.
1805 Otherwise we don't know. */
1806 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1807 || TREE_CODE (t) == ARRAY_RANGE_REF
1808 || TREE_CODE (t) == BIT_FIELD_REF)
1809 MEM_IN_STRUCT_P (ref) = 1;
1813 set_mem_attributes (rtx ref, tree t, int objectp)
1815 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1818 /* Set the alias set of MEM to SET. */
1821 set_mem_alias_set (rtx mem, alias_set_type set)
1823 #ifdef ENABLE_CHECKING
1824 /* If the new and old alias sets don't conflict, something is wrong. */
1825 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1828 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1829 MEM_SIZE (mem), MEM_ALIGN (mem),
1833 /* Set the alignment of MEM to ALIGN bits. */
1836 set_mem_align (rtx mem, unsigned int align)
1838 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1839 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1843 /* Set the expr for MEM to EXPR. */
1846 set_mem_expr (rtx mem, tree expr)
1849 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1850 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1853 /* Set the offset of MEM to OFFSET. */
1856 set_mem_offset (rtx mem, rtx offset)
1858 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1859 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1863 /* Set the size of MEM to SIZE. */
1866 set_mem_size (rtx mem, rtx size)
1868 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1869 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1873 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1874 and its address changed to ADDR. (VOIDmode means don't change the mode.
1875 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1876 returned memory location is required to be valid. The memory
1877 attributes are not changed. */
1880 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1884 gcc_assert (MEM_P (memref));
1885 if (mode == VOIDmode)
1886 mode = GET_MODE (memref);
1888 addr = XEXP (memref, 0);
1889 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1890 && (!validate || memory_address_p (mode, addr)))
1895 if (reload_in_progress || reload_completed)
1896 gcc_assert (memory_address_p (mode, addr));
1898 addr = memory_address (mode, addr);
1901 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1904 new_rtx = gen_rtx_MEM (mode, addr);
1905 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1909 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1910 way we are changing MEMREF, so we only preserve the alias set. */
1913 change_address (rtx memref, enum machine_mode mode, rtx addr)
1915 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1916 enum machine_mode mmode = GET_MODE (new_rtx);
1919 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1920 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1922 /* If there are no changes, just return the original memory reference. */
1923 if (new_rtx == memref)
1925 if (MEM_ATTRS (memref) == 0
1926 || (MEM_EXPR (memref) == NULL
1927 && MEM_OFFSET (memref) == NULL
1928 && MEM_SIZE (memref) == size
1929 && MEM_ALIGN (memref) == align))
1932 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1933 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1937 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1942 /* Return a memory reference like MEMREF, but with its mode changed
1943 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1944 nonzero, the memory address is forced to be valid.
1945 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1946 and caller is responsible for adjusting MEMREF base register. */
1949 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1950 int validate, int adjust)
1952 rtx addr = XEXP (memref, 0);
1954 rtx memoffset = MEM_OFFSET (memref);
1956 unsigned int memalign = MEM_ALIGN (memref);
1959 /* If there are no changes, just return the original memory reference. */
1960 if (mode == GET_MODE (memref) && !offset
1961 && (!validate || memory_address_p (mode, addr)))
1964 /* ??? Prefer to create garbage instead of creating shared rtl.
1965 This may happen even if offset is nonzero -- consider
1966 (plus (plus reg reg) const_int) -- so do this always. */
1967 addr = copy_rtx (addr);
1969 /* Convert a possibly large offset to a signed value within the
1970 range of the target address space. */
1971 pbits = GET_MODE_BITSIZE (Pmode);
1972 if (HOST_BITS_PER_WIDE_INT > pbits)
1974 int shift = HOST_BITS_PER_WIDE_INT - pbits;
1975 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
1981 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1982 object, we can merge it into the LO_SUM. */
1983 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1985 && (unsigned HOST_WIDE_INT) offset
1986 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1987 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1988 plus_constant (XEXP (addr, 1), offset));
1990 addr = plus_constant (addr, offset);
1993 new_rtx = change_address_1 (memref, mode, addr, validate);
1995 /* If the address is a REG, change_address_1 rightfully returns memref,
1996 but this would destroy memref's MEM_ATTRS. */
1997 if (new_rtx == memref && offset != 0)
1998 new_rtx = copy_rtx (new_rtx);
2000 /* Compute the new values of the memory attributes due to this adjustment.
2001 We add the offsets and update the alignment. */
2003 memoffset = GEN_INT (offset + INTVAL (memoffset));
2005 /* Compute the new alignment by taking the MIN of the alignment and the
2006 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2011 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2013 /* We can compute the size in a number of ways. */
2014 if (GET_MODE (new_rtx) != BLKmode)
2015 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2016 else if (MEM_SIZE (memref))
2017 size = plus_constant (MEM_SIZE (memref), -offset);
2019 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2020 memoffset, size, memalign, GET_MODE (new_rtx));
2022 /* At some point, we should validate that this offset is within the object,
2023 if all the appropriate values are known. */
2027 /* Return a memory reference like MEMREF, but with its mode changed
2028 to MODE and its address changed to ADDR, which is assumed to be
2029 MEMREF offset by OFFSET bytes. If VALIDATE is
2030 nonzero, the memory address is forced to be valid. */
2033 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2034 HOST_WIDE_INT offset, int validate)
2036 memref = change_address_1 (memref, VOIDmode, addr, validate);
2037 return adjust_address_1 (memref, mode, offset, validate, 0);
2040 /* Return a memory reference like MEMREF, but whose address is changed by
2041 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2042 known to be in OFFSET (possibly 1). */
2045 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2047 rtx new_rtx, addr = XEXP (memref, 0);
2049 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2051 /* At this point we don't know _why_ the address is invalid. It
2052 could have secondary memory references, multiplies or anything.
2054 However, if we did go and rearrange things, we can wind up not
2055 being able to recognize the magic around pic_offset_table_rtx.
2056 This stuff is fragile, and is yet another example of why it is
2057 bad to expose PIC machinery too early. */
2058 if (! memory_address_p (GET_MODE (memref), new_rtx)
2059 && GET_CODE (addr) == PLUS
2060 && XEXP (addr, 0) == pic_offset_table_rtx)
2062 addr = force_reg (GET_MODE (addr), addr);
2063 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2066 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2067 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2069 /* If there are no changes, just return the original memory reference. */
2070 if (new_rtx == memref)
2073 /* Update the alignment to reflect the offset. Reset the offset, which
2076 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2077 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2078 GET_MODE (new_rtx));
2082 /* Return a memory reference like MEMREF, but with its address changed to
2083 ADDR. The caller is asserting that the actual piece of memory pointed
2084 to is the same, just the form of the address is being changed, such as
2085 by putting something into a register. */
2088 replace_equiv_address (rtx memref, rtx addr)
2090 /* change_address_1 copies the memory attribute structure without change
2091 and that's exactly what we want here. */
2092 update_temp_slot_address (XEXP (memref, 0), addr);
2093 return change_address_1 (memref, VOIDmode, addr, 1);
2096 /* Likewise, but the reference is not required to be valid. */
2099 replace_equiv_address_nv (rtx memref, rtx addr)
2101 return change_address_1 (memref, VOIDmode, addr, 0);
2104 /* Return a memory reference like MEMREF, but with its mode widened to
2105 MODE and offset by OFFSET. This would be used by targets that e.g.
2106 cannot issue QImode memory operations and have to use SImode memory
2107 operations plus masking logic. */
2110 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2112 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2113 tree expr = MEM_EXPR (new_rtx);
2114 rtx memoffset = MEM_OFFSET (new_rtx);
2115 unsigned int size = GET_MODE_SIZE (mode);
2117 /* If there are no changes, just return the original memory reference. */
2118 if (new_rtx == memref)
2121 /* If we don't know what offset we were at within the expression, then
2122 we can't know if we've overstepped the bounds. */
2128 if (TREE_CODE (expr) == COMPONENT_REF)
2130 tree field = TREE_OPERAND (expr, 1);
2131 tree offset = component_ref_field_offset (expr);
2133 if (! DECL_SIZE_UNIT (field))
2139 /* Is the field at least as large as the access? If so, ok,
2140 otherwise strip back to the containing structure. */
2141 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2142 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2143 && INTVAL (memoffset) >= 0)
2146 if (! host_integerp (offset, 1))
2152 expr = TREE_OPERAND (expr, 0);
2154 = (GEN_INT (INTVAL (memoffset)
2155 + tree_low_cst (offset, 1)
2156 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2159 /* Similarly for the decl. */
2160 else if (DECL_P (expr)
2161 && DECL_SIZE_UNIT (expr)
2162 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2163 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2164 && (! memoffset || INTVAL (memoffset) >= 0))
2168 /* The widened memory access overflows the expression, which means
2169 that it could alias another expression. Zap it. */
2176 memoffset = NULL_RTX;
2178 /* The widened memory may alias other stuff, so zap the alias set. */
2179 /* ??? Maybe use get_alias_set on any remaining expression. */
2181 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2182 MEM_ALIGN (new_rtx), mode);
2187 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2188 static GTY(()) tree spill_slot_decl;
2191 get_spill_slot_decl (bool force_build_p)
2193 tree d = spill_slot_decl;
2196 if (d || !force_build_p)
2199 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2200 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2201 DECL_ARTIFICIAL (d) = 1;
2202 DECL_IGNORED_P (d) = 1;
2204 TREE_THIS_NOTRAP (d) = 1;
2205 spill_slot_decl = d;
2207 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2208 MEM_NOTRAP_P (rd) = 1;
2209 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2210 NULL_RTX, 0, BLKmode);
2211 SET_DECL_RTL (d, rd);
2216 /* Given MEM, a result from assign_stack_local, fill in the memory
2217 attributes as appropriate for a register allocator spill slot.
2218 These slots are not aliasable by other memory. We arrange for
2219 them all to use a single MEM_EXPR, so that the aliasing code can
2220 work properly in the case of shared spill slots. */
2223 set_mem_attrs_for_spill (rtx mem)
2225 alias_set_type alias;
2229 expr = get_spill_slot_decl (true);
2230 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2232 /* We expect the incoming memory to be of the form:
2233 (mem:MODE (plus (reg sfp) (const_int offset)))
2234 with perhaps the plus missing for offset = 0. */
2235 addr = XEXP (mem, 0);
2236 offset = const0_rtx;
2237 if (GET_CODE (addr) == PLUS
2238 && CONST_INT_P (XEXP (addr, 1)))
2239 offset = XEXP (addr, 1);
2241 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2242 MEM_SIZE (mem), MEM_ALIGN (mem),
2244 MEM_NOTRAP_P (mem) = 1;
2247 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2250 gen_label_rtx (void)
2252 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2253 NULL, label_num++, NULL);
2256 /* For procedure integration. */
2258 /* Install new pointers to the first and last insns in the chain.
2259 Also, set cur_insn_uid to one higher than the last in use.
2260 Used for an inline-procedure after copying the insn chain. */
2263 set_new_first_and_last_insn (rtx first, rtx last)
2271 for (insn = first; insn; insn = NEXT_INSN (insn))
2272 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2277 /* Go through all the RTL insn bodies and copy any invalid shared
2278 structure. This routine should only be called once. */
2281 unshare_all_rtl_1 (rtx insn)
2283 /* Unshare just about everything else. */
2284 unshare_all_rtl_in_chain (insn);
2286 /* Make sure the addresses of stack slots found outside the insn chain
2287 (such as, in DECL_RTL of a variable) are not shared
2288 with the insn chain.
2290 This special care is necessary when the stack slot MEM does not
2291 actually appear in the insn chain. If it does appear, its address
2292 is unshared from all else at that point. */
2293 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2296 /* Go through all the RTL insn bodies and copy any invalid shared
2297 structure, again. This is a fairly expensive thing to do so it
2298 should be done sparingly. */
2301 unshare_all_rtl_again (rtx insn)
2306 for (p = insn; p; p = NEXT_INSN (p))
2309 reset_used_flags (PATTERN (p));
2310 reset_used_flags (REG_NOTES (p));
2313 /* Make sure that virtual stack slots are not shared. */
2314 set_used_decls (DECL_INITIAL (cfun->decl));
2316 /* Make sure that virtual parameters are not shared. */
2317 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2318 set_used_flags (DECL_RTL (decl));
2320 reset_used_flags (stack_slot_list);
2322 unshare_all_rtl_1 (insn);
2326 unshare_all_rtl (void)
2328 unshare_all_rtl_1 (get_insns ());
2332 struct rtl_opt_pass pass_unshare_all_rtl =
2336 "unshare", /* name */
2338 unshare_all_rtl, /* execute */
2341 0, /* static_pass_number */
2342 TV_NONE, /* tv_id */
2343 0, /* properties_required */
2344 0, /* properties_provided */
2345 0, /* properties_destroyed */
2346 0, /* todo_flags_start */
2347 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2352 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2353 Recursively does the same for subexpressions. */
2356 verify_rtx_sharing (rtx orig, rtx insn)
2361 const char *format_ptr;
2366 code = GET_CODE (x);
2368 /* These types may be freely shared. */
2384 /* SCRATCH must be shared because they represent distinct values. */
2386 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2391 if (shared_const_p (orig))
2396 /* A MEM is allowed to be shared if its address is constant. */
2397 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2398 || reload_completed || reload_in_progress)
2407 /* This rtx may not be shared. If it has already been seen,
2408 replace it with a copy of itself. */
2409 #ifdef ENABLE_CHECKING
2410 if (RTX_FLAG (x, used))
2412 error ("invalid rtl sharing found in the insn");
2414 error ("shared rtx");
2416 internal_error ("internal consistency failure");
2419 gcc_assert (!RTX_FLAG (x, used));
2421 RTX_FLAG (x, used) = 1;
2423 /* Now scan the subexpressions recursively. */
2425 format_ptr = GET_RTX_FORMAT (code);
2427 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2429 switch (*format_ptr++)
2432 verify_rtx_sharing (XEXP (x, i), insn);
2436 if (XVEC (x, i) != NULL)
2439 int len = XVECLEN (x, i);
2441 for (j = 0; j < len; j++)
2443 /* We allow sharing of ASM_OPERANDS inside single
2445 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2446 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2448 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2450 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2459 /* Go through all the RTL insn bodies and check that there is no unexpected
2460 sharing in between the subexpressions. */
2463 verify_rtl_sharing (void)
2467 for (p = get_insns (); p; p = NEXT_INSN (p))
2470 reset_used_flags (PATTERN (p));
2471 reset_used_flags (REG_NOTES (p));
2472 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2475 rtx q, sequence = PATTERN (p);
2477 for (i = 0; i < XVECLEN (sequence, 0); i++)
2479 q = XVECEXP (sequence, 0, i);
2480 gcc_assert (INSN_P (q));
2481 reset_used_flags (PATTERN (q));
2482 reset_used_flags (REG_NOTES (q));
2487 for (p = get_insns (); p; p = NEXT_INSN (p))
2490 verify_rtx_sharing (PATTERN (p), p);
2491 verify_rtx_sharing (REG_NOTES (p), p);
2495 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2496 Assumes the mark bits are cleared at entry. */
2499 unshare_all_rtl_in_chain (rtx insn)
2501 for (; insn; insn = NEXT_INSN (insn))
2504 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2505 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2509 /* Go through all virtual stack slots of a function and mark them as
2510 shared. We never replace the DECL_RTLs themselves with a copy,
2511 but expressions mentioned into a DECL_RTL cannot be shared with
2512 expressions in the instruction stream.
2514 Note that reload may convert pseudo registers into memories in-place.
2515 Pseudo registers are always shared, but MEMs never are. Thus if we
2516 reset the used flags on MEMs in the instruction stream, we must set
2517 them again on MEMs that appear in DECL_RTLs. */
2520 set_used_decls (tree blk)
2525 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2526 if (DECL_RTL_SET_P (t))
2527 set_used_flags (DECL_RTL (t));
2529 /* Now process sub-blocks. */
2530 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2534 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2535 Recursively does the same for subexpressions. Uses
2536 copy_rtx_if_shared_1 to reduce stack space. */
2539 copy_rtx_if_shared (rtx orig)
2541 copy_rtx_if_shared_1 (&orig);
2545 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2546 use. Recursively does the same for subexpressions. */
2549 copy_rtx_if_shared_1 (rtx *orig1)
2555 const char *format_ptr;
2559 /* Repeat is used to turn tail-recursion into iteration. */
2566 code = GET_CODE (x);
2568 /* These types may be freely shared. */
2583 /* SCRATCH must be shared because they represent distinct values. */
2586 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2591 if (shared_const_p (x))
2600 /* The chain of insns is not being copied. */
2607 /* This rtx may not be shared. If it has already been seen,
2608 replace it with a copy of itself. */
2610 if (RTX_FLAG (x, used))
2612 x = shallow_copy_rtx (x);
2615 RTX_FLAG (x, used) = 1;
2617 /* Now scan the subexpressions recursively.
2618 We can store any replaced subexpressions directly into X
2619 since we know X is not shared! Any vectors in X
2620 must be copied if X was copied. */
2622 format_ptr = GET_RTX_FORMAT (code);
2623 length = GET_RTX_LENGTH (code);
2626 for (i = 0; i < length; i++)
2628 switch (*format_ptr++)
2632 copy_rtx_if_shared_1 (last_ptr);
2633 last_ptr = &XEXP (x, i);
2637 if (XVEC (x, i) != NULL)
2640 int len = XVECLEN (x, i);
2642 /* Copy the vector iff I copied the rtx and the length
2644 if (copied && len > 0)
2645 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2647 /* Call recursively on all inside the vector. */
2648 for (j = 0; j < len; j++)
2651 copy_rtx_if_shared_1 (last_ptr);
2652 last_ptr = &XVECEXP (x, i, j);
2667 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2668 to look for shared sub-parts. */
2671 reset_used_flags (rtx x)
2675 const char *format_ptr;
2678 /* Repeat is used to turn tail-recursion into iteration. */
2683 code = GET_CODE (x);
2685 /* These types may be freely shared so we needn't do any resetting
2707 /* The chain of insns is not being copied. */
2714 RTX_FLAG (x, used) = 0;
2716 format_ptr = GET_RTX_FORMAT (code);
2717 length = GET_RTX_LENGTH (code);
2719 for (i = 0; i < length; i++)
2721 switch (*format_ptr++)
2729 reset_used_flags (XEXP (x, i));
2733 for (j = 0; j < XVECLEN (x, i); j++)
2734 reset_used_flags (XVECEXP (x, i, j));
2740 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2741 to look for shared sub-parts. */
2744 set_used_flags (rtx x)
2748 const char *format_ptr;
2753 code = GET_CODE (x);
2755 /* These types may be freely shared so we needn't do any resetting
2777 /* The chain of insns is not being copied. */
2784 RTX_FLAG (x, used) = 1;
2786 format_ptr = GET_RTX_FORMAT (code);
2787 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2789 switch (*format_ptr++)
2792 set_used_flags (XEXP (x, i));
2796 for (j = 0; j < XVECLEN (x, i); j++)
2797 set_used_flags (XVECEXP (x, i, j));
2803 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2804 Return X or the rtx for the pseudo reg the value of X was copied into.
2805 OTHER must be valid as a SET_DEST. */
2808 make_safe_from (rtx x, rtx other)
2811 switch (GET_CODE (other))
2814 other = SUBREG_REG (other);
2816 case STRICT_LOW_PART:
2819 other = XEXP (other, 0);
2828 && GET_CODE (x) != SUBREG)
2830 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2831 || reg_mentioned_p (other, x))))
2833 rtx temp = gen_reg_rtx (GET_MODE (x));
2834 emit_move_insn (temp, x);
2840 /* Emission of insns (adding them to the doubly-linked list). */
2842 /* Return the first insn of the current sequence or current function. */
2850 /* Specify a new insn as the first in the chain. */
2853 set_first_insn (rtx insn)
2855 gcc_assert (!PREV_INSN (insn));
2859 /* Return the last insn emitted in current sequence or current function. */
2862 get_last_insn (void)
2867 /* Specify a new insn as the last in the chain. */
2870 set_last_insn (rtx insn)
2872 gcc_assert (!NEXT_INSN (insn));
2876 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2879 get_last_insn_anywhere (void)
2881 struct sequence_stack *stack;
2884 for (stack = seq_stack; stack; stack = stack->next)
2885 if (stack->last != 0)
2890 /* Return the first nonnote insn emitted in current sequence or current
2891 function. This routine looks inside SEQUENCEs. */
2894 get_first_nonnote_insn (void)
2896 rtx insn = first_insn;
2901 for (insn = next_insn (insn);
2902 insn && NOTE_P (insn);
2903 insn = next_insn (insn))
2907 if (NONJUMP_INSN_P (insn)
2908 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2909 insn = XVECEXP (PATTERN (insn), 0, 0);
2916 /* Return the last nonnote insn emitted in current sequence or current
2917 function. This routine looks inside SEQUENCEs. */
2920 get_last_nonnote_insn (void)
2922 rtx insn = last_insn;
2927 for (insn = previous_insn (insn);
2928 insn && NOTE_P (insn);
2929 insn = previous_insn (insn))
2933 if (NONJUMP_INSN_P (insn)
2934 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2935 insn = XVECEXP (PATTERN (insn), 0,
2936 XVECLEN (PATTERN (insn), 0) - 1);
2943 /* Return a number larger than any instruction's uid in this function. */
2948 return cur_insn_uid;
2951 /* Return the next insn. If it is a SEQUENCE, return the first insn
2955 next_insn (rtx insn)
2959 insn = NEXT_INSN (insn);
2960 if (insn && NONJUMP_INSN_P (insn)
2961 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2962 insn = XVECEXP (PATTERN (insn), 0, 0);
2968 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2972 previous_insn (rtx insn)
2976 insn = PREV_INSN (insn);
2977 if (insn && NONJUMP_INSN_P (insn)
2978 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2979 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2985 /* Return the next insn after INSN that is not a NOTE. This routine does not
2986 look inside SEQUENCEs. */
2989 next_nonnote_insn (rtx insn)
2993 insn = NEXT_INSN (insn);
2994 if (insn == 0 || !NOTE_P (insn))
3001 /* Return the previous insn before INSN that is not a NOTE. This routine does
3002 not look inside SEQUENCEs. */
3005 prev_nonnote_insn (rtx insn)
3009 insn = PREV_INSN (insn);
3010 if (insn == 0 || !NOTE_P (insn))
3017 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3018 or 0, if there is none. This routine does not look inside
3022 next_real_insn (rtx insn)
3026 insn = NEXT_INSN (insn);
3027 if (insn == 0 || INSN_P (insn))
3034 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3035 or 0, if there is none. This routine does not look inside
3039 prev_real_insn (rtx insn)
3043 insn = PREV_INSN (insn);
3044 if (insn == 0 || INSN_P (insn))
3051 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3052 This routine does not look inside SEQUENCEs. */
3055 last_call_insn (void)
3059 for (insn = get_last_insn ();
3060 insn && !CALL_P (insn);
3061 insn = PREV_INSN (insn))
3067 /* Find the next insn after INSN that really does something. This routine
3068 does not look inside SEQUENCEs. Until reload has completed, this is the
3069 same as next_real_insn. */
3072 active_insn_p (const_rtx insn)
3074 return (CALL_P (insn) || JUMP_P (insn)
3075 || (NONJUMP_INSN_P (insn)
3076 && (! reload_completed
3077 || (GET_CODE (PATTERN (insn)) != USE
3078 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3082 next_active_insn (rtx insn)
3086 insn = NEXT_INSN (insn);
3087 if (insn == 0 || active_insn_p (insn))
3094 /* Find the last insn before INSN that really does something. This routine
3095 does not look inside SEQUENCEs. Until reload has completed, this is the
3096 same as prev_real_insn. */
3099 prev_active_insn (rtx insn)
3103 insn = PREV_INSN (insn);
3104 if (insn == 0 || active_insn_p (insn))
3111 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3114 next_label (rtx insn)
3118 insn = NEXT_INSN (insn);
3119 if (insn == 0 || LABEL_P (insn))
3126 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3129 prev_label (rtx insn)
3133 insn = PREV_INSN (insn);
3134 if (insn == 0 || LABEL_P (insn))
3141 /* Return the last label to mark the same position as LABEL. Return null
3142 if LABEL itself is null. */
3145 skip_consecutive_labels (rtx label)
3149 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3157 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3158 and REG_CC_USER notes so we can find it. */
3161 link_cc0_insns (rtx insn)
3163 rtx user = next_nonnote_insn (insn);
3165 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3166 user = XVECEXP (PATTERN (user), 0, 0);
3168 add_reg_note (user, REG_CC_SETTER, insn);
3169 add_reg_note (insn, REG_CC_USER, user);
3172 /* Return the next insn that uses CC0 after INSN, which is assumed to
3173 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3174 applied to the result of this function should yield INSN).
3176 Normally, this is simply the next insn. However, if a REG_CC_USER note
3177 is present, it contains the insn that uses CC0.
3179 Return 0 if we can't find the insn. */
3182 next_cc0_user (rtx insn)
3184 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3187 return XEXP (note, 0);
3189 insn = next_nonnote_insn (insn);
3190 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3191 insn = XVECEXP (PATTERN (insn), 0, 0);
3193 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3199 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3200 note, it is the previous insn. */
3203 prev_cc0_setter (rtx insn)
3205 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3208 return XEXP (note, 0);
3210 insn = prev_nonnote_insn (insn);
3211 gcc_assert (sets_cc0_p (PATTERN (insn)));
3218 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3221 find_auto_inc (rtx *xp, void *data)
3224 rtx reg = (rtx) data;
3226 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3229 switch (GET_CODE (x))
3237 if (rtx_equal_p (reg, XEXP (x, 0)))
3248 /* Increment the label uses for all labels present in rtx. */
3251 mark_label_nuses (rtx x)
3257 code = GET_CODE (x);
3258 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3259 LABEL_NUSES (XEXP (x, 0))++;
3261 fmt = GET_RTX_FORMAT (code);
3262 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3265 mark_label_nuses (XEXP (x, i));
3266 else if (fmt[i] == 'E')
3267 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3268 mark_label_nuses (XVECEXP (x, i, j));
3273 /* Try splitting insns that can be split for better scheduling.
3274 PAT is the pattern which might split.
3275 TRIAL is the insn providing PAT.
3276 LAST is nonzero if we should return the last insn of the sequence produced.
3278 If this routine succeeds in splitting, it returns the first or last
3279 replacement insn depending on the value of LAST. Otherwise, it
3280 returns TRIAL. If the insn to be returned can be split, it will be. */
3283 try_split (rtx pat, rtx trial, int last)
3285 rtx before = PREV_INSN (trial);
3286 rtx after = NEXT_INSN (trial);
3287 int has_barrier = 0;
3290 rtx insn_last, insn;
3293 /* We're not good at redistributing frame information. */
3294 if (RTX_FRAME_RELATED_P (trial))
3297 if (any_condjump_p (trial)
3298 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3299 split_branch_probability = INTVAL (XEXP (note, 0));
3300 probability = split_branch_probability;
3302 seq = split_insns (pat, trial);
3304 split_branch_probability = -1;
3306 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3307 We may need to handle this specially. */
3308 if (after && BARRIER_P (after))
3311 after = NEXT_INSN (after);
3317 /* Avoid infinite loop if any insn of the result matches
3318 the original pattern. */
3322 if (INSN_P (insn_last)
3323 && rtx_equal_p (PATTERN (insn_last), pat))
3325 if (!NEXT_INSN (insn_last))
3327 insn_last = NEXT_INSN (insn_last);
3330 /* We will be adding the new sequence to the function. The splitters
3331 may have introduced invalid RTL sharing, so unshare the sequence now. */
3332 unshare_all_rtl_in_chain (seq);
3335 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3339 mark_jump_label (PATTERN (insn), insn, 0);
3341 if (probability != -1
3342 && any_condjump_p (insn)
3343 && !find_reg_note (insn, REG_BR_PROB, 0))
3345 /* We can preserve the REG_BR_PROB notes only if exactly
3346 one jump is created, otherwise the machine description
3347 is responsible for this step using
3348 split_branch_probability variable. */
3349 gcc_assert (njumps == 1);
3350 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3355 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3356 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3359 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3362 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3365 *p = CALL_INSN_FUNCTION_USAGE (trial);
3366 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3370 /* Copy notes, particularly those related to the CFG. */
3371 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3373 switch (REG_NOTE_KIND (note))
3376 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3379 || (flag_non_call_exceptions && INSN_P (insn)
3380 && may_trap_p (PATTERN (insn))))
3381 add_reg_note (insn, REG_EH_REGION, XEXP (note, 0));
3387 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3390 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3394 case REG_NON_LOCAL_GOTO:
3395 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3398 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3404 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3406 rtx reg = XEXP (note, 0);
3407 if (!FIND_REG_INC_NOTE (insn, reg)
3408 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3409 add_reg_note (insn, REG_INC, reg);
3419 /* If there are LABELS inside the split insns increment the
3420 usage count so we don't delete the label. */
3424 while (insn != NULL_RTX)
3426 /* JUMP_P insns have already been "marked" above. */
3427 if (NONJUMP_INSN_P (insn))
3428 mark_label_nuses (PATTERN (insn));
3430 insn = PREV_INSN (insn);
3434 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3436 delete_insn (trial);
3438 emit_barrier_after (tem);
3440 /* Recursively call try_split for each new insn created; by the
3441 time control returns here that insn will be fully split, so
3442 set LAST and continue from the insn after the one returned.
3443 We can't use next_active_insn here since AFTER may be a note.
3444 Ignore deleted insns, which can be occur if not optimizing. */
3445 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3446 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3447 tem = try_split (PATTERN (tem), tem, 1);
3449 /* Return either the first or the last insn, depending on which was
3452 ? (after ? PREV_INSN (after) : last_insn)
3453 : NEXT_INSN (before);
3456 /* Make and return an INSN rtx, initializing all its slots.
3457 Store PATTERN in the pattern slots. */
3460 make_insn_raw (rtx pattern)
3464 insn = rtx_alloc (INSN);
3466 INSN_UID (insn) = cur_insn_uid++;
3467 PATTERN (insn) = pattern;
3468 INSN_CODE (insn) = -1;
3469 REG_NOTES (insn) = NULL;
3470 INSN_LOCATOR (insn) = curr_insn_locator ();
3471 BLOCK_FOR_INSN (insn) = NULL;
3473 #ifdef ENABLE_RTL_CHECKING
3476 && (returnjump_p (insn)
3477 || (GET_CODE (insn) == SET
3478 && SET_DEST (insn) == pc_rtx)))
3480 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3488 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3491 make_jump_insn_raw (rtx pattern)
3495 insn = rtx_alloc (JUMP_INSN);
3496 INSN_UID (insn) = cur_insn_uid++;
3498 PATTERN (insn) = pattern;
3499 INSN_CODE (insn) = -1;
3500 REG_NOTES (insn) = NULL;
3501 JUMP_LABEL (insn) = NULL;
3502 INSN_LOCATOR (insn) = curr_insn_locator ();
3503 BLOCK_FOR_INSN (insn) = NULL;
3508 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3511 make_call_insn_raw (rtx pattern)
3515 insn = rtx_alloc (CALL_INSN);
3516 INSN_UID (insn) = cur_insn_uid++;
3518 PATTERN (insn) = pattern;
3519 INSN_CODE (insn) = -1;
3520 REG_NOTES (insn) = NULL;
3521 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3522 INSN_LOCATOR (insn) = curr_insn_locator ();
3523 BLOCK_FOR_INSN (insn) = NULL;
3528 /* Add INSN to the end of the doubly-linked list.
3529 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3534 PREV_INSN (insn) = last_insn;
3535 NEXT_INSN (insn) = 0;
3537 if (NULL != last_insn)
3538 NEXT_INSN (last_insn) = insn;
3540 if (NULL == first_insn)
3546 /* Add INSN into the doubly-linked list after insn AFTER. This and
3547 the next should be the only functions called to insert an insn once
3548 delay slots have been filled since only they know how to update a
3552 add_insn_after (rtx insn, rtx after, basic_block bb)
3554 rtx next = NEXT_INSN (after);
3556 gcc_assert (!optimize || !INSN_DELETED_P (after));
3558 NEXT_INSN (insn) = next;
3559 PREV_INSN (insn) = after;
3563 PREV_INSN (next) = insn;
3564 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3565 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3567 else if (last_insn == after)
3571 struct sequence_stack *stack = seq_stack;
3572 /* Scan all pending sequences too. */
3573 for (; stack; stack = stack->next)
3574 if (after == stack->last)
3583 if (!BARRIER_P (after)
3584 && !BARRIER_P (insn)
3585 && (bb = BLOCK_FOR_INSN (after)))
3587 set_block_for_insn (insn, bb);
3589 df_insn_rescan (insn);
3590 /* Should not happen as first in the BB is always
3591 either NOTE or LABEL. */
3592 if (BB_END (bb) == after
3593 /* Avoid clobbering of structure when creating new BB. */
3594 && !BARRIER_P (insn)
3595 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3599 NEXT_INSN (after) = insn;
3600 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3602 rtx sequence = PATTERN (after);
3603 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3607 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3608 the previous should be the only functions called to insert an insn
3609 once delay slots have been filled since only they know how to
3610 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3614 add_insn_before (rtx insn, rtx before, basic_block bb)
3616 rtx prev = PREV_INSN (before);
3618 gcc_assert (!optimize || !INSN_DELETED_P (before));
3620 PREV_INSN (insn) = prev;
3621 NEXT_INSN (insn) = before;
3625 NEXT_INSN (prev) = insn;
3626 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3628 rtx sequence = PATTERN (prev);
3629 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3632 else if (first_insn == before)
3636 struct sequence_stack *stack = seq_stack;
3637 /* Scan all pending sequences too. */
3638 for (; stack; stack = stack->next)
3639 if (before == stack->first)
3641 stack->first = insn;
3649 && !BARRIER_P (before)
3650 && !BARRIER_P (insn))
3651 bb = BLOCK_FOR_INSN (before);
3655 set_block_for_insn (insn, bb);
3657 df_insn_rescan (insn);
3658 /* Should not happen as first in the BB is always either NOTE or
3660 gcc_assert (BB_HEAD (bb) != insn
3661 /* Avoid clobbering of structure when creating new BB. */
3663 || NOTE_INSN_BASIC_BLOCK_P (insn));
3666 PREV_INSN (before) = insn;
3667 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3668 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3672 /* Replace insn with an deleted instruction note. */
3675 set_insn_deleted (rtx insn)
3677 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3678 PUT_CODE (insn, NOTE);
3679 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3683 /* Remove an insn from its doubly-linked list. This function knows how
3684 to handle sequences. */
3686 remove_insn (rtx insn)
3688 rtx next = NEXT_INSN (insn);
3689 rtx prev = PREV_INSN (insn);
3692 /* Later in the code, the block will be marked dirty. */
3693 df_insn_delete (NULL, INSN_UID (insn));
3697 NEXT_INSN (prev) = next;
3698 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3700 rtx sequence = PATTERN (prev);
3701 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3704 else if (first_insn == insn)
3708 struct sequence_stack *stack = seq_stack;
3709 /* Scan all pending sequences too. */
3710 for (; stack; stack = stack->next)
3711 if (insn == stack->first)
3713 stack->first = next;
3722 PREV_INSN (next) = prev;
3723 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3724 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3726 else if (last_insn == insn)
3730 struct sequence_stack *stack = seq_stack;
3731 /* Scan all pending sequences too. */
3732 for (; stack; stack = stack->next)
3733 if (insn == stack->last)
3741 if (!BARRIER_P (insn)
3742 && (bb = BLOCK_FOR_INSN (insn)))
3745 df_set_bb_dirty (bb);
3746 if (BB_HEAD (bb) == insn)
3748 /* Never ever delete the basic block note without deleting whole
3750 gcc_assert (!NOTE_P (insn));
3751 BB_HEAD (bb) = next;
3753 if (BB_END (bb) == insn)
3758 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3761 add_function_usage_to (rtx call_insn, rtx call_fusage)
3763 gcc_assert (call_insn && CALL_P (call_insn));
3765 /* Put the register usage information on the CALL. If there is already
3766 some usage information, put ours at the end. */
3767 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3771 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3772 link = XEXP (link, 1))
3775 XEXP (link, 1) = call_fusage;
3778 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3781 /* Delete all insns made since FROM.
3782 FROM becomes the new last instruction. */
3785 delete_insns_since (rtx from)
3790 NEXT_INSN (from) = 0;
3794 /* This function is deprecated, please use sequences instead.
3796 Move a consecutive bunch of insns to a different place in the chain.
3797 The insns to be moved are those between FROM and TO.
3798 They are moved to a new position after the insn AFTER.
3799 AFTER must not be FROM or TO or any insn in between.
3801 This function does not know about SEQUENCEs and hence should not be
3802 called after delay-slot filling has been done. */
3805 reorder_insns_nobb (rtx from, rtx to, rtx after)
3807 /* Splice this bunch out of where it is now. */
3808 if (PREV_INSN (from))
3809 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3811 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3812 if (last_insn == to)
3813 last_insn = PREV_INSN (from);
3814 if (first_insn == from)
3815 first_insn = NEXT_INSN (to);
3817 /* Make the new neighbors point to it and it to them. */
3818 if (NEXT_INSN (after))
3819 PREV_INSN (NEXT_INSN (after)) = to;
3821 NEXT_INSN (to) = NEXT_INSN (after);
3822 PREV_INSN (from) = after;
3823 NEXT_INSN (after) = from;
3824 if (after == last_insn)
3828 /* Same as function above, but take care to update BB boundaries. */
3830 reorder_insns (rtx from, rtx to, rtx after)
3832 rtx prev = PREV_INSN (from);
3833 basic_block bb, bb2;
3835 reorder_insns_nobb (from, to, after);
3837 if (!BARRIER_P (after)
3838 && (bb = BLOCK_FOR_INSN (after)))
3841 df_set_bb_dirty (bb);
3843 if (!BARRIER_P (from)
3844 && (bb2 = BLOCK_FOR_INSN (from)))
3846 if (BB_END (bb2) == to)
3847 BB_END (bb2) = prev;
3848 df_set_bb_dirty (bb2);
3851 if (BB_END (bb) == after)
3854 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3856 df_insn_change_bb (x, bb);
3861 /* Emit insn(s) of given code and pattern
3862 at a specified place within the doubly-linked list.
3864 All of the emit_foo global entry points accept an object
3865 X which is either an insn list or a PATTERN of a single
3868 There are thus a few canonical ways to generate code and
3869 emit it at a specific place in the instruction stream. For
3870 example, consider the instruction named SPOT and the fact that
3871 we would like to emit some instructions before SPOT. We might
3875 ... emit the new instructions ...
3876 insns_head = get_insns ();
3879 emit_insn_before (insns_head, SPOT);
3881 It used to be common to generate SEQUENCE rtl instead, but that
3882 is a relic of the past which no longer occurs. The reason is that
3883 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3884 generated would almost certainly die right after it was created. */
3886 /* Make X be output before the instruction BEFORE. */
3889 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
3894 gcc_assert (before);
3899 switch (GET_CODE (x))
3910 rtx next = NEXT_INSN (insn);
3911 add_insn_before (insn, before, bb);
3917 #ifdef ENABLE_RTL_CHECKING
3924 last = make_insn_raw (x);
3925 add_insn_before (last, before, bb);
3932 /* Make an instruction with body X and code JUMP_INSN
3933 and output it before the instruction BEFORE. */
3936 emit_jump_insn_before_noloc (rtx x, rtx before)
3938 rtx insn, last = NULL_RTX;
3940 gcc_assert (before);
3942 switch (GET_CODE (x))
3953 rtx next = NEXT_INSN (insn);
3954 add_insn_before (insn, before, NULL);
3960 #ifdef ENABLE_RTL_CHECKING
3967 last = make_jump_insn_raw (x);
3968 add_insn_before (last, before, NULL);
3975 /* Make an instruction with body X and code CALL_INSN
3976 and output it before the instruction BEFORE. */
3979 emit_call_insn_before_noloc (rtx x, rtx before)
3981 rtx last = NULL_RTX, insn;
3983 gcc_assert (before);
3985 switch (GET_CODE (x))
3996 rtx next = NEXT_INSN (insn);
3997 add_insn_before (insn, before, NULL);
4003 #ifdef ENABLE_RTL_CHECKING
4010 last = make_call_insn_raw (x);
4011 add_insn_before (last, before, NULL);
4018 /* Make an insn of code BARRIER
4019 and output it before the insn BEFORE. */
4022 emit_barrier_before (rtx before)
4024 rtx insn = rtx_alloc (BARRIER);
4026 INSN_UID (insn) = cur_insn_uid++;
4028 add_insn_before (insn, before, NULL);
4032 /* Emit the label LABEL before the insn BEFORE. */
4035 emit_label_before (rtx label, rtx before)
4037 /* This can be called twice for the same label as a result of the
4038 confusion that follows a syntax error! So make it harmless. */
4039 if (INSN_UID (label) == 0)
4041 INSN_UID (label) = cur_insn_uid++;
4042 add_insn_before (label, before, NULL);
4048 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4051 emit_note_before (enum insn_note subtype, rtx before)
4053 rtx note = rtx_alloc (NOTE);
4054 INSN_UID (note) = cur_insn_uid++;
4055 NOTE_KIND (note) = subtype;
4056 BLOCK_FOR_INSN (note) = NULL;
4057 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4059 add_insn_before (note, before, NULL);
4063 /* Helper for emit_insn_after, handles lists of instructions
4067 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4071 if (!bb && !BARRIER_P (after))
4072 bb = BLOCK_FOR_INSN (after);
4076 df_set_bb_dirty (bb);
4077 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4078 if (!BARRIER_P (last))
4080 set_block_for_insn (last, bb);
4081 df_insn_rescan (last);
4083 if (!BARRIER_P (last))
4085 set_block_for_insn (last, bb);
4086 df_insn_rescan (last);
4088 if (BB_END (bb) == after)
4092 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4095 after_after = NEXT_INSN (after);
4097 NEXT_INSN (after) = first;
4098 PREV_INSN (first) = after;
4099 NEXT_INSN (last) = after_after;
4101 PREV_INSN (after_after) = last;
4103 if (after == last_insn)
4109 /* Make X be output after the insn AFTER and set the BB of insn. If
4110 BB is NULL, an attempt is made to infer the BB from AFTER. */
4113 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4122 switch (GET_CODE (x))
4130 last = emit_insn_after_1 (x, after, bb);
4133 #ifdef ENABLE_RTL_CHECKING
4140 last = make_insn_raw (x);
4141 add_insn_after (last, after, bb);
4149 /* Make an insn of code JUMP_INSN with body X
4150 and output it after the insn AFTER. */
4153 emit_jump_insn_after_noloc (rtx x, rtx after)
4159 switch (GET_CODE (x))
4167 last = emit_insn_after_1 (x, after, NULL);
4170 #ifdef ENABLE_RTL_CHECKING
4177 last = make_jump_insn_raw (x);
4178 add_insn_after (last, after, NULL);
4185 /* Make an instruction with body X and code CALL_INSN
4186 and output it after the instruction AFTER. */
4189 emit_call_insn_after_noloc (rtx x, rtx after)
4195 switch (GET_CODE (x))
4203 last = emit_insn_after_1 (x, after, NULL);
4206 #ifdef ENABLE_RTL_CHECKING
4213 last = make_call_insn_raw (x);
4214 add_insn_after (last, after, NULL);
4221 /* Make an insn of code BARRIER
4222 and output it after the insn AFTER. */
4225 emit_barrier_after (rtx after)
4227 rtx insn = rtx_alloc (BARRIER);
4229 INSN_UID (insn) = cur_insn_uid++;
4231 add_insn_after (insn, after, NULL);
4235 /* Emit the label LABEL after the insn AFTER. */
4238 emit_label_after (rtx label, rtx after)
4240 /* This can be called twice for the same label
4241 as a result of the confusion that follows a syntax error!
4242 So make it harmless. */
4243 if (INSN_UID (label) == 0)
4245 INSN_UID (label) = cur_insn_uid++;
4246 add_insn_after (label, after, NULL);
4252 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4255 emit_note_after (enum insn_note subtype, rtx after)
4257 rtx note = rtx_alloc (NOTE);
4258 INSN_UID (note) = cur_insn_uid++;
4259 NOTE_KIND (note) = subtype;
4260 BLOCK_FOR_INSN (note) = NULL;
4261 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4262 add_insn_after (note, after, NULL);
4266 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4268 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4270 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4272 if (pattern == NULL_RTX || !loc)
4275 after = NEXT_INSN (after);
4278 if (active_insn_p (after) && !INSN_LOCATOR (after))
4279 INSN_LOCATOR (after) = loc;
4282 after = NEXT_INSN (after);
4287 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4289 emit_insn_after (rtx pattern, rtx after)
4292 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4294 return emit_insn_after_noloc (pattern, after, NULL);
4297 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4299 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4301 rtx last = emit_jump_insn_after_noloc (pattern, after);
4303 if (pattern == NULL_RTX || !loc)
4306 after = NEXT_INSN (after);
4309 if (active_insn_p (after) && !INSN_LOCATOR (after))
4310 INSN_LOCATOR (after) = loc;
4313 after = NEXT_INSN (after);
4318 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4320 emit_jump_insn_after (rtx pattern, rtx after)
4323 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4325 return emit_jump_insn_after_noloc (pattern, after);
4328 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4330 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4332 rtx last = emit_call_insn_after_noloc (pattern, after);
4334 if (pattern == NULL_RTX || !loc)
4337 after = NEXT_INSN (after);
4340 if (active_insn_p (after) && !INSN_LOCATOR (after))
4341 INSN_LOCATOR (after) = loc;
4344 after = NEXT_INSN (after);
4349 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4351 emit_call_insn_after (rtx pattern, rtx after)
4354 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4356 return emit_call_insn_after_noloc (pattern, after);
4359 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4361 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4363 rtx first = PREV_INSN (before);
4364 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4366 if (pattern == NULL_RTX || !loc)
4370 first = get_insns ();
4372 first = NEXT_INSN (first);
4375 if (active_insn_p (first) && !INSN_LOCATOR (first))
4376 INSN_LOCATOR (first) = loc;
4379 first = NEXT_INSN (first);
4384 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4386 emit_insn_before (rtx pattern, rtx before)
4388 if (INSN_P (before))
4389 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4391 return emit_insn_before_noloc (pattern, before, NULL);
4394 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4396 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4398 rtx first = PREV_INSN (before);
4399 rtx last = emit_jump_insn_before_noloc (pattern, before);
4401 if (pattern == NULL_RTX)
4404 first = NEXT_INSN (first);
4407 if (active_insn_p (first) && !INSN_LOCATOR (first))
4408 INSN_LOCATOR (first) = loc;
4411 first = NEXT_INSN (first);
4416 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4418 emit_jump_insn_before (rtx pattern, rtx before)
4420 if (INSN_P (before))
4421 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4423 return emit_jump_insn_before_noloc (pattern, before);
4426 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4428 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4430 rtx first = PREV_INSN (before);
4431 rtx last = emit_call_insn_before_noloc (pattern, before);
4433 if (pattern == NULL_RTX)
4436 first = NEXT_INSN (first);
4439 if (active_insn_p (first) && !INSN_LOCATOR (first))
4440 INSN_LOCATOR (first) = loc;
4443 first = NEXT_INSN (first);
4448 /* like emit_call_insn_before_noloc,
4449 but set insn_locator according to before. */
4451 emit_call_insn_before (rtx pattern, rtx before)
4453 if (INSN_P (before))
4454 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4456 return emit_call_insn_before_noloc (pattern, before);
4459 /* Take X and emit it at the end of the doubly-linked
4462 Returns the last insn emitted. */
4467 rtx last = last_insn;
4473 switch (GET_CODE (x))
4484 rtx next = NEXT_INSN (insn);
4491 #ifdef ENABLE_RTL_CHECKING
4498 last = make_insn_raw (x);
4506 /* Make an insn of code JUMP_INSN with pattern X
4507 and add it to the end of the doubly-linked list. */
4510 emit_jump_insn (rtx x)
4512 rtx last = NULL_RTX, insn;
4514 switch (GET_CODE (x))
4525 rtx next = NEXT_INSN (insn);
4532 #ifdef ENABLE_RTL_CHECKING
4539 last = make_jump_insn_raw (x);
4547 /* Make an insn of code CALL_INSN with pattern X
4548 and add it to the end of the doubly-linked list. */
4551 emit_call_insn (rtx x)
4555 switch (GET_CODE (x))
4563 insn = emit_insn (x);
4566 #ifdef ENABLE_RTL_CHECKING
4573 insn = make_call_insn_raw (x);
4581 /* Add the label LABEL to the end of the doubly-linked list. */
4584 emit_label (rtx label)
4586 /* This can be called twice for the same label
4587 as a result of the confusion that follows a syntax error!
4588 So make it harmless. */
4589 if (INSN_UID (label) == 0)
4591 INSN_UID (label) = cur_insn_uid++;
4597 /* Make an insn of code BARRIER
4598 and add it to the end of the doubly-linked list. */
4603 rtx barrier = rtx_alloc (BARRIER);
4604 INSN_UID (barrier) = cur_insn_uid++;
4609 /* Emit a copy of note ORIG. */
4612 emit_note_copy (rtx orig)
4616 note = rtx_alloc (NOTE);
4618 INSN_UID (note) = cur_insn_uid++;
4619 NOTE_DATA (note) = NOTE_DATA (orig);
4620 NOTE_KIND (note) = NOTE_KIND (orig);
4621 BLOCK_FOR_INSN (note) = NULL;
4627 /* Make an insn of code NOTE or type NOTE_NO
4628 and add it to the end of the doubly-linked list. */
4631 emit_note (enum insn_note kind)
4635 note = rtx_alloc (NOTE);
4636 INSN_UID (note) = cur_insn_uid++;
4637 NOTE_KIND (note) = kind;
4638 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4639 BLOCK_FOR_INSN (note) = NULL;
4644 /* Emit a clobber of lvalue X. */
4647 emit_clobber (rtx x)
4649 /* CONCATs should not appear in the insn stream. */
4650 if (GET_CODE (x) == CONCAT)
4652 emit_clobber (XEXP (x, 0));
4653 return emit_clobber (XEXP (x, 1));
4655 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4658 /* Return a sequence of insns to clobber lvalue X. */
4672 /* Emit a use of rvalue X. */
4677 /* CONCATs should not appear in the insn stream. */
4678 if (GET_CODE (x) == CONCAT)
4680 emit_use (XEXP (x, 0));
4681 return emit_use (XEXP (x, 1));
4683 return emit_insn (gen_rtx_USE (VOIDmode, x));
4686 /* Return a sequence of insns to use rvalue X. */
4700 /* Cause next statement to emit a line note even if the line number
4704 force_next_line_note (void)
4709 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4710 note of this type already exists, remove it first. */
4713 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4715 rtx note = find_reg_note (insn, kind, NULL_RTX);
4721 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4722 has multiple sets (some callers assume single_set
4723 means the insn only has one set, when in fact it
4724 means the insn only has one * useful * set). */
4725 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4731 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4732 It serves no useful purpose and breaks eliminate_regs. */
4733 if (GET_CODE (datum) == ASM_OPERANDS)
4738 XEXP (note, 0) = datum;
4739 df_notes_rescan (insn);
4747 XEXP (note, 0) = datum;
4753 add_reg_note (insn, kind, datum);
4759 df_notes_rescan (insn);
4765 return REG_NOTES (insn);
4768 /* Return an indication of which type of insn should have X as a body.
4769 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4771 static enum rtx_code
4772 classify_insn (rtx x)
4776 if (GET_CODE (x) == CALL)
4778 if (GET_CODE (x) == RETURN)
4780 if (GET_CODE (x) == SET)
4782 if (SET_DEST (x) == pc_rtx)
4784 else if (GET_CODE (SET_SRC (x)) == CALL)
4789 if (GET_CODE (x) == PARALLEL)
4792 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4793 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4795 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4796 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4798 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4799 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4805 /* Emit the rtl pattern X as an appropriate kind of insn.
4806 If X is a label, it is simply added into the insn chain. */
4811 enum rtx_code code = classify_insn (x);
4816 return emit_label (x);
4818 return emit_insn (x);
4821 rtx insn = emit_jump_insn (x);
4822 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4823 return emit_barrier ();
4827 return emit_call_insn (x);
4833 /* Space for free sequence stack entries. */
4834 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4836 /* Begin emitting insns to a sequence. If this sequence will contain
4837 something that might cause the compiler to pop arguments to function
4838 calls (because those pops have previously been deferred; see
4839 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4840 before calling this function. That will ensure that the deferred
4841 pops are not accidentally emitted in the middle of this sequence. */
4844 start_sequence (void)
4846 struct sequence_stack *tem;
4848 if (free_sequence_stack != NULL)
4850 tem = free_sequence_stack;
4851 free_sequence_stack = tem->next;
4854 tem = GGC_NEW (struct sequence_stack);
4856 tem->next = seq_stack;
4857 tem->first = first_insn;
4858 tem->last = last_insn;
4866 /* Set up the insn chain starting with FIRST as the current sequence,
4867 saving the previously current one. See the documentation for
4868 start_sequence for more information about how to use this function. */
4871 push_to_sequence (rtx first)
4877 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4883 /* Like push_to_sequence, but take the last insn as an argument to avoid
4884 looping through the list. */
4887 push_to_sequence2 (rtx first, rtx last)
4895 /* Set up the outer-level insn chain
4896 as the current sequence, saving the previously current one. */
4899 push_topmost_sequence (void)
4901 struct sequence_stack *stack, *top = NULL;
4905 for (stack = seq_stack; stack; stack = stack->next)
4908 first_insn = top->first;
4909 last_insn = top->last;
4912 /* After emitting to the outer-level insn chain, update the outer-level
4913 insn chain, and restore the previous saved state. */
4916 pop_topmost_sequence (void)
4918 struct sequence_stack *stack, *top = NULL;
4920 for (stack = seq_stack; stack; stack = stack->next)
4923 top->first = first_insn;
4924 top->last = last_insn;
4929 /* After emitting to a sequence, restore previous saved state.
4931 To get the contents of the sequence just made, you must call
4932 `get_insns' *before* calling here.
4934 If the compiler might have deferred popping arguments while
4935 generating this sequence, and this sequence will not be immediately
4936 inserted into the instruction stream, use do_pending_stack_adjust
4937 before calling get_insns. That will ensure that the deferred
4938 pops are inserted into this sequence, and not into some random
4939 location in the instruction stream. See INHIBIT_DEFER_POP for more
4940 information about deferred popping of arguments. */
4945 struct sequence_stack *tem = seq_stack;
4947 first_insn = tem->first;
4948 last_insn = tem->last;
4949 seq_stack = tem->next;
4951 memset (tem, 0, sizeof (*tem));
4952 tem->next = free_sequence_stack;
4953 free_sequence_stack = tem;
4956 /* Return 1 if currently emitting into a sequence. */
4959 in_sequence_p (void)
4961 return seq_stack != 0;
4964 /* Put the various virtual registers into REGNO_REG_RTX. */
4967 init_virtual_regs (void)
4969 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4970 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4971 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4972 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4973 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4977 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4978 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4979 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4980 static int copy_insn_n_scratches;
4982 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4983 copied an ASM_OPERANDS.
4984 In that case, it is the original input-operand vector. */
4985 static rtvec orig_asm_operands_vector;
4987 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4988 copied an ASM_OPERANDS.
4989 In that case, it is the copied input-operand vector. */
4990 static rtvec copy_asm_operands_vector;
4992 /* Likewise for the constraints vector. */
4993 static rtvec orig_asm_constraints_vector;
4994 static rtvec copy_asm_constraints_vector;
4996 /* Recursively create a new copy of an rtx for copy_insn.
4997 This function differs from copy_rtx in that it handles SCRATCHes and
4998 ASM_OPERANDs properly.
4999 Normally, this function is not used directly; use copy_insn as front end.
5000 However, you could first copy an insn pattern with copy_insn and then use
5001 this function afterwards to properly copy any REG_NOTEs containing
5005 copy_insn_1 (rtx orig)
5010 const char *format_ptr;
5015 code = GET_CODE (orig);
5030 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5035 for (i = 0; i < copy_insn_n_scratches; i++)
5036 if (copy_insn_scratch_in[i] == orig)
5037 return copy_insn_scratch_out[i];
5041 if (shared_const_p (orig))
5045 /* A MEM with a constant address is not sharable. The problem is that
5046 the constant address may need to be reloaded. If the mem is shared,
5047 then reloading one copy of this mem will cause all copies to appear
5048 to have been reloaded. */
5054 /* Copy the various flags, fields, and other information. We assume
5055 that all fields need copying, and then clear the fields that should
5056 not be copied. That is the sensible default behavior, and forces
5057 us to explicitly document why we are *not* copying a flag. */
5058 copy = shallow_copy_rtx (orig);
5060 /* We do not copy the USED flag, which is used as a mark bit during
5061 walks over the RTL. */
5062 RTX_FLAG (copy, used) = 0;
5064 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5067 RTX_FLAG (copy, jump) = 0;
5068 RTX_FLAG (copy, call) = 0;
5069 RTX_FLAG (copy, frame_related) = 0;
5072 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5074 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5075 switch (*format_ptr++)
5078 if (XEXP (orig, i) != NULL)
5079 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5084 if (XVEC (orig, i) == orig_asm_constraints_vector)
5085 XVEC (copy, i) = copy_asm_constraints_vector;
5086 else if (XVEC (orig, i) == orig_asm_operands_vector)
5087 XVEC (copy, i) = copy_asm_operands_vector;
5088 else if (XVEC (orig, i) != NULL)
5090 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5091 for (j = 0; j < XVECLEN (copy, i); j++)
5092 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5103 /* These are left unchanged. */
5110 if (code == SCRATCH)
5112 i = copy_insn_n_scratches++;
5113 gcc_assert (i < MAX_RECOG_OPERANDS);
5114 copy_insn_scratch_in[i] = orig;
5115 copy_insn_scratch_out[i] = copy;
5117 else if (code == ASM_OPERANDS)
5119 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5120 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5121 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5122 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5128 /* Create a new copy of an rtx.
5129 This function differs from copy_rtx in that it handles SCRATCHes and
5130 ASM_OPERANDs properly.
5131 INSN doesn't really have to be a full INSN; it could be just the
5134 copy_insn (rtx insn)
5136 copy_insn_n_scratches = 0;
5137 orig_asm_operands_vector = 0;
5138 orig_asm_constraints_vector = 0;
5139 copy_asm_operands_vector = 0;
5140 copy_asm_constraints_vector = 0;
5141 return copy_insn_1 (insn);
5144 /* Initialize data structures and variables in this file
5145 before generating rtl for each function. */
5153 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5154 last_location = UNKNOWN_LOCATION;
5155 first_label_num = label_num;
5158 /* Init the tables that describe all the pseudo regs. */
5160 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5162 crtl->emit.regno_pointer_align
5163 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5166 = GGC_NEWVEC (rtx, crtl->emit.regno_pointer_align_length);
5168 /* Put copies of all the hard registers into regno_reg_rtx. */
5169 memcpy (regno_reg_rtx,
5170 static_regno_reg_rtx,
5171 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5173 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5174 init_virtual_regs ();
5176 /* Indicate that the virtual registers and stack locations are
5178 REG_POINTER (stack_pointer_rtx) = 1;
5179 REG_POINTER (frame_pointer_rtx) = 1;
5180 REG_POINTER (hard_frame_pointer_rtx) = 1;
5181 REG_POINTER (arg_pointer_rtx) = 1;
5183 REG_POINTER (virtual_incoming_args_rtx) = 1;
5184 REG_POINTER (virtual_stack_vars_rtx) = 1;
5185 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5186 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5187 REG_POINTER (virtual_cfa_rtx) = 1;
5189 #ifdef STACK_BOUNDARY
5190 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5191 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5192 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5193 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5195 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5196 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5197 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5198 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5199 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5202 #ifdef INIT_EXPANDERS
5207 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5210 gen_const_vector (enum machine_mode mode, int constant)
5215 enum machine_mode inner;
5217 units = GET_MODE_NUNITS (mode);
5218 inner = GET_MODE_INNER (mode);
5220 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5222 v = rtvec_alloc (units);
5224 /* We need to call this function after we set the scalar const_tiny_rtx
5226 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5228 for (i = 0; i < units; ++i)
5229 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5231 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5235 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5236 all elements are zero, and the one vector when all elements are one. */
5238 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5240 enum machine_mode inner = GET_MODE_INNER (mode);
5241 int nunits = GET_MODE_NUNITS (mode);
5245 /* Check to see if all of the elements have the same value. */
5246 x = RTVEC_ELT (v, nunits - 1);
5247 for (i = nunits - 2; i >= 0; i--)
5248 if (RTVEC_ELT (v, i) != x)
5251 /* If the values are all the same, check to see if we can use one of the
5252 standard constant vectors. */
5255 if (x == CONST0_RTX (inner))
5256 return CONST0_RTX (mode);
5257 else if (x == CONST1_RTX (inner))
5258 return CONST1_RTX (mode);
5261 return gen_rtx_raw_CONST_VECTOR (mode, v);
5264 /* Initialise global register information required by all functions. */
5267 init_emit_regs (void)
5271 /* Reset register attributes */
5272 htab_empty (reg_attrs_htab);
5274 /* We need reg_raw_mode, so initialize the modes now. */
5275 init_reg_modes_target ();
5277 /* Assign register numbers to the globally defined register rtx. */
5278 pc_rtx = gen_rtx_PC (VOIDmode);
5279 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5280 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5281 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5282 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5283 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5284 virtual_incoming_args_rtx =
5285 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5286 virtual_stack_vars_rtx =
5287 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5288 virtual_stack_dynamic_rtx =
5289 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5290 virtual_outgoing_args_rtx =
5291 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5292 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5294 /* Initialize RTL for commonly used hard registers. These are
5295 copied into regno_reg_rtx as we begin to compile each function. */
5296 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5297 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5299 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5300 return_address_pointer_rtx
5301 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5304 #ifdef STATIC_CHAIN_REGNUM
5305 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5307 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5308 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5309 static_chain_incoming_rtx
5310 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5313 static_chain_incoming_rtx = static_chain_rtx;
5317 static_chain_rtx = STATIC_CHAIN;
5319 #ifdef STATIC_CHAIN_INCOMING
5320 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5322 static_chain_incoming_rtx = static_chain_rtx;
5326 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5327 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5329 pic_offset_table_rtx = NULL_RTX;
5332 /* Create some permanent unique rtl objects shared between all functions.
5333 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5336 init_emit_once (int line_numbers)
5339 enum machine_mode mode;
5340 enum machine_mode double_mode;
5342 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5344 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5345 const_int_htab_eq, NULL);
5347 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5348 const_double_htab_eq, NULL);
5350 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5351 const_fixed_htab_eq, NULL);
5353 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5354 mem_attrs_htab_eq, NULL);
5355 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5356 reg_attrs_htab_eq, NULL);
5358 no_line_numbers = ! line_numbers;
5360 /* Compute the word and byte modes. */
5362 byte_mode = VOIDmode;
5363 word_mode = VOIDmode;
5364 double_mode = VOIDmode;
5366 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5368 mode = GET_MODE_WIDER_MODE (mode))
5370 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5371 && byte_mode == VOIDmode)
5374 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5375 && word_mode == VOIDmode)
5379 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5381 mode = GET_MODE_WIDER_MODE (mode))
5383 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5384 && double_mode == VOIDmode)
5388 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5390 #ifdef INIT_EXPANDERS
5391 /* This is to initialize {init|mark|free}_machine_status before the first
5392 call to push_function_context_to. This is needed by the Chill front
5393 end which calls push_function_context_to before the first call to
5394 init_function_start. */
5398 /* Create the unique rtx's for certain rtx codes and operand values. */
5400 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5401 tries to use these variables. */
5402 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5403 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5404 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5406 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5407 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5408 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5410 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5412 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5413 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5414 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5419 dconsthalf = dconst1;
5420 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5422 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5424 const REAL_VALUE_TYPE *const r =
5425 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5427 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5429 mode = GET_MODE_WIDER_MODE (mode))
5430 const_tiny_rtx[i][(int) mode] =
5431 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5433 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5435 mode = GET_MODE_WIDER_MODE (mode))
5436 const_tiny_rtx[i][(int) mode] =
5437 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5439 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5441 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5443 mode = GET_MODE_WIDER_MODE (mode))
5444 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5446 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5448 mode = GET_MODE_WIDER_MODE (mode))
5449 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5452 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5454 mode = GET_MODE_WIDER_MODE (mode))
5456 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5457 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5460 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5462 mode = GET_MODE_WIDER_MODE (mode))
5464 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5465 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5468 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5470 mode = GET_MODE_WIDER_MODE (mode))
5472 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5473 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5476 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5478 mode = GET_MODE_WIDER_MODE (mode))
5480 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5481 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5484 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5486 mode = GET_MODE_WIDER_MODE (mode))
5488 FCONST0(mode).data.high = 0;
5489 FCONST0(mode).data.low = 0;
5490 FCONST0(mode).mode = mode;
5491 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5492 FCONST0 (mode), mode);
5495 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5497 mode = GET_MODE_WIDER_MODE (mode))
5499 FCONST0(mode).data.high = 0;
5500 FCONST0(mode).data.low = 0;
5501 FCONST0(mode).mode = mode;
5502 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5503 FCONST0 (mode), mode);
5506 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5508 mode = GET_MODE_WIDER_MODE (mode))
5510 FCONST0(mode).data.high = 0;
5511 FCONST0(mode).data.low = 0;
5512 FCONST0(mode).mode = mode;
5513 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5514 FCONST0 (mode), mode);
5516 /* We store the value 1. */
5517 FCONST1(mode).data.high = 0;
5518 FCONST1(mode).data.low = 0;
5519 FCONST1(mode).mode = mode;
5520 lshift_double (1, 0, GET_MODE_FBIT (mode),
5521 2 * HOST_BITS_PER_WIDE_INT,
5522 &FCONST1(mode).data.low,
5523 &FCONST1(mode).data.high,
5524 SIGNED_FIXED_POINT_MODE_P (mode));
5525 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5526 FCONST1 (mode), mode);
5529 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5531 mode = GET_MODE_WIDER_MODE (mode))
5533 FCONST0(mode).data.high = 0;
5534 FCONST0(mode).data.low = 0;
5535 FCONST0(mode).mode = mode;
5536 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5537 FCONST0 (mode), mode);
5539 /* We store the value 1. */
5540 FCONST1(mode).data.high = 0;
5541 FCONST1(mode).data.low = 0;
5542 FCONST1(mode).mode = mode;
5543 lshift_double (1, 0, GET_MODE_FBIT (mode),
5544 2 * HOST_BITS_PER_WIDE_INT,
5545 &FCONST1(mode).data.low,
5546 &FCONST1(mode).data.high,
5547 SIGNED_FIXED_POINT_MODE_P (mode));
5548 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5549 FCONST1 (mode), mode);
5552 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5554 mode = GET_MODE_WIDER_MODE (mode))
5556 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5559 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5561 mode = GET_MODE_WIDER_MODE (mode))
5563 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5566 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5568 mode = GET_MODE_WIDER_MODE (mode))
5570 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5571 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5574 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5576 mode = GET_MODE_WIDER_MODE (mode))
5578 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5579 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5582 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5583 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5584 const_tiny_rtx[0][i] = const0_rtx;
5586 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5587 if (STORE_FLAG_VALUE == 1)
5588 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5591 /* Produce exact duplicate of insn INSN after AFTER.
5592 Care updating of libcall regions if present. */
5595 emit_copy_of_insn_after (rtx insn, rtx after)
5599 switch (GET_CODE (insn))
5602 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5606 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5610 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5611 if (CALL_INSN_FUNCTION_USAGE (insn))
5612 CALL_INSN_FUNCTION_USAGE (new_rtx)
5613 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5614 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5615 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5616 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5617 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5618 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5625 /* Update LABEL_NUSES. */
5626 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5628 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5630 /* If the old insn is frame related, then so is the new one. This is
5631 primarily needed for IA-64 unwind info which marks epilogue insns,
5632 which may be duplicated by the basic block reordering code. */
5633 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5635 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5636 will make them. REG_LABEL_TARGETs are created there too, but are
5637 supposed to be sticky, so we copy them. */
5638 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5639 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5641 if (GET_CODE (link) == EXPR_LIST)
5642 add_reg_note (new_rtx, REG_NOTE_KIND (link),
5643 copy_insn_1 (XEXP (link, 0)));
5645 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
5648 INSN_CODE (new_rtx) = INSN_CODE (insn);
5652 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5654 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5656 if (hard_reg_clobbers[mode][regno])
5657 return hard_reg_clobbers[mode][regno];
5659 return (hard_reg_clobbers[mode][regno] =
5660 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5663 #include "gt-emit-rtl.h"