1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num = 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl[GR_MAX];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
101 REAL_VALUE_TYPE dconst0;
102 REAL_VALUE_TYPE dconst1;
103 REAL_VALUE_TYPE dconst2;
104 REAL_VALUE_TYPE dconstm1;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 static rtx make_jump_insn_raw PARAMS ((rtx));
174 static rtx make_call_insn_raw PARAMS ((rtx));
175 static rtx find_line_note PARAMS ((rtx));
176 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
177 static void unshare_all_rtl_1 PARAMS ((rtx));
178 static void unshare_all_decls PARAMS ((tree));
179 static void reset_used_decls PARAMS ((tree));
180 static void mark_label_nuses PARAMS ((rtx));
181 static hashval_t const_int_htab_hash PARAMS ((const void *));
182 static int const_int_htab_eq PARAMS ((const void *,
184 static int rtx_htab_mark_1 PARAMS ((void **, void *));
185 static void rtx_htab_mark PARAMS ((void *));
188 /* Returns a hash code for X (which is a really a CONST_INT). */
191 const_int_htab_hash (x)
194 return (hashval_t) INTVAL ((const struct rtx_def *) x);
197 /* Returns non-zero if the value represented by X (which is really a
198 CONST_INT) is the same as that given by Y (which is really a
202 const_int_htab_eq (x, y)
206 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
209 /* Mark the hash-table element X (which is really a pointer to an
213 rtx_htab_mark_1 (x, data)
215 void *data ATTRIBUTE_UNUSED;
221 /* Mark all the elements of HTAB (which is really an htab_t full of
228 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
231 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
232 don't attempt to share with the various global pieces of rtl (such as
233 frame_pointer_rtx). */
236 gen_raw_REG (mode, regno)
237 enum machine_mode mode;
240 rtx x = gen_rtx_raw_REG (mode, regno);
241 ORIGINAL_REGNO (x) = regno;
245 /* There are some RTL codes that require special attention; the generation
246 functions do the raw handling. If you add to this list, modify
247 special_rtx in gengenrtl.c as well. */
250 gen_rtx_CONST_INT (mode, arg)
251 enum machine_mode mode ATTRIBUTE_UNUSED;
256 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
257 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx && arg == STORE_FLAG_VALUE)
261 return const_true_rtx;
264 /* Look up the CONST_INT in the hash table. */
265 slot = htab_find_slot_with_hash (const_int_htab, &arg,
266 (hashval_t) arg, INSERT);
268 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
273 /* CONST_DOUBLEs needs special handling because their length is known
277 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
278 enum machine_mode mode;
280 HOST_WIDE_INT arg1, arg2;
282 rtx r = rtx_alloc (CONST_DOUBLE);
287 X0EXP (r, 1) = NULL_RTX;
291 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
298 gen_rtx_REG (mode, regno)
299 enum machine_mode mode;
302 /* In case the MD file explicitly references the frame pointer, have
303 all such references point to the same frame pointer. This is
304 used during frame pointer elimination to distinguish the explicit
305 references to these registers from pseudos that happened to be
308 If we have eliminated the frame pointer or arg pointer, we will
309 be using it as a normal register, for example as a spill
310 register. In such cases, we might be accessing it in a mode that
311 is not Pmode and therefore cannot use the pre-allocated rtx.
313 Also don't do this when we are making new REGs in reload, since
314 we don't want to get confused with the real pointers. */
316 if (mode == Pmode && !reload_in_progress)
318 if (regno == FRAME_POINTER_REGNUM)
319 return frame_pointer_rtx;
320 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
321 if (regno == HARD_FRAME_POINTER_REGNUM)
322 return hard_frame_pointer_rtx;
324 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
325 if (regno == ARG_POINTER_REGNUM)
326 return arg_pointer_rtx;
328 #ifdef RETURN_ADDRESS_POINTER_REGNUM
329 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
330 return return_address_pointer_rtx;
332 if (regno == STACK_POINTER_REGNUM)
333 return stack_pointer_rtx;
336 return gen_raw_REG (mode, regno);
340 gen_rtx_MEM (mode, addr)
341 enum machine_mode mode;
344 rtx rt = gen_rtx_raw_MEM (mode, addr);
346 /* This field is not cleared by the mere allocation of the rtx, so
348 MEM_ALIAS_SET (rt) = 0;
354 gen_rtx_SUBREG (mode, reg, offset)
355 enum machine_mode mode;
359 /* This is the most common failure type.
360 Catch it early so we can see who does it. */
361 if ((offset % GET_MODE_SIZE (mode)) != 0)
364 /* This check isn't usable right now because combine will
365 throw arbitrary crap like a CALL into a SUBREG in
366 gen_lowpart_for_combine so we must just eat it. */
368 /* Check for this too. */
369 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
372 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
375 /* Generate a SUBREG representing the least-significant part
376 * of REG if MODE is smaller than mode of REG, otherwise
377 * paradoxical SUBREG. */
379 gen_lowpart_SUBREG (mode, reg)
380 enum machine_mode mode;
383 enum machine_mode inmode;
386 inmode = GET_MODE (reg);
387 if (inmode == VOIDmode)
390 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (inmode)
391 && (WORDS_BIG_ENDIAN || BYTES_BIG_ENDIAN))
393 offset = GET_MODE_SIZE (inmode) - GET_MODE_SIZE (mode);
394 if (! BYTES_BIG_ENDIAN)
395 offset = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
396 else if (! WORDS_BIG_ENDIAN)
397 offset %= UNITS_PER_WORD;
399 return gen_rtx_SUBREG (mode, reg, offset);
402 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
404 ** This routine generates an RTX of the size specified by
405 ** <code>, which is an RTX code. The RTX structure is initialized
406 ** from the arguments <element1> through <elementn>, which are
407 ** interpreted according to the specific RTX type's format. The
408 ** special machine mode associated with the rtx (if any) is specified
411 ** gen_rtx can be invoked in a way which resembles the lisp-like
412 ** rtx it will generate. For example, the following rtx structure:
414 ** (plus:QI (mem:QI (reg:SI 1))
415 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
417 ** ...would be generated by the following C code:
419 ** gen_rtx (PLUS, QImode,
420 ** gen_rtx (MEM, QImode,
421 ** gen_rtx (REG, SImode, 1)),
422 ** gen_rtx (MEM, QImode,
423 ** gen_rtx (PLUS, SImode,
424 ** gen_rtx (REG, SImode, 2),
425 ** gen_rtx (REG, SImode, 3)))),
430 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
432 #ifndef ANSI_PROTOTYPES
434 enum machine_mode mode;
437 register int i; /* Array indices... */
438 register const char *fmt; /* Current rtx's format... */
439 register rtx rt_val; /* RTX to return to caller... */
443 #ifndef ANSI_PROTOTYPES
444 code = va_arg (p, enum rtx_code);
445 mode = va_arg (p, enum machine_mode);
451 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
456 rtx arg0 = va_arg (p, rtx);
457 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
458 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
459 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
464 rt_val = gen_rtx_REG (mode, va_arg (p, int));
468 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
472 rt_val = rtx_alloc (code); /* Allocate the storage space. */
473 rt_val->mode = mode; /* Store the machine mode... */
475 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
476 for (i = 0; i < GET_RTX_LENGTH (code); i++)
480 case '0': /* Unused field. */
483 case 'i': /* An integer? */
484 XINT (rt_val, i) = va_arg (p, int);
487 case 'w': /* A wide integer? */
488 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
491 case 's': /* A string? */
492 XSTR (rt_val, i) = va_arg (p, char *);
495 case 'e': /* An expression? */
496 case 'u': /* An insn? Same except when printing. */
497 XEXP (rt_val, i) = va_arg (p, rtx);
500 case 'E': /* An RTX vector? */
501 XVEC (rt_val, i) = va_arg (p, rtvec);
504 case 'b': /* A bitmap? */
505 XBITMAP (rt_val, i) = va_arg (p, bitmap);
508 case 't': /* A tree? */
509 XTREE (rt_val, i) = va_arg (p, tree);
523 /* gen_rtvec (n, [rt1, ..., rtn])
525 ** This routine creates an rtvec and stores within it the
526 ** pointers to rtx's which are its arguments.
531 gen_rtvec VPARAMS ((int n, ...))
533 #ifndef ANSI_PROTOTYPES
542 #ifndef ANSI_PROTOTYPES
547 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
549 vector = (rtx *) alloca (n * sizeof (rtx));
551 for (i = 0; i < n; i++)
552 vector[i] = va_arg (p, rtx);
555 return gen_rtvec_v (n, vector);
559 gen_rtvec_v (n, argp)
564 register rtvec rt_val;
567 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
569 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
571 for (i = 0; i < n; i++)
572 rt_val->elem[i] = *argp++;
578 /* Generate a REG rtx for a new pseudo register of mode MODE.
579 This pseudo is assigned the next sequential register number. */
583 enum machine_mode mode;
585 struct function *f = cfun;
588 /* Don't let anything called after initial flow analysis create new
593 if (generating_concat_p
594 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
595 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
597 /* For complex modes, don't make a single pseudo.
598 Instead, make a CONCAT of two pseudos.
599 This allows noncontiguous allocation of the real and imaginary parts,
600 which makes much better code. Besides, allocating DCmode
601 pseudos overstrains reload on some machines like the 386. */
602 rtx realpart, imagpart;
603 int size = GET_MODE_UNIT_SIZE (mode);
604 enum machine_mode partmode
605 = mode_for_size (size * BITS_PER_UNIT,
606 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
607 ? MODE_FLOAT : MODE_INT),
610 realpart = gen_reg_rtx (partmode);
611 imagpart = gen_reg_rtx (partmode);
612 return gen_rtx_CONCAT (mode, realpart, imagpart);
615 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
616 to have an element for this pseudo reg number. */
618 if (reg_rtx_no == f->emit->regno_pointer_align_length)
620 int old_size = f->emit->regno_pointer_align_length;
623 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
624 memset (new + old_size, 0, old_size);
625 f->emit->regno_pointer_align = (unsigned char *) new;
627 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
628 old_size * 2 * sizeof (rtx));
629 memset (new1 + old_size, 0, old_size * sizeof (rtx));
630 regno_reg_rtx = new1;
632 f->emit->regno_pointer_align_length = old_size * 2;
635 val = gen_raw_REG (mode, reg_rtx_no);
636 regno_reg_rtx[reg_rtx_no++] = val;
640 /* Identify REG (which may be a CONCAT) as a user register. */
646 if (GET_CODE (reg) == CONCAT)
648 REG_USERVAR_P (XEXP (reg, 0)) = 1;
649 REG_USERVAR_P (XEXP (reg, 1)) = 1;
651 else if (GET_CODE (reg) == REG)
652 REG_USERVAR_P (reg) = 1;
657 /* Identify REG as a probable pointer register and show its alignment
658 as ALIGN, if nonzero. */
661 mark_reg_pointer (reg, align)
665 if (! REG_POINTER (reg))
667 REG_POINTER (reg) = 1;
670 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
672 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
673 /* We can no-longer be sure just how aligned this pointer is */
674 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
677 /* Return 1 plus largest pseudo reg number used in the current function. */
685 /* Return 1 + the largest label number used so far in the current function. */
690 if (last_label_num && label_num == base_label_num)
691 return last_label_num;
695 /* Return first label number used in this function (if any were used). */
698 get_first_label_num ()
700 return first_label_num;
703 /* Return the final regno of X, which is a SUBREG of a hard
706 subreg_hard_regno (x, check_mode)
710 enum machine_mode mode = GET_MODE (x);
711 unsigned int byte_offset, base_regno, final_regno;
712 rtx reg = SUBREG_REG (x);
714 /* This is where we attempt to catch illegal subregs
715 created by the compiler. */
716 if (GET_CODE (x) != SUBREG
717 || GET_CODE (reg) != REG)
719 base_regno = REGNO (reg);
720 if (base_regno >= FIRST_PSEUDO_REGISTER)
722 if (! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
725 /* Catch non-congruent offsets too. */
726 byte_offset = SUBREG_BYTE (x);
727 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
730 final_regno = subreg_regno (x);
735 /* Return a value representing some low-order bits of X, where the number
736 of low-order bits is given by MODE. Note that no conversion is done
737 between floating-point and fixed-point values, rather, the bit
738 representation is returned.
740 This function handles the cases in common between gen_lowpart, below,
741 and two variants in cse.c and combine.c. These are the cases that can
742 be safely handled at all points in the compilation.
744 If this is not a case we can handle, return 0. */
747 gen_lowpart_common (mode, x)
748 enum machine_mode mode;
751 int msize = GET_MODE_SIZE (mode);
752 int xsize = GET_MODE_SIZE (GET_MODE (x));
755 if (GET_MODE (x) == mode)
758 /* MODE must occupy no more words than the mode of X. */
759 if (GET_MODE (x) != VOIDmode
760 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
761 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
764 if ((WORDS_BIG_ENDIAN || BYTES_BIG_ENDIAN)
767 int difference = xsize - msize;
769 if (WORDS_BIG_ENDIAN)
770 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
771 if (BYTES_BIG_ENDIAN)
772 offset += difference % UNITS_PER_WORD;
775 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
776 && (GET_MODE_CLASS (mode) == MODE_INT
777 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
779 /* If we are getting the low-order part of something that has been
780 sign- or zero-extended, we can either just use the object being
781 extended or make a narrower extension. If we want an even smaller
782 piece than the size of the object being extended, call ourselves
785 This case is used mostly by combine and cse. */
787 if (GET_MODE (XEXP (x, 0)) == mode)
789 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
790 return gen_lowpart_common (mode, XEXP (x, 0));
791 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
792 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
794 else if (GET_CODE (x) == SUBREG
795 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
796 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
800 if (GET_MODE (SUBREG_REG (x)) == mode && subreg_lowpart_p (x))
801 return SUBREG_REG (x);
803 /* When working with SUBREGs the rule is that the byte
804 offset must be a multiple of the SUBREG's mode. */
805 final_offset = SUBREG_BYTE (x) + offset;
806 final_offset = (final_offset / GET_MODE_SIZE (mode));
807 final_offset = (final_offset * GET_MODE_SIZE (mode));
808 return gen_rtx_SUBREG (mode, SUBREG_REG (x), final_offset);
810 else if (GET_CODE (x) == REG)
812 /* Hard registers are done specially in certain cases. */
813 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
815 int final_regno = REGNO (x) +
816 subreg_regno_offset (REGNO (x), GET_MODE (x),
819 /* If the final regno is not valid for MODE, punt. */
820 /* ??? We do allow it if the current REG is not valid for
821 ??? it's mode. It is a kludge to work around how float/complex
822 ??? arguments are passed on 32-bit Sparc and should be fixed. */
823 if (! HARD_REGNO_MODE_OK (final_regno, mode)
824 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
827 /* integrate.c can't handle parts of a return value register. */
828 if ((! REG_FUNCTION_VALUE_P (x)
829 || ! rtx_equal_function_value_matters)
830 #ifdef CLASS_CANNOT_CHANGE_MODE
831 && ! (CLASS_CANNOT_CHANGE_MODE_P (mode, GET_MODE (x))
832 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
833 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
834 && (TEST_HARD_REG_BIT
835 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
838 /* We want to keep the stack, frame, and arg pointers
840 && x != frame_pointer_rtx
841 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
842 && x != arg_pointer_rtx
844 && x != stack_pointer_rtx)
845 return gen_rtx_REG (mode, final_regno);
847 return gen_rtx_SUBREG (mode, x, offset);
849 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
850 from the low-order part of the constant. */
851 else if ((GET_MODE_CLASS (mode) == MODE_INT
852 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
853 && GET_MODE (x) == VOIDmode
854 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
856 /* If MODE is twice the host word size, X is already the desired
857 representation. Otherwise, if MODE is wider than a word, we can't
858 do this. If MODE is exactly a word, return just one CONST_INT. */
860 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
862 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
864 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
865 return (GET_CODE (x) == CONST_INT ? x
866 : GEN_INT (CONST_DOUBLE_LOW (x)));
869 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
870 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
871 : CONST_DOUBLE_LOW (x));
873 /* Sign extend to HOST_WIDE_INT. */
874 val = trunc_int_for_mode (val, mode);
876 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
881 #ifndef REAL_ARITHMETIC
882 /* If X is an integral constant but we want it in floating-point, it
883 must be the case that we have a union of an integer and a floating-point
884 value. If the machine-parameters allow it, simulate that union here
885 and return the result. The two-word and single-word cases are
888 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
889 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
890 || flag_pretend_float)
891 && GET_MODE_CLASS (mode) == MODE_FLOAT
892 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
893 && GET_CODE (x) == CONST_INT
894 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
896 union {HOST_WIDE_INT i; float d; } u;
899 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
901 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
902 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
903 || flag_pretend_float)
904 && GET_MODE_CLASS (mode) == MODE_FLOAT
905 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
906 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
907 && GET_MODE (x) == VOIDmode
908 && (sizeof (double) * HOST_BITS_PER_CHAR
909 == 2 * HOST_BITS_PER_WIDE_INT))
911 union {HOST_WIDE_INT i[2]; double d; } u;
912 HOST_WIDE_INT low, high;
914 if (GET_CODE (x) == CONST_INT)
915 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
917 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
919 #ifdef HOST_WORDS_BIG_ENDIAN
920 u.i[0] = high, u.i[1] = low;
922 u.i[0] = low, u.i[1] = high;
925 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
928 /* Similarly, if this is converting a floating-point value into a
929 single-word integer. Only do this is the host and target parameters are
932 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
933 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
934 || flag_pretend_float)
935 && (GET_MODE_CLASS (mode) == MODE_INT
936 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
937 && GET_CODE (x) == CONST_DOUBLE
938 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
939 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
940 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
942 /* Similarly, if this is converting a floating-point value into a
943 two-word integer, we can do this one word at a time and make an
944 integer. Only do this is the host and target parameters are
947 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
948 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
949 || flag_pretend_float)
950 && (GET_MODE_CLASS (mode) == MODE_INT
951 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
952 && GET_CODE (x) == CONST_DOUBLE
953 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
954 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
956 rtx lowpart, highpart;
958 lowpart = constant_subword (x,
959 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
961 highpart = constant_subword (x,
962 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
964 if (lowpart && GET_CODE (lowpart) == CONST_INT
965 && highpart && GET_CODE (highpart) == CONST_INT)
966 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
968 #else /* ifndef REAL_ARITHMETIC */
970 /* When we have a FP emulator, we can handle all conversions between
971 FP and integer operands. This simplifies reload because it
972 doesn't have to deal with constructs like (subreg:DI
973 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
975 else if (mode == SFmode
976 && GET_CODE (x) == CONST_INT)
982 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
983 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
985 else if (mode == DFmode
986 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
987 && GET_MODE (x) == VOIDmode)
991 HOST_WIDE_INT low, high;
993 if (GET_CODE (x) == CONST_INT)
996 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1000 low = CONST_DOUBLE_LOW (x);
1001 high = CONST_DOUBLE_HIGH (x);
1004 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1006 if (WORDS_BIG_ENDIAN)
1007 i[0] = high, i[1] = low;
1009 i[0] = low, i[1] = high;
1011 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1012 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1014 else if ((GET_MODE_CLASS (mode) == MODE_INT
1015 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1016 && GET_CODE (x) == CONST_DOUBLE
1017 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1020 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1021 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1023 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1024 switch (GET_MODE (x))
1027 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
1031 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
1033 #if LONG_DOUBLE_TYPE_SIZE == 96
1035 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1039 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1046 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1048 #if HOST_BITS_PER_WIDE_INT == 32
1049 return immed_double_const (i[endian], i[1 - endian], mode);
1054 if (HOST_BITS_PER_WIDE_INT != 64)
1057 for (c = 0; c < 4; c++)
1060 switch (GET_MODE (x))
1064 return immed_double_const (((unsigned long) i[endian]) |
1065 (((HOST_WIDE_INT) i[1-endian]) << 32),
1068 return immed_double_const (((unsigned long) i[endian*3]) |
1069 (((HOST_WIDE_INT) i[1+endian]) << 32),
1070 ((unsigned long) i[2-endian]) |
1071 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1077 #endif /* ifndef REAL_ARITHMETIC */
1079 /* Otherwise, we can't do this. */
1083 /* Return the real part (which has mode MODE) of a complex value X.
1084 This always comes at the low address in memory. */
1087 gen_realpart (mode, x)
1088 enum machine_mode mode;
1091 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
1093 else if (WORDS_BIG_ENDIAN
1094 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1096 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1098 ("Can't access real part of complex value in hard register");
1099 else if (WORDS_BIG_ENDIAN)
1100 return gen_highpart (mode, x);
1102 return gen_lowpart (mode, x);
1105 /* Return the imaginary part (which has mode MODE) of a complex value X.
1106 This always comes at the high address in memory. */
1109 gen_imagpart (mode, x)
1110 enum machine_mode mode;
1113 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
1115 else if (WORDS_BIG_ENDIAN)
1116 return gen_lowpart (mode, x);
1117 else if (! WORDS_BIG_ENDIAN
1118 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1120 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1122 ("can't access imaginary part of complex value in hard register");
1124 return gen_highpart (mode, x);
1127 /* Return 1 iff X, assumed to be a SUBREG,
1128 refers to the real part of the complex value in its containing reg.
1129 Complex values are always stored with the real part in the first word,
1130 regardless of WORDS_BIG_ENDIAN. */
1133 subreg_realpart_p (x)
1136 if (GET_CODE (x) != SUBREG)
1139 return ((unsigned int) SUBREG_BYTE (x)
1140 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1143 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1144 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1145 least-significant part of X.
1146 MODE specifies how big a part of X to return;
1147 it usually should not be larger than a word.
1148 If X is a MEM whose address is a QUEUED, the value may be so also. */
1151 gen_lowpart (mode, x)
1152 enum machine_mode mode;
1155 rtx result = gen_lowpart_common (mode, x);
1159 else if (GET_CODE (x) == REG)
1161 /* Must be a hard reg that's not valid in MODE. */
1162 result = gen_lowpart_common (mode, copy_to_reg (x));
1167 else if (GET_CODE (x) == MEM)
1169 /* The only additional case we can do is MEM. */
1170 register int offset = 0;
1171 if (WORDS_BIG_ENDIAN)
1172 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1173 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1175 if (BYTES_BIG_ENDIAN)
1176 /* Adjust the address so that the address-after-the-data
1178 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1179 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1181 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1183 else if (GET_CODE (x) == ADDRESSOF)
1184 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1189 /* Like `gen_lowpart', but refer to the most significant part.
1190 This is used to access the imaginary part of a complex number. */
1193 gen_highpart (mode, x)
1194 enum machine_mode mode;
1197 unsigned int msize = GET_MODE_SIZE (mode);
1198 unsigned int xsize = GET_MODE_SIZE (GET_MODE (x));
1200 /* This case loses if X is a subreg. To catch bugs early,
1201 complain if an invalid MODE is used even in other cases. */
1202 if (msize > UNITS_PER_WORD
1203 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1205 if (GET_CODE (x) == CONST_DOUBLE
1206 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1207 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1210 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1211 else if (GET_CODE (x) == CONST_INT)
1213 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1215 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1217 else if (GET_CODE (x) == MEM)
1219 register int offset = 0;
1221 if (! WORDS_BIG_ENDIAN)
1222 offset = (MAX (xsize, UNITS_PER_WORD)
1223 - MAX (msize, UNITS_PER_WORD));
1225 if (! BYTES_BIG_ENDIAN
1226 && msize < UNITS_PER_WORD)
1227 offset -= (msize - MIN (UNITS_PER_WORD, xsize));
1229 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1231 else if (GET_CODE (x) == SUBREG)
1233 /* The only time this should occur is when we are looking at a
1234 multi-word item with a SUBREG whose mode is the same as that of the
1235 item. It isn't clear what we would do if it wasn't. */
1236 if (SUBREG_BYTE (x) != 0)
1238 return gen_highpart (mode, SUBREG_REG (x));
1240 else if (GET_CODE (x) == REG)
1244 if (GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (mode))
1247 if ((! WORDS_BIG_ENDIAN || ! BYTES_BIG_ENDIAN)
1250 int difference = xsize - msize;
1252 if (! WORDS_BIG_ENDIAN)
1253 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1254 if (! BYTES_BIG_ENDIAN)
1255 offset += difference % UNITS_PER_WORD;
1257 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1259 int final_regno = REGNO (x) +
1260 subreg_regno_offset (REGNO (x), GET_MODE (x), offset, mode);
1262 /* integrate.c can't handle parts of a return value register.
1263 ??? Then integrate.c should be fixed!
1264 ??? What about CLASS_CANNOT_CHANGE_SIZE? */
1265 if ((! REG_FUNCTION_VALUE_P (x)
1266 || ! rtx_equal_function_value_matters)
1267 /* We want to keep the stack, frame, and arg pointers special. */
1268 && x != frame_pointer_rtx
1269 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1270 && x != arg_pointer_rtx
1272 && x != stack_pointer_rtx)
1273 return gen_rtx_REG (mode, final_regno);
1275 /* Just generate a normal SUBREG. */
1276 return gen_rtx_SUBREG (mode, x, offset);
1282 /* Return 1 iff X, assumed to be a SUBREG,
1283 refers to the least significant part of its containing reg.
1284 If X is not a SUBREG, always return 1 (it is its own low part!). */
1287 subreg_lowpart_p (x)
1290 unsigned int offset = 0;
1291 int difference = (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1292 - GET_MODE_SIZE (GET_MODE (x)));
1294 if (GET_CODE (x) != SUBREG)
1296 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1301 if (WORDS_BIG_ENDIAN)
1302 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1303 if (BYTES_BIG_ENDIAN)
1304 offset += difference % UNITS_PER_WORD;
1307 return SUBREG_BYTE (x) == offset;
1311 /* Helper routine for all the constant cases of operand_subword.
1312 Some places invoke this directly. */
1315 constant_subword (op, offset, mode)
1318 enum machine_mode mode;
1320 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1323 /* If OP is already an integer word, return it. */
1324 if (GET_MODE_CLASS (mode) == MODE_INT
1325 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1328 #ifdef REAL_ARITHMETIC
1329 /* The output is some bits, the width of the target machine's word.
1330 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1332 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1333 && GET_MODE_CLASS (mode) == MODE_FLOAT
1334 && GET_MODE_BITSIZE (mode) == 64
1335 && GET_CODE (op) == CONST_DOUBLE)
1340 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1341 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1343 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1344 which the words are written depends on the word endianness.
1345 ??? This is a potential portability problem and should
1346 be fixed at some point.
1348 We must excercise caution with the sign bit. By definition there
1349 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1350 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1351 So we explicitly mask and sign-extend as necessary. */
1352 if (BITS_PER_WORD == 32)
1355 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1356 return GEN_INT (val);
1358 #if HOST_BITS_PER_WIDE_INT >= 64
1359 else if (BITS_PER_WORD >= 64 && offset == 0)
1361 val = k[! WORDS_BIG_ENDIAN];
1362 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1363 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1364 return GEN_INT (val);
1367 else if (BITS_PER_WORD == 16)
1369 val = k[offset >> 1];
1370 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1373 return GEN_INT (val);
1378 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1379 && GET_MODE_CLASS (mode) == MODE_FLOAT
1380 && GET_MODE_BITSIZE (mode) > 64
1381 && GET_CODE (op) == CONST_DOUBLE)
1386 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1387 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1389 if (BITS_PER_WORD == 32)
1392 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1393 return GEN_INT (val);
1395 #if HOST_BITS_PER_WIDE_INT >= 64
1396 else if (BITS_PER_WORD >= 64 && offset <= 1)
1398 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1399 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1400 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1401 return GEN_INT (val);
1407 #else /* no REAL_ARITHMETIC */
1408 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1409 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1410 || flag_pretend_float)
1411 && GET_MODE_CLASS (mode) == MODE_FLOAT
1412 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1413 && GET_CODE (op) == CONST_DOUBLE)
1415 /* The constant is stored in the host's word-ordering,
1416 but we want to access it in the target's word-ordering. Some
1417 compilers don't like a conditional inside macro args, so we have two
1418 copies of the return. */
1419 #ifdef HOST_WORDS_BIG_ENDIAN
1420 return GEN_INT (offset == WORDS_BIG_ENDIAN
1421 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1423 return GEN_INT (offset != WORDS_BIG_ENDIAN
1424 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1427 #endif /* no REAL_ARITHMETIC */
1429 /* Single word float is a little harder, since single- and double-word
1430 values often do not have the same high-order bits. We have already
1431 verified that we want the only defined word of the single-word value. */
1432 #ifdef REAL_ARITHMETIC
1433 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1434 && GET_MODE_BITSIZE (mode) == 32
1435 && GET_CODE (op) == CONST_DOUBLE)
1440 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1441 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1443 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1445 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1447 if (BITS_PER_WORD == 16)
1449 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1454 return GEN_INT (val);
1457 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1458 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1459 || flag_pretend_float)
1460 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1461 && GET_MODE_CLASS (mode) == MODE_FLOAT
1462 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1463 && GET_CODE (op) == CONST_DOUBLE)
1466 union {float f; HOST_WIDE_INT i; } u;
1468 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1471 return GEN_INT (u.i);
1473 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1474 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1475 || flag_pretend_float)
1476 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1477 && GET_MODE_CLASS (mode) == MODE_FLOAT
1478 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1479 && GET_CODE (op) == CONST_DOUBLE)
1482 union {double d; HOST_WIDE_INT i; } u;
1484 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1487 return GEN_INT (u.i);
1489 #endif /* no REAL_ARITHMETIC */
1491 /* The only remaining cases that we can handle are integers.
1492 Convert to proper endianness now since these cases need it.
1493 At this point, offset == 0 means the low-order word.
1495 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1496 in general. However, if OP is (const_int 0), we can just return
1499 if (op == const0_rtx)
1502 if (GET_MODE_CLASS (mode) != MODE_INT
1503 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1504 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1507 if (WORDS_BIG_ENDIAN)
1508 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1510 /* Find out which word on the host machine this value is in and get
1511 it from the constant. */
1512 val = (offset / size_ratio == 0
1513 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1514 : (GET_CODE (op) == CONST_INT
1515 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1517 /* Get the value we want into the low bits of val. */
1518 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1519 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1521 val = trunc_int_for_mode (val, word_mode);
1523 return GEN_INT (val);
1526 /* Return subword OFFSET of operand OP.
1527 The word number, OFFSET, is interpreted as the word number starting
1528 at the low-order address. OFFSET 0 is the low-order word if not
1529 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1531 If we cannot extract the required word, we return zero. Otherwise,
1532 an rtx corresponding to the requested word will be returned.
1534 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1535 reload has completed, a valid address will always be returned. After
1536 reload, if a valid address cannot be returned, we return zero.
1538 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1539 it is the responsibility of the caller.
1541 MODE is the mode of OP in case it is a CONST_INT.
1543 ??? This is still rather broken for some cases. The problem for the
1544 moment is that all callers of this thing provide no 'goal mode' to
1545 tell us to work with. This exists because all callers were written
1546 in a word based SUBREG world. */
1549 operand_subword (op, offset, validate_address, mode)
1551 unsigned int offset;
1552 int validate_address;
1553 enum machine_mode mode;
1555 if (mode == VOIDmode)
1556 mode = GET_MODE (op);
1558 if (mode == VOIDmode)
1561 /* If OP is narrower than a word, fail. */
1563 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1566 /* If we want a word outside OP, return zero. */
1568 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1571 switch (GET_CODE (op))
1580 /* The only remaining cases are when OP is a constant. If the host and
1581 target floating formats are the same, handling two-word floating
1582 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1583 are defined as returning one or two 32 bit values, respectively,
1584 and not values of BITS_PER_WORD bits. */
1585 return constant_subword (op, offset, mode);
1588 /* If OP is already an integer word, return it. */
1589 if (GET_MODE_CLASS (mode) == MODE_INT
1590 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1593 /* If OP is a REG or SUBREG, we can handle it very simply. */
1594 if (GET_CODE (op) == REG)
1596 if (REGNO (op) < FIRST_PSEUDO_REGISTER)
1598 int final_regno = REGNO (op) +
1599 subreg_regno_offset (REGNO (op), GET_MODE (op),
1600 offset * UNITS_PER_WORD,
1603 /* If the register is not valid for MODE, return 0. If we don't
1604 do this, there is no way to fix up the resulting REG later. */
1605 if (! HARD_REGNO_MODE_OK (final_regno, word_mode))
1608 /* integrate.c can't handle parts of a return value register.
1609 ??? Then integrate.c should be fixed!
1610 ??? What about CLASS_CANNOT_CHANGE_SIZE? */
1611 if ((! REG_FUNCTION_VALUE_P (op)
1612 || ! rtx_equal_function_value_matters)
1613 /* ??? What about CLASS_CANNOT_CHANGE_SIZE? */
1614 /* We want to keep the stack, frame, and arg pointers
1616 && op != frame_pointer_rtx
1617 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1618 && op != arg_pointer_rtx
1620 && op != stack_pointer_rtx)
1621 return gen_rtx_REG (word_mode, final_regno);
1624 /* Just return a normal SUBREG. */
1625 return gen_rtx_SUBREG (word_mode, op,
1626 (offset * UNITS_PER_WORD));
1628 else if (GET_CODE (op) == SUBREG)
1630 int final_offset = ((offset * UNITS_PER_WORD) + SUBREG_BYTE (op));
1632 /* When working with SUBREGs the rule is that the byte
1633 offset must be a multiple of the SUBREG's mode. */
1634 final_offset = (final_offset / GET_MODE_SIZE (word_mode));
1635 final_offset = (final_offset * GET_MODE_SIZE (word_mode));
1636 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), final_offset);
1638 else if (GET_CODE (op) == CONCAT)
1640 unsigned int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1641 if (offset < partwords)
1642 return operand_subword (XEXP (op, 0), offset, validate_address, mode);
1643 return operand_subword (XEXP (op, 1), offset - partwords,
1644 validate_address, mode);
1647 /* Form a new MEM at the requested address. */
1648 if (GET_CODE (op) == MEM)
1650 rtx addr = plus_constant (XEXP (op, 0), (offset * UNITS_PER_WORD));
1653 if (validate_address)
1655 if (reload_completed)
1657 if (! strict_memory_address_p (word_mode, addr))
1661 addr = memory_address (word_mode, addr);
1664 new = gen_rtx_MEM (word_mode, addr);
1665 MEM_COPY_ATTRIBUTES (new, op);
1669 /* Unreachable... (famous last words) */
1673 /* Similar to `operand_subword', but never return 0. If we can't extract
1674 the required subword, put OP into a register and try again. If that fails,
1675 abort. We always validate the address in this case.
1677 MODE is the mode of OP, in case it is CONST_INT. */
1680 operand_subword_force (op, offset, mode)
1682 unsigned int offset;
1683 enum machine_mode mode;
1685 rtx result = operand_subword (op, offset, 1, mode);
1690 if (mode != BLKmode && mode != VOIDmode)
1692 /* If this is a register which can not be accessed by words, copy it
1693 to a pseudo register. */
1694 if (GET_CODE (op) == REG)
1695 op = copy_to_reg (op);
1697 op = force_reg (mode, op);
1700 result = operand_subword (op, offset, 1, mode);
1707 /* Given a compare instruction, swap the operands.
1708 A test instruction is changed into a compare of 0 against the operand. */
1711 reverse_comparison (insn)
1714 rtx body = PATTERN (insn);
1717 if (GET_CODE (body) == SET)
1718 comp = SET_SRC (body);
1720 comp = SET_SRC (XVECEXP (body, 0, 0));
1722 if (GET_CODE (comp) == COMPARE)
1724 rtx op0 = XEXP (comp, 0);
1725 rtx op1 = XEXP (comp, 1);
1726 XEXP (comp, 0) = op1;
1727 XEXP (comp, 1) = op0;
1731 rtx new = gen_rtx_COMPARE (VOIDmode,
1732 CONST0_RTX (GET_MODE (comp)), comp);
1733 if (GET_CODE (body) == SET)
1734 SET_SRC (body) = new;
1736 SET_SRC (XVECEXP (body, 0, 0)) = new;
1740 /* Return a memory reference like MEMREF, but with its mode changed
1741 to MODE and its address changed to ADDR.
1742 (VOIDmode means don't change the mode.
1743 NULL for ADDR means don't change the address.) */
1746 change_address (memref, mode, addr)
1748 enum machine_mode mode;
1753 if (GET_CODE (memref) != MEM)
1755 if (mode == VOIDmode)
1756 mode = GET_MODE (memref);
1758 addr = XEXP (memref, 0);
1760 /* If reload is in progress or has completed, ADDR must be valid.
1761 Otherwise, we can call memory_address to make it valid. */
1762 if (reload_completed || reload_in_progress)
1764 if (! memory_address_p (mode, addr))
1768 addr = memory_address (mode, addr);
1770 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1773 new = gen_rtx_MEM (mode, addr);
1774 MEM_COPY_ATTRIBUTES (new, memref);
1778 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1785 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1786 NULL_RTX, label_num++, NULL_PTR, NULL_PTR);
1788 LABEL_NUSES (label) = 0;
1789 LABEL_ALTERNATE_NAME (label) = NULL;
1793 /* For procedure integration. */
1795 /* Install new pointers to the first and last insns in the chain.
1796 Also, set cur_insn_uid to one higher than the last in use.
1797 Used for an inline-procedure after copying the insn chain. */
1800 set_new_first_and_last_insn (first, last)
1809 for (insn = first; insn; insn = NEXT_INSN (insn))
1810 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1815 /* Set the range of label numbers found in the current function.
1816 This is used when belatedly compiling an inline function. */
1819 set_new_first_and_last_label_num (first, last)
1822 base_label_num = label_num;
1823 first_label_num = first;
1824 last_label_num = last;
1827 /* Set the last label number found in the current function.
1828 This is used when belatedly compiling an inline function. */
1831 set_new_last_label_num (last)
1834 base_label_num = label_num;
1835 last_label_num = last;
1838 /* Restore all variables describing the current status from the structure *P.
1839 This is used after a nested function. */
1842 restore_emit_status (p)
1843 struct function *p ATTRIBUTE_UNUSED;
1846 clear_emit_caches ();
1849 /* Clear out all parts of the state in F that can safely be discarded
1850 after the function has been compiled, to let garbage collection
1851 reclaim the memory. */
1854 free_emit_status (f)
1857 free (f->emit->x_regno_reg_rtx);
1858 free (f->emit->regno_pointer_align);
1863 /* Go through all the RTL insn bodies and copy any invalid shared
1864 structure. This routine should only be called once. */
1867 unshare_all_rtl (fndecl, insn)
1873 /* Make sure that virtual parameters are not shared. */
1874 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1875 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
1877 /* Make sure that virtual stack slots are not shared. */
1878 unshare_all_decls (DECL_INITIAL (fndecl));
1880 /* Unshare just about everything else. */
1881 unshare_all_rtl_1 (insn);
1883 /* Make sure the addresses of stack slots found outside the insn chain
1884 (such as, in DECL_RTL of a variable) are not shared
1885 with the insn chain.
1887 This special care is necessary when the stack slot MEM does not
1888 actually appear in the insn chain. If it does appear, its address
1889 is unshared from all else at that point. */
1890 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1893 /* Go through all the RTL insn bodies and copy any invalid shared
1894 structure, again. This is a fairly expensive thing to do so it
1895 should be done sparingly. */
1898 unshare_all_rtl_again (insn)
1904 for (p = insn; p; p = NEXT_INSN (p))
1907 reset_used_flags (PATTERN (p));
1908 reset_used_flags (REG_NOTES (p));
1909 reset_used_flags (LOG_LINKS (p));
1912 /* Make sure that virtual stack slots are not shared. */
1913 reset_used_decls (DECL_INITIAL (cfun->decl));
1915 /* Make sure that virtual parameters are not shared. */
1916 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1917 reset_used_flags (DECL_RTL (decl));
1919 reset_used_flags (stack_slot_list);
1921 unshare_all_rtl (cfun->decl, insn);
1924 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1925 Assumes the mark bits are cleared at entry. */
1928 unshare_all_rtl_1 (insn)
1931 for (; insn; insn = NEXT_INSN (insn))
1934 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1935 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1936 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1940 /* Go through all virtual stack slots of a function and copy any
1941 shared structure. */
1943 unshare_all_decls (blk)
1948 /* Copy shared decls. */
1949 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1950 if (DECL_RTL_SET_P (t))
1951 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
1953 /* Now process sub-blocks. */
1954 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1955 unshare_all_decls (t);
1958 /* Go through all virtual stack slots of a function and mark them as
1961 reset_used_decls (blk)
1967 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1968 if (DECL_RTL_SET_P (t))
1969 reset_used_flags (DECL_RTL (t));
1971 /* Now process sub-blocks. */
1972 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1973 reset_used_decls (t);
1976 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1977 Recursively does the same for subexpressions. */
1980 copy_rtx_if_shared (orig)
1983 register rtx x = orig;
1985 register enum rtx_code code;
1986 register const char *format_ptr;
1992 code = GET_CODE (x);
1994 /* These types may be freely shared. */
2007 /* SCRATCH must be shared because they represent distinct values. */
2011 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2012 a LABEL_REF, it isn't sharable. */
2013 if (GET_CODE (XEXP (x, 0)) == PLUS
2014 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2015 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2024 /* The chain of insns is not being copied. */
2028 /* A MEM is allowed to be shared if its address is constant.
2030 We used to allow sharing of MEMs which referenced
2031 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2032 that can lose. instantiate_virtual_regs will not unshare
2033 the MEMs, and combine may change the structure of the address
2034 because it looks safe and profitable in one context, but
2035 in some other context it creates unrecognizable RTL. */
2036 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2045 /* This rtx may not be shared. If it has already been seen,
2046 replace it with a copy of itself. */
2052 copy = rtx_alloc (code);
2054 (sizeof (*copy) - sizeof (copy->fld)
2055 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2061 /* Now scan the subexpressions recursively.
2062 We can store any replaced subexpressions directly into X
2063 since we know X is not shared! Any vectors in X
2064 must be copied if X was copied. */
2066 format_ptr = GET_RTX_FORMAT (code);
2068 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2070 switch (*format_ptr++)
2073 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2077 if (XVEC (x, i) != NULL)
2080 int len = XVECLEN (x, i);
2082 if (copied && len > 0)
2083 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2084 for (j = 0; j < len; j++)
2085 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2093 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2094 to look for shared sub-parts. */
2097 reset_used_flags (x)
2101 register enum rtx_code code;
2102 register const char *format_ptr;
2107 code = GET_CODE (x);
2109 /* These types may be freely shared so we needn't do any resetting
2130 /* The chain of insns is not being copied. */
2139 format_ptr = GET_RTX_FORMAT (code);
2140 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2142 switch (*format_ptr++)
2145 reset_used_flags (XEXP (x, i));
2149 for (j = 0; j < XVECLEN (x, i); j++)
2150 reset_used_flags (XVECEXP (x, i, j));
2156 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2157 Return X or the rtx for the pseudo reg the value of X was copied into.
2158 OTHER must be valid as a SET_DEST. */
2161 make_safe_from (x, other)
2165 switch (GET_CODE (other))
2168 other = SUBREG_REG (other);
2170 case STRICT_LOW_PART:
2173 other = XEXP (other, 0);
2179 if ((GET_CODE (other) == MEM
2181 && GET_CODE (x) != REG
2182 && GET_CODE (x) != SUBREG)
2183 || (GET_CODE (other) == REG
2184 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2185 || reg_mentioned_p (other, x))))
2187 rtx temp = gen_reg_rtx (GET_MODE (x));
2188 emit_move_insn (temp, x);
2194 /* Emission of insns (adding them to the doubly-linked list). */
2196 /* Return the first insn of the current sequence or current function. */
2204 /* Return the last insn emitted in current sequence or current function. */
2212 /* Specify a new insn as the last in the chain. */
2215 set_last_insn (insn)
2218 if (NEXT_INSN (insn) != 0)
2223 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2226 get_last_insn_anywhere ()
2228 struct sequence_stack *stack;
2231 for (stack = seq_stack; stack; stack = stack->next)
2232 if (stack->last != 0)
2237 /* Return a number larger than any instruction's uid in this function. */
2242 return cur_insn_uid;
2245 /* Renumber instructions so that no instruction UIDs are wasted. */
2248 renumber_insns (stream)
2253 /* If we're not supposed to renumber instructions, don't. */
2254 if (!flag_renumber_insns)
2257 /* If there aren't that many instructions, then it's not really
2258 worth renumbering them. */
2259 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2264 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2267 fprintf (stream, "Renumbering insn %d to %d\n",
2268 INSN_UID (insn), cur_insn_uid);
2269 INSN_UID (insn) = cur_insn_uid++;
2273 /* Return the next insn. If it is a SEQUENCE, return the first insn
2282 insn = NEXT_INSN (insn);
2283 if (insn && GET_CODE (insn) == INSN
2284 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2285 insn = XVECEXP (PATTERN (insn), 0, 0);
2291 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2295 previous_insn (insn)
2300 insn = PREV_INSN (insn);
2301 if (insn && GET_CODE (insn) == INSN
2302 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2303 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2309 /* Return the next insn after INSN that is not a NOTE. This routine does not
2310 look inside SEQUENCEs. */
2313 next_nonnote_insn (insn)
2318 insn = NEXT_INSN (insn);
2319 if (insn == 0 || GET_CODE (insn) != NOTE)
2326 /* Return the previous insn before INSN that is not a NOTE. This routine does
2327 not look inside SEQUENCEs. */
2330 prev_nonnote_insn (insn)
2335 insn = PREV_INSN (insn);
2336 if (insn == 0 || GET_CODE (insn) != NOTE)
2343 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2344 or 0, if there is none. This routine does not look inside
2348 next_real_insn (insn)
2353 insn = NEXT_INSN (insn);
2354 if (insn == 0 || GET_CODE (insn) == INSN
2355 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2362 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2363 or 0, if there is none. This routine does not look inside
2367 prev_real_insn (insn)
2372 insn = PREV_INSN (insn);
2373 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2374 || GET_CODE (insn) == JUMP_INSN)
2381 /* Find the next insn after INSN that really does something. This routine
2382 does not look inside SEQUENCEs. Until reload has completed, this is the
2383 same as next_real_insn. */
2386 active_insn_p (insn)
2389 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2390 || (GET_CODE (insn) == INSN
2391 && (! reload_completed
2392 || (GET_CODE (PATTERN (insn)) != USE
2393 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2397 next_active_insn (insn)
2402 insn = NEXT_INSN (insn);
2403 if (insn == 0 || active_insn_p (insn))
2410 /* Find the last insn before INSN that really does something. This routine
2411 does not look inside SEQUENCEs. Until reload has completed, this is the
2412 same as prev_real_insn. */
2415 prev_active_insn (insn)
2420 insn = PREV_INSN (insn);
2421 if (insn == 0 || active_insn_p (insn))
2428 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2436 insn = NEXT_INSN (insn);
2437 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2444 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2452 insn = PREV_INSN (insn);
2453 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2461 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2462 and REG_CC_USER notes so we can find it. */
2465 link_cc0_insns (insn)
2468 rtx user = next_nonnote_insn (insn);
2470 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2471 user = XVECEXP (PATTERN (user), 0, 0);
2473 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2475 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2478 /* Return the next insn that uses CC0 after INSN, which is assumed to
2479 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2480 applied to the result of this function should yield INSN).
2482 Normally, this is simply the next insn. However, if a REG_CC_USER note
2483 is present, it contains the insn that uses CC0.
2485 Return 0 if we can't find the insn. */
2488 next_cc0_user (insn)
2491 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2494 return XEXP (note, 0);
2496 insn = next_nonnote_insn (insn);
2497 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2498 insn = XVECEXP (PATTERN (insn), 0, 0);
2500 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2506 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2507 note, it is the previous insn. */
2510 prev_cc0_setter (insn)
2513 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2516 return XEXP (note, 0);
2518 insn = prev_nonnote_insn (insn);
2519 if (! sets_cc0_p (PATTERN (insn)))
2526 /* Increment the label uses for all labels present in rtx. */
2532 register enum rtx_code code;
2534 register const char *fmt;
2536 code = GET_CODE (x);
2537 if (code == LABEL_REF)
2538 LABEL_NUSES (XEXP (x, 0))++;
2540 fmt = GET_RTX_FORMAT (code);
2541 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2544 mark_label_nuses (XEXP (x, i));
2545 else if (fmt[i] == 'E')
2546 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2547 mark_label_nuses (XVECEXP (x, i, j));
2552 /* Try splitting insns that can be split for better scheduling.
2553 PAT is the pattern which might split.
2554 TRIAL is the insn providing PAT.
2555 LAST is non-zero if we should return the last insn of the sequence produced.
2557 If this routine succeeds in splitting, it returns the first or last
2558 replacement insn depending on the value of LAST. Otherwise, it
2559 returns TRIAL. If the insn to be returned can be split, it will be. */
2562 try_split (pat, trial, last)
2566 rtx before = PREV_INSN (trial);
2567 rtx after = NEXT_INSN (trial);
2568 rtx seq = split_insns (pat, trial);
2569 int has_barrier = 0;
2572 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2573 We may need to handle this specially. */
2574 if (after && GET_CODE (after) == BARRIER)
2577 after = NEXT_INSN (after);
2582 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2583 The latter case will normally arise only when being done so that
2584 it, in turn, will be split (SFmode on the 29k is an example). */
2585 if (GET_CODE (seq) == SEQUENCE)
2589 /* Avoid infinite loop if any insn of the result matches
2590 the original pattern. */
2591 for (i = 0; i < XVECLEN (seq, 0); i++)
2592 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2593 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2597 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2598 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2599 mark_jump_label (PATTERN (XVECEXP (seq, 0, i)),
2600 XVECEXP (seq, 0, i), 0, 0);
2602 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2603 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2604 if (GET_CODE (trial) == CALL_INSN)
2605 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2606 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2607 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2608 = CALL_INSN_FUNCTION_USAGE (trial);
2610 /* If there are LABELS inside the split insns increment the
2611 usage count so we don't delete the label. */
2612 if (GET_CODE (trial) == INSN)
2613 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2614 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2615 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2617 tem = emit_insn_after (seq, before);
2619 delete_insn (trial);
2621 emit_barrier_after (tem);
2623 /* Recursively call try_split for each new insn created; by the
2624 time control returns here that insn will be fully split, so
2625 set LAST and continue from the insn after the one returned.
2626 We can't use next_active_insn here since AFTER may be a note.
2627 Ignore deleted insns, which can be occur if not optimizing. */
2628 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2629 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2630 tem = try_split (PATTERN (tem), tem, 1);
2632 /* Avoid infinite loop if the result matches the original pattern. */
2633 else if (rtx_equal_p (seq, pat))
2637 PATTERN (trial) = seq;
2638 INSN_CODE (trial) = -1;
2639 try_split (seq, trial, last);
2642 /* Return either the first or the last insn, depending on which was
2645 ? (after ? prev_active_insn (after) : last_insn)
2646 : next_active_insn (before);
2652 /* Make and return an INSN rtx, initializing all its slots.
2653 Store PATTERN in the pattern slots. */
2656 make_insn_raw (pattern)
2661 insn = rtx_alloc (INSN);
2663 INSN_UID (insn) = cur_insn_uid++;
2664 PATTERN (insn) = pattern;
2665 INSN_CODE (insn) = -1;
2666 LOG_LINKS (insn) = NULL;
2667 REG_NOTES (insn) = NULL;
2669 #ifdef ENABLE_RTL_CHECKING
2672 && (returnjump_p (insn)
2673 || (GET_CODE (insn) == SET
2674 && SET_DEST (insn) == pc_rtx)))
2676 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2684 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2687 make_jump_insn_raw (pattern)
2692 insn = rtx_alloc (JUMP_INSN);
2693 INSN_UID (insn) = cur_insn_uid++;
2695 PATTERN (insn) = pattern;
2696 INSN_CODE (insn) = -1;
2697 LOG_LINKS (insn) = NULL;
2698 REG_NOTES (insn) = NULL;
2699 JUMP_LABEL (insn) = NULL;
2704 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2707 make_call_insn_raw (pattern)
2712 insn = rtx_alloc (CALL_INSN);
2713 INSN_UID (insn) = cur_insn_uid++;
2715 PATTERN (insn) = pattern;
2716 INSN_CODE (insn) = -1;
2717 LOG_LINKS (insn) = NULL;
2718 REG_NOTES (insn) = NULL;
2719 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2724 /* Add INSN to the end of the doubly-linked list.
2725 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2731 PREV_INSN (insn) = last_insn;
2732 NEXT_INSN (insn) = 0;
2734 if (NULL != last_insn)
2735 NEXT_INSN (last_insn) = insn;
2737 if (NULL == first_insn)
2743 /* Add INSN into the doubly-linked list after insn AFTER. This and
2744 the next should be the only functions called to insert an insn once
2745 delay slots have been filled since only they know how to update a
2749 add_insn_after (insn, after)
2752 rtx next = NEXT_INSN (after);
2754 if (optimize && INSN_DELETED_P (after))
2757 NEXT_INSN (insn) = next;
2758 PREV_INSN (insn) = after;
2762 PREV_INSN (next) = insn;
2763 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2764 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2766 else if (last_insn == after)
2770 struct sequence_stack *stack = seq_stack;
2771 /* Scan all pending sequences too. */
2772 for (; stack; stack = stack->next)
2773 if (after == stack->last)
2783 NEXT_INSN (after) = insn;
2784 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2786 rtx sequence = PATTERN (after);
2787 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2791 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2792 the previous should be the only functions called to insert an insn once
2793 delay slots have been filled since only they know how to update a
2797 add_insn_before (insn, before)
2800 rtx prev = PREV_INSN (before);
2802 if (optimize && INSN_DELETED_P (before))
2805 PREV_INSN (insn) = prev;
2806 NEXT_INSN (insn) = before;
2810 NEXT_INSN (prev) = insn;
2811 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2813 rtx sequence = PATTERN (prev);
2814 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2817 else if (first_insn == before)
2821 struct sequence_stack *stack = seq_stack;
2822 /* Scan all pending sequences too. */
2823 for (; stack; stack = stack->next)
2824 if (before == stack->first)
2826 stack->first = insn;
2834 PREV_INSN (before) = insn;
2835 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2836 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2839 /* Remove an insn from its doubly-linked list. This function knows how
2840 to handle sequences. */
2845 rtx next = NEXT_INSN (insn);
2846 rtx prev = PREV_INSN (insn);
2849 NEXT_INSN (prev) = next;
2850 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2852 rtx sequence = PATTERN (prev);
2853 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2856 else if (first_insn == insn)
2860 struct sequence_stack *stack = seq_stack;
2861 /* Scan all pending sequences too. */
2862 for (; stack; stack = stack->next)
2863 if (insn == stack->first)
2865 stack->first = next;
2875 PREV_INSN (next) = prev;
2876 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2877 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2879 else if (last_insn == insn)
2883 struct sequence_stack *stack = seq_stack;
2884 /* Scan all pending sequences too. */
2885 for (; stack; stack = stack->next)
2886 if (insn == stack->last)
2897 /* Delete all insns made since FROM.
2898 FROM becomes the new last instruction. */
2901 delete_insns_since (from)
2907 NEXT_INSN (from) = 0;
2911 /* This function is deprecated, please use sequences instead.
2913 Move a consecutive bunch of insns to a different place in the chain.
2914 The insns to be moved are those between FROM and TO.
2915 They are moved to a new position after the insn AFTER.
2916 AFTER must not be FROM or TO or any insn in between.
2918 This function does not know about SEQUENCEs and hence should not be
2919 called after delay-slot filling has been done. */
2922 reorder_insns (from, to, after)
2923 rtx from, to, after;
2925 /* Splice this bunch out of where it is now. */
2926 if (PREV_INSN (from))
2927 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2929 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2930 if (last_insn == to)
2931 last_insn = PREV_INSN (from);
2932 if (first_insn == from)
2933 first_insn = NEXT_INSN (to);
2935 /* Make the new neighbors point to it and it to them. */
2936 if (NEXT_INSN (after))
2937 PREV_INSN (NEXT_INSN (after)) = to;
2939 NEXT_INSN (to) = NEXT_INSN (after);
2940 PREV_INSN (from) = after;
2941 NEXT_INSN (after) = from;
2942 if (after == last_insn)
2946 /* Return the line note insn preceding INSN. */
2949 find_line_note (insn)
2952 if (no_line_numbers)
2955 for (; insn; insn = PREV_INSN (insn))
2956 if (GET_CODE (insn) == NOTE
2957 && NOTE_LINE_NUMBER (insn) >= 0)
2963 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2964 of the moved insns when debugging. This may insert a note between AFTER
2965 and FROM, and another one after TO. */
2968 reorder_insns_with_line_notes (from, to, after)
2969 rtx from, to, after;
2971 rtx from_line = find_line_note (from);
2972 rtx after_line = find_line_note (after);
2974 reorder_insns (from, to, after);
2976 if (from_line == after_line)
2980 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2981 NOTE_LINE_NUMBER (from_line),
2984 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2985 NOTE_LINE_NUMBER (after_line),
2989 /* Remove unnecessary notes from the instruction stream. */
2992 remove_unnecessary_notes ()
2994 rtx block_stack = NULL_RTX;
2995 rtx eh_stack = NULL_RTX;
3000 /* We must not remove the first instruction in the function because
3001 the compiler depends on the first instruction being a note. */
3002 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3004 /* Remember what's next. */
3005 next = NEXT_INSN (insn);
3007 /* We're only interested in notes. */
3008 if (GET_CODE (insn) != NOTE)
3011 switch (NOTE_LINE_NUMBER (insn))
3013 case NOTE_INSN_DELETED:
3017 case NOTE_INSN_EH_REGION_BEG:
3018 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3021 case NOTE_INSN_EH_REGION_END:
3022 /* Too many end notes. */
3023 if (eh_stack == NULL_RTX)
3025 /* Mismatched nesting. */
3026 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3029 eh_stack = XEXP (eh_stack, 1);
3030 free_INSN_LIST_node (tmp);
3033 case NOTE_INSN_BLOCK_BEG:
3034 /* By now, all notes indicating lexical blocks should have
3035 NOTE_BLOCK filled in. */
3036 if (NOTE_BLOCK (insn) == NULL_TREE)
3038 block_stack = alloc_INSN_LIST (insn, block_stack);
3041 case NOTE_INSN_BLOCK_END:
3042 /* Too many end notes. */
3043 if (block_stack == NULL_RTX)
3045 /* Mismatched nesting. */
3046 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3049 block_stack = XEXP (block_stack, 1);
3050 free_INSN_LIST_node (tmp);
3052 /* Scan back to see if there are any non-note instructions
3053 between INSN and the beginning of this block. If not,
3054 then there is no PC range in the generated code that will
3055 actually be in this block, so there's no point in
3056 remembering the existence of the block. */
3057 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3059 /* This block contains a real instruction. Note that we
3060 don't include labels; if the only thing in the block
3061 is a label, then there are still no PC values that
3062 lie within the block. */
3066 /* We're only interested in NOTEs. */
3067 if (GET_CODE (tmp) != NOTE)
3070 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3072 /* We just verified that this BLOCK matches us
3073 with the block_stack check above. */
3074 if (debug_ignore_block (NOTE_BLOCK (insn)))
3081 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3082 /* There's a nested block. We need to leave the
3083 current block in place since otherwise the debugger
3084 wouldn't be able to show symbols from our block in
3085 the nested block. */
3091 /* Too many begin notes. */
3092 if (block_stack || eh_stack)
3097 /* Emit an insn of given code and pattern
3098 at a specified place within the doubly-linked list. */
3100 /* Make an instruction with body PATTERN
3101 and output it before the instruction BEFORE. */
3104 emit_insn_before (pattern, before)
3105 register rtx pattern, before;
3107 register rtx insn = before;
3109 if (GET_CODE (pattern) == SEQUENCE)
3113 for (i = 0; i < XVECLEN (pattern, 0); i++)
3115 insn = XVECEXP (pattern, 0, i);
3116 add_insn_before (insn, before);
3121 insn = make_insn_raw (pattern);
3122 add_insn_before (insn, before);
3128 /* Similar to emit_insn_before, but update basic block boundaries as well. */
3131 emit_block_insn_before (pattern, before, block)
3132 rtx pattern, before;
3135 rtx prev = PREV_INSN (before);
3136 rtx r = emit_insn_before (pattern, before);
3137 if (block && block->head == before)
3138 block->head = NEXT_INSN (prev);
3142 /* Make an instruction with body PATTERN and code JUMP_INSN
3143 and output it before the instruction BEFORE. */
3146 emit_jump_insn_before (pattern, before)
3147 register rtx pattern, before;
3151 if (GET_CODE (pattern) == SEQUENCE)
3152 insn = emit_insn_before (pattern, before);
3155 insn = make_jump_insn_raw (pattern);
3156 add_insn_before (insn, before);
3162 /* Make an instruction with body PATTERN and code CALL_INSN
3163 and output it before the instruction BEFORE. */
3166 emit_call_insn_before (pattern, before)
3167 register rtx pattern, before;
3171 if (GET_CODE (pattern) == SEQUENCE)
3172 insn = emit_insn_before (pattern, before);
3175 insn = make_call_insn_raw (pattern);
3176 add_insn_before (insn, before);
3177 PUT_CODE (insn, CALL_INSN);
3183 /* Make an insn of code BARRIER
3184 and output it before the insn BEFORE. */
3187 emit_barrier_before (before)
3188 register rtx before;
3190 register rtx insn = rtx_alloc (BARRIER);
3192 INSN_UID (insn) = cur_insn_uid++;
3194 add_insn_before (insn, before);
3198 /* Emit the label LABEL before the insn BEFORE. */
3201 emit_label_before (label, before)
3204 /* This can be called twice for the same label as a result of the
3205 confusion that follows a syntax error! So make it harmless. */
3206 if (INSN_UID (label) == 0)
3208 INSN_UID (label) = cur_insn_uid++;
3209 add_insn_before (label, before);
3215 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3218 emit_note_before (subtype, before)
3222 register rtx note = rtx_alloc (NOTE);
3223 INSN_UID (note) = cur_insn_uid++;
3224 NOTE_SOURCE_FILE (note) = 0;
3225 NOTE_LINE_NUMBER (note) = subtype;
3227 add_insn_before (note, before);
3231 /* Make an insn of code INSN with body PATTERN
3232 and output it after the insn AFTER. */
3235 emit_insn_after (pattern, after)
3236 register rtx pattern, after;
3238 register rtx insn = after;
3240 if (GET_CODE (pattern) == SEQUENCE)
3244 for (i = 0; i < XVECLEN (pattern, 0); i++)
3246 insn = XVECEXP (pattern, 0, i);
3247 add_insn_after (insn, after);
3253 insn = make_insn_raw (pattern);
3254 add_insn_after (insn, after);
3260 /* Similar to emit_insn_after, except that line notes are to be inserted so
3261 as to act as if this insn were at FROM. */
3264 emit_insn_after_with_line_notes (pattern, after, from)
3265 rtx pattern, after, from;
3267 rtx from_line = find_line_note (from);
3268 rtx after_line = find_line_note (after);
3269 rtx insn = emit_insn_after (pattern, after);
3272 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3273 NOTE_LINE_NUMBER (from_line),
3277 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3278 NOTE_LINE_NUMBER (after_line),
3282 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3285 emit_block_insn_after (pattern, after, block)
3289 rtx r = emit_insn_after (pattern, after);
3290 if (block && block->end == after)
3295 /* Make an insn of code JUMP_INSN with body PATTERN
3296 and output it after the insn AFTER. */
3299 emit_jump_insn_after (pattern, after)
3300 register rtx pattern, after;
3304 if (GET_CODE (pattern) == SEQUENCE)
3305 insn = emit_insn_after (pattern, after);
3308 insn = make_jump_insn_raw (pattern);
3309 add_insn_after (insn, after);
3315 /* Make an insn of code BARRIER
3316 and output it after the insn AFTER. */
3319 emit_barrier_after (after)
3322 register rtx insn = rtx_alloc (BARRIER);
3324 INSN_UID (insn) = cur_insn_uid++;
3326 add_insn_after (insn, after);
3330 /* Emit the label LABEL after the insn AFTER. */
3333 emit_label_after (label, after)
3336 /* This can be called twice for the same label
3337 as a result of the confusion that follows a syntax error!
3338 So make it harmless. */
3339 if (INSN_UID (label) == 0)
3341 INSN_UID (label) = cur_insn_uid++;
3342 add_insn_after (label, after);
3348 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3351 emit_note_after (subtype, after)
3355 register rtx note = rtx_alloc (NOTE);
3356 INSN_UID (note) = cur_insn_uid++;
3357 NOTE_SOURCE_FILE (note) = 0;
3358 NOTE_LINE_NUMBER (note) = subtype;
3359 add_insn_after (note, after);
3363 /* Emit a line note for FILE and LINE after the insn AFTER. */
3366 emit_line_note_after (file, line, after)
3373 if (no_line_numbers && line > 0)
3379 note = rtx_alloc (NOTE);
3380 INSN_UID (note) = cur_insn_uid++;
3381 NOTE_SOURCE_FILE (note) = file;
3382 NOTE_LINE_NUMBER (note) = line;
3383 add_insn_after (note, after);
3387 /* Make an insn of code INSN with pattern PATTERN
3388 and add it to the end of the doubly-linked list.
3389 If PATTERN is a SEQUENCE, take the elements of it
3390 and emit an insn for each element.
3392 Returns the last insn emitted. */
3398 rtx insn = last_insn;
3400 if (GET_CODE (pattern) == SEQUENCE)
3404 for (i = 0; i < XVECLEN (pattern, 0); i++)
3406 insn = XVECEXP (pattern, 0, i);
3412 insn = make_insn_raw (pattern);
3419 /* Emit the insns in a chain starting with INSN.
3420 Return the last insn emitted. */
3430 rtx next = NEXT_INSN (insn);
3439 /* Emit the insns in a chain starting with INSN and place them in front of
3440 the insn BEFORE. Return the last insn emitted. */
3443 emit_insns_before (insn, before)
3451 rtx next = NEXT_INSN (insn);
3452 add_insn_before (insn, before);
3460 /* Emit the insns in a chain starting with FIRST and place them in back of
3461 the insn AFTER. Return the last insn emitted. */
3464 emit_insns_after (first, after)
3469 register rtx after_after;
3477 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3480 after_after = NEXT_INSN (after);
3482 NEXT_INSN (after) = first;
3483 PREV_INSN (first) = after;
3484 NEXT_INSN (last) = after_after;
3486 PREV_INSN (after_after) = last;
3488 if (after == last_insn)
3493 /* Make an insn of code JUMP_INSN with pattern PATTERN
3494 and add it to the end of the doubly-linked list. */
3497 emit_jump_insn (pattern)
3500 if (GET_CODE (pattern) == SEQUENCE)
3501 return emit_insn (pattern);
3504 register rtx insn = make_jump_insn_raw (pattern);
3510 /* Make an insn of code CALL_INSN with pattern PATTERN
3511 and add it to the end of the doubly-linked list. */
3514 emit_call_insn (pattern)
3517 if (GET_CODE (pattern) == SEQUENCE)
3518 return emit_insn (pattern);
3521 register rtx insn = make_call_insn_raw (pattern);
3523 PUT_CODE (insn, CALL_INSN);
3528 /* Add the label LABEL to the end of the doubly-linked list. */
3534 /* This can be called twice for the same label
3535 as a result of the confusion that follows a syntax error!
3536 So make it harmless. */
3537 if (INSN_UID (label) == 0)
3539 INSN_UID (label) = cur_insn_uid++;
3545 /* Make an insn of code BARRIER
3546 and add it to the end of the doubly-linked list. */
3551 register rtx barrier = rtx_alloc (BARRIER);
3552 INSN_UID (barrier) = cur_insn_uid++;
3557 /* Make an insn of code NOTE
3558 with data-fields specified by FILE and LINE
3559 and add it to the end of the doubly-linked list,
3560 but only if line-numbers are desired for debugging info. */
3563 emit_line_note (file, line)
3567 set_file_and_line_for_stmt (file, line);
3570 if (no_line_numbers)
3574 return emit_note (file, line);
3577 /* Make an insn of code NOTE
3578 with data-fields specified by FILE and LINE
3579 and add it to the end of the doubly-linked list.
3580 If it is a line-number NOTE, omit it if it matches the previous one. */
3583 emit_note (file, line)
3591 if (file && last_filename && !strcmp (file, last_filename)
3592 && line == last_linenum)
3594 last_filename = file;
3595 last_linenum = line;
3598 if (no_line_numbers && line > 0)
3604 note = rtx_alloc (NOTE);
3605 INSN_UID (note) = cur_insn_uid++;
3606 NOTE_SOURCE_FILE (note) = file;
3607 NOTE_LINE_NUMBER (note) = line;
3612 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3615 emit_line_note_force (file, line)
3620 return emit_line_note (file, line);
3623 /* Cause next statement to emit a line note even if the line number
3624 has not changed. This is used at the beginning of a function. */
3627 force_next_line_note ()
3632 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3633 note of this type already exists, remove it first. */
3636 set_unique_reg_note (insn, kind, datum)
3641 rtx note = find_reg_note (insn, kind, NULL_RTX);
3643 /* First remove the note if there already is one. */
3645 remove_note (insn, note);
3647 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3650 /* Return an indication of which type of insn should have X as a body.
3651 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3657 if (GET_CODE (x) == CODE_LABEL)
3659 if (GET_CODE (x) == CALL)
3661 if (GET_CODE (x) == RETURN)
3663 if (GET_CODE (x) == SET)
3665 if (SET_DEST (x) == pc_rtx)
3667 else if (GET_CODE (SET_SRC (x)) == CALL)
3672 if (GET_CODE (x) == PARALLEL)
3675 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3676 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3678 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3679 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3681 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3682 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3688 /* Emit the rtl pattern X as an appropriate kind of insn.
3689 If X is a label, it is simply added into the insn chain. */
3695 enum rtx_code code = classify_insn (x);
3697 if (code == CODE_LABEL)
3698 return emit_label (x);
3699 else if (code == INSN)
3700 return emit_insn (x);
3701 else if (code == JUMP_INSN)
3703 register rtx insn = emit_jump_insn (x);
3704 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3705 return emit_barrier ();
3708 else if (code == CALL_INSN)
3709 return emit_call_insn (x);
3714 /* Begin emitting insns to a sequence which can be packaged in an
3715 RTL_EXPR. If this sequence will contain something that might cause
3716 the compiler to pop arguments to function calls (because those
3717 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3718 details), use do_pending_stack_adjust before calling this function.
3719 That will ensure that the deferred pops are not accidentally
3720 emitted in the middle of this sequence. */
3725 struct sequence_stack *tem;
3727 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3729 tem->next = seq_stack;
3730 tem->first = first_insn;
3731 tem->last = last_insn;
3732 tem->sequence_rtl_expr = seq_rtl_expr;
3740 /* Similarly, but indicate that this sequence will be placed in T, an
3741 RTL_EXPR. See the documentation for start_sequence for more
3742 information about how to use this function. */
3745 start_sequence_for_rtl_expr (t)
3753 /* Set up the insn chain starting with FIRST as the current sequence,
3754 saving the previously current one. See the documentation for
3755 start_sequence for more information about how to use this function. */
3758 push_to_sequence (first)
3765 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3771 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3774 push_to_full_sequence (first, last)
3780 /* We really should have the end of the insn chain here. */
3781 if (last && NEXT_INSN (last))
3785 /* Set up the outer-level insn chain
3786 as the current sequence, saving the previously current one. */
3789 push_topmost_sequence ()
3791 struct sequence_stack *stack, *top = NULL;
3795 for (stack = seq_stack; stack; stack = stack->next)
3798 first_insn = top->first;
3799 last_insn = top->last;
3800 seq_rtl_expr = top->sequence_rtl_expr;
3803 /* After emitting to the outer-level insn chain, update the outer-level
3804 insn chain, and restore the previous saved state. */
3807 pop_topmost_sequence ()
3809 struct sequence_stack *stack, *top = NULL;
3811 for (stack = seq_stack; stack; stack = stack->next)
3814 top->first = first_insn;
3815 top->last = last_insn;
3816 /* ??? Why don't we save seq_rtl_expr here? */
3821 /* After emitting to a sequence, restore previous saved state.
3823 To get the contents of the sequence just made, you must call
3824 `gen_sequence' *before* calling here.
3826 If the compiler might have deferred popping arguments while
3827 generating this sequence, and this sequence will not be immediately
3828 inserted into the instruction stream, use do_pending_stack_adjust
3829 before calling gen_sequence. That will ensure that the deferred
3830 pops are inserted into this sequence, and not into some random
3831 location in the instruction stream. See INHIBIT_DEFER_POP for more
3832 information about deferred popping of arguments. */
3837 struct sequence_stack *tem = seq_stack;
3839 first_insn = tem->first;
3840 last_insn = tem->last;
3841 seq_rtl_expr = tem->sequence_rtl_expr;
3842 seq_stack = tem->next;
3847 /* This works like end_sequence, but records the old sequence in FIRST
3851 end_full_sequence (first, last)
3854 *first = first_insn;
3859 /* Return 1 if currently emitting into a sequence. */
3864 return seq_stack != 0;
3867 /* Generate a SEQUENCE rtx containing the insns already emitted
3868 to the current sequence.
3870 This is how the gen_... function from a DEFINE_EXPAND
3871 constructs the SEQUENCE that it returns. */
3881 /* Count the insns in the chain. */
3883 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3886 /* If only one insn, return it rather than a SEQUENCE.
3887 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3888 the case of an empty list.)
3889 We only return the pattern of an insn if its code is INSN and it
3890 has no notes. This ensures that no information gets lost. */
3892 && ! RTX_FRAME_RELATED_P (first_insn)
3893 && GET_CODE (first_insn) == INSN
3894 /* Don't throw away any reg notes. */
3895 && REG_NOTES (first_insn) == 0)
3896 return PATTERN (first_insn);
3898 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3900 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3901 XVECEXP (result, 0, i) = tem;
3906 /* Put the various virtual registers into REGNO_REG_RTX. */
3909 init_virtual_regs (es)
3910 struct emit_status *es;
3912 rtx *ptr = es->x_regno_reg_rtx;
3913 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3914 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3915 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3916 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3917 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3921 clear_emit_caches ()
3925 /* Clear the start_sequence/gen_sequence cache. */
3926 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3927 sequence_result[i] = 0;
3931 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3932 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3933 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3934 static int copy_insn_n_scratches;
3936 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3937 copied an ASM_OPERANDS.
3938 In that case, it is the original input-operand vector. */
3939 static rtvec orig_asm_operands_vector;
3941 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3942 copied an ASM_OPERANDS.
3943 In that case, it is the copied input-operand vector. */
3944 static rtvec copy_asm_operands_vector;
3946 /* Likewise for the constraints vector. */
3947 static rtvec orig_asm_constraints_vector;
3948 static rtvec copy_asm_constraints_vector;
3950 /* Recursively create a new copy of an rtx for copy_insn.
3951 This function differs from copy_rtx in that it handles SCRATCHes and
3952 ASM_OPERANDs properly.
3953 Normally, this function is not used directly; use copy_insn as front end.
3954 However, you could first copy an insn pattern with copy_insn and then use
3955 this function afterwards to properly copy any REG_NOTEs containing
3964 register RTX_CODE code;
3965 register const char *format_ptr;
3967 code = GET_CODE (orig);
3983 for (i = 0; i < copy_insn_n_scratches; i++)
3984 if (copy_insn_scratch_in[i] == orig)
3985 return copy_insn_scratch_out[i];
3989 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3990 a LABEL_REF, it isn't sharable. */
3991 if (GET_CODE (XEXP (orig, 0)) == PLUS
3992 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3993 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3997 /* A MEM with a constant address is not sharable. The problem is that
3998 the constant address may need to be reloaded. If the mem is shared,
3999 then reloading one copy of this mem will cause all copies to appear
4000 to have been reloaded. */
4006 copy = rtx_alloc (code);
4008 /* Copy the various flags, and other information. We assume that
4009 all fields need copying, and then clear the fields that should
4010 not be copied. That is the sensible default behavior, and forces
4011 us to explicitly document why we are *not* copying a flag. */
4012 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4014 /* We do not copy the USED flag, which is used as a mark bit during
4015 walks over the RTL. */
4018 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4019 if (GET_RTX_CLASS (code) == 'i')
4023 copy->frame_related = 0;
4026 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4028 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4030 copy->fld[i] = orig->fld[i];
4031 switch (*format_ptr++)
4034 if (XEXP (orig, i) != NULL)
4035 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4040 if (XVEC (orig, i) == orig_asm_constraints_vector)
4041 XVEC (copy, i) = copy_asm_constraints_vector;
4042 else if (XVEC (orig, i) == orig_asm_operands_vector)
4043 XVEC (copy, i) = copy_asm_operands_vector;
4044 else if (XVEC (orig, i) != NULL)
4046 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4047 for (j = 0; j < XVECLEN (copy, i); j++)
4048 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4059 /* These are left unchanged. */
4067 if (code == SCRATCH)
4069 i = copy_insn_n_scratches++;
4070 if (i >= MAX_RECOG_OPERANDS)
4072 copy_insn_scratch_in[i] = orig;
4073 copy_insn_scratch_out[i] = copy;
4075 else if (code == ASM_OPERANDS)
4077 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4078 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4079 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4080 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4086 /* Create a new copy of an rtx.
4087 This function differs from copy_rtx in that it handles SCRATCHes and
4088 ASM_OPERANDs properly.
4089 INSN doesn't really have to be a full INSN; it could be just the
4095 copy_insn_n_scratches = 0;
4096 orig_asm_operands_vector = 0;
4097 orig_asm_constraints_vector = 0;
4098 copy_asm_operands_vector = 0;
4099 copy_asm_constraints_vector = 0;
4100 return copy_insn_1 (insn);
4103 /* Initialize data structures and variables in this file
4104 before generating rtl for each function. */
4109 struct function *f = cfun;
4111 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4114 seq_rtl_expr = NULL;
4116 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4119 first_label_num = label_num;
4123 clear_emit_caches ();
4125 /* Init the tables that describe all the pseudo regs. */
4127 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4129 f->emit->regno_pointer_align
4130 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4131 sizeof (unsigned char));
4134 = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
4137 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4138 init_virtual_regs (f->emit);
4140 /* Indicate that the virtual registers and stack locations are
4142 REG_POINTER (stack_pointer_rtx) = 1;
4143 REG_POINTER (frame_pointer_rtx) = 1;
4144 REG_POINTER (hard_frame_pointer_rtx) = 1;
4145 REG_POINTER (arg_pointer_rtx) = 1;
4147 REG_POINTER (virtual_incoming_args_rtx) = 1;
4148 REG_POINTER (virtual_stack_vars_rtx) = 1;
4149 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4150 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4151 REG_POINTER (virtual_cfa_rtx) = 1;
4153 #ifdef STACK_BOUNDARY
4154 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4155 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4156 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4157 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4159 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4160 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4161 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4162 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4163 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4166 #ifdef INIT_EXPANDERS
4171 /* Mark SS for GC. */
4174 mark_sequence_stack (ss)
4175 struct sequence_stack *ss;
4179 ggc_mark_rtx (ss->first);
4180 ggc_mark_tree (ss->sequence_rtl_expr);
4185 /* Mark ES for GC. */
4188 mark_emit_status (es)
4189 struct emit_status *es;
4197 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
4201 mark_sequence_stack (es->sequence_stack);
4202 ggc_mark_tree (es->sequence_rtl_expr);
4203 ggc_mark_rtx (es->x_first_insn);
4206 /* Create some permanent unique rtl objects shared between all functions.
4207 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4210 init_emit_once (line_numbers)
4214 enum machine_mode mode;
4215 enum machine_mode double_mode;
4217 /* Initialize the CONST_INT hash table. */
4218 const_int_htab = htab_create (37, const_int_htab_hash,
4219 const_int_htab_eq, NULL);
4220 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4223 no_line_numbers = ! line_numbers;
4225 /* Compute the word and byte modes. */
4227 byte_mode = VOIDmode;
4228 word_mode = VOIDmode;
4229 double_mode = VOIDmode;
4231 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4232 mode = GET_MODE_WIDER_MODE (mode))
4234 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4235 && byte_mode == VOIDmode)
4238 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4239 && word_mode == VOIDmode)
4243 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4244 mode = GET_MODE_WIDER_MODE (mode))
4246 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4247 && double_mode == VOIDmode)
4251 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4253 /* Assign register numbers to the globally defined register rtx.
4254 This must be done at runtime because the register number field
4255 is in a union and some compilers can't initialize unions. */
4257 pc_rtx = gen_rtx (PC, VOIDmode);
4258 cc0_rtx = gen_rtx (CC0, VOIDmode);
4259 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4260 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4261 if (hard_frame_pointer_rtx == 0)
4262 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4263 HARD_FRAME_POINTER_REGNUM);
4264 if (arg_pointer_rtx == 0)
4265 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4266 virtual_incoming_args_rtx =
4267 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4268 virtual_stack_vars_rtx =
4269 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4270 virtual_stack_dynamic_rtx =
4271 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4272 virtual_outgoing_args_rtx =
4273 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4274 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4276 /* These rtx must be roots if GC is enabled. */
4277 ggc_add_rtx_root (global_rtl, GR_MAX);
4279 #ifdef INIT_EXPANDERS
4280 /* This is to initialize {init|mark|free}_machine_status before the first
4281 call to push_function_context_to. This is needed by the Chill front
4282 end which calls push_function_context_to before the first cal to
4283 init_function_start. */
4287 /* Create the unique rtx's for certain rtx codes and operand values. */
4289 /* Don't use gen_rtx here since gen_rtx in this case
4290 tries to use these variables. */
4291 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4292 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4293 gen_rtx_raw_CONST_INT (VOIDmode, i);
4294 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4296 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4297 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4298 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4300 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4302 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4303 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4304 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4305 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4307 for (i = 0; i <= 2; i++)
4309 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4310 mode = GET_MODE_WIDER_MODE (mode))
4312 rtx tem = rtx_alloc (CONST_DOUBLE);
4313 union real_extract u;
4315 memset ((char *) &u, 0, sizeof u); /* Zero any holes in a structure. */
4316 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4318 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4319 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4320 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4321 PUT_MODE (tem, mode);
4323 const_tiny_rtx[i][(int) mode] = tem;
4326 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4328 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4329 mode = GET_MODE_WIDER_MODE (mode))
4330 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4332 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4334 mode = GET_MODE_WIDER_MODE (mode))
4335 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4338 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4339 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4340 const_tiny_rtx[0][i] = const0_rtx;
4342 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4343 if (STORE_FLAG_VALUE == 1)
4344 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4346 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4347 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4348 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4349 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4350 ggc_add_rtx_root (&const_true_rtx, 1);
4352 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4353 return_address_pointer_rtx
4354 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4358 struct_value_rtx = STRUCT_VALUE;
4360 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4363 #ifdef STRUCT_VALUE_INCOMING
4364 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4366 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4367 struct_value_incoming_rtx
4368 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4370 struct_value_incoming_rtx = struct_value_rtx;
4374 #ifdef STATIC_CHAIN_REGNUM
4375 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4377 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4378 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4379 static_chain_incoming_rtx
4380 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4383 static_chain_incoming_rtx = static_chain_rtx;
4387 static_chain_rtx = STATIC_CHAIN;
4389 #ifdef STATIC_CHAIN_INCOMING
4390 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4392 static_chain_incoming_rtx = static_chain_rtx;
4396 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4397 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4399 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4400 ggc_add_rtx_root (&struct_value_rtx, 1);
4401 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4402 ggc_add_rtx_root (&static_chain_rtx, 1);
4403 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4404 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4407 /* Query and clear/ restore no_line_numbers. This is used by the
4408 switch / case handling in stmt.c to give proper line numbers in
4409 warnings about unreachable code. */
4412 force_line_numbers ()
4414 int old = no_line_numbers;
4416 no_line_numbers = 0;
4418 force_next_line_note ();
4423 restore_line_number_status (old_value)
4426 no_line_numbers = old_value;