1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl[GR_MAX];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab;
147 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
148 shortly thrown away. We use two mechanisms to prevent this waste:
150 For sizes up to 5 elements, we keep a SEQUENCE and its associated
151 rtvec for use by gen_sequence. One entry for each size is
152 sufficient because most cases are calls to gen_sequence followed by
153 immediately emitting the SEQUENCE. Reuse is safe since emitting a
154 sequence is destructive on the insn in it anyway and hence can't be
157 We do not bother to save this cached data over nested function calls.
158 Instead, we just reinitialize them. */
160 #define SEQUENCE_RESULT_SIZE 5
162 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
164 /* During RTL generation, we also keep a list of free INSN rtl codes. */
165 static rtx free_insn;
167 #define first_insn (cfun->emit->x_first_insn)
168 #define last_insn (cfun->emit->x_last_insn)
169 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
170 #define last_linenum (cfun->emit->x_last_linenum)
171 #define last_filename (cfun->emit->x_last_filename)
172 #define first_label_num (cfun->emit->x_first_label_num)
174 static rtx make_jump_insn_raw PARAMS ((rtx));
175 static rtx make_call_insn_raw PARAMS ((rtx));
176 static rtx find_line_note PARAMS ((rtx));
177 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
178 static void unshare_all_rtl_1 PARAMS ((rtx));
179 static void unshare_all_decls PARAMS ((tree));
180 static void reset_used_decls PARAMS ((tree));
181 static hashval_t const_int_htab_hash PARAMS ((const void *));
182 static int const_int_htab_eq PARAMS ((const void *,
184 static int rtx_htab_mark_1 PARAMS ((void **, void *));
185 static void rtx_htab_mark PARAMS ((void *));
188 /* Returns a hash code for X (which is a really a CONST_INT). */
191 const_int_htab_hash (x)
194 return (hashval_t) INTVAL ((const struct rtx_def *) x);
197 /* Returns non-zero if the value represented by X (which is really a
198 CONST_INT) is the same as that given by Y (which is really a
202 const_int_htab_eq (x, y)
206 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
209 /* Mark the hash-table element X (which is really a pointer to an
213 rtx_htab_mark_1 (x, data)
215 void *data ATTRIBUTE_UNUSED;
221 /* Mark all the elements of HTAB (which is really an htab_t full of
228 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
231 /* There are some RTL codes that require special attention; the generation
232 functions do the raw handling. If you add to this list, modify
233 special_rtx in gengenrtl.c as well. */
236 gen_rtx_CONST_INT (mode, arg)
237 enum machine_mode mode ATTRIBUTE_UNUSED;
242 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
243 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
245 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
246 if (const_true_rtx && arg == STORE_FLAG_VALUE)
247 return const_true_rtx;
250 /* Look up the CONST_INT in the hash table. */
251 slot = htab_find_slot_with_hash (const_int_htab, &arg,
252 (hashval_t) arg, INSERT);
254 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
259 /* CONST_DOUBLEs needs special handling because their length is known
263 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
264 enum machine_mode mode;
266 HOST_WIDE_INT arg1, arg2;
268 rtx r = rtx_alloc (CONST_DOUBLE);
273 X0EXP (r, 1) = NULL_RTX;
277 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
284 gen_rtx_REG (mode, regno)
285 enum machine_mode mode;
288 /* In case the MD file explicitly references the frame pointer, have
289 all such references point to the same frame pointer. This is
290 used during frame pointer elimination to distinguish the explicit
291 references to these registers from pseudos that happened to be
294 If we have eliminated the frame pointer or arg pointer, we will
295 be using it as a normal register, for example as a spill
296 register. In such cases, we might be accessing it in a mode that
297 is not Pmode and therefore cannot use the pre-allocated rtx.
299 Also don't do this when we are making new REGs in reload, since
300 we don't want to get confused with the real pointers. */
302 if (mode == Pmode && !reload_in_progress)
304 if (regno == FRAME_POINTER_REGNUM)
305 return frame_pointer_rtx;
306 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
307 if (regno == HARD_FRAME_POINTER_REGNUM)
308 return hard_frame_pointer_rtx;
310 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
311 if (regno == ARG_POINTER_REGNUM)
312 return arg_pointer_rtx;
314 #ifdef RETURN_ADDRESS_POINTER_REGNUM
315 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
316 return return_address_pointer_rtx;
318 if (regno == STACK_POINTER_REGNUM)
319 return stack_pointer_rtx;
322 return gen_rtx_raw_REG (mode, regno);
326 gen_rtx_MEM (mode, addr)
327 enum machine_mode mode;
330 rtx rt = gen_rtx_raw_MEM (mode, addr);
332 /* This field is not cleared by the mere allocation of the rtx, so
334 MEM_ALIAS_SET (rt) = 0;
339 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
341 ** This routine generates an RTX of the size specified by
342 ** <code>, which is an RTX code. The RTX structure is initialized
343 ** from the arguments <element1> through <elementn>, which are
344 ** interpreted according to the specific RTX type's format. The
345 ** special machine mode associated with the rtx (if any) is specified
348 ** gen_rtx can be invoked in a way which resembles the lisp-like
349 ** rtx it will generate. For example, the following rtx structure:
351 ** (plus:QI (mem:QI (reg:SI 1))
352 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
354 ** ...would be generated by the following C code:
356 ** gen_rtx (PLUS, QImode,
357 ** gen_rtx (MEM, QImode,
358 ** gen_rtx (REG, SImode, 1)),
359 ** gen_rtx (MEM, QImode,
360 ** gen_rtx (PLUS, SImode,
361 ** gen_rtx (REG, SImode, 2),
362 ** gen_rtx (REG, SImode, 3)))),
367 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
369 #ifndef ANSI_PROTOTYPES
371 enum machine_mode mode;
374 register int i; /* Array indices... */
375 register const char *fmt; /* Current rtx's format... */
376 register rtx rt_val; /* RTX to return to caller... */
380 #ifndef ANSI_PROTOTYPES
381 code = va_arg (p, enum rtx_code);
382 mode = va_arg (p, enum machine_mode);
388 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
393 rtx arg0 = va_arg (p, rtx);
394 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
395 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
396 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
401 rt_val = gen_rtx_REG (mode, va_arg (p, int));
405 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
409 rt_val = rtx_alloc (code); /* Allocate the storage space. */
410 rt_val->mode = mode; /* Store the machine mode... */
412 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
413 for (i = 0; i < GET_RTX_LENGTH (code); i++)
417 case '0': /* Unused field. */
420 case 'i': /* An integer? */
421 XINT (rt_val, i) = va_arg (p, int);
424 case 'w': /* A wide integer? */
425 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
428 case 's': /* A string? */
429 XSTR (rt_val, i) = va_arg (p, char *);
432 case 'e': /* An expression? */
433 case 'u': /* An insn? Same except when printing. */
434 XEXP (rt_val, i) = va_arg (p, rtx);
437 case 'E': /* An RTX vector? */
438 XVEC (rt_val, i) = va_arg (p, rtvec);
441 case 'b': /* A bitmap? */
442 XBITMAP (rt_val, i) = va_arg (p, bitmap);
445 case 't': /* A tree? */
446 XTREE (rt_val, i) = va_arg (p, tree);
460 /* gen_rtvec (n, [rt1, ..., rtn])
462 ** This routine creates an rtvec and stores within it the
463 ** pointers to rtx's which are its arguments.
468 gen_rtvec VPARAMS ((int n, ...))
470 #ifndef ANSI_PROTOTYPES
479 #ifndef ANSI_PROTOTYPES
484 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
486 vector = (rtx *) alloca (n * sizeof (rtx));
488 for (i = 0; i < n; i++)
489 vector[i] = va_arg (p, rtx);
492 return gen_rtvec_v (n, vector);
496 gen_rtvec_v (n, argp)
501 register rtvec rt_val;
504 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
506 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
508 for (i = 0; i < n; i++)
509 rt_val->elem[i] = *argp++;
515 /* Generate a REG rtx for a new pseudo register of mode MODE.
516 This pseudo is assigned the next sequential register number. */
520 enum machine_mode mode;
522 struct function *f = cfun;
525 /* Don't let anything called after initial flow analysis create new
530 if (generating_concat_p
531 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
532 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
534 /* For complex modes, don't make a single pseudo.
535 Instead, make a CONCAT of two pseudos.
536 This allows noncontiguous allocation of the real and imaginary parts,
537 which makes much better code. Besides, allocating DCmode
538 pseudos overstrains reload on some machines like the 386. */
539 rtx realpart, imagpart;
540 int size = GET_MODE_UNIT_SIZE (mode);
541 enum machine_mode partmode
542 = mode_for_size (size * BITS_PER_UNIT,
543 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
544 ? MODE_FLOAT : MODE_INT),
547 realpart = gen_reg_rtx (partmode);
548 imagpart = gen_reg_rtx (partmode);
549 return gen_rtx_CONCAT (mode, realpart, imagpart);
552 /* Make sure regno_pointer_flag and regno_reg_rtx are large
553 enough to have an element for this pseudo reg number. */
555 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
557 int old_size = f->emit->regno_pointer_flag_length;
560 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
561 memset (new + old_size, 0, old_size);
562 f->emit->regno_pointer_flag = new;
564 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
565 memset (new + old_size, 0, old_size);
566 f->emit->regno_pointer_align = (unsigned char *) new;
568 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
569 old_size * 2 * sizeof (rtx));
570 memset (new1 + old_size, 0, old_size * sizeof (rtx));
571 regno_reg_rtx = new1;
573 f->emit->regno_pointer_flag_length = old_size * 2;
576 val = gen_rtx_raw_REG (mode, reg_rtx_no);
577 regno_reg_rtx[reg_rtx_no++] = val;
581 /* Identify REG (which may be a CONCAT) as a user register. */
587 if (GET_CODE (reg) == CONCAT)
589 REG_USERVAR_P (XEXP (reg, 0)) = 1;
590 REG_USERVAR_P (XEXP (reg, 1)) = 1;
592 else if (GET_CODE (reg) == REG)
593 REG_USERVAR_P (reg) = 1;
598 /* Identify REG as a probable pointer register and show its alignment
599 as ALIGN, if nonzero. */
602 mark_reg_pointer (reg, align)
606 if (! REGNO_POINTER_FLAG (REGNO (reg)))
608 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
611 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
613 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
614 /* We can no-longer be sure just how aligned this pointer is */
615 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
618 /* Return 1 plus largest pseudo reg number used in the current function. */
626 /* Return 1 + the largest label number used so far in the current function. */
631 if (last_label_num && label_num == base_label_num)
632 return last_label_num;
636 /* Return first label number used in this function (if any were used). */
639 get_first_label_num ()
641 return first_label_num;
644 /* Return a value representing some low-order bits of X, where the number
645 of low-order bits is given by MODE. Note that no conversion is done
646 between floating-point and fixed-point values, rather, the bit
647 representation is returned.
649 This function handles the cases in common between gen_lowpart, below,
650 and two variants in cse.c and combine.c. These are the cases that can
651 be safely handled at all points in the compilation.
653 If this is not a case we can handle, return 0. */
656 gen_lowpart_common (mode, x)
657 enum machine_mode mode;
662 if (GET_MODE (x) == mode)
665 /* MODE must occupy no more words than the mode of X. */
666 if (GET_MODE (x) != VOIDmode
667 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
668 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
672 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
673 word = ((GET_MODE_SIZE (GET_MODE (x))
674 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
677 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
678 && (GET_MODE_CLASS (mode) == MODE_INT
679 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
681 /* If we are getting the low-order part of something that has been
682 sign- or zero-extended, we can either just use the object being
683 extended or make a narrower extension. If we want an even smaller
684 piece than the size of the object being extended, call ourselves
687 This case is used mostly by combine and cse. */
689 if (GET_MODE (XEXP (x, 0)) == mode)
691 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
692 return gen_lowpart_common (mode, XEXP (x, 0));
693 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
694 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
696 else if (GET_CODE (x) == SUBREG
697 && (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
698 || GET_MODE_SIZE (mode) <= UNITS_PER_WORD
699 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
700 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
702 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
703 else if (GET_CODE (x) == REG)
705 /* Let the backend decide how many registers to skip. This is needed
706 in particular for Sparc64 where fp regs are smaller than a word. */
707 /* ??? Note that subregs are now ambiguous, in that those against
708 pseudos are sized by the Word Size, while those against hard
709 regs are sized by the underlying register size. Better would be
710 to always interpret the subreg offset parameter as bytes or bits. */
712 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER
713 && GET_MODE_SIZE (GET_MODE (x)) > GET_MODE_SIZE (mode))
714 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
715 - HARD_REGNO_NREGS (REGNO (x), mode));
717 /* If the register is not valid for MODE, return 0. If we don't
718 do this, there is no way to fix up the resulting REG later.
719 But we do do this if the current REG is not valid for its
720 mode. This latter is a kludge, but is required due to the
721 way that parameters are passed on some machines, most
723 if (REGNO (x) < FIRST_PSEUDO_REGISTER
724 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
725 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
727 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
728 /* integrate.c can't handle parts of a return value register. */
729 && (! REG_FUNCTION_VALUE_P (x)
730 || ! rtx_equal_function_value_matters)
731 #ifdef CLASS_CANNOT_CHANGE_MODE
732 && ! (CLASS_CANNOT_CHANGE_MODE_P (mode, GET_MODE (x))
733 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
734 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
735 && (TEST_HARD_REG_BIT
736 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
739 /* We want to keep the stack, frame, and arg pointers
741 && x != frame_pointer_rtx
742 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
743 && x != arg_pointer_rtx
745 && x != stack_pointer_rtx)
746 return gen_rtx_REG (mode, REGNO (x) + word);
748 return gen_rtx_SUBREG (mode, x, word);
750 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
751 from the low-order part of the constant. */
752 else if ((GET_MODE_CLASS (mode) == MODE_INT
753 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
754 && GET_MODE (x) == VOIDmode
755 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
757 /* If MODE is twice the host word size, X is already the desired
758 representation. Otherwise, if MODE is wider than a word, we can't
759 do this. If MODE is exactly a word, return just one CONST_INT. */
761 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
763 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
765 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
766 return (GET_CODE (x) == CONST_INT ? x
767 : GEN_INT (CONST_DOUBLE_LOW (x)));
770 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
771 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
772 : CONST_DOUBLE_LOW (x));
774 /* Sign extend to HOST_WIDE_INT. */
775 val = trunc_int_for_mode (val, mode);
777 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
782 #ifndef REAL_ARITHMETIC
783 /* If X is an integral constant but we want it in floating-point, it
784 must be the case that we have a union of an integer and a floating-point
785 value. If the machine-parameters allow it, simulate that union here
786 and return the result. The two-word and single-word cases are
789 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
790 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
791 || flag_pretend_float)
792 && GET_MODE_CLASS (mode) == MODE_FLOAT
793 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
794 && GET_CODE (x) == CONST_INT
795 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
797 union {HOST_WIDE_INT i; float d; } u;
800 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
802 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
803 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
804 || flag_pretend_float)
805 && GET_MODE_CLASS (mode) == MODE_FLOAT
806 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
807 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
808 && GET_MODE (x) == VOIDmode
809 && (sizeof (double) * HOST_BITS_PER_CHAR
810 == 2 * HOST_BITS_PER_WIDE_INT))
812 union {HOST_WIDE_INT i[2]; double d; } u;
813 HOST_WIDE_INT low, high;
815 if (GET_CODE (x) == CONST_INT)
816 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
818 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
820 #ifdef HOST_WORDS_BIG_ENDIAN
821 u.i[0] = high, u.i[1] = low;
823 u.i[0] = low, u.i[1] = high;
826 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
829 /* Similarly, if this is converting a floating-point value into a
830 single-word integer. Only do this is the host and target parameters are
833 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
834 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
835 || flag_pretend_float)
836 && (GET_MODE_CLASS (mode) == MODE_INT
837 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
838 && GET_CODE (x) == CONST_DOUBLE
839 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
840 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
841 return operand_subword (x, word, 0, GET_MODE (x));
843 /* Similarly, if this is converting a floating-point value into a
844 two-word integer, we can do this one word at a time and make an
845 integer. Only do this is the host and target parameters are
848 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
849 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
850 || flag_pretend_float)
851 && (GET_MODE_CLASS (mode) == MODE_INT
852 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
853 && GET_CODE (x) == CONST_DOUBLE
854 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
855 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
858 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
860 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
862 if (lowpart && GET_CODE (lowpart) == CONST_INT
863 && highpart && GET_CODE (highpart) == CONST_INT)
864 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
866 #else /* ifndef REAL_ARITHMETIC */
868 /* When we have a FP emulator, we can handle all conversions between
869 FP and integer operands. This simplifies reload because it
870 doesn't have to deal with constructs like (subreg:DI
871 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
873 else if (mode == SFmode
874 && GET_CODE (x) == CONST_INT)
880 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
881 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
883 else if (mode == DFmode
884 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
885 && GET_MODE (x) == VOIDmode)
889 HOST_WIDE_INT low, high;
891 if (GET_CODE (x) == CONST_INT)
894 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
898 low = CONST_DOUBLE_LOW (x);
899 high = CONST_DOUBLE_HIGH (x);
902 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
904 if (WORDS_BIG_ENDIAN)
905 i[0] = high, i[1] = low;
907 i[0] = low, i[1] = high;
909 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
910 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
912 else if ((GET_MODE_CLASS (mode) == MODE_INT
913 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
914 && GET_CODE (x) == CONST_DOUBLE
915 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
918 long i[4]; /* Only the low 32 bits of each 'long' are used. */
919 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
921 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
922 switch (GET_MODE (x))
925 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
929 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
931 #if LONG_DOUBLE_TYPE_SIZE == 96
933 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
937 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
944 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
946 #if HOST_BITS_PER_WIDE_INT == 32
947 return immed_double_const (i[endian], i[1 - endian], mode);
952 if (HOST_BITS_PER_WIDE_INT != 64)
955 for (c = 0; c < 4; c++)
958 switch (GET_MODE (x))
962 return immed_double_const (((unsigned long) i[endian]) |
963 (((HOST_WIDE_INT) i[1-endian]) << 32),
966 return immed_double_const (((unsigned long) i[endian*3]) |
967 (((HOST_WIDE_INT) i[1+endian]) << 32),
968 ((unsigned long) i[2-endian]) |
969 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
975 #endif /* ifndef REAL_ARITHMETIC */
977 /* Otherwise, we can't do this. */
981 /* Return the real part (which has mode MODE) of a complex value X.
982 This always comes at the low address in memory. */
985 gen_realpart (mode, x)
986 enum machine_mode mode;
989 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
991 else if (WORDS_BIG_ENDIAN
992 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
994 && REGNO (x) < FIRST_PSEUDO_REGISTER)
995 fatal ("Unable to access real part of complex value in a hard register on this target");
996 else if (WORDS_BIG_ENDIAN)
997 return gen_highpart (mode, x);
999 return gen_lowpart (mode, x);
1002 /* Return the imaginary part (which has mode MODE) of a complex value X.
1003 This always comes at the high address in memory. */
1006 gen_imagpart (mode, x)
1007 enum machine_mode mode;
1010 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
1012 else if (WORDS_BIG_ENDIAN)
1013 return gen_lowpart (mode, x);
1014 else if (!WORDS_BIG_ENDIAN
1015 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1017 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1018 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
1020 return gen_highpart (mode, x);
1023 /* Return 1 iff X, assumed to be a SUBREG,
1024 refers to the real part of the complex value in its containing reg.
1025 Complex values are always stored with the real part in the first word,
1026 regardless of WORDS_BIG_ENDIAN. */
1029 subreg_realpart_p (x)
1032 if (GET_CODE (x) != SUBREG)
1035 return ((unsigned int) SUBREG_WORD (x) * UNITS_PER_WORD
1036 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1039 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1040 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1041 least-significant part of X.
1042 MODE specifies how big a part of X to return;
1043 it usually should not be larger than a word.
1044 If X is a MEM whose address is a QUEUED, the value may be so also. */
1047 gen_lowpart (mode, x)
1048 enum machine_mode mode;
1051 rtx result = gen_lowpart_common (mode, x);
1055 else if (GET_CODE (x) == REG)
1057 /* Must be a hard reg that's not valid in MODE. */
1058 result = gen_lowpart_common (mode, copy_to_reg (x));
1063 else if (GET_CODE (x) == MEM)
1065 /* The only additional case we can do is MEM. */
1066 register int offset = 0;
1067 if (WORDS_BIG_ENDIAN)
1068 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1069 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1071 if (BYTES_BIG_ENDIAN)
1072 /* Adjust the address so that the address-after-the-data
1074 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1075 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1077 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1079 else if (GET_CODE (x) == ADDRESSOF)
1080 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1085 /* Like `gen_lowpart', but refer to the most significant part.
1086 This is used to access the imaginary part of a complex number. */
1089 gen_highpart (mode, x)
1090 enum machine_mode mode;
1093 /* This case loses if X is a subreg. To catch bugs early,
1094 complain if an invalid MODE is used even in other cases. */
1095 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1096 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1098 if (GET_CODE (x) == CONST_DOUBLE
1099 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1100 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1103 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1104 else if (GET_CODE (x) == CONST_INT)
1106 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1108 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1110 else if (GET_CODE (x) == MEM)
1112 register int offset = 0;
1113 if (! WORDS_BIG_ENDIAN)
1114 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1115 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1117 if (! BYTES_BIG_ENDIAN
1118 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1119 offset -= (GET_MODE_SIZE (mode)
1120 - MIN (UNITS_PER_WORD,
1121 GET_MODE_SIZE (GET_MODE (x))));
1123 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1125 else if (GET_CODE (x) == SUBREG)
1127 /* The only time this should occur is when we are looking at a
1128 multi-word item with a SUBREG whose mode is the same as that of the
1129 item. It isn't clear what we would do if it wasn't. */
1130 if (SUBREG_WORD (x) != 0)
1132 return gen_highpart (mode, SUBREG_REG (x));
1134 else if (GET_CODE (x) == REG)
1138 /* Let the backend decide how many registers to skip. This is needed
1139 in particular for sparc64 where fp regs are smaller than a word. */
1140 /* ??? Note that subregs are now ambiguous, in that those against
1141 pseudos are sized by the word size, while those against hard
1142 regs are sized by the underlying register size. Better would be
1143 to always interpret the subreg offset parameter as bytes or bits. */
1145 if (GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (mode))
1147 else if (WORDS_BIG_ENDIAN)
1149 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1150 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1151 - HARD_REGNO_NREGS (REGNO (x), mode));
1153 word = ((GET_MODE_SIZE (GET_MODE (x))
1154 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1157 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1158 /* integrate.c can't handle parts of a return value register. */
1159 && (! REG_FUNCTION_VALUE_P (x)
1160 || ! rtx_equal_function_value_matters)
1161 /* We want to keep the stack, frame, and arg pointers special. */
1162 && x != frame_pointer_rtx
1163 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1164 && x != arg_pointer_rtx
1166 && x != stack_pointer_rtx)
1167 return gen_rtx_REG (mode, REGNO (x) + word);
1169 return gen_rtx_SUBREG (mode, x, word);
1175 /* Return 1 iff X, assumed to be a SUBREG,
1176 refers to the least significant part of its containing reg.
1177 If X is not a SUBREG, always return 1 (it is its own low part!). */
1180 subreg_lowpart_p (x)
1183 if (GET_CODE (x) != SUBREG)
1185 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1188 if (WORDS_BIG_ENDIAN
1189 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1190 return (SUBREG_WORD (x)
1191 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1192 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1195 return SUBREG_WORD (x) == 0;
1198 /* Return subword I of operand OP.
1199 The word number, I, is interpreted as the word number starting at the
1200 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1201 otherwise it is the high-order word.
1203 If we cannot extract the required word, we return zero. Otherwise, an
1204 rtx corresponding to the requested word will be returned.
1206 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1207 reload has completed, a valid address will always be returned. After
1208 reload, if a valid address cannot be returned, we return zero.
1210 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1211 it is the responsibility of the caller.
1213 MODE is the mode of OP in case it is a CONST_INT. */
1216 operand_subword (op, i, validate_address, mode)
1219 int validate_address;
1220 enum machine_mode mode;
1223 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1225 if (mode == VOIDmode)
1226 mode = GET_MODE (op);
1228 if (mode == VOIDmode)
1231 /* If OP is narrower than a word, fail. */
1233 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1236 /* If we want a word outside OP, return zero. */
1238 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1241 /* If OP is already an integer word, return it. */
1242 if (GET_MODE_CLASS (mode) == MODE_INT
1243 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1246 /* If OP is a REG or SUBREG, we can handle it very simply. */
1247 if (GET_CODE (op) == REG)
1249 /* ??? There is a potential problem with this code. It does not
1250 properly handle extractions of a subword from a hard register
1251 that is larger than word_mode. Presumably the check for
1252 HARD_REGNO_MODE_OK catches these most of these cases. */
1254 /* If OP is a hard register, but OP + I is not a hard register,
1255 then extracting a subword is impossible.
1257 For example, consider if OP is the last hard register and it is
1258 larger than word_mode. If we wanted word N (for N > 0) because a
1259 part of that hard register was known to contain a useful value,
1260 then OP + I would refer to a pseudo, not the hard register we
1262 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1263 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1266 /* If the register is not valid for MODE, return 0. Note we
1267 have to check both OP and OP + I since they may refer to
1268 different parts of the register file.
1270 Consider if OP refers to the last 96bit FP register and we want
1271 subword 3 because that subword is known to contain a value we
1273 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1274 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1275 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1277 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1278 || (REG_FUNCTION_VALUE_P (op)
1279 && rtx_equal_function_value_matters)
1280 /* We want to keep the stack, frame, and arg pointers
1282 || op == frame_pointer_rtx
1283 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1284 || op == arg_pointer_rtx
1286 || op == stack_pointer_rtx)
1287 return gen_rtx_SUBREG (word_mode, op, i);
1289 return gen_rtx_REG (word_mode, REGNO (op) + i);
1291 else if (GET_CODE (op) == SUBREG)
1292 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1293 else if (GET_CODE (op) == CONCAT)
1295 unsigned int partwords
1296 = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1299 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1300 return operand_subword (XEXP (op, 1), i - partwords,
1301 validate_address, mode);
1304 /* Form a new MEM at the requested address. */
1305 if (GET_CODE (op) == MEM)
1307 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1310 if (validate_address)
1312 if (reload_completed)
1314 if (! strict_memory_address_p (word_mode, addr))
1318 addr = memory_address (word_mode, addr);
1321 new = gen_rtx_MEM (word_mode, addr);
1322 MEM_COPY_ATTRIBUTES (new, op);
1326 /* The only remaining cases are when OP is a constant. If the host and
1327 target floating formats are the same, handling two-word floating
1328 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1329 are defined as returning one or two 32 bit values, respectively,
1330 and not values of BITS_PER_WORD bits. */
1331 #ifdef REAL_ARITHMETIC
1332 /* The output is some bits, the width of the target machine's word.
1333 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1335 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1336 && GET_MODE_CLASS (mode) == MODE_FLOAT
1337 && GET_MODE_BITSIZE (mode) == 64
1338 && GET_CODE (op) == CONST_DOUBLE)
1343 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1344 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1346 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1347 which the words are written depends on the word endianness.
1348 ??? This is a potential portability problem and should
1349 be fixed at some point.
1351 We must excercise caution with the sign bit. By definition there
1352 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1353 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1354 So we explicitly mask and sign-extend as necessary. */
1355 if (BITS_PER_WORD == 32)
1358 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1359 return GEN_INT (val);
1361 #if HOST_BITS_PER_WIDE_INT >= 64
1362 else if (BITS_PER_WORD >= 64 && i == 0)
1364 val = k[! WORDS_BIG_ENDIAN];
1365 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1366 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1367 return GEN_INT (val);
1370 else if (BITS_PER_WORD == 16)
1373 if ((i & 1) == !WORDS_BIG_ENDIAN)
1376 return GEN_INT (val);
1381 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1382 && GET_MODE_CLASS (mode) == MODE_FLOAT
1383 && GET_MODE_BITSIZE (mode) > 64
1384 && GET_CODE (op) == CONST_DOUBLE)
1389 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1390 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1392 if (BITS_PER_WORD == 32)
1395 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1396 return GEN_INT (val);
1398 #if HOST_BITS_PER_WIDE_INT >= 64
1399 else if (BITS_PER_WORD >= 64 && i <= 1)
1401 val = k[i*2 + ! WORDS_BIG_ENDIAN];
1402 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1403 val |= (HOST_WIDE_INT) k[i*2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1404 return GEN_INT (val);
1410 #else /* no REAL_ARITHMETIC */
1411 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1412 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1413 || flag_pretend_float)
1414 && GET_MODE_CLASS (mode) == MODE_FLOAT
1415 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1416 && GET_CODE (op) == CONST_DOUBLE)
1418 /* The constant is stored in the host's word-ordering,
1419 but we want to access it in the target's word-ordering. Some
1420 compilers don't like a conditional inside macro args, so we have two
1421 copies of the return. */
1422 #ifdef HOST_WORDS_BIG_ENDIAN
1423 return GEN_INT (i == WORDS_BIG_ENDIAN
1424 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1426 return GEN_INT (i != WORDS_BIG_ENDIAN
1427 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1430 #endif /* no REAL_ARITHMETIC */
1432 /* Single word float is a little harder, since single- and double-word
1433 values often do not have the same high-order bits. We have already
1434 verified that we want the only defined word of the single-word value. */
1435 #ifdef REAL_ARITHMETIC
1436 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1437 && GET_MODE_BITSIZE (mode) == 32
1438 && GET_CODE (op) == CONST_DOUBLE)
1443 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1444 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1446 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1448 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1450 if (BITS_PER_WORD == 16)
1452 if ((i & 1) == !WORDS_BIG_ENDIAN)
1457 return GEN_INT (val);
1460 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1461 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1462 || flag_pretend_float)
1463 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1464 && GET_MODE_CLASS (mode) == MODE_FLOAT
1465 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1466 && GET_CODE (op) == CONST_DOUBLE)
1469 union {float f; HOST_WIDE_INT i; } u;
1471 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1474 return GEN_INT (u.i);
1476 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1477 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1478 || flag_pretend_float)
1479 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1480 && GET_MODE_CLASS (mode) == MODE_FLOAT
1481 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1482 && GET_CODE (op) == CONST_DOUBLE)
1485 union {double d; HOST_WIDE_INT i; } u;
1487 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1490 return GEN_INT (u.i);
1492 #endif /* no REAL_ARITHMETIC */
1494 /* The only remaining cases that we can handle are integers.
1495 Convert to proper endianness now since these cases need it.
1496 At this point, i == 0 means the low-order word.
1498 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1499 in general. However, if OP is (const_int 0), we can just return
1502 if (op == const0_rtx)
1505 if (GET_MODE_CLASS (mode) != MODE_INT
1506 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1507 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1510 if (WORDS_BIG_ENDIAN)
1511 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1513 /* Find out which word on the host machine this value is in and get
1514 it from the constant. */
1515 val = (i / size_ratio == 0
1516 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1517 : (GET_CODE (op) == CONST_INT
1518 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1520 /* Get the value we want into the low bits of val. */
1521 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1522 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1524 val = trunc_int_for_mode (val, word_mode);
1526 return GEN_INT (val);
1529 /* Similar to `operand_subword', but never return 0. If we can't extract
1530 the required subword, put OP into a register and try again. If that fails,
1531 abort. We always validate the address in this case. It is not valid
1532 to call this function after reload; it is mostly meant for RTL
1535 MODE is the mode of OP, in case it is CONST_INT. */
1538 operand_subword_force (op, i, mode)
1541 enum machine_mode mode;
1543 rtx result = operand_subword (op, i, 1, mode);
1548 if (mode != BLKmode && mode != VOIDmode)
1550 /* If this is a register which can not be accessed by words, copy it
1551 to a pseudo register. */
1552 if (GET_CODE (op) == REG)
1553 op = copy_to_reg (op);
1555 op = force_reg (mode, op);
1558 result = operand_subword (op, i, 1, mode);
1565 /* Given a compare instruction, swap the operands.
1566 A test instruction is changed into a compare of 0 against the operand. */
1569 reverse_comparison (insn)
1572 rtx body = PATTERN (insn);
1575 if (GET_CODE (body) == SET)
1576 comp = SET_SRC (body);
1578 comp = SET_SRC (XVECEXP (body, 0, 0));
1580 if (GET_CODE (comp) == COMPARE)
1582 rtx op0 = XEXP (comp, 0);
1583 rtx op1 = XEXP (comp, 1);
1584 XEXP (comp, 0) = op1;
1585 XEXP (comp, 1) = op0;
1589 rtx new = gen_rtx_COMPARE (VOIDmode,
1590 CONST0_RTX (GET_MODE (comp)), comp);
1591 if (GET_CODE (body) == SET)
1592 SET_SRC (body) = new;
1594 SET_SRC (XVECEXP (body, 0, 0)) = new;
1598 /* Return a memory reference like MEMREF, but with its mode changed
1599 to MODE and its address changed to ADDR.
1600 (VOIDmode means don't change the mode.
1601 NULL for ADDR means don't change the address.) */
1604 change_address (memref, mode, addr)
1606 enum machine_mode mode;
1611 if (GET_CODE (memref) != MEM)
1613 if (mode == VOIDmode)
1614 mode = GET_MODE (memref);
1616 addr = XEXP (memref, 0);
1618 /* If reload is in progress or has completed, ADDR must be valid.
1619 Otherwise, we can call memory_address to make it valid. */
1620 if (reload_completed || reload_in_progress)
1622 if (! memory_address_p (mode, addr))
1626 addr = memory_address (mode, addr);
1628 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1631 new = gen_rtx_MEM (mode, addr);
1632 MEM_COPY_ATTRIBUTES (new, memref);
1636 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1643 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1644 NULL_RTX, label_num++, NULL_PTR, NULL_PTR);
1646 LABEL_NUSES (label) = 0;
1647 LABEL_ALTERNATE_NAME (label) = NULL;
1651 /* For procedure integration. */
1653 /* Install new pointers to the first and last insns in the chain.
1654 Also, set cur_insn_uid to one higher than the last in use.
1655 Used for an inline-procedure after copying the insn chain. */
1658 set_new_first_and_last_insn (first, last)
1667 for (insn = first; insn; insn = NEXT_INSN (insn))
1668 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1673 /* Set the range of label numbers found in the current function.
1674 This is used when belatedly compiling an inline function. */
1677 set_new_first_and_last_label_num (first, last)
1680 base_label_num = label_num;
1681 first_label_num = first;
1682 last_label_num = last;
1685 /* Set the last label number found in the current function.
1686 This is used when belatedly compiling an inline function. */
1689 set_new_last_label_num (last)
1692 base_label_num = label_num;
1693 last_label_num = last;
1696 /* Restore all variables describing the current status from the structure *P.
1697 This is used after a nested function. */
1700 restore_emit_status (p)
1701 struct function *p ATTRIBUTE_UNUSED;
1704 clear_emit_caches ();
1707 /* Clear out all parts of the state in F that can safely be discarded
1708 after the function has been compiled, to let garbage collection
1709 reclaim the memory. */
1712 free_emit_status (f)
1715 free (f->emit->x_regno_reg_rtx);
1716 free (f->emit->regno_pointer_flag);
1717 free (f->emit->regno_pointer_align);
1722 /* Go through all the RTL insn bodies and copy any invalid shared
1723 structure. This routine should only be called once. */
1726 unshare_all_rtl (fndecl, insn)
1732 /* Make sure that virtual parameters are not shared. */
1733 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1734 DECL_RTL (decl) = copy_rtx_if_shared (DECL_RTL (decl));
1736 /* Make sure that virtual stack slots are not shared. */
1737 unshare_all_decls (DECL_INITIAL (fndecl));
1739 /* Unshare just about everything else. */
1740 unshare_all_rtl_1 (insn);
1742 /* Make sure the addresses of stack slots found outside the insn chain
1743 (such as, in DECL_RTL of a variable) are not shared
1744 with the insn chain.
1746 This special care is necessary when the stack slot MEM does not
1747 actually appear in the insn chain. If it does appear, its address
1748 is unshared from all else at that point. */
1749 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1752 /* Go through all the RTL insn bodies and copy any invalid shared
1753 structure, again. This is a fairly expensive thing to do so it
1754 should be done sparingly. */
1757 unshare_all_rtl_again (insn)
1763 for (p = insn; p; p = NEXT_INSN (p))
1766 reset_used_flags (PATTERN (p));
1767 reset_used_flags (REG_NOTES (p));
1768 reset_used_flags (LOG_LINKS (p));
1771 /* Make sure that virtual stack slots are not shared. */
1772 reset_used_decls (DECL_INITIAL (cfun->decl));
1774 /* Make sure that virtual parameters are not shared. */
1775 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1776 reset_used_flags (DECL_RTL (decl));
1778 reset_used_flags (stack_slot_list);
1780 unshare_all_rtl (cfun->decl, insn);
1783 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1784 Assumes the mark bits are cleared at entry. */
1787 unshare_all_rtl_1 (insn)
1790 for (; insn; insn = NEXT_INSN (insn))
1793 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1794 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1795 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1799 /* Go through all virtual stack slots of a function and copy any
1800 shared structure. */
1802 unshare_all_decls (blk)
1807 /* Copy shared decls. */
1808 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1809 DECL_RTL (t) = copy_rtx_if_shared (DECL_RTL (t));
1811 /* Now process sub-blocks. */
1812 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1813 unshare_all_decls (t);
1816 /* Go through all virtual stack slots of a function and mark them as
1819 reset_used_decls (blk)
1825 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1826 reset_used_flags (DECL_RTL (t));
1828 /* Now process sub-blocks. */
1829 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1830 reset_used_decls (t);
1833 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1834 Recursively does the same for subexpressions. */
1837 copy_rtx_if_shared (orig)
1840 register rtx x = orig;
1842 register enum rtx_code code;
1843 register const char *format_ptr;
1849 code = GET_CODE (x);
1851 /* These types may be freely shared. */
1864 /* SCRATCH must be shared because they represent distinct values. */
1868 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1869 a LABEL_REF, it isn't sharable. */
1870 if (GET_CODE (XEXP (x, 0)) == PLUS
1871 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1872 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1881 /* The chain of insns is not being copied. */
1885 /* A MEM is allowed to be shared if its address is constant.
1887 We used to allow sharing of MEMs which referenced
1888 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1889 that can lose. instantiate_virtual_regs will not unshare
1890 the MEMs, and combine may change the structure of the address
1891 because it looks safe and profitable in one context, but
1892 in some other context it creates unrecognizable RTL. */
1893 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1902 /* This rtx may not be shared. If it has already been seen,
1903 replace it with a copy of itself. */
1909 copy = rtx_alloc (code);
1911 (sizeof (*copy) - sizeof (copy->fld)
1912 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1918 /* Now scan the subexpressions recursively.
1919 We can store any replaced subexpressions directly into X
1920 since we know X is not shared! Any vectors in X
1921 must be copied if X was copied. */
1923 format_ptr = GET_RTX_FORMAT (code);
1925 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1927 switch (*format_ptr++)
1930 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1934 if (XVEC (x, i) != NULL)
1937 int len = XVECLEN (x, i);
1939 if (copied && len > 0)
1940 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1941 for (j = 0; j < len; j++)
1942 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1950 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1951 to look for shared sub-parts. */
1954 reset_used_flags (x)
1958 register enum rtx_code code;
1959 register const char *format_ptr;
1964 code = GET_CODE (x);
1966 /* These types may be freely shared so we needn't do any resetting
1987 /* The chain of insns is not being copied. */
1996 format_ptr = GET_RTX_FORMAT (code);
1997 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1999 switch (*format_ptr++)
2002 reset_used_flags (XEXP (x, i));
2006 for (j = 0; j < XVECLEN (x, i); j++)
2007 reset_used_flags (XVECEXP (x, i, j));
2013 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2014 Return X or the rtx for the pseudo reg the value of X was copied into.
2015 OTHER must be valid as a SET_DEST. */
2018 make_safe_from (x, other)
2022 switch (GET_CODE (other))
2025 other = SUBREG_REG (other);
2027 case STRICT_LOW_PART:
2030 other = XEXP (other, 0);
2036 if ((GET_CODE (other) == MEM
2038 && GET_CODE (x) != REG
2039 && GET_CODE (x) != SUBREG)
2040 || (GET_CODE (other) == REG
2041 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2042 || reg_mentioned_p (other, x))))
2044 rtx temp = gen_reg_rtx (GET_MODE (x));
2045 emit_move_insn (temp, x);
2051 /* Emission of insns (adding them to the doubly-linked list). */
2053 /* Return the first insn of the current sequence or current function. */
2061 /* Return the last insn emitted in current sequence or current function. */
2069 /* Specify a new insn as the last in the chain. */
2072 set_last_insn (insn)
2075 if (NEXT_INSN (insn) != 0)
2080 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2083 get_last_insn_anywhere ()
2085 struct sequence_stack *stack;
2088 for (stack = seq_stack; stack; stack = stack->next)
2089 if (stack->last != 0)
2094 /* Return a number larger than any instruction's uid in this function. */
2099 return cur_insn_uid;
2102 /* Renumber instructions so that no instruction UIDs are wasted. */
2105 renumber_insns (stream)
2110 /* If we're not supposed to renumber instructions, don't. */
2111 if (!flag_renumber_insns)
2114 /* If there aren't that many instructions, then it's not really
2115 worth renumbering them. */
2116 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2121 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2124 fprintf (stream, "Renumbering insn %d to %d\n",
2125 INSN_UID (insn), cur_insn_uid);
2126 INSN_UID (insn) = cur_insn_uid++;
2130 /* Return the next insn. If it is a SEQUENCE, return the first insn
2139 insn = NEXT_INSN (insn);
2140 if (insn && GET_CODE (insn) == INSN
2141 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2142 insn = XVECEXP (PATTERN (insn), 0, 0);
2148 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2152 previous_insn (insn)
2157 insn = PREV_INSN (insn);
2158 if (insn && GET_CODE (insn) == INSN
2159 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2160 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2166 /* Return the next insn after INSN that is not a NOTE. This routine does not
2167 look inside SEQUENCEs. */
2170 next_nonnote_insn (insn)
2175 insn = NEXT_INSN (insn);
2176 if (insn == 0 || GET_CODE (insn) != NOTE)
2183 /* Return the previous insn before INSN that is not a NOTE. This routine does
2184 not look inside SEQUENCEs. */
2187 prev_nonnote_insn (insn)
2192 insn = PREV_INSN (insn);
2193 if (insn == 0 || GET_CODE (insn) != NOTE)
2200 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2201 or 0, if there is none. This routine does not look inside
2205 next_real_insn (insn)
2210 insn = NEXT_INSN (insn);
2211 if (insn == 0 || GET_CODE (insn) == INSN
2212 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2219 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2220 or 0, if there is none. This routine does not look inside
2224 prev_real_insn (insn)
2229 insn = PREV_INSN (insn);
2230 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2231 || GET_CODE (insn) == JUMP_INSN)
2238 /* Find the next insn after INSN that really does something. This routine
2239 does not look inside SEQUENCEs. Until reload has completed, this is the
2240 same as next_real_insn. */
2243 active_insn_p (insn)
2246 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2247 || (GET_CODE (insn) == INSN
2248 && (! reload_completed
2249 || (GET_CODE (PATTERN (insn)) != USE
2250 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2254 next_active_insn (insn)
2259 insn = NEXT_INSN (insn);
2260 if (insn == 0 || active_insn_p (insn))
2267 /* Find the last insn before INSN that really does something. This routine
2268 does not look inside SEQUENCEs. Until reload has completed, this is the
2269 same as prev_real_insn. */
2272 prev_active_insn (insn)
2277 insn = PREV_INSN (insn);
2278 if (insn == 0 || active_insn_p (insn))
2285 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2293 insn = NEXT_INSN (insn);
2294 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2301 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2309 insn = PREV_INSN (insn);
2310 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2318 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2319 and REG_CC_USER notes so we can find it. */
2322 link_cc0_insns (insn)
2325 rtx user = next_nonnote_insn (insn);
2327 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2328 user = XVECEXP (PATTERN (user), 0, 0);
2330 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2332 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2335 /* Return the next insn that uses CC0 after INSN, which is assumed to
2336 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2337 applied to the result of this function should yield INSN).
2339 Normally, this is simply the next insn. However, if a REG_CC_USER note
2340 is present, it contains the insn that uses CC0.
2342 Return 0 if we can't find the insn. */
2345 next_cc0_user (insn)
2348 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2351 return XEXP (note, 0);
2353 insn = next_nonnote_insn (insn);
2354 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2355 insn = XVECEXP (PATTERN (insn), 0, 0);
2357 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2363 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2364 note, it is the previous insn. */
2367 prev_cc0_setter (insn)
2370 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2373 return XEXP (note, 0);
2375 insn = prev_nonnote_insn (insn);
2376 if (! sets_cc0_p (PATTERN (insn)))
2383 /* Try splitting insns that can be split for better scheduling.
2384 PAT is the pattern which might split.
2385 TRIAL is the insn providing PAT.
2386 LAST is non-zero if we should return the last insn of the sequence produced.
2388 If this routine succeeds in splitting, it returns the first or last
2389 replacement insn depending on the value of LAST. Otherwise, it
2390 returns TRIAL. If the insn to be returned can be split, it will be. */
2393 try_split (pat, trial, last)
2397 rtx before = PREV_INSN (trial);
2398 rtx after = NEXT_INSN (trial);
2399 rtx seq = split_insns (pat, trial);
2400 int has_barrier = 0;
2403 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2404 We may need to handle this specially. */
2405 if (after && GET_CODE (after) == BARRIER)
2408 after = NEXT_INSN (after);
2413 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2414 The latter case will normally arise only when being done so that
2415 it, in turn, will be split (SFmode on the 29k is an example). */
2416 if (GET_CODE (seq) == SEQUENCE)
2420 /* Avoid infinite loop if any insn of the result matches
2421 the original pattern. */
2422 for (i = 0; i < XVECLEN (seq, 0); i++)
2423 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2424 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2427 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2428 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2429 increment the usage count so we don't delete the label. */
2431 if (GET_CODE (trial) == JUMP_INSN)
2432 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2433 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2435 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2437 if (JUMP_LABEL (trial))
2438 LABEL_NUSES (JUMP_LABEL (trial))++;
2441 tem = emit_insn_after (seq, before);
2443 delete_insn (trial);
2445 emit_barrier_after (tem);
2447 /* Recursively call try_split for each new insn created; by the
2448 time control returns here that insn will be fully split, so
2449 set LAST and continue from the insn after the one returned.
2450 We can't use next_active_insn here since AFTER may be a note.
2451 Ignore deleted insns, which can be occur if not optimizing. */
2452 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2453 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2454 tem = try_split (PATTERN (tem), tem, 1);
2456 /* Avoid infinite loop if the result matches the original pattern. */
2457 else if (rtx_equal_p (seq, pat))
2461 PATTERN (trial) = seq;
2462 INSN_CODE (trial) = -1;
2463 try_split (seq, trial, last);
2466 /* Return either the first or the last insn, depending on which was
2469 ? (after ? prev_active_insn (after) : last_insn)
2470 : next_active_insn (before);
2476 /* Make and return an INSN rtx, initializing all its slots.
2477 Store PATTERN in the pattern slots. */
2480 make_insn_raw (pattern)
2485 insn = rtx_alloc (INSN);
2487 INSN_UID (insn) = cur_insn_uid++;
2488 PATTERN (insn) = pattern;
2489 INSN_CODE (insn) = -1;
2490 LOG_LINKS (insn) = NULL;
2491 REG_NOTES (insn) = NULL;
2493 #ifdef ENABLE_RTL_CHECKING
2496 && (returnjump_p (insn)
2497 || (GET_CODE (insn) == SET
2498 && SET_DEST (insn) == pc_rtx)))
2500 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2508 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2511 make_jump_insn_raw (pattern)
2516 insn = rtx_alloc (JUMP_INSN);
2517 INSN_UID (insn) = cur_insn_uid++;
2519 PATTERN (insn) = pattern;
2520 INSN_CODE (insn) = -1;
2521 LOG_LINKS (insn) = NULL;
2522 REG_NOTES (insn) = NULL;
2523 JUMP_LABEL (insn) = NULL;
2528 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2531 make_call_insn_raw (pattern)
2536 insn = rtx_alloc (CALL_INSN);
2537 INSN_UID (insn) = cur_insn_uid++;
2539 PATTERN (insn) = pattern;
2540 INSN_CODE (insn) = -1;
2541 LOG_LINKS (insn) = NULL;
2542 REG_NOTES (insn) = NULL;
2543 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2548 /* Add INSN to the end of the doubly-linked list.
2549 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2555 PREV_INSN (insn) = last_insn;
2556 NEXT_INSN (insn) = 0;
2558 if (NULL != last_insn)
2559 NEXT_INSN (last_insn) = insn;
2561 if (NULL == first_insn)
2567 /* Add INSN into the doubly-linked list after insn AFTER. This and
2568 the next should be the only functions called to insert an insn once
2569 delay slots have been filled since only they know how to update a
2573 add_insn_after (insn, after)
2576 rtx next = NEXT_INSN (after);
2578 if (optimize && INSN_DELETED_P (after))
2581 NEXT_INSN (insn) = next;
2582 PREV_INSN (insn) = after;
2586 PREV_INSN (next) = insn;
2587 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2588 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2590 else if (last_insn == after)
2594 struct sequence_stack *stack = seq_stack;
2595 /* Scan all pending sequences too. */
2596 for (; stack; stack = stack->next)
2597 if (after == stack->last)
2607 NEXT_INSN (after) = insn;
2608 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2610 rtx sequence = PATTERN (after);
2611 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2615 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2616 the previous should be the only functions called to insert an insn once
2617 delay slots have been filled since only they know how to update a
2621 add_insn_before (insn, before)
2624 rtx prev = PREV_INSN (before);
2626 if (optimize && INSN_DELETED_P (before))
2629 PREV_INSN (insn) = prev;
2630 NEXT_INSN (insn) = before;
2634 NEXT_INSN (prev) = insn;
2635 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2637 rtx sequence = PATTERN (prev);
2638 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2641 else if (first_insn == before)
2645 struct sequence_stack *stack = seq_stack;
2646 /* Scan all pending sequences too. */
2647 for (; stack; stack = stack->next)
2648 if (before == stack->first)
2650 stack->first = insn;
2658 PREV_INSN (before) = insn;
2659 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2660 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2663 /* Remove an insn from its doubly-linked list. This function knows how
2664 to handle sequences. */
2669 rtx next = NEXT_INSN (insn);
2670 rtx prev = PREV_INSN (insn);
2673 NEXT_INSN (prev) = next;
2674 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2676 rtx sequence = PATTERN (prev);
2677 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2680 else if (first_insn == insn)
2684 struct sequence_stack *stack = seq_stack;
2685 /* Scan all pending sequences too. */
2686 for (; stack; stack = stack->next)
2687 if (insn == stack->first)
2689 stack->first = next;
2699 PREV_INSN (next) = prev;
2700 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2701 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2703 else if (last_insn == insn)
2707 struct sequence_stack *stack = seq_stack;
2708 /* Scan all pending sequences too. */
2709 for (; stack; stack = stack->next)
2710 if (insn == stack->last)
2721 /* Delete all insns made since FROM.
2722 FROM becomes the new last instruction. */
2725 delete_insns_since (from)
2731 NEXT_INSN (from) = 0;
2735 /* This function is deprecated, please use sequences instead.
2737 Move a consecutive bunch of insns to a different place in the chain.
2738 The insns to be moved are those between FROM and TO.
2739 They are moved to a new position after the insn AFTER.
2740 AFTER must not be FROM or TO or any insn in between.
2742 This function does not know about SEQUENCEs and hence should not be
2743 called after delay-slot filling has been done. */
2746 reorder_insns (from, to, after)
2747 rtx from, to, after;
2749 /* Splice this bunch out of where it is now. */
2750 if (PREV_INSN (from))
2751 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2753 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2754 if (last_insn == to)
2755 last_insn = PREV_INSN (from);
2756 if (first_insn == from)
2757 first_insn = NEXT_INSN (to);
2759 /* Make the new neighbors point to it and it to them. */
2760 if (NEXT_INSN (after))
2761 PREV_INSN (NEXT_INSN (after)) = to;
2763 NEXT_INSN (to) = NEXT_INSN (after);
2764 PREV_INSN (from) = after;
2765 NEXT_INSN (after) = from;
2766 if (after == last_insn)
2770 /* Return the line note insn preceding INSN. */
2773 find_line_note (insn)
2776 if (no_line_numbers)
2779 for (; insn; insn = PREV_INSN (insn))
2780 if (GET_CODE (insn) == NOTE
2781 && NOTE_LINE_NUMBER (insn) >= 0)
2787 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2788 of the moved insns when debugging. This may insert a note between AFTER
2789 and FROM, and another one after TO. */
2792 reorder_insns_with_line_notes (from, to, after)
2793 rtx from, to, after;
2795 rtx from_line = find_line_note (from);
2796 rtx after_line = find_line_note (after);
2798 reorder_insns (from, to, after);
2800 if (from_line == after_line)
2804 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2805 NOTE_LINE_NUMBER (from_line),
2808 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2809 NOTE_LINE_NUMBER (after_line),
2813 /* Remove unnecessary notes from the instruction stream. */
2816 remove_unnecessary_notes ()
2821 /* We must not remove the first instruction in the function because
2822 the compiler depends on the first instruction being a note. */
2823 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2825 /* Remember what's next. */
2826 next = NEXT_INSN (insn);
2828 /* We're only interested in notes. */
2829 if (GET_CODE (insn) != NOTE)
2832 /* By now, all notes indicating lexical blocks should have
2833 NOTE_BLOCK filled in. */
2834 if ((NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2835 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2836 && NOTE_BLOCK (insn) == NULL_TREE)
2839 /* Remove NOTE_INSN_DELETED notes. */
2840 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2842 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2844 /* Scan back to see if there are any non-note instructions
2845 between INSN and the beginning of this block. If not,
2846 then there is no PC range in the generated code that will
2847 actually be in this block, so there's no point in
2848 remembering the existence of the block. */
2851 for (prev = PREV_INSN (insn); prev; prev = PREV_INSN (prev))
2853 /* This block contains a real instruction. Note that we
2854 don't include labels; if the only thing in the block
2855 is a label, then there are still no PC values that
2856 lie within the block. */
2860 /* We're only interested in NOTEs. */
2861 if (GET_CODE (prev) != NOTE)
2864 if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_BEG)
2866 /* If the BLOCKs referred to by these notes don't
2867 match, then something is wrong with our BLOCK
2868 nesting structure. */
2869 if (NOTE_BLOCK (prev) != NOTE_BLOCK (insn))
2872 if (debug_ignore_block (NOTE_BLOCK (insn)))
2879 else if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_END)
2880 /* There's a nested block. We need to leave the
2881 current block in place since otherwise the debugger
2882 wouldn't be able to show symbols from our block in
2883 the nested block. */
2891 /* Emit an insn of given code and pattern
2892 at a specified place within the doubly-linked list. */
2894 /* Make an instruction with body PATTERN
2895 and output it before the instruction BEFORE. */
2898 emit_insn_before (pattern, before)
2899 register rtx pattern, before;
2901 register rtx insn = before;
2903 if (GET_CODE (pattern) == SEQUENCE)
2907 for (i = 0; i < XVECLEN (pattern, 0); i++)
2909 insn = XVECEXP (pattern, 0, i);
2910 add_insn_before (insn, before);
2915 insn = make_insn_raw (pattern);
2916 add_insn_before (insn, before);
2922 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2925 emit_block_insn_before (pattern, before, block)
2926 rtx pattern, before;
2929 rtx prev = PREV_INSN (before);
2930 rtx r = emit_insn_before (pattern, before);
2931 if (block && block->head == before)
2932 block->head = NEXT_INSN (prev);
2936 /* Make an instruction with body PATTERN and code JUMP_INSN
2937 and output it before the instruction BEFORE. */
2940 emit_jump_insn_before (pattern, before)
2941 register rtx pattern, before;
2945 if (GET_CODE (pattern) == SEQUENCE)
2946 insn = emit_insn_before (pattern, before);
2949 insn = make_jump_insn_raw (pattern);
2950 add_insn_before (insn, before);
2956 /* Make an instruction with body PATTERN and code CALL_INSN
2957 and output it before the instruction BEFORE. */
2960 emit_call_insn_before (pattern, before)
2961 register rtx pattern, before;
2965 if (GET_CODE (pattern) == SEQUENCE)
2966 insn = emit_insn_before (pattern, before);
2969 insn = make_call_insn_raw (pattern);
2970 add_insn_before (insn, before);
2971 PUT_CODE (insn, CALL_INSN);
2977 /* Make an insn of code BARRIER
2978 and output it before the insn BEFORE. */
2981 emit_barrier_before (before)
2982 register rtx before;
2984 register rtx insn = rtx_alloc (BARRIER);
2986 INSN_UID (insn) = cur_insn_uid++;
2988 add_insn_before (insn, before);
2992 /* Emit the label LABEL before the insn BEFORE. */
2995 emit_label_before (label, before)
2998 /* This can be called twice for the same label as a result of the
2999 confusion that follows a syntax error! So make it harmless. */
3000 if (INSN_UID (label) == 0)
3002 INSN_UID (label) = cur_insn_uid++;
3003 add_insn_before (label, before);
3009 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3012 emit_note_before (subtype, before)
3016 register rtx note = rtx_alloc (NOTE);
3017 INSN_UID (note) = cur_insn_uid++;
3018 NOTE_SOURCE_FILE (note) = 0;
3019 NOTE_LINE_NUMBER (note) = subtype;
3021 add_insn_before (note, before);
3025 /* Make an insn of code INSN with body PATTERN
3026 and output it after the insn AFTER. */
3029 emit_insn_after (pattern, after)
3030 register rtx pattern, after;
3032 register rtx insn = after;
3034 if (GET_CODE (pattern) == SEQUENCE)
3038 for (i = 0; i < XVECLEN (pattern, 0); i++)
3040 insn = XVECEXP (pattern, 0, i);
3041 add_insn_after (insn, after);
3047 insn = make_insn_raw (pattern);
3048 add_insn_after (insn, after);
3054 /* Similar to emit_insn_after, except that line notes are to be inserted so
3055 as to act as if this insn were at FROM. */
3058 emit_insn_after_with_line_notes (pattern, after, from)
3059 rtx pattern, after, from;
3061 rtx from_line = find_line_note (from);
3062 rtx after_line = find_line_note (after);
3063 rtx insn = emit_insn_after (pattern, after);
3066 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3067 NOTE_LINE_NUMBER (from_line),
3071 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3072 NOTE_LINE_NUMBER (after_line),
3076 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3079 emit_block_insn_after (pattern, after, block)
3083 rtx r = emit_insn_after (pattern, after);
3084 if (block && block->end == after)
3089 /* Make an insn of code JUMP_INSN with body PATTERN
3090 and output it after the insn AFTER. */
3093 emit_jump_insn_after (pattern, after)
3094 register rtx pattern, after;
3098 if (GET_CODE (pattern) == SEQUENCE)
3099 insn = emit_insn_after (pattern, after);
3102 insn = make_jump_insn_raw (pattern);
3103 add_insn_after (insn, after);
3109 /* Make an insn of code BARRIER
3110 and output it after the insn AFTER. */
3113 emit_barrier_after (after)
3116 register rtx insn = rtx_alloc (BARRIER);
3118 INSN_UID (insn) = cur_insn_uid++;
3120 add_insn_after (insn, after);
3124 /* Emit the label LABEL after the insn AFTER. */
3127 emit_label_after (label, after)
3130 /* This can be called twice for the same label
3131 as a result of the confusion that follows a syntax error!
3132 So make it harmless. */
3133 if (INSN_UID (label) == 0)
3135 INSN_UID (label) = cur_insn_uid++;
3136 add_insn_after (label, after);
3142 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3145 emit_note_after (subtype, after)
3149 register rtx note = rtx_alloc (NOTE);
3150 INSN_UID (note) = cur_insn_uid++;
3151 NOTE_SOURCE_FILE (note) = 0;
3152 NOTE_LINE_NUMBER (note) = subtype;
3153 add_insn_after (note, after);
3157 /* Emit a line note for FILE and LINE after the insn AFTER. */
3160 emit_line_note_after (file, line, after)
3167 if (no_line_numbers && line > 0)
3173 note = rtx_alloc (NOTE);
3174 INSN_UID (note) = cur_insn_uid++;
3175 NOTE_SOURCE_FILE (note) = file;
3176 NOTE_LINE_NUMBER (note) = line;
3177 add_insn_after (note, after);
3181 /* Make an insn of code INSN with pattern PATTERN
3182 and add it to the end of the doubly-linked list.
3183 If PATTERN is a SEQUENCE, take the elements of it
3184 and emit an insn for each element.
3186 Returns the last insn emitted. */
3192 rtx insn = last_insn;
3194 if (GET_CODE (pattern) == SEQUENCE)
3198 for (i = 0; i < XVECLEN (pattern, 0); i++)
3200 insn = XVECEXP (pattern, 0, i);
3206 insn = make_insn_raw (pattern);
3213 /* Emit the insns in a chain starting with INSN.
3214 Return the last insn emitted. */
3224 rtx next = NEXT_INSN (insn);
3233 /* Emit the insns in a chain starting with INSN and place them in front of
3234 the insn BEFORE. Return the last insn emitted. */
3237 emit_insns_before (insn, before)
3245 rtx next = NEXT_INSN (insn);
3246 add_insn_before (insn, before);
3254 /* Emit the insns in a chain starting with FIRST and place them in back of
3255 the insn AFTER. Return the last insn emitted. */
3258 emit_insns_after (first, after)
3263 register rtx after_after;
3271 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3274 after_after = NEXT_INSN (after);
3276 NEXT_INSN (after) = first;
3277 PREV_INSN (first) = after;
3278 NEXT_INSN (last) = after_after;
3280 PREV_INSN (after_after) = last;
3282 if (after == last_insn)
3287 /* Make an insn of code JUMP_INSN with pattern PATTERN
3288 and add it to the end of the doubly-linked list. */
3291 emit_jump_insn (pattern)
3294 if (GET_CODE (pattern) == SEQUENCE)
3295 return emit_insn (pattern);
3298 register rtx insn = make_jump_insn_raw (pattern);
3304 /* Make an insn of code CALL_INSN with pattern PATTERN
3305 and add it to the end of the doubly-linked list. */
3308 emit_call_insn (pattern)
3311 if (GET_CODE (pattern) == SEQUENCE)
3312 return emit_insn (pattern);
3315 register rtx insn = make_call_insn_raw (pattern);
3317 PUT_CODE (insn, CALL_INSN);
3322 /* Add the label LABEL to the end of the doubly-linked list. */
3328 /* This can be called twice for the same label
3329 as a result of the confusion that follows a syntax error!
3330 So make it harmless. */
3331 if (INSN_UID (label) == 0)
3333 INSN_UID (label) = cur_insn_uid++;
3339 /* Make an insn of code BARRIER
3340 and add it to the end of the doubly-linked list. */
3345 register rtx barrier = rtx_alloc (BARRIER);
3346 INSN_UID (barrier) = cur_insn_uid++;
3351 /* Make an insn of code NOTE
3352 with data-fields specified by FILE and LINE
3353 and add it to the end of the doubly-linked list,
3354 but only if line-numbers are desired for debugging info. */
3357 emit_line_note (file, line)
3361 set_file_and_line_for_stmt (file, line);
3364 if (no_line_numbers)
3368 return emit_note (file, line);
3371 /* Make an insn of code NOTE
3372 with data-fields specified by FILE and LINE
3373 and add it to the end of the doubly-linked list.
3374 If it is a line-number NOTE, omit it if it matches the previous one. */
3377 emit_note (file, line)
3385 if (file && last_filename && !strcmp (file, last_filename)
3386 && line == last_linenum)
3388 last_filename = file;
3389 last_linenum = line;
3392 if (no_line_numbers && line > 0)
3398 note = rtx_alloc (NOTE);
3399 INSN_UID (note) = cur_insn_uid++;
3400 NOTE_SOURCE_FILE (note) = file;
3401 NOTE_LINE_NUMBER (note) = line;
3406 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3409 emit_line_note_force (file, line)
3414 return emit_line_note (file, line);
3417 /* Cause next statement to emit a line note even if the line number
3418 has not changed. This is used at the beginning of a function. */
3421 force_next_line_note ()
3426 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3427 note of this type already exists, remove it first. */
3430 set_unique_reg_note (insn, kind, datum)
3435 rtx note = find_reg_note (insn, kind, NULL_RTX);
3437 /* First remove the note if there already is one. */
3439 remove_note (insn, note);
3441 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3444 /* Return an indication of which type of insn should have X as a body.
3445 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3451 if (GET_CODE (x) == CODE_LABEL)
3453 if (GET_CODE (x) == CALL)
3455 if (GET_CODE (x) == RETURN)
3457 if (GET_CODE (x) == SET)
3459 if (SET_DEST (x) == pc_rtx)
3461 else if (GET_CODE (SET_SRC (x)) == CALL)
3466 if (GET_CODE (x) == PARALLEL)
3469 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3470 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3472 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3473 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3475 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3476 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3482 /* Emit the rtl pattern X as an appropriate kind of insn.
3483 If X is a label, it is simply added into the insn chain. */
3489 enum rtx_code code = classify_insn (x);
3491 if (code == CODE_LABEL)
3492 return emit_label (x);
3493 else if (code == INSN)
3494 return emit_insn (x);
3495 else if (code == JUMP_INSN)
3497 register rtx insn = emit_jump_insn (x);
3498 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3499 return emit_barrier ();
3502 else if (code == CALL_INSN)
3503 return emit_call_insn (x);
3508 /* Begin emitting insns to a sequence which can be packaged in an
3509 RTL_EXPR. If this sequence will contain something that might cause
3510 the compiler to pop arguments to function calls (because those
3511 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3512 details), use do_pending_stack_adjust before calling this function.
3513 That will ensure that the deferred pops are not accidentally
3514 emitted in the middle of this sequence. */
3519 struct sequence_stack *tem;
3521 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3523 tem->next = seq_stack;
3524 tem->first = first_insn;
3525 tem->last = last_insn;
3526 tem->sequence_rtl_expr = seq_rtl_expr;
3534 /* Similarly, but indicate that this sequence will be placed in T, an
3535 RTL_EXPR. See the documentation for start_sequence for more
3536 information about how to use this function. */
3539 start_sequence_for_rtl_expr (t)
3547 /* Set up the insn chain starting with FIRST as the current sequence,
3548 saving the previously current one. See the documentation for
3549 start_sequence for more information about how to use this function. */
3552 push_to_sequence (first)
3559 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3565 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3568 push_to_full_sequence (first, last)
3574 /* We really should have the end of the insn chain here. */
3575 if (last && NEXT_INSN (last))
3579 /* Set up the outer-level insn chain
3580 as the current sequence, saving the previously current one. */
3583 push_topmost_sequence ()
3585 struct sequence_stack *stack, *top = NULL;
3589 for (stack = seq_stack; stack; stack = stack->next)
3592 first_insn = top->first;
3593 last_insn = top->last;
3594 seq_rtl_expr = top->sequence_rtl_expr;
3597 /* After emitting to the outer-level insn chain, update the outer-level
3598 insn chain, and restore the previous saved state. */
3601 pop_topmost_sequence ()
3603 struct sequence_stack *stack, *top = NULL;
3605 for (stack = seq_stack; stack; stack = stack->next)
3608 top->first = first_insn;
3609 top->last = last_insn;
3610 /* ??? Why don't we save seq_rtl_expr here? */
3615 /* After emitting to a sequence, restore previous saved state.
3617 To get the contents of the sequence just made, you must call
3618 `gen_sequence' *before* calling here.
3620 If the compiler might have deferred popping arguments while
3621 generating this sequence, and this sequence will not be immediately
3622 inserted into the instruction stream, use do_pending_stack_adjust
3623 before calling gen_sequence. That will ensure that the deferred
3624 pops are inserted into this sequence, and not into some random
3625 location in the instruction stream. See INHIBIT_DEFER_POP for more
3626 information about deferred popping of arguments. */
3631 struct sequence_stack *tem = seq_stack;
3633 first_insn = tem->first;
3634 last_insn = tem->last;
3635 seq_rtl_expr = tem->sequence_rtl_expr;
3636 seq_stack = tem->next;
3641 /* This works like end_sequence, but records the old sequence in FIRST
3645 end_full_sequence (first, last)
3648 *first = first_insn;
3653 /* Return 1 if currently emitting into a sequence. */
3658 return seq_stack != 0;
3661 /* Generate a SEQUENCE rtx containing the insns already emitted
3662 to the current sequence.
3664 This is how the gen_... function from a DEFINE_EXPAND
3665 constructs the SEQUENCE that it returns. */
3675 /* Count the insns in the chain. */
3677 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3680 /* If only one insn, return it rather than a SEQUENCE.
3681 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3682 the case of an empty list.)
3683 We only return the pattern of an insn if its code is INSN and it
3684 has no notes. This ensures that no information gets lost. */
3686 && ! RTX_FRAME_RELATED_P (first_insn)
3687 && GET_CODE (first_insn) == INSN
3688 /* Don't throw away any reg notes. */
3689 && REG_NOTES (first_insn) == 0)
3690 return PATTERN (first_insn);
3692 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3694 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3695 XVECEXP (result, 0, i) = tem;
3700 /* Put the various virtual registers into REGNO_REG_RTX. */
3703 init_virtual_regs (es)
3704 struct emit_status *es;
3706 rtx *ptr = es->x_regno_reg_rtx;
3707 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3708 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3709 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3710 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3711 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3715 clear_emit_caches ()
3719 /* Clear the start_sequence/gen_sequence cache. */
3720 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3721 sequence_result[i] = 0;
3725 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3726 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3727 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3728 static int copy_insn_n_scratches;
3730 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3731 copied an ASM_OPERANDS.
3732 In that case, it is the original input-operand vector. */
3733 static rtvec orig_asm_operands_vector;
3735 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3736 copied an ASM_OPERANDS.
3737 In that case, it is the copied input-operand vector. */
3738 static rtvec copy_asm_operands_vector;
3740 /* Likewise for the constraints vector. */
3741 static rtvec orig_asm_constraints_vector;
3742 static rtvec copy_asm_constraints_vector;
3744 /* Recursively create a new copy of an rtx for copy_insn.
3745 This function differs from copy_rtx in that it handles SCRATCHes and
3746 ASM_OPERANDs properly.
3747 Normally, this function is not used directly; use copy_insn as front end.
3748 However, you could first copy an insn pattern with copy_insn and then use
3749 this function afterwards to properly copy any REG_NOTEs containing
3758 register RTX_CODE code;
3759 register const char *format_ptr;
3761 code = GET_CODE (orig);
3777 for (i = 0; i < copy_insn_n_scratches; i++)
3778 if (copy_insn_scratch_in[i] == orig)
3779 return copy_insn_scratch_out[i];
3783 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3784 a LABEL_REF, it isn't sharable. */
3785 if (GET_CODE (XEXP (orig, 0)) == PLUS
3786 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3787 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3791 /* A MEM with a constant address is not sharable. The problem is that
3792 the constant address may need to be reloaded. If the mem is shared,
3793 then reloading one copy of this mem will cause all copies to appear
3794 to have been reloaded. */
3800 copy = rtx_alloc (code);
3802 /* Copy the various flags, and other information. We assume that
3803 all fields need copying, and then clear the fields that should
3804 not be copied. That is the sensible default behavior, and forces
3805 us to explicitly document why we are *not* copying a flag. */
3806 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3808 /* We do not copy the USED flag, which is used as a mark bit during
3809 walks over the RTL. */
3812 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3813 if (GET_RTX_CLASS (code) == 'i')
3817 copy->frame_related = 0;
3820 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3822 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3824 copy->fld[i] = orig->fld[i];
3825 switch (*format_ptr++)
3828 if (XEXP (orig, i) != NULL)
3829 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3834 if (XVEC (orig, i) == orig_asm_constraints_vector)
3835 XVEC (copy, i) = copy_asm_constraints_vector;
3836 else if (XVEC (orig, i) == orig_asm_operands_vector)
3837 XVEC (copy, i) = copy_asm_operands_vector;
3838 else if (XVEC (orig, i) != NULL)
3840 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3841 for (j = 0; j < XVECLEN (copy, i); j++)
3842 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3853 /* These are left unchanged. */
3861 if (code == SCRATCH)
3863 i = copy_insn_n_scratches++;
3864 if (i >= MAX_RECOG_OPERANDS)
3866 copy_insn_scratch_in[i] = orig;
3867 copy_insn_scratch_out[i] = copy;
3869 else if (code == ASM_OPERANDS)
3871 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
3872 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
3873 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
3874 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
3880 /* Create a new copy of an rtx.
3881 This function differs from copy_rtx in that it handles SCRATCHes and
3882 ASM_OPERANDs properly.
3883 INSN doesn't really have to be a full INSN; it could be just the
3889 copy_insn_n_scratches = 0;
3890 orig_asm_operands_vector = 0;
3891 orig_asm_constraints_vector = 0;
3892 copy_asm_operands_vector = 0;
3893 copy_asm_constraints_vector = 0;
3894 return copy_insn_1 (insn);
3897 /* Initialize data structures and variables in this file
3898 before generating rtl for each function. */
3903 struct function *f = cfun;
3905 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3908 seq_rtl_expr = NULL;
3910 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3913 first_label_num = label_num;
3917 clear_emit_caches ();
3919 /* Init the tables that describe all the pseudo regs. */
3921 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3923 f->emit->regno_pointer_flag
3924 = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
3926 f->emit->regno_pointer_align
3927 = (unsigned char *) xcalloc (f->emit->regno_pointer_flag_length,
3928 sizeof (unsigned char));
3931 = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
3934 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3935 init_virtual_regs (f->emit);
3937 /* Indicate that the virtual registers and stack locations are
3939 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3940 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3941 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3942 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3944 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3945 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3946 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3947 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3948 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3950 #ifdef STACK_BOUNDARY
3951 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3952 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3953 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3954 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
3956 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
3957 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
3958 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
3959 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
3960 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
3963 #ifdef INIT_EXPANDERS
3968 /* Mark SS for GC. */
3971 mark_sequence_stack (ss)
3972 struct sequence_stack *ss;
3976 ggc_mark_rtx (ss->first);
3977 ggc_mark_tree (ss->sequence_rtl_expr);
3982 /* Mark ES for GC. */
3985 mark_emit_status (es)
3986 struct emit_status *es;
3994 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
3998 mark_sequence_stack (es->sequence_stack);
3999 ggc_mark_tree (es->sequence_rtl_expr);
4000 ggc_mark_rtx (es->x_first_insn);
4003 /* Create some permanent unique rtl objects shared between all functions.
4004 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4007 init_emit_once (line_numbers)
4011 enum machine_mode mode;
4012 enum machine_mode double_mode;
4014 /* Initialize the CONST_INT hash table. */
4015 const_int_htab = htab_create (37, const_int_htab_hash,
4016 const_int_htab_eq, NULL);
4017 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4020 no_line_numbers = ! line_numbers;
4022 /* Compute the word and byte modes. */
4024 byte_mode = VOIDmode;
4025 word_mode = VOIDmode;
4026 double_mode = VOIDmode;
4028 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4029 mode = GET_MODE_WIDER_MODE (mode))
4031 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4032 && byte_mode == VOIDmode)
4035 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4036 && word_mode == VOIDmode)
4040 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4041 mode = GET_MODE_WIDER_MODE (mode))
4043 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4044 && double_mode == VOIDmode)
4048 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4050 /* Assign register numbers to the globally defined register rtx.
4051 This must be done at runtime because the register number field
4052 is in a union and some compilers can't initialize unions. */
4054 pc_rtx = gen_rtx (PC, VOIDmode);
4055 cc0_rtx = gen_rtx (CC0, VOIDmode);
4056 stack_pointer_rtx = gen_rtx_raw_REG (Pmode, STACK_POINTER_REGNUM);
4057 frame_pointer_rtx = gen_rtx_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4058 if (hard_frame_pointer_rtx == 0)
4059 hard_frame_pointer_rtx = gen_rtx_raw_REG (Pmode,
4060 HARD_FRAME_POINTER_REGNUM);
4061 if (arg_pointer_rtx == 0)
4062 arg_pointer_rtx = gen_rtx_raw_REG (Pmode, ARG_POINTER_REGNUM);
4063 virtual_incoming_args_rtx =
4064 gen_rtx_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4065 virtual_stack_vars_rtx =
4066 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4067 virtual_stack_dynamic_rtx =
4068 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4069 virtual_outgoing_args_rtx =
4070 gen_rtx_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4071 virtual_cfa_rtx = gen_rtx_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4073 /* These rtx must be roots if GC is enabled. */
4074 ggc_add_rtx_root (global_rtl, GR_MAX);
4076 #ifdef INIT_EXPANDERS
4077 /* This is to initialize save_machine_status and restore_machine_status before
4078 the first call to push_function_context_to. This is needed by the Chill
4079 front end which calls push_function_context_to before the first cal to
4080 init_function_start. */
4084 /* Create the unique rtx's for certain rtx codes and operand values. */
4086 /* Don't use gen_rtx here since gen_rtx in this case
4087 tries to use these variables. */
4088 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4089 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4090 gen_rtx_raw_CONST_INT (VOIDmode, i);
4091 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4093 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4094 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4095 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4097 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4099 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4100 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4101 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4102 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4104 for (i = 0; i <= 2; i++)
4106 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4107 mode = GET_MODE_WIDER_MODE (mode))
4109 rtx tem = rtx_alloc (CONST_DOUBLE);
4110 union real_extract u;
4112 memset ((char *) &u, 0, sizeof u); /* Zero any holes in a structure. */
4113 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4115 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4116 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4117 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4118 PUT_MODE (tem, mode);
4120 const_tiny_rtx[i][(int) mode] = tem;
4123 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4125 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4126 mode = GET_MODE_WIDER_MODE (mode))
4127 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4129 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4131 mode = GET_MODE_WIDER_MODE (mode))
4132 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4135 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
4136 if (GET_MODE_CLASS (mode) == MODE_CC)
4137 const_tiny_rtx[0][(int) mode] = const0_rtx;
4139 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4140 if (STORE_FLAG_VALUE == 1)
4141 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4143 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4144 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4145 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4146 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4147 ggc_add_rtx_root (&const_true_rtx, 1);
4149 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4150 return_address_pointer_rtx
4151 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4155 struct_value_rtx = STRUCT_VALUE;
4157 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4160 #ifdef STRUCT_VALUE_INCOMING
4161 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4163 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4164 struct_value_incoming_rtx
4165 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4167 struct_value_incoming_rtx = struct_value_rtx;
4171 #ifdef STATIC_CHAIN_REGNUM
4172 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4174 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4175 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4176 static_chain_incoming_rtx
4177 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4180 static_chain_incoming_rtx = static_chain_rtx;
4184 static_chain_rtx = STATIC_CHAIN;
4186 #ifdef STATIC_CHAIN_INCOMING
4187 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4189 static_chain_incoming_rtx = static_chain_rtx;
4193 #ifdef PIC_OFFSET_TABLE_REGNUM
4194 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4197 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4198 ggc_add_rtx_root (&struct_value_rtx, 1);
4199 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4200 ggc_add_rtx_root (&static_chain_rtx, 1);
4201 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4202 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4205 /* Query and clear/ restore no_line_numbers. This is used by the
4206 switch / case handling in stmt.c to give proper line numbers in
4207 warnings about unreachable code. */
4210 force_line_numbers ()
4212 int old = no_line_numbers;
4214 no_line_numbers = 0;
4216 force_next_line_note ();
4221 restore_line_number_status (old_value)
4224 no_line_numbers = old_value;