1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl[GR_MAX];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab;
147 /* A hash table storing memory attribute structures. */
148 static htab_t mem_attrs_htab;
150 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
151 shortly thrown away. We use two mechanisms to prevent this waste:
153 For sizes up to 5 elements, we keep a SEQUENCE and its associated
154 rtvec for use by gen_sequence. One entry for each size is
155 sufficient because most cases are calls to gen_sequence followed by
156 immediately emitting the SEQUENCE. Reuse is safe since emitting a
157 sequence is destructive on the insn in it anyway and hence can't be
160 We do not bother to save this cached data over nested function calls.
161 Instead, we just reinitialize them. */
163 #define SEQUENCE_RESULT_SIZE 5
165 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
167 /* During RTL generation, we also keep a list of free INSN rtl codes. */
168 static rtx free_insn;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_linenum (cfun->emit->x_last_linenum)
174 #define last_filename (cfun->emit->x_last_filename)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw PARAMS ((rtx));
178 static rtx make_call_insn_raw PARAMS ((rtx));
179 static rtx find_line_note PARAMS ((rtx));
180 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
181 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
183 static void unshare_all_rtl_1 PARAMS ((rtx));
184 static void unshare_all_decls PARAMS ((tree));
185 static void reset_used_decls PARAMS ((tree));
186 static void mark_label_nuses PARAMS ((rtx));
187 static hashval_t const_int_htab_hash PARAMS ((const void *));
188 static int const_int_htab_eq PARAMS ((const void *,
190 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
191 static int mem_attrs_htab_eq PARAMS ((const void *,
193 static void mem_attrs_mark PARAMS ((const void *));
194 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
198 /* Probability of the conditional branch currently proceeded by try_split.
199 Set to -1 otherwise. */
200 int split_branch_probability = -1;
202 /* Returns a hash code for X (which is a really a CONST_INT). */
205 const_int_htab_hash (x)
208 return (hashval_t) INTVAL ((const struct rtx_def *) x);
211 /* Returns non-zero if the value represented by X (which is really a
212 CONST_INT) is the same as that given by Y (which is really a
216 const_int_htab_eq (x, y)
220 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
223 /* Returns a hash code for X (which is a really a mem_attrs *). */
226 mem_attrs_htab_hash (x)
229 mem_attrs *p = (mem_attrs *) x;
231 return (p->alias ^ (p->align * 1000)
232 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
233 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
237 /* Returns non-zero if the value represented by X (which is really a
238 mem_attrs *) is the same as that given by Y (which is also really a
242 mem_attrs_htab_eq (x, y)
246 mem_attrs *p = (mem_attrs *) x;
247 mem_attrs *q = (mem_attrs *) y;
249 return (p->alias == q->alias && p->decl == q->decl && p->offset == q->offset
250 && p->size == q->size && p->align == q->align);
253 /* This routine is called when we determine that we need a mem_attrs entry.
254 It marks the associated decl and RTL as being used, if present. */
260 mem_attrs *p = (mem_attrs *) x;
263 ggc_mark_tree (p->decl);
266 ggc_mark_rtx (p->offset);
269 ggc_mark_rtx (p->size);
272 /* Allocate a new mem_attrs structure and insert it into the hash table if
273 one identical to it is not already in the table. We are doing this for
277 get_mem_attrs (alias, decl, offset, size, align, mode)
283 enum machine_mode mode;
288 /* If everything is the default, we can just return zero. */
289 if (alias == 0 && decl == 0 && offset == 0
291 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
293 || (mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
298 attrs.offset = offset;
302 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
305 *slot = ggc_alloc (sizeof (mem_attrs));
306 memcpy (*slot, &attrs, sizeof (mem_attrs));
312 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
313 don't attempt to share with the various global pieces of rtl (such as
314 frame_pointer_rtx). */
317 gen_raw_REG (mode, regno)
318 enum machine_mode mode;
321 rtx x = gen_rtx_raw_REG (mode, regno);
322 ORIGINAL_REGNO (x) = regno;
326 /* There are some RTL codes that require special attention; the generation
327 functions do the raw handling. If you add to this list, modify
328 special_rtx in gengenrtl.c as well. */
331 gen_rtx_CONST_INT (mode, arg)
332 enum machine_mode mode ATTRIBUTE_UNUSED;
337 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
338 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
340 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
341 if (const_true_rtx && arg == STORE_FLAG_VALUE)
342 return const_true_rtx;
345 /* Look up the CONST_INT in the hash table. */
346 slot = htab_find_slot_with_hash (const_int_htab, &arg,
347 (hashval_t) arg, INSERT);
349 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
354 /* CONST_DOUBLEs needs special handling because their length is known
358 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
359 enum machine_mode mode;
361 HOST_WIDE_INT arg1, arg2;
363 rtx r = rtx_alloc (CONST_DOUBLE);
368 X0EXP (r, 1) = NULL_RTX;
372 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
379 gen_rtx_REG (mode, regno)
380 enum machine_mode mode;
383 /* In case the MD file explicitly references the frame pointer, have
384 all such references point to the same frame pointer. This is
385 used during frame pointer elimination to distinguish the explicit
386 references to these registers from pseudos that happened to be
389 If we have eliminated the frame pointer or arg pointer, we will
390 be using it as a normal register, for example as a spill
391 register. In such cases, we might be accessing it in a mode that
392 is not Pmode and therefore cannot use the pre-allocated rtx.
394 Also don't do this when we are making new REGs in reload, since
395 we don't want to get confused with the real pointers. */
397 if (mode == Pmode && !reload_in_progress)
399 if (regno == FRAME_POINTER_REGNUM)
400 return frame_pointer_rtx;
401 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
402 if (regno == HARD_FRAME_POINTER_REGNUM)
403 return hard_frame_pointer_rtx;
405 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
406 if (regno == ARG_POINTER_REGNUM)
407 return arg_pointer_rtx;
409 #ifdef RETURN_ADDRESS_POINTER_REGNUM
410 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
411 return return_address_pointer_rtx;
413 if (regno == STACK_POINTER_REGNUM)
414 return stack_pointer_rtx;
417 return gen_raw_REG (mode, regno);
421 gen_rtx_MEM (mode, addr)
422 enum machine_mode mode;
425 rtx rt = gen_rtx_raw_MEM (mode, addr);
427 /* This field is not cleared by the mere allocation of the rtx, so
435 gen_rtx_SUBREG (mode, reg, offset)
436 enum machine_mode mode;
440 /* This is the most common failure type.
441 Catch it early so we can see who does it. */
442 if ((offset % GET_MODE_SIZE (mode)) != 0)
445 /* This check isn't usable right now because combine will
446 throw arbitrary crap like a CALL into a SUBREG in
447 gen_lowpart_for_combine so we must just eat it. */
449 /* Check for this too. */
450 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
453 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
456 /* Generate a SUBREG representing the least-significant part of REG if MODE
457 is smaller than mode of REG, otherwise paradoxical SUBREG. */
460 gen_lowpart_SUBREG (mode, reg)
461 enum machine_mode mode;
464 enum machine_mode inmode;
466 inmode = GET_MODE (reg);
467 if (inmode == VOIDmode)
469 return gen_rtx_SUBREG (mode, reg,
470 subreg_lowpart_offset (mode, inmode));
473 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
475 ** This routine generates an RTX of the size specified by
476 ** <code>, which is an RTX code. The RTX structure is initialized
477 ** from the arguments <element1> through <elementn>, which are
478 ** interpreted according to the specific RTX type's format. The
479 ** special machine mode associated with the rtx (if any) is specified
482 ** gen_rtx can be invoked in a way which resembles the lisp-like
483 ** rtx it will generate. For example, the following rtx structure:
485 ** (plus:QI (mem:QI (reg:SI 1))
486 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
488 ** ...would be generated by the following C code:
490 ** gen_rtx (PLUS, QImode,
491 ** gen_rtx (MEM, QImode,
492 ** gen_rtx (REG, SImode, 1)),
493 ** gen_rtx (MEM, QImode,
494 ** gen_rtx (PLUS, SImode,
495 ** gen_rtx (REG, SImode, 2),
496 ** gen_rtx (REG, SImode, 3)))),
501 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
503 int i; /* Array indices... */
504 const char *fmt; /* Current rtx's format... */
505 rtx rt_val; /* RTX to return to caller... */
508 VA_FIXEDARG (p, enum rtx_code, code);
509 VA_FIXEDARG (p, enum machine_mode, mode);
514 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
519 rtx arg0 = va_arg (p, rtx);
520 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
521 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
522 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
527 rt_val = gen_rtx_REG (mode, va_arg (p, int));
531 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
535 rt_val = rtx_alloc (code); /* Allocate the storage space. */
536 rt_val->mode = mode; /* Store the machine mode... */
538 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
539 for (i = 0; i < GET_RTX_LENGTH (code); i++)
543 case '0': /* Unused field. */
546 case 'i': /* An integer? */
547 XINT (rt_val, i) = va_arg (p, int);
550 case 'w': /* A wide integer? */
551 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
554 case 's': /* A string? */
555 XSTR (rt_val, i) = va_arg (p, char *);
558 case 'e': /* An expression? */
559 case 'u': /* An insn? Same except when printing. */
560 XEXP (rt_val, i) = va_arg (p, rtx);
563 case 'E': /* An RTX vector? */
564 XVEC (rt_val, i) = va_arg (p, rtvec);
567 case 'b': /* A bitmap? */
568 XBITMAP (rt_val, i) = va_arg (p, bitmap);
571 case 't': /* A tree? */
572 XTREE (rt_val, i) = va_arg (p, tree);
586 /* gen_rtvec (n, [rt1, ..., rtn])
588 ** This routine creates an rtvec and stores within it the
589 ** pointers to rtx's which are its arguments.
594 gen_rtvec VPARAMS ((int n, ...))
600 VA_FIXEDARG (p, int, n);
603 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
605 vector = (rtx *) alloca (n * sizeof (rtx));
607 for (i = 0; i < n; i++)
608 vector[i] = va_arg (p, rtx);
610 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
614 return gen_rtvec_v (save_n, vector);
618 gen_rtvec_v (n, argp)
626 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
628 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
630 for (i = 0; i < n; i++)
631 rt_val->elem[i] = *argp++;
636 /* Generate a REG rtx for a new pseudo register of mode MODE.
637 This pseudo is assigned the next sequential register number. */
641 enum machine_mode mode;
643 struct function *f = cfun;
646 /* Don't let anything called after initial flow analysis create new
651 if (generating_concat_p
652 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
653 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
655 /* For complex modes, don't make a single pseudo.
656 Instead, make a CONCAT of two pseudos.
657 This allows noncontiguous allocation of the real and imaginary parts,
658 which makes much better code. Besides, allocating DCmode
659 pseudos overstrains reload on some machines like the 386. */
660 rtx realpart, imagpart;
661 int size = GET_MODE_UNIT_SIZE (mode);
662 enum machine_mode partmode
663 = mode_for_size (size * BITS_PER_UNIT,
664 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
665 ? MODE_FLOAT : MODE_INT),
668 realpart = gen_reg_rtx (partmode);
669 imagpart = gen_reg_rtx (partmode);
670 return gen_rtx_CONCAT (mode, realpart, imagpart);
673 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
674 enough to have an element for this pseudo reg number. */
676 if (reg_rtx_no == f->emit->regno_pointer_align_length)
678 int old_size = f->emit->regno_pointer_align_length;
683 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
684 memset (new + old_size, 0, old_size);
685 f->emit->regno_pointer_align = (unsigned char *) new;
687 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
688 old_size * 2 * sizeof (rtx));
689 memset (new1 + old_size, 0, old_size * sizeof (rtx));
690 regno_reg_rtx = new1;
692 new2 = (tree *) xrealloc (f->emit->regno_decl,
693 old_size * 2 * sizeof (tree));
694 memset (new2 + old_size, 0, old_size * sizeof (tree));
695 f->emit->regno_decl = new2;
697 f->emit->regno_pointer_align_length = old_size * 2;
700 val = gen_raw_REG (mode, reg_rtx_no);
701 regno_reg_rtx[reg_rtx_no++] = val;
705 /* Identify REG (which may be a CONCAT) as a user register. */
711 if (GET_CODE (reg) == CONCAT)
713 REG_USERVAR_P (XEXP (reg, 0)) = 1;
714 REG_USERVAR_P (XEXP (reg, 1)) = 1;
716 else if (GET_CODE (reg) == REG)
717 REG_USERVAR_P (reg) = 1;
722 /* Identify REG as a probable pointer register and show its alignment
723 as ALIGN, if nonzero. */
726 mark_reg_pointer (reg, align)
730 if (! REG_POINTER (reg))
732 REG_POINTER (reg) = 1;
735 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
737 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
738 /* We can no-longer be sure just how aligned this pointer is */
739 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
742 /* Return 1 plus largest pseudo reg number used in the current function. */
750 /* Return 1 + the largest label number used so far in the current function. */
755 if (last_label_num && label_num == base_label_num)
756 return last_label_num;
760 /* Return first label number used in this function (if any were used). */
763 get_first_label_num ()
765 return first_label_num;
768 /* Return the final regno of X, which is a SUBREG of a hard
771 subreg_hard_regno (x, check_mode)
775 enum machine_mode mode = GET_MODE (x);
776 unsigned int byte_offset, base_regno, final_regno;
777 rtx reg = SUBREG_REG (x);
779 /* This is where we attempt to catch illegal subregs
780 created by the compiler. */
781 if (GET_CODE (x) != SUBREG
782 || GET_CODE (reg) != REG)
784 base_regno = REGNO (reg);
785 if (base_regno >= FIRST_PSEUDO_REGISTER)
787 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
790 /* Catch non-congruent offsets too. */
791 byte_offset = SUBREG_BYTE (x);
792 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
795 final_regno = subreg_regno (x);
800 /* Return a value representing some low-order bits of X, where the number
801 of low-order bits is given by MODE. Note that no conversion is done
802 between floating-point and fixed-point values, rather, the bit
803 representation is returned.
805 This function handles the cases in common between gen_lowpart, below,
806 and two variants in cse.c and combine.c. These are the cases that can
807 be safely handled at all points in the compilation.
809 If this is not a case we can handle, return 0. */
812 gen_lowpart_common (mode, x)
813 enum machine_mode mode;
816 int msize = GET_MODE_SIZE (mode);
817 int xsize = GET_MODE_SIZE (GET_MODE (x));
820 if (GET_MODE (x) == mode)
823 /* MODE must occupy no more words than the mode of X. */
824 if (GET_MODE (x) != VOIDmode
825 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
826 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
829 offset = subreg_lowpart_offset (mode, GET_MODE (x));
831 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
832 && (GET_MODE_CLASS (mode) == MODE_INT
833 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
835 /* If we are getting the low-order part of something that has been
836 sign- or zero-extended, we can either just use the object being
837 extended or make a narrower extension. If we want an even smaller
838 piece than the size of the object being extended, call ourselves
841 This case is used mostly by combine and cse. */
843 if (GET_MODE (XEXP (x, 0)) == mode)
845 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
846 return gen_lowpart_common (mode, XEXP (x, 0));
847 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
848 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
850 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
851 || GET_CODE (x) == CONCAT)
852 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
853 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
854 from the low-order part of the constant. */
855 else if ((GET_MODE_CLASS (mode) == MODE_INT
856 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
857 && GET_MODE (x) == VOIDmode
858 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
860 /* If MODE is twice the host word size, X is already the desired
861 representation. Otherwise, if MODE is wider than a word, we can't
862 do this. If MODE is exactly a word, return just one CONST_INT. */
864 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
866 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
868 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
869 return (GET_CODE (x) == CONST_INT ? x
870 : GEN_INT (CONST_DOUBLE_LOW (x)));
873 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
874 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
875 : CONST_DOUBLE_LOW (x));
877 /* Sign extend to HOST_WIDE_INT. */
878 val = trunc_int_for_mode (val, mode);
880 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
885 #ifndef REAL_ARITHMETIC
886 /* If X is an integral constant but we want it in floating-point, it
887 must be the case that we have a union of an integer and a floating-point
888 value. If the machine-parameters allow it, simulate that union here
889 and return the result. The two-word and single-word cases are
892 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
893 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
894 || flag_pretend_float)
895 && GET_MODE_CLASS (mode) == MODE_FLOAT
896 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
897 && GET_CODE (x) == CONST_INT
898 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
900 union {HOST_WIDE_INT i; float d; } u;
903 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
905 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
906 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
907 || flag_pretend_float)
908 && GET_MODE_CLASS (mode) == MODE_FLOAT
909 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
910 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
911 && GET_MODE (x) == VOIDmode
912 && (sizeof (double) * HOST_BITS_PER_CHAR
913 == 2 * HOST_BITS_PER_WIDE_INT))
915 union {HOST_WIDE_INT i[2]; double d; } u;
916 HOST_WIDE_INT low, high;
918 if (GET_CODE (x) == CONST_INT)
919 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
921 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
923 #ifdef HOST_WORDS_BIG_ENDIAN
924 u.i[0] = high, u.i[1] = low;
926 u.i[0] = low, u.i[1] = high;
929 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
932 /* Similarly, if this is converting a floating-point value into a
933 single-word integer. Only do this is the host and target parameters are
936 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
937 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
938 || flag_pretend_float)
939 && (GET_MODE_CLASS (mode) == MODE_INT
940 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
941 && GET_CODE (x) == CONST_DOUBLE
942 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
943 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
944 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
946 /* Similarly, if this is converting a floating-point value into a
947 two-word integer, we can do this one word at a time and make an
948 integer. Only do this is the host and target parameters are
951 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
952 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
953 || flag_pretend_float)
954 && (GET_MODE_CLASS (mode) == MODE_INT
955 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
956 && GET_CODE (x) == CONST_DOUBLE
957 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
958 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
960 rtx lowpart, highpart;
962 lowpart = constant_subword (x,
963 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
965 highpart = constant_subword (x,
966 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
968 if (lowpart && GET_CODE (lowpart) == CONST_INT
969 && highpart && GET_CODE (highpart) == CONST_INT)
970 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
972 #else /* ifndef REAL_ARITHMETIC */
974 /* When we have a FP emulator, we can handle all conversions between
975 FP and integer operands. This simplifies reload because it
976 doesn't have to deal with constructs like (subreg:DI
977 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
978 /* Single-precision floats are always 32-bits and double-precision
979 floats are always 64-bits. */
981 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
982 && GET_MODE_BITSIZE (mode) == 32
983 && GET_CODE (x) == CONST_INT)
989 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
990 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
992 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
993 && GET_MODE_BITSIZE (mode) == 64
994 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
995 && GET_MODE (x) == VOIDmode)
999 HOST_WIDE_INT low, high;
1001 if (GET_CODE (x) == CONST_INT)
1004 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1008 low = CONST_DOUBLE_LOW (x);
1009 high = CONST_DOUBLE_HIGH (x);
1012 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1014 if (WORDS_BIG_ENDIAN)
1015 i[0] = high, i[1] = low;
1017 i[0] = low, i[1] = high;
1019 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1020 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1022 else if ((GET_MODE_CLASS (mode) == MODE_INT
1023 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1024 && GET_CODE (x) == CONST_DOUBLE
1025 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1028 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1029 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1031 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1032 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1035 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
1039 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
1042 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1046 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1052 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1054 #if HOST_BITS_PER_WIDE_INT == 32
1055 return immed_double_const (i[endian], i[1 - endian], mode);
1060 if (HOST_BITS_PER_WIDE_INT != 64)
1063 for (c = 0; c < 4; c++)
1066 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1070 return immed_double_const (((unsigned long) i[endian]) |
1071 (((HOST_WIDE_INT) i[1-endian]) << 32),
1075 return immed_double_const (((unsigned long) i[endian*3]) |
1076 (((HOST_WIDE_INT) i[1+endian]) << 32),
1077 ((unsigned long) i[2-endian]) |
1078 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1086 #endif /* ifndef REAL_ARITHMETIC */
1088 /* Otherwise, we can't do this. */
1092 /* Return the real part (which has mode MODE) of a complex value X.
1093 This always comes at the low address in memory. */
1096 gen_realpart (mode, x)
1097 enum machine_mode mode;
1100 if (WORDS_BIG_ENDIAN
1101 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1103 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1105 ("Can't access real part of complex value in hard register");
1106 else if (WORDS_BIG_ENDIAN)
1107 return gen_highpart (mode, x);
1109 return gen_lowpart (mode, x);
1112 /* Return the imaginary part (which has mode MODE) of a complex value X.
1113 This always comes at the high address in memory. */
1116 gen_imagpart (mode, x)
1117 enum machine_mode mode;
1120 if (WORDS_BIG_ENDIAN)
1121 return gen_lowpart (mode, x);
1122 else if (! WORDS_BIG_ENDIAN
1123 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1125 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1127 ("can't access imaginary part of complex value in hard register");
1129 return gen_highpart (mode, x);
1132 /* Return 1 iff X, assumed to be a SUBREG,
1133 refers to the real part of the complex value in its containing reg.
1134 Complex values are always stored with the real part in the first word,
1135 regardless of WORDS_BIG_ENDIAN. */
1138 subreg_realpart_p (x)
1141 if (GET_CODE (x) != SUBREG)
1144 return ((unsigned int) SUBREG_BYTE (x)
1145 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1148 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1149 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1150 least-significant part of X.
1151 MODE specifies how big a part of X to return;
1152 it usually should not be larger than a word.
1153 If X is a MEM whose address is a QUEUED, the value may be so also. */
1156 gen_lowpart (mode, x)
1157 enum machine_mode mode;
1160 rtx result = gen_lowpart_common (mode, x);
1164 else if (GET_CODE (x) == REG)
1166 /* Must be a hard reg that's not valid in MODE. */
1167 result = gen_lowpart_common (mode, copy_to_reg (x));
1172 else if (GET_CODE (x) == MEM)
1174 /* The only additional case we can do is MEM. */
1176 if (WORDS_BIG_ENDIAN)
1177 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1178 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1180 if (BYTES_BIG_ENDIAN)
1181 /* Adjust the address so that the address-after-the-data
1183 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1184 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1186 return adjust_address (x, mode, offset);
1188 else if (GET_CODE (x) == ADDRESSOF)
1189 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1194 /* Like `gen_lowpart', but refer to the most significant part.
1195 This is used to access the imaginary part of a complex number. */
1198 gen_highpart (mode, x)
1199 enum machine_mode mode;
1202 unsigned int msize = GET_MODE_SIZE (mode);
1205 /* This case loses if X is a subreg. To catch bugs early,
1206 complain if an invalid MODE is used even in other cases. */
1207 if (msize > UNITS_PER_WORD
1208 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1211 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1212 subreg_highpart_offset (mode, GET_MODE (x)));
1214 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1215 the target if we have a MEM. gen_highpart must return a valid operand,
1216 emitting code if necessary to do so. */
1217 if (GET_CODE (result) == MEM)
1218 result = validize_mem (result);
1225 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1226 be VOIDmode constant. */
1228 gen_highpart_mode (outermode, innermode, exp)
1229 enum machine_mode outermode, innermode;
1232 if (GET_MODE (exp) != VOIDmode)
1234 if (GET_MODE (exp) != innermode)
1236 return gen_highpart (outermode, exp);
1238 return simplify_gen_subreg (outermode, exp, innermode,
1239 subreg_highpart_offset (outermode, innermode));
1241 /* Return offset in bytes to get OUTERMODE low part
1242 of the value in mode INNERMODE stored in memory in target format. */
1245 subreg_lowpart_offset (outermode, innermode)
1246 enum machine_mode outermode, innermode;
1248 unsigned int offset = 0;
1249 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1253 if (WORDS_BIG_ENDIAN)
1254 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1255 if (BYTES_BIG_ENDIAN)
1256 offset += difference % UNITS_PER_WORD;
1262 /* Return offset in bytes to get OUTERMODE high part
1263 of the value in mode INNERMODE stored in memory in target format. */
1265 subreg_highpart_offset (outermode, innermode)
1266 enum machine_mode outermode, innermode;
1268 unsigned int offset = 0;
1269 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1271 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1276 if (! WORDS_BIG_ENDIAN)
1277 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1278 if (! BYTES_BIG_ENDIAN)
1279 offset += difference % UNITS_PER_WORD;
1285 /* Return 1 iff X, assumed to be a SUBREG,
1286 refers to the least significant part of its containing reg.
1287 If X is not a SUBREG, always return 1 (it is its own low part!). */
1290 subreg_lowpart_p (x)
1293 if (GET_CODE (x) != SUBREG)
1295 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1298 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1299 == SUBREG_BYTE (x));
1303 /* Helper routine for all the constant cases of operand_subword.
1304 Some places invoke this directly. */
1307 constant_subword (op, offset, mode)
1310 enum machine_mode mode;
1312 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1315 /* If OP is already an integer word, return it. */
1316 if (GET_MODE_CLASS (mode) == MODE_INT
1317 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1320 #ifdef REAL_ARITHMETIC
1321 /* The output is some bits, the width of the target machine's word.
1322 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1324 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1325 && GET_MODE_CLASS (mode) == MODE_FLOAT
1326 && GET_MODE_BITSIZE (mode) == 64
1327 && GET_CODE (op) == CONST_DOUBLE)
1332 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1333 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1335 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1336 which the words are written depends on the word endianness.
1337 ??? This is a potential portability problem and should
1338 be fixed at some point.
1340 We must excercise caution with the sign bit. By definition there
1341 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1342 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1343 So we explicitly mask and sign-extend as necessary. */
1344 if (BITS_PER_WORD == 32)
1347 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1348 return GEN_INT (val);
1350 #if HOST_BITS_PER_WIDE_INT >= 64
1351 else if (BITS_PER_WORD >= 64 && offset == 0)
1353 val = k[! WORDS_BIG_ENDIAN];
1354 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1355 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1356 return GEN_INT (val);
1359 else if (BITS_PER_WORD == 16)
1361 val = k[offset >> 1];
1362 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1364 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1365 return GEN_INT (val);
1370 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1371 && GET_MODE_CLASS (mode) == MODE_FLOAT
1372 && GET_MODE_BITSIZE (mode) > 64
1373 && GET_CODE (op) == CONST_DOUBLE)
1378 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1379 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1381 if (BITS_PER_WORD == 32)
1384 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1385 return GEN_INT (val);
1387 #if HOST_BITS_PER_WIDE_INT >= 64
1388 else if (BITS_PER_WORD >= 64 && offset <= 1)
1390 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1391 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1392 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1393 return GEN_INT (val);
1399 #else /* no REAL_ARITHMETIC */
1400 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1401 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1402 || flag_pretend_float)
1403 && GET_MODE_CLASS (mode) == MODE_FLOAT
1404 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1405 && GET_CODE (op) == CONST_DOUBLE)
1407 /* The constant is stored in the host's word-ordering,
1408 but we want to access it in the target's word-ordering. Some
1409 compilers don't like a conditional inside macro args, so we have two
1410 copies of the return. */
1411 #ifdef HOST_WORDS_BIG_ENDIAN
1412 return GEN_INT (offset == WORDS_BIG_ENDIAN
1413 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1415 return GEN_INT (offset != WORDS_BIG_ENDIAN
1416 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1419 #endif /* no REAL_ARITHMETIC */
1421 /* Single word float is a little harder, since single- and double-word
1422 values often do not have the same high-order bits. We have already
1423 verified that we want the only defined word of the single-word value. */
1424 #ifdef REAL_ARITHMETIC
1425 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1426 && GET_MODE_BITSIZE (mode) == 32
1427 && GET_CODE (op) == CONST_DOUBLE)
1432 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1433 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1435 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1437 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1439 if (BITS_PER_WORD == 16)
1441 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1443 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1446 return GEN_INT (val);
1449 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1450 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1451 || flag_pretend_float)
1452 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1453 && GET_MODE_CLASS (mode) == MODE_FLOAT
1454 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1455 && GET_CODE (op) == CONST_DOUBLE)
1458 union {float f; HOST_WIDE_INT i; } u;
1460 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1463 return GEN_INT (u.i);
1465 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1466 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1467 || flag_pretend_float)
1468 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1469 && GET_MODE_CLASS (mode) == MODE_FLOAT
1470 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1471 && GET_CODE (op) == CONST_DOUBLE)
1474 union {double d; HOST_WIDE_INT i; } u;
1476 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1479 return GEN_INT (u.i);
1481 #endif /* no REAL_ARITHMETIC */
1483 /* The only remaining cases that we can handle are integers.
1484 Convert to proper endianness now since these cases need it.
1485 At this point, offset == 0 means the low-order word.
1487 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1488 in general. However, if OP is (const_int 0), we can just return
1491 if (op == const0_rtx)
1494 if (GET_MODE_CLASS (mode) != MODE_INT
1495 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1496 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1499 if (WORDS_BIG_ENDIAN)
1500 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1502 /* Find out which word on the host machine this value is in and get
1503 it from the constant. */
1504 val = (offset / size_ratio == 0
1505 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1506 : (GET_CODE (op) == CONST_INT
1507 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1509 /* Get the value we want into the low bits of val. */
1510 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1511 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1513 val = trunc_int_for_mode (val, word_mode);
1515 return GEN_INT (val);
1518 /* Return subword OFFSET of operand OP.
1519 The word number, OFFSET, is interpreted as the word number starting
1520 at the low-order address. OFFSET 0 is the low-order word if not
1521 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1523 If we cannot extract the required word, we return zero. Otherwise,
1524 an rtx corresponding to the requested word will be returned.
1526 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1527 reload has completed, a valid address will always be returned. After
1528 reload, if a valid address cannot be returned, we return zero.
1530 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1531 it is the responsibility of the caller.
1533 MODE is the mode of OP in case it is a CONST_INT.
1535 ??? This is still rather broken for some cases. The problem for the
1536 moment is that all callers of this thing provide no 'goal mode' to
1537 tell us to work with. This exists because all callers were written
1538 in a word based SUBREG world.
1539 Now use of this function can be deprecated by simplify_subreg in most
1544 operand_subword (op, offset, validate_address, mode)
1546 unsigned int offset;
1547 int validate_address;
1548 enum machine_mode mode;
1550 if (mode == VOIDmode)
1551 mode = GET_MODE (op);
1553 if (mode == VOIDmode)
1556 /* If OP is narrower than a word, fail. */
1558 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1561 /* If we want a word outside OP, return zero. */
1563 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1566 /* Form a new MEM at the requested address. */
1567 if (GET_CODE (op) == MEM)
1569 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1571 if (! validate_address)
1574 else if (reload_completed)
1576 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1580 return replace_equiv_address (new, XEXP (new, 0));
1583 /* Rest can be handled by simplify_subreg. */
1584 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1587 /* Similar to `operand_subword', but never return 0. If we can't extract
1588 the required subword, put OP into a register and try again. If that fails,
1589 abort. We always validate the address in this case.
1591 MODE is the mode of OP, in case it is CONST_INT. */
1594 operand_subword_force (op, offset, mode)
1596 unsigned int offset;
1597 enum machine_mode mode;
1599 rtx result = operand_subword (op, offset, 1, mode);
1604 if (mode != BLKmode && mode != VOIDmode)
1606 /* If this is a register which can not be accessed by words, copy it
1607 to a pseudo register. */
1608 if (GET_CODE (op) == REG)
1609 op = copy_to_reg (op);
1611 op = force_reg (mode, op);
1614 result = operand_subword (op, offset, 1, mode);
1621 /* Given a compare instruction, swap the operands.
1622 A test instruction is changed into a compare of 0 against the operand. */
1625 reverse_comparison (insn)
1628 rtx body = PATTERN (insn);
1631 if (GET_CODE (body) == SET)
1632 comp = SET_SRC (body);
1634 comp = SET_SRC (XVECEXP (body, 0, 0));
1636 if (GET_CODE (comp) == COMPARE)
1638 rtx op0 = XEXP (comp, 0);
1639 rtx op1 = XEXP (comp, 1);
1640 XEXP (comp, 0) = op1;
1641 XEXP (comp, 1) = op0;
1645 rtx new = gen_rtx_COMPARE (VOIDmode,
1646 CONST0_RTX (GET_MODE (comp)), comp);
1647 if (GET_CODE (body) == SET)
1648 SET_SRC (body) = new;
1650 SET_SRC (XVECEXP (body, 0, 0)) = new;
1655 /* Given REF, a MEM, and T, either the type of X or the expression
1656 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1657 if we are making a new object of this type. */
1660 set_mem_attributes (ref, t, objectp)
1665 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1666 tree decl = MEM_DECL (ref);
1667 rtx offset = MEM_OFFSET (ref);
1668 rtx size = MEM_SIZE (ref);
1669 unsigned int align = MEM_ALIGN (ref);
1672 /* It can happen that type_for_mode was given a mode for which there
1673 is no language-level type. In which case it returns NULL, which
1678 type = TYPE_P (t) ? t : TREE_TYPE (t);
1680 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1681 wrong answer, as it assumes that DECL_RTL already has the right alias
1682 info. Callers should not set DECL_RTL until after the call to
1683 set_mem_attributes. */
1684 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1687 /* Get the alias set from the expression or type (perhaps using a
1688 front-end routine) and use it. */
1689 alias = get_alias_set (t);
1691 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1692 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1693 RTX_UNCHANGING_P (ref)
1694 |= ((lang_hooks.honor_readonly
1695 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1696 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1698 /* If we are making an object of this type, or if this is a DECL, we know
1699 that it is a scalar if the type is not an aggregate. */
1700 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1701 MEM_SCALAR_P (ref) = 1;
1703 /* If the size is known, we can set that. */
1704 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1705 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1707 /* If T is not a type, we may be able to deduce some more information about
1711 maybe_set_unchanging (ref, t);
1712 if (TREE_THIS_VOLATILE (t))
1713 MEM_VOLATILE_P (ref) = 1;
1715 /* Now remove any NOPs: they don't change what the underlying object is.
1716 Likewise for SAVE_EXPR. */
1717 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1718 || TREE_CODE (t) == NON_LVALUE_EXPR || TREE_CODE (t) == SAVE_EXPR)
1719 t = TREE_OPERAND (t, 0);
1721 /* If this expression can't be addressed (e.g., it contains a reference
1722 to a non-addressable field), show we don't change its alias set. */
1723 if (! can_address_p (t))
1724 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1726 /* If this is a decl, set the attributes of the MEM from it. */
1730 offset = GEN_INT (0);
1731 size = (DECL_SIZE_UNIT (t)
1732 && host_integerp (DECL_SIZE_UNIT (t), 1)
1733 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1734 align = DECL_ALIGN (t);
1737 /* If this is an INDIRECT_REF, we know its alignment. */
1738 else if (TREE_CODE (t) == INDIRECT_REF)
1739 align = TYPE_ALIGN (type);
1742 /* Now set the attributes we computed above. */
1744 = get_mem_attrs (alias, decl, offset, size, align, GET_MODE (ref));
1746 /* If this is already known to be a scalar or aggregate, we are done. */
1747 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1750 /* If it is a reference into an aggregate, this is part of an aggregate.
1751 Otherwise we don't know. */
1752 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1753 || TREE_CODE (t) == ARRAY_RANGE_REF
1754 || TREE_CODE (t) == BIT_FIELD_REF)
1755 MEM_IN_STRUCT_P (ref) = 1;
1758 /* Set the alias set of MEM to SET. */
1761 set_mem_alias_set (mem, set)
1765 #ifdef ENABLE_CHECKING
1766 /* If the new and old alias sets don't conflict, something is wrong. */
1767 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1771 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_DECL (mem), MEM_OFFSET (mem),
1772 MEM_SIZE (mem), MEM_ALIGN (mem),
1776 /* Set the alignment of MEM to ALIGN bits. */
1779 set_mem_align (mem, align)
1783 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_DECL (mem),
1784 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1788 /* Set the decl for MEM to DECL. */
1791 set_mem_decl (mem, decl)
1796 = get_mem_attrs (MEM_ALIAS_SET (mem), decl, MEM_OFFSET (mem),
1797 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1800 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1801 and its address changed to ADDR. (VOIDmode means don't change the mode.
1802 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1803 returned memory location is required to be valid. The memory
1804 attributes are not changed. */
1807 change_address_1 (memref, mode, addr, validate)
1809 enum machine_mode mode;
1815 if (GET_CODE (memref) != MEM)
1817 if (mode == VOIDmode)
1818 mode = GET_MODE (memref);
1820 addr = XEXP (memref, 0);
1824 if (reload_in_progress || reload_completed)
1826 if (! memory_address_p (mode, addr))
1830 addr = memory_address (mode, addr);
1833 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1836 new = gen_rtx_MEM (mode, addr);
1837 MEM_COPY_ATTRIBUTES (new, memref);
1841 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1842 way we are changing MEMREF, so we only preserve the alias set. */
1845 change_address (memref, mode, addr)
1847 enum machine_mode mode;
1850 rtx new = change_address_1 (memref, mode, addr, 1);
1851 enum machine_mode mmode = GET_MODE (new);
1854 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1855 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1856 (mmode == BLKmode ? 1
1857 : GET_MODE_ALIGNMENT (mmode) / BITS_PER_UNIT),
1863 /* Return a memory reference like MEMREF, but with its mode changed
1864 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1865 nonzero, the memory address is forced to be valid. */
1868 adjust_address_1 (memref, mode, offset, validate)
1870 enum machine_mode mode;
1871 HOST_WIDE_INT offset;
1874 rtx addr = XEXP (memref, 0);
1876 rtx memoffset = MEM_OFFSET (memref);
1878 unsigned int memalign = MEM_ALIGN (memref);
1880 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1881 object, we can merge it into the LO_SUM. */
1882 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1884 && (unsigned HOST_WIDE_INT) offset
1885 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1886 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1887 plus_constant (XEXP (addr, 1), offset));
1888 else if (offset == 0)
1889 /* ??? Prefer to create garbage instead of creating shared rtl. */
1890 addr = copy_rtx (addr);
1892 addr = plus_constant (addr, offset);
1894 new = change_address_1 (memref, mode, addr, validate);
1896 /* Compute the new values of the memory attributes due to this adjustment.
1897 We add the offsets and update the alignment. */
1899 memoffset = GEN_INT (offset + INTVAL (memoffset));
1901 /* Compute the new alignment by taking the MIN of the alignment and the
1902 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1905 memalign = MIN (memalign, (offset & -offset) * BITS_PER_UNIT);
1907 /* We can compute the size in a number of ways. */
1908 if (mode != BLKmode)
1909 size = GEN_INT (GET_MODE_SIZE (mode));
1910 else if (MEM_SIZE (memref))
1911 size = plus_constant (MEM_SIZE (memref), -offset);
1913 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref),
1914 memoffset, size, memalign, GET_MODE (new));
1916 /* At some point, we should validate that this offset is within the object,
1917 if all the appropriate values are known. */
1921 /* Return a memory reference like MEMREF, but whose address is changed by
1922 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1923 known to be in OFFSET (possibly 1). */
1926 offset_address (memref, offset, pow2)
1931 rtx new = change_address_1 (memref, VOIDmode,
1932 gen_rtx_PLUS (Pmode, XEXP (memref, 0),
1933 force_reg (Pmode, offset)), 1);
1935 /* Update the alignment to reflect the offset. Reset the offset, which
1937 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref),
1938 0, 0, MIN (MEM_ALIGN (memref),
1939 pow2 * BITS_PER_UNIT),
1944 /* Return a memory reference like MEMREF, but with its address changed to
1945 ADDR. The caller is asserting that the actual piece of memory pointed
1946 to is the same, just the form of the address is being changed, such as
1947 by putting something into a register. */
1950 replace_equiv_address (memref, addr)
1954 /* change_address_1 copies the memory attribute structure without change
1955 and that's exactly what we want here. */
1956 return change_address_1 (memref, VOIDmode, addr, 1);
1959 /* Likewise, but the reference is not required to be valid. */
1962 replace_equiv_address_nv (memref, addr)
1966 return change_address_1 (memref, VOIDmode, addr, 0);
1969 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1976 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1977 NULL_RTX, label_num++, NULL, NULL);
1979 LABEL_NUSES (label) = 0;
1980 LABEL_ALTERNATE_NAME (label) = NULL;
1984 /* For procedure integration. */
1986 /* Install new pointers to the first and last insns in the chain.
1987 Also, set cur_insn_uid to one higher than the last in use.
1988 Used for an inline-procedure after copying the insn chain. */
1991 set_new_first_and_last_insn (first, last)
2000 for (insn = first; insn; insn = NEXT_INSN (insn))
2001 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2006 /* Set the range of label numbers found in the current function.
2007 This is used when belatedly compiling an inline function. */
2010 set_new_first_and_last_label_num (first, last)
2013 base_label_num = label_num;
2014 first_label_num = first;
2015 last_label_num = last;
2018 /* Set the last label number found in the current function.
2019 This is used when belatedly compiling an inline function. */
2022 set_new_last_label_num (last)
2025 base_label_num = label_num;
2026 last_label_num = last;
2029 /* Restore all variables describing the current status from the structure *P.
2030 This is used after a nested function. */
2033 restore_emit_status (p)
2034 struct function *p ATTRIBUTE_UNUSED;
2037 clear_emit_caches ();
2040 /* Clear out all parts of the state in F that can safely be discarded
2041 after the function has been compiled, to let garbage collection
2042 reclaim the memory. */
2045 free_emit_status (f)
2048 free (f->emit->x_regno_reg_rtx);
2049 free (f->emit->regno_pointer_align);
2050 free (f->emit->regno_decl);
2055 /* Go through all the RTL insn bodies and copy any invalid shared
2056 structure. This routine should only be called once. */
2059 unshare_all_rtl (fndecl, insn)
2065 /* Make sure that virtual parameters are not shared. */
2066 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2067 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2069 /* Make sure that virtual stack slots are not shared. */
2070 unshare_all_decls (DECL_INITIAL (fndecl));
2072 /* Unshare just about everything else. */
2073 unshare_all_rtl_1 (insn);
2075 /* Make sure the addresses of stack slots found outside the insn chain
2076 (such as, in DECL_RTL of a variable) are not shared
2077 with the insn chain.
2079 This special care is necessary when the stack slot MEM does not
2080 actually appear in the insn chain. If it does appear, its address
2081 is unshared from all else at that point. */
2082 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2085 /* Go through all the RTL insn bodies and copy any invalid shared
2086 structure, again. This is a fairly expensive thing to do so it
2087 should be done sparingly. */
2090 unshare_all_rtl_again (insn)
2096 for (p = insn; p; p = NEXT_INSN (p))
2099 reset_used_flags (PATTERN (p));
2100 reset_used_flags (REG_NOTES (p));
2101 reset_used_flags (LOG_LINKS (p));
2104 /* Make sure that virtual stack slots are not shared. */
2105 reset_used_decls (DECL_INITIAL (cfun->decl));
2107 /* Make sure that virtual parameters are not shared. */
2108 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2109 reset_used_flags (DECL_RTL (decl));
2111 reset_used_flags (stack_slot_list);
2113 unshare_all_rtl (cfun->decl, insn);
2116 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2117 Assumes the mark bits are cleared at entry. */
2120 unshare_all_rtl_1 (insn)
2123 for (; insn; insn = NEXT_INSN (insn))
2126 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2127 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2128 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2132 /* Go through all virtual stack slots of a function and copy any
2133 shared structure. */
2135 unshare_all_decls (blk)
2140 /* Copy shared decls. */
2141 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2142 if (DECL_RTL_SET_P (t))
2143 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2145 /* Now process sub-blocks. */
2146 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2147 unshare_all_decls (t);
2150 /* Go through all virtual stack slots of a function and mark them as
2153 reset_used_decls (blk)
2159 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2160 if (DECL_RTL_SET_P (t))
2161 reset_used_flags (DECL_RTL (t));
2163 /* Now process sub-blocks. */
2164 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2165 reset_used_decls (t);
2168 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2169 Recursively does the same for subexpressions. */
2172 copy_rtx_if_shared (orig)
2178 const char *format_ptr;
2184 code = GET_CODE (x);
2186 /* These types may be freely shared. */
2199 /* SCRATCH must be shared because they represent distinct values. */
2203 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2204 a LABEL_REF, it isn't sharable. */
2205 if (GET_CODE (XEXP (x, 0)) == PLUS
2206 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2207 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2216 /* The chain of insns is not being copied. */
2220 /* A MEM is allowed to be shared if its address is constant.
2222 We used to allow sharing of MEMs which referenced
2223 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2224 that can lose. instantiate_virtual_regs will not unshare
2225 the MEMs, and combine may change the structure of the address
2226 because it looks safe and profitable in one context, but
2227 in some other context it creates unrecognizable RTL. */
2228 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2237 /* This rtx may not be shared. If it has already been seen,
2238 replace it with a copy of itself. */
2244 copy = rtx_alloc (code);
2246 (sizeof (*copy) - sizeof (copy->fld)
2247 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2253 /* Now scan the subexpressions recursively.
2254 We can store any replaced subexpressions directly into X
2255 since we know X is not shared! Any vectors in X
2256 must be copied if X was copied. */
2258 format_ptr = GET_RTX_FORMAT (code);
2260 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2262 switch (*format_ptr++)
2265 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2269 if (XVEC (x, i) != NULL)
2272 int len = XVECLEN (x, i);
2274 if (copied && len > 0)
2275 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2276 for (j = 0; j < len; j++)
2277 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2285 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2286 to look for shared sub-parts. */
2289 reset_used_flags (x)
2294 const char *format_ptr;
2299 code = GET_CODE (x);
2301 /* These types may be freely shared so we needn't do any resetting
2322 /* The chain of insns is not being copied. */
2331 format_ptr = GET_RTX_FORMAT (code);
2332 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2334 switch (*format_ptr++)
2337 reset_used_flags (XEXP (x, i));
2341 for (j = 0; j < XVECLEN (x, i); j++)
2342 reset_used_flags (XVECEXP (x, i, j));
2348 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2349 Return X or the rtx for the pseudo reg the value of X was copied into.
2350 OTHER must be valid as a SET_DEST. */
2353 make_safe_from (x, other)
2357 switch (GET_CODE (other))
2360 other = SUBREG_REG (other);
2362 case STRICT_LOW_PART:
2365 other = XEXP (other, 0);
2371 if ((GET_CODE (other) == MEM
2373 && GET_CODE (x) != REG
2374 && GET_CODE (x) != SUBREG)
2375 || (GET_CODE (other) == REG
2376 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2377 || reg_mentioned_p (other, x))))
2379 rtx temp = gen_reg_rtx (GET_MODE (x));
2380 emit_move_insn (temp, x);
2386 /* Emission of insns (adding them to the doubly-linked list). */
2388 /* Return the first insn of the current sequence or current function. */
2396 /* Return the last insn emitted in current sequence or current function. */
2404 /* Specify a new insn as the last in the chain. */
2407 set_last_insn (insn)
2410 if (NEXT_INSN (insn) != 0)
2415 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2418 get_last_insn_anywhere ()
2420 struct sequence_stack *stack;
2423 for (stack = seq_stack; stack; stack = stack->next)
2424 if (stack->last != 0)
2429 /* Return a number larger than any instruction's uid in this function. */
2434 return cur_insn_uid;
2437 /* Renumber instructions so that no instruction UIDs are wasted. */
2440 renumber_insns (stream)
2445 /* If we're not supposed to renumber instructions, don't. */
2446 if (!flag_renumber_insns)
2449 /* If there aren't that many instructions, then it's not really
2450 worth renumbering them. */
2451 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2456 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2459 fprintf (stream, "Renumbering insn %d to %d\n",
2460 INSN_UID (insn), cur_insn_uid);
2461 INSN_UID (insn) = cur_insn_uid++;
2465 /* Return the next insn. If it is a SEQUENCE, return the first insn
2474 insn = NEXT_INSN (insn);
2475 if (insn && GET_CODE (insn) == INSN
2476 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2477 insn = XVECEXP (PATTERN (insn), 0, 0);
2483 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2487 previous_insn (insn)
2492 insn = PREV_INSN (insn);
2493 if (insn && GET_CODE (insn) == INSN
2494 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2495 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2501 /* Return the next insn after INSN that is not a NOTE. This routine does not
2502 look inside SEQUENCEs. */
2505 next_nonnote_insn (insn)
2510 insn = NEXT_INSN (insn);
2511 if (insn == 0 || GET_CODE (insn) != NOTE)
2518 /* Return the previous insn before INSN that is not a NOTE. This routine does
2519 not look inside SEQUENCEs. */
2522 prev_nonnote_insn (insn)
2527 insn = PREV_INSN (insn);
2528 if (insn == 0 || GET_CODE (insn) != NOTE)
2535 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2536 or 0, if there is none. This routine does not look inside
2540 next_real_insn (insn)
2545 insn = NEXT_INSN (insn);
2546 if (insn == 0 || GET_CODE (insn) == INSN
2547 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2554 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2555 or 0, if there is none. This routine does not look inside
2559 prev_real_insn (insn)
2564 insn = PREV_INSN (insn);
2565 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2566 || GET_CODE (insn) == JUMP_INSN)
2573 /* Find the next insn after INSN that really does something. This routine
2574 does not look inside SEQUENCEs. Until reload has completed, this is the
2575 same as next_real_insn. */
2578 active_insn_p (insn)
2581 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2582 || (GET_CODE (insn) == INSN
2583 && (! reload_completed
2584 || (GET_CODE (PATTERN (insn)) != USE
2585 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2589 next_active_insn (insn)
2594 insn = NEXT_INSN (insn);
2595 if (insn == 0 || active_insn_p (insn))
2602 /* Find the last insn before INSN that really does something. This routine
2603 does not look inside SEQUENCEs. Until reload has completed, this is the
2604 same as prev_real_insn. */
2607 prev_active_insn (insn)
2612 insn = PREV_INSN (insn);
2613 if (insn == 0 || active_insn_p (insn))
2620 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2628 insn = NEXT_INSN (insn);
2629 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2636 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2644 insn = PREV_INSN (insn);
2645 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2653 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2654 and REG_CC_USER notes so we can find it. */
2657 link_cc0_insns (insn)
2660 rtx user = next_nonnote_insn (insn);
2662 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2663 user = XVECEXP (PATTERN (user), 0, 0);
2665 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2667 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2670 /* Return the next insn that uses CC0 after INSN, which is assumed to
2671 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2672 applied to the result of this function should yield INSN).
2674 Normally, this is simply the next insn. However, if a REG_CC_USER note
2675 is present, it contains the insn that uses CC0.
2677 Return 0 if we can't find the insn. */
2680 next_cc0_user (insn)
2683 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2686 return XEXP (note, 0);
2688 insn = next_nonnote_insn (insn);
2689 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2690 insn = XVECEXP (PATTERN (insn), 0, 0);
2692 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2698 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2699 note, it is the previous insn. */
2702 prev_cc0_setter (insn)
2705 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2708 return XEXP (note, 0);
2710 insn = prev_nonnote_insn (insn);
2711 if (! sets_cc0_p (PATTERN (insn)))
2718 /* Increment the label uses for all labels present in rtx. */
2728 code = GET_CODE (x);
2729 if (code == LABEL_REF)
2730 LABEL_NUSES (XEXP (x, 0))++;
2732 fmt = GET_RTX_FORMAT (code);
2733 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2736 mark_label_nuses (XEXP (x, i));
2737 else if (fmt[i] == 'E')
2738 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2739 mark_label_nuses (XVECEXP (x, i, j));
2744 /* Try splitting insns that can be split for better scheduling.
2745 PAT is the pattern which might split.
2746 TRIAL is the insn providing PAT.
2747 LAST is non-zero if we should return the last insn of the sequence produced.
2749 If this routine succeeds in splitting, it returns the first or last
2750 replacement insn depending on the value of LAST. Otherwise, it
2751 returns TRIAL. If the insn to be returned can be split, it will be. */
2754 try_split (pat, trial, last)
2758 rtx before = PREV_INSN (trial);
2759 rtx after = NEXT_INSN (trial);
2760 int has_barrier = 0;
2765 if (any_condjump_p (trial)
2766 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2767 split_branch_probability = INTVAL (XEXP (note, 0));
2768 probability = split_branch_probability;
2770 seq = split_insns (pat, trial);
2772 split_branch_probability = -1;
2774 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2775 We may need to handle this specially. */
2776 if (after && GET_CODE (after) == BARRIER)
2779 after = NEXT_INSN (after);
2784 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2785 The latter case will normally arise only when being done so that
2786 it, in turn, will be split (SFmode on the 29k is an example). */
2787 if (GET_CODE (seq) == SEQUENCE)
2791 /* Avoid infinite loop if any insn of the result matches
2792 the original pattern. */
2793 for (i = 0; i < XVECLEN (seq, 0); i++)
2794 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2795 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2799 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2800 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2802 rtx insn = XVECEXP (seq, 0, i);
2803 mark_jump_label (PATTERN (insn),
2804 XVECEXP (seq, 0, i), 0);
2806 if (probability != -1
2807 && any_condjump_p (insn)
2808 && !find_reg_note (insn, REG_BR_PROB, 0))
2810 /* We can preserve the REG_BR_PROB notes only if exactly
2811 one jump is created, otherwise the machinde description
2812 is responsible for this step using
2813 split_branch_probability variable. */
2817 = gen_rtx_EXPR_LIST (REG_BR_PROB,
2818 GEN_INT (probability),
2823 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2824 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2825 if (GET_CODE (trial) == CALL_INSN)
2826 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2827 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2828 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2829 = CALL_INSN_FUNCTION_USAGE (trial);
2831 /* Copy notes, particularly those related to the CFG. */
2832 for (note = REG_NOTES (trial); note ; note = XEXP (note, 1))
2834 switch (REG_NOTE_KIND (note))
2837 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2839 rtx insn = XVECEXP (seq, 0, i);
2840 if (GET_CODE (insn) == CALL_INSN
2841 || (flag_non_call_exceptions
2842 && may_trap_p (PATTERN (insn))))
2844 = gen_rtx_EXPR_LIST (REG_EH_REGION,
2852 case REG_ALWAYS_RETURN:
2853 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2855 rtx insn = XVECEXP (seq, 0, i);
2856 if (GET_CODE (insn) == CALL_INSN)
2858 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2864 case REG_NON_LOCAL_GOTO:
2865 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2867 rtx insn = XVECEXP (seq, 0, i);
2868 if (GET_CODE (insn) == JUMP_INSN)
2870 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2881 /* If there are LABELS inside the split insns increment the
2882 usage count so we don't delete the label. */
2883 if (GET_CODE (trial) == INSN)
2884 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2885 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2886 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2888 tem = emit_insn_after (seq, trial);
2890 delete_related_insns (trial);
2892 emit_barrier_after (tem);
2894 /* Recursively call try_split for each new insn created; by the
2895 time control returns here that insn will be fully split, so
2896 set LAST and continue from the insn after the one returned.
2897 We can't use next_active_insn here since AFTER may be a note.
2898 Ignore deleted insns, which can be occur if not optimizing. */
2899 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2900 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2901 tem = try_split (PATTERN (tem), tem, 1);
2903 /* Avoid infinite loop if the result matches the original pattern. */
2904 else if (rtx_equal_p (seq, pat))
2908 PATTERN (trial) = seq;
2909 INSN_CODE (trial) = -1;
2910 try_split (seq, trial, last);
2913 /* Return either the first or the last insn, depending on which was
2916 ? (after ? PREV_INSN (after) : last_insn)
2917 : NEXT_INSN (before);
2923 /* Make and return an INSN rtx, initializing all its slots.
2924 Store PATTERN in the pattern slots. */
2927 make_insn_raw (pattern)
2932 insn = rtx_alloc (INSN);
2934 INSN_UID (insn) = cur_insn_uid++;
2935 PATTERN (insn) = pattern;
2936 INSN_CODE (insn) = -1;
2937 LOG_LINKS (insn) = NULL;
2938 REG_NOTES (insn) = NULL;
2940 #ifdef ENABLE_RTL_CHECKING
2943 && (returnjump_p (insn)
2944 || (GET_CODE (insn) == SET
2945 && SET_DEST (insn) == pc_rtx)))
2947 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2955 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2958 make_jump_insn_raw (pattern)
2963 insn = rtx_alloc (JUMP_INSN);
2964 INSN_UID (insn) = cur_insn_uid++;
2966 PATTERN (insn) = pattern;
2967 INSN_CODE (insn) = -1;
2968 LOG_LINKS (insn) = NULL;
2969 REG_NOTES (insn) = NULL;
2970 JUMP_LABEL (insn) = NULL;
2975 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2978 make_call_insn_raw (pattern)
2983 insn = rtx_alloc (CALL_INSN);
2984 INSN_UID (insn) = cur_insn_uid++;
2986 PATTERN (insn) = pattern;
2987 INSN_CODE (insn) = -1;
2988 LOG_LINKS (insn) = NULL;
2989 REG_NOTES (insn) = NULL;
2990 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2995 /* Add INSN to the end of the doubly-linked list.
2996 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3002 PREV_INSN (insn) = last_insn;
3003 NEXT_INSN (insn) = 0;
3005 if (NULL != last_insn)
3006 NEXT_INSN (last_insn) = insn;
3008 if (NULL == first_insn)
3014 /* Add INSN into the doubly-linked list after insn AFTER. This and
3015 the next should be the only functions called to insert an insn once
3016 delay slots have been filled since only they know how to update a
3020 add_insn_after (insn, after)
3023 rtx next = NEXT_INSN (after);
3026 if (optimize && INSN_DELETED_P (after))
3029 NEXT_INSN (insn) = next;
3030 PREV_INSN (insn) = after;
3034 PREV_INSN (next) = insn;
3035 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3036 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3038 else if (last_insn == after)
3042 struct sequence_stack *stack = seq_stack;
3043 /* Scan all pending sequences too. */
3044 for (; stack; stack = stack->next)
3045 if (after == stack->last)
3055 if (basic_block_for_insn
3056 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3057 && (bb = BLOCK_FOR_INSN (after)))
3059 set_block_for_insn (insn, bb);
3060 /* Should not happen as first in the BB is always
3061 eigther NOTE or LABEL. */
3062 if (bb->end == after
3063 /* Avoid clobbering of structure when creating new BB. */
3064 && GET_CODE (insn) != BARRIER
3065 && (GET_CODE (insn) != NOTE
3066 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3070 NEXT_INSN (after) = insn;
3071 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3073 rtx sequence = PATTERN (after);
3074 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3078 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3079 the previous should be the only functions called to insert an insn once
3080 delay slots have been filled since only they know how to update a
3084 add_insn_before (insn, before)
3087 rtx prev = PREV_INSN (before);
3090 if (optimize && INSN_DELETED_P (before))
3093 PREV_INSN (insn) = prev;
3094 NEXT_INSN (insn) = before;
3098 NEXT_INSN (prev) = insn;
3099 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3101 rtx sequence = PATTERN (prev);
3102 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3105 else if (first_insn == before)
3109 struct sequence_stack *stack = seq_stack;
3110 /* Scan all pending sequences too. */
3111 for (; stack; stack = stack->next)
3112 if (before == stack->first)
3114 stack->first = insn;
3122 if (basic_block_for_insn
3123 && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements
3124 && (bb = BLOCK_FOR_INSN (before)))
3126 set_block_for_insn (insn, bb);
3127 /* Should not happen as first in the BB is always
3128 eigther NOTE or LABEl. */
3129 if (bb->head == insn
3130 /* Avoid clobbering of structure when creating new BB. */
3131 && GET_CODE (insn) != BARRIER
3132 && (GET_CODE (insn) != NOTE
3133 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3137 PREV_INSN (before) = insn;
3138 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3139 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3142 /* Remove an insn from its doubly-linked list. This function knows how
3143 to handle sequences. */
3148 rtx next = NEXT_INSN (insn);
3149 rtx prev = PREV_INSN (insn);
3154 NEXT_INSN (prev) = next;
3155 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3157 rtx sequence = PATTERN (prev);
3158 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3161 else if (first_insn == insn)
3165 struct sequence_stack *stack = seq_stack;
3166 /* Scan all pending sequences too. */
3167 for (; stack; stack = stack->next)
3168 if (insn == stack->first)
3170 stack->first = next;
3180 PREV_INSN (next) = prev;
3181 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3182 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3184 else if (last_insn == insn)
3188 struct sequence_stack *stack = seq_stack;
3189 /* Scan all pending sequences too. */
3190 for (; stack; stack = stack->next)
3191 if (insn == stack->last)
3200 if (basic_block_for_insn
3201 && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements
3202 && (bb = BLOCK_FOR_INSN (insn)))
3204 if (bb->head == insn)
3206 /* Never ever delete the basic block note without deleting whole basic
3208 if (GET_CODE (insn) == NOTE)
3212 if (bb->end == insn)
3217 /* Delete all insns made since FROM.
3218 FROM becomes the new last instruction. */
3221 delete_insns_since (from)
3227 NEXT_INSN (from) = 0;
3231 /* This function is deprecated, please use sequences instead.
3233 Move a consecutive bunch of insns to a different place in the chain.
3234 The insns to be moved are those between FROM and TO.
3235 They are moved to a new position after the insn AFTER.
3236 AFTER must not be FROM or TO or any insn in between.
3238 This function does not know about SEQUENCEs and hence should not be
3239 called after delay-slot filling has been done. */
3242 reorder_insns_nobb (from, to, after)
3243 rtx from, to, after;
3245 /* Splice this bunch out of where it is now. */
3246 if (PREV_INSN (from))
3247 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3249 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3250 if (last_insn == to)
3251 last_insn = PREV_INSN (from);
3252 if (first_insn == from)
3253 first_insn = NEXT_INSN (to);
3255 /* Make the new neighbors point to it and it to them. */
3256 if (NEXT_INSN (after))
3257 PREV_INSN (NEXT_INSN (after)) = to;
3259 NEXT_INSN (to) = NEXT_INSN (after);
3260 PREV_INSN (from) = after;
3261 NEXT_INSN (after) = from;
3262 if (after == last_insn)
3266 /* Same as function above, but take care to update BB boundaries. */
3268 reorder_insns (from, to, after)
3269 rtx from, to, after;
3271 rtx prev = PREV_INSN (from);
3272 basic_block bb, bb2;
3274 reorder_insns_nobb (from, to, after);
3276 if (basic_block_for_insn
3277 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3278 && (bb = BLOCK_FOR_INSN (after)))
3282 if (basic_block_for_insn
3283 && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements
3284 && (bb2 = BLOCK_FOR_INSN (from)))
3290 if (bb->end == after)
3293 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3294 set_block_for_insn (x, bb);
3298 /* Return the line note insn preceding INSN. */
3301 find_line_note (insn)
3304 if (no_line_numbers)
3307 for (; insn; insn = PREV_INSN (insn))
3308 if (GET_CODE (insn) == NOTE
3309 && NOTE_LINE_NUMBER (insn) >= 0)
3315 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3316 of the moved insns when debugging. This may insert a note between AFTER
3317 and FROM, and another one after TO. */
3320 reorder_insns_with_line_notes (from, to, after)
3321 rtx from, to, after;
3323 rtx from_line = find_line_note (from);
3324 rtx after_line = find_line_note (after);
3326 reorder_insns (from, to, after);
3328 if (from_line == after_line)
3332 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3333 NOTE_LINE_NUMBER (from_line),
3336 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3337 NOTE_LINE_NUMBER (after_line),
3341 /* Remove unnecessary notes from the instruction stream. */
3344 remove_unnecessary_notes ()
3346 rtx block_stack = NULL_RTX;
3347 rtx eh_stack = NULL_RTX;
3352 /* We must not remove the first instruction in the function because
3353 the compiler depends on the first instruction being a note. */
3354 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3356 /* Remember what's next. */
3357 next = NEXT_INSN (insn);
3359 /* We're only interested in notes. */
3360 if (GET_CODE (insn) != NOTE)
3363 switch (NOTE_LINE_NUMBER (insn))
3365 case NOTE_INSN_DELETED:
3369 case NOTE_INSN_EH_REGION_BEG:
3370 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3373 case NOTE_INSN_EH_REGION_END:
3374 /* Too many end notes. */
3375 if (eh_stack == NULL_RTX)
3377 /* Mismatched nesting. */
3378 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3381 eh_stack = XEXP (eh_stack, 1);
3382 free_INSN_LIST_node (tmp);
3385 case NOTE_INSN_BLOCK_BEG:
3386 /* By now, all notes indicating lexical blocks should have
3387 NOTE_BLOCK filled in. */
3388 if (NOTE_BLOCK (insn) == NULL_TREE)
3390 block_stack = alloc_INSN_LIST (insn, block_stack);
3393 case NOTE_INSN_BLOCK_END:
3394 /* Too many end notes. */
3395 if (block_stack == NULL_RTX)
3397 /* Mismatched nesting. */
3398 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3401 block_stack = XEXP (block_stack, 1);
3402 free_INSN_LIST_node (tmp);
3404 /* Scan back to see if there are any non-note instructions
3405 between INSN and the beginning of this block. If not,
3406 then there is no PC range in the generated code that will
3407 actually be in this block, so there's no point in
3408 remembering the existence of the block. */
3409 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3411 /* This block contains a real instruction. Note that we
3412 don't include labels; if the only thing in the block
3413 is a label, then there are still no PC values that
3414 lie within the block. */
3418 /* We're only interested in NOTEs. */
3419 if (GET_CODE (tmp) != NOTE)
3422 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3424 /* We just verified that this BLOCK matches us with
3425 the block_stack check above. Never delete the
3426 BLOCK for the outermost scope of the function; we
3427 can refer to names from that scope even if the
3428 block notes are messed up. */
3429 if (! is_body_block (NOTE_BLOCK (insn))
3430 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3437 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3438 /* There's a nested block. We need to leave the
3439 current block in place since otherwise the debugger
3440 wouldn't be able to show symbols from our block in
3441 the nested block. */
3447 /* Too many begin notes. */
3448 if (block_stack || eh_stack)
3453 /* Emit an insn of given code and pattern
3454 at a specified place within the doubly-linked list. */
3456 /* Make an instruction with body PATTERN
3457 and output it before the instruction BEFORE. */
3460 emit_insn_before (pattern, before)
3461 rtx pattern, before;
3465 if (GET_CODE (pattern) == SEQUENCE)
3469 for (i = 0; i < XVECLEN (pattern, 0); i++)
3471 insn = XVECEXP (pattern, 0, i);
3472 add_insn_before (insn, before);
3477 insn = make_insn_raw (pattern);
3478 add_insn_before (insn, before);
3484 /* Make an instruction with body PATTERN and code JUMP_INSN
3485 and output it before the instruction BEFORE. */
3488 emit_jump_insn_before (pattern, before)
3489 rtx pattern, before;
3493 if (GET_CODE (pattern) == SEQUENCE)
3494 insn = emit_insn_before (pattern, before);
3497 insn = make_jump_insn_raw (pattern);
3498 add_insn_before (insn, before);
3504 /* Make an instruction with body PATTERN and code CALL_INSN
3505 and output it before the instruction BEFORE. */
3508 emit_call_insn_before (pattern, before)
3509 rtx pattern, before;
3513 if (GET_CODE (pattern) == SEQUENCE)
3514 insn = emit_insn_before (pattern, before);
3517 insn = make_call_insn_raw (pattern);
3518 add_insn_before (insn, before);
3519 PUT_CODE (insn, CALL_INSN);
3525 /* Make an insn of code BARRIER
3526 and output it before the insn BEFORE. */
3529 emit_barrier_before (before)
3532 rtx insn = rtx_alloc (BARRIER);
3534 INSN_UID (insn) = cur_insn_uid++;
3536 add_insn_before (insn, before);
3540 /* Emit the label LABEL before the insn BEFORE. */
3543 emit_label_before (label, before)
3546 /* This can be called twice for the same label as a result of the
3547 confusion that follows a syntax error! So make it harmless. */
3548 if (INSN_UID (label) == 0)
3550 INSN_UID (label) = cur_insn_uid++;
3551 add_insn_before (label, before);
3557 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3560 emit_note_before (subtype, before)
3564 rtx note = rtx_alloc (NOTE);
3565 INSN_UID (note) = cur_insn_uid++;
3566 NOTE_SOURCE_FILE (note) = 0;
3567 NOTE_LINE_NUMBER (note) = subtype;
3569 add_insn_before (note, before);
3573 /* Make an insn of code INSN with body PATTERN
3574 and output it after the insn AFTER. */
3577 emit_insn_after (pattern, after)
3582 if (GET_CODE (pattern) == SEQUENCE)
3586 for (i = 0; i < XVECLEN (pattern, 0); i++)
3588 insn = XVECEXP (pattern, 0, i);
3589 add_insn_after (insn, after);
3595 insn = make_insn_raw (pattern);
3596 add_insn_after (insn, after);
3602 /* Similar to emit_insn_after, except that line notes are to be inserted so
3603 as to act as if this insn were at FROM. */
3606 emit_insn_after_with_line_notes (pattern, after, from)
3607 rtx pattern, after, from;
3609 rtx from_line = find_line_note (from);
3610 rtx after_line = find_line_note (after);
3611 rtx insn = emit_insn_after (pattern, after);
3614 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3615 NOTE_LINE_NUMBER (from_line),
3619 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3620 NOTE_LINE_NUMBER (after_line),
3624 /* Make an insn of code JUMP_INSN with body PATTERN
3625 and output it after the insn AFTER. */
3628 emit_jump_insn_after (pattern, after)
3633 if (GET_CODE (pattern) == SEQUENCE)
3634 insn = emit_insn_after (pattern, after);
3637 insn = make_jump_insn_raw (pattern);
3638 add_insn_after (insn, after);
3644 /* Make an insn of code BARRIER
3645 and output it after the insn AFTER. */
3648 emit_barrier_after (after)
3651 rtx insn = rtx_alloc (BARRIER);
3653 INSN_UID (insn) = cur_insn_uid++;
3655 add_insn_after (insn, after);
3659 /* Emit the label LABEL after the insn AFTER. */
3662 emit_label_after (label, after)
3665 /* This can be called twice for the same label
3666 as a result of the confusion that follows a syntax error!
3667 So make it harmless. */
3668 if (INSN_UID (label) == 0)
3670 INSN_UID (label) = cur_insn_uid++;
3671 add_insn_after (label, after);
3677 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3680 emit_note_after (subtype, after)
3684 rtx note = rtx_alloc (NOTE);
3685 INSN_UID (note) = cur_insn_uid++;
3686 NOTE_SOURCE_FILE (note) = 0;
3687 NOTE_LINE_NUMBER (note) = subtype;
3688 add_insn_after (note, after);
3692 /* Emit a line note for FILE and LINE after the insn AFTER. */
3695 emit_line_note_after (file, line, after)
3702 if (no_line_numbers && line > 0)
3708 note = rtx_alloc (NOTE);
3709 INSN_UID (note) = cur_insn_uid++;
3710 NOTE_SOURCE_FILE (note) = file;
3711 NOTE_LINE_NUMBER (note) = line;
3712 add_insn_after (note, after);
3716 /* Make an insn of code INSN with pattern PATTERN
3717 and add it to the end of the doubly-linked list.
3718 If PATTERN is a SEQUENCE, take the elements of it
3719 and emit an insn for each element.
3721 Returns the last insn emitted. */
3727 rtx insn = last_insn;
3729 if (GET_CODE (pattern) == SEQUENCE)
3733 for (i = 0; i < XVECLEN (pattern, 0); i++)
3735 insn = XVECEXP (pattern, 0, i);
3741 insn = make_insn_raw (pattern);
3748 /* Emit the insns in a chain starting with INSN.
3749 Return the last insn emitted. */
3759 rtx next = NEXT_INSN (insn);
3768 /* Emit the insns in a chain starting with INSN and place them in front of
3769 the insn BEFORE. Return the last insn emitted. */
3772 emit_insns_before (insn, before)
3780 rtx next = NEXT_INSN (insn);
3781 add_insn_before (insn, before);
3789 /* Emit the insns in a chain starting with FIRST and place them in back of
3790 the insn AFTER. Return the last insn emitted. */
3793 emit_insns_after (first, after)
3807 if (basic_block_for_insn
3808 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3809 && (bb = BLOCK_FOR_INSN (after)))
3811 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3812 set_block_for_insn (last, bb);
3813 set_block_for_insn (last, bb);
3814 if (bb->end == after)
3818 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3821 after_after = NEXT_INSN (after);
3823 NEXT_INSN (after) = first;
3824 PREV_INSN (first) = after;
3825 NEXT_INSN (last) = after_after;
3827 PREV_INSN (after_after) = last;
3829 if (after == last_insn)
3834 /* Make an insn of code JUMP_INSN with pattern PATTERN
3835 and add it to the end of the doubly-linked list. */
3838 emit_jump_insn (pattern)
3841 if (GET_CODE (pattern) == SEQUENCE)
3842 return emit_insn (pattern);
3845 rtx insn = make_jump_insn_raw (pattern);
3851 /* Make an insn of code CALL_INSN with pattern PATTERN
3852 and add it to the end of the doubly-linked list. */
3855 emit_call_insn (pattern)
3858 if (GET_CODE (pattern) == SEQUENCE)
3859 return emit_insn (pattern);
3862 rtx insn = make_call_insn_raw (pattern);
3864 PUT_CODE (insn, CALL_INSN);
3869 /* Add the label LABEL to the end of the doubly-linked list. */
3875 /* This can be called twice for the same label
3876 as a result of the confusion that follows a syntax error!
3877 So make it harmless. */
3878 if (INSN_UID (label) == 0)
3880 INSN_UID (label) = cur_insn_uid++;
3886 /* Make an insn of code BARRIER
3887 and add it to the end of the doubly-linked list. */
3892 rtx barrier = rtx_alloc (BARRIER);
3893 INSN_UID (barrier) = cur_insn_uid++;
3898 /* Make an insn of code NOTE
3899 with data-fields specified by FILE and LINE
3900 and add it to the end of the doubly-linked list,
3901 but only if line-numbers are desired for debugging info. */
3904 emit_line_note (file, line)
3908 set_file_and_line_for_stmt (file, line);
3911 if (no_line_numbers)
3915 return emit_note (file, line);
3918 /* Make an insn of code NOTE
3919 with data-fields specified by FILE and LINE
3920 and add it to the end of the doubly-linked list.
3921 If it is a line-number NOTE, omit it if it matches the previous one. */
3924 emit_note (file, line)
3932 if (file && last_filename && !strcmp (file, last_filename)
3933 && line == last_linenum)
3935 last_filename = file;
3936 last_linenum = line;
3939 if (no_line_numbers && line > 0)
3945 note = rtx_alloc (NOTE);
3946 INSN_UID (note) = cur_insn_uid++;
3947 NOTE_SOURCE_FILE (note) = file;
3948 NOTE_LINE_NUMBER (note) = line;
3953 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3956 emit_line_note_force (file, line)
3961 return emit_line_note (file, line);
3964 /* Cause next statement to emit a line note even if the line number
3965 has not changed. This is used at the beginning of a function. */
3968 force_next_line_note ()
3973 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3974 note of this type already exists, remove it first. */
3977 set_unique_reg_note (insn, kind, datum)
3982 rtx note = find_reg_note (insn, kind, NULL_RTX);
3984 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
3985 It serves no useful purpose and breaks eliminate_regs. */
3986 if ((kind == REG_EQUAL || kind == REG_EQUIV)
3987 && GET_CODE (datum) == ASM_OPERANDS)
3992 XEXP (note, 0) = datum;
3996 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3997 return REG_NOTES (insn);
4000 /* Return an indication of which type of insn should have X as a body.
4001 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4007 if (GET_CODE (x) == CODE_LABEL)
4009 if (GET_CODE (x) == CALL)
4011 if (GET_CODE (x) == RETURN)
4013 if (GET_CODE (x) == SET)
4015 if (SET_DEST (x) == pc_rtx)
4017 else if (GET_CODE (SET_SRC (x)) == CALL)
4022 if (GET_CODE (x) == PARALLEL)
4025 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4026 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4028 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4029 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4031 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4032 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4038 /* Emit the rtl pattern X as an appropriate kind of insn.
4039 If X is a label, it is simply added into the insn chain. */
4045 enum rtx_code code = classify_insn (x);
4047 if (code == CODE_LABEL)
4048 return emit_label (x);
4049 else if (code == INSN)
4050 return emit_insn (x);
4051 else if (code == JUMP_INSN)
4053 rtx insn = emit_jump_insn (x);
4054 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4055 return emit_barrier ();
4058 else if (code == CALL_INSN)
4059 return emit_call_insn (x);
4064 /* Begin emitting insns to a sequence which can be packaged in an
4065 RTL_EXPR. If this sequence will contain something that might cause
4066 the compiler to pop arguments to function calls (because those
4067 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4068 details), use do_pending_stack_adjust before calling this function.
4069 That will ensure that the deferred pops are not accidentally
4070 emitted in the middle of this sequence. */
4075 struct sequence_stack *tem;
4077 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4079 tem->next = seq_stack;
4080 tem->first = first_insn;
4081 tem->last = last_insn;
4082 tem->sequence_rtl_expr = seq_rtl_expr;
4090 /* Similarly, but indicate that this sequence will be placed in T, an
4091 RTL_EXPR. See the documentation for start_sequence for more
4092 information about how to use this function. */
4095 start_sequence_for_rtl_expr (t)
4103 /* Set up the insn chain starting with FIRST as the current sequence,
4104 saving the previously current one. See the documentation for
4105 start_sequence for more information about how to use this function. */
4108 push_to_sequence (first)
4115 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4121 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4124 push_to_full_sequence (first, last)
4130 /* We really should have the end of the insn chain here. */
4131 if (last && NEXT_INSN (last))
4135 /* Set up the outer-level insn chain
4136 as the current sequence, saving the previously current one. */
4139 push_topmost_sequence ()
4141 struct sequence_stack *stack, *top = NULL;
4145 for (stack = seq_stack; stack; stack = stack->next)
4148 first_insn = top->first;
4149 last_insn = top->last;
4150 seq_rtl_expr = top->sequence_rtl_expr;
4153 /* After emitting to the outer-level insn chain, update the outer-level
4154 insn chain, and restore the previous saved state. */
4157 pop_topmost_sequence ()
4159 struct sequence_stack *stack, *top = NULL;
4161 for (stack = seq_stack; stack; stack = stack->next)
4164 top->first = first_insn;
4165 top->last = last_insn;
4166 /* ??? Why don't we save seq_rtl_expr here? */
4171 /* After emitting to a sequence, restore previous saved state.
4173 To get the contents of the sequence just made, you must call
4174 `gen_sequence' *before* calling here.
4176 If the compiler might have deferred popping arguments while
4177 generating this sequence, and this sequence will not be immediately
4178 inserted into the instruction stream, use do_pending_stack_adjust
4179 before calling gen_sequence. That will ensure that the deferred
4180 pops are inserted into this sequence, and not into some random
4181 location in the instruction stream. See INHIBIT_DEFER_POP for more
4182 information about deferred popping of arguments. */
4187 struct sequence_stack *tem = seq_stack;
4189 first_insn = tem->first;
4190 last_insn = tem->last;
4191 seq_rtl_expr = tem->sequence_rtl_expr;
4192 seq_stack = tem->next;
4197 /* This works like end_sequence, but records the old sequence in FIRST
4201 end_full_sequence (first, last)
4204 *first = first_insn;
4209 /* Return 1 if currently emitting into a sequence. */
4214 return seq_stack != 0;
4217 /* Generate a SEQUENCE rtx containing the insns already emitted
4218 to the current sequence.
4220 This is how the gen_... function from a DEFINE_EXPAND
4221 constructs the SEQUENCE that it returns. */
4231 /* Count the insns in the chain. */
4233 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4236 /* If only one insn, return it rather than a SEQUENCE.
4237 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4238 the case of an empty list.)
4239 We only return the pattern of an insn if its code is INSN and it
4240 has no notes. This ensures that no information gets lost. */
4242 && ! RTX_FRAME_RELATED_P (first_insn)
4243 && GET_CODE (first_insn) == INSN
4244 /* Don't throw away any reg notes. */
4245 && REG_NOTES (first_insn) == 0)
4246 return PATTERN (first_insn);
4248 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4250 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4251 XVECEXP (result, 0, i) = tem;
4256 /* Put the various virtual registers into REGNO_REG_RTX. */
4259 init_virtual_regs (es)
4260 struct emit_status *es;
4262 rtx *ptr = es->x_regno_reg_rtx;
4263 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4264 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4265 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4266 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4267 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4271 clear_emit_caches ()
4275 /* Clear the start_sequence/gen_sequence cache. */
4276 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4277 sequence_result[i] = 0;
4281 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4282 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4283 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4284 static int copy_insn_n_scratches;
4286 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4287 copied an ASM_OPERANDS.
4288 In that case, it is the original input-operand vector. */
4289 static rtvec orig_asm_operands_vector;
4291 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4292 copied an ASM_OPERANDS.
4293 In that case, it is the copied input-operand vector. */
4294 static rtvec copy_asm_operands_vector;
4296 /* Likewise for the constraints vector. */
4297 static rtvec orig_asm_constraints_vector;
4298 static rtvec copy_asm_constraints_vector;
4300 /* Recursively create a new copy of an rtx for copy_insn.
4301 This function differs from copy_rtx in that it handles SCRATCHes and
4302 ASM_OPERANDs properly.
4303 Normally, this function is not used directly; use copy_insn as front end.
4304 However, you could first copy an insn pattern with copy_insn and then use
4305 this function afterwards to properly copy any REG_NOTEs containing
4315 const char *format_ptr;
4317 code = GET_CODE (orig);
4333 for (i = 0; i < copy_insn_n_scratches; i++)
4334 if (copy_insn_scratch_in[i] == orig)
4335 return copy_insn_scratch_out[i];
4339 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4340 a LABEL_REF, it isn't sharable. */
4341 if (GET_CODE (XEXP (orig, 0)) == PLUS
4342 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4343 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4347 /* A MEM with a constant address is not sharable. The problem is that
4348 the constant address may need to be reloaded. If the mem is shared,
4349 then reloading one copy of this mem will cause all copies to appear
4350 to have been reloaded. */
4356 copy = rtx_alloc (code);
4358 /* Copy the various flags, and other information. We assume that
4359 all fields need copying, and then clear the fields that should
4360 not be copied. That is the sensible default behavior, and forces
4361 us to explicitly document why we are *not* copying a flag. */
4362 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4364 /* We do not copy the USED flag, which is used as a mark bit during
4365 walks over the RTL. */
4368 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4369 if (GET_RTX_CLASS (code) == 'i')
4373 copy->frame_related = 0;
4376 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4378 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4380 copy->fld[i] = orig->fld[i];
4381 switch (*format_ptr++)
4384 if (XEXP (orig, i) != NULL)
4385 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4390 if (XVEC (orig, i) == orig_asm_constraints_vector)
4391 XVEC (copy, i) = copy_asm_constraints_vector;
4392 else if (XVEC (orig, i) == orig_asm_operands_vector)
4393 XVEC (copy, i) = copy_asm_operands_vector;
4394 else if (XVEC (orig, i) != NULL)
4396 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4397 for (j = 0; j < XVECLEN (copy, i); j++)
4398 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4409 /* These are left unchanged. */
4417 if (code == SCRATCH)
4419 i = copy_insn_n_scratches++;
4420 if (i >= MAX_RECOG_OPERANDS)
4422 copy_insn_scratch_in[i] = orig;
4423 copy_insn_scratch_out[i] = copy;
4425 else if (code == ASM_OPERANDS)
4427 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4428 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4429 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4430 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4436 /* Create a new copy of an rtx.
4437 This function differs from copy_rtx in that it handles SCRATCHes and
4438 ASM_OPERANDs properly.
4439 INSN doesn't really have to be a full INSN; it could be just the
4445 copy_insn_n_scratches = 0;
4446 orig_asm_operands_vector = 0;
4447 orig_asm_constraints_vector = 0;
4448 copy_asm_operands_vector = 0;
4449 copy_asm_constraints_vector = 0;
4450 return copy_insn_1 (insn);
4453 /* Initialize data structures and variables in this file
4454 before generating rtl for each function. */
4459 struct function *f = cfun;
4461 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4464 seq_rtl_expr = NULL;
4466 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4469 first_label_num = label_num;
4473 clear_emit_caches ();
4475 /* Init the tables that describe all the pseudo regs. */
4477 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4479 f->emit->regno_pointer_align
4480 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4481 sizeof (unsigned char));
4484 = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx));
4487 = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree));
4489 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4490 init_virtual_regs (f->emit);
4492 /* Indicate that the virtual registers and stack locations are
4494 REG_POINTER (stack_pointer_rtx) = 1;
4495 REG_POINTER (frame_pointer_rtx) = 1;
4496 REG_POINTER (hard_frame_pointer_rtx) = 1;
4497 REG_POINTER (arg_pointer_rtx) = 1;
4499 REG_POINTER (virtual_incoming_args_rtx) = 1;
4500 REG_POINTER (virtual_stack_vars_rtx) = 1;
4501 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4502 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4503 REG_POINTER (virtual_cfa_rtx) = 1;
4505 #ifdef STACK_BOUNDARY
4506 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4507 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4508 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4509 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4511 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4512 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4513 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4514 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4515 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4518 #ifdef INIT_EXPANDERS
4523 /* Mark SS for GC. */
4526 mark_sequence_stack (ss)
4527 struct sequence_stack *ss;
4531 ggc_mark_rtx (ss->first);
4532 ggc_mark_tree (ss->sequence_rtl_expr);
4537 /* Mark ES for GC. */
4540 mark_emit_status (es)
4541 struct emit_status *es;
4550 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx,
4552 i > 0; --i, ++r, ++t)
4558 mark_sequence_stack (es->sequence_stack);
4559 ggc_mark_tree (es->sequence_rtl_expr);
4560 ggc_mark_rtx (es->x_first_insn);
4563 /* Create some permanent unique rtl objects shared between all functions.
4564 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4567 init_emit_once (line_numbers)
4571 enum machine_mode mode;
4572 enum machine_mode double_mode;
4574 /* Initialize the CONST_INT and memory attribute hash tables. */
4575 const_int_htab = htab_create (37, const_int_htab_hash,
4576 const_int_htab_eq, NULL);
4577 ggc_add_deletable_htab (const_int_htab, 0, 0);
4579 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4580 mem_attrs_htab_eq, NULL);
4581 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4583 no_line_numbers = ! line_numbers;
4585 /* Compute the word and byte modes. */
4587 byte_mode = VOIDmode;
4588 word_mode = VOIDmode;
4589 double_mode = VOIDmode;
4591 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4592 mode = GET_MODE_WIDER_MODE (mode))
4594 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4595 && byte_mode == VOIDmode)
4598 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4599 && word_mode == VOIDmode)
4603 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4604 mode = GET_MODE_WIDER_MODE (mode))
4606 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4607 && double_mode == VOIDmode)
4611 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4613 /* Assign register numbers to the globally defined register rtx.
4614 This must be done at runtime because the register number field
4615 is in a union and some compilers can't initialize unions. */
4617 pc_rtx = gen_rtx (PC, VOIDmode);
4618 cc0_rtx = gen_rtx (CC0, VOIDmode);
4619 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4620 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4621 if (hard_frame_pointer_rtx == 0)
4622 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4623 HARD_FRAME_POINTER_REGNUM);
4624 if (arg_pointer_rtx == 0)
4625 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4626 virtual_incoming_args_rtx =
4627 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4628 virtual_stack_vars_rtx =
4629 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4630 virtual_stack_dynamic_rtx =
4631 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4632 virtual_outgoing_args_rtx =
4633 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4634 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4636 /* These rtx must be roots if GC is enabled. */
4637 ggc_add_rtx_root (global_rtl, GR_MAX);
4639 #ifdef INIT_EXPANDERS
4640 /* This is to initialize {init|mark|free}_machine_status before the first
4641 call to push_function_context_to. This is needed by the Chill front
4642 end which calls push_function_context_to before the first cal to
4643 init_function_start. */
4647 /* Create the unique rtx's for certain rtx codes and operand values. */
4649 /* Don't use gen_rtx here since gen_rtx in this case
4650 tries to use these variables. */
4651 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4652 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4653 gen_rtx_raw_CONST_INT (VOIDmode, i);
4654 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4656 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4657 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4658 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4660 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4662 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4663 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4664 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4665 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4667 for (i = 0; i <= 2; i++)
4669 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4670 mode = GET_MODE_WIDER_MODE (mode))
4672 rtx tem = rtx_alloc (CONST_DOUBLE);
4673 union real_extract u;
4675 /* Zero any holes in a structure. */
4676 memset ((char *) &u, 0, sizeof u);
4677 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4679 /* Avoid trailing garbage in the rtx. */
4680 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4681 CONST_DOUBLE_LOW (tem) = 0;
4682 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4683 CONST_DOUBLE_HIGH (tem) = 0;
4685 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4686 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4687 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4688 PUT_MODE (tem, mode);
4690 const_tiny_rtx[i][(int) mode] = tem;
4693 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4695 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4696 mode = GET_MODE_WIDER_MODE (mode))
4697 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4699 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4701 mode = GET_MODE_WIDER_MODE (mode))
4702 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4705 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4706 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4707 const_tiny_rtx[0][i] = const0_rtx;
4709 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4710 if (STORE_FLAG_VALUE == 1)
4711 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4713 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4714 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4715 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4716 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4717 ggc_add_rtx_root (&const_true_rtx, 1);
4719 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4720 return_address_pointer_rtx
4721 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4725 struct_value_rtx = STRUCT_VALUE;
4727 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4730 #ifdef STRUCT_VALUE_INCOMING
4731 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4733 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4734 struct_value_incoming_rtx
4735 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4737 struct_value_incoming_rtx = struct_value_rtx;
4741 #ifdef STATIC_CHAIN_REGNUM
4742 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4744 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4745 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4746 static_chain_incoming_rtx
4747 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4750 static_chain_incoming_rtx = static_chain_rtx;
4754 static_chain_rtx = STATIC_CHAIN;
4756 #ifdef STATIC_CHAIN_INCOMING
4757 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4759 static_chain_incoming_rtx = static_chain_rtx;
4763 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4764 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4766 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4767 ggc_add_rtx_root (&struct_value_rtx, 1);
4768 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4769 ggc_add_rtx_root (&static_chain_rtx, 1);
4770 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4771 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4774 /* Query and clear/ restore no_line_numbers. This is used by the
4775 switch / case handling in stmt.c to give proper line numbers in
4776 warnings about unreachable code. */
4779 force_line_numbers ()
4781 int old = no_line_numbers;
4783 no_line_numbers = 0;
4785 force_next_line_note ();
4790 restore_line_number_status (old_value)
4793 no_line_numbers = old_value;