1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl[GR_MAX];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab;
147 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
148 shortly thrown away. We use two mechanisms to prevent this waste:
150 For sizes up to 5 elements, we keep a SEQUENCE and its associated
151 rtvec for use by gen_sequence. One entry for each size is
152 sufficient because most cases are calls to gen_sequence followed by
153 immediately emitting the SEQUENCE. Reuse is safe since emitting a
154 sequence is destructive on the insn in it anyway and hence can't be
157 We do not bother to save this cached data over nested function calls.
158 Instead, we just reinitialize them. */
160 #define SEQUENCE_RESULT_SIZE 5
162 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
164 /* During RTL generation, we also keep a list of free INSN rtl codes. */
165 static rtx free_insn;
167 #define first_insn (cfun->emit->x_first_insn)
168 #define last_insn (cfun->emit->x_last_insn)
169 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
170 #define last_linenum (cfun->emit->x_last_linenum)
171 #define last_filename (cfun->emit->x_last_filename)
172 #define first_label_num (cfun->emit->x_first_label_num)
174 /* This is where the pointer to the obstack being used for RTL is stored. */
175 extern struct obstack *rtl_obstack;
177 static rtx make_jump_insn_raw PARAMS ((rtx));
178 static rtx make_call_insn_raw PARAMS ((rtx));
179 static rtx find_line_note PARAMS ((rtx));
180 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
181 static void unshare_all_rtl_1 PARAMS ((rtx));
182 static void unshare_all_decls PARAMS ((tree));
183 static void reset_used_decls PARAMS ((tree));
184 static hashval_t const_int_htab_hash PARAMS ((const void *));
185 static int const_int_htab_eq PARAMS ((const void *,
187 static int rtx_htab_mark_1 PARAMS ((void **, void *));
188 static void rtx_htab_mark PARAMS ((void *));
191 /* Returns a hash code for X (which is a really a CONST_INT). */
194 const_int_htab_hash (x)
197 return (hashval_t) INTVAL ((const struct rtx_def *) x);
200 /* Returns non-zero if the value represented by X (which is really a
201 CONST_INT) is the same as that given by Y (which is really a
205 const_int_htab_eq (x, y)
209 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
212 /* Mark the hash-table element X (which is really a pointer to an
216 rtx_htab_mark_1 (x, data)
218 void *data ATTRIBUTE_UNUSED;
224 /* Mark all the elements of HTAB (which is really an htab_t full of
231 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
234 /* There are some RTL codes that require special attention; the generation
235 functions do the raw handling. If you add to this list, modify
236 special_rtx in gengenrtl.c as well. */
239 gen_rtx_CONST_INT (mode, arg)
240 enum machine_mode mode ATTRIBUTE_UNUSED;
245 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
246 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
248 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
249 if (const_true_rtx && arg == STORE_FLAG_VALUE)
250 return const_true_rtx;
253 /* Look up the CONST_INT in the hash table. */
254 slot = htab_find_slot_with_hash (const_int_htab, &arg,
255 (hashval_t) arg, INSERT);
260 push_obstacks_nochange ();
261 end_temporary_allocation ();
262 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
266 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
272 /* CONST_DOUBLEs needs special handling because their length is known
276 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
277 enum machine_mode mode;
279 HOST_WIDE_INT arg1, arg2;
281 rtx r = rtx_alloc (CONST_DOUBLE);
286 X0EXP (r, 1) = NULL_RTX;
290 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
297 gen_rtx_REG (mode, regno)
298 enum machine_mode mode;
301 /* In case the MD file explicitly references the frame pointer, have
302 all such references point to the same frame pointer. This is
303 used during frame pointer elimination to distinguish the explicit
304 references to these registers from pseudos that happened to be
307 If we have eliminated the frame pointer or arg pointer, we will
308 be using it as a normal register, for example as a spill
309 register. In such cases, we might be accessing it in a mode that
310 is not Pmode and therefore cannot use the pre-allocated rtx.
312 Also don't do this when we are making new REGs in reload, since
313 we don't want to get confused with the real pointers. */
315 if (mode == Pmode && !reload_in_progress)
317 if (regno == FRAME_POINTER_REGNUM)
318 return frame_pointer_rtx;
319 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
320 if (regno == HARD_FRAME_POINTER_REGNUM)
321 return hard_frame_pointer_rtx;
323 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
324 if (regno == ARG_POINTER_REGNUM)
325 return arg_pointer_rtx;
327 #ifdef RETURN_ADDRESS_POINTER_REGNUM
328 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
329 return return_address_pointer_rtx;
331 if (regno == STACK_POINTER_REGNUM)
332 return stack_pointer_rtx;
335 return gen_rtx_raw_REG (mode, regno);
339 gen_rtx_MEM (mode, addr)
340 enum machine_mode mode;
343 rtx rt = gen_rtx_raw_MEM (mode, addr);
345 /* This field is not cleared by the mere allocation of the rtx, so
347 MEM_ALIAS_SET (rt) = 0;
352 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
354 ** This routine generates an RTX of the size specified by
355 ** <code>, which is an RTX code. The RTX structure is initialized
356 ** from the arguments <element1> through <elementn>, which are
357 ** interpreted according to the specific RTX type's format. The
358 ** special machine mode associated with the rtx (if any) is specified
361 ** gen_rtx can be invoked in a way which resembles the lisp-like
362 ** rtx it will generate. For example, the following rtx structure:
364 ** (plus:QI (mem:QI (reg:SI 1))
365 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
367 ** ...would be generated by the following C code:
369 ** gen_rtx (PLUS, QImode,
370 ** gen_rtx (MEM, QImode,
371 ** gen_rtx (REG, SImode, 1)),
372 ** gen_rtx (MEM, QImode,
373 ** gen_rtx (PLUS, SImode,
374 ** gen_rtx (REG, SImode, 2),
375 ** gen_rtx (REG, SImode, 3)))),
380 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
382 #ifndef ANSI_PROTOTYPES
384 enum machine_mode mode;
387 register int i; /* Array indices... */
388 register const char *fmt; /* Current rtx's format... */
389 register rtx rt_val; /* RTX to return to caller... */
393 #ifndef ANSI_PROTOTYPES
394 code = va_arg (p, enum rtx_code);
395 mode = va_arg (p, enum machine_mode);
401 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
406 rtx arg0 = va_arg (p, rtx);
407 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
408 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
409 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
414 rt_val = gen_rtx_REG (mode, va_arg (p, int));
418 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
422 rt_val = rtx_alloc (code); /* Allocate the storage space. */
423 rt_val->mode = mode; /* Store the machine mode... */
425 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
426 for (i = 0; i < GET_RTX_LENGTH (code); i++)
430 case '0': /* Unused field. */
433 case 'i': /* An integer? */
434 XINT (rt_val, i) = va_arg (p, int);
437 case 'w': /* A wide integer? */
438 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
441 case 's': /* A string? */
442 XSTR (rt_val, i) = va_arg (p, char *);
445 case 'e': /* An expression? */
446 case 'u': /* An insn? Same except when printing. */
447 XEXP (rt_val, i) = va_arg (p, rtx);
450 case 'E': /* An RTX vector? */
451 XVEC (rt_val, i) = va_arg (p, rtvec);
454 case 'b': /* A bitmap? */
455 XBITMAP (rt_val, i) = va_arg (p, bitmap);
458 case 't': /* A tree? */
459 XTREE (rt_val, i) = va_arg (p, tree);
473 /* gen_rtvec (n, [rt1, ..., rtn])
475 ** This routine creates an rtvec and stores within it the
476 ** pointers to rtx's which are its arguments.
481 gen_rtvec VPARAMS ((int n, ...))
483 #ifndef ANSI_PROTOTYPES
492 #ifndef ANSI_PROTOTYPES
497 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
499 vector = (rtx *) alloca (n * sizeof (rtx));
501 for (i = 0; i < n; i++)
502 vector[i] = va_arg (p, rtx);
505 return gen_rtvec_v (n, vector);
509 gen_rtvec_v (n, argp)
514 register rtvec rt_val;
517 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
519 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
521 for (i = 0; i < n; i++)
522 rt_val->elem[i] = *argp++;
528 /* Generate a REG rtx for a new pseudo register of mode MODE.
529 This pseudo is assigned the next sequential register number. */
533 enum machine_mode mode;
535 struct function *f = cfun;
538 /* Don't let anything called after initial flow analysis create new
543 if (generating_concat_p
544 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
545 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
547 /* For complex modes, don't make a single pseudo.
548 Instead, make a CONCAT of two pseudos.
549 This allows noncontiguous allocation of the real and imaginary parts,
550 which makes much better code. Besides, allocating DCmode
551 pseudos overstrains reload on some machines like the 386. */
552 rtx realpart, imagpart;
553 int size = GET_MODE_UNIT_SIZE (mode);
554 enum machine_mode partmode
555 = mode_for_size (size * BITS_PER_UNIT,
556 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
557 ? MODE_FLOAT : MODE_INT),
560 realpart = gen_reg_rtx (partmode);
561 imagpart = gen_reg_rtx (partmode);
562 return gen_rtx_CONCAT (mode, realpart, imagpart);
565 /* Make sure regno_pointer_flag and regno_reg_rtx are large
566 enough to have an element for this pseudo reg number. */
568 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
570 int old_size = f->emit->regno_pointer_flag_length;
573 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
574 memset (new + old_size, 0, old_size);
575 f->emit->regno_pointer_flag = new;
577 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
578 memset (new + old_size, 0, old_size);
579 f->emit->regno_pointer_align = (unsigned char *) new;
581 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
582 old_size * 2 * sizeof (rtx));
583 memset (new1 + old_size, 0, old_size * sizeof (rtx));
584 regno_reg_rtx = new1;
586 f->emit->regno_pointer_flag_length = old_size * 2;
589 val = gen_rtx_raw_REG (mode, reg_rtx_no);
590 regno_reg_rtx[reg_rtx_no++] = val;
594 /* Identify REG (which may be a CONCAT) as a user register. */
600 if (GET_CODE (reg) == CONCAT)
602 REG_USERVAR_P (XEXP (reg, 0)) = 1;
603 REG_USERVAR_P (XEXP (reg, 1)) = 1;
605 else if (GET_CODE (reg) == REG)
606 REG_USERVAR_P (reg) = 1;
611 /* Identify REG as a probable pointer register and show its alignment
612 as ALIGN, if nonzero. */
615 mark_reg_pointer (reg, align)
619 if (! REGNO_POINTER_FLAG (REGNO (reg)))
621 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
624 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
626 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
627 /* We can no-longer be sure just how aligned this pointer is */
628 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
631 /* Return 1 plus largest pseudo reg number used in the current function. */
639 /* Return 1 + the largest label number used so far in the current function. */
644 if (last_label_num && label_num == base_label_num)
645 return last_label_num;
649 /* Return first label number used in this function (if any were used). */
652 get_first_label_num ()
654 return first_label_num;
657 /* Return a value representing some low-order bits of X, where the number
658 of low-order bits is given by MODE. Note that no conversion is done
659 between floating-point and fixed-point values, rather, the bit
660 representation is returned.
662 This function handles the cases in common between gen_lowpart, below,
663 and two variants in cse.c and combine.c. These are the cases that can
664 be safely handled at all points in the compilation.
666 If this is not a case we can handle, return 0. */
669 gen_lowpart_common (mode, x)
670 enum machine_mode mode;
675 if (GET_MODE (x) == mode)
678 /* MODE must occupy no more words than the mode of X. */
679 if (GET_MODE (x) != VOIDmode
680 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
681 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
685 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
686 word = ((GET_MODE_SIZE (GET_MODE (x))
687 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
690 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
691 && (GET_MODE_CLASS (mode) == MODE_INT
692 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
694 /* If we are getting the low-order part of something that has been
695 sign- or zero-extended, we can either just use the object being
696 extended or make a narrower extension. If we want an even smaller
697 piece than the size of the object being extended, call ourselves
700 This case is used mostly by combine and cse. */
702 if (GET_MODE (XEXP (x, 0)) == mode)
704 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
705 return gen_lowpart_common (mode, XEXP (x, 0));
706 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
707 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
709 else if (GET_CODE (x) == SUBREG
710 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
711 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
712 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
714 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
715 else if (GET_CODE (x) == REG)
717 /* Let the backend decide how many registers to skip. This is needed
718 in particular for Sparc64 where fp regs are smaller than a word. */
719 /* ??? Note that subregs are now ambiguous, in that those against
720 pseudos are sized by the Word Size, while those against hard
721 regs are sized by the underlying register size. Better would be
722 to always interpret the subreg offset parameter as bytes or bits. */
724 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
725 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
726 - HARD_REGNO_NREGS (REGNO (x), mode));
728 /* If the register is not valid for MODE, return 0. If we don't
729 do this, there is no way to fix up the resulting REG later.
730 But we do do this if the current REG is not valid for its
731 mode. This latter is a kludge, but is required due to the
732 way that parameters are passed on some machines, most
734 if (REGNO (x) < FIRST_PSEUDO_REGISTER
735 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
736 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
738 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
739 /* integrate.c can't handle parts of a return value register. */
740 && (! REG_FUNCTION_VALUE_P (x)
741 || ! rtx_equal_function_value_matters)
742 #ifdef CLASS_CANNOT_CHANGE_MODE
743 && ! (CLASS_CANNOT_CHANGE_MODE_P (mode, GET_MODE (x))
744 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
745 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
746 && (TEST_HARD_REG_BIT
747 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
750 /* We want to keep the stack, frame, and arg pointers
752 && x != frame_pointer_rtx
753 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
754 && x != arg_pointer_rtx
756 && x != stack_pointer_rtx)
757 return gen_rtx_REG (mode, REGNO (x) + word);
759 return gen_rtx_SUBREG (mode, x, word);
761 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
762 from the low-order part of the constant. */
763 else if ((GET_MODE_CLASS (mode) == MODE_INT
764 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
765 && GET_MODE (x) == VOIDmode
766 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
768 /* If MODE is twice the host word size, X is already the desired
769 representation. Otherwise, if MODE is wider than a word, we can't
770 do this. If MODE is exactly a word, return just one CONST_INT.
771 If MODE is smaller than a word, clear the bits that don't belong
772 in our mode, unless they and our sign bit are all one. So we get
773 either a reasonable negative value or a reasonable unsigned value
776 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
778 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
780 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
781 return (GET_CODE (x) == CONST_INT ? x
782 : GEN_INT (CONST_DOUBLE_LOW (x)));
785 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
786 int width = GET_MODE_BITSIZE (mode);
787 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
788 : CONST_DOUBLE_LOW (x));
790 /* Sign extend to HOST_WIDE_INT. */
791 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
793 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
798 #ifndef REAL_ARITHMETIC
799 /* If X is an integral constant but we want it in floating-point, it
800 must be the case that we have a union of an integer and a floating-point
801 value. If the machine-parameters allow it, simulate that union here
802 and return the result. The two-word and single-word cases are
805 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
806 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
807 || flag_pretend_float)
808 && GET_MODE_CLASS (mode) == MODE_FLOAT
809 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
810 && GET_CODE (x) == CONST_INT
811 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
813 union {HOST_WIDE_INT i; float d; } u;
816 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
818 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
819 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
820 || flag_pretend_float)
821 && GET_MODE_CLASS (mode) == MODE_FLOAT
822 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
823 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
824 && GET_MODE (x) == VOIDmode
825 && (sizeof (double) * HOST_BITS_PER_CHAR
826 == 2 * HOST_BITS_PER_WIDE_INT))
828 union {HOST_WIDE_INT i[2]; double d; } u;
829 HOST_WIDE_INT low, high;
831 if (GET_CODE (x) == CONST_INT)
832 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
834 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
836 #ifdef HOST_WORDS_BIG_ENDIAN
837 u.i[0] = high, u.i[1] = low;
839 u.i[0] = low, u.i[1] = high;
842 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
845 /* Similarly, if this is converting a floating-point value into a
846 single-word integer. Only do this is the host and target parameters are
849 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
850 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
851 || flag_pretend_float)
852 && (GET_MODE_CLASS (mode) == MODE_INT
853 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
854 && GET_CODE (x) == CONST_DOUBLE
855 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
856 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
857 return operand_subword (x, word, 0, GET_MODE (x));
859 /* Similarly, if this is converting a floating-point value into a
860 two-word integer, we can do this one word at a time and make an
861 integer. Only do this is the host and target parameters are
864 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
865 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
866 || flag_pretend_float)
867 && (GET_MODE_CLASS (mode) == MODE_INT
868 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
869 && GET_CODE (x) == CONST_DOUBLE
870 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
871 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
874 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
876 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
878 if (lowpart && GET_CODE (lowpart) == CONST_INT
879 && highpart && GET_CODE (highpart) == CONST_INT)
880 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
882 #else /* ifndef REAL_ARITHMETIC */
884 /* When we have a FP emulator, we can handle all conversions between
885 FP and integer operands. This simplifies reload because it
886 doesn't have to deal with constructs like (subreg:DI
887 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
889 else if (mode == SFmode
890 && GET_CODE (x) == CONST_INT)
896 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
897 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
899 else if (mode == DFmode
900 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
901 && GET_MODE (x) == VOIDmode)
905 HOST_WIDE_INT low, high;
907 if (GET_CODE (x) == CONST_INT)
910 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
914 low = CONST_DOUBLE_LOW (x);
915 high = CONST_DOUBLE_HIGH (x);
918 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
920 if (WORDS_BIG_ENDIAN)
921 i[0] = high, i[1] = low;
923 i[0] = low, i[1] = high;
925 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
926 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
928 else if ((GET_MODE_CLASS (mode) == MODE_INT
929 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
930 && GET_CODE (x) == CONST_DOUBLE
931 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
934 long i[4]; /* Only the low 32 bits of each 'long' are used. */
935 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
937 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
938 switch (GET_MODE (x))
941 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
945 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
947 #if LONG_DOUBLE_TYPE_SIZE == 96
952 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
958 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
960 #if HOST_BITS_PER_WIDE_INT == 32
961 return immed_double_const (i[endian], i[1 - endian], mode);
966 if (HOST_BITS_PER_WIDE_INT != 64)
969 for (c = 0; c < 4; c++)
972 return immed_double_const (i[endian * 3]
973 | (((HOST_WIDE_INT) i[1 + endian]) << 32),
975 | (((HOST_WIDE_INT) i[3 - endian * 3])
981 #endif /* ifndef REAL_ARITHMETIC */
983 /* Otherwise, we can't do this. */
987 /* Return the real part (which has mode MODE) of a complex value X.
988 This always comes at the low address in memory. */
991 gen_realpart (mode, x)
992 enum machine_mode mode;
995 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
997 else if (WORDS_BIG_ENDIAN
998 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1000 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1001 fatal ("Unable to access real part of complex value in a hard register on this target");
1002 else if (WORDS_BIG_ENDIAN)
1003 return gen_highpart (mode, x);
1005 return gen_lowpart (mode, x);
1008 /* Return the imaginary part (which has mode MODE) of a complex value X.
1009 This always comes at the high address in memory. */
1012 gen_imagpart (mode, x)
1013 enum machine_mode mode;
1016 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
1018 else if (WORDS_BIG_ENDIAN)
1019 return gen_lowpart (mode, x);
1020 else if (!WORDS_BIG_ENDIAN
1021 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1023 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1024 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
1026 return gen_highpart (mode, x);
1029 /* Return 1 iff X, assumed to be a SUBREG,
1030 refers to the real part of the complex value in its containing reg.
1031 Complex values are always stored with the real part in the first word,
1032 regardless of WORDS_BIG_ENDIAN. */
1035 subreg_realpart_p (x)
1038 if (GET_CODE (x) != SUBREG)
1041 return ((unsigned int) SUBREG_WORD (x) * UNITS_PER_WORD
1042 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1045 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1046 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1047 least-significant part of X.
1048 MODE specifies how big a part of X to return;
1049 it usually should not be larger than a word.
1050 If X is a MEM whose address is a QUEUED, the value may be so also. */
1053 gen_lowpart (mode, x)
1054 enum machine_mode mode;
1057 rtx result = gen_lowpart_common (mode, x);
1061 else if (GET_CODE (x) == REG)
1063 /* Must be a hard reg that's not valid in MODE. */
1064 result = gen_lowpart_common (mode, copy_to_reg (x));
1069 else if (GET_CODE (x) == MEM)
1071 /* The only additional case we can do is MEM. */
1072 register int offset = 0;
1073 if (WORDS_BIG_ENDIAN)
1074 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1075 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1077 if (BYTES_BIG_ENDIAN)
1078 /* Adjust the address so that the address-after-the-data
1080 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1081 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1083 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1085 else if (GET_CODE (x) == ADDRESSOF)
1086 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1091 /* Like `gen_lowpart', but refer to the most significant part.
1092 This is used to access the imaginary part of a complex number. */
1095 gen_highpart (mode, x)
1096 enum machine_mode mode;
1099 /* This case loses if X is a subreg. To catch bugs early,
1100 complain if an invalid MODE is used even in other cases. */
1101 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1102 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1104 if (GET_CODE (x) == CONST_DOUBLE
1105 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1106 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1109 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1110 else if (GET_CODE (x) == CONST_INT)
1112 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1114 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1116 else if (GET_CODE (x) == MEM)
1118 register int offset = 0;
1119 if (! WORDS_BIG_ENDIAN)
1120 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1121 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1123 if (! BYTES_BIG_ENDIAN
1124 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1125 offset -= (GET_MODE_SIZE (mode)
1126 - MIN (UNITS_PER_WORD,
1127 GET_MODE_SIZE (GET_MODE (x))));
1129 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1131 else if (GET_CODE (x) == SUBREG)
1133 /* The only time this should occur is when we are looking at a
1134 multi-word item with a SUBREG whose mode is the same as that of the
1135 item. It isn't clear what we would do if it wasn't. */
1136 if (SUBREG_WORD (x) != 0)
1138 return gen_highpart (mode, SUBREG_REG (x));
1140 else if (GET_CODE (x) == REG)
1144 /* Let the backend decide how many registers to skip. This is needed
1145 in particular for sparc64 where fp regs are smaller than a word. */
1146 /* ??? Note that subregs are now ambiguous, in that those against
1147 pseudos are sized by the word size, while those against hard
1148 regs are sized by the underlying register size. Better would be
1149 to always interpret the subreg offset parameter as bytes or bits. */
1151 if (WORDS_BIG_ENDIAN)
1153 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1154 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1155 - HARD_REGNO_NREGS (REGNO (x), mode));
1157 word = ((GET_MODE_SIZE (GET_MODE (x))
1158 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1161 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1162 /* integrate.c can't handle parts of a return value register. */
1163 && (! REG_FUNCTION_VALUE_P (x)
1164 || ! rtx_equal_function_value_matters)
1165 /* We want to keep the stack, frame, and arg pointers special. */
1166 && x != frame_pointer_rtx
1167 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1168 && x != arg_pointer_rtx
1170 && x != stack_pointer_rtx)
1171 return gen_rtx_REG (mode, REGNO (x) + word);
1173 return gen_rtx_SUBREG (mode, x, word);
1179 /* Return 1 iff X, assumed to be a SUBREG,
1180 refers to the least significant part of its containing reg.
1181 If X is not a SUBREG, always return 1 (it is its own low part!). */
1184 subreg_lowpart_p (x)
1187 if (GET_CODE (x) != SUBREG)
1189 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1192 if (WORDS_BIG_ENDIAN
1193 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1194 return (SUBREG_WORD (x)
1195 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1196 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1199 return SUBREG_WORD (x) == 0;
1202 /* Return subword I of operand OP.
1203 The word number, I, is interpreted as the word number starting at the
1204 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1205 otherwise it is the high-order word.
1207 If we cannot extract the required word, we return zero. Otherwise, an
1208 rtx corresponding to the requested word will be returned.
1210 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1211 reload has completed, a valid address will always be returned. After
1212 reload, if a valid address cannot be returned, we return zero.
1214 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1215 it is the responsibility of the caller.
1217 MODE is the mode of OP in case it is a CONST_INT. */
1220 operand_subword (op, i, validate_address, mode)
1223 int validate_address;
1224 enum machine_mode mode;
1227 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1229 if (mode == VOIDmode)
1230 mode = GET_MODE (op);
1232 if (mode == VOIDmode)
1235 /* If OP is narrower than a word, fail. */
1237 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1240 /* If we want a word outside OP, return zero. */
1242 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1245 /* If OP is already an integer word, return it. */
1246 if (GET_MODE_CLASS (mode) == MODE_INT
1247 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1250 /* If OP is a REG or SUBREG, we can handle it very simply. */
1251 if (GET_CODE (op) == REG)
1253 /* ??? There is a potential problem with this code. It does not
1254 properly handle extractions of a subword from a hard register
1255 that is larger than word_mode. Presumably the check for
1256 HARD_REGNO_MODE_OK catches these most of these cases. */
1258 /* If OP is a hard register, but OP + I is not a hard register,
1259 then extracting a subword is impossible.
1261 For example, consider if OP is the last hard register and it is
1262 larger than word_mode. If we wanted word N (for N > 0) because a
1263 part of that hard register was known to contain a useful value,
1264 then OP + I would refer to a pseudo, not the hard register we
1266 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1267 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1270 /* If the register is not valid for MODE, return 0. Note we
1271 have to check both OP and OP + I since they may refer to
1272 different parts of the register file.
1274 Consider if OP refers to the last 96bit FP register and we want
1275 subword 3 because that subword is known to contain a value we
1277 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1278 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1279 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1281 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1282 || (REG_FUNCTION_VALUE_P (op)
1283 && rtx_equal_function_value_matters)
1284 /* We want to keep the stack, frame, and arg pointers
1286 || op == frame_pointer_rtx
1287 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1288 || op == arg_pointer_rtx
1290 || op == stack_pointer_rtx)
1291 return gen_rtx_SUBREG (word_mode, op, i);
1293 return gen_rtx_REG (word_mode, REGNO (op) + i);
1295 else if (GET_CODE (op) == SUBREG)
1296 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1297 else if (GET_CODE (op) == CONCAT)
1299 unsigned int partwords
1300 = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1303 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1304 return operand_subword (XEXP (op, 1), i - partwords,
1305 validate_address, mode);
1308 /* Form a new MEM at the requested address. */
1309 if (GET_CODE (op) == MEM)
1311 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1314 if (validate_address)
1316 if (reload_completed)
1318 if (! strict_memory_address_p (word_mode, addr))
1322 addr = memory_address (word_mode, addr);
1325 new = gen_rtx_MEM (word_mode, addr);
1326 MEM_COPY_ATTRIBUTES (new, op);
1330 /* The only remaining cases are when OP is a constant. If the host and
1331 target floating formats are the same, handling two-word floating
1332 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1333 are defined as returning one or two 32 bit values, respectively,
1334 and not values of BITS_PER_WORD bits. */
1335 #ifdef REAL_ARITHMETIC
1336 /* The output is some bits, the width of the target machine's word.
1337 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1339 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1340 && GET_MODE_CLASS (mode) == MODE_FLOAT
1341 && GET_MODE_BITSIZE (mode) == 64
1342 && GET_CODE (op) == CONST_DOUBLE)
1347 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1348 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1350 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1351 which the words are written depends on the word endianness.
1352 ??? This is a potential portability problem and should
1353 be fixed at some point.
1355 We must excercise caution with the sign bit. By definition there
1356 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1357 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1358 So we explicitly mask and sign-extend as necessary. */
1359 if (BITS_PER_WORD == 32)
1362 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1363 return GEN_INT (val);
1365 #if HOST_BITS_PER_WIDE_INT >= 64
1366 else if (BITS_PER_WORD >= 64 && i == 0)
1368 val = k[! WORDS_BIG_ENDIAN];
1369 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1370 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1371 return GEN_INT (val);
1374 else if (BITS_PER_WORD == 16)
1377 if ((i & 1) == !WORDS_BIG_ENDIAN)
1380 return GEN_INT (val);
1385 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1386 && GET_MODE_CLASS (mode) == MODE_FLOAT
1387 && GET_MODE_BITSIZE (mode) > 64
1388 && GET_CODE (op) == CONST_DOUBLE)
1393 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1394 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1396 if (BITS_PER_WORD == 32)
1399 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1400 return GEN_INT (val);
1402 #if HOST_BITS_PER_WIDE_INT >= 64
1403 else if (BITS_PER_WORD >= 64 && i <= 1)
1405 val = k[i*2 + ! WORDS_BIG_ENDIAN];
1406 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1407 val |= (HOST_WIDE_INT) k[i*2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1408 return GEN_INT (val);
1414 #else /* no REAL_ARITHMETIC */
1415 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1416 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1417 || flag_pretend_float)
1418 && GET_MODE_CLASS (mode) == MODE_FLOAT
1419 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1420 && GET_CODE (op) == CONST_DOUBLE)
1422 /* The constant is stored in the host's word-ordering,
1423 but we want to access it in the target's word-ordering. Some
1424 compilers don't like a conditional inside macro args, so we have two
1425 copies of the return. */
1426 #ifdef HOST_WORDS_BIG_ENDIAN
1427 return GEN_INT (i == WORDS_BIG_ENDIAN
1428 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1430 return GEN_INT (i != WORDS_BIG_ENDIAN
1431 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1434 #endif /* no REAL_ARITHMETIC */
1436 /* Single word float is a little harder, since single- and double-word
1437 values often do not have the same high-order bits. We have already
1438 verified that we want the only defined word of the single-word value. */
1439 #ifdef REAL_ARITHMETIC
1440 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1441 && GET_MODE_BITSIZE (mode) == 32
1442 && GET_CODE (op) == CONST_DOUBLE)
1447 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1448 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1450 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1452 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1454 if (BITS_PER_WORD == 16)
1456 if ((i & 1) == !WORDS_BIG_ENDIAN)
1461 return GEN_INT (val);
1464 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1465 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1466 || flag_pretend_float)
1467 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1468 && GET_MODE_CLASS (mode) == MODE_FLOAT
1469 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1470 && GET_CODE (op) == CONST_DOUBLE)
1473 union {float f; HOST_WIDE_INT i; } u;
1475 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1478 return GEN_INT (u.i);
1480 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1481 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1482 || flag_pretend_float)
1483 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1484 && GET_MODE_CLASS (mode) == MODE_FLOAT
1485 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1486 && GET_CODE (op) == CONST_DOUBLE)
1489 union {double d; HOST_WIDE_INT i; } u;
1491 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1494 return GEN_INT (u.i);
1496 #endif /* no REAL_ARITHMETIC */
1498 /* The only remaining cases that we can handle are integers.
1499 Convert to proper endianness now since these cases need it.
1500 At this point, i == 0 means the low-order word.
1502 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1503 in general. However, if OP is (const_int 0), we can just return
1506 if (op == const0_rtx)
1509 if (GET_MODE_CLASS (mode) != MODE_INT
1510 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1511 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1514 if (WORDS_BIG_ENDIAN)
1515 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1517 /* Find out which word on the host machine this value is in and get
1518 it from the constant. */
1519 val = (i / size_ratio == 0
1520 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1521 : (GET_CODE (op) == CONST_INT
1522 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1524 /* Get the value we want into the low bits of val. */
1525 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1526 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1528 val = trunc_int_for_mode (val, word_mode);
1530 return GEN_INT (val);
1533 /* Similar to `operand_subword', but never return 0. If we can't extract
1534 the required subword, put OP into a register and try again. If that fails,
1535 abort. We always validate the address in this case. It is not valid
1536 to call this function after reload; it is mostly meant for RTL
1539 MODE is the mode of OP, in case it is CONST_INT. */
1542 operand_subword_force (op, i, mode)
1545 enum machine_mode mode;
1547 rtx result = operand_subword (op, i, 1, mode);
1552 if (mode != BLKmode && mode != VOIDmode)
1554 /* If this is a register which can not be accessed by words, copy it
1555 to a pseudo register. */
1556 if (GET_CODE (op) == REG)
1557 op = copy_to_reg (op);
1559 op = force_reg (mode, op);
1562 result = operand_subword (op, i, 1, mode);
1569 /* Given a compare instruction, swap the operands.
1570 A test instruction is changed into a compare of 0 against the operand. */
1573 reverse_comparison (insn)
1576 rtx body = PATTERN (insn);
1579 if (GET_CODE (body) == SET)
1580 comp = SET_SRC (body);
1582 comp = SET_SRC (XVECEXP (body, 0, 0));
1584 if (GET_CODE (comp) == COMPARE)
1586 rtx op0 = XEXP (comp, 0);
1587 rtx op1 = XEXP (comp, 1);
1588 XEXP (comp, 0) = op1;
1589 XEXP (comp, 1) = op0;
1593 rtx new = gen_rtx_COMPARE (VOIDmode,
1594 CONST0_RTX (GET_MODE (comp)), comp);
1595 if (GET_CODE (body) == SET)
1596 SET_SRC (body) = new;
1598 SET_SRC (XVECEXP (body, 0, 0)) = new;
1602 /* Return a memory reference like MEMREF, but with its mode changed
1603 to MODE and its address changed to ADDR.
1604 (VOIDmode means don't change the mode.
1605 NULL for ADDR means don't change the address.) */
1608 change_address (memref, mode, addr)
1610 enum machine_mode mode;
1615 if (GET_CODE (memref) != MEM)
1617 if (mode == VOIDmode)
1618 mode = GET_MODE (memref);
1620 addr = XEXP (memref, 0);
1622 /* If reload is in progress or has completed, ADDR must be valid.
1623 Otherwise, we can call memory_address to make it valid. */
1624 if (reload_completed || reload_in_progress)
1626 if (! memory_address_p (mode, addr))
1630 addr = memory_address (mode, addr);
1632 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1635 new = gen_rtx_MEM (mode, addr);
1636 MEM_COPY_ATTRIBUTES (new, memref);
1640 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1647 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1648 NULL_RTX, label_num++, NULL_PTR, NULL_PTR);
1650 LABEL_NUSES (label) = 0;
1651 LABEL_ALTERNATE_NAME (label) = NULL;
1655 /* For procedure integration. */
1657 /* Install new pointers to the first and last insns in the chain.
1658 Also, set cur_insn_uid to one higher than the last in use.
1659 Used for an inline-procedure after copying the insn chain. */
1662 set_new_first_and_last_insn (first, last)
1671 for (insn = first; insn; insn = NEXT_INSN (insn))
1672 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1677 /* Set the range of label numbers found in the current function.
1678 This is used when belatedly compiling an inline function. */
1681 set_new_first_and_last_label_num (first, last)
1684 base_label_num = label_num;
1685 first_label_num = first;
1686 last_label_num = last;
1689 /* Set the last label number found in the current function.
1690 This is used when belatedly compiling an inline function. */
1693 set_new_last_label_num (last)
1696 base_label_num = label_num;
1697 last_label_num = last;
1700 /* Restore all variables describing the current status from the structure *P.
1701 This is used after a nested function. */
1704 restore_emit_status (p)
1705 struct function *p ATTRIBUTE_UNUSED;
1708 clear_emit_caches ();
1711 /* Clear out all parts of the state in F that can safely be discarded
1712 after the function has been compiled, to let garbage collection
1713 reclaim the memory. */
1716 free_emit_status (f)
1719 free (f->emit->x_regno_reg_rtx);
1720 free (f->emit->regno_pointer_flag);
1721 free (f->emit->regno_pointer_align);
1726 /* Go through all the RTL insn bodies and copy any invalid shared
1727 structure. This routine should only be called once. */
1730 unshare_all_rtl (fndecl, insn)
1736 /* Make sure that virtual parameters are not shared. */
1737 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1738 DECL_RTL (decl) = copy_rtx_if_shared (DECL_RTL (decl));
1740 /* Make sure that virtual stack slots are not shared. */
1741 unshare_all_decls (DECL_INITIAL (fndecl));
1743 /* Unshare just about everything else. */
1744 unshare_all_rtl_1 (insn);
1746 /* Make sure the addresses of stack slots found outside the insn chain
1747 (such as, in DECL_RTL of a variable) are not shared
1748 with the insn chain.
1750 This special care is necessary when the stack slot MEM does not
1751 actually appear in the insn chain. If it does appear, its address
1752 is unshared from all else at that point. */
1753 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1756 /* Go through all the RTL insn bodies and copy any invalid shared
1757 structure, again. This is a fairly expensive thing to do so it
1758 should be done sparingly. */
1761 unshare_all_rtl_again (insn)
1767 for (p = insn; p; p = NEXT_INSN (p))
1770 reset_used_flags (PATTERN (p));
1771 reset_used_flags (REG_NOTES (p));
1772 reset_used_flags (LOG_LINKS (p));
1775 /* Make sure that virtual stack slots are not shared. */
1776 reset_used_decls (DECL_INITIAL (cfun->decl));
1778 /* Make sure that virtual parameters are not shared. */
1779 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1780 reset_used_flags (DECL_RTL (decl));
1782 reset_used_flags (stack_slot_list);
1784 unshare_all_rtl (cfun->decl, insn);
1787 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1788 Assumes the mark bits are cleared at entry. */
1791 unshare_all_rtl_1 (insn)
1794 for (; insn; insn = NEXT_INSN (insn))
1797 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1798 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1799 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1803 /* Go through all virtual stack slots of a function and copy any
1804 shared structure. */
1806 unshare_all_decls (blk)
1811 /* Copy shared decls. */
1812 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1813 DECL_RTL (t) = copy_rtx_if_shared (DECL_RTL (t));
1815 /* Now process sub-blocks. */
1816 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1817 unshare_all_decls (t);
1820 /* Go through all virtual stack slots of a function and mark them as
1823 reset_used_decls (blk)
1829 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1830 reset_used_flags (DECL_RTL (t));
1832 /* Now process sub-blocks. */
1833 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1834 reset_used_decls (t);
1837 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1838 Recursively does the same for subexpressions. */
1841 copy_rtx_if_shared (orig)
1844 register rtx x = orig;
1846 register enum rtx_code code;
1847 register const char *format_ptr;
1853 code = GET_CODE (x);
1855 /* These types may be freely shared. */
1868 /* SCRATCH must be shared because they represent distinct values. */
1872 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1873 a LABEL_REF, it isn't sharable. */
1874 if (GET_CODE (XEXP (x, 0)) == PLUS
1875 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1876 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1885 /* The chain of insns is not being copied. */
1889 /* A MEM is allowed to be shared if its address is constant.
1891 We used to allow sharing of MEMs which referenced
1892 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1893 that can lose. instantiate_virtual_regs will not unshare
1894 the MEMs, and combine may change the structure of the address
1895 because it looks safe and profitable in one context, but
1896 in some other context it creates unrecognizable RTL. */
1897 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1906 /* This rtx may not be shared. If it has already been seen,
1907 replace it with a copy of itself. */
1913 copy = rtx_alloc (code);
1914 bcopy ((char *) x, (char *) copy,
1915 (sizeof (*copy) - sizeof (copy->fld)
1916 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1922 /* Now scan the subexpressions recursively.
1923 We can store any replaced subexpressions directly into X
1924 since we know X is not shared! Any vectors in X
1925 must be copied if X was copied. */
1927 format_ptr = GET_RTX_FORMAT (code);
1929 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1931 switch (*format_ptr++)
1934 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1938 if (XVEC (x, i) != NULL)
1941 int len = XVECLEN (x, i);
1943 if (copied && len > 0)
1944 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1945 for (j = 0; j < len; j++)
1946 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1954 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1955 to look for shared sub-parts. */
1958 reset_used_flags (x)
1962 register enum rtx_code code;
1963 register const char *format_ptr;
1968 code = GET_CODE (x);
1970 /* These types may be freely shared so we needn't do any resetting
1991 /* The chain of insns is not being copied. */
2000 format_ptr = GET_RTX_FORMAT (code);
2001 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2003 switch (*format_ptr++)
2006 reset_used_flags (XEXP (x, i));
2010 for (j = 0; j < XVECLEN (x, i); j++)
2011 reset_used_flags (XVECEXP (x, i, j));
2017 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2018 Return X or the rtx for the pseudo reg the value of X was copied into.
2019 OTHER must be valid as a SET_DEST. */
2022 make_safe_from (x, other)
2026 switch (GET_CODE (other))
2029 other = SUBREG_REG (other);
2031 case STRICT_LOW_PART:
2034 other = XEXP (other, 0);
2040 if ((GET_CODE (other) == MEM
2042 && GET_CODE (x) != REG
2043 && GET_CODE (x) != SUBREG)
2044 || (GET_CODE (other) == REG
2045 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2046 || reg_mentioned_p (other, x))))
2048 rtx temp = gen_reg_rtx (GET_MODE (x));
2049 emit_move_insn (temp, x);
2055 /* Emission of insns (adding them to the doubly-linked list). */
2057 /* Return the first insn of the current sequence or current function. */
2065 /* Return the last insn emitted in current sequence or current function. */
2073 /* Specify a new insn as the last in the chain. */
2076 set_last_insn (insn)
2079 if (NEXT_INSN (insn) != 0)
2084 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2087 get_last_insn_anywhere ()
2089 struct sequence_stack *stack;
2092 for (stack = seq_stack; stack; stack = stack->next)
2093 if (stack->last != 0)
2098 /* Return a number larger than any instruction's uid in this function. */
2103 return cur_insn_uid;
2106 /* Renumber instructions so that no instruction UIDs are wasted. */
2109 renumber_insns (stream)
2114 /* If we're not supposed to renumber instructions, don't. */
2115 if (!flag_renumber_insns)
2118 /* If there aren't that many instructions, then it's not really
2119 worth renumbering them. */
2120 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2125 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2128 fprintf (stream, "Renumbering insn %d to %d\n",
2129 INSN_UID (insn), cur_insn_uid);
2130 INSN_UID (insn) = cur_insn_uid++;
2134 /* Return the next insn. If it is a SEQUENCE, return the first insn
2143 insn = NEXT_INSN (insn);
2144 if (insn && GET_CODE (insn) == INSN
2145 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2146 insn = XVECEXP (PATTERN (insn), 0, 0);
2152 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2156 previous_insn (insn)
2161 insn = PREV_INSN (insn);
2162 if (insn && GET_CODE (insn) == INSN
2163 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2164 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2170 /* Return the next insn after INSN that is not a NOTE. This routine does not
2171 look inside SEQUENCEs. */
2174 next_nonnote_insn (insn)
2179 insn = NEXT_INSN (insn);
2180 if (insn == 0 || GET_CODE (insn) != NOTE)
2187 /* Return the previous insn before INSN that is not a NOTE. This routine does
2188 not look inside SEQUENCEs. */
2191 prev_nonnote_insn (insn)
2196 insn = PREV_INSN (insn);
2197 if (insn == 0 || GET_CODE (insn) != NOTE)
2204 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2205 or 0, if there is none. This routine does not look inside
2209 next_real_insn (insn)
2214 insn = NEXT_INSN (insn);
2215 if (insn == 0 || GET_CODE (insn) == INSN
2216 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2223 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2224 or 0, if there is none. This routine does not look inside
2228 prev_real_insn (insn)
2233 insn = PREV_INSN (insn);
2234 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2235 || GET_CODE (insn) == JUMP_INSN)
2242 /* Find the next insn after INSN that really does something. This routine
2243 does not look inside SEQUENCEs. Until reload has completed, this is the
2244 same as next_real_insn. */
2247 active_insn_p (insn)
2250 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2251 || (GET_CODE (insn) == INSN
2252 && (! reload_completed
2253 || (GET_CODE (PATTERN (insn)) != USE
2254 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2258 next_active_insn (insn)
2263 insn = NEXT_INSN (insn);
2264 if (insn == 0 || active_insn_p (insn))
2271 /* Find the last insn before INSN that really does something. This routine
2272 does not look inside SEQUENCEs. Until reload has completed, this is the
2273 same as prev_real_insn. */
2276 prev_active_insn (insn)
2281 insn = PREV_INSN (insn);
2282 if (insn == 0 || active_insn_p (insn))
2289 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2297 insn = NEXT_INSN (insn);
2298 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2305 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2313 insn = PREV_INSN (insn);
2314 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2322 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2323 and REG_CC_USER notes so we can find it. */
2326 link_cc0_insns (insn)
2329 rtx user = next_nonnote_insn (insn);
2331 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2332 user = XVECEXP (PATTERN (user), 0, 0);
2334 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2336 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2339 /* Return the next insn that uses CC0 after INSN, which is assumed to
2340 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2341 applied to the result of this function should yield INSN).
2343 Normally, this is simply the next insn. However, if a REG_CC_USER note
2344 is present, it contains the insn that uses CC0.
2346 Return 0 if we can't find the insn. */
2349 next_cc0_user (insn)
2352 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2355 return XEXP (note, 0);
2357 insn = next_nonnote_insn (insn);
2358 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2359 insn = XVECEXP (PATTERN (insn), 0, 0);
2361 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2367 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2368 note, it is the previous insn. */
2371 prev_cc0_setter (insn)
2374 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2377 return XEXP (note, 0);
2379 insn = prev_nonnote_insn (insn);
2380 if (! sets_cc0_p (PATTERN (insn)))
2387 /* Try splitting insns that can be split for better scheduling.
2388 PAT is the pattern which might split.
2389 TRIAL is the insn providing PAT.
2390 LAST is non-zero if we should return the last insn of the sequence produced.
2392 If this routine succeeds in splitting, it returns the first or last
2393 replacement insn depending on the value of LAST. Otherwise, it
2394 returns TRIAL. If the insn to be returned can be split, it will be. */
2397 try_split (pat, trial, last)
2401 rtx before = PREV_INSN (trial);
2402 rtx after = NEXT_INSN (trial);
2403 rtx seq = split_insns (pat, trial);
2404 int has_barrier = 0;
2407 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2408 We may need to handle this specially. */
2409 if (after && GET_CODE (after) == BARRIER)
2412 after = NEXT_INSN (after);
2417 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2418 The latter case will normally arise only when being done so that
2419 it, in turn, will be split (SFmode on the 29k is an example). */
2420 if (GET_CODE (seq) == SEQUENCE)
2424 /* Avoid infinite loop if any insn of the result matches
2425 the original pattern. */
2426 for (i = 0; i < XVECLEN (seq, 0); i++)
2427 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2428 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2431 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2432 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2433 increment the usage count so we don't delete the label. */
2435 if (GET_CODE (trial) == JUMP_INSN)
2436 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2437 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2439 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2441 if (JUMP_LABEL (trial))
2442 LABEL_NUSES (JUMP_LABEL (trial))++;
2445 tem = emit_insn_after (seq, before);
2447 delete_insn (trial);
2449 emit_barrier_after (tem);
2451 /* Recursively call try_split for each new insn created; by the
2452 time control returns here that insn will be fully split, so
2453 set LAST and continue from the insn after the one returned.
2454 We can't use next_active_insn here since AFTER may be a note.
2455 Ignore deleted insns, which can be occur if not optimizing. */
2456 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2457 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2458 tem = try_split (PATTERN (tem), tem, 1);
2460 /* Avoid infinite loop if the result matches the original pattern. */
2461 else if (rtx_equal_p (seq, pat))
2465 PATTERN (trial) = seq;
2466 INSN_CODE (trial) = -1;
2467 try_split (seq, trial, last);
2470 /* Return either the first or the last insn, depending on which was
2473 ? (after ? prev_active_insn (after) : last_insn)
2474 : next_active_insn (before);
2480 /* Make and return an INSN rtx, initializing all its slots.
2481 Store PATTERN in the pattern slots. */
2484 make_insn_raw (pattern)
2489 /* If in RTL generation phase, see if FREE_INSN can be used. */
2490 if (!ggc_p && free_insn != 0 && rtx_equal_function_value_matters)
2493 free_insn = NEXT_INSN (free_insn);
2494 PUT_CODE (insn, INSN);
2497 insn = rtx_alloc (INSN);
2499 INSN_UID (insn) = cur_insn_uid++;
2500 PATTERN (insn) = pattern;
2501 INSN_CODE (insn) = -1;
2502 LOG_LINKS (insn) = NULL;
2503 REG_NOTES (insn) = NULL;
2505 #ifdef ENABLE_RTL_CHECKING
2508 && (returnjump_p (insn)
2509 || (GET_CODE (insn) == SET
2510 && SET_DEST (insn) == pc_rtx)))
2512 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2520 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2523 make_jump_insn_raw (pattern)
2528 insn = rtx_alloc (JUMP_INSN);
2529 INSN_UID (insn) = cur_insn_uid++;
2531 PATTERN (insn) = pattern;
2532 INSN_CODE (insn) = -1;
2533 LOG_LINKS (insn) = NULL;
2534 REG_NOTES (insn) = NULL;
2535 JUMP_LABEL (insn) = NULL;
2540 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2543 make_call_insn_raw (pattern)
2548 insn = rtx_alloc (CALL_INSN);
2549 INSN_UID (insn) = cur_insn_uid++;
2551 PATTERN (insn) = pattern;
2552 INSN_CODE (insn) = -1;
2553 LOG_LINKS (insn) = NULL;
2554 REG_NOTES (insn) = NULL;
2555 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2560 /* Add INSN to the end of the doubly-linked list.
2561 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2567 PREV_INSN (insn) = last_insn;
2568 NEXT_INSN (insn) = 0;
2570 if (NULL != last_insn)
2571 NEXT_INSN (last_insn) = insn;
2573 if (NULL == first_insn)
2579 /* Add INSN into the doubly-linked list after insn AFTER. This and
2580 the next should be the only functions called to insert an insn once
2581 delay slots have been filled since only they know how to update a
2585 add_insn_after (insn, after)
2588 rtx next = NEXT_INSN (after);
2590 if (optimize && INSN_DELETED_P (after))
2593 NEXT_INSN (insn) = next;
2594 PREV_INSN (insn) = after;
2598 PREV_INSN (next) = insn;
2599 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2600 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2602 else if (last_insn == after)
2606 struct sequence_stack *stack = seq_stack;
2607 /* Scan all pending sequences too. */
2608 for (; stack; stack = stack->next)
2609 if (after == stack->last)
2619 NEXT_INSN (after) = insn;
2620 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2622 rtx sequence = PATTERN (after);
2623 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2627 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2628 the previous should be the only functions called to insert an insn once
2629 delay slots have been filled since only they know how to update a
2633 add_insn_before (insn, before)
2636 rtx prev = PREV_INSN (before);
2638 if (optimize && INSN_DELETED_P (before))
2641 PREV_INSN (insn) = prev;
2642 NEXT_INSN (insn) = before;
2646 NEXT_INSN (prev) = insn;
2647 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2649 rtx sequence = PATTERN (prev);
2650 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2653 else if (first_insn == before)
2657 struct sequence_stack *stack = seq_stack;
2658 /* Scan all pending sequences too. */
2659 for (; stack; stack = stack->next)
2660 if (before == stack->first)
2662 stack->first = insn;
2670 PREV_INSN (before) = insn;
2671 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2672 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2675 /* Remove an insn from its doubly-linked list. This function knows how
2676 to handle sequences. */
2681 rtx next = NEXT_INSN (insn);
2682 rtx prev = PREV_INSN (insn);
2685 NEXT_INSN (prev) = next;
2686 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2688 rtx sequence = PATTERN (prev);
2689 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2692 else if (first_insn == insn)
2696 struct sequence_stack *stack = seq_stack;
2697 /* Scan all pending sequences too. */
2698 for (; stack; stack = stack->next)
2699 if (insn == stack->first)
2701 stack->first = next;
2711 PREV_INSN (next) = prev;
2712 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2713 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2715 else if (last_insn == insn)
2719 struct sequence_stack *stack = seq_stack;
2720 /* Scan all pending sequences too. */
2721 for (; stack; stack = stack->next)
2722 if (insn == stack->last)
2733 /* Delete all insns made since FROM.
2734 FROM becomes the new last instruction. */
2737 delete_insns_since (from)
2743 NEXT_INSN (from) = 0;
2747 /* This function is deprecated, please use sequences instead.
2749 Move a consecutive bunch of insns to a different place in the chain.
2750 The insns to be moved are those between FROM and TO.
2751 They are moved to a new position after the insn AFTER.
2752 AFTER must not be FROM or TO or any insn in between.
2754 This function does not know about SEQUENCEs and hence should not be
2755 called after delay-slot filling has been done. */
2758 reorder_insns (from, to, after)
2759 rtx from, to, after;
2761 /* Splice this bunch out of where it is now. */
2762 if (PREV_INSN (from))
2763 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2765 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2766 if (last_insn == to)
2767 last_insn = PREV_INSN (from);
2768 if (first_insn == from)
2769 first_insn = NEXT_INSN (to);
2771 /* Make the new neighbors point to it and it to them. */
2772 if (NEXT_INSN (after))
2773 PREV_INSN (NEXT_INSN (after)) = to;
2775 NEXT_INSN (to) = NEXT_INSN (after);
2776 PREV_INSN (from) = after;
2777 NEXT_INSN (after) = from;
2778 if (after == last_insn)
2782 /* Return the line note insn preceding INSN. */
2785 find_line_note (insn)
2788 if (no_line_numbers)
2791 for (; insn; insn = PREV_INSN (insn))
2792 if (GET_CODE (insn) == NOTE
2793 && NOTE_LINE_NUMBER (insn) >= 0)
2799 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2800 of the moved insns when debugging. This may insert a note between AFTER
2801 and FROM, and another one after TO. */
2804 reorder_insns_with_line_notes (from, to, after)
2805 rtx from, to, after;
2807 rtx from_line = find_line_note (from);
2808 rtx after_line = find_line_note (after);
2810 reorder_insns (from, to, after);
2812 if (from_line == after_line)
2816 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2817 NOTE_LINE_NUMBER (from_line),
2820 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2821 NOTE_LINE_NUMBER (after_line),
2825 /* Remove unnecessary notes from the instruction stream. */
2828 remove_unnecessary_notes ()
2833 /* We must not remove the first instruction in the function because
2834 the compiler depends on the first instruction being a note. */
2835 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2837 /* Remember what's next. */
2838 next = NEXT_INSN (insn);
2840 /* We're only interested in notes. */
2841 if (GET_CODE (insn) != NOTE)
2844 /* By now, all notes indicating lexical blocks should have
2845 NOTE_BLOCK filled in. */
2846 if ((NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2847 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2848 && NOTE_BLOCK (insn) == NULL_TREE)
2851 /* Remove NOTE_INSN_DELETED notes. */
2852 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2854 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2856 /* Scan back to see if there are any non-note instructions
2857 between INSN and the beginning of this block. If not,
2858 then there is no PC range in the generated code that will
2859 actually be in this block, so there's no point in
2860 remembering the existence of the block. */
2863 for (prev = PREV_INSN (insn); prev; prev = PREV_INSN (prev))
2865 /* This block contains a real instruction. Note that we
2866 don't include labels; if the only thing in the block
2867 is a label, then there are still no PC values that
2868 lie within the block. */
2872 /* We're only interested in NOTEs. */
2873 if (GET_CODE (prev) != NOTE)
2876 if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_BEG)
2878 /* If the BLOCKs referred to by these notes don't
2879 match, then something is wrong with our BLOCK
2880 nesting structure. */
2881 if (NOTE_BLOCK (prev) != NOTE_BLOCK (insn))
2884 if (debug_ignore_block (NOTE_BLOCK (insn)))
2891 else if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_END)
2892 /* There's a nested block. We need to leave the
2893 current block in place since otherwise the debugger
2894 wouldn't be able to show symbols from our block in
2895 the nested block. */
2903 /* Emit an insn of given code and pattern
2904 at a specified place within the doubly-linked list. */
2906 /* Make an instruction with body PATTERN
2907 and output it before the instruction BEFORE. */
2910 emit_insn_before (pattern, before)
2911 register rtx pattern, before;
2913 register rtx insn = before;
2915 if (GET_CODE (pattern) == SEQUENCE)
2919 for (i = 0; i < XVECLEN (pattern, 0); i++)
2921 insn = XVECEXP (pattern, 0, i);
2922 add_insn_before (insn, before);
2924 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2925 sequence_result[XVECLEN (pattern, 0)] = pattern;
2929 insn = make_insn_raw (pattern);
2930 add_insn_before (insn, before);
2936 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2939 emit_block_insn_before (pattern, before, block)
2940 rtx pattern, before;
2943 rtx prev = PREV_INSN (before);
2944 rtx r = emit_insn_before (pattern, before);
2945 if (block && block->head == before)
2946 block->head = NEXT_INSN (prev);
2950 /* Make an instruction with body PATTERN and code JUMP_INSN
2951 and output it before the instruction BEFORE. */
2954 emit_jump_insn_before (pattern, before)
2955 register rtx pattern, before;
2959 if (GET_CODE (pattern) == SEQUENCE)
2960 insn = emit_insn_before (pattern, before);
2963 insn = make_jump_insn_raw (pattern);
2964 add_insn_before (insn, before);
2970 /* Make an instruction with body PATTERN and code CALL_INSN
2971 and output it before the instruction BEFORE. */
2974 emit_call_insn_before (pattern, before)
2975 register rtx pattern, before;
2979 if (GET_CODE (pattern) == SEQUENCE)
2980 insn = emit_insn_before (pattern, before);
2983 insn = make_call_insn_raw (pattern);
2984 add_insn_before (insn, before);
2985 PUT_CODE (insn, CALL_INSN);
2991 /* Make an insn of code BARRIER
2992 and output it before the insn BEFORE. */
2995 emit_barrier_before (before)
2996 register rtx before;
2998 register rtx insn = rtx_alloc (BARRIER);
3000 INSN_UID (insn) = cur_insn_uid++;
3002 add_insn_before (insn, before);
3006 /* Emit the label LABEL before the insn BEFORE. */
3009 emit_label_before (label, before)
3012 /* This can be called twice for the same label as a result of the
3013 confusion that follows a syntax error! So make it harmless. */
3014 if (INSN_UID (label) == 0)
3016 INSN_UID (label) = cur_insn_uid++;
3017 add_insn_before (label, before);
3023 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3026 emit_note_before (subtype, before)
3030 register rtx note = rtx_alloc (NOTE);
3031 INSN_UID (note) = cur_insn_uid++;
3032 NOTE_SOURCE_FILE (note) = 0;
3033 NOTE_LINE_NUMBER (note) = subtype;
3035 add_insn_before (note, before);
3039 /* Make an insn of code INSN with body PATTERN
3040 and output it after the insn AFTER. */
3043 emit_insn_after (pattern, after)
3044 register rtx pattern, after;
3046 register rtx insn = after;
3048 if (GET_CODE (pattern) == SEQUENCE)
3052 for (i = 0; i < XVECLEN (pattern, 0); i++)
3054 insn = XVECEXP (pattern, 0, i);
3055 add_insn_after (insn, after);
3058 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3059 sequence_result[XVECLEN (pattern, 0)] = pattern;
3063 insn = make_insn_raw (pattern);
3064 add_insn_after (insn, after);
3070 /* Similar to emit_insn_after, except that line notes are to be inserted so
3071 as to act as if this insn were at FROM. */
3074 emit_insn_after_with_line_notes (pattern, after, from)
3075 rtx pattern, after, from;
3077 rtx from_line = find_line_note (from);
3078 rtx after_line = find_line_note (after);
3079 rtx insn = emit_insn_after (pattern, after);
3082 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3083 NOTE_LINE_NUMBER (from_line),
3087 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3088 NOTE_LINE_NUMBER (after_line),
3092 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3095 emit_block_insn_after (pattern, after, block)
3099 rtx r = emit_insn_after (pattern, after);
3100 if (block && block->end == after)
3105 /* Make an insn of code JUMP_INSN with body PATTERN
3106 and output it after the insn AFTER. */
3109 emit_jump_insn_after (pattern, after)
3110 register rtx pattern, after;
3114 if (GET_CODE (pattern) == SEQUENCE)
3115 insn = emit_insn_after (pattern, after);
3118 insn = make_jump_insn_raw (pattern);
3119 add_insn_after (insn, after);
3125 /* Make an insn of code BARRIER
3126 and output it after the insn AFTER. */
3129 emit_barrier_after (after)
3132 register rtx insn = rtx_alloc (BARRIER);
3134 INSN_UID (insn) = cur_insn_uid++;
3136 add_insn_after (insn, after);
3140 /* Emit the label LABEL after the insn AFTER. */
3143 emit_label_after (label, after)
3146 /* This can be called twice for the same label
3147 as a result of the confusion that follows a syntax error!
3148 So make it harmless. */
3149 if (INSN_UID (label) == 0)
3151 INSN_UID (label) = cur_insn_uid++;
3152 add_insn_after (label, after);
3158 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3161 emit_note_after (subtype, after)
3165 register rtx note = rtx_alloc (NOTE);
3166 INSN_UID (note) = cur_insn_uid++;
3167 NOTE_SOURCE_FILE (note) = 0;
3168 NOTE_LINE_NUMBER (note) = subtype;
3169 add_insn_after (note, after);
3173 /* Emit a line note for FILE and LINE after the insn AFTER. */
3176 emit_line_note_after (file, line, after)
3183 if (no_line_numbers && line > 0)
3189 note = rtx_alloc (NOTE);
3190 INSN_UID (note) = cur_insn_uid++;
3191 NOTE_SOURCE_FILE (note) = file;
3192 NOTE_LINE_NUMBER (note) = line;
3193 add_insn_after (note, after);
3197 /* Make an insn of code INSN with pattern PATTERN
3198 and add it to the end of the doubly-linked list.
3199 If PATTERN is a SEQUENCE, take the elements of it
3200 and emit an insn for each element.
3202 Returns the last insn emitted. */
3208 rtx insn = last_insn;
3210 if (GET_CODE (pattern) == SEQUENCE)
3214 for (i = 0; i < XVECLEN (pattern, 0); i++)
3216 insn = XVECEXP (pattern, 0, i);
3219 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3220 sequence_result[XVECLEN (pattern, 0)] = pattern;
3224 insn = make_insn_raw (pattern);
3231 /* Emit the insns in a chain starting with INSN.
3232 Return the last insn emitted. */
3242 rtx next = NEXT_INSN (insn);
3251 /* Emit the insns in a chain starting with INSN and place them in front of
3252 the insn BEFORE. Return the last insn emitted. */
3255 emit_insns_before (insn, before)
3263 rtx next = NEXT_INSN (insn);
3264 add_insn_before (insn, before);
3272 /* Emit the insns in a chain starting with FIRST and place them in back of
3273 the insn AFTER. Return the last insn emitted. */
3276 emit_insns_after (first, after)
3281 register rtx after_after;
3289 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3292 after_after = NEXT_INSN (after);
3294 NEXT_INSN (after) = first;
3295 PREV_INSN (first) = after;
3296 NEXT_INSN (last) = after_after;
3298 PREV_INSN (after_after) = last;
3300 if (after == last_insn)
3305 /* Make an insn of code JUMP_INSN with pattern PATTERN
3306 and add it to the end of the doubly-linked list. */
3309 emit_jump_insn (pattern)
3312 if (GET_CODE (pattern) == SEQUENCE)
3313 return emit_insn (pattern);
3316 register rtx insn = make_jump_insn_raw (pattern);
3322 /* Make an insn of code CALL_INSN with pattern PATTERN
3323 and add it to the end of the doubly-linked list. */
3326 emit_call_insn (pattern)
3329 if (GET_CODE (pattern) == SEQUENCE)
3330 return emit_insn (pattern);
3333 register rtx insn = make_call_insn_raw (pattern);
3335 PUT_CODE (insn, CALL_INSN);
3340 /* Add the label LABEL to the end of the doubly-linked list. */
3346 /* This can be called twice for the same label
3347 as a result of the confusion that follows a syntax error!
3348 So make it harmless. */
3349 if (INSN_UID (label) == 0)
3351 INSN_UID (label) = cur_insn_uid++;
3357 /* Make an insn of code BARRIER
3358 and add it to the end of the doubly-linked list. */
3363 register rtx barrier = rtx_alloc (BARRIER);
3364 INSN_UID (barrier) = cur_insn_uid++;
3369 /* Make an insn of code NOTE
3370 with data-fields specified by FILE and LINE
3371 and add it to the end of the doubly-linked list,
3372 but only if line-numbers are desired for debugging info. */
3375 emit_line_note (file, line)
3379 set_file_and_line_for_stmt (file, line);
3382 if (no_line_numbers)
3386 return emit_note (file, line);
3389 /* Make an insn of code NOTE
3390 with data-fields specified by FILE and LINE
3391 and add it to the end of the doubly-linked list.
3392 If it is a line-number NOTE, omit it if it matches the previous one. */
3395 emit_note (file, line)
3403 if (file && last_filename && !strcmp (file, last_filename)
3404 && line == last_linenum)
3406 last_filename = file;
3407 last_linenum = line;
3410 if (no_line_numbers && line > 0)
3416 note = rtx_alloc (NOTE);
3417 INSN_UID (note) = cur_insn_uid++;
3418 NOTE_SOURCE_FILE (note) = file;
3419 NOTE_LINE_NUMBER (note) = line;
3424 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3427 emit_line_note_force (file, line)
3432 return emit_line_note (file, line);
3435 /* Cause next statement to emit a line note even if the line number
3436 has not changed. This is used at the beginning of a function. */
3439 force_next_line_note ()
3444 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3445 note of this type already exists, remove it first. */
3448 set_unique_reg_note (insn, kind, datum)
3453 rtx note = find_reg_note (insn, kind, NULL_RTX);
3455 /* First remove the note if there already is one. */
3457 remove_note (insn, note);
3459 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3462 /* Return an indication of which type of insn should have X as a body.
3463 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3469 if (GET_CODE (x) == CODE_LABEL)
3471 if (GET_CODE (x) == CALL)
3473 if (GET_CODE (x) == RETURN)
3475 if (GET_CODE (x) == SET)
3477 if (SET_DEST (x) == pc_rtx)
3479 else if (GET_CODE (SET_SRC (x)) == CALL)
3484 if (GET_CODE (x) == PARALLEL)
3487 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3488 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3490 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3491 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3493 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3494 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3500 /* Emit the rtl pattern X as an appropriate kind of insn.
3501 If X is a label, it is simply added into the insn chain. */
3507 enum rtx_code code = classify_insn (x);
3509 if (code == CODE_LABEL)
3510 return emit_label (x);
3511 else if (code == INSN)
3512 return emit_insn (x);
3513 else if (code == JUMP_INSN)
3515 register rtx insn = emit_jump_insn (x);
3516 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3517 return emit_barrier ();
3520 else if (code == CALL_INSN)
3521 return emit_call_insn (x);
3526 /* Begin emitting insns to a sequence which can be packaged in an
3527 RTL_EXPR. If this sequence will contain something that might cause
3528 the compiler to pop arguments to function calls (because those
3529 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3530 details), use do_pending_stack_adjust before calling this function.
3531 That will ensure that the deferred pops are not accidentally
3532 emitted in the middle of this sequence. */
3537 struct sequence_stack *tem;
3539 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3541 tem->next = seq_stack;
3542 tem->first = first_insn;
3543 tem->last = last_insn;
3544 tem->sequence_rtl_expr = seq_rtl_expr;
3552 /* Similarly, but indicate that this sequence will be placed in T, an
3553 RTL_EXPR. See the documentation for start_sequence for more
3554 information about how to use this function. */
3557 start_sequence_for_rtl_expr (t)
3565 /* Set up the insn chain starting with FIRST as the current sequence,
3566 saving the previously current one. See the documentation for
3567 start_sequence for more information about how to use this function. */
3570 push_to_sequence (first)
3577 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3583 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3586 push_to_full_sequence (first, last)
3592 /* We really should have the end of the insn chain here. */
3593 if (last && NEXT_INSN (last))
3597 /* Set up the outer-level insn chain
3598 as the current sequence, saving the previously current one. */
3601 push_topmost_sequence ()
3603 struct sequence_stack *stack, *top = NULL;
3607 for (stack = seq_stack; stack; stack = stack->next)
3610 first_insn = top->first;
3611 last_insn = top->last;
3612 seq_rtl_expr = top->sequence_rtl_expr;
3615 /* After emitting to the outer-level insn chain, update the outer-level
3616 insn chain, and restore the previous saved state. */
3619 pop_topmost_sequence ()
3621 struct sequence_stack *stack, *top = NULL;
3623 for (stack = seq_stack; stack; stack = stack->next)
3626 top->first = first_insn;
3627 top->last = last_insn;
3628 /* ??? Why don't we save seq_rtl_expr here? */
3633 /* After emitting to a sequence, restore previous saved state.
3635 To get the contents of the sequence just made, you must call
3636 `gen_sequence' *before* calling here.
3638 If the compiler might have deferred popping arguments while
3639 generating this sequence, and this sequence will not be immediately
3640 inserted into the instruction stream, use do_pending_stack_adjust
3641 before calling gen_sequence. That will ensure that the deferred
3642 pops are inserted into this sequence, and not into some random
3643 location in the instruction stream. See INHIBIT_DEFER_POP for more
3644 information about deferred popping of arguments. */
3649 struct sequence_stack *tem = seq_stack;
3651 first_insn = tem->first;
3652 last_insn = tem->last;
3653 seq_rtl_expr = tem->sequence_rtl_expr;
3654 seq_stack = tem->next;
3659 /* This works like end_sequence, but records the old sequence in FIRST
3663 end_full_sequence (first, last)
3666 *first = first_insn;
3671 /* Return 1 if currently emitting into a sequence. */
3676 return seq_stack != 0;
3679 /* Generate a SEQUENCE rtx containing the insns already emitted
3680 to the current sequence.
3682 This is how the gen_... function from a DEFINE_EXPAND
3683 constructs the SEQUENCE that it returns. */
3693 /* Count the insns in the chain. */
3695 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3698 /* If only one insn, return it rather than a SEQUENCE.
3699 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3700 the case of an empty list.)
3701 We only return the pattern of an insn if its code is INSN and it
3702 has no notes. This ensures that no information gets lost. */
3704 && ! RTX_FRAME_RELATED_P (first_insn)
3705 && GET_CODE (first_insn) == INSN
3706 /* Don't throw away any reg notes. */
3707 && REG_NOTES (first_insn) == 0)
3711 NEXT_INSN (first_insn) = free_insn;
3712 free_insn = first_insn;
3714 return PATTERN (first_insn);
3717 /* Put them in a vector. See if we already have a SEQUENCE of the
3718 appropriate length around. */
3719 if (!ggc_p && len < SEQUENCE_RESULT_SIZE
3720 && (result = sequence_result[len]) != 0)
3721 sequence_result[len] = 0;
3724 /* Ensure that this rtl goes in saveable_obstack, since we may
3726 push_obstacks_nochange ();
3727 rtl_in_saveable_obstack ();
3728 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3732 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3733 XVECEXP (result, 0, i) = tem;
3738 /* Put the various virtual registers into REGNO_REG_RTX. */
3741 init_virtual_regs (es)
3742 struct emit_status *es;
3744 rtx *ptr = es->x_regno_reg_rtx;
3745 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3746 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3747 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3748 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3749 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3753 clear_emit_caches ()
3757 /* Clear the start_sequence/gen_sequence cache. */
3758 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3759 sequence_result[i] = 0;
3763 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3764 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3765 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3766 static int copy_insn_n_scratches;
3768 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3769 copied an ASM_OPERANDS.
3770 In that case, it is the original input-operand vector. */
3771 static rtvec orig_asm_operands_vector;
3773 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3774 copied an ASM_OPERANDS.
3775 In that case, it is the copied input-operand vector. */
3776 static rtvec copy_asm_operands_vector;
3778 /* Likewise for the constraints vector. */
3779 static rtvec orig_asm_constraints_vector;
3780 static rtvec copy_asm_constraints_vector;
3782 /* Recursively create a new copy of an rtx for copy_insn.
3783 This function differs from copy_rtx in that it handles SCRATCHes and
3784 ASM_OPERANDs properly.
3785 Normally, this function is not used directly; use copy_insn as front end.
3786 However, you could first copy an insn pattern with copy_insn and then use
3787 this function afterwards to properly copy any REG_NOTEs containing
3796 register RTX_CODE code;
3797 register const char *format_ptr;
3799 code = GET_CODE (orig);
3815 for (i = 0; i < copy_insn_n_scratches; i++)
3816 if (copy_insn_scratch_in[i] == orig)
3817 return copy_insn_scratch_out[i];
3821 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3822 a LABEL_REF, it isn't sharable. */
3823 if (GET_CODE (XEXP (orig, 0)) == PLUS
3824 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3825 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3829 /* A MEM with a constant address is not sharable. The problem is that
3830 the constant address may need to be reloaded. If the mem is shared,
3831 then reloading one copy of this mem will cause all copies to appear
3832 to have been reloaded. */
3838 copy = rtx_alloc (code);
3840 /* Copy the various flags, and other information. We assume that
3841 all fields need copying, and then clear the fields that should
3842 not be copied. That is the sensible default behavior, and forces
3843 us to explicitly document why we are *not* copying a flag. */
3844 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3846 /* We do not copy the USED flag, which is used as a mark bit during
3847 walks over the RTL. */
3850 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3851 if (GET_RTX_CLASS (code) == 'i')
3855 copy->frame_related = 0;
3858 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3860 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3862 copy->fld[i] = orig->fld[i];
3863 switch (*format_ptr++)
3866 if (XEXP (orig, i) != NULL)
3867 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3872 if (XVEC (orig, i) == orig_asm_constraints_vector)
3873 XVEC (copy, i) = copy_asm_constraints_vector;
3874 else if (XVEC (orig, i) == orig_asm_operands_vector)
3875 XVEC (copy, i) = copy_asm_operands_vector;
3876 else if (XVEC (orig, i) != NULL)
3878 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3879 for (j = 0; j < XVECLEN (copy, i); j++)
3880 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3886 bitmap new_bits = BITMAP_OBSTACK_ALLOC (rtl_obstack);
3887 bitmap_copy (new_bits, XBITMAP (orig, i));
3888 XBITMAP (copy, i) = new_bits;
3899 /* These are left unchanged. */
3907 if (code == SCRATCH)
3909 i = copy_insn_n_scratches++;
3910 if (i >= MAX_RECOG_OPERANDS)
3912 copy_insn_scratch_in[i] = orig;
3913 copy_insn_scratch_out[i] = copy;
3915 else if (code == ASM_OPERANDS)
3917 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
3918 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
3919 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
3920 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
3926 /* Create a new copy of an rtx.
3927 This function differs from copy_rtx in that it handles SCRATCHes and
3928 ASM_OPERANDs properly.
3929 INSN doesn't really have to be a full INSN; it could be just the
3935 copy_insn_n_scratches = 0;
3936 orig_asm_operands_vector = 0;
3937 orig_asm_constraints_vector = 0;
3938 copy_asm_operands_vector = 0;
3939 copy_asm_constraints_vector = 0;
3940 return copy_insn_1 (insn);
3943 /* Initialize data structures and variables in this file
3944 before generating rtl for each function. */
3949 struct function *f = cfun;
3951 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3954 seq_rtl_expr = NULL;
3956 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3959 first_label_num = label_num;
3963 clear_emit_caches ();
3965 /* Init the tables that describe all the pseudo regs. */
3967 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3969 f->emit->regno_pointer_flag
3970 = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
3972 f->emit->regno_pointer_align
3973 = (unsigned char *) xcalloc (f->emit->regno_pointer_flag_length,
3974 sizeof (unsigned char));
3977 = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
3980 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3981 init_virtual_regs (f->emit);
3983 /* Indicate that the virtual registers and stack locations are
3985 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3986 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3987 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3988 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3990 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3991 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3992 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3993 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3994 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3996 #ifdef STACK_BOUNDARY
3997 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3998 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3999 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4000 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4002 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4003 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4004 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4005 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4006 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4009 #ifdef INIT_EXPANDERS
4014 /* Mark SS for GC. */
4017 mark_sequence_stack (ss)
4018 struct sequence_stack *ss;
4022 ggc_mark_rtx (ss->first);
4023 ggc_mark_tree (ss->sequence_rtl_expr);
4028 /* Mark ES for GC. */
4031 mark_emit_status (es)
4032 struct emit_status *es;
4040 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
4044 mark_sequence_stack (es->sequence_stack);
4045 ggc_mark_tree (es->sequence_rtl_expr);
4046 ggc_mark_rtx (es->x_first_insn);
4049 /* Create some permanent unique rtl objects shared between all functions.
4050 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4053 init_emit_once (line_numbers)
4057 enum machine_mode mode;
4058 enum machine_mode double_mode;
4060 no_line_numbers = ! line_numbers;
4062 /* Compute the word and byte modes. */
4064 byte_mode = VOIDmode;
4065 word_mode = VOIDmode;
4066 double_mode = VOIDmode;
4068 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4069 mode = GET_MODE_WIDER_MODE (mode))
4071 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4072 && byte_mode == VOIDmode)
4075 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4076 && word_mode == VOIDmode)
4080 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4081 mode = GET_MODE_WIDER_MODE (mode))
4083 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4084 && double_mode == VOIDmode)
4088 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4090 /* Assign register numbers to the globally defined register rtx.
4091 This must be done at runtime because the register number field
4092 is in a union and some compilers can't initialize unions. */
4094 pc_rtx = gen_rtx (PC, VOIDmode);
4095 cc0_rtx = gen_rtx (CC0, VOIDmode);
4096 stack_pointer_rtx = gen_rtx_raw_REG (Pmode, STACK_POINTER_REGNUM);
4097 frame_pointer_rtx = gen_rtx_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4098 if (hard_frame_pointer_rtx == 0)
4099 hard_frame_pointer_rtx = gen_rtx_raw_REG (Pmode,
4100 HARD_FRAME_POINTER_REGNUM);
4101 if (arg_pointer_rtx == 0)
4102 arg_pointer_rtx = gen_rtx_raw_REG (Pmode, ARG_POINTER_REGNUM);
4103 virtual_incoming_args_rtx =
4104 gen_rtx_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4105 virtual_stack_vars_rtx =
4106 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4107 virtual_stack_dynamic_rtx =
4108 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4109 virtual_outgoing_args_rtx =
4110 gen_rtx_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4111 virtual_cfa_rtx = gen_rtx_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4113 /* These rtx must be roots if GC is enabled. */
4115 ggc_add_rtx_root (global_rtl, GR_MAX);
4117 #ifdef INIT_EXPANDERS
4118 /* This is to initialize save_machine_status and restore_machine_status before
4119 the first call to push_function_context_to. This is needed by the Chill
4120 front end which calls push_function_context_to before the first cal to
4121 init_function_start. */
4125 /* Create the unique rtx's for certain rtx codes and operand values. */
4127 /* Don't use gen_rtx here since gen_rtx in this case
4128 tries to use these variables. */
4129 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4130 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4131 gen_rtx_raw_CONST_INT (VOIDmode, i);
4133 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4135 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4136 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4137 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4139 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4141 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4142 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4143 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4144 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4146 for (i = 0; i <= 2; i++)
4148 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4149 mode = GET_MODE_WIDER_MODE (mode))
4151 rtx tem = rtx_alloc (CONST_DOUBLE);
4152 union real_extract u;
4154 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
4155 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4157 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
4158 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4159 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4160 PUT_MODE (tem, mode);
4162 const_tiny_rtx[i][(int) mode] = tem;
4165 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4167 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4168 mode = GET_MODE_WIDER_MODE (mode))
4169 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4171 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4173 mode = GET_MODE_WIDER_MODE (mode))
4174 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4177 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
4178 if (GET_MODE_CLASS (mode) == MODE_CC)
4179 const_tiny_rtx[0][(int) mode] = const0_rtx;
4181 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4182 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4183 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4184 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4185 ggc_add_rtx_root (&const_true_rtx, 1);
4187 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4188 return_address_pointer_rtx
4189 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4193 struct_value_rtx = STRUCT_VALUE;
4195 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4198 #ifdef STRUCT_VALUE_INCOMING
4199 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4201 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4202 struct_value_incoming_rtx
4203 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4205 struct_value_incoming_rtx = struct_value_rtx;
4209 #ifdef STATIC_CHAIN_REGNUM
4210 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4212 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4213 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4214 static_chain_incoming_rtx
4215 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4218 static_chain_incoming_rtx = static_chain_rtx;
4222 static_chain_rtx = STATIC_CHAIN;
4224 #ifdef STATIC_CHAIN_INCOMING
4225 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4227 static_chain_incoming_rtx = static_chain_rtx;
4231 #ifdef PIC_OFFSET_TABLE_REGNUM
4232 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4235 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4236 ggc_add_rtx_root (&struct_value_rtx, 1);
4237 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4238 ggc_add_rtx_root (&static_chain_rtx, 1);
4239 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4240 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4242 /* Initialize the CONST_INT hash table. */
4243 const_int_htab = htab_create (37, const_int_htab_hash,
4244 const_int_htab_eq, NULL);
4245 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4249 /* Query and clear/ restore no_line_numbers. This is used by the
4250 switch / case handling in stmt.c to give proper line numbers in
4251 warnings about unreachable code. */
4254 force_line_numbers ()
4256 int old = no_line_numbers;
4258 no_line_numbers = 0;
4260 force_next_line_note ();
4265 restore_line_number_status (old_value)
4268 no_line_numbers = old_value;