1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
46 #include "hard-reg-set.h"
47 #include "insn-config.h"
53 /* Commonly used modes. */
55 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
56 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
57 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
58 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
61 /* This is *not* reset after each function. It gives each CODE_LABEL
62 in the entire compilation a unique label number. */
64 static int label_num = 1;
66 /* Highest label number in current function.
67 Zero means use the value of label_num instead.
68 This is nonzero only when belatedly compiling an inline function. */
70 static int last_label_num;
72 /* Value label_num had when set_new_first_and_last_label_number was called.
73 If label_num has not changed since then, last_label_num is valid. */
75 static int base_label_num;
77 /* Nonzero means do not generate NOTEs for source line numbers. */
79 static int no_line_numbers;
81 /* Commonly used rtx's, so that we only need space for one copy.
82 These are initialized once for the entire compilation.
83 All of these except perhaps the floating-point CONST_DOUBLEs
84 are unique; no other rtx-object will be equal to any of these. */
86 /* Avoid warnings by initializing the `fld' field. Since its a union,
87 bypass problems with KNR compilers by only doing so when __GNUC__. */
94 struct _global_rtl global_rtl =
96 {PC, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* pc_rtx */
97 {CC0, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* cc0_rtx */
98 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* stack_pointer_rtx */
99 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* frame_pointer_rtx */
100 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* hard_frame_pointer_rtx */
101 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* arg_pointer_rtx */
102 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_incoming_args_rtx */
103 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_vars_rtx */
104 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_dynamic_rtx */
105 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_outgoing_args_rtx */
106 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_cfa_rtx */
109 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
110 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
111 record a copy of const[012]_rtx. */
113 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
117 REAL_VALUE_TYPE dconst0;
118 REAL_VALUE_TYPE dconst1;
119 REAL_VALUE_TYPE dconst2;
120 REAL_VALUE_TYPE dconstm1;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
141 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
142 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
143 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
144 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
146 /* This is used to implement __builtin_return_address for some machines.
147 See for instance the MIPS port. */
148 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
150 /* We make one copy of (const_int C) where C is in
151 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
152 to save space during the compilation and simplify comparisons of
155 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
157 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
158 shortly thrown away. We use two mechanisms to prevent this waste:
160 First, we keep a list of the expressions used to represent the sequence
161 stack in sequence_element_free_list.
163 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
164 rtvec for use by gen_sequence. One entry for each size is sufficient
165 because most cases are calls to gen_sequence followed by immediately
166 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
167 destructive on the insn in it anyway and hence can't be redone.
169 We do not bother to save this cached data over nested function calls.
170 Instead, we just reinitialize them. */
172 #define SEQUENCE_RESULT_SIZE 5
174 static struct sequence_stack *sequence_element_free_list;
175 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
177 /* During RTL generation, we also keep a list of free INSN rtl codes. */
178 static rtx free_insn;
180 #define first_insn (current_function->emit->x_first_insn)
181 #define last_insn (current_function->emit->x_last_insn)
182 #define cur_insn_uid (current_function->emit->x_cur_insn_uid)
183 #define last_linenum (current_function->emit->x_last_linenum)
184 #define last_filename (current_function->emit->x_last_filename)
185 #define first_label_num (current_function->emit->x_first_label_num)
187 static rtx make_jump_insn_raw PROTO((rtx));
188 static rtx make_call_insn_raw PROTO((rtx));
189 static rtx find_line_note PROTO((rtx));
192 gen_rtx_CONST_INT (mode, arg)
193 enum machine_mode mode;
196 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
197 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
199 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
200 if (const_true_rtx && arg == STORE_FLAG_VALUE)
201 return const_true_rtx;
204 return gen_rtx_raw_CONST_INT (mode, arg);
207 /* CONST_DOUBLEs needs special handling because its length is known
210 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
211 enum machine_mode mode;
213 HOST_WIDE_INT arg1, arg2;
215 rtx r = rtx_alloc (CONST_DOUBLE);
220 X0EXP (r, 1) = NULL_RTX;
224 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
231 gen_rtx_REG (mode, regno)
232 enum machine_mode mode;
235 /* In case the MD file explicitly references the frame pointer, have
236 all such references point to the same frame pointer. This is
237 used during frame pointer elimination to distinguish the explicit
238 references to these registers from pseudos that happened to be
241 If we have eliminated the frame pointer or arg pointer, we will
242 be using it as a normal register, for example as a spill
243 register. In such cases, we might be accessing it in a mode that
244 is not Pmode and therefore cannot use the pre-allocated rtx.
246 Also don't do this when we are making new REGs in reload, since
247 we don't want to get confused with the real pointers. */
249 if (mode == Pmode && !reload_in_progress)
251 if (regno == FRAME_POINTER_REGNUM)
252 return frame_pointer_rtx;
253 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
254 if (regno == HARD_FRAME_POINTER_REGNUM)
255 return hard_frame_pointer_rtx;
257 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
258 if (regno == ARG_POINTER_REGNUM)
259 return arg_pointer_rtx;
261 #ifdef RETURN_ADDRESS_POINTER_REGNUM
262 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
263 return return_address_pointer_rtx;
265 if (regno == STACK_POINTER_REGNUM)
266 return stack_pointer_rtx;
269 return gen_rtx_raw_REG (mode, regno);
273 gen_rtx_MEM (mode, addr)
274 enum machine_mode mode;
277 rtx rt = gen_rtx_raw_MEM (mode, addr);
279 /* This field is not cleared by the mere allocation of the rtx, so
281 MEM_ALIAS_SET (rt) = 0;
286 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
288 ** This routine generates an RTX of the size specified by
289 ** <code>, which is an RTX code. The RTX structure is initialized
290 ** from the arguments <element1> through <elementn>, which are
291 ** interpreted according to the specific RTX type's format. The
292 ** special machine mode associated with the rtx (if any) is specified
295 ** gen_rtx can be invoked in a way which resembles the lisp-like
296 ** rtx it will generate. For example, the following rtx structure:
298 ** (plus:QI (mem:QI (reg:SI 1))
299 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
301 ** ...would be generated by the following C code:
303 ** gen_rtx (PLUS, QImode,
304 ** gen_rtx (MEM, QImode,
305 ** gen_rtx (REG, SImode, 1)),
306 ** gen_rtx (MEM, QImode,
307 ** gen_rtx (PLUS, SImode,
308 ** gen_rtx (REG, SImode, 2),
309 ** gen_rtx (REG, SImode, 3)))),
314 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
316 #ifndef ANSI_PROTOTYPES
318 enum machine_mode mode;
321 register int i; /* Array indices... */
322 register const char *fmt; /* Current rtx's format... */
323 register rtx rt_val; /* RTX to return to caller... */
327 #ifndef ANSI_PROTOTYPES
328 code = va_arg (p, enum rtx_code);
329 mode = va_arg (p, enum machine_mode);
335 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
340 rtx arg0 = va_arg (p, rtx);
341 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
342 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
343 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
348 rt_val = gen_rtx_REG (mode, va_arg (p, int));
352 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
356 rt_val = rtx_alloc (code); /* Allocate the storage space. */
357 rt_val->mode = mode; /* Store the machine mode... */
359 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
360 for (i = 0; i < GET_RTX_LENGTH (code); i++)
364 case '0': /* Unused field. */
367 case 'i': /* An integer? */
368 XINT (rt_val, i) = va_arg (p, int);
371 case 'w': /* A wide integer? */
372 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
375 case 's': /* A string? */
376 XSTR (rt_val, i) = va_arg (p, char *);
379 case 'e': /* An expression? */
380 case 'u': /* An insn? Same except when printing. */
381 XEXP (rt_val, i) = va_arg (p, rtx);
384 case 'E': /* An RTX vector? */
385 XVEC (rt_val, i) = va_arg (p, rtvec);
388 case 'b': /* A bitmap? */
389 XBITMAP (rt_val, i) = va_arg (p, bitmap);
392 case 't': /* A tree? */
393 XTREE (rt_val, i) = va_arg (p, tree);
407 /* gen_rtvec (n, [rt1, ..., rtn])
409 ** This routine creates an rtvec and stores within it the
410 ** pointers to rtx's which are its arguments.
415 gen_rtvec VPROTO((int n, ...))
417 #ifndef ANSI_PROTOTYPES
426 #ifndef ANSI_PROTOTYPES
431 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
433 vector = (rtx *) alloca (n * sizeof (rtx));
435 for (i = 0; i < n; i++)
436 vector[i] = va_arg (p, rtx);
439 return gen_rtvec_v (n, vector);
443 gen_rtvec_v (n, argp)
448 register rtvec rt_val;
451 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
453 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
455 for (i = 0; i < n; i++)
456 rt_val->elem[i] = *argp++;
462 /* Generate a REG rtx for a new pseudo register of mode MODE.
463 This pseudo is assigned the next sequential register number. */
467 enum machine_mode mode;
469 struct function *f = current_function;
472 /* Don't let anything called after initial flow analysis create new
477 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
478 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
480 /* For complex modes, don't make a single pseudo.
481 Instead, make a CONCAT of two pseudos.
482 This allows noncontiguous allocation of the real and imaginary parts,
483 which makes much better code. Besides, allocating DCmode
484 pseudos overstrains reload on some machines like the 386. */
485 rtx realpart, imagpart;
486 int size = GET_MODE_UNIT_SIZE (mode);
487 enum machine_mode partmode
488 = mode_for_size (size * BITS_PER_UNIT,
489 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
490 ? MODE_FLOAT : MODE_INT),
493 realpart = gen_reg_rtx (partmode);
494 imagpart = gen_reg_rtx (partmode);
495 return gen_rtx_CONCAT (mode, realpart, imagpart);
498 /* Make sure regno_pointer_flag and regno_reg_rtx are large
499 enough to have an element for this pseudo reg number. */
501 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
503 int old_size = f->emit->regno_pointer_flag_length;
505 char *new = (char *) savealloc (old_size * 2);
506 memcpy (new, f->emit->regno_pointer_flag, old_size);
507 memset (new + old_size, 0, old_size);
508 f->emit->regno_pointer_flag = new;
510 new = (char *) savealloc (old_size * 2);
511 memcpy (new, f->emit->regno_pointer_align, old_size);
512 memset (new + old_size, 0, old_size);
513 f->emit->regno_pointer_align = new;
515 new1 = (rtx *) savealloc (old_size * 2 * sizeof (rtx));
516 memcpy (new1, regno_reg_rtx, old_size * sizeof (rtx));
517 memset (new1 + old_size, 0, old_size * sizeof (rtx));
518 regno_reg_rtx = new1;
520 f->emit->regno_pointer_flag_length = old_size * 2;
523 val = gen_rtx_raw_REG (mode, reg_rtx_no);
524 regno_reg_rtx[reg_rtx_no++] = val;
528 /* Identify REG (which may be a CONCAT) as a user register. */
534 if (GET_CODE (reg) == CONCAT)
536 REG_USERVAR_P (XEXP (reg, 0)) = 1;
537 REG_USERVAR_P (XEXP (reg, 1)) = 1;
539 else if (GET_CODE (reg) == REG)
540 REG_USERVAR_P (reg) = 1;
545 /* Identify REG as a probable pointer register and show its alignment
546 as ALIGN, if nonzero. */
549 mark_reg_pointer (reg, align)
553 if (! REGNO_POINTER_FLAG (REGNO (reg)))
555 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
558 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
560 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
561 /* We can no-longer be sure just how aligned this pointer is */
562 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
565 /* Return 1 plus largest pseudo reg number used in the current function. */
573 /* Return 1 + the largest label number used so far in the current function. */
578 if (last_label_num && label_num == base_label_num)
579 return last_label_num;
583 /* Return first label number used in this function (if any were used). */
586 get_first_label_num ()
588 return first_label_num;
591 /* Return a value representing some low-order bits of X, where the number
592 of low-order bits is given by MODE. Note that no conversion is done
593 between floating-point and fixed-point values, rather, the bit
594 representation is returned.
596 This function handles the cases in common between gen_lowpart, below,
597 and two variants in cse.c and combine.c. These are the cases that can
598 be safely handled at all points in the compilation.
600 If this is not a case we can handle, return 0. */
603 gen_lowpart_common (mode, x)
604 enum machine_mode mode;
609 if (GET_MODE (x) == mode)
612 /* MODE must occupy no more words than the mode of X. */
613 if (GET_MODE (x) != VOIDmode
614 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
615 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
619 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
620 word = ((GET_MODE_SIZE (GET_MODE (x))
621 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
624 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
625 && (GET_MODE_CLASS (mode) == MODE_INT
626 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
628 /* If we are getting the low-order part of something that has been
629 sign- or zero-extended, we can either just use the object being
630 extended or make a narrower extension. If we want an even smaller
631 piece than the size of the object being extended, call ourselves
634 This case is used mostly by combine and cse. */
636 if (GET_MODE (XEXP (x, 0)) == mode)
638 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
639 return gen_lowpart_common (mode, XEXP (x, 0));
640 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
641 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
643 else if (GET_CODE (x) == SUBREG
644 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
645 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
646 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
648 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
649 else if (GET_CODE (x) == REG)
651 /* Let the backend decide how many registers to skip. This is needed
652 in particular for Sparc64 where fp regs are smaller than a word. */
653 /* ??? Note that subregs are now ambiguous, in that those against
654 pseudos are sized by the Word Size, while those against hard
655 regs are sized by the underlying register size. Better would be
656 to always interpret the subreg offset parameter as bytes or bits. */
658 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
659 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
660 - HARD_REGNO_NREGS (REGNO (x), mode));
662 /* If the register is not valid for MODE, return 0. If we don't
663 do this, there is no way to fix up the resulting REG later.
664 But we do do this if the current REG is not valid for its
665 mode. This latter is a kludge, but is required due to the
666 way that parameters are passed on some machines, most
668 if (REGNO (x) < FIRST_PSEUDO_REGISTER
669 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
670 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
672 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
673 /* integrate.c can't handle parts of a return value register. */
674 && (! REG_FUNCTION_VALUE_P (x)
675 || ! rtx_equal_function_value_matters)
676 #ifdef CLASS_CANNOT_CHANGE_SIZE
677 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
678 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
679 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
680 && (TEST_HARD_REG_BIT
681 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
684 /* We want to keep the stack, frame, and arg pointers
686 && x != frame_pointer_rtx
687 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
688 && x != arg_pointer_rtx
690 && x != stack_pointer_rtx)
691 return gen_rtx_REG (mode, REGNO (x) + word);
693 return gen_rtx_SUBREG (mode, x, word);
695 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
696 from the low-order part of the constant. */
697 else if ((GET_MODE_CLASS (mode) == MODE_INT
698 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
699 && GET_MODE (x) == VOIDmode
700 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
702 /* If MODE is twice the host word size, X is already the desired
703 representation. Otherwise, if MODE is wider than a word, we can't
704 do this. If MODE is exactly a word, return just one CONST_INT.
705 If MODE is smaller than a word, clear the bits that don't belong
706 in our mode, unless they and our sign bit are all one. So we get
707 either a reasonable negative value or a reasonable unsigned value
710 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
712 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
714 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
715 return (GET_CODE (x) == CONST_INT ? x
716 : GEN_INT (CONST_DOUBLE_LOW (x)));
719 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
720 int width = GET_MODE_BITSIZE (mode);
721 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
722 : CONST_DOUBLE_LOW (x));
724 /* Sign extend to HOST_WIDE_INT. */
725 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
727 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
732 /* If X is an integral constant but we want it in floating-point, it
733 must be the case that we have a union of an integer and a floating-point
734 value. If the machine-parameters allow it, simulate that union here
735 and return the result. The two-word and single-word cases are
738 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
739 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
740 || flag_pretend_float)
741 && GET_MODE_CLASS (mode) == MODE_FLOAT
742 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
743 && GET_CODE (x) == CONST_INT
744 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
745 #ifdef REAL_ARITHMETIC
751 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
752 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
756 union {HOST_WIDE_INT i; float d; } u;
759 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
762 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
763 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
764 || flag_pretend_float)
765 && GET_MODE_CLASS (mode) == MODE_FLOAT
766 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
767 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
768 && GET_MODE (x) == VOIDmode
769 && (sizeof (double) * HOST_BITS_PER_CHAR
770 == 2 * HOST_BITS_PER_WIDE_INT))
771 #ifdef REAL_ARITHMETIC
775 HOST_WIDE_INT low, high;
777 if (GET_CODE (x) == CONST_INT)
778 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
780 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
782 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
784 if (WORDS_BIG_ENDIAN)
785 i[0] = high, i[1] = low;
787 i[0] = low, i[1] = high;
789 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
790 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
794 union {HOST_WIDE_INT i[2]; double d; } u;
795 HOST_WIDE_INT low, high;
797 if (GET_CODE (x) == CONST_INT)
798 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
800 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
802 #ifdef HOST_WORDS_BIG_ENDIAN
803 u.i[0] = high, u.i[1] = low;
805 u.i[0] = low, u.i[1] = high;
808 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
812 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
813 same as sizeof (double) or when sizeof (float) is larger than the
814 size of a word on the target machine. */
815 #ifdef REAL_ARITHMETIC
816 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
822 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
823 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
825 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
826 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
827 || flag_pretend_float)
828 && GET_MODE_CLASS (mode) == MODE_FLOAT
829 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
830 && GET_CODE (x) == CONST_INT
831 && (sizeof (double) * HOST_BITS_PER_CHAR
832 == HOST_BITS_PER_WIDE_INT))
838 r = REAL_VALUE_FROM_TARGET_DOUBLE (&i);
839 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
843 /* Similarly, if this is converting a floating-point value into a
844 single-word integer. Only do this is the host and target parameters are
847 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
848 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
849 || flag_pretend_float)
850 && (GET_MODE_CLASS (mode) == MODE_INT
851 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
852 && GET_CODE (x) == CONST_DOUBLE
853 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
854 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
855 return operand_subword (x, word, 0, GET_MODE (x));
857 /* Similarly, if this is converting a floating-point value into a
858 two-word integer, we can do this one word at a time and make an
859 integer. Only do this is the host and target parameters are
862 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
863 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
864 || flag_pretend_float)
865 && (GET_MODE_CLASS (mode) == MODE_INT
866 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
867 && GET_CODE (x) == CONST_DOUBLE
868 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
869 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
872 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
874 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
876 if (lowpart && GET_CODE (lowpart) == CONST_INT
877 && highpart && GET_CODE (highpart) == CONST_INT)
878 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
881 /* Otherwise, we can't do this. */
885 /* Return the real part (which has mode MODE) of a complex value X.
886 This always comes at the low address in memory. */
889 gen_realpart (mode, x)
890 enum machine_mode mode;
893 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
895 else if (WORDS_BIG_ENDIAN
896 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
898 && REGNO (x) < FIRST_PSEUDO_REGISTER)
899 fatal ("Unable to access real part of complex value in a hard register on this target");
900 else if (WORDS_BIG_ENDIAN)
901 return gen_highpart (mode, x);
903 return gen_lowpart (mode, x);
906 /* Return the imaginary part (which has mode MODE) of a complex value X.
907 This always comes at the high address in memory. */
910 gen_imagpart (mode, x)
911 enum machine_mode mode;
914 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
916 else if (WORDS_BIG_ENDIAN)
917 return gen_lowpart (mode, x);
918 else if (!WORDS_BIG_ENDIAN
919 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
921 && REGNO (x) < FIRST_PSEUDO_REGISTER)
922 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
924 return gen_highpart (mode, x);
927 /* Return 1 iff X, assumed to be a SUBREG,
928 refers to the real part of the complex value in its containing reg.
929 Complex values are always stored with the real part in the first word,
930 regardless of WORDS_BIG_ENDIAN. */
933 subreg_realpart_p (x)
936 if (GET_CODE (x) != SUBREG)
939 return SUBREG_WORD (x) * UNITS_PER_WORD < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)));
942 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
943 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
944 least-significant part of X.
945 MODE specifies how big a part of X to return;
946 it usually should not be larger than a word.
947 If X is a MEM whose address is a QUEUED, the value may be so also. */
950 gen_lowpart (mode, x)
951 enum machine_mode mode;
954 rtx result = gen_lowpart_common (mode, x);
958 else if (GET_CODE (x) == REG)
960 /* Must be a hard reg that's not valid in MODE. */
961 result = gen_lowpart_common (mode, copy_to_reg (x));
966 else if (GET_CODE (x) == MEM)
968 /* The only additional case we can do is MEM. */
969 register int offset = 0;
970 if (WORDS_BIG_ENDIAN)
971 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
972 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
974 if (BYTES_BIG_ENDIAN)
975 /* Adjust the address so that the address-after-the-data
977 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
978 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
980 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
982 else if (GET_CODE (x) == ADDRESSOF)
983 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
988 /* Like `gen_lowpart', but refer to the most significant part.
989 This is used to access the imaginary part of a complex number. */
992 gen_highpart (mode, x)
993 enum machine_mode mode;
996 /* This case loses if X is a subreg. To catch bugs early,
997 complain if an invalid MODE is used even in other cases. */
998 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
999 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1001 if (GET_CODE (x) == CONST_DOUBLE
1002 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1003 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1006 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1007 else if (GET_CODE (x) == CONST_INT)
1009 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1011 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1013 else if (GET_CODE (x) == MEM)
1015 register int offset = 0;
1016 if (! WORDS_BIG_ENDIAN)
1017 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1018 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1020 if (! BYTES_BIG_ENDIAN
1021 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1022 offset -= (GET_MODE_SIZE (mode)
1023 - MIN (UNITS_PER_WORD,
1024 GET_MODE_SIZE (GET_MODE (x))));
1026 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1028 else if (GET_CODE (x) == SUBREG)
1030 /* The only time this should occur is when we are looking at a
1031 multi-word item with a SUBREG whose mode is the same as that of the
1032 item. It isn't clear what we would do if it wasn't. */
1033 if (SUBREG_WORD (x) != 0)
1035 return gen_highpart (mode, SUBREG_REG (x));
1037 else if (GET_CODE (x) == REG)
1041 /* Let the backend decide how many registers to skip. This is needed
1042 in particular for sparc64 where fp regs are smaller than a word. */
1043 /* ??? Note that subregs are now ambiguous, in that those against
1044 pseudos are sized by the word size, while those against hard
1045 regs are sized by the underlying register size. Better would be
1046 to always interpret the subreg offset parameter as bytes or bits. */
1048 if (WORDS_BIG_ENDIAN)
1050 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1051 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1052 - HARD_REGNO_NREGS (REGNO (x), mode));
1054 word = ((GET_MODE_SIZE (GET_MODE (x))
1055 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1058 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1059 /* integrate.c can't handle parts of a return value register. */
1060 && (! REG_FUNCTION_VALUE_P (x)
1061 || ! rtx_equal_function_value_matters)
1062 /* We want to keep the stack, frame, and arg pointers special. */
1063 && x != frame_pointer_rtx
1064 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1065 && x != arg_pointer_rtx
1067 && x != stack_pointer_rtx)
1068 return gen_rtx_REG (mode, REGNO (x) + word);
1070 return gen_rtx_SUBREG (mode, x, word);
1076 /* Return 1 iff X, assumed to be a SUBREG,
1077 refers to the least significant part of its containing reg.
1078 If X is not a SUBREG, always return 1 (it is its own low part!). */
1081 subreg_lowpart_p (x)
1084 if (GET_CODE (x) != SUBREG)
1086 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1089 if (WORDS_BIG_ENDIAN
1090 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1091 return (SUBREG_WORD (x)
1092 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1093 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1096 return SUBREG_WORD (x) == 0;
1099 /* Return subword I of operand OP.
1100 The word number, I, is interpreted as the word number starting at the
1101 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1102 otherwise it is the high-order word.
1104 If we cannot extract the required word, we return zero. Otherwise, an
1105 rtx corresponding to the requested word will be returned.
1107 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1108 reload has completed, a valid address will always be returned. After
1109 reload, if a valid address cannot be returned, we return zero.
1111 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1112 it is the responsibility of the caller.
1114 MODE is the mode of OP in case it is a CONST_INT. */
1117 operand_subword (op, i, validate_address, mode)
1120 int validate_address;
1121 enum machine_mode mode;
1124 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1126 if (mode == VOIDmode)
1127 mode = GET_MODE (op);
1129 if (mode == VOIDmode)
1132 /* If OP is narrower than a word, fail. */
1134 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1137 /* If we want a word outside OP, return zero. */
1139 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1142 /* If OP is already an integer word, return it. */
1143 if (GET_MODE_CLASS (mode) == MODE_INT
1144 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1147 /* If OP is a REG or SUBREG, we can handle it very simply. */
1148 if (GET_CODE (op) == REG)
1150 /* ??? There is a potential problem with this code. It does not
1151 properly handle extractions of a subword from a hard register
1152 that is larger than word_mode. Presumably the check for
1153 HARD_REGNO_MODE_OK catches these most of these cases. */
1155 /* If OP is a hard register, but OP + I is not a hard register,
1156 then extracting a subword is impossible.
1158 For example, consider if OP is the last hard register and it is
1159 larger than word_mode. If we wanted word N (for N > 0) because a
1160 part of that hard register was known to contain a useful value,
1161 then OP + I would refer to a pseudo, not the hard register we
1163 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1164 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1167 /* If the register is not valid for MODE, return 0. Note we
1168 have to check both OP and OP + I since they may refer to
1169 different parts of the register file.
1171 Consider if OP refers to the last 96bit FP register and we want
1172 subword 3 because that subword is known to contain a value we
1174 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1175 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1176 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1178 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1179 || (REG_FUNCTION_VALUE_P (op)
1180 && rtx_equal_function_value_matters)
1181 /* We want to keep the stack, frame, and arg pointers
1183 || op == frame_pointer_rtx
1184 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1185 || op == arg_pointer_rtx
1187 || op == stack_pointer_rtx)
1188 return gen_rtx_SUBREG (word_mode, op, i);
1190 return gen_rtx_REG (word_mode, REGNO (op) + i);
1192 else if (GET_CODE (op) == SUBREG)
1193 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1194 else if (GET_CODE (op) == CONCAT)
1196 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1198 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1199 return operand_subword (XEXP (op, 1), i - partwords,
1200 validate_address, mode);
1203 /* Form a new MEM at the requested address. */
1204 if (GET_CODE (op) == MEM)
1206 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1209 if (validate_address)
1211 if (reload_completed)
1213 if (! strict_memory_address_p (word_mode, addr))
1217 addr = memory_address (word_mode, addr);
1220 new = gen_rtx_MEM (word_mode, addr);
1222 MEM_COPY_ATTRIBUTES (new, op);
1223 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1224 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (op);
1229 /* The only remaining cases are when OP is a constant. If the host and
1230 target floating formats are the same, handling two-word floating
1231 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1232 are defined as returning one or two 32 bit values, respectively,
1233 and not values of BITS_PER_WORD bits. */
1234 #ifdef REAL_ARITHMETIC
1235 /* The output is some bits, the width of the target machine's word.
1236 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1238 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1239 && GET_MODE_CLASS (mode) == MODE_FLOAT
1240 && GET_MODE_BITSIZE (mode) == 64
1241 && GET_CODE (op) == CONST_DOUBLE)
1246 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1247 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1249 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1250 which the words are written depends on the word endianness.
1251 ??? This is a potential portability problem and should
1252 be fixed at some point.
1254 We must excercise caution with the sign bit. By definition there
1255 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1256 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1257 So we explicitly mask and sign-extend as necessary. */
1258 if (BITS_PER_WORD == 32)
1261 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1262 return GEN_INT (val);
1264 #if HOST_BITS_PER_WIDE_INT >= 64
1265 else if (BITS_PER_WORD >= 64 && i == 0)
1267 val = k[! WORDS_BIG_ENDIAN];
1268 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1269 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1270 return GEN_INT (val);
1273 else if (BITS_PER_WORD == 16)
1276 if ((i & 1) == !WORDS_BIG_ENDIAN)
1279 return GEN_INT (val);
1284 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1285 && GET_MODE_CLASS (mode) == MODE_FLOAT
1286 && GET_MODE_BITSIZE (mode) > 64
1287 && GET_CODE (op) == CONST_DOUBLE)
1292 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1293 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1295 if (BITS_PER_WORD == 32)
1298 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1299 return GEN_INT (val);
1304 #else /* no REAL_ARITHMETIC */
1305 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1306 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1307 || flag_pretend_float)
1308 && GET_MODE_CLASS (mode) == MODE_FLOAT
1309 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1310 && GET_CODE (op) == CONST_DOUBLE)
1312 /* The constant is stored in the host's word-ordering,
1313 but we want to access it in the target's word-ordering. Some
1314 compilers don't like a conditional inside macro args, so we have two
1315 copies of the return. */
1316 #ifdef HOST_WORDS_BIG_ENDIAN
1317 return GEN_INT (i == WORDS_BIG_ENDIAN
1318 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1320 return GEN_INT (i != WORDS_BIG_ENDIAN
1321 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1324 #endif /* no REAL_ARITHMETIC */
1326 /* Single word float is a little harder, since single- and double-word
1327 values often do not have the same high-order bits. We have already
1328 verified that we want the only defined word of the single-word value. */
1329 #ifdef REAL_ARITHMETIC
1330 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1331 && GET_MODE_BITSIZE (mode) == 32
1332 && GET_CODE (op) == CONST_DOUBLE)
1337 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1338 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1340 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1342 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1344 if (BITS_PER_WORD == 16)
1346 if ((i & 1) == !WORDS_BIG_ENDIAN)
1351 return GEN_INT (val);
1354 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1355 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1356 || flag_pretend_float)
1357 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1358 && GET_MODE_CLASS (mode) == MODE_FLOAT
1359 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1360 && GET_CODE (op) == CONST_DOUBLE)
1363 union {float f; HOST_WIDE_INT i; } u;
1365 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1368 return GEN_INT (u.i);
1370 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1371 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1372 || flag_pretend_float)
1373 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1374 && GET_MODE_CLASS (mode) == MODE_FLOAT
1375 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1376 && GET_CODE (op) == CONST_DOUBLE)
1379 union {double d; HOST_WIDE_INT i; } u;
1381 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1384 return GEN_INT (u.i);
1386 #endif /* no REAL_ARITHMETIC */
1388 /* The only remaining cases that we can handle are integers.
1389 Convert to proper endianness now since these cases need it.
1390 At this point, i == 0 means the low-order word.
1392 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1393 in general. However, if OP is (const_int 0), we can just return
1396 if (op == const0_rtx)
1399 if (GET_MODE_CLASS (mode) != MODE_INT
1400 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1401 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1404 if (WORDS_BIG_ENDIAN)
1405 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1407 /* Find out which word on the host machine this value is in and get
1408 it from the constant. */
1409 val = (i / size_ratio == 0
1410 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1411 : (GET_CODE (op) == CONST_INT
1412 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1414 /* Get the value we want into the low bits of val. */
1415 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1416 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1418 val = trunc_int_for_mode (val, word_mode);
1420 return GEN_INT (val);
1423 /* Similar to `operand_subword', but never return 0. If we can't extract
1424 the required subword, put OP into a register and try again. If that fails,
1425 abort. We always validate the address in this case. It is not valid
1426 to call this function after reload; it is mostly meant for RTL
1429 MODE is the mode of OP, in case it is CONST_INT. */
1432 operand_subword_force (op, i, mode)
1435 enum machine_mode mode;
1437 rtx result = operand_subword (op, i, 1, mode);
1442 if (mode != BLKmode && mode != VOIDmode)
1444 /* If this is a register which can not be accessed by words, copy it
1445 to a pseudo register. */
1446 if (GET_CODE (op) == REG)
1447 op = copy_to_reg (op);
1449 op = force_reg (mode, op);
1452 result = operand_subword (op, i, 1, mode);
1459 /* Given a compare instruction, swap the operands.
1460 A test instruction is changed into a compare of 0 against the operand. */
1463 reverse_comparison (insn)
1466 rtx body = PATTERN (insn);
1469 if (GET_CODE (body) == SET)
1470 comp = SET_SRC (body);
1472 comp = SET_SRC (XVECEXP (body, 0, 0));
1474 if (GET_CODE (comp) == COMPARE)
1476 rtx op0 = XEXP (comp, 0);
1477 rtx op1 = XEXP (comp, 1);
1478 XEXP (comp, 0) = op1;
1479 XEXP (comp, 1) = op0;
1483 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1484 if (GET_CODE (body) == SET)
1485 SET_SRC (body) = new;
1487 SET_SRC (XVECEXP (body, 0, 0)) = new;
1491 /* Return a memory reference like MEMREF, but with its mode changed
1492 to MODE and its address changed to ADDR.
1493 (VOIDmode means don't change the mode.
1494 NULL for ADDR means don't change the address.) */
1497 change_address (memref, mode, addr)
1499 enum machine_mode mode;
1504 if (GET_CODE (memref) != MEM)
1506 if (mode == VOIDmode)
1507 mode = GET_MODE (memref);
1509 addr = XEXP (memref, 0);
1511 /* If reload is in progress or has completed, ADDR must be valid.
1512 Otherwise, we can call memory_address to make it valid. */
1513 if (reload_completed || reload_in_progress)
1515 if (! memory_address_p (mode, addr))
1519 addr = memory_address (mode, addr);
1521 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1524 new = gen_rtx_MEM (mode, addr);
1525 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1526 MEM_COPY_ATTRIBUTES (new, memref);
1527 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (memref);
1531 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1538 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1539 NULL_RTX, label_num++, NULL_PTR);
1541 LABEL_NUSES (label) = 0;
1545 /* For procedure integration. */
1547 /* Install new pointers to the first and last insns in the chain.
1548 Also, set cur_insn_uid to one higher than the last in use.
1549 Used for an inline-procedure after copying the insn chain. */
1552 set_new_first_and_last_insn (first, last)
1561 for (insn = first; insn; insn = NEXT_INSN (insn))
1562 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1567 /* Set the range of label numbers found in the current function.
1568 This is used when belatedly compiling an inline function. */
1571 set_new_first_and_last_label_num (first, last)
1574 base_label_num = label_num;
1575 first_label_num = first;
1576 last_label_num = last;
1579 /* Set the last label number found in the current function.
1580 This is used when belatedly compiling an inline function. */
1583 set_new_last_label_num (last)
1586 base_label_num = label_num;
1587 last_label_num = last;
1590 /* Restore all variables describing the current status from the structure *P.
1591 This is used after a nested function. */
1594 restore_emit_status (p)
1598 clear_emit_caches ();
1601 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1602 It does not work to do this twice, because the mark bits set here
1603 are not cleared afterwards. */
1606 unshare_all_rtl (insn)
1609 for (; insn; insn = NEXT_INSN (insn))
1610 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1611 || GET_CODE (insn) == CALL_INSN)
1613 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1614 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1615 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1618 /* Make sure the addresses of stack slots found outside the insn chain
1619 (such as, in DECL_RTL of a variable) are not shared
1620 with the insn chain.
1622 This special care is necessary when the stack slot MEM does not
1623 actually appear in the insn chain. If it does appear, its address
1624 is unshared from all else at that point. */
1626 copy_rtx_if_shared (stack_slot_list);
1629 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1630 Recursively does the same for subexpressions. */
1633 copy_rtx_if_shared (orig)
1636 register rtx x = orig;
1638 register enum rtx_code code;
1639 register const char *format_ptr;
1645 code = GET_CODE (x);
1647 /* These types may be freely shared. */
1660 /* SCRATCH must be shared because they represent distinct values. */
1664 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1665 a LABEL_REF, it isn't sharable. */
1666 if (GET_CODE (XEXP (x, 0)) == PLUS
1667 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1668 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1677 /* The chain of insns is not being copied. */
1681 /* A MEM is allowed to be shared if its address is constant.
1683 We used to allow sharing of MEMs which referenced
1684 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1685 that can lose. instantiate_virtual_regs will not unshare
1686 the MEMs, and combine may change the structure of the address
1687 because it looks safe and profitable in one context, but
1688 in some other context it creates unrecognizable RTL. */
1689 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1698 /* This rtx may not be shared. If it has already been seen,
1699 replace it with a copy of itself. */
1705 copy = rtx_alloc (code);
1706 bcopy ((char *) x, (char *) copy,
1707 (sizeof (*copy) - sizeof (copy->fld)
1708 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1714 /* Now scan the subexpressions recursively.
1715 We can store any replaced subexpressions directly into X
1716 since we know X is not shared! Any vectors in X
1717 must be copied if X was copied. */
1719 format_ptr = GET_RTX_FORMAT (code);
1721 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1723 switch (*format_ptr++)
1726 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1730 if (XVEC (x, i) != NULL)
1733 int len = XVECLEN (x, i);
1735 if (copied && len > 0)
1736 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1737 for (j = 0; j < len; j++)
1738 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1746 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1747 to look for shared sub-parts. */
1750 reset_used_flags (x)
1754 register enum rtx_code code;
1755 register const char *format_ptr;
1760 code = GET_CODE (x);
1762 /* These types may be freely shared so we needn't do any resetting
1783 /* The chain of insns is not being copied. */
1792 format_ptr = GET_RTX_FORMAT (code);
1793 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1795 switch (*format_ptr++)
1798 reset_used_flags (XEXP (x, i));
1802 for (j = 0; j < XVECLEN (x, i); j++)
1803 reset_used_flags (XVECEXP (x, i, j));
1809 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1810 Return X or the rtx for the pseudo reg the value of X was copied into.
1811 OTHER must be valid as a SET_DEST. */
1814 make_safe_from (x, other)
1818 switch (GET_CODE (other))
1821 other = SUBREG_REG (other);
1823 case STRICT_LOW_PART:
1826 other = XEXP (other, 0);
1832 if ((GET_CODE (other) == MEM
1834 && GET_CODE (x) != REG
1835 && GET_CODE (x) != SUBREG)
1836 || (GET_CODE (other) == REG
1837 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1838 || reg_mentioned_p (other, x))))
1840 rtx temp = gen_reg_rtx (GET_MODE (x));
1841 emit_move_insn (temp, x);
1847 /* Emission of insns (adding them to the doubly-linked list). */
1849 /* Return the first insn of the current sequence or current function. */
1857 /* Return the last insn emitted in current sequence or current function. */
1865 /* Specify a new insn as the last in the chain. */
1868 set_last_insn (insn)
1871 if (NEXT_INSN (insn) != 0)
1876 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1879 get_last_insn_anywhere ()
1881 struct sequence_stack *stack;
1884 for (stack = seq_stack; stack; stack = stack->next)
1885 if (stack->last != 0)
1890 /* Return a number larger than any instruction's uid in this function. */
1895 return cur_insn_uid;
1898 /* Return the next insn. If it is a SEQUENCE, return the first insn
1907 insn = NEXT_INSN (insn);
1908 if (insn && GET_CODE (insn) == INSN
1909 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1910 insn = XVECEXP (PATTERN (insn), 0, 0);
1916 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1920 previous_insn (insn)
1925 insn = PREV_INSN (insn);
1926 if (insn && GET_CODE (insn) == INSN
1927 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1928 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1934 /* Return the next insn after INSN that is not a NOTE. This routine does not
1935 look inside SEQUENCEs. */
1938 next_nonnote_insn (insn)
1943 insn = NEXT_INSN (insn);
1944 if (insn == 0 || GET_CODE (insn) != NOTE)
1951 /* Return the previous insn before INSN that is not a NOTE. This routine does
1952 not look inside SEQUENCEs. */
1955 prev_nonnote_insn (insn)
1960 insn = PREV_INSN (insn);
1961 if (insn == 0 || GET_CODE (insn) != NOTE)
1968 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1969 or 0, if there is none. This routine does not look inside
1973 next_real_insn (insn)
1978 insn = NEXT_INSN (insn);
1979 if (insn == 0 || GET_CODE (insn) == INSN
1980 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1987 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1988 or 0, if there is none. This routine does not look inside
1992 prev_real_insn (insn)
1997 insn = PREV_INSN (insn);
1998 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1999 || GET_CODE (insn) == JUMP_INSN)
2006 /* Find the next insn after INSN that really does something. This routine
2007 does not look inside SEQUENCEs. Until reload has completed, this is the
2008 same as next_real_insn. */
2011 next_active_insn (insn)
2016 insn = NEXT_INSN (insn);
2018 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2019 || (GET_CODE (insn) == INSN
2020 && (! reload_completed
2021 || (GET_CODE (PATTERN (insn)) != USE
2022 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2029 /* Find the last insn before INSN that really does something. This routine
2030 does not look inside SEQUENCEs. Until reload has completed, this is the
2031 same as prev_real_insn. */
2034 prev_active_insn (insn)
2039 insn = PREV_INSN (insn);
2041 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2042 || (GET_CODE (insn) == INSN
2043 && (! reload_completed
2044 || (GET_CODE (PATTERN (insn)) != USE
2045 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2052 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2060 insn = NEXT_INSN (insn);
2061 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2068 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2076 insn = PREV_INSN (insn);
2077 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2085 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2086 and REG_CC_USER notes so we can find it. */
2089 link_cc0_insns (insn)
2092 rtx user = next_nonnote_insn (insn);
2094 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2095 user = XVECEXP (PATTERN (user), 0, 0);
2097 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2098 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2101 /* Return the next insn that uses CC0 after INSN, which is assumed to
2102 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2103 applied to the result of this function should yield INSN).
2105 Normally, this is simply the next insn. However, if a REG_CC_USER note
2106 is present, it contains the insn that uses CC0.
2108 Return 0 if we can't find the insn. */
2111 next_cc0_user (insn)
2114 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2117 return XEXP (note, 0);
2119 insn = next_nonnote_insn (insn);
2120 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2121 insn = XVECEXP (PATTERN (insn), 0, 0);
2123 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2124 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2130 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2131 note, it is the previous insn. */
2134 prev_cc0_setter (insn)
2137 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2140 return XEXP (note, 0);
2142 insn = prev_nonnote_insn (insn);
2143 if (! sets_cc0_p (PATTERN (insn)))
2150 /* Try splitting insns that can be split for better scheduling.
2151 PAT is the pattern which might split.
2152 TRIAL is the insn providing PAT.
2153 LAST is non-zero if we should return the last insn of the sequence produced.
2155 If this routine succeeds in splitting, it returns the first or last
2156 replacement insn depending on the value of LAST. Otherwise, it
2157 returns TRIAL. If the insn to be returned can be split, it will be. */
2160 try_split (pat, trial, last)
2164 rtx before = PREV_INSN (trial);
2165 rtx after = NEXT_INSN (trial);
2166 rtx seq = split_insns (pat, trial);
2167 int has_barrier = 0;
2170 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2171 We may need to handle this specially. */
2172 if (after && GET_CODE (after) == BARRIER)
2175 after = NEXT_INSN (after);
2180 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2181 The latter case will normally arise only when being done so that
2182 it, in turn, will be split (SFmode on the 29k is an example). */
2183 if (GET_CODE (seq) == SEQUENCE)
2185 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2186 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2187 increment the usage count so we don't delete the label. */
2190 if (GET_CODE (trial) == JUMP_INSN)
2191 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2192 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2194 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2196 if (JUMP_LABEL (trial))
2197 LABEL_NUSES (JUMP_LABEL (trial))++;
2200 tem = emit_insn_after (seq, before);
2202 delete_insn (trial);
2204 emit_barrier_after (tem);
2206 /* Recursively call try_split for each new insn created; by the
2207 time control returns here that insn will be fully split, so
2208 set LAST and continue from the insn after the one returned.
2209 We can't use next_active_insn here since AFTER may be a note.
2210 Ignore deleted insns, which can be occur if not optimizing. */
2211 for (tem = NEXT_INSN (before); tem != after;
2212 tem = NEXT_INSN (tem))
2213 if (! INSN_DELETED_P (tem)
2214 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2215 tem = try_split (PATTERN (tem), tem, 1);
2217 /* Avoid infinite loop if the result matches the original pattern. */
2218 else if (rtx_equal_p (seq, pat))
2222 PATTERN (trial) = seq;
2223 INSN_CODE (trial) = -1;
2224 try_split (seq, trial, last);
2227 /* Return either the first or the last insn, depending on which was
2229 return last ? prev_active_insn (after) : next_active_insn (before);
2235 /* Make and return an INSN rtx, initializing all its slots.
2236 Store PATTERN in the pattern slots. */
2239 make_insn_raw (pattern)
2244 /* If in RTL generation phase, see if FREE_INSN can be used. */
2245 if (free_insn != 0 && rtx_equal_function_value_matters)
2248 free_insn = NEXT_INSN (free_insn);
2249 PUT_CODE (insn, INSN);
2252 insn = rtx_alloc (INSN);
2254 INSN_UID (insn) = cur_insn_uid++;
2255 PATTERN (insn) = pattern;
2256 INSN_CODE (insn) = -1;
2257 LOG_LINKS (insn) = NULL;
2258 REG_NOTES (insn) = NULL;
2263 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2266 make_jump_insn_raw (pattern)
2271 insn = rtx_alloc (JUMP_INSN);
2272 INSN_UID (insn) = cur_insn_uid++;
2274 PATTERN (insn) = pattern;
2275 INSN_CODE (insn) = -1;
2276 LOG_LINKS (insn) = NULL;
2277 REG_NOTES (insn) = NULL;
2278 JUMP_LABEL (insn) = NULL;
2283 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2286 make_call_insn_raw (pattern)
2291 insn = rtx_alloc (CALL_INSN);
2292 INSN_UID (insn) = cur_insn_uid++;
2294 PATTERN (insn) = pattern;
2295 INSN_CODE (insn) = -1;
2296 LOG_LINKS (insn) = NULL;
2297 REG_NOTES (insn) = NULL;
2298 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2303 /* Add INSN to the end of the doubly-linked list.
2304 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2310 PREV_INSN (insn) = last_insn;
2311 NEXT_INSN (insn) = 0;
2313 if (NULL != last_insn)
2314 NEXT_INSN (last_insn) = insn;
2316 if (NULL == first_insn)
2322 /* Add INSN into the doubly-linked list after insn AFTER. This and
2323 the next should be the only functions called to insert an insn once
2324 delay slots have been filled since only they know how to update a
2328 add_insn_after (insn, after)
2331 rtx next = NEXT_INSN (after);
2333 if (optimize && INSN_DELETED_P (after))
2336 NEXT_INSN (insn) = next;
2337 PREV_INSN (insn) = after;
2341 PREV_INSN (next) = insn;
2342 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2343 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2345 else if (last_insn == after)
2349 struct sequence_stack *stack = seq_stack;
2350 /* Scan all pending sequences too. */
2351 for (; stack; stack = stack->next)
2352 if (after == stack->last)
2362 NEXT_INSN (after) = insn;
2363 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2365 rtx sequence = PATTERN (after);
2366 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2370 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2371 the previous should be the only functions called to insert an insn once
2372 delay slots have been filled since only they know how to update a
2376 add_insn_before (insn, before)
2379 rtx prev = PREV_INSN (before);
2381 if (optimize && INSN_DELETED_P (before))
2384 PREV_INSN (insn) = prev;
2385 NEXT_INSN (insn) = before;
2389 NEXT_INSN (prev) = insn;
2390 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2392 rtx sequence = PATTERN (prev);
2393 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2396 else if (first_insn == before)
2400 struct sequence_stack *stack = seq_stack;
2401 /* Scan all pending sequences too. */
2402 for (; stack; stack = stack->next)
2403 if (before == stack->first)
2405 stack->first = insn;
2413 PREV_INSN (before) = insn;
2414 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2415 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2418 /* Remove an insn from its doubly-linked list. This function knows how
2419 to handle sequences. */
2424 rtx next = NEXT_INSN (insn);
2425 rtx prev = PREV_INSN (insn);
2428 NEXT_INSN (prev) = next;
2429 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2431 rtx sequence = PATTERN (prev);
2432 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2435 else if (first_insn == insn)
2439 struct sequence_stack *stack = seq_stack;
2440 /* Scan all pending sequences too. */
2441 for (; stack; stack = stack->next)
2442 if (insn == stack->first)
2444 stack->first = next;
2454 PREV_INSN (next) = prev;
2455 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2456 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2458 else if (last_insn == insn)
2462 struct sequence_stack *stack = seq_stack;
2463 /* Scan all pending sequences too. */
2464 for (; stack; stack = stack->next)
2465 if (insn == stack->last)
2476 /* Delete all insns made since FROM.
2477 FROM becomes the new last instruction. */
2480 delete_insns_since (from)
2486 NEXT_INSN (from) = 0;
2490 /* This function is deprecated, please use sequences instead.
2492 Move a consecutive bunch of insns to a different place in the chain.
2493 The insns to be moved are those between FROM and TO.
2494 They are moved to a new position after the insn AFTER.
2495 AFTER must not be FROM or TO or any insn in between.
2497 This function does not know about SEQUENCEs and hence should not be
2498 called after delay-slot filling has been done. */
2501 reorder_insns (from, to, after)
2502 rtx from, to, after;
2504 /* Splice this bunch out of where it is now. */
2505 if (PREV_INSN (from))
2506 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2508 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2509 if (last_insn == to)
2510 last_insn = PREV_INSN (from);
2511 if (first_insn == from)
2512 first_insn = NEXT_INSN (to);
2514 /* Make the new neighbors point to it and it to them. */
2515 if (NEXT_INSN (after))
2516 PREV_INSN (NEXT_INSN (after)) = to;
2518 NEXT_INSN (to) = NEXT_INSN (after);
2519 PREV_INSN (from) = after;
2520 NEXT_INSN (after) = from;
2521 if (after == last_insn)
2525 /* Return the line note insn preceding INSN. */
2528 find_line_note (insn)
2531 if (no_line_numbers)
2534 for (; insn; insn = PREV_INSN (insn))
2535 if (GET_CODE (insn) == NOTE
2536 && NOTE_LINE_NUMBER (insn) >= 0)
2542 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2543 of the moved insns when debugging. This may insert a note between AFTER
2544 and FROM, and another one after TO. */
2547 reorder_insns_with_line_notes (from, to, after)
2548 rtx from, to, after;
2550 rtx from_line = find_line_note (from);
2551 rtx after_line = find_line_note (after);
2553 reorder_insns (from, to, after);
2555 if (from_line == after_line)
2559 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2560 NOTE_LINE_NUMBER (from_line),
2563 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2564 NOTE_LINE_NUMBER (after_line),
2568 /* Emit an insn of given code and pattern
2569 at a specified place within the doubly-linked list. */
2571 /* Make an instruction with body PATTERN
2572 and output it before the instruction BEFORE. */
2575 emit_insn_before (pattern, before)
2576 register rtx pattern, before;
2578 register rtx insn = before;
2580 if (GET_CODE (pattern) == SEQUENCE)
2584 for (i = 0; i < XVECLEN (pattern, 0); i++)
2586 insn = XVECEXP (pattern, 0, i);
2587 add_insn_before (insn, before);
2589 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2590 sequence_result[XVECLEN (pattern, 0)] = pattern;
2594 insn = make_insn_raw (pattern);
2595 add_insn_before (insn, before);
2601 /* Make an instruction with body PATTERN and code JUMP_INSN
2602 and output it before the instruction BEFORE. */
2605 emit_jump_insn_before (pattern, before)
2606 register rtx pattern, before;
2610 if (GET_CODE (pattern) == SEQUENCE)
2611 insn = emit_insn_before (pattern, before);
2614 insn = make_jump_insn_raw (pattern);
2615 add_insn_before (insn, before);
2621 /* Make an instruction with body PATTERN and code CALL_INSN
2622 and output it before the instruction BEFORE. */
2625 emit_call_insn_before (pattern, before)
2626 register rtx pattern, before;
2630 if (GET_CODE (pattern) == SEQUENCE)
2631 insn = emit_insn_before (pattern, before);
2634 insn = make_call_insn_raw (pattern);
2635 add_insn_before (insn, before);
2636 PUT_CODE (insn, CALL_INSN);
2642 /* Make an insn of code BARRIER
2643 and output it before the insn BEFORE. */
2646 emit_barrier_before (before)
2647 register rtx before;
2649 register rtx insn = rtx_alloc (BARRIER);
2651 INSN_UID (insn) = cur_insn_uid++;
2653 add_insn_before (insn, before);
2657 /* Emit the label LABEL before the insn BEFORE. */
2660 emit_label_before (label, before)
2663 /* This can be called twice for the same label as a result of the
2664 confusion that follows a syntax error! So make it harmless. */
2665 if (INSN_UID (label) == 0)
2667 INSN_UID (label) = cur_insn_uid++;
2668 add_insn_before (label, before);
2674 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2677 emit_note_before (subtype, before)
2681 register rtx note = rtx_alloc (NOTE);
2682 INSN_UID (note) = cur_insn_uid++;
2683 NOTE_SOURCE_FILE (note) = 0;
2684 NOTE_LINE_NUMBER (note) = subtype;
2686 add_insn_before (note, before);
2690 /* Make an insn of code INSN with body PATTERN
2691 and output it after the insn AFTER. */
2694 emit_insn_after (pattern, after)
2695 register rtx pattern, after;
2697 register rtx insn = after;
2699 if (GET_CODE (pattern) == SEQUENCE)
2703 for (i = 0; i < XVECLEN (pattern, 0); i++)
2705 insn = XVECEXP (pattern, 0, i);
2706 add_insn_after (insn, after);
2709 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2710 sequence_result[XVECLEN (pattern, 0)] = pattern;
2714 insn = make_insn_raw (pattern);
2715 add_insn_after (insn, after);
2721 /* Similar to emit_insn_after, except that line notes are to be inserted so
2722 as to act as if this insn were at FROM. */
2725 emit_insn_after_with_line_notes (pattern, after, from)
2726 rtx pattern, after, from;
2728 rtx from_line = find_line_note (from);
2729 rtx after_line = find_line_note (after);
2730 rtx insn = emit_insn_after (pattern, after);
2733 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2734 NOTE_LINE_NUMBER (from_line),
2738 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2739 NOTE_LINE_NUMBER (after_line),
2743 /* Make an insn of code JUMP_INSN with body PATTERN
2744 and output it after the insn AFTER. */
2747 emit_jump_insn_after (pattern, after)
2748 register rtx pattern, after;
2752 if (GET_CODE (pattern) == SEQUENCE)
2753 insn = emit_insn_after (pattern, after);
2756 insn = make_jump_insn_raw (pattern);
2757 add_insn_after (insn, after);
2763 /* Make an insn of code BARRIER
2764 and output it after the insn AFTER. */
2767 emit_barrier_after (after)
2770 register rtx insn = rtx_alloc (BARRIER);
2772 INSN_UID (insn) = cur_insn_uid++;
2774 add_insn_after (insn, after);
2778 /* Emit the label LABEL after the insn AFTER. */
2781 emit_label_after (label, after)
2784 /* This can be called twice for the same label
2785 as a result of the confusion that follows a syntax error!
2786 So make it harmless. */
2787 if (INSN_UID (label) == 0)
2789 INSN_UID (label) = cur_insn_uid++;
2790 add_insn_after (label, after);
2796 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2799 emit_note_after (subtype, after)
2803 register rtx note = rtx_alloc (NOTE);
2804 INSN_UID (note) = cur_insn_uid++;
2805 NOTE_SOURCE_FILE (note) = 0;
2806 NOTE_LINE_NUMBER (note) = subtype;
2807 add_insn_after (note, after);
2811 /* Emit a line note for FILE and LINE after the insn AFTER. */
2814 emit_line_note_after (file, line, after)
2821 if (no_line_numbers && line > 0)
2827 note = rtx_alloc (NOTE);
2828 INSN_UID (note) = cur_insn_uid++;
2829 NOTE_SOURCE_FILE (note) = file;
2830 NOTE_LINE_NUMBER (note) = line;
2831 add_insn_after (note, after);
2835 /* Make an insn of code INSN with pattern PATTERN
2836 and add it to the end of the doubly-linked list.
2837 If PATTERN is a SEQUENCE, take the elements of it
2838 and emit an insn for each element.
2840 Returns the last insn emitted. */
2846 rtx insn = last_insn;
2848 if (GET_CODE (pattern) == SEQUENCE)
2852 for (i = 0; i < XVECLEN (pattern, 0); i++)
2854 insn = XVECEXP (pattern, 0, i);
2857 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2858 sequence_result[XVECLEN (pattern, 0)] = pattern;
2862 insn = make_insn_raw (pattern);
2869 /* Emit the insns in a chain starting with INSN.
2870 Return the last insn emitted. */
2880 rtx next = NEXT_INSN (insn);
2889 /* Emit the insns in a chain starting with INSN and place them in front of
2890 the insn BEFORE. Return the last insn emitted. */
2893 emit_insns_before (insn, before)
2901 rtx next = NEXT_INSN (insn);
2902 add_insn_before (insn, before);
2910 /* Emit the insns in a chain starting with FIRST and place them in back of
2911 the insn AFTER. Return the last insn emitted. */
2914 emit_insns_after (first, after)
2919 register rtx after_after;
2927 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2930 after_after = NEXT_INSN (after);
2932 NEXT_INSN (after) = first;
2933 PREV_INSN (first) = after;
2934 NEXT_INSN (last) = after_after;
2936 PREV_INSN (after_after) = last;
2938 if (after == last_insn)
2943 /* Make an insn of code JUMP_INSN with pattern PATTERN
2944 and add it to the end of the doubly-linked list. */
2947 emit_jump_insn (pattern)
2950 if (GET_CODE (pattern) == SEQUENCE)
2951 return emit_insn (pattern);
2954 register rtx insn = make_jump_insn_raw (pattern);
2960 /* Make an insn of code CALL_INSN with pattern PATTERN
2961 and add it to the end of the doubly-linked list. */
2964 emit_call_insn (pattern)
2967 if (GET_CODE (pattern) == SEQUENCE)
2968 return emit_insn (pattern);
2971 register rtx insn = make_call_insn_raw (pattern);
2973 PUT_CODE (insn, CALL_INSN);
2978 /* Add the label LABEL to the end of the doubly-linked list. */
2984 /* This can be called twice for the same label
2985 as a result of the confusion that follows a syntax error!
2986 So make it harmless. */
2987 if (INSN_UID (label) == 0)
2989 INSN_UID (label) = cur_insn_uid++;
2995 /* Make an insn of code BARRIER
2996 and add it to the end of the doubly-linked list. */
3001 register rtx barrier = rtx_alloc (BARRIER);
3002 INSN_UID (barrier) = cur_insn_uid++;
3007 /* Make an insn of code NOTE
3008 with data-fields specified by FILE and LINE
3009 and add it to the end of the doubly-linked list,
3010 but only if line-numbers are desired for debugging info. */
3013 emit_line_note (file, line)
3017 set_file_and_line_for_stmt (file, line);
3020 if (no_line_numbers)
3024 return emit_note (file, line);
3027 /* Make an insn of code NOTE
3028 with data-fields specified by FILE and LINE
3029 and add it to the end of the doubly-linked list.
3030 If it is a line-number NOTE, omit it if it matches the previous one. */
3033 emit_note (file, line)
3041 if (file && last_filename && !strcmp (file, last_filename)
3042 && line == last_linenum)
3044 last_filename = file;
3045 last_linenum = line;
3048 if (no_line_numbers && line > 0)
3054 note = rtx_alloc (NOTE);
3055 INSN_UID (note) = cur_insn_uid++;
3056 NOTE_SOURCE_FILE (note) = file;
3057 NOTE_LINE_NUMBER (note) = line;
3062 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3065 emit_line_note_force (file, line)
3070 return emit_line_note (file, line);
3073 /* Cause next statement to emit a line note even if the line number
3074 has not changed. This is used at the beginning of a function. */
3077 force_next_line_note ()
3082 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3083 note of this type already exists, remove it first. */
3086 set_unique_reg_note (insn, kind, datum)
3091 rtx note = find_reg_note (insn, kind, NULL_RTX);
3093 /* First remove the note if there already is one. */
3095 remove_note (insn, note);
3097 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3100 /* Return an indication of which type of insn should have X as a body.
3101 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3107 if (GET_CODE (x) == CODE_LABEL)
3109 if (GET_CODE (x) == CALL)
3111 if (GET_CODE (x) == RETURN)
3113 if (GET_CODE (x) == SET)
3115 if (SET_DEST (x) == pc_rtx)
3117 else if (GET_CODE (SET_SRC (x)) == CALL)
3122 if (GET_CODE (x) == PARALLEL)
3125 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3126 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3128 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3129 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3131 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3132 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3138 /* Emit the rtl pattern X as an appropriate kind of insn.
3139 If X is a label, it is simply added into the insn chain. */
3145 enum rtx_code code = classify_insn (x);
3147 if (code == CODE_LABEL)
3148 return emit_label (x);
3149 else if (code == INSN)
3150 return emit_insn (x);
3151 else if (code == JUMP_INSN)
3153 register rtx insn = emit_jump_insn (x);
3154 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3155 return emit_barrier ();
3158 else if (code == CALL_INSN)
3159 return emit_call_insn (x);
3164 /* Begin emitting insns to a sequence which can be packaged in an
3165 RTL_EXPR. If this sequence will contain something that might cause
3166 the compiler to pop arguments to function calls (because those
3167 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3168 details), use do_pending_stack_adjust before calling this function.
3169 That will ensure that the deferred pops are not accidentally
3170 emitted in the middel of this sequence. */
3175 struct sequence_stack *tem;
3177 if (sequence_element_free_list)
3179 /* Reuse a previously-saved struct sequence_stack. */
3180 tem = sequence_element_free_list;
3181 sequence_element_free_list = tem->next;
3184 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3186 tem->next = seq_stack;
3187 tem->first = first_insn;
3188 tem->last = last_insn;
3189 tem->sequence_rtl_expr = seq_rtl_expr;
3197 /* Similarly, but indicate that this sequence will be placed in T, an
3198 RTL_EXPR. See the documentation for start_sequence for more
3199 information about how to use this function. */
3202 start_sequence_for_rtl_expr (t)
3210 /* Set up the insn chain starting with FIRST as the current sequence,
3211 saving the previously current one. See the documentation for
3212 start_sequence for more information about how to use this function. */
3215 push_to_sequence (first)
3222 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3228 /* Set up the outer-level insn chain
3229 as the current sequence, saving the previously current one. */
3232 push_topmost_sequence ()
3234 struct sequence_stack *stack, *top = NULL;
3238 for (stack = seq_stack; stack; stack = stack->next)
3241 first_insn = top->first;
3242 last_insn = top->last;
3243 seq_rtl_expr = top->sequence_rtl_expr;
3246 /* After emitting to the outer-level insn chain, update the outer-level
3247 insn chain, and restore the previous saved state. */
3250 pop_topmost_sequence ()
3252 struct sequence_stack *stack, *top = NULL;
3254 for (stack = seq_stack; stack; stack = stack->next)
3257 top->first = first_insn;
3258 top->last = last_insn;
3259 /* ??? Why don't we save seq_rtl_expr here? */
3264 /* After emitting to a sequence, restore previous saved state.
3266 To get the contents of the sequence just made, you must call
3267 `gen_sequence' *before* calling here.
3269 If the compiler might have deferred popping arguments while
3270 generating this sequence, and this sequence will not be immediately
3271 inserted into the instruction stream, use do_pending_stack_adjust
3272 before calling gen_sequence. That will ensure that the deferred
3273 pops are inserted into this sequence, and not into some random
3274 location in the instruction stream. See INHIBIT_DEFER_POP for more
3275 information about deferred popping of arguments. */
3280 struct sequence_stack *tem = seq_stack;
3282 first_insn = tem->first;
3283 last_insn = tem->last;
3284 seq_rtl_expr = tem->sequence_rtl_expr;
3285 seq_stack = tem->next;
3287 tem->next = sequence_element_free_list;
3288 sequence_element_free_list = tem;
3291 /* Return 1 if currently emitting into a sequence. */
3296 return seq_stack != 0;
3299 /* Generate a SEQUENCE rtx containing the insns already emitted
3300 to the current sequence.
3302 This is how the gen_... function from a DEFINE_EXPAND
3303 constructs the SEQUENCE that it returns. */
3313 /* Count the insns in the chain. */
3315 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3318 /* If only one insn, return its pattern rather than a SEQUENCE.
3319 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3320 the case of an empty list.) */
3322 && ! RTX_FRAME_RELATED_P (first_insn)
3323 && (GET_CODE (first_insn) == INSN
3324 || GET_CODE (first_insn) == JUMP_INSN
3325 /* Don't discard the call usage field. */
3326 || (GET_CODE (first_insn) == CALL_INSN
3327 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3329 NEXT_INSN (first_insn) = free_insn;
3330 free_insn = first_insn;
3331 return PATTERN (first_insn);
3334 /* Put them in a vector. See if we already have a SEQUENCE of the
3335 appropriate length around. */
3336 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3337 sequence_result[len] = 0;
3340 /* Ensure that this rtl goes in saveable_obstack, since we may
3342 push_obstacks_nochange ();
3343 rtl_in_saveable_obstack ();
3344 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3348 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3349 XVECEXP (result, 0, i) = tem;
3354 /* Put the various virtual registers into REGNO_REG_RTX. */
3357 init_virtual_regs (es)
3358 struct emit_status *es;
3360 rtx *ptr = es->x_regno_reg_rtx;
3361 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3362 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3363 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3364 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3365 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3369 clear_emit_caches ()
3373 /* Clear the start_sequence/gen_sequence cache. */
3374 sequence_element_free_list = 0;
3375 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3376 sequence_result[i] = 0;
3380 /* Initialize data structures and variables in this file
3381 before generating rtl for each function. */
3386 struct function *f = current_function;
3388 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3391 seq_rtl_expr = NULL;
3393 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3396 first_label_num = label_num;
3400 clear_emit_caches ();
3402 /* Init the tables that describe all the pseudo regs. */
3404 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3406 f->emit->regno_pointer_flag
3407 = (char *) savealloc (f->emit->regno_pointer_flag_length);
3408 bzero (f->emit->regno_pointer_flag, f->emit->regno_pointer_flag_length);
3410 f->emit->regno_pointer_align
3411 = (char *) savealloc (f->emit->regno_pointer_flag_length);
3412 bzero (f->emit->regno_pointer_align, f->emit->regno_pointer_flag_length);
3415 = (rtx *) savealloc (f->emit->regno_pointer_flag_length * sizeof (rtx));
3416 bzero ((char *) regno_reg_rtx,
3417 f->emit->regno_pointer_flag_length * sizeof (rtx));
3419 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3420 init_virtual_regs (f->emit);
3422 /* Indicate that the virtual registers and stack locations are
3424 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3425 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3426 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3427 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3429 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3430 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3431 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3432 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3433 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3435 #ifdef STACK_BOUNDARY
3436 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3437 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3438 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3439 = STACK_BOUNDARY / BITS_PER_UNIT;
3440 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3442 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3443 = STACK_BOUNDARY / BITS_PER_UNIT;
3444 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3445 = STACK_BOUNDARY / BITS_PER_UNIT;
3446 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3447 = STACK_BOUNDARY / BITS_PER_UNIT;
3448 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3449 = STACK_BOUNDARY / BITS_PER_UNIT;
3450 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
3453 #ifdef INIT_EXPANDERS
3458 /* Create some permanent unique rtl objects shared between all functions.
3459 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3462 init_emit_once (line_numbers)
3466 enum machine_mode mode;
3467 enum machine_mode double_mode;
3469 no_line_numbers = ! line_numbers;
3471 /* Compute the word and byte modes. */
3473 byte_mode = VOIDmode;
3474 word_mode = VOIDmode;
3475 double_mode = VOIDmode;
3477 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3478 mode = GET_MODE_WIDER_MODE (mode))
3480 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3481 && byte_mode == VOIDmode)
3484 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3485 && word_mode == VOIDmode)
3489 #ifndef DOUBLE_TYPE_SIZE
3490 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3493 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3494 mode = GET_MODE_WIDER_MODE (mode))
3496 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3497 && double_mode == VOIDmode)
3501 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3503 /* Create the unique rtx's for certain rtx codes and operand values. */
3505 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3507 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3508 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3509 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3512 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3513 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3514 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3516 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3518 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3519 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3520 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3521 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3523 for (i = 0; i <= 2; i++)
3525 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3526 mode = GET_MODE_WIDER_MODE (mode))
3528 rtx tem = rtx_alloc (CONST_DOUBLE);
3529 union real_extract u;
3531 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3532 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3534 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3535 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3536 PUT_MODE (tem, mode);
3538 const_tiny_rtx[i][(int) mode] = tem;
3541 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3543 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3544 mode = GET_MODE_WIDER_MODE (mode))
3545 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3547 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3549 mode = GET_MODE_WIDER_MODE (mode))
3550 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3553 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
3554 if (GET_MODE_CLASS (mode) == MODE_CC)
3555 const_tiny_rtx[0][(int) mode] = const0_rtx;
3557 /* Assign register numbers to the globally defined register rtx.
3558 This must be done at runtime because the register number field
3559 is in a union and some compilers can't initialize unions. */
3561 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3562 PUT_MODE (stack_pointer_rtx, Pmode);
3563 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3564 PUT_MODE (frame_pointer_rtx, Pmode);
3565 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3566 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3567 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3569 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3570 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3571 PUT_MODE (arg_pointer_rtx, Pmode);
3574 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3575 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3576 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3577 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3578 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3579 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3580 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3581 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3582 REGNO (virtual_cfa_rtx) = VIRTUAL_CFA_REGNUM;
3583 PUT_MODE (virtual_cfa_rtx, Pmode);
3585 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3586 return_address_pointer_rtx
3587 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3591 struct_value_rtx = STRUCT_VALUE;
3593 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3596 #ifdef STRUCT_VALUE_INCOMING
3597 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3599 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3600 struct_value_incoming_rtx
3601 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3603 struct_value_incoming_rtx = struct_value_rtx;
3607 #ifdef STATIC_CHAIN_REGNUM
3608 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3610 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3611 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3612 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3615 static_chain_incoming_rtx = static_chain_rtx;
3619 static_chain_rtx = STATIC_CHAIN;
3621 #ifdef STATIC_CHAIN_INCOMING
3622 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3624 static_chain_incoming_rtx = static_chain_rtx;
3628 #ifdef PIC_OFFSET_TABLE_REGNUM
3629 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3632 #ifdef INIT_EXPANDERS
3633 /* This is to initialize save_machine_status and restore_machine_status before
3634 the first call to push_function_context_to. This is needed by the Chill
3635 front end which calls push_function_context_to before the first cal to
3636 init_function_start. */
3641 /* Query and clear/ restore no_line_numbers. This is used by the
3642 switch / case handling in stmt.c to give proper line numbers in
3643 warnings about unreachable code. */
3646 force_line_numbers ()
3648 int old = no_line_numbers;
3650 no_line_numbers = 0;
3652 force_next_line_note ();
3657 restore_line_number_status (old_value)
3660 no_line_numbers = old_value;