1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num = 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl[GR_MAX];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
101 REAL_VALUE_TYPE dconst0;
102 REAL_VALUE_TYPE dconst1;
103 REAL_VALUE_TYPE dconst2;
104 REAL_VALUE_TYPE dconstm1;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 static rtx make_jump_insn_raw PARAMS ((rtx));
174 static rtx make_call_insn_raw PARAMS ((rtx));
175 static rtx find_line_note PARAMS ((rtx));
176 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
177 static void unshare_all_rtl_1 PARAMS ((rtx));
178 static void unshare_all_decls PARAMS ((tree));
179 static void reset_used_decls PARAMS ((tree));
180 static void mark_label_nuses PARAMS ((rtx));
181 static hashval_t const_int_htab_hash PARAMS ((const void *));
182 static int const_int_htab_eq PARAMS ((const void *,
184 static int rtx_htab_mark_1 PARAMS ((void **, void *));
185 static void rtx_htab_mark PARAMS ((void *));
188 /* Returns a hash code for X (which is a really a CONST_INT). */
191 const_int_htab_hash (x)
194 return (hashval_t) INTVAL ((const struct rtx_def *) x);
197 /* Returns non-zero if the value represented by X (which is really a
198 CONST_INT) is the same as that given by Y (which is really a
202 const_int_htab_eq (x, y)
206 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
209 /* Mark the hash-table element X (which is really a pointer to an
213 rtx_htab_mark_1 (x, data)
215 void *data ATTRIBUTE_UNUSED;
221 /* Mark all the elements of HTAB (which is really an htab_t full of
228 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
231 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
232 don't attempt to share with the various global pieces of rtl (such as
233 frame_pointer_rtx). */
236 gen_raw_REG (mode, regno)
237 enum machine_mode mode;
240 rtx x = gen_rtx_raw_REG (mode, regno);
241 ORIGINAL_REGNO (x) = regno;
245 /* There are some RTL codes that require special attention; the generation
246 functions do the raw handling. If you add to this list, modify
247 special_rtx in gengenrtl.c as well. */
250 gen_rtx_CONST_INT (mode, arg)
251 enum machine_mode mode ATTRIBUTE_UNUSED;
256 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
257 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx && arg == STORE_FLAG_VALUE)
261 return const_true_rtx;
264 /* Look up the CONST_INT in the hash table. */
265 slot = htab_find_slot_with_hash (const_int_htab, &arg,
266 (hashval_t) arg, INSERT);
268 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
273 /* CONST_DOUBLEs needs special handling because their length is known
277 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
278 enum machine_mode mode;
280 HOST_WIDE_INT arg1, arg2;
282 rtx r = rtx_alloc (CONST_DOUBLE);
287 X0EXP (r, 1) = NULL_RTX;
291 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
298 gen_rtx_REG (mode, regno)
299 enum machine_mode mode;
302 /* In case the MD file explicitly references the frame pointer, have
303 all such references point to the same frame pointer. This is
304 used during frame pointer elimination to distinguish the explicit
305 references to these registers from pseudos that happened to be
308 If we have eliminated the frame pointer or arg pointer, we will
309 be using it as a normal register, for example as a spill
310 register. In such cases, we might be accessing it in a mode that
311 is not Pmode and therefore cannot use the pre-allocated rtx.
313 Also don't do this when we are making new REGs in reload, since
314 we don't want to get confused with the real pointers. */
316 if (mode == Pmode && !reload_in_progress)
318 if (regno == FRAME_POINTER_REGNUM)
319 return frame_pointer_rtx;
320 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
321 if (regno == HARD_FRAME_POINTER_REGNUM)
322 return hard_frame_pointer_rtx;
324 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
325 if (regno == ARG_POINTER_REGNUM)
326 return arg_pointer_rtx;
328 #ifdef RETURN_ADDRESS_POINTER_REGNUM
329 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
330 return return_address_pointer_rtx;
332 if (regno == STACK_POINTER_REGNUM)
333 return stack_pointer_rtx;
336 return gen_raw_REG (mode, regno);
340 gen_rtx_MEM (mode, addr)
341 enum machine_mode mode;
344 rtx rt = gen_rtx_raw_MEM (mode, addr);
346 /* This field is not cleared by the mere allocation of the rtx, so
348 MEM_ALIAS_SET (rt) = 0;
354 gen_rtx_SUBREG (mode, reg, offset)
355 enum machine_mode mode;
359 /* This is the most common failure type.
360 Catch it early so we can see who does it. */
361 if ((offset % GET_MODE_SIZE (mode)) != 0)
364 /* This check isn't usable right now because combine will
365 throw arbitrary crap like a CALL into a SUBREG in
366 gen_lowpart_for_combine so we must just eat it. */
368 /* Check for this too. */
369 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
372 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
375 /* Generate a SUBREG representing the least-significant part
376 * of REG if MODE is smaller than mode of REG, otherwise
377 * paradoxical SUBREG. */
379 gen_lowpart_SUBREG (mode, reg)
380 enum machine_mode mode;
383 enum machine_mode inmode;
385 inmode = GET_MODE (reg);
386 if (inmode == VOIDmode)
388 return gen_rtx_SUBREG (mode, reg,
389 subreg_lowpart_offset (mode, inmode));
392 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
394 ** This routine generates an RTX of the size specified by
395 ** <code>, which is an RTX code. The RTX structure is initialized
396 ** from the arguments <element1> through <elementn>, which are
397 ** interpreted according to the specific RTX type's format. The
398 ** special machine mode associated with the rtx (if any) is specified
401 ** gen_rtx can be invoked in a way which resembles the lisp-like
402 ** rtx it will generate. For example, the following rtx structure:
404 ** (plus:QI (mem:QI (reg:SI 1))
405 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
407 ** ...would be generated by the following C code:
409 ** gen_rtx (PLUS, QImode,
410 ** gen_rtx (MEM, QImode,
411 ** gen_rtx (REG, SImode, 1)),
412 ** gen_rtx (MEM, QImode,
413 ** gen_rtx (PLUS, SImode,
414 ** gen_rtx (REG, SImode, 2),
415 ** gen_rtx (REG, SImode, 3)))),
420 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
422 #ifndef ANSI_PROTOTYPES
424 enum machine_mode mode;
427 register int i; /* Array indices... */
428 register const char *fmt; /* Current rtx's format... */
429 register rtx rt_val; /* RTX to return to caller... */
433 #ifndef ANSI_PROTOTYPES
434 code = va_arg (p, enum rtx_code);
435 mode = va_arg (p, enum machine_mode);
441 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
446 rtx arg0 = va_arg (p, rtx);
447 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
448 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
449 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
454 rt_val = gen_rtx_REG (mode, va_arg (p, int));
458 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
462 rt_val = rtx_alloc (code); /* Allocate the storage space. */
463 rt_val->mode = mode; /* Store the machine mode... */
465 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
466 for (i = 0; i < GET_RTX_LENGTH (code); i++)
470 case '0': /* Unused field. */
473 case 'i': /* An integer? */
474 XINT (rt_val, i) = va_arg (p, int);
477 case 'w': /* A wide integer? */
478 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
481 case 's': /* A string? */
482 XSTR (rt_val, i) = va_arg (p, char *);
485 case 'e': /* An expression? */
486 case 'u': /* An insn? Same except when printing. */
487 XEXP (rt_val, i) = va_arg (p, rtx);
490 case 'E': /* An RTX vector? */
491 XVEC (rt_val, i) = va_arg (p, rtvec);
494 case 'b': /* A bitmap? */
495 XBITMAP (rt_val, i) = va_arg (p, bitmap);
498 case 't': /* A tree? */
499 XTREE (rt_val, i) = va_arg (p, tree);
513 /* gen_rtvec (n, [rt1, ..., rtn])
515 ** This routine creates an rtvec and stores within it the
516 ** pointers to rtx's which are its arguments.
521 gen_rtvec VPARAMS ((int n, ...))
523 #ifndef ANSI_PROTOTYPES
532 #ifndef ANSI_PROTOTYPES
537 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
539 vector = (rtx *) alloca (n * sizeof (rtx));
541 for (i = 0; i < n; i++)
542 vector[i] = va_arg (p, rtx);
545 return gen_rtvec_v (n, vector);
549 gen_rtvec_v (n, argp)
554 register rtvec rt_val;
557 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
559 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
561 for (i = 0; i < n; i++)
562 rt_val->elem[i] = *argp++;
568 /* Generate a REG rtx for a new pseudo register of mode MODE.
569 This pseudo is assigned the next sequential register number. */
573 enum machine_mode mode;
575 struct function *f = cfun;
578 /* Don't let anything called after initial flow analysis create new
583 if (generating_concat_p
584 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
585 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
587 /* For complex modes, don't make a single pseudo.
588 Instead, make a CONCAT of two pseudos.
589 This allows noncontiguous allocation of the real and imaginary parts,
590 which makes much better code. Besides, allocating DCmode
591 pseudos overstrains reload on some machines like the 386. */
592 rtx realpart, imagpart;
593 int size = GET_MODE_UNIT_SIZE (mode);
594 enum machine_mode partmode
595 = mode_for_size (size * BITS_PER_UNIT,
596 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
597 ? MODE_FLOAT : MODE_INT),
600 realpart = gen_reg_rtx (partmode);
601 imagpart = gen_reg_rtx (partmode);
602 return gen_rtx_CONCAT (mode, realpart, imagpart);
605 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
606 to have an element for this pseudo reg number. */
608 if (reg_rtx_no == f->emit->regno_pointer_align_length)
610 int old_size = f->emit->regno_pointer_align_length;
613 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
614 memset (new + old_size, 0, old_size);
615 f->emit->regno_pointer_align = (unsigned char *) new;
617 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
618 old_size * 2 * sizeof (rtx));
619 memset (new1 + old_size, 0, old_size * sizeof (rtx));
620 regno_reg_rtx = new1;
622 f->emit->regno_pointer_align_length = old_size * 2;
625 val = gen_raw_REG (mode, reg_rtx_no);
626 regno_reg_rtx[reg_rtx_no++] = val;
630 /* Identify REG (which may be a CONCAT) as a user register. */
636 if (GET_CODE (reg) == CONCAT)
638 REG_USERVAR_P (XEXP (reg, 0)) = 1;
639 REG_USERVAR_P (XEXP (reg, 1)) = 1;
641 else if (GET_CODE (reg) == REG)
642 REG_USERVAR_P (reg) = 1;
647 /* Identify REG as a probable pointer register and show its alignment
648 as ALIGN, if nonzero. */
651 mark_reg_pointer (reg, align)
655 if (! REG_POINTER (reg))
657 REG_POINTER (reg) = 1;
660 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
662 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
663 /* We can no-longer be sure just how aligned this pointer is */
664 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
667 /* Return 1 plus largest pseudo reg number used in the current function. */
675 /* Return 1 + the largest label number used so far in the current function. */
680 if (last_label_num && label_num == base_label_num)
681 return last_label_num;
685 /* Return first label number used in this function (if any were used). */
688 get_first_label_num ()
690 return first_label_num;
693 /* Return the final regno of X, which is a SUBREG of a hard
696 subreg_hard_regno (x, check_mode)
700 enum machine_mode mode = GET_MODE (x);
701 unsigned int byte_offset, base_regno, final_regno;
702 rtx reg = SUBREG_REG (x);
704 /* This is where we attempt to catch illegal subregs
705 created by the compiler. */
706 if (GET_CODE (x) != SUBREG
707 || GET_CODE (reg) != REG)
709 base_regno = REGNO (reg);
710 if (base_regno >= FIRST_PSEUDO_REGISTER)
712 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
715 /* Catch non-congruent offsets too. */
716 byte_offset = SUBREG_BYTE (x);
717 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
720 final_regno = subreg_regno (x);
725 /* Return a value representing some low-order bits of X, where the number
726 of low-order bits is given by MODE. Note that no conversion is done
727 between floating-point and fixed-point values, rather, the bit
728 representation is returned.
730 This function handles the cases in common between gen_lowpart, below,
731 and two variants in cse.c and combine.c. These are the cases that can
732 be safely handled at all points in the compilation.
734 If this is not a case we can handle, return 0. */
737 gen_lowpart_common (mode, x)
738 enum machine_mode mode;
741 int msize = GET_MODE_SIZE (mode);
742 int xsize = GET_MODE_SIZE (GET_MODE (x));
745 if (GET_MODE (x) == mode)
748 /* MODE must occupy no more words than the mode of X. */
749 if (GET_MODE (x) != VOIDmode
750 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
751 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
754 offset = subreg_lowpart_offset (mode, GET_MODE (x));
756 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
757 && (GET_MODE_CLASS (mode) == MODE_INT
758 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
760 /* If we are getting the low-order part of something that has been
761 sign- or zero-extended, we can either just use the object being
762 extended or make a narrower extension. If we want an even smaller
763 piece than the size of the object being extended, call ourselves
766 This case is used mostly by combine and cse. */
768 if (GET_MODE (XEXP (x, 0)) == mode)
770 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
771 return gen_lowpart_common (mode, XEXP (x, 0));
772 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
773 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
775 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG || GET_CODE (x) == CONCAT)
776 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
777 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
778 from the low-order part of the constant. */
779 else if ((GET_MODE_CLASS (mode) == MODE_INT
780 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
781 && GET_MODE (x) == VOIDmode
782 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
784 /* If MODE is twice the host word size, X is already the desired
785 representation. Otherwise, if MODE is wider than a word, we can't
786 do this. If MODE is exactly a word, return just one CONST_INT. */
788 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
790 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
792 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
793 return (GET_CODE (x) == CONST_INT ? x
794 : GEN_INT (CONST_DOUBLE_LOW (x)));
797 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
798 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
799 : CONST_DOUBLE_LOW (x));
801 /* Sign extend to HOST_WIDE_INT. */
802 val = trunc_int_for_mode (val, mode);
804 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
809 #ifndef REAL_ARITHMETIC
810 /* If X is an integral constant but we want it in floating-point, it
811 must be the case that we have a union of an integer and a floating-point
812 value. If the machine-parameters allow it, simulate that union here
813 and return the result. The two-word and single-word cases are
816 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
817 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
818 || flag_pretend_float)
819 && GET_MODE_CLASS (mode) == MODE_FLOAT
820 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
821 && GET_CODE (x) == CONST_INT
822 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
824 union {HOST_WIDE_INT i; float d; } u;
827 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
829 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
830 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
831 || flag_pretend_float)
832 && GET_MODE_CLASS (mode) == MODE_FLOAT
833 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
834 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
835 && GET_MODE (x) == VOIDmode
836 && (sizeof (double) * HOST_BITS_PER_CHAR
837 == 2 * HOST_BITS_PER_WIDE_INT))
839 union {HOST_WIDE_INT i[2]; double d; } u;
840 HOST_WIDE_INT low, high;
842 if (GET_CODE (x) == CONST_INT)
843 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
845 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
847 #ifdef HOST_WORDS_BIG_ENDIAN
848 u.i[0] = high, u.i[1] = low;
850 u.i[0] = low, u.i[1] = high;
853 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
856 /* Similarly, if this is converting a floating-point value into a
857 single-word integer. Only do this is the host and target parameters are
860 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
861 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
862 || flag_pretend_float)
863 && (GET_MODE_CLASS (mode) == MODE_INT
864 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
865 && GET_CODE (x) == CONST_DOUBLE
866 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
867 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
868 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
870 /* Similarly, if this is converting a floating-point value into a
871 two-word integer, we can do this one word at a time and make an
872 integer. Only do this is the host and target parameters are
875 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
876 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
877 || flag_pretend_float)
878 && (GET_MODE_CLASS (mode) == MODE_INT
879 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
880 && GET_CODE (x) == CONST_DOUBLE
881 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
882 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
884 rtx lowpart, highpart;
886 lowpart = constant_subword (x,
887 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
889 highpart = constant_subword (x,
890 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
892 if (lowpart && GET_CODE (lowpart) == CONST_INT
893 && highpart && GET_CODE (highpart) == CONST_INT)
894 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
896 #else /* ifndef REAL_ARITHMETIC */
898 /* When we have a FP emulator, we can handle all conversions between
899 FP and integer operands. This simplifies reload because it
900 doesn't have to deal with constructs like (subreg:DI
901 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
903 else if (mode == SFmode
904 && GET_CODE (x) == CONST_INT)
910 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
911 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
913 else if (mode == DFmode
914 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
915 && GET_MODE (x) == VOIDmode)
919 HOST_WIDE_INT low, high;
921 if (GET_CODE (x) == CONST_INT)
924 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
928 low = CONST_DOUBLE_LOW (x);
929 high = CONST_DOUBLE_HIGH (x);
932 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
934 if (WORDS_BIG_ENDIAN)
935 i[0] = high, i[1] = low;
937 i[0] = low, i[1] = high;
939 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
940 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
942 else if ((GET_MODE_CLASS (mode) == MODE_INT
943 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
944 && GET_CODE (x) == CONST_DOUBLE
945 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
948 long i[4]; /* Only the low 32 bits of each 'long' are used. */
949 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
951 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
952 switch (GET_MODE (x))
955 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
959 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
961 #if LONG_DOUBLE_TYPE_SIZE == 96
963 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
967 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
974 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
976 #if HOST_BITS_PER_WIDE_INT == 32
977 return immed_double_const (i[endian], i[1 - endian], mode);
982 if (HOST_BITS_PER_WIDE_INT != 64)
985 for (c = 0; c < 4; c++)
988 switch (GET_MODE (x))
992 return immed_double_const (((unsigned long) i[endian]) |
993 (((HOST_WIDE_INT) i[1-endian]) << 32),
996 return immed_double_const (((unsigned long) i[endian*3]) |
997 (((HOST_WIDE_INT) i[1+endian]) << 32),
998 ((unsigned long) i[2-endian]) |
999 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1005 #endif /* ifndef REAL_ARITHMETIC */
1007 /* Otherwise, we can't do this. */
1011 /* Return the real part (which has mode MODE) of a complex value X.
1012 This always comes at the low address in memory. */
1015 gen_realpart (mode, x)
1016 enum machine_mode mode;
1019 if (WORDS_BIG_ENDIAN
1020 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1022 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1024 ("Can't access real part of complex value in hard register");
1025 else if (WORDS_BIG_ENDIAN)
1026 return gen_highpart (mode, x);
1028 return gen_lowpart (mode, x);
1031 /* Return the imaginary part (which has mode MODE) of a complex value X.
1032 This always comes at the high address in memory. */
1035 gen_imagpart (mode, x)
1036 enum machine_mode mode;
1039 if (WORDS_BIG_ENDIAN)
1040 return gen_lowpart (mode, x);
1041 else if (! WORDS_BIG_ENDIAN
1042 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1044 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1046 ("can't access imaginary part of complex value in hard register");
1048 return gen_highpart (mode, x);
1051 /* Return 1 iff X, assumed to be a SUBREG,
1052 refers to the real part of the complex value in its containing reg.
1053 Complex values are always stored with the real part in the first word,
1054 regardless of WORDS_BIG_ENDIAN. */
1057 subreg_realpart_p (x)
1060 if (GET_CODE (x) != SUBREG)
1063 return ((unsigned int) SUBREG_BYTE (x)
1064 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1067 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1068 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1069 least-significant part of X.
1070 MODE specifies how big a part of X to return;
1071 it usually should not be larger than a word.
1072 If X is a MEM whose address is a QUEUED, the value may be so also. */
1075 gen_lowpart (mode, x)
1076 enum machine_mode mode;
1079 rtx result = gen_lowpart_common (mode, x);
1083 else if (GET_CODE (x) == REG)
1085 /* Must be a hard reg that's not valid in MODE. */
1086 result = gen_lowpart_common (mode, copy_to_reg (x));
1091 else if (GET_CODE (x) == MEM)
1093 /* The only additional case we can do is MEM. */
1094 register int offset = 0;
1095 if (WORDS_BIG_ENDIAN)
1096 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1097 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1099 if (BYTES_BIG_ENDIAN)
1100 /* Adjust the address so that the address-after-the-data
1102 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1103 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1105 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1107 else if (GET_CODE (x) == ADDRESSOF)
1108 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1113 /* Like `gen_lowpart', but refer to the most significant part.
1114 This is used to access the imaginary part of a complex number. */
1117 gen_highpart (mode, x)
1118 enum machine_mode mode;
1121 unsigned int msize = GET_MODE_SIZE (mode);
1124 /* This case loses if X is a subreg. To catch bugs early,
1125 complain if an invalid MODE is used even in other cases. */
1126 if (msize > UNITS_PER_WORD
1127 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1130 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1131 subreg_highpart_offset (mode, GET_MODE (x)));
1136 /* Return offset in bytes to get OUTERMODE low part
1137 of the value in mode INNERMODE stored in memory in target format. */
1140 subreg_lowpart_offset (outermode, innermode)
1141 enum machine_mode outermode, innermode;
1143 unsigned int offset = 0;
1144 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1148 if (WORDS_BIG_ENDIAN)
1149 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1150 if (BYTES_BIG_ENDIAN)
1151 offset += difference % UNITS_PER_WORD;
1157 /* Return offset in bytes to get OUTERMODE high part
1158 of the value in mode INNERMODE stored in memory in target format. */
1160 subreg_highpart_offset (outermode, innermode)
1161 enum machine_mode outermode, innermode;
1163 unsigned int offset = 0;
1164 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1166 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1171 if (! WORDS_BIG_ENDIAN)
1172 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1173 if (! BYTES_BIG_ENDIAN)
1174 offset += difference % UNITS_PER_WORD;
1180 /* Return 1 iff X, assumed to be a SUBREG,
1181 refers to the least significant part of its containing reg.
1182 If X is not a SUBREG, always return 1 (it is its own low part!). */
1185 subreg_lowpart_p (x)
1188 if (GET_CODE (x) != SUBREG)
1190 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1193 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1194 == SUBREG_BYTE (x));
1198 /* Helper routine for all the constant cases of operand_subword.
1199 Some places invoke this directly. */
1202 constant_subword (op, offset, mode)
1205 enum machine_mode mode;
1207 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1210 /* If OP is already an integer word, return it. */
1211 if (GET_MODE_CLASS (mode) == MODE_INT
1212 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1215 #ifdef REAL_ARITHMETIC
1216 /* The output is some bits, the width of the target machine's word.
1217 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1219 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1220 && GET_MODE_CLASS (mode) == MODE_FLOAT
1221 && GET_MODE_BITSIZE (mode) == 64
1222 && GET_CODE (op) == CONST_DOUBLE)
1227 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1228 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1230 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1231 which the words are written depends on the word endianness.
1232 ??? This is a potential portability problem and should
1233 be fixed at some point.
1235 We must excercise caution with the sign bit. By definition there
1236 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1237 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1238 So we explicitly mask and sign-extend as necessary. */
1239 if (BITS_PER_WORD == 32)
1242 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1243 return GEN_INT (val);
1245 #if HOST_BITS_PER_WIDE_INT >= 64
1246 else if (BITS_PER_WORD >= 64 && offset == 0)
1248 val = k[! WORDS_BIG_ENDIAN];
1249 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1250 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1251 return GEN_INT (val);
1254 else if (BITS_PER_WORD == 16)
1256 val = k[offset >> 1];
1257 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1259 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1260 return GEN_INT (val);
1265 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1266 && GET_MODE_CLASS (mode) == MODE_FLOAT
1267 && GET_MODE_BITSIZE (mode) > 64
1268 && GET_CODE (op) == CONST_DOUBLE)
1273 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1274 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1276 if (BITS_PER_WORD == 32)
1279 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1280 return GEN_INT (val);
1282 #if HOST_BITS_PER_WIDE_INT >= 64
1283 else if (BITS_PER_WORD >= 64 && offset <= 1)
1285 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1286 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1287 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1288 return GEN_INT (val);
1294 #else /* no REAL_ARITHMETIC */
1295 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1296 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1297 || flag_pretend_float)
1298 && GET_MODE_CLASS (mode) == MODE_FLOAT
1299 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1300 && GET_CODE (op) == CONST_DOUBLE)
1302 /* The constant is stored in the host's word-ordering,
1303 but we want to access it in the target's word-ordering. Some
1304 compilers don't like a conditional inside macro args, so we have two
1305 copies of the return. */
1306 #ifdef HOST_WORDS_BIG_ENDIAN
1307 return GEN_INT (offset == WORDS_BIG_ENDIAN
1308 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1310 return GEN_INT (offset != WORDS_BIG_ENDIAN
1311 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1314 #endif /* no REAL_ARITHMETIC */
1316 /* Single word float is a little harder, since single- and double-word
1317 values often do not have the same high-order bits. We have already
1318 verified that we want the only defined word of the single-word value. */
1319 #ifdef REAL_ARITHMETIC
1320 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1321 && GET_MODE_BITSIZE (mode) == 32
1322 && GET_CODE (op) == CONST_DOUBLE)
1327 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1328 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1330 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1332 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1334 if (BITS_PER_WORD == 16)
1336 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1338 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1341 return GEN_INT (val);
1344 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1345 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1346 || flag_pretend_float)
1347 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1348 && GET_MODE_CLASS (mode) == MODE_FLOAT
1349 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1350 && GET_CODE (op) == CONST_DOUBLE)
1353 union {float f; HOST_WIDE_INT i; } u;
1355 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1358 return GEN_INT (u.i);
1360 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1361 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1362 || flag_pretend_float)
1363 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1364 && GET_MODE_CLASS (mode) == MODE_FLOAT
1365 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1366 && GET_CODE (op) == CONST_DOUBLE)
1369 union {double d; HOST_WIDE_INT i; } u;
1371 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1374 return GEN_INT (u.i);
1376 #endif /* no REAL_ARITHMETIC */
1378 /* The only remaining cases that we can handle are integers.
1379 Convert to proper endianness now since these cases need it.
1380 At this point, offset == 0 means the low-order word.
1382 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1383 in general. However, if OP is (const_int 0), we can just return
1386 if (op == const0_rtx)
1389 if (GET_MODE_CLASS (mode) != MODE_INT
1390 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1391 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1394 if (WORDS_BIG_ENDIAN)
1395 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1397 /* Find out which word on the host machine this value is in and get
1398 it from the constant. */
1399 val = (offset / size_ratio == 0
1400 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1401 : (GET_CODE (op) == CONST_INT
1402 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1404 /* Get the value we want into the low bits of val. */
1405 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1406 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1408 val = trunc_int_for_mode (val, word_mode);
1410 return GEN_INT (val);
1413 /* Return subword OFFSET of operand OP.
1414 The word number, OFFSET, is interpreted as the word number starting
1415 at the low-order address. OFFSET 0 is the low-order word if not
1416 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1418 If we cannot extract the required word, we return zero. Otherwise,
1419 an rtx corresponding to the requested word will be returned.
1421 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1422 reload has completed, a valid address will always be returned. After
1423 reload, if a valid address cannot be returned, we return zero.
1425 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1426 it is the responsibility of the caller.
1428 MODE is the mode of OP in case it is a CONST_INT.
1430 ??? This is still rather broken for some cases. The problem for the
1431 moment is that all callers of this thing provide no 'goal mode' to
1432 tell us to work with. This exists because all callers were written
1433 in a word based SUBREG world.
1434 Now use of this function can be deprecated by simplify_subreg in most
1439 operand_subword (op, offset, validate_address, mode)
1441 unsigned int offset;
1442 int validate_address;
1443 enum machine_mode mode;
1446 if (mode == VOIDmode)
1447 mode = GET_MODE (op);
1449 if (mode == VOIDmode)
1452 /* If OP is narrower than a word, fail. */
1454 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1457 /* If we want a word outside OP, return zero. */
1459 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1462 /* Form a new MEM at the requested address. */
1463 if (GET_CODE (op) == MEM)
1465 rtx addr = plus_constant (XEXP (op, 0), (offset * UNITS_PER_WORD));
1468 if (validate_address)
1470 if (reload_completed)
1472 if (! strict_memory_address_p (word_mode, addr))
1476 addr = memory_address (word_mode, addr);
1479 new = gen_rtx_MEM (word_mode, addr);
1480 MEM_COPY_ATTRIBUTES (new, op);
1484 /* Rest can be handled by simplify_subreg. */
1485 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1488 /* Similar to `operand_subword', but never return 0. If we can't extract
1489 the required subword, put OP into a register and try again. If that fails,
1490 abort. We always validate the address in this case.
1492 MODE is the mode of OP, in case it is CONST_INT. */
1495 operand_subword_force (op, offset, mode)
1497 unsigned int offset;
1498 enum machine_mode mode;
1500 rtx result = operand_subword (op, offset, 1, mode);
1505 if (mode != BLKmode && mode != VOIDmode)
1507 /* If this is a register which can not be accessed by words, copy it
1508 to a pseudo register. */
1509 if (GET_CODE (op) == REG)
1510 op = copy_to_reg (op);
1512 op = force_reg (mode, op);
1515 result = operand_subword (op, offset, 1, mode);
1522 /* Given a compare instruction, swap the operands.
1523 A test instruction is changed into a compare of 0 against the operand. */
1526 reverse_comparison (insn)
1529 rtx body = PATTERN (insn);
1532 if (GET_CODE (body) == SET)
1533 comp = SET_SRC (body);
1535 comp = SET_SRC (XVECEXP (body, 0, 0));
1537 if (GET_CODE (comp) == COMPARE)
1539 rtx op0 = XEXP (comp, 0);
1540 rtx op1 = XEXP (comp, 1);
1541 XEXP (comp, 0) = op1;
1542 XEXP (comp, 1) = op0;
1546 rtx new = gen_rtx_COMPARE (VOIDmode,
1547 CONST0_RTX (GET_MODE (comp)), comp);
1548 if (GET_CODE (body) == SET)
1549 SET_SRC (body) = new;
1551 SET_SRC (XVECEXP (body, 0, 0)) = new;
1555 /* Return a memory reference like MEMREF, but with its mode changed
1556 to MODE and its address changed to ADDR.
1557 (VOIDmode means don't change the mode.
1558 NULL for ADDR means don't change the address.) */
1561 change_address (memref, mode, addr)
1563 enum machine_mode mode;
1568 if (GET_CODE (memref) != MEM)
1570 if (mode == VOIDmode)
1571 mode = GET_MODE (memref);
1573 addr = XEXP (memref, 0);
1575 /* If reload is in progress or has completed, ADDR must be valid.
1576 Otherwise, we can call memory_address to make it valid. */
1577 if (reload_completed || reload_in_progress)
1579 if (! memory_address_p (mode, addr))
1583 addr = memory_address (mode, addr);
1585 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1588 new = gen_rtx_MEM (mode, addr);
1589 MEM_COPY_ATTRIBUTES (new, memref);
1593 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1600 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1601 NULL_RTX, label_num++, NULL, NULL);
1603 LABEL_NUSES (label) = 0;
1604 LABEL_ALTERNATE_NAME (label) = NULL;
1608 /* For procedure integration. */
1610 /* Install new pointers to the first and last insns in the chain.
1611 Also, set cur_insn_uid to one higher than the last in use.
1612 Used for an inline-procedure after copying the insn chain. */
1615 set_new_first_and_last_insn (first, last)
1624 for (insn = first; insn; insn = NEXT_INSN (insn))
1625 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1630 /* Set the range of label numbers found in the current function.
1631 This is used when belatedly compiling an inline function. */
1634 set_new_first_and_last_label_num (first, last)
1637 base_label_num = label_num;
1638 first_label_num = first;
1639 last_label_num = last;
1642 /* Set the last label number found in the current function.
1643 This is used when belatedly compiling an inline function. */
1646 set_new_last_label_num (last)
1649 base_label_num = label_num;
1650 last_label_num = last;
1653 /* Restore all variables describing the current status from the structure *P.
1654 This is used after a nested function. */
1657 restore_emit_status (p)
1658 struct function *p ATTRIBUTE_UNUSED;
1661 clear_emit_caches ();
1664 /* Clear out all parts of the state in F that can safely be discarded
1665 after the function has been compiled, to let garbage collection
1666 reclaim the memory. */
1669 free_emit_status (f)
1672 free (f->emit->x_regno_reg_rtx);
1673 free (f->emit->regno_pointer_align);
1678 /* Go through all the RTL insn bodies and copy any invalid shared
1679 structure. This routine should only be called once. */
1682 unshare_all_rtl (fndecl, insn)
1688 /* Make sure that virtual parameters are not shared. */
1689 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1690 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
1692 /* Make sure that virtual stack slots are not shared. */
1693 unshare_all_decls (DECL_INITIAL (fndecl));
1695 /* Unshare just about everything else. */
1696 unshare_all_rtl_1 (insn);
1698 /* Make sure the addresses of stack slots found outside the insn chain
1699 (such as, in DECL_RTL of a variable) are not shared
1700 with the insn chain.
1702 This special care is necessary when the stack slot MEM does not
1703 actually appear in the insn chain. If it does appear, its address
1704 is unshared from all else at that point. */
1705 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1708 /* Go through all the RTL insn bodies and copy any invalid shared
1709 structure, again. This is a fairly expensive thing to do so it
1710 should be done sparingly. */
1713 unshare_all_rtl_again (insn)
1719 for (p = insn; p; p = NEXT_INSN (p))
1722 reset_used_flags (PATTERN (p));
1723 reset_used_flags (REG_NOTES (p));
1724 reset_used_flags (LOG_LINKS (p));
1727 /* Make sure that virtual stack slots are not shared. */
1728 reset_used_decls (DECL_INITIAL (cfun->decl));
1730 /* Make sure that virtual parameters are not shared. */
1731 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1732 reset_used_flags (DECL_RTL (decl));
1734 reset_used_flags (stack_slot_list);
1736 unshare_all_rtl (cfun->decl, insn);
1739 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1740 Assumes the mark bits are cleared at entry. */
1743 unshare_all_rtl_1 (insn)
1746 for (; insn; insn = NEXT_INSN (insn))
1749 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1750 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1751 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1755 /* Go through all virtual stack slots of a function and copy any
1756 shared structure. */
1758 unshare_all_decls (blk)
1763 /* Copy shared decls. */
1764 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1765 if (DECL_RTL_SET_P (t))
1766 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
1768 /* Now process sub-blocks. */
1769 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1770 unshare_all_decls (t);
1773 /* Go through all virtual stack slots of a function and mark them as
1776 reset_used_decls (blk)
1782 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1783 if (DECL_RTL_SET_P (t))
1784 reset_used_flags (DECL_RTL (t));
1786 /* Now process sub-blocks. */
1787 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1788 reset_used_decls (t);
1791 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1792 Recursively does the same for subexpressions. */
1795 copy_rtx_if_shared (orig)
1798 register rtx x = orig;
1800 register enum rtx_code code;
1801 register const char *format_ptr;
1807 code = GET_CODE (x);
1809 /* These types may be freely shared. */
1822 /* SCRATCH must be shared because they represent distinct values. */
1826 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1827 a LABEL_REF, it isn't sharable. */
1828 if (GET_CODE (XEXP (x, 0)) == PLUS
1829 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1830 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1839 /* The chain of insns is not being copied. */
1843 /* A MEM is allowed to be shared if its address is constant.
1845 We used to allow sharing of MEMs which referenced
1846 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1847 that can lose. instantiate_virtual_regs will not unshare
1848 the MEMs, and combine may change the structure of the address
1849 because it looks safe and profitable in one context, but
1850 in some other context it creates unrecognizable RTL. */
1851 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1860 /* This rtx may not be shared. If it has already been seen,
1861 replace it with a copy of itself. */
1867 copy = rtx_alloc (code);
1869 (sizeof (*copy) - sizeof (copy->fld)
1870 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1876 /* Now scan the subexpressions recursively.
1877 We can store any replaced subexpressions directly into X
1878 since we know X is not shared! Any vectors in X
1879 must be copied if X was copied. */
1881 format_ptr = GET_RTX_FORMAT (code);
1883 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1885 switch (*format_ptr++)
1888 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1892 if (XVEC (x, i) != NULL)
1895 int len = XVECLEN (x, i);
1897 if (copied && len > 0)
1898 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1899 for (j = 0; j < len; j++)
1900 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1908 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1909 to look for shared sub-parts. */
1912 reset_used_flags (x)
1916 register enum rtx_code code;
1917 register const char *format_ptr;
1922 code = GET_CODE (x);
1924 /* These types may be freely shared so we needn't do any resetting
1945 /* The chain of insns is not being copied. */
1954 format_ptr = GET_RTX_FORMAT (code);
1955 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1957 switch (*format_ptr++)
1960 reset_used_flags (XEXP (x, i));
1964 for (j = 0; j < XVECLEN (x, i); j++)
1965 reset_used_flags (XVECEXP (x, i, j));
1971 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1972 Return X or the rtx for the pseudo reg the value of X was copied into.
1973 OTHER must be valid as a SET_DEST. */
1976 make_safe_from (x, other)
1980 switch (GET_CODE (other))
1983 other = SUBREG_REG (other);
1985 case STRICT_LOW_PART:
1988 other = XEXP (other, 0);
1994 if ((GET_CODE (other) == MEM
1996 && GET_CODE (x) != REG
1997 && GET_CODE (x) != SUBREG)
1998 || (GET_CODE (other) == REG
1999 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2000 || reg_mentioned_p (other, x))))
2002 rtx temp = gen_reg_rtx (GET_MODE (x));
2003 emit_move_insn (temp, x);
2009 /* Emission of insns (adding them to the doubly-linked list). */
2011 /* Return the first insn of the current sequence or current function. */
2019 /* Return the last insn emitted in current sequence or current function. */
2027 /* Specify a new insn as the last in the chain. */
2030 set_last_insn (insn)
2033 if (NEXT_INSN (insn) != 0)
2038 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2041 get_last_insn_anywhere ()
2043 struct sequence_stack *stack;
2046 for (stack = seq_stack; stack; stack = stack->next)
2047 if (stack->last != 0)
2052 /* Return a number larger than any instruction's uid in this function. */
2057 return cur_insn_uid;
2060 /* Renumber instructions so that no instruction UIDs are wasted. */
2063 renumber_insns (stream)
2068 /* If we're not supposed to renumber instructions, don't. */
2069 if (!flag_renumber_insns)
2072 /* If there aren't that many instructions, then it's not really
2073 worth renumbering them. */
2074 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2079 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2082 fprintf (stream, "Renumbering insn %d to %d\n",
2083 INSN_UID (insn), cur_insn_uid);
2084 INSN_UID (insn) = cur_insn_uid++;
2088 /* Return the next insn. If it is a SEQUENCE, return the first insn
2097 insn = NEXT_INSN (insn);
2098 if (insn && GET_CODE (insn) == INSN
2099 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2100 insn = XVECEXP (PATTERN (insn), 0, 0);
2106 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2110 previous_insn (insn)
2115 insn = PREV_INSN (insn);
2116 if (insn && GET_CODE (insn) == INSN
2117 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2118 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2124 /* Return the next insn after INSN that is not a NOTE. This routine does not
2125 look inside SEQUENCEs. */
2128 next_nonnote_insn (insn)
2133 insn = NEXT_INSN (insn);
2134 if (insn == 0 || GET_CODE (insn) != NOTE)
2141 /* Return the previous insn before INSN that is not a NOTE. This routine does
2142 not look inside SEQUENCEs. */
2145 prev_nonnote_insn (insn)
2150 insn = PREV_INSN (insn);
2151 if (insn == 0 || GET_CODE (insn) != NOTE)
2158 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2159 or 0, if there is none. This routine does not look inside
2163 next_real_insn (insn)
2168 insn = NEXT_INSN (insn);
2169 if (insn == 0 || GET_CODE (insn) == INSN
2170 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2177 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2178 or 0, if there is none. This routine does not look inside
2182 prev_real_insn (insn)
2187 insn = PREV_INSN (insn);
2188 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2189 || GET_CODE (insn) == JUMP_INSN)
2196 /* Find the next insn after INSN that really does something. This routine
2197 does not look inside SEQUENCEs. Until reload has completed, this is the
2198 same as next_real_insn. */
2201 active_insn_p (insn)
2204 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2205 || (GET_CODE (insn) == INSN
2206 && (! reload_completed
2207 || (GET_CODE (PATTERN (insn)) != USE
2208 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2212 next_active_insn (insn)
2217 insn = NEXT_INSN (insn);
2218 if (insn == 0 || active_insn_p (insn))
2225 /* Find the last insn before INSN that really does something. This routine
2226 does not look inside SEQUENCEs. Until reload has completed, this is the
2227 same as prev_real_insn. */
2230 prev_active_insn (insn)
2235 insn = PREV_INSN (insn);
2236 if (insn == 0 || active_insn_p (insn))
2243 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2251 insn = NEXT_INSN (insn);
2252 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2259 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2267 insn = PREV_INSN (insn);
2268 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2276 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2277 and REG_CC_USER notes so we can find it. */
2280 link_cc0_insns (insn)
2283 rtx user = next_nonnote_insn (insn);
2285 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2286 user = XVECEXP (PATTERN (user), 0, 0);
2288 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2290 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2293 /* Return the next insn that uses CC0 after INSN, which is assumed to
2294 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2295 applied to the result of this function should yield INSN).
2297 Normally, this is simply the next insn. However, if a REG_CC_USER note
2298 is present, it contains the insn that uses CC0.
2300 Return 0 if we can't find the insn. */
2303 next_cc0_user (insn)
2306 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2309 return XEXP (note, 0);
2311 insn = next_nonnote_insn (insn);
2312 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2313 insn = XVECEXP (PATTERN (insn), 0, 0);
2315 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2321 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2322 note, it is the previous insn. */
2325 prev_cc0_setter (insn)
2328 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2331 return XEXP (note, 0);
2333 insn = prev_nonnote_insn (insn);
2334 if (! sets_cc0_p (PATTERN (insn)))
2341 /* Increment the label uses for all labels present in rtx. */
2347 register enum rtx_code code;
2349 register const char *fmt;
2351 code = GET_CODE (x);
2352 if (code == LABEL_REF)
2353 LABEL_NUSES (XEXP (x, 0))++;
2355 fmt = GET_RTX_FORMAT (code);
2356 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2359 mark_label_nuses (XEXP (x, i));
2360 else if (fmt[i] == 'E')
2361 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2362 mark_label_nuses (XVECEXP (x, i, j));
2367 /* Try splitting insns that can be split for better scheduling.
2368 PAT is the pattern which might split.
2369 TRIAL is the insn providing PAT.
2370 LAST is non-zero if we should return the last insn of the sequence produced.
2372 If this routine succeeds in splitting, it returns the first or last
2373 replacement insn depending on the value of LAST. Otherwise, it
2374 returns TRIAL. If the insn to be returned can be split, it will be. */
2377 try_split (pat, trial, last)
2381 rtx before = PREV_INSN (trial);
2382 rtx after = NEXT_INSN (trial);
2383 rtx seq = split_insns (pat, trial);
2384 int has_barrier = 0;
2387 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2388 We may need to handle this specially. */
2389 if (after && GET_CODE (after) == BARRIER)
2392 after = NEXT_INSN (after);
2397 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2398 The latter case will normally arise only when being done so that
2399 it, in turn, will be split (SFmode on the 29k is an example). */
2400 if (GET_CODE (seq) == SEQUENCE)
2405 /* Avoid infinite loop if any insn of the result matches
2406 the original pattern. */
2407 for (i = 0; i < XVECLEN (seq, 0); i++)
2408 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2409 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2413 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2414 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2415 mark_jump_label (PATTERN (XVECEXP (seq, 0, i)),
2416 XVECEXP (seq, 0, i), 0, 0);
2418 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2419 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2420 if (GET_CODE (trial) == CALL_INSN)
2421 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2422 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2423 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2424 = CALL_INSN_FUNCTION_USAGE (trial);
2426 /* Copy EH notes. */
2427 if ((eh_note = find_reg_note (trial, REG_EH_REGION, NULL_RTX)))
2428 for (i = 0; i < XVECLEN (seq, 0); i++)
2430 rtx insn = XVECEXP (seq, 0, i);
2431 if (GET_CODE (insn) == CALL_INSN
2432 || (flag_non_call_exceptions
2433 && may_trap_p (PATTERN (insn))))
2435 = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (eh_note, 0),
2439 /* If there are LABELS inside the split insns increment the
2440 usage count so we don't delete the label. */
2441 if (GET_CODE (trial) == INSN)
2442 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2443 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2444 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2446 tem = emit_insn_after (seq, before);
2448 delete_insn (trial);
2450 emit_barrier_after (tem);
2452 /* Recursively call try_split for each new insn created; by the
2453 time control returns here that insn will be fully split, so
2454 set LAST and continue from the insn after the one returned.
2455 We can't use next_active_insn here since AFTER may be a note.
2456 Ignore deleted insns, which can be occur if not optimizing. */
2457 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2458 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2459 tem = try_split (PATTERN (tem), tem, 1);
2461 /* Avoid infinite loop if the result matches the original pattern. */
2462 else if (rtx_equal_p (seq, pat))
2466 PATTERN (trial) = seq;
2467 INSN_CODE (trial) = -1;
2468 try_split (seq, trial, last);
2471 /* Return either the first or the last insn, depending on which was
2474 ? (after ? prev_active_insn (after) : last_insn)
2475 : next_active_insn (before);
2481 /* Make and return an INSN rtx, initializing all its slots.
2482 Store PATTERN in the pattern slots. */
2485 make_insn_raw (pattern)
2490 insn = rtx_alloc (INSN);
2492 INSN_UID (insn) = cur_insn_uid++;
2493 PATTERN (insn) = pattern;
2494 INSN_CODE (insn) = -1;
2495 LOG_LINKS (insn) = NULL;
2496 REG_NOTES (insn) = NULL;
2498 #ifdef ENABLE_RTL_CHECKING
2501 && (returnjump_p (insn)
2502 || (GET_CODE (insn) == SET
2503 && SET_DEST (insn) == pc_rtx)))
2505 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2513 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2516 make_jump_insn_raw (pattern)
2521 insn = rtx_alloc (JUMP_INSN);
2522 INSN_UID (insn) = cur_insn_uid++;
2524 PATTERN (insn) = pattern;
2525 INSN_CODE (insn) = -1;
2526 LOG_LINKS (insn) = NULL;
2527 REG_NOTES (insn) = NULL;
2528 JUMP_LABEL (insn) = NULL;
2533 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2536 make_call_insn_raw (pattern)
2541 insn = rtx_alloc (CALL_INSN);
2542 INSN_UID (insn) = cur_insn_uid++;
2544 PATTERN (insn) = pattern;
2545 INSN_CODE (insn) = -1;
2546 LOG_LINKS (insn) = NULL;
2547 REG_NOTES (insn) = NULL;
2548 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2553 /* Add INSN to the end of the doubly-linked list.
2554 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2560 PREV_INSN (insn) = last_insn;
2561 NEXT_INSN (insn) = 0;
2563 if (NULL != last_insn)
2564 NEXT_INSN (last_insn) = insn;
2566 if (NULL == first_insn)
2572 /* Add INSN into the doubly-linked list after insn AFTER. This and
2573 the next should be the only functions called to insert an insn once
2574 delay slots have been filled since only they know how to update a
2578 add_insn_after (insn, after)
2581 rtx next = NEXT_INSN (after);
2583 if (optimize && INSN_DELETED_P (after))
2586 NEXT_INSN (insn) = next;
2587 PREV_INSN (insn) = after;
2591 PREV_INSN (next) = insn;
2592 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2593 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2595 else if (last_insn == after)
2599 struct sequence_stack *stack = seq_stack;
2600 /* Scan all pending sequences too. */
2601 for (; stack; stack = stack->next)
2602 if (after == stack->last)
2612 NEXT_INSN (after) = insn;
2613 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2615 rtx sequence = PATTERN (after);
2616 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2620 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2621 the previous should be the only functions called to insert an insn once
2622 delay slots have been filled since only they know how to update a
2626 add_insn_before (insn, before)
2629 rtx prev = PREV_INSN (before);
2631 if (optimize && INSN_DELETED_P (before))
2634 PREV_INSN (insn) = prev;
2635 NEXT_INSN (insn) = before;
2639 NEXT_INSN (prev) = insn;
2640 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2642 rtx sequence = PATTERN (prev);
2643 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2646 else if (first_insn == before)
2650 struct sequence_stack *stack = seq_stack;
2651 /* Scan all pending sequences too. */
2652 for (; stack; stack = stack->next)
2653 if (before == stack->first)
2655 stack->first = insn;
2663 PREV_INSN (before) = insn;
2664 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2665 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2668 /* Remove an insn from its doubly-linked list. This function knows how
2669 to handle sequences. */
2674 rtx next = NEXT_INSN (insn);
2675 rtx prev = PREV_INSN (insn);
2678 NEXT_INSN (prev) = next;
2679 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2681 rtx sequence = PATTERN (prev);
2682 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2685 else if (first_insn == insn)
2689 struct sequence_stack *stack = seq_stack;
2690 /* Scan all pending sequences too. */
2691 for (; stack; stack = stack->next)
2692 if (insn == stack->first)
2694 stack->first = next;
2704 PREV_INSN (next) = prev;
2705 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2706 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2708 else if (last_insn == insn)
2712 struct sequence_stack *stack = seq_stack;
2713 /* Scan all pending sequences too. */
2714 for (; stack; stack = stack->next)
2715 if (insn == stack->last)
2726 /* Delete all insns made since FROM.
2727 FROM becomes the new last instruction. */
2730 delete_insns_since (from)
2736 NEXT_INSN (from) = 0;
2740 /* This function is deprecated, please use sequences instead.
2742 Move a consecutive bunch of insns to a different place in the chain.
2743 The insns to be moved are those between FROM and TO.
2744 They are moved to a new position after the insn AFTER.
2745 AFTER must not be FROM or TO or any insn in between.
2747 This function does not know about SEQUENCEs and hence should not be
2748 called after delay-slot filling has been done. */
2751 reorder_insns (from, to, after)
2752 rtx from, to, after;
2754 /* Splice this bunch out of where it is now. */
2755 if (PREV_INSN (from))
2756 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2758 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2759 if (last_insn == to)
2760 last_insn = PREV_INSN (from);
2761 if (first_insn == from)
2762 first_insn = NEXT_INSN (to);
2764 /* Make the new neighbors point to it and it to them. */
2765 if (NEXT_INSN (after))
2766 PREV_INSN (NEXT_INSN (after)) = to;
2768 NEXT_INSN (to) = NEXT_INSN (after);
2769 PREV_INSN (from) = after;
2770 NEXT_INSN (after) = from;
2771 if (after == last_insn)
2775 /* Return the line note insn preceding INSN. */
2778 find_line_note (insn)
2781 if (no_line_numbers)
2784 for (; insn; insn = PREV_INSN (insn))
2785 if (GET_CODE (insn) == NOTE
2786 && NOTE_LINE_NUMBER (insn) >= 0)
2792 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2793 of the moved insns when debugging. This may insert a note between AFTER
2794 and FROM, and another one after TO. */
2797 reorder_insns_with_line_notes (from, to, after)
2798 rtx from, to, after;
2800 rtx from_line = find_line_note (from);
2801 rtx after_line = find_line_note (after);
2803 reorder_insns (from, to, after);
2805 if (from_line == after_line)
2809 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2810 NOTE_LINE_NUMBER (from_line),
2813 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2814 NOTE_LINE_NUMBER (after_line),
2818 /* Remove unnecessary notes from the instruction stream. */
2821 remove_unnecessary_notes ()
2823 rtx block_stack = NULL_RTX;
2824 rtx eh_stack = NULL_RTX;
2829 /* We must not remove the first instruction in the function because
2830 the compiler depends on the first instruction being a note. */
2831 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2833 /* Remember what's next. */
2834 next = NEXT_INSN (insn);
2836 /* We're only interested in notes. */
2837 if (GET_CODE (insn) != NOTE)
2840 switch (NOTE_LINE_NUMBER (insn))
2842 case NOTE_INSN_DELETED:
2846 case NOTE_INSN_EH_REGION_BEG:
2847 eh_stack = alloc_INSN_LIST (insn, eh_stack);
2850 case NOTE_INSN_EH_REGION_END:
2851 /* Too many end notes. */
2852 if (eh_stack == NULL_RTX)
2854 /* Mismatched nesting. */
2855 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
2858 eh_stack = XEXP (eh_stack, 1);
2859 free_INSN_LIST_node (tmp);
2862 case NOTE_INSN_BLOCK_BEG:
2863 /* By now, all notes indicating lexical blocks should have
2864 NOTE_BLOCK filled in. */
2865 if (NOTE_BLOCK (insn) == NULL_TREE)
2867 block_stack = alloc_INSN_LIST (insn, block_stack);
2870 case NOTE_INSN_BLOCK_END:
2871 /* Too many end notes. */
2872 if (block_stack == NULL_RTX)
2874 /* Mismatched nesting. */
2875 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
2878 block_stack = XEXP (block_stack, 1);
2879 free_INSN_LIST_node (tmp);
2881 /* Scan back to see if there are any non-note instructions
2882 between INSN and the beginning of this block. If not,
2883 then there is no PC range in the generated code that will
2884 actually be in this block, so there's no point in
2885 remembering the existence of the block. */
2886 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
2888 /* This block contains a real instruction. Note that we
2889 don't include labels; if the only thing in the block
2890 is a label, then there are still no PC values that
2891 lie within the block. */
2895 /* We're only interested in NOTEs. */
2896 if (GET_CODE (tmp) != NOTE)
2899 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
2901 /* We just verified that this BLOCK matches us
2902 with the block_stack check above. */
2903 if (debug_ignore_block (NOTE_BLOCK (insn)))
2910 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
2911 /* There's a nested block. We need to leave the
2912 current block in place since otherwise the debugger
2913 wouldn't be able to show symbols from our block in
2914 the nested block. */
2920 /* Too many begin notes. */
2921 if (block_stack || eh_stack)
2926 /* Emit an insn of given code and pattern
2927 at a specified place within the doubly-linked list. */
2929 /* Make an instruction with body PATTERN
2930 and output it before the instruction BEFORE. */
2933 emit_insn_before (pattern, before)
2934 register rtx pattern, before;
2936 register rtx insn = before;
2938 if (GET_CODE (pattern) == SEQUENCE)
2942 for (i = 0; i < XVECLEN (pattern, 0); i++)
2944 insn = XVECEXP (pattern, 0, i);
2945 add_insn_before (insn, before);
2950 insn = make_insn_raw (pattern);
2951 add_insn_before (insn, before);
2957 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2960 emit_block_insn_before (pattern, before, block)
2961 rtx pattern, before;
2964 rtx prev = PREV_INSN (before);
2965 rtx r = emit_insn_before (pattern, before);
2966 if (block && block->head == before)
2967 block->head = NEXT_INSN (prev);
2971 /* Make an instruction with body PATTERN and code JUMP_INSN
2972 and output it before the instruction BEFORE. */
2975 emit_jump_insn_before (pattern, before)
2976 register rtx pattern, before;
2980 if (GET_CODE (pattern) == SEQUENCE)
2981 insn = emit_insn_before (pattern, before);
2984 insn = make_jump_insn_raw (pattern);
2985 add_insn_before (insn, before);
2991 /* Make an instruction with body PATTERN and code CALL_INSN
2992 and output it before the instruction BEFORE. */
2995 emit_call_insn_before (pattern, before)
2996 register rtx pattern, before;
3000 if (GET_CODE (pattern) == SEQUENCE)
3001 insn = emit_insn_before (pattern, before);
3004 insn = make_call_insn_raw (pattern);
3005 add_insn_before (insn, before);
3006 PUT_CODE (insn, CALL_INSN);
3012 /* Make an insn of code BARRIER
3013 and output it before the insn BEFORE. */
3016 emit_barrier_before (before)
3017 register rtx before;
3019 register rtx insn = rtx_alloc (BARRIER);
3021 INSN_UID (insn) = cur_insn_uid++;
3023 add_insn_before (insn, before);
3027 /* Emit the label LABEL before the insn BEFORE. */
3030 emit_label_before (label, before)
3033 /* This can be called twice for the same label as a result of the
3034 confusion that follows a syntax error! So make it harmless. */
3035 if (INSN_UID (label) == 0)
3037 INSN_UID (label) = cur_insn_uid++;
3038 add_insn_before (label, before);
3044 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3047 emit_note_before (subtype, before)
3051 register rtx note = rtx_alloc (NOTE);
3052 INSN_UID (note) = cur_insn_uid++;
3053 NOTE_SOURCE_FILE (note) = 0;
3054 NOTE_LINE_NUMBER (note) = subtype;
3056 add_insn_before (note, before);
3060 /* Make an insn of code INSN with body PATTERN
3061 and output it after the insn AFTER. */
3064 emit_insn_after (pattern, after)
3065 register rtx pattern, after;
3067 register rtx insn = after;
3069 if (GET_CODE (pattern) == SEQUENCE)
3073 for (i = 0; i < XVECLEN (pattern, 0); i++)
3075 insn = XVECEXP (pattern, 0, i);
3076 add_insn_after (insn, after);
3082 insn = make_insn_raw (pattern);
3083 add_insn_after (insn, after);
3089 /* Similar to emit_insn_after, except that line notes are to be inserted so
3090 as to act as if this insn were at FROM. */
3093 emit_insn_after_with_line_notes (pattern, after, from)
3094 rtx pattern, after, from;
3096 rtx from_line = find_line_note (from);
3097 rtx after_line = find_line_note (after);
3098 rtx insn = emit_insn_after (pattern, after);
3101 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3102 NOTE_LINE_NUMBER (from_line),
3106 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3107 NOTE_LINE_NUMBER (after_line),
3111 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3114 emit_block_insn_after (pattern, after, block)
3118 rtx r = emit_insn_after (pattern, after);
3119 if (block && block->end == after)
3124 /* Make an insn of code JUMP_INSN with body PATTERN
3125 and output it after the insn AFTER. */
3128 emit_jump_insn_after (pattern, after)
3129 register rtx pattern, after;
3133 if (GET_CODE (pattern) == SEQUENCE)
3134 insn = emit_insn_after (pattern, after);
3137 insn = make_jump_insn_raw (pattern);
3138 add_insn_after (insn, after);
3144 /* Make an insn of code BARRIER
3145 and output it after the insn AFTER. */
3148 emit_barrier_after (after)
3151 register rtx insn = rtx_alloc (BARRIER);
3153 INSN_UID (insn) = cur_insn_uid++;
3155 add_insn_after (insn, after);
3159 /* Emit the label LABEL after the insn AFTER. */
3162 emit_label_after (label, after)
3165 /* This can be called twice for the same label
3166 as a result of the confusion that follows a syntax error!
3167 So make it harmless. */
3168 if (INSN_UID (label) == 0)
3170 INSN_UID (label) = cur_insn_uid++;
3171 add_insn_after (label, after);
3177 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3180 emit_note_after (subtype, after)
3184 register rtx note = rtx_alloc (NOTE);
3185 INSN_UID (note) = cur_insn_uid++;
3186 NOTE_SOURCE_FILE (note) = 0;
3187 NOTE_LINE_NUMBER (note) = subtype;
3188 add_insn_after (note, after);
3192 /* Emit a line note for FILE and LINE after the insn AFTER. */
3195 emit_line_note_after (file, line, after)
3202 if (no_line_numbers && line > 0)
3208 note = rtx_alloc (NOTE);
3209 INSN_UID (note) = cur_insn_uid++;
3210 NOTE_SOURCE_FILE (note) = file;
3211 NOTE_LINE_NUMBER (note) = line;
3212 add_insn_after (note, after);
3216 /* Make an insn of code INSN with pattern PATTERN
3217 and add it to the end of the doubly-linked list.
3218 If PATTERN is a SEQUENCE, take the elements of it
3219 and emit an insn for each element.
3221 Returns the last insn emitted. */
3227 rtx insn = last_insn;
3229 if (GET_CODE (pattern) == SEQUENCE)
3233 for (i = 0; i < XVECLEN (pattern, 0); i++)
3235 insn = XVECEXP (pattern, 0, i);
3241 insn = make_insn_raw (pattern);
3248 /* Emit the insns in a chain starting with INSN.
3249 Return the last insn emitted. */
3259 rtx next = NEXT_INSN (insn);
3268 /* Emit the insns in a chain starting with INSN and place them in front of
3269 the insn BEFORE. Return the last insn emitted. */
3272 emit_insns_before (insn, before)
3280 rtx next = NEXT_INSN (insn);
3281 add_insn_before (insn, before);
3289 /* Emit the insns in a chain starting with FIRST and place them in back of
3290 the insn AFTER. Return the last insn emitted. */
3293 emit_insns_after (first, after)
3298 register rtx after_after;
3306 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3309 after_after = NEXT_INSN (after);
3311 NEXT_INSN (after) = first;
3312 PREV_INSN (first) = after;
3313 NEXT_INSN (last) = after_after;
3315 PREV_INSN (after_after) = last;
3317 if (after == last_insn)
3322 /* Make an insn of code JUMP_INSN with pattern PATTERN
3323 and add it to the end of the doubly-linked list. */
3326 emit_jump_insn (pattern)
3329 if (GET_CODE (pattern) == SEQUENCE)
3330 return emit_insn (pattern);
3333 register rtx insn = make_jump_insn_raw (pattern);
3339 /* Make an insn of code CALL_INSN with pattern PATTERN
3340 and add it to the end of the doubly-linked list. */
3343 emit_call_insn (pattern)
3346 if (GET_CODE (pattern) == SEQUENCE)
3347 return emit_insn (pattern);
3350 register rtx insn = make_call_insn_raw (pattern);
3352 PUT_CODE (insn, CALL_INSN);
3357 /* Add the label LABEL to the end of the doubly-linked list. */
3363 /* This can be called twice for the same label
3364 as a result of the confusion that follows a syntax error!
3365 So make it harmless. */
3366 if (INSN_UID (label) == 0)
3368 INSN_UID (label) = cur_insn_uid++;
3374 /* Make an insn of code BARRIER
3375 and add it to the end of the doubly-linked list. */
3380 register rtx barrier = rtx_alloc (BARRIER);
3381 INSN_UID (barrier) = cur_insn_uid++;
3386 /* Make an insn of code NOTE
3387 with data-fields specified by FILE and LINE
3388 and add it to the end of the doubly-linked list,
3389 but only if line-numbers are desired for debugging info. */
3392 emit_line_note (file, line)
3396 set_file_and_line_for_stmt (file, line);
3399 if (no_line_numbers)
3403 return emit_note (file, line);
3406 /* Make an insn of code NOTE
3407 with data-fields specified by FILE and LINE
3408 and add it to the end of the doubly-linked list.
3409 If it is a line-number NOTE, omit it if it matches the previous one. */
3412 emit_note (file, line)
3420 if (file && last_filename && !strcmp (file, last_filename)
3421 && line == last_linenum)
3423 last_filename = file;
3424 last_linenum = line;
3427 if (no_line_numbers && line > 0)
3433 note = rtx_alloc (NOTE);
3434 INSN_UID (note) = cur_insn_uid++;
3435 NOTE_SOURCE_FILE (note) = file;
3436 NOTE_LINE_NUMBER (note) = line;
3441 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3444 emit_line_note_force (file, line)
3449 return emit_line_note (file, line);
3452 /* Cause next statement to emit a line note even if the line number
3453 has not changed. This is used at the beginning of a function. */
3456 force_next_line_note ()
3461 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3462 note of this type already exists, remove it first. */
3465 set_unique_reg_note (insn, kind, datum)
3470 rtx note = find_reg_note (insn, kind, NULL_RTX);
3472 /* First remove the note if there already is one. */
3474 remove_note (insn, note);
3476 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3479 /* Return an indication of which type of insn should have X as a body.
3480 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3486 if (GET_CODE (x) == CODE_LABEL)
3488 if (GET_CODE (x) == CALL)
3490 if (GET_CODE (x) == RETURN)
3492 if (GET_CODE (x) == SET)
3494 if (SET_DEST (x) == pc_rtx)
3496 else if (GET_CODE (SET_SRC (x)) == CALL)
3501 if (GET_CODE (x) == PARALLEL)
3504 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3505 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3507 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3508 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3510 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3511 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3517 /* Emit the rtl pattern X as an appropriate kind of insn.
3518 If X is a label, it is simply added into the insn chain. */
3524 enum rtx_code code = classify_insn (x);
3526 if (code == CODE_LABEL)
3527 return emit_label (x);
3528 else if (code == INSN)
3529 return emit_insn (x);
3530 else if (code == JUMP_INSN)
3532 register rtx insn = emit_jump_insn (x);
3533 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3534 return emit_barrier ();
3537 else if (code == CALL_INSN)
3538 return emit_call_insn (x);
3543 /* Begin emitting insns to a sequence which can be packaged in an
3544 RTL_EXPR. If this sequence will contain something that might cause
3545 the compiler to pop arguments to function calls (because those
3546 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3547 details), use do_pending_stack_adjust before calling this function.
3548 That will ensure that the deferred pops are not accidentally
3549 emitted in the middle of this sequence. */
3554 struct sequence_stack *tem;
3556 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3558 tem->next = seq_stack;
3559 tem->first = first_insn;
3560 tem->last = last_insn;
3561 tem->sequence_rtl_expr = seq_rtl_expr;
3569 /* Similarly, but indicate that this sequence will be placed in T, an
3570 RTL_EXPR. See the documentation for start_sequence for more
3571 information about how to use this function. */
3574 start_sequence_for_rtl_expr (t)
3582 /* Set up the insn chain starting with FIRST as the current sequence,
3583 saving the previously current one. See the documentation for
3584 start_sequence for more information about how to use this function. */
3587 push_to_sequence (first)
3594 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3600 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3603 push_to_full_sequence (first, last)
3609 /* We really should have the end of the insn chain here. */
3610 if (last && NEXT_INSN (last))
3614 /* Set up the outer-level insn chain
3615 as the current sequence, saving the previously current one. */
3618 push_topmost_sequence ()
3620 struct sequence_stack *stack, *top = NULL;
3624 for (stack = seq_stack; stack; stack = stack->next)
3627 first_insn = top->first;
3628 last_insn = top->last;
3629 seq_rtl_expr = top->sequence_rtl_expr;
3632 /* After emitting to the outer-level insn chain, update the outer-level
3633 insn chain, and restore the previous saved state. */
3636 pop_topmost_sequence ()
3638 struct sequence_stack *stack, *top = NULL;
3640 for (stack = seq_stack; stack; stack = stack->next)
3643 top->first = first_insn;
3644 top->last = last_insn;
3645 /* ??? Why don't we save seq_rtl_expr here? */
3650 /* After emitting to a sequence, restore previous saved state.
3652 To get the contents of the sequence just made, you must call
3653 `gen_sequence' *before* calling here.
3655 If the compiler might have deferred popping arguments while
3656 generating this sequence, and this sequence will not be immediately
3657 inserted into the instruction stream, use do_pending_stack_adjust
3658 before calling gen_sequence. That will ensure that the deferred
3659 pops are inserted into this sequence, and not into some random
3660 location in the instruction stream. See INHIBIT_DEFER_POP for more
3661 information about deferred popping of arguments. */
3666 struct sequence_stack *tem = seq_stack;
3668 first_insn = tem->first;
3669 last_insn = tem->last;
3670 seq_rtl_expr = tem->sequence_rtl_expr;
3671 seq_stack = tem->next;
3676 /* This works like end_sequence, but records the old sequence in FIRST
3680 end_full_sequence (first, last)
3683 *first = first_insn;
3688 /* Return 1 if currently emitting into a sequence. */
3693 return seq_stack != 0;
3696 /* Generate a SEQUENCE rtx containing the insns already emitted
3697 to the current sequence.
3699 This is how the gen_... function from a DEFINE_EXPAND
3700 constructs the SEQUENCE that it returns. */
3710 /* Count the insns in the chain. */
3712 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3715 /* If only one insn, return it rather than a SEQUENCE.
3716 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3717 the case of an empty list.)
3718 We only return the pattern of an insn if its code is INSN and it
3719 has no notes. This ensures that no information gets lost. */
3721 && ! RTX_FRAME_RELATED_P (first_insn)
3722 && GET_CODE (first_insn) == INSN
3723 /* Don't throw away any reg notes. */
3724 && REG_NOTES (first_insn) == 0)
3725 return PATTERN (first_insn);
3727 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3729 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3730 XVECEXP (result, 0, i) = tem;
3735 /* Put the various virtual registers into REGNO_REG_RTX. */
3738 init_virtual_regs (es)
3739 struct emit_status *es;
3741 rtx *ptr = es->x_regno_reg_rtx;
3742 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3743 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3744 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3745 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3746 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3750 clear_emit_caches ()
3754 /* Clear the start_sequence/gen_sequence cache. */
3755 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3756 sequence_result[i] = 0;
3760 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3761 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3762 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3763 static int copy_insn_n_scratches;
3765 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3766 copied an ASM_OPERANDS.
3767 In that case, it is the original input-operand vector. */
3768 static rtvec orig_asm_operands_vector;
3770 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3771 copied an ASM_OPERANDS.
3772 In that case, it is the copied input-operand vector. */
3773 static rtvec copy_asm_operands_vector;
3775 /* Likewise for the constraints vector. */
3776 static rtvec orig_asm_constraints_vector;
3777 static rtvec copy_asm_constraints_vector;
3779 /* Recursively create a new copy of an rtx for copy_insn.
3780 This function differs from copy_rtx in that it handles SCRATCHes and
3781 ASM_OPERANDs properly.
3782 Normally, this function is not used directly; use copy_insn as front end.
3783 However, you could first copy an insn pattern with copy_insn and then use
3784 this function afterwards to properly copy any REG_NOTEs containing
3793 register RTX_CODE code;
3794 register const char *format_ptr;
3796 code = GET_CODE (orig);
3812 for (i = 0; i < copy_insn_n_scratches; i++)
3813 if (copy_insn_scratch_in[i] == orig)
3814 return copy_insn_scratch_out[i];
3818 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3819 a LABEL_REF, it isn't sharable. */
3820 if (GET_CODE (XEXP (orig, 0)) == PLUS
3821 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3822 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3826 /* A MEM with a constant address is not sharable. The problem is that
3827 the constant address may need to be reloaded. If the mem is shared,
3828 then reloading one copy of this mem will cause all copies to appear
3829 to have been reloaded. */
3835 copy = rtx_alloc (code);
3837 /* Copy the various flags, and other information. We assume that
3838 all fields need copying, and then clear the fields that should
3839 not be copied. That is the sensible default behavior, and forces
3840 us to explicitly document why we are *not* copying a flag. */
3841 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3843 /* We do not copy the USED flag, which is used as a mark bit during
3844 walks over the RTL. */
3847 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3848 if (GET_RTX_CLASS (code) == 'i')
3852 copy->frame_related = 0;
3855 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3857 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3859 copy->fld[i] = orig->fld[i];
3860 switch (*format_ptr++)
3863 if (XEXP (orig, i) != NULL)
3864 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3869 if (XVEC (orig, i) == orig_asm_constraints_vector)
3870 XVEC (copy, i) = copy_asm_constraints_vector;
3871 else if (XVEC (orig, i) == orig_asm_operands_vector)
3872 XVEC (copy, i) = copy_asm_operands_vector;
3873 else if (XVEC (orig, i) != NULL)
3875 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3876 for (j = 0; j < XVECLEN (copy, i); j++)
3877 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3888 /* These are left unchanged. */
3896 if (code == SCRATCH)
3898 i = copy_insn_n_scratches++;
3899 if (i >= MAX_RECOG_OPERANDS)
3901 copy_insn_scratch_in[i] = orig;
3902 copy_insn_scratch_out[i] = copy;
3904 else if (code == ASM_OPERANDS)
3906 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
3907 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
3908 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
3909 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
3915 /* Create a new copy of an rtx.
3916 This function differs from copy_rtx in that it handles SCRATCHes and
3917 ASM_OPERANDs properly.
3918 INSN doesn't really have to be a full INSN; it could be just the
3924 copy_insn_n_scratches = 0;
3925 orig_asm_operands_vector = 0;
3926 orig_asm_constraints_vector = 0;
3927 copy_asm_operands_vector = 0;
3928 copy_asm_constraints_vector = 0;
3929 return copy_insn_1 (insn);
3932 /* Initialize data structures and variables in this file
3933 before generating rtl for each function. */
3938 struct function *f = cfun;
3940 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3943 seq_rtl_expr = NULL;
3945 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3948 first_label_num = label_num;
3952 clear_emit_caches ();
3954 /* Init the tables that describe all the pseudo regs. */
3956 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
3958 f->emit->regno_pointer_align
3959 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
3960 sizeof (unsigned char));
3963 = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
3966 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3967 init_virtual_regs (f->emit);
3969 /* Indicate that the virtual registers and stack locations are
3971 REG_POINTER (stack_pointer_rtx) = 1;
3972 REG_POINTER (frame_pointer_rtx) = 1;
3973 REG_POINTER (hard_frame_pointer_rtx) = 1;
3974 REG_POINTER (arg_pointer_rtx) = 1;
3976 REG_POINTER (virtual_incoming_args_rtx) = 1;
3977 REG_POINTER (virtual_stack_vars_rtx) = 1;
3978 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
3979 REG_POINTER (virtual_outgoing_args_rtx) = 1;
3980 REG_POINTER (virtual_cfa_rtx) = 1;
3982 #ifdef STACK_BOUNDARY
3983 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3984 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3985 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3986 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
3988 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
3989 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
3990 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
3991 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
3992 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
3995 #ifdef INIT_EXPANDERS
4000 /* Mark SS for GC. */
4003 mark_sequence_stack (ss)
4004 struct sequence_stack *ss;
4008 ggc_mark_rtx (ss->first);
4009 ggc_mark_tree (ss->sequence_rtl_expr);
4014 /* Mark ES for GC. */
4017 mark_emit_status (es)
4018 struct emit_status *es;
4026 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
4030 mark_sequence_stack (es->sequence_stack);
4031 ggc_mark_tree (es->sequence_rtl_expr);
4032 ggc_mark_rtx (es->x_first_insn);
4035 /* Create some permanent unique rtl objects shared between all functions.
4036 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4039 init_emit_once (line_numbers)
4043 enum machine_mode mode;
4044 enum machine_mode double_mode;
4046 /* Initialize the CONST_INT hash table. */
4047 const_int_htab = htab_create (37, const_int_htab_hash,
4048 const_int_htab_eq, NULL);
4049 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4052 no_line_numbers = ! line_numbers;
4054 /* Compute the word and byte modes. */
4056 byte_mode = VOIDmode;
4057 word_mode = VOIDmode;
4058 double_mode = VOIDmode;
4060 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4061 mode = GET_MODE_WIDER_MODE (mode))
4063 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4064 && byte_mode == VOIDmode)
4067 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4068 && word_mode == VOIDmode)
4072 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4073 mode = GET_MODE_WIDER_MODE (mode))
4075 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4076 && double_mode == VOIDmode)
4080 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4082 /* Assign register numbers to the globally defined register rtx.
4083 This must be done at runtime because the register number field
4084 is in a union and some compilers can't initialize unions. */
4086 pc_rtx = gen_rtx (PC, VOIDmode);
4087 cc0_rtx = gen_rtx (CC0, VOIDmode);
4088 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4089 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4090 if (hard_frame_pointer_rtx == 0)
4091 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4092 HARD_FRAME_POINTER_REGNUM);
4093 if (arg_pointer_rtx == 0)
4094 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4095 virtual_incoming_args_rtx =
4096 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4097 virtual_stack_vars_rtx =
4098 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4099 virtual_stack_dynamic_rtx =
4100 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4101 virtual_outgoing_args_rtx =
4102 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4103 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4105 /* These rtx must be roots if GC is enabled. */
4106 ggc_add_rtx_root (global_rtl, GR_MAX);
4108 #ifdef INIT_EXPANDERS
4109 /* This is to initialize {init|mark|free}_machine_status before the first
4110 call to push_function_context_to. This is needed by the Chill front
4111 end which calls push_function_context_to before the first cal to
4112 init_function_start. */
4116 /* Create the unique rtx's for certain rtx codes and operand values. */
4118 /* Don't use gen_rtx here since gen_rtx in this case
4119 tries to use these variables. */
4120 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4121 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4122 gen_rtx_raw_CONST_INT (VOIDmode, i);
4123 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4125 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4126 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4127 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4129 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4131 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4132 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4133 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4134 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4136 for (i = 0; i <= 2; i++)
4138 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4139 mode = GET_MODE_WIDER_MODE (mode))
4141 rtx tem = rtx_alloc (CONST_DOUBLE);
4142 union real_extract u;
4144 /* Zero any holes in a structure. */
4145 memset ((char *) &u, 0, sizeof u);
4146 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4148 /* Avoid trailing garbage in the rtx. */
4149 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4150 CONST_DOUBLE_LOW (tem) = 0;
4151 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4152 CONST_DOUBLE_HIGH (tem) = 0;
4154 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4155 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4156 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4157 PUT_MODE (tem, mode);
4159 const_tiny_rtx[i][(int) mode] = tem;
4162 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4164 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4165 mode = GET_MODE_WIDER_MODE (mode))
4166 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4168 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4170 mode = GET_MODE_WIDER_MODE (mode))
4171 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4174 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4175 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4176 const_tiny_rtx[0][i] = const0_rtx;
4178 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4179 if (STORE_FLAG_VALUE == 1)
4180 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4182 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4183 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4184 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4185 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4186 ggc_add_rtx_root (&const_true_rtx, 1);
4188 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4189 return_address_pointer_rtx
4190 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4194 struct_value_rtx = STRUCT_VALUE;
4196 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4199 #ifdef STRUCT_VALUE_INCOMING
4200 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4202 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4203 struct_value_incoming_rtx
4204 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4206 struct_value_incoming_rtx = struct_value_rtx;
4210 #ifdef STATIC_CHAIN_REGNUM
4211 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4213 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4214 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4215 static_chain_incoming_rtx
4216 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4219 static_chain_incoming_rtx = static_chain_rtx;
4223 static_chain_rtx = STATIC_CHAIN;
4225 #ifdef STATIC_CHAIN_INCOMING
4226 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4228 static_chain_incoming_rtx = static_chain_rtx;
4232 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4233 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4235 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4236 ggc_add_rtx_root (&struct_value_rtx, 1);
4237 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4238 ggc_add_rtx_root (&static_chain_rtx, 1);
4239 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4240 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4243 /* Query and clear/ restore no_line_numbers. This is used by the
4244 switch / case handling in stmt.c to give proper line numbers in
4245 warnings about unreachable code. */
4248 force_line_numbers ()
4250 int old = no_line_numbers;
4252 no_line_numbers = 0;
4254 force_next_line_note ();
4259 restore_line_number_status (old_value)
4262 no_line_numbers = old_value;