1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains the functions `gen_rtx', `gen_reg_rtx'
24 and `gen_label_rtx' that are the usual ways of creating rtl
25 expressions for most purposes.
27 It also has the functions for creating insns and linking
28 them in the doubly-linked chain.
30 The patterns of the insns are created by machine-dependent
31 routines in insn-emit.c, which is generated automatically from
32 the machine description. These routines use `gen_rtx' to make
33 the individual rtx's of the pattern; what is machine dependent
34 is the kind of rtx's they make and what arguments they use. */
43 #include "insn-config.h"
47 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
48 After rtl generation, it is 1 plus the largest register number used. */
50 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
52 /* This is *not* reset after each function. It gives each CODE_LABEL
53 in the entire compilation a unique label number. */
55 static int label_num = 1;
57 /* Lowest label number in current function. */
59 static int first_label_num;
61 /* Highest label number in current function.
62 Zero means use the value of label_num instead.
63 This is nonzero only when belatedly compiling an inline function. */
65 static int last_label_num;
67 /* Value label_num had when set_new_first_and_last_label_number was called.
68 If label_num has not changed since then, last_label_num is valid. */
70 static int base_label_num;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these except perhaps the floating-point CONST_DOUBLEs
79 are unique; no other rtx-object will be equal to any of these. */
81 rtx pc_rtx; /* (PC) */
82 rtx cc0_rtx; /* (CC0) */
83 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
84 rtx const0_rtx; /* (CONST_INT 0) */
85 rtx const1_rtx; /* (CONST_INT 1) */
86 rtx const2_rtx; /* (CONST_INT 2) */
87 rtx constm1_rtx; /* (CONST_INT -1) */
88 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
96 REAL_VALUE_TYPE dconst0;
97 REAL_VALUE_TYPE dconst1;
98 REAL_VALUE_TYPE dconst2;
99 REAL_VALUE_TYPE dconstm1;
101 /* All references to the following fixed hard registers go through
102 these unique rtl objects. On machines where the frame-pointer and
103 arg-pointer are the same register, they use the same unique object.
105 After register allocation, other rtl objects which used to be pseudo-regs
106 may be clobbered to refer to the frame-pointer register.
107 But references that were originally to the frame-pointer can be
108 distinguished from the others because they contain frame_pointer_rtx.
110 In an inline procedure, the stack and frame pointer rtxs may not be
111 used for anything else. */
112 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
113 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
114 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
115 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
116 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
117 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
118 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
119 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
121 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
122 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
123 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
124 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
126 /* We make one copy of (const_int C) where C is in
127 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
128 to save space during the compilation and simplify comparisons of
131 #define MAX_SAVED_CONST_INT 64
133 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
135 /* The ends of the doubly-linked chain of rtl for the current function.
136 Both are reset to null at the start of rtl generation for the function.
138 start_sequence saves both of these on `sequence_stack' and then
139 starts a new, nested sequence of insns. */
141 static rtx first_insn = NULL;
142 static rtx last_insn = NULL;
144 /* INSN_UID for next insn emitted.
145 Reset to 1 for each function compiled. */
147 static int cur_insn_uid = 1;
149 /* Line number and source file of the last line-number NOTE emitted.
150 This is used to avoid generating duplicates. */
152 static int last_linenum = 0;
153 static char *last_filename = 0;
155 /* A vector indexed by pseudo reg number. The allocated length
156 of this vector is regno_pointer_flag_length. Since this
157 vector is needed during the expansion phase when the total
158 number of registers in the function is not yet known,
159 it is copied and made bigger when necessary. */
161 char *regno_pointer_flag;
162 int regno_pointer_flag_length;
164 /* Indexed by pseudo register number, gives the rtx for that pseudo.
165 Allocated in parallel with regno_pointer_flag. */
169 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
170 Each element describes one pending sequence.
171 The main insn-chain is saved in the last element of the chain,
172 unless the chain is empty. */
174 struct sequence_stack *sequence_stack;
176 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
177 shortly thrown away. We use two mechanisms to prevent this waste:
179 First, we keep a list of the expressions used to represent the sequence
180 stack in sequence_element_free_list.
182 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
183 rtvec for use by gen_sequence. One entry for each size is sufficient
184 because most cases are calls to gen_sequence followed by immediately
185 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
186 destructive on the insn in it anyway and hence can't be redone.
188 We do not bother to save this cached data over nested function calls.
189 Instead, we just reinitialize them. */
191 #define SEQUENCE_RESULT_SIZE 5
193 static struct sequence_stack *sequence_element_free_list;
194 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
196 extern int rtx_equal_function_value_matters;
198 /* Filename and line number of last line-number note,
199 whether we actually emitted it or not. */
200 extern char *emit_filename;
201 extern int emit_lineno;
203 rtx change_address ();
206 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
208 ** This routine generates an RTX of the size specified by
209 ** <code>, which is an RTX code. The RTX structure is initialized
210 ** from the arguments <element1> through <elementn>, which are
211 ** interpreted according to the specific RTX type's format. The
212 ** special machine mode associated with the rtx (if any) is specified
215 ** gen_rtx() can be invoked in a way which resembles the lisp-like
216 ** rtx it will generate. For example, the following rtx structure:
218 ** (plus:QI (mem:QI (reg:SI 1))
219 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
221 ** ...would be generated by the following C code:
223 ** gen_rtx (PLUS, QImode,
224 ** gen_rtx (MEM, QImode,
225 ** gen_rtx (REG, SImode, 1)),
226 ** gen_rtx (MEM, QImode,
227 ** gen_rtx (PLUS, SImode,
228 ** gen_rtx (REG, SImode, 2),
229 ** gen_rtx (REG, SImode, 3)))),
239 enum machine_mode mode;
240 register int i; /* Array indices... */
241 register char *fmt; /* Current rtx's format... */
242 register rtx rt_val; /* RTX to return to caller... */
245 code = va_arg (p, enum rtx_code);
246 mode = va_arg (p, enum machine_mode);
248 if (code == CONST_INT)
250 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
252 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
253 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
255 if (const_true_rtx && arg == STORE_FLAG_VALUE)
256 return const_true_rtx;
258 rt_val = rtx_alloc (code);
259 INTVAL (rt_val) = arg;
261 else if (code == REG)
263 int regno = va_arg (p, int);
265 /* In case the MD file explicitly references the frame pointer, have
266 all such references point to the same frame pointer. This is used
267 during frame pointer elimination to distinguish the explicit
268 references to these registers from pseudos that happened to be
271 If we have eliminated the frame pointer or arg pointer, we will
272 be using it as a normal register, for example as a spill register.
273 In such cases, we might be accessing it in a mode that is not
274 Pmode and therefore cannot use the pre-allocated rtx.
276 Also don't do this when we are making new REGs in reload,
277 since we don't want to get confused with the real pointers. */
279 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
280 && ! reload_in_progress)
281 return frame_pointer_rtx;
282 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
283 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
284 && ! reload_in_progress)
285 return arg_pointer_rtx;
287 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
288 && ! reload_in_progress)
289 return stack_pointer_rtx;
292 rt_val = rtx_alloc (code);
294 REGNO (rt_val) = regno;
300 rt_val = rtx_alloc (code); /* Allocate the storage space. */
301 rt_val->mode = mode; /* Store the machine mode... */
303 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
304 for (i = 0; i < GET_RTX_LENGTH (code); i++)
308 case '0': /* Unused field. */
311 case 'i': /* An integer? */
312 XINT (rt_val, i) = va_arg (p, int);
315 case 'w': /* A wide integer? */
316 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
319 case 's': /* A string? */
320 XSTR (rt_val, i) = va_arg (p, char *);
323 case 'e': /* An expression? */
324 case 'u': /* An insn? Same except when printing. */
325 XEXP (rt_val, i) = va_arg (p, rtx);
328 case 'E': /* An RTX vector? */
329 XVEC (rt_val, i) = va_arg (p, rtvec);
338 return rt_val; /* Return the new RTX... */
341 /* gen_rtvec (n, [rt1, ..., rtn])
343 ** This routine creates an rtvec and stores within it the
344 ** pointers to rtx's which are its arguments.
360 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
362 vector = (rtx *) alloca (n * sizeof (rtx));
363 for (i = 0; i < n; i++)
364 vector[i] = va_arg (p, rtx);
367 return gen_rtvec_v (n, vector);
371 gen_rtvec_v (n, argp)
376 register rtvec rt_val;
379 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
381 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
383 for (i = 0; i < n; i++)
384 rt_val->elem[i].rtx = *argp++;
389 /* Generate a REG rtx for a new pseudo register of mode MODE.
390 This pseudo is assigned the next sequential register number. */
394 enum machine_mode mode;
398 /* Don't let anything called by or after reload create new registers
399 (actually, registers can't be created after flow, but this is a good
402 if (reload_in_progress || reload_completed)
405 /* Make sure regno_pointer_flag and regno_reg_rtx are large
406 enough to have an element for this pseudo reg number. */
408 if (reg_rtx_no == regno_pointer_flag_length)
412 (char *) oballoc (regno_pointer_flag_length * 2);
413 bzero (new, regno_pointer_flag_length * 2);
414 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
415 regno_pointer_flag = new;
417 new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx));
418 bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx));
419 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
420 regno_reg_rtx = new1;
422 regno_pointer_flag_length *= 2;
425 val = gen_rtx (REG, mode, reg_rtx_no);
426 regno_reg_rtx[reg_rtx_no++] = val;
430 /* Identify REG as a probable pointer register. */
433 mark_reg_pointer (reg)
436 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
439 /* Return 1 plus largest pseudo reg number used in the current function. */
447 /* Return 1 + the largest label number used so far in the current function. */
452 if (last_label_num && label_num == base_label_num)
453 return last_label_num;
457 /* Return first label number used in this function (if any were used). */
460 get_first_label_num ()
462 return first_label_num;
465 /* Return a value representing some low-order bits of X, where the number
466 of low-order bits is given by MODE. Note that no conversion is done
467 between floating-point and fixed-point values, rather, the bit
468 representation is returned.
470 This function handles the cases in common between gen_lowpart, below,
471 and two variants in cse.c and combine.c. These are the cases that can
472 be safely handled at all points in the compilation.
474 If this is not a case we can handle, return 0. */
477 gen_lowpart_common (mode, x)
478 enum machine_mode mode;
483 if (GET_MODE (x) == mode)
486 /* MODE must occupy no more words than the mode of X. */
487 if (GET_MODE (x) != VOIDmode
488 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
489 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
493 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
494 word = ((GET_MODE_SIZE (GET_MODE (x))
495 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
498 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
499 && GET_MODE_CLASS (mode) == MODE_INT)
501 /* If we are getting the low-order part of something that has been
502 sign- or zero-extended, we can either just use the object being
503 extended or make a narrower extension. If we want an even smaller
504 piece than the size of the object being extended, call ourselves
507 This case is used mostly by combine and cse. */
509 if (GET_MODE (XEXP (x, 0)) == mode)
511 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
512 return gen_lowpart_common (mode, XEXP (x, 0));
513 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
514 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
516 else if (GET_CODE (x) == SUBREG
517 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
518 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
519 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
521 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
522 else if (GET_CODE (x) == REG)
524 /* If the register is not valid for MODE, return 0. If we don't
525 do this, there is no way to fix up the resulting REG later. */
526 if (REGNO (x) < FIRST_PSEUDO_REGISTER
527 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode))
529 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
530 /* integrate.c can't handle parts of a return value register. */
531 && (! REG_FUNCTION_VALUE_P (x)
532 || ! rtx_equal_function_value_matters)
533 /* We want to keep the stack, frame, and arg pointers
535 && REGNO (x) != FRAME_POINTER_REGNUM
536 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
537 && REGNO (x) != ARG_POINTER_REGNUM
539 && REGNO (x) != STACK_POINTER_REGNUM)
540 return gen_rtx (REG, mode, REGNO (x) + word);
542 return gen_rtx (SUBREG, mode, x, word);
545 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
546 from the low-order part of the constant. */
547 else if (GET_MODE_CLASS (mode) == MODE_INT && GET_MODE (x) == VOIDmode
548 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
550 /* If MODE is twice the host word size, X is already the desired
551 representation. Otherwise, if MODE is wider than a word, we can't
552 do this. If MODE is exactly a word, return just one CONST_INT.
553 If MODE is smaller than a word, clear the bits that don't belong
554 in our mode, unless they and our sign bit are all one. So we get
555 either a reasonable negative value or a reasonable unsigned value
558 if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT)
560 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
562 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
563 return (GET_CODE (x) == CONST_INT ? x
564 : GEN_INT (CONST_DOUBLE_LOW (x)));
567 /* MODE must be narrower than HOST_BITS_PER_INT. */
568 int width = GET_MODE_BITSIZE (mode);
569 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
570 : CONST_DOUBLE_LOW (x));
572 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
573 != ((HOST_WIDE_INT) (-1) << (width - 1))))
574 val &= ((HOST_WIDE_INT) 1 << width) - 1;
576 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
581 /* If X is an integral constant but we want it in floating-point, it
582 must be the case that we have a union of an integer and a floating-point
583 value. If the machine-parameters allow it, simulate that union here
584 and return the result. The two-word and single-word cases are
587 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
588 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
589 || flag_pretend_float)
590 && GET_MODE_CLASS (mode) == MODE_FLOAT
591 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
592 && GET_CODE (x) == CONST_INT
593 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
595 union {HOST_WIDE_INT i; float d; } u;
598 return immed_real_const_1 (u.d, mode);
601 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
602 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
603 || flag_pretend_float)
604 && GET_MODE_CLASS (mode) == MODE_FLOAT
605 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
606 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
607 && GET_MODE (x) == VOIDmode
608 && (sizeof (double) * HOST_BITS_PER_CHAR
609 == 2 * HOST_BITS_PER_WIDE_INT))
611 union {HOST_WIDE_INT i[2]; double d; } u;
612 HOST_WIDE_INT low, high;
614 if (GET_CODE (x) == CONST_INT)
615 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
617 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
619 #ifdef HOST_WORDS_BIG_ENDIAN
620 u.i[0] = high, u.i[1] = low;
622 u.i[0] = low, u.i[1] = high;
625 return immed_real_const_1 (u.d, mode);
628 /* Similarly, if this is converting a floating-point value into a
629 single-word integer. Only do this is the host and target parameters are
632 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
633 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
634 || flag_pretend_float)
635 && GET_MODE_CLASS (mode) == MODE_INT
636 && GET_CODE (x) == CONST_DOUBLE
637 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
638 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
639 return operand_subword (x, 0, 0, GET_MODE (x));
641 /* Similarly, if this is converting a floating-point value into a
642 two-word integer, we can do this one word at a time and make an
643 integer. Only do this is the host and target parameters are
646 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
647 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
648 || flag_pretend_float)
649 && GET_MODE_CLASS (mode) == MODE_INT
650 && GET_CODE (x) == CONST_DOUBLE
651 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
652 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
654 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
655 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
657 if (lowpart && GET_CODE (lowpart) == CONST_INT
658 && highpart && GET_CODE (highpart) == CONST_INT)
659 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
662 /* Otherwise, we can't do this. */
666 /* Return the real part (which has mode MODE) of a complex value X.
667 This always comes at the low address in memory. */
670 gen_realpart (mode, x)
671 enum machine_mode mode;
674 if (WORDS_BIG_ENDIAN)
675 return gen_highpart (mode, x);
677 return gen_lowpart (mode, x);
680 /* Return the imaginary part (which has mode MODE) of a complex value X.
681 This always comes at the high address in memory. */
684 gen_imagpart (mode, x)
685 enum machine_mode mode;
688 if (WORDS_BIG_ENDIAN)
689 return gen_lowpart (mode, x);
691 return gen_highpart (mode, x);
694 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
695 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
696 least-significant part of X.
697 MODE specifies how big a part of X to return;
698 it usually should not be larger than a word.
699 If X is a MEM whose address is a QUEUED, the value may be so also. */
702 gen_lowpart (mode, x)
703 enum machine_mode mode;
706 rtx result = gen_lowpart_common (mode, x);
710 else if (GET_CODE (x) == MEM)
712 /* The only additional case we can do is MEM. */
713 register int offset = 0;
714 if (WORDS_BIG_ENDIAN)
715 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
716 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
718 if (BYTES_BIG_ENDIAN)
719 /* Adjust the address so that the address-after-the-data
721 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
722 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
724 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
730 /* Like `gen_lowpart', but refer to the most significant part.
731 This is used to access the imaginary part of a complex number. */
734 gen_highpart (mode, x)
735 enum machine_mode mode;
738 /* This case loses if X is a subreg. To catch bugs early,
739 complain if an invalid MODE is used even in other cases. */
740 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
741 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
743 if (GET_CODE (x) == CONST_DOUBLE
744 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined(REAL_IS_NOT_DOUBLE))
745 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
748 return gen_rtx (CONST_INT, VOIDmode,
749 CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
750 else if (GET_CODE (x) == CONST_INT)
752 else if (GET_CODE (x) == MEM)
754 register int offset = 0;
755 #if !WORDS_BIG_ENDIAN
756 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
757 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
759 #if !BYTES_BIG_ENDIAN
760 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
761 offset -= (GET_MODE_SIZE (mode)
762 - MIN (UNITS_PER_WORD,
763 GET_MODE_SIZE (GET_MODE (x))));
765 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
767 else if (GET_CODE (x) == SUBREG)
769 /* The only time this should occur is when we are looking at a
770 multi-word item with a SUBREG whose mode is the same as that of the
771 item. It isn't clear what we would do if it wasn't. */
772 if (SUBREG_WORD (x) != 0)
774 return gen_highpart (mode, SUBREG_REG (x));
776 else if (GET_CODE (x) == REG)
780 #if !WORDS_BIG_ENDIAN
781 if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
782 word = ((GET_MODE_SIZE (GET_MODE (x))
783 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
786 if (REGNO (x) < FIRST_PSEUDO_REGISTER
787 /* We want to keep the stack, frame, and arg pointers special. */
788 && REGNO (x) != FRAME_POINTER_REGNUM
789 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
790 && REGNO (x) != ARG_POINTER_REGNUM
792 && REGNO (x) != STACK_POINTER_REGNUM)
793 return gen_rtx (REG, mode, REGNO (x) + word);
795 return gen_rtx (SUBREG, mode, x, word);
801 /* Return 1 iff X, assumed to be a SUBREG,
802 refers to the least significant part of its containing reg.
803 If X is not a SUBREG, always return 1 (it is its own low part!). */
809 if (GET_CODE (x) != SUBREG)
813 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
814 return (SUBREG_WORD (x)
815 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
816 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
819 return SUBREG_WORD (x) == 0;
822 /* Return subword I of operand OP.
823 The word number, I, is interpreted as the word number starting at the
824 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
825 otherwise it is the high-order word.
827 If we cannot extract the required word, we return zero. Otherwise, an
828 rtx corresponding to the requested word will be returned.
830 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
831 reload has completed, a valid address will always be returned. After
832 reload, if a valid address cannot be returned, we return zero.
834 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
835 it is the responsibility of the caller.
837 MODE is the mode of OP in case it is a CONST_INT. */
840 operand_subword (op, i, validate_address, mode)
843 int validate_address;
844 enum machine_mode mode;
847 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
849 if (mode == VOIDmode)
850 mode = GET_MODE (op);
852 if (mode == VOIDmode)
855 /* If OP is narrower than a word or if we want a word outside OP, fail. */
857 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
858 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
861 /* If OP is already an integer word, return it. */
862 if (GET_MODE_CLASS (mode) == MODE_INT
863 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
866 /* If OP is a REG or SUBREG, we can handle it very simply. */
867 if (GET_CODE (op) == REG)
869 /* If the register is not valid for MODE, return 0. If we don't
870 do this, there is no way to fix up the resulting REG later. */
871 if (REGNO (op) < FIRST_PSEUDO_REGISTER
872 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
874 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
875 || (REG_FUNCTION_VALUE_P (op)
876 && rtx_equal_function_value_matters)
877 /* We want to keep the stack, frame, and arg pointers
879 || REGNO (op) == FRAME_POINTER_REGNUM
880 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
881 || REGNO (op) == ARG_POINTER_REGNUM
883 || REGNO (op) == STACK_POINTER_REGNUM)
884 return gen_rtx (SUBREG, word_mode, op, i);
886 return gen_rtx (REG, word_mode, REGNO (op) + i);
888 else if (GET_CODE (op) == SUBREG)
889 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
891 /* Form a new MEM at the requested address. */
892 if (GET_CODE (op) == MEM)
894 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
897 if (validate_address)
899 if (reload_completed)
901 if (! strict_memory_address_p (word_mode, addr))
905 addr = memory_address (word_mode, addr);
908 new = gen_rtx (MEM, word_mode, addr);
910 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
911 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
912 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
917 /* The only remaining cases are when OP is a constant. If the host and
918 target floating formats are the same, handling two-word floating
919 constants are easy. */
920 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
921 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
922 || flag_pretend_float)
923 && GET_MODE_CLASS (mode) == MODE_FLOAT
924 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
925 && GET_CODE (op) == CONST_DOUBLE)
927 /* The constant is stored in the host's word-ordering,
928 but we want to access it in the target's word-ordering. Some
929 compilers don't like a conditional inside macro args, so we have two
930 copies of the return. */
931 #ifdef HOST_WORDS_BIG_ENDIAN
932 return GEN_INT (i == WORDS_BIG_ENDIAN
933 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
935 return GEN_INT (i != WORDS_BIG_ENDIAN
936 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
940 /* Single word float is a little harder, since single- and double-word
941 values often do not have the same high-order bits. We have already
942 verified that we want the only defined word of the single-word value. */
943 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
944 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
945 || flag_pretend_float)
946 && GET_MODE_CLASS (mode) == MODE_FLOAT
947 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
948 && GET_CODE (op) == CONST_DOUBLE)
951 union {float f; HOST_WIDE_INT i; } u;
953 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
956 return GEN_INT (u.i);
959 /* The only remaining cases that we can handle are integers.
960 Convert to proper endianness now since these cases need it.
961 At this point, i == 0 means the low-order word.
963 Note that it must be that BITS_PER_WORD <= HOST_BITS_PER_INT.
964 This is because if it were greater, it could only have been two
965 times greater since we do not support making wider constants. In
966 that case, it MODE would have already been the proper size and
967 it would have been handled above. This means we do not have to
968 worry about the case where we would be returning a CONST_DOUBLE. */
970 if (GET_MODE_CLASS (mode) != MODE_INT
971 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE))
974 if (WORDS_BIG_ENDIAN)
975 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
977 /* Find out which word on the host machine this value is in and get
978 it from the constant. */
979 val = (i / size_ratio == 0
980 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
981 : (GET_CODE (op) == CONST_INT
982 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
984 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
985 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
986 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
987 & (((HOST_WIDE_INT) 1
988 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
990 return GEN_INT (val);
993 /* Similar to `operand_subword', but never return 0. If we can't extract
994 the required subword, put OP into a register and try again. If that fails,
995 abort. We always validate the address in this case. It is not valid
996 to call this function after reload; it is mostly meant for RTL
999 MODE is the mode of OP, in case it is CONST_INT. */
1002 operand_subword_force (op, i, mode)
1005 enum machine_mode mode;
1007 rtx result = operand_subword (op, i, 1, mode);
1012 if (mode != BLKmode && mode != VOIDmode)
1013 op = force_reg (mode, op);
1015 result = operand_subword (op, i, 1, mode);
1022 /* Given a compare instruction, swap the operands.
1023 A test instruction is changed into a compare of 0 against the operand. */
1026 reverse_comparison (insn)
1029 rtx body = PATTERN (insn);
1032 if (GET_CODE (body) == SET)
1033 comp = SET_SRC (body);
1035 comp = SET_SRC (XVECEXP (body, 0, 0));
1037 if (GET_CODE (comp) == COMPARE)
1039 rtx op0 = XEXP (comp, 0);
1040 rtx op1 = XEXP (comp, 1);
1041 XEXP (comp, 0) = op1;
1042 XEXP (comp, 1) = op0;
1046 rtx new = gen_rtx (COMPARE, VOIDmode,
1047 CONST0_RTX (GET_MODE (comp)), comp);
1048 if (GET_CODE (body) == SET)
1049 SET_SRC (body) = new;
1051 SET_SRC (XVECEXP (body, 0, 0)) = new;
1055 /* Return a memory reference like MEMREF, but with its mode changed
1056 to MODE and its address changed to ADDR.
1057 (VOIDmode means don't change the mode.
1058 NULL for ADDR means don't change the address.) */
1061 change_address (memref, mode, addr)
1063 enum machine_mode mode;
1068 if (GET_CODE (memref) != MEM)
1070 if (mode == VOIDmode)
1071 mode = GET_MODE (memref);
1073 addr = XEXP (memref, 0);
1075 /* If reload is in progress or has completed, ADDR must be valid.
1076 Otherwise, we can call memory_address to make it valid. */
1077 if (reload_completed || reload_in_progress)
1079 if (! memory_address_p (mode, addr))
1083 addr = memory_address (mode, addr);
1085 new = gen_rtx (MEM, mode, addr);
1086 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1087 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1088 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1092 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1097 register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0,
1098 label_num++, NULL_PTR);
1099 LABEL_NUSES (label) = 0;
1103 /* For procedure integration. */
1105 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1106 from a permanent obstack when the opportunity arises. */
1109 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1110 last_labelno, max_parm_regnum, max_regnum, args_size,
1111 pops_args, stack_slots, function_flags,
1112 outgoing_args_size, original_arg_vector,
1113 original_decl_initial)
1114 rtx first_insn, first_parm_insn;
1115 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1119 int outgoing_args_size;
1120 rtvec original_arg_vector;
1121 rtx original_decl_initial;
1123 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
1124 cur_insn_uid++, NULL_RTX,
1125 first_insn, first_parm_insn,
1126 first_labelno, last_labelno,
1127 max_parm_regnum, max_regnum, args_size, pops_args,
1128 stack_slots, function_flags, outgoing_args_size,
1129 original_arg_vector, original_decl_initial);
1133 /* Install new pointers to the first and last insns in the chain.
1134 Used for an inline-procedure after copying the insn chain. */
1137 set_new_first_and_last_insn (first, last)
1144 /* Set the range of label numbers found in the current function.
1145 This is used when belatedly compiling an inline function. */
1148 set_new_first_and_last_label_num (first, last)
1151 base_label_num = label_num;
1152 first_label_num = first;
1153 last_label_num = last;
1156 /* Save all variables describing the current status into the structure *P.
1157 This is used before starting a nested function. */
1160 save_emit_status (p)
1163 p->reg_rtx_no = reg_rtx_no;
1164 p->first_label_num = first_label_num;
1165 p->first_insn = first_insn;
1166 p->last_insn = last_insn;
1167 p->sequence_stack = sequence_stack;
1168 p->cur_insn_uid = cur_insn_uid;
1169 p->last_linenum = last_linenum;
1170 p->last_filename = last_filename;
1171 p->regno_pointer_flag = regno_pointer_flag;
1172 p->regno_pointer_flag_length = regno_pointer_flag_length;
1173 p->regno_reg_rtx = regno_reg_rtx;
1176 /* Restore all variables describing the current status from the structure *P.
1177 This is used after a nested function. */
1180 restore_emit_status (p)
1185 reg_rtx_no = p->reg_rtx_no;
1186 first_label_num = p->first_label_num;
1187 first_insn = p->first_insn;
1188 last_insn = p->last_insn;
1189 sequence_stack = p->sequence_stack;
1190 cur_insn_uid = p->cur_insn_uid;
1191 last_linenum = p->last_linenum;
1192 last_filename = p->last_filename;
1193 regno_pointer_flag = p->regno_pointer_flag;
1194 regno_pointer_flag_length = p->regno_pointer_flag_length;
1195 regno_reg_rtx = p->regno_reg_rtx;
1197 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1198 sequence_element_free_list = 0;
1199 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1200 sequence_result[i] = 0;
1203 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1204 It does not work to do this twice, because the mark bits set here
1205 are not cleared afterwards. */
1208 unshare_all_rtl (insn)
1211 for (; insn; insn = NEXT_INSN (insn))
1212 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1213 || GET_CODE (insn) == CALL_INSN)
1215 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1216 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1217 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1220 /* Make sure the addresses of stack slots found outside the insn chain
1221 (such as, in DECL_RTL of a variable) are not shared
1222 with the insn chain.
1224 This special care is necessary when the stack slot MEM does not
1225 actually appear in the insn chain. If it does appear, its address
1226 is unshared from all else at that point. */
1228 copy_rtx_if_shared (stack_slot_list);
1231 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1232 Recursively does the same for subexpressions. */
1235 copy_rtx_if_shared (orig)
1238 register rtx x = orig;
1240 register enum rtx_code code;
1241 register char *format_ptr;
1247 code = GET_CODE (x);
1249 /* These types may be freely shared. */
1262 /* SCRATCH must be shared because they represent distinct values. */
1271 /* The chain of insns is not being copied. */
1275 /* A MEM is allowed to be shared if its address is constant
1276 or is a constant plus one of the special registers. */
1277 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1278 || XEXP (x, 0) == virtual_stack_vars_rtx
1279 || XEXP (x, 0) == virtual_incoming_args_rtx)
1282 if (GET_CODE (XEXP (x, 0)) == PLUS
1283 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1284 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1285 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1287 /* This MEM can appear in more than one place,
1288 but its address better not be shared with anything else. */
1290 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1296 /* This rtx may not be shared. If it has already been seen,
1297 replace it with a copy of itself. */
1303 copy = rtx_alloc (code);
1304 bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld)
1305 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1311 /* Now scan the subexpressions recursively.
1312 We can store any replaced subexpressions directly into X
1313 since we know X is not shared! Any vectors in X
1314 must be copied if X was copied. */
1316 format_ptr = GET_RTX_FORMAT (code);
1318 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1320 switch (*format_ptr++)
1323 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1327 if (XVEC (x, i) != NULL)
1332 XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0));
1333 for (j = 0; j < XVECLEN (x, i); j++)
1335 = copy_rtx_if_shared (XVECEXP (x, i, j));
1343 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1344 to look for shared sub-parts. */
1347 reset_used_flags (x)
1351 register enum rtx_code code;
1352 register char *format_ptr;
1358 code = GET_CODE (x);
1360 /* These types may be freely shared so we needn't do any reseting
1381 /* The chain of insns is not being copied. */
1387 format_ptr = GET_RTX_FORMAT (code);
1388 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1390 switch (*format_ptr++)
1393 reset_used_flags (XEXP (x, i));
1397 for (j = 0; j < XVECLEN (x, i); j++)
1398 reset_used_flags (XVECEXP (x, i, j));
1404 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1405 Return X or the rtx for the pseudo reg the value of X was copied into.
1406 OTHER must be valid as a SET_DEST. */
1409 make_safe_from (x, other)
1413 switch (GET_CODE (other))
1416 other = SUBREG_REG (other);
1418 case STRICT_LOW_PART:
1421 other = XEXP (other, 0);
1427 if ((GET_CODE (other) == MEM
1429 && GET_CODE (x) != REG
1430 && GET_CODE (x) != SUBREG)
1431 || (GET_CODE (other) == REG
1432 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1433 || reg_mentioned_p (other, x))))
1435 rtx temp = gen_reg_rtx (GET_MODE (x));
1436 emit_move_insn (temp, x);
1442 /* Emission of insns (adding them to the doubly-linked list). */
1444 /* Return the first insn of the current sequence or current function. */
1452 /* Return the last insn emitted in current sequence or current function. */
1460 /* Specify a new insn as the last in the chain. */
1463 set_last_insn (insn)
1466 if (NEXT_INSN (insn) != 0)
1471 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1474 get_last_insn_anywhere ()
1476 struct sequence_stack *stack;
1479 for (stack = sequence_stack; stack; stack = stack->next)
1480 if (stack->last != 0)
1485 /* Return a number larger than any instruction's uid in this function. */
1490 return cur_insn_uid;
1493 /* Return the next insn. If it is a SEQUENCE, return the first insn
1502 insn = NEXT_INSN (insn);
1503 if (insn && GET_CODE (insn) == INSN
1504 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1505 insn = XVECEXP (PATTERN (insn), 0, 0);
1511 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1515 previous_insn (insn)
1520 insn = PREV_INSN (insn);
1521 if (insn && GET_CODE (insn) == INSN
1522 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1523 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1529 /* Return the next insn after INSN that is not a NOTE. This routine does not
1530 look inside SEQUENCEs. */
1533 next_nonnote_insn (insn)
1538 insn = NEXT_INSN (insn);
1539 if (insn == 0 || GET_CODE (insn) != NOTE)
1546 /* Return the previous insn before INSN that is not a NOTE. This routine does
1547 not look inside SEQUENCEs. */
1550 prev_nonnote_insn (insn)
1555 insn = PREV_INSN (insn);
1556 if (insn == 0 || GET_CODE (insn) != NOTE)
1563 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1564 or 0, if there is none. This routine does not look inside
1568 next_real_insn (insn)
1573 insn = NEXT_INSN (insn);
1574 if (insn == 0 || GET_CODE (insn) == INSN
1575 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1582 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1583 or 0, if there is none. This routine does not look inside
1587 prev_real_insn (insn)
1592 insn = PREV_INSN (insn);
1593 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1594 || GET_CODE (insn) == JUMP_INSN)
1601 /* Find the next insn after INSN that really does something. This routine
1602 does not look inside SEQUENCEs. Until reload has completed, this is the
1603 same as next_real_insn. */
1606 next_active_insn (insn)
1611 insn = NEXT_INSN (insn);
1613 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1614 || (GET_CODE (insn) == INSN
1615 && (! reload_completed
1616 || (GET_CODE (PATTERN (insn)) != USE
1617 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1624 /* Find the last insn before INSN that really does something. This routine
1625 does not look inside SEQUENCEs. Until reload has completed, this is the
1626 same as prev_real_insn. */
1629 prev_active_insn (insn)
1634 insn = PREV_INSN (insn);
1636 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1637 || (GET_CODE (insn) == INSN
1638 && (! reload_completed
1639 || (GET_CODE (PATTERN (insn)) != USE
1640 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1647 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1655 insn = NEXT_INSN (insn);
1656 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1663 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1671 insn = PREV_INSN (insn);
1672 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1680 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1681 and REG_CC_USER notes so we can find it. */
1684 link_cc0_insns (insn)
1687 rtx user = next_nonnote_insn (insn);
1689 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
1690 user = XVECEXP (PATTERN (user), 0, 0);
1692 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
1694 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
1697 /* Return the next insn that uses CC0 after INSN, which is assumed to
1698 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1699 applied to the result of this function should yield INSN).
1701 Normally, this is simply the next insn. However, if a REG_CC_USER note
1702 is present, it contains the insn that uses CC0.
1704 Return 0 if we can't find the insn. */
1707 next_cc0_user (insn)
1710 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
1713 return XEXP (note, 0);
1715 insn = next_nonnote_insn (insn);
1716 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1717 insn = XVECEXP (PATTERN (insn), 0, 0);
1719 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1720 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
1726 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1727 note, it is the previous insn. */
1730 prev_cc0_setter (insn)
1733 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1737 return XEXP (note, 0);
1739 insn = prev_nonnote_insn (insn);
1740 if (! sets_cc0_p (PATTERN (insn)))
1747 /* Try splitting insns that can be split for better scheduling.
1748 PAT is the pattern which might split.
1749 TRIAL is the insn providing PAT.
1750 BACKWARDS is non-zero if we are scanning insns from last to first.
1752 If this routine succeeds in splitting, it returns the first or last
1753 replacement insn depending on the value of BACKWARDS. Otherwise, it
1754 returns TRIAL. If the insn to be returned can be split, it will be. */
1757 try_split (pat, trial, backwards)
1761 rtx before = PREV_INSN (trial);
1762 rtx after = NEXT_INSN (trial);
1763 rtx seq = split_insns (pat, trial);
1764 int has_barrier = 0;
1767 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
1768 We may need to handle this specially. */
1769 if (after && GET_CODE (after) == BARRIER)
1772 after = NEXT_INSN (after);
1777 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
1778 The latter case will normally arise only when being done so that
1779 it, in turn, will be split (SFmode on the 29k is an example). */
1780 if (GET_CODE (seq) == SEQUENCE)
1782 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
1783 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
1784 increment the usage count so we don't delete the label. */
1787 if (GET_CODE (trial) == JUMP_INSN)
1788 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
1789 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
1791 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
1793 if (JUMP_LABEL (trial))
1794 LABEL_NUSES (JUMP_LABEL (trial))++;
1797 tem = emit_insn_after (seq, before);
1799 delete_insn (trial);
1801 emit_barrier_after (tem);
1803 /* Avoid infinite loop if the result matches the original pattern. */
1804 else if (rtx_equal_p (seq, pat))
1808 PATTERN (trial) = seq;
1809 INSN_CODE (trial) = -1;
1812 /* Set TEM to the insn we should return. */
1813 tem = backwards ? prev_active_insn (after) : next_active_insn (before);
1814 return try_split (PATTERN (tem), tem, backwards);
1820 /* Make and return an INSN rtx, initializing all its slots.
1821 Store PATTERN in the pattern slots. */
1824 make_insn_raw (pattern)
1829 insn = rtx_alloc(INSN);
1830 INSN_UID(insn) = cur_insn_uid++;
1832 PATTERN (insn) = pattern;
1833 INSN_CODE (insn) = -1;
1834 LOG_LINKS(insn) = NULL;
1835 REG_NOTES(insn) = NULL;
1840 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
1843 make_jump_insn_raw (pattern)
1848 insn = rtx_alloc (JUMP_INSN);
1849 INSN_UID(insn) = cur_insn_uid++;
1851 PATTERN (insn) = pattern;
1852 INSN_CODE (insn) = -1;
1853 LOG_LINKS(insn) = NULL;
1854 REG_NOTES(insn) = NULL;
1855 JUMP_LABEL(insn) = NULL;
1860 /* Add INSN to the end of the doubly-linked list.
1861 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
1867 PREV_INSN (insn) = last_insn;
1868 NEXT_INSN (insn) = 0;
1870 if (NULL != last_insn)
1871 NEXT_INSN (last_insn) = insn;
1873 if (NULL == first_insn)
1879 /* Add INSN into the doubly-linked list after insn AFTER. This should be the
1880 only function called to insert an insn once delay slots have been filled
1881 since only it knows how to update a SEQUENCE. */
1884 add_insn_after (insn, after)
1887 rtx next = NEXT_INSN (after);
1889 NEXT_INSN (insn) = next;
1890 PREV_INSN (insn) = after;
1894 PREV_INSN (next) = insn;
1895 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
1896 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
1898 else if (last_insn == after)
1902 struct sequence_stack *stack = sequence_stack;
1903 /* Scan all pending sequences too. */
1904 for (; stack; stack = stack->next)
1905 if (after == stack->last)
1909 NEXT_INSN (after) = insn;
1910 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
1912 rtx sequence = PATTERN (after);
1913 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
1917 /* Delete all insns made since FROM.
1918 FROM becomes the new last instruction. */
1921 delete_insns_since (from)
1927 NEXT_INSN (from) = 0;
1931 /* Move a consecutive bunch of insns to a different place in the chain.
1932 The insns to be moved are those between FROM and TO.
1933 They are moved to a new position after the insn AFTER.
1934 AFTER must not be FROM or TO or any insn in between.
1936 This function does not know about SEQUENCEs and hence should not be
1937 called after delay-slot filling has been done. */
1940 reorder_insns (from, to, after)
1941 rtx from, to, after;
1943 /* Splice this bunch out of where it is now. */
1944 if (PREV_INSN (from))
1945 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
1947 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
1948 if (last_insn == to)
1949 last_insn = PREV_INSN (from);
1950 if (first_insn == from)
1951 first_insn = NEXT_INSN (to);
1953 /* Make the new neighbors point to it and it to them. */
1954 if (NEXT_INSN (after))
1955 PREV_INSN (NEXT_INSN (after)) = to;
1957 NEXT_INSN (to) = NEXT_INSN (after);
1958 PREV_INSN (from) = after;
1959 NEXT_INSN (after) = from;
1960 if (after == last_insn)
1964 /* Return the line note insn preceding INSN. */
1967 find_line_note (insn)
1970 if (no_line_numbers)
1973 for (; insn; insn = PREV_INSN (insn))
1974 if (GET_CODE (insn) == NOTE
1975 && NOTE_LINE_NUMBER (insn) >= 0)
1981 /* Like reorder_insns, but inserts line notes to preserve the line numbers
1982 of the moved insns when debugging. This may insert a note between AFTER
1983 and FROM, and another one after TO. */
1986 reorder_insns_with_line_notes (from, to, after)
1987 rtx from, to, after;
1989 rtx from_line = find_line_note (from);
1990 rtx after_line = find_line_note (after);
1992 reorder_insns (from, to, after);
1994 if (from_line == after_line)
1998 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
1999 NOTE_LINE_NUMBER (from_line),
2002 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2003 NOTE_LINE_NUMBER (after_line),
2007 /* Emit an insn of given code and pattern
2008 at a specified place within the doubly-linked list. */
2010 /* Make an instruction with body PATTERN
2011 and output it before the instruction BEFORE. */
2014 emit_insn_before (pattern, before)
2015 register rtx pattern, before;
2017 register rtx insn = before;
2019 if (GET_CODE (pattern) == SEQUENCE)
2023 for (i = 0; i < XVECLEN (pattern, 0); i++)
2025 insn = XVECEXP (pattern, 0, i);
2026 add_insn_after (insn, PREV_INSN (before));
2028 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2029 sequence_result[XVECLEN (pattern, 0)] = pattern;
2033 insn = make_insn_raw (pattern);
2034 add_insn_after (insn, PREV_INSN (before));
2040 /* Make an instruction with body PATTERN and code JUMP_INSN
2041 and output it before the instruction BEFORE. */
2044 emit_jump_insn_before (pattern, before)
2045 register rtx pattern, before;
2049 if (GET_CODE (pattern) == SEQUENCE)
2050 insn = emit_insn_before (pattern, before);
2053 insn = make_jump_insn_raw (pattern, NULL_RTVEC);
2054 add_insn_after (insn, PREV_INSN (before));
2060 /* Make an instruction with body PATTERN and code CALL_INSN
2061 and output it before the instruction BEFORE. */
2064 emit_call_insn_before (pattern, before)
2065 register rtx pattern, before;
2067 rtx insn = emit_insn_before (pattern, before);
2068 PUT_CODE (insn, CALL_INSN);
2072 /* Make an insn of code BARRIER
2073 and output it before the insn AFTER. */
2076 emit_barrier_before (before)
2077 register rtx before;
2079 register rtx insn = rtx_alloc (BARRIER);
2081 INSN_UID (insn) = cur_insn_uid++;
2083 add_insn_after (insn, PREV_INSN (before));
2087 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2090 emit_note_before (subtype, before)
2094 register rtx note = rtx_alloc (NOTE);
2095 INSN_UID (note) = cur_insn_uid++;
2096 NOTE_SOURCE_FILE (note) = 0;
2097 NOTE_LINE_NUMBER (note) = subtype;
2099 add_insn_after (note, PREV_INSN (before));
2103 /* Make an insn of code INSN with body PATTERN
2104 and output it after the insn AFTER. */
2107 emit_insn_after (pattern, after)
2108 register rtx pattern, after;
2110 register rtx insn = after;
2112 if (GET_CODE (pattern) == SEQUENCE)
2116 for (i = 0; i < XVECLEN (pattern, 0); i++)
2118 insn = XVECEXP (pattern, 0, i);
2119 add_insn_after (insn, after);
2122 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2123 sequence_result[XVECLEN (pattern, 0)] = pattern;
2127 insn = make_insn_raw (pattern);
2128 add_insn_after (insn, after);
2134 /* Similar to emit_insn_after, except that line notes are to be inserted so
2135 as to act as if this insn were at FROM. */
2138 emit_insn_after_with_line_notes (pattern, after, from)
2139 rtx pattern, after, from;
2141 rtx from_line = find_line_note (from);
2142 rtx after_line = find_line_note (after);
2143 rtx insn = emit_insn_after (pattern, after);
2146 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2147 NOTE_LINE_NUMBER (from_line),
2151 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2152 NOTE_LINE_NUMBER (after_line),
2156 /* Make an insn of code JUMP_INSN with body PATTERN
2157 and output it after the insn AFTER. */
2160 emit_jump_insn_after (pattern, after)
2161 register rtx pattern, after;
2165 if (GET_CODE (pattern) == SEQUENCE)
2166 insn = emit_insn_after (pattern, after);
2169 insn = make_jump_insn_raw (pattern, NULL_RTVEC);
2170 add_insn_after (insn, after);
2176 /* Make an insn of code BARRIER
2177 and output it after the insn AFTER. */
2180 emit_barrier_after (after)
2183 register rtx insn = rtx_alloc (BARRIER);
2185 INSN_UID (insn) = cur_insn_uid++;
2187 add_insn_after (insn, after);
2191 /* Emit the label LABEL after the insn AFTER. */
2194 emit_label_after (label, after)
2197 /* This can be called twice for the same label
2198 as a result of the confusion that follows a syntax error!
2199 So make it harmless. */
2200 if (INSN_UID (label) == 0)
2202 INSN_UID (label) = cur_insn_uid++;
2203 add_insn_after (label, after);
2209 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2212 emit_note_after (subtype, after)
2216 register rtx note = rtx_alloc (NOTE);
2217 INSN_UID (note) = cur_insn_uid++;
2218 NOTE_SOURCE_FILE (note) = 0;
2219 NOTE_LINE_NUMBER (note) = subtype;
2220 add_insn_after (note, after);
2224 /* Emit a line note for FILE and LINE after the insn AFTER. */
2227 emit_line_note_after (file, line, after)
2234 if (no_line_numbers && line > 0)
2240 note = rtx_alloc (NOTE);
2241 INSN_UID (note) = cur_insn_uid++;
2242 NOTE_SOURCE_FILE (note) = file;
2243 NOTE_LINE_NUMBER (note) = line;
2244 add_insn_after (note, after);
2248 /* Make an insn of code INSN with pattern PATTERN
2249 and add it to the end of the doubly-linked list.
2250 If PATTERN is a SEQUENCE, take the elements of it
2251 and emit an insn for each element.
2253 Returns the last insn emitted. */
2259 rtx insn = last_insn;
2261 if (GET_CODE (pattern) == SEQUENCE)
2265 for (i = 0; i < XVECLEN (pattern, 0); i++)
2267 insn = XVECEXP (pattern, 0, i);
2270 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2271 sequence_result[XVECLEN (pattern, 0)] = pattern;
2275 insn = make_insn_raw (pattern);
2282 /* Emit the insns in a chain starting with INSN.
2283 Return the last insn emitted. */
2293 rtx next = NEXT_INSN (insn);
2302 /* Emit the insns in a chain starting with INSN and place them in front of
2303 the insn BEFORE. Return the last insn emitted. */
2306 emit_insns_before (insn, before)
2314 rtx next = NEXT_INSN (insn);
2315 add_insn_after (insn, PREV_INSN (before));
2323 /* Emit the insns in a chain starting with FIRST and place them in back of
2324 the insn AFTER. Return the last insn emitted. */
2327 emit_insns_after (first, after)
2332 register rtx after_after;
2340 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2343 after_after = NEXT_INSN (after);
2345 NEXT_INSN (after) = first;
2346 PREV_INSN (first) = after;
2347 NEXT_INSN (last) = after_after;
2349 PREV_INSN (after_after) = last;
2351 if (after == last_insn)
2356 /* Make an insn of code JUMP_INSN with pattern PATTERN
2357 and add it to the end of the doubly-linked list. */
2360 emit_jump_insn (pattern)
2363 if (GET_CODE (pattern) == SEQUENCE)
2364 return emit_insn (pattern);
2367 register rtx insn = make_jump_insn_raw (pattern, NULL_RTVEC);
2373 /* Make an insn of code CALL_INSN with pattern PATTERN
2374 and add it to the end of the doubly-linked list. */
2377 emit_call_insn (pattern)
2380 if (GET_CODE (pattern) == SEQUENCE)
2381 return emit_insn (pattern);
2384 register rtx insn = make_insn_raw (pattern);
2386 PUT_CODE (insn, CALL_INSN);
2391 /* Add the label LABEL to the end of the doubly-linked list. */
2397 /* This can be called twice for the same label
2398 as a result of the confusion that follows a syntax error!
2399 So make it harmless. */
2400 if (INSN_UID (label) == 0)
2402 INSN_UID (label) = cur_insn_uid++;
2408 /* Make an insn of code BARRIER
2409 and add it to the end of the doubly-linked list. */
2414 register rtx barrier = rtx_alloc (BARRIER);
2415 INSN_UID (barrier) = cur_insn_uid++;
2420 /* Make an insn of code NOTE
2421 with data-fields specified by FILE and LINE
2422 and add it to the end of the doubly-linked list,
2423 but only if line-numbers are desired for debugging info. */
2426 emit_line_note (file, line)
2430 emit_filename = file;
2434 if (no_line_numbers)
2438 return emit_note (file, line);
2441 /* Make an insn of code NOTE
2442 with data-fields specified by FILE and LINE
2443 and add it to the end of the doubly-linked list.
2444 If it is a line-number NOTE, omit it if it matches the previous one. */
2447 emit_note (file, line)
2455 if (file && last_filename && !strcmp (file, last_filename)
2456 && line == last_linenum)
2458 last_filename = file;
2459 last_linenum = line;
2462 if (no_line_numbers && line > 0)
2468 note = rtx_alloc (NOTE);
2469 INSN_UID (note) = cur_insn_uid++;
2470 NOTE_SOURCE_FILE (note) = file;
2471 NOTE_LINE_NUMBER (note) = line;
2476 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2479 emit_line_note_force (file, line)
2484 return emit_line_note (file, line);
2487 /* Cause next statement to emit a line note even if the line number
2488 has not changed. This is used at the beginning of a function. */
2491 force_next_line_note ()
2496 /* Return an indication of which type of insn should have X as a body.
2497 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2503 if (GET_CODE (x) == CODE_LABEL)
2505 if (GET_CODE (x) == CALL)
2507 if (GET_CODE (x) == RETURN)
2509 if (GET_CODE (x) == SET)
2511 if (SET_DEST (x) == pc_rtx)
2513 else if (GET_CODE (SET_SRC (x)) == CALL)
2518 if (GET_CODE (x) == PARALLEL)
2521 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2522 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2524 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2525 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2527 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2528 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2534 /* Emit the rtl pattern X as an appropriate kind of insn.
2535 If X is a label, it is simply added into the insn chain. */
2541 enum rtx_code code = classify_insn (x);
2543 if (code == CODE_LABEL)
2544 return emit_label (x);
2545 else if (code == INSN)
2546 return emit_insn (x);
2547 else if (code == JUMP_INSN)
2549 register rtx insn = emit_jump_insn (x);
2550 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2551 return emit_barrier ();
2554 else if (code == CALL_INSN)
2555 return emit_call_insn (x);
2560 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2565 struct sequence_stack *tem;
2567 if (sequence_element_free_list)
2569 /* Reuse a previously-saved struct sequence_stack. */
2570 tem = sequence_element_free_list;
2571 sequence_element_free_list = tem->next;
2574 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
2576 tem->next = sequence_stack;
2577 tem->first = first_insn;
2578 tem->last = last_insn;
2580 sequence_stack = tem;
2586 /* Set up the insn chain starting with FIRST
2587 as the current sequence, saving the previously current one. */
2590 push_to_sequence (first)
2597 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
2603 /* After emitting to a sequence, restore previous saved state.
2605 To get the contents of the sequence just made,
2606 you must call `gen_sequence' *before* calling here. */
2611 struct sequence_stack *tem = sequence_stack;
2613 first_insn = tem->first;
2614 last_insn = tem->last;
2615 sequence_stack = tem->next;
2617 tem->next = sequence_element_free_list;
2618 sequence_element_free_list = tem;
2621 /* Return 1 if currently emitting into a sequence. */
2626 return sequence_stack != 0;
2629 /* Generate a SEQUENCE rtx containing the insns already emitted
2630 to the current sequence.
2632 This is how the gen_... function from a DEFINE_EXPAND
2633 constructs the SEQUENCE that it returns. */
2644 /* Count the insns in the chain. */
2646 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
2649 /* If only one insn, return its pattern rather than a SEQUENCE.
2650 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
2651 the case of an empty list.) */
2653 && (GET_CODE (first_insn) == INSN
2654 || GET_CODE (first_insn) == JUMP_INSN
2655 || GET_CODE (first_insn) == CALL_INSN))
2656 return PATTERN (first_insn);
2658 /* Put them in a vector. See if we already have a SEQUENCE of the
2659 appropriate length around. */
2660 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
2661 sequence_result[len] = 0;
2664 /* Ensure that this rtl goes in saveable_obstack, since we may be
2666 int in_current_obstack = rtl_in_saveable_obstack ();
2667 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
2668 if (in_current_obstack)
2669 rtl_in_current_obstack ();
2672 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
2673 XVECEXP (result, 0, i) = tem;
2678 /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
2679 according to the chain of insns starting with FIRST.
2681 Also set cur_insn_uid to exceed the largest uid in that chain.
2683 This is used when an inline function's rtl is saved
2684 and passed to rest_of_compilation later. */
2686 static void restore_reg_data_1 ();
2689 restore_reg_data (first)
2694 register int max_uid = 0;
2696 for (insn = first; insn; insn = NEXT_INSN (insn))
2698 if (INSN_UID (insn) >= max_uid)
2699 max_uid = INSN_UID (insn);
2701 switch (GET_CODE (insn))
2711 restore_reg_data_1 (PATTERN (insn));
2716 /* Don't duplicate the uids already in use. */
2717 cur_insn_uid = max_uid + 1;
2719 /* If any regs are missing, make them up.
2721 ??? word_mode is not necessarily the right mode. Most likely these REGs
2722 are never used. At some point this should be checked. */
2724 for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++)
2725 if (regno_reg_rtx[i] == 0)
2726 regno_reg_rtx[i] = gen_rtx (REG, word_mode, i);
2730 restore_reg_data_1 (orig)
2733 register rtx x = orig;
2735 register enum rtx_code code;
2736 register char *format_ptr;
2738 code = GET_CODE (x);
2753 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
2755 /* Make sure regno_pointer_flag and regno_reg_rtx are large
2756 enough to have an element for this pseudo reg number. */
2757 if (REGNO (x) >= reg_rtx_no)
2759 reg_rtx_no = REGNO (x);
2761 if (reg_rtx_no >= regno_pointer_flag_length)
2763 int newlen = MAX (regno_pointer_flag_length * 2,
2766 char *new = (char *) oballoc (newlen);
2767 bzero (new, newlen);
2768 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
2770 new1 = (rtx *) oballoc (newlen * sizeof (rtx));
2771 bzero (new1, newlen * sizeof (rtx));
2772 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
2774 regno_pointer_flag = new;
2775 regno_reg_rtx = new1;
2776 regno_pointer_flag_length = newlen;
2780 regno_reg_rtx[REGNO (x)] = x;
2785 if (GET_CODE (XEXP (x, 0)) == REG)
2786 mark_reg_pointer (XEXP (x, 0));
2787 restore_reg_data_1 (XEXP (x, 0));
2791 /* Now scan the subexpressions recursively. */
2793 format_ptr = GET_RTX_FORMAT (code);
2795 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2797 switch (*format_ptr++)
2800 restore_reg_data_1 (XEXP (x, i));
2804 if (XVEC (x, i) != NULL)
2808 for (j = 0; j < XVECLEN (x, i); j++)
2809 restore_reg_data_1 (XVECEXP (x, i, j));
2816 /* Initialize data structures and variables in this file
2817 before generating rtl for each function. */
2827 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
2830 first_label_num = label_num;
2833 /* Clear the start_sequence/gen_sequence cache. */
2834 sequence_element_free_list = 0;
2835 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
2836 sequence_result[i] = 0;
2838 /* Init the tables that describe all the pseudo regs. */
2840 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
2843 = (char *) oballoc (regno_pointer_flag_length);
2844 bzero (regno_pointer_flag, regno_pointer_flag_length);
2847 = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx));
2848 bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
2850 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
2851 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
2852 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
2853 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
2854 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
2856 /* Indicate that the virtual registers and stack locations are
2858 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
2859 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
2860 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
2862 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
2863 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
2864 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
2865 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
2868 /* Create some permanent unique rtl objects shared between all functions.
2869 LINE_NUMBERS is nonzero if line numbers are to be generated. */
2872 init_emit_once (line_numbers)
2876 enum machine_mode mode;
2878 no_line_numbers = ! line_numbers;
2880 sequence_stack = NULL;
2882 /* Create the unique rtx's for certain rtx codes and operand values. */
2884 pc_rtx = gen_rtx (PC, VOIDmode);
2885 cc0_rtx = gen_rtx (CC0, VOIDmode);
2887 /* Don't use gen_rtx here since gen_rtx in this case
2888 tries to use these variables. */
2889 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
2891 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
2892 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
2893 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
2896 /* These four calls obtain some of the rtx expressions made above. */
2897 const0_rtx = GEN_INT (0);
2898 const1_rtx = GEN_INT (1);
2899 const2_rtx = GEN_INT (2);
2900 constm1_rtx = GEN_INT (-1);
2902 /* This will usually be one of the above constants, but may be a new rtx. */
2903 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
2905 dconst0 = REAL_VALUE_ATOF ("0");
2906 dconst1 = REAL_VALUE_ATOF ("1");
2907 dconst2 = REAL_VALUE_ATOF ("2");
2908 dconstm1 = REAL_VALUE_ATOF ("-1");
2910 for (i = 0; i <= 2; i++)
2912 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
2913 mode = GET_MODE_WIDER_MODE (mode))
2915 rtx tem = rtx_alloc (CONST_DOUBLE);
2916 union real_extract u;
2918 bzero (&u, sizeof u); /* Zero any holes in a structure. */
2919 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
2921 bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u);
2922 CONST_DOUBLE_MEM (tem) = cc0_rtx;
2923 PUT_MODE (tem, mode);
2925 const_tiny_rtx[i][(int) mode] = tem;
2928 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
2930 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2931 mode = GET_MODE_WIDER_MODE (mode))
2932 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
2935 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
2936 mode = GET_MODE_WIDER_MODE (mode))
2937 const_tiny_rtx[0][(int) mode] = const0_rtx;
2939 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
2940 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
2942 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
2943 arg_pointer_rtx = frame_pointer_rtx;
2944 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
2945 arg_pointer_rtx = stack_pointer_rtx;
2947 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
2949 /* Create the virtual registers. Do so here since the following objects
2950 might reference them. */
2952 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
2953 VIRTUAL_INCOMING_ARGS_REGNUM);
2954 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
2955 VIRTUAL_STACK_VARS_REGNUM);
2956 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
2957 VIRTUAL_STACK_DYNAMIC_REGNUM);
2958 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
2959 VIRTUAL_OUTGOING_ARGS_REGNUM);
2962 struct_value_rtx = STRUCT_VALUE;
2964 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
2967 #ifdef STRUCT_VALUE_INCOMING
2968 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
2970 #ifdef STRUCT_VALUE_INCOMING_REGNUM
2971 struct_value_incoming_rtx
2972 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
2974 struct_value_incoming_rtx = struct_value_rtx;
2978 #ifdef STATIC_CHAIN_REGNUM
2979 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
2981 #ifdef STATIC_CHAIN_INCOMING_REGNUM
2982 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
2983 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
2986 static_chain_incoming_rtx = static_chain_rtx;
2990 static_chain_rtx = STATIC_CHAIN;
2992 #ifdef STATIC_CHAIN_INCOMING
2993 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
2995 static_chain_incoming_rtx = static_chain_rtx;
2999 #ifdef PIC_OFFSET_TABLE_REGNUM
3000 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);