1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl[GR_MAX];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab;
147 /* A hash table storing memory attribute structures. */
148 static htab_t mem_attrs_htab;
150 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
151 shortly thrown away. We use two mechanisms to prevent this waste:
153 For sizes up to 5 elements, we keep a SEQUENCE and its associated
154 rtvec for use by gen_sequence. One entry for each size is
155 sufficient because most cases are calls to gen_sequence followed by
156 immediately emitting the SEQUENCE. Reuse is safe since emitting a
157 sequence is destructive on the insn in it anyway and hence can't be
160 We do not bother to save this cached data over nested function calls.
161 Instead, we just reinitialize them. */
163 #define SEQUENCE_RESULT_SIZE 5
165 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
167 /* During RTL generation, we also keep a list of free INSN rtl codes. */
168 static rtx free_insn;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_linenum (cfun->emit->x_last_linenum)
174 #define last_filename (cfun->emit->x_last_filename)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw PARAMS ((rtx));
178 static rtx make_call_insn_raw PARAMS ((rtx));
179 static rtx find_line_note PARAMS ((rtx));
180 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
181 static void unshare_all_rtl_1 PARAMS ((rtx));
182 static void unshare_all_decls PARAMS ((tree));
183 static void reset_used_decls PARAMS ((tree));
184 static void mark_label_nuses PARAMS ((rtx));
185 static hashval_t const_int_htab_hash PARAMS ((const void *));
186 static int const_int_htab_eq PARAMS ((const void *,
188 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
189 static int mem_attrs_htab_eq PARAMS ((const void *,
191 static void mem_attrs_mark PARAMS ((const void *));
192 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
195 /* Probability of the conditional branch currently proceeded by try_split.
196 Set to -1 otherwise. */
197 int split_branch_probability = -1;
199 /* Returns a hash code for X (which is a really a CONST_INT). */
202 const_int_htab_hash (x)
205 return (hashval_t) INTVAL ((const struct rtx_def *) x);
208 /* Returns non-zero if the value represented by X (which is really a
209 CONST_INT) is the same as that given by Y (which is really a
213 const_int_htab_eq (x, y)
217 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
220 /* Returns a hash code for X (which is a really a mem_attrs *). */
223 mem_attrs_htab_hash (x)
226 mem_attrs *p = (mem_attrs *) x;
228 return (p->alias ^ (p->align * 1000)
229 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
230 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
234 /* Returns non-zero if the value represented by X (which is really a
235 mem_attrs *) is the same as that given by Y (which is also really a
239 mem_attrs_htab_eq (x, y)
243 mem_attrs *p = (mem_attrs *) x;
244 mem_attrs *q = (mem_attrs *) y;
246 return (p->alias == q->alias && p->decl == q->decl && p->offset == q->offset
247 && p->size == q->size && p->align == q->align);
250 /* This routine is called when we determine that we need a mem_attrs entry.
251 It marks the associated decl and RTL as being used, if present. */
257 mem_attrs *p = (mem_attrs *) x;
260 ggc_mark_tree (p->decl);
263 ggc_mark_rtx (p->offset);
266 ggc_mark_rtx (p->size);
269 /* Allocate a new mem_attrs structure and insert it into the hash table if
270 one identical to it is not already in the table. */
273 get_mem_attrs (alias, decl, offset, size, align)
285 attrs.offset = offset;
289 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
292 *slot = ggc_alloc (sizeof (mem_attrs));
293 memcpy (*slot, &attrs, sizeof (mem_attrs));
299 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
300 don't attempt to share with the various global pieces of rtl (such as
301 frame_pointer_rtx). */
304 gen_raw_REG (mode, regno)
305 enum machine_mode mode;
308 rtx x = gen_rtx_raw_REG (mode, regno);
309 ORIGINAL_REGNO (x) = regno;
313 /* There are some RTL codes that require special attention; the generation
314 functions do the raw handling. If you add to this list, modify
315 special_rtx in gengenrtl.c as well. */
318 gen_rtx_CONST_INT (mode, arg)
319 enum machine_mode mode ATTRIBUTE_UNUSED;
324 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
325 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
327 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
328 if (const_true_rtx && arg == STORE_FLAG_VALUE)
329 return const_true_rtx;
332 /* Look up the CONST_INT in the hash table. */
333 slot = htab_find_slot_with_hash (const_int_htab, &arg,
334 (hashval_t) arg, INSERT);
336 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
341 /* CONST_DOUBLEs needs special handling because their length is known
345 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
346 enum machine_mode mode;
348 HOST_WIDE_INT arg1, arg2;
350 rtx r = rtx_alloc (CONST_DOUBLE);
355 X0EXP (r, 1) = NULL_RTX;
359 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
366 gen_rtx_REG (mode, regno)
367 enum machine_mode mode;
370 /* In case the MD file explicitly references the frame pointer, have
371 all such references point to the same frame pointer. This is
372 used during frame pointer elimination to distinguish the explicit
373 references to these registers from pseudos that happened to be
376 If we have eliminated the frame pointer or arg pointer, we will
377 be using it as a normal register, for example as a spill
378 register. In such cases, we might be accessing it in a mode that
379 is not Pmode and therefore cannot use the pre-allocated rtx.
381 Also don't do this when we are making new REGs in reload, since
382 we don't want to get confused with the real pointers. */
384 if (mode == Pmode && !reload_in_progress)
386 if (regno == FRAME_POINTER_REGNUM)
387 return frame_pointer_rtx;
388 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
389 if (regno == HARD_FRAME_POINTER_REGNUM)
390 return hard_frame_pointer_rtx;
392 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
393 if (regno == ARG_POINTER_REGNUM)
394 return arg_pointer_rtx;
396 #ifdef RETURN_ADDRESS_POINTER_REGNUM
397 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
398 return return_address_pointer_rtx;
400 if (regno == STACK_POINTER_REGNUM)
401 return stack_pointer_rtx;
404 return gen_raw_REG (mode, regno);
408 gen_rtx_MEM (mode, addr)
409 enum machine_mode mode;
412 rtx rt = gen_rtx_raw_MEM (mode, addr);
414 /* This field is not cleared by the mere allocation of the rtx, so
422 gen_rtx_SUBREG (mode, reg, offset)
423 enum machine_mode mode;
427 /* This is the most common failure type.
428 Catch it early so we can see who does it. */
429 if ((offset % GET_MODE_SIZE (mode)) != 0)
432 /* This check isn't usable right now because combine will
433 throw arbitrary crap like a CALL into a SUBREG in
434 gen_lowpart_for_combine so we must just eat it. */
436 /* Check for this too. */
437 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
440 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
443 /* Generate a SUBREG representing the least-significant part of REG if MODE
444 is smaller than mode of REG, otherwise paradoxical SUBREG. */
447 gen_lowpart_SUBREG (mode, reg)
448 enum machine_mode mode;
451 enum machine_mode inmode;
453 inmode = GET_MODE (reg);
454 if (inmode == VOIDmode)
456 return gen_rtx_SUBREG (mode, reg,
457 subreg_lowpart_offset (mode, inmode));
460 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
462 ** This routine generates an RTX of the size specified by
463 ** <code>, which is an RTX code. The RTX structure is initialized
464 ** from the arguments <element1> through <elementn>, which are
465 ** interpreted according to the specific RTX type's format. The
466 ** special machine mode associated with the rtx (if any) is specified
469 ** gen_rtx can be invoked in a way which resembles the lisp-like
470 ** rtx it will generate. For example, the following rtx structure:
472 ** (plus:QI (mem:QI (reg:SI 1))
473 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
475 ** ...would be generated by the following C code:
477 ** gen_rtx (PLUS, QImode,
478 ** gen_rtx (MEM, QImode,
479 ** gen_rtx (REG, SImode, 1)),
480 ** gen_rtx (MEM, QImode,
481 ** gen_rtx (PLUS, SImode,
482 ** gen_rtx (REG, SImode, 2),
483 ** gen_rtx (REG, SImode, 3)))),
488 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
490 register int i; /* Array indices... */
491 register const char *fmt; /* Current rtx's format... */
492 register rtx rt_val; /* RTX to return to caller... */
495 VA_FIXEDARG (p, enum rtx_code, code);
496 VA_FIXEDARG (p, enum machine_mode, mode);
501 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
506 rtx arg0 = va_arg (p, rtx);
507 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
508 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
509 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
514 rt_val = gen_rtx_REG (mode, va_arg (p, int));
518 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
522 rt_val = rtx_alloc (code); /* Allocate the storage space. */
523 rt_val->mode = mode; /* Store the machine mode... */
525 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
526 for (i = 0; i < GET_RTX_LENGTH (code); i++)
530 case '0': /* Unused field. */
533 case 'i': /* An integer? */
534 XINT (rt_val, i) = va_arg (p, int);
537 case 'w': /* A wide integer? */
538 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
541 case 's': /* A string? */
542 XSTR (rt_val, i) = va_arg (p, char *);
545 case 'e': /* An expression? */
546 case 'u': /* An insn? Same except when printing. */
547 XEXP (rt_val, i) = va_arg (p, rtx);
550 case 'E': /* An RTX vector? */
551 XVEC (rt_val, i) = va_arg (p, rtvec);
554 case 'b': /* A bitmap? */
555 XBITMAP (rt_val, i) = va_arg (p, bitmap);
558 case 't': /* A tree? */
559 XTREE (rt_val, i) = va_arg (p, tree);
573 /* gen_rtvec (n, [rt1, ..., rtn])
575 ** This routine creates an rtvec and stores within it the
576 ** pointers to rtx's which are its arguments.
581 gen_rtvec VPARAMS ((int n, ...))
587 VA_FIXEDARG (p, int, n);
590 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
592 vector = (rtx *) alloca (n * sizeof (rtx));
594 for (i = 0; i < n; i++)
595 vector[i] = va_arg (p, rtx);
597 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
601 return gen_rtvec_v (save_n, vector);
605 gen_rtvec_v (n, argp)
610 register rtvec rt_val;
613 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
615 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
617 for (i = 0; i < n; i++)
618 rt_val->elem[i] = *argp++;
623 /* Generate a REG rtx for a new pseudo register of mode MODE.
624 This pseudo is assigned the next sequential register number. */
628 enum machine_mode mode;
630 struct function *f = cfun;
633 /* Don't let anything called after initial flow analysis create new
638 if (generating_concat_p
639 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
640 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
642 /* For complex modes, don't make a single pseudo.
643 Instead, make a CONCAT of two pseudos.
644 This allows noncontiguous allocation of the real and imaginary parts,
645 which makes much better code. Besides, allocating DCmode
646 pseudos overstrains reload on some machines like the 386. */
647 rtx realpart, imagpart;
648 int size = GET_MODE_UNIT_SIZE (mode);
649 enum machine_mode partmode
650 = mode_for_size (size * BITS_PER_UNIT,
651 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
652 ? MODE_FLOAT : MODE_INT),
655 realpart = gen_reg_rtx (partmode);
656 imagpart = gen_reg_rtx (partmode);
657 return gen_rtx_CONCAT (mode, realpart, imagpart);
660 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
661 to have an element for this pseudo reg number. */
663 if (reg_rtx_no == f->emit->regno_pointer_align_length)
665 int old_size = f->emit->regno_pointer_align_length;
668 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
669 memset (new + old_size, 0, old_size);
670 f->emit->regno_pointer_align = (unsigned char *) new;
672 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
673 old_size * 2 * sizeof (rtx));
674 memset (new1 + old_size, 0, old_size * sizeof (rtx));
675 regno_reg_rtx = new1;
677 f->emit->regno_pointer_align_length = old_size * 2;
680 val = gen_raw_REG (mode, reg_rtx_no);
681 regno_reg_rtx[reg_rtx_no++] = val;
685 /* Identify REG (which may be a CONCAT) as a user register. */
691 if (GET_CODE (reg) == CONCAT)
693 REG_USERVAR_P (XEXP (reg, 0)) = 1;
694 REG_USERVAR_P (XEXP (reg, 1)) = 1;
696 else if (GET_CODE (reg) == REG)
697 REG_USERVAR_P (reg) = 1;
702 /* Identify REG as a probable pointer register and show its alignment
703 as ALIGN, if nonzero. */
706 mark_reg_pointer (reg, align)
710 if (! REG_POINTER (reg))
712 REG_POINTER (reg) = 1;
715 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
717 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
718 /* We can no-longer be sure just how aligned this pointer is */
719 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
722 /* Return 1 plus largest pseudo reg number used in the current function. */
730 /* Return 1 + the largest label number used so far in the current function. */
735 if (last_label_num && label_num == base_label_num)
736 return last_label_num;
740 /* Return first label number used in this function (if any were used). */
743 get_first_label_num ()
745 return first_label_num;
748 /* Return the final regno of X, which is a SUBREG of a hard
751 subreg_hard_regno (x, check_mode)
755 enum machine_mode mode = GET_MODE (x);
756 unsigned int byte_offset, base_regno, final_regno;
757 rtx reg = SUBREG_REG (x);
759 /* This is where we attempt to catch illegal subregs
760 created by the compiler. */
761 if (GET_CODE (x) != SUBREG
762 || GET_CODE (reg) != REG)
764 base_regno = REGNO (reg);
765 if (base_regno >= FIRST_PSEUDO_REGISTER)
767 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
770 /* Catch non-congruent offsets too. */
771 byte_offset = SUBREG_BYTE (x);
772 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
775 final_regno = subreg_regno (x);
780 /* Return a value representing some low-order bits of X, where the number
781 of low-order bits is given by MODE. Note that no conversion is done
782 between floating-point and fixed-point values, rather, the bit
783 representation is returned.
785 This function handles the cases in common between gen_lowpart, below,
786 and two variants in cse.c and combine.c. These are the cases that can
787 be safely handled at all points in the compilation.
789 If this is not a case we can handle, return 0. */
792 gen_lowpart_common (mode, x)
793 enum machine_mode mode;
796 int msize = GET_MODE_SIZE (mode);
797 int xsize = GET_MODE_SIZE (GET_MODE (x));
800 if (GET_MODE (x) == mode)
803 /* MODE must occupy no more words than the mode of X. */
804 if (GET_MODE (x) != VOIDmode
805 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
806 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
809 offset = subreg_lowpart_offset (mode, GET_MODE (x));
811 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
812 && (GET_MODE_CLASS (mode) == MODE_INT
813 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
815 /* If we are getting the low-order part of something that has been
816 sign- or zero-extended, we can either just use the object being
817 extended or make a narrower extension. If we want an even smaller
818 piece than the size of the object being extended, call ourselves
821 This case is used mostly by combine and cse. */
823 if (GET_MODE (XEXP (x, 0)) == mode)
825 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
826 return gen_lowpart_common (mode, XEXP (x, 0));
827 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
828 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
830 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
831 || GET_CODE (x) == CONCAT)
832 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
833 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
834 from the low-order part of the constant. */
835 else if ((GET_MODE_CLASS (mode) == MODE_INT
836 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
837 && GET_MODE (x) == VOIDmode
838 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
840 /* If MODE is twice the host word size, X is already the desired
841 representation. Otherwise, if MODE is wider than a word, we can't
842 do this. If MODE is exactly a word, return just one CONST_INT. */
844 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
846 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
848 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
849 return (GET_CODE (x) == CONST_INT ? x
850 : GEN_INT (CONST_DOUBLE_LOW (x)));
853 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
854 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
855 : CONST_DOUBLE_LOW (x));
857 /* Sign extend to HOST_WIDE_INT. */
858 val = trunc_int_for_mode (val, mode);
860 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
865 #ifndef REAL_ARITHMETIC
866 /* If X is an integral constant but we want it in floating-point, it
867 must be the case that we have a union of an integer and a floating-point
868 value. If the machine-parameters allow it, simulate that union here
869 and return the result. The two-word and single-word cases are
872 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
873 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
874 || flag_pretend_float)
875 && GET_MODE_CLASS (mode) == MODE_FLOAT
876 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
877 && GET_CODE (x) == CONST_INT
878 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
880 union {HOST_WIDE_INT i; float d; } u;
883 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
885 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
886 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
887 || flag_pretend_float)
888 && GET_MODE_CLASS (mode) == MODE_FLOAT
889 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
890 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
891 && GET_MODE (x) == VOIDmode
892 && (sizeof (double) * HOST_BITS_PER_CHAR
893 == 2 * HOST_BITS_PER_WIDE_INT))
895 union {HOST_WIDE_INT i[2]; double d; } u;
896 HOST_WIDE_INT low, high;
898 if (GET_CODE (x) == CONST_INT)
899 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
901 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
903 #ifdef HOST_WORDS_BIG_ENDIAN
904 u.i[0] = high, u.i[1] = low;
906 u.i[0] = low, u.i[1] = high;
909 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
912 /* Similarly, if this is converting a floating-point value into a
913 single-word integer. Only do this is the host and target parameters are
916 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
917 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
918 || flag_pretend_float)
919 && (GET_MODE_CLASS (mode) == MODE_INT
920 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
921 && GET_CODE (x) == CONST_DOUBLE
922 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
923 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
924 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
926 /* Similarly, if this is converting a floating-point value into a
927 two-word integer, we can do this one word at a time and make an
928 integer. Only do this is the host and target parameters are
931 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
932 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
933 || flag_pretend_float)
934 && (GET_MODE_CLASS (mode) == MODE_INT
935 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
936 && GET_CODE (x) == CONST_DOUBLE
937 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
938 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
940 rtx lowpart, highpart;
942 lowpart = constant_subword (x,
943 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
945 highpart = constant_subword (x,
946 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
948 if (lowpart && GET_CODE (lowpart) == CONST_INT
949 && highpart && GET_CODE (highpart) == CONST_INT)
950 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
952 #else /* ifndef REAL_ARITHMETIC */
954 /* When we have a FP emulator, we can handle all conversions between
955 FP and integer operands. This simplifies reload because it
956 doesn't have to deal with constructs like (subreg:DI
957 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
958 /* Single-precision floats are always 32-bits and double-precision
959 floats are always 64-bits. */
961 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
962 && GET_MODE_BITSIZE (mode) == 32
963 && GET_CODE (x) == CONST_INT)
969 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
970 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
972 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
973 && GET_MODE_BITSIZE (mode) == 64
974 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
975 && GET_MODE (x) == VOIDmode)
979 HOST_WIDE_INT low, high;
981 if (GET_CODE (x) == CONST_INT)
984 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
988 low = CONST_DOUBLE_LOW (x);
989 high = CONST_DOUBLE_HIGH (x);
992 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
994 if (WORDS_BIG_ENDIAN)
995 i[0] = high, i[1] = low;
997 i[0] = low, i[1] = high;
999 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1000 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1002 else if ((GET_MODE_CLASS (mode) == MODE_INT
1003 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1004 && GET_CODE (x) == CONST_DOUBLE
1005 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1008 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1009 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1011 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1012 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1015 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
1019 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
1022 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1026 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1032 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1034 #if HOST_BITS_PER_WIDE_INT == 32
1035 return immed_double_const (i[endian], i[1 - endian], mode);
1040 if (HOST_BITS_PER_WIDE_INT != 64)
1043 for (c = 0; c < 4; c++)
1046 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1050 return immed_double_const (((unsigned long) i[endian]) |
1051 (((HOST_WIDE_INT) i[1-endian]) << 32),
1055 return immed_double_const (((unsigned long) i[endian*3]) |
1056 (((HOST_WIDE_INT) i[1+endian]) << 32),
1057 ((unsigned long) i[2-endian]) |
1058 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1066 #endif /* ifndef REAL_ARITHMETIC */
1068 /* Otherwise, we can't do this. */
1072 /* Return the real part (which has mode MODE) of a complex value X.
1073 This always comes at the low address in memory. */
1076 gen_realpart (mode, x)
1077 enum machine_mode mode;
1080 if (WORDS_BIG_ENDIAN
1081 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1083 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1085 ("Can't access real part of complex value in hard register");
1086 else if (WORDS_BIG_ENDIAN)
1087 return gen_highpart (mode, x);
1089 return gen_lowpart (mode, x);
1092 /* Return the imaginary part (which has mode MODE) of a complex value X.
1093 This always comes at the high address in memory. */
1096 gen_imagpart (mode, x)
1097 enum machine_mode mode;
1100 if (WORDS_BIG_ENDIAN)
1101 return gen_lowpart (mode, x);
1102 else if (! WORDS_BIG_ENDIAN
1103 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1105 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1107 ("can't access imaginary part of complex value in hard register");
1109 return gen_highpart (mode, x);
1112 /* Return 1 iff X, assumed to be a SUBREG,
1113 refers to the real part of the complex value in its containing reg.
1114 Complex values are always stored with the real part in the first word,
1115 regardless of WORDS_BIG_ENDIAN. */
1118 subreg_realpart_p (x)
1121 if (GET_CODE (x) != SUBREG)
1124 return ((unsigned int) SUBREG_BYTE (x)
1125 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1128 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1129 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1130 least-significant part of X.
1131 MODE specifies how big a part of X to return;
1132 it usually should not be larger than a word.
1133 If X is a MEM whose address is a QUEUED, the value may be so also. */
1136 gen_lowpart (mode, x)
1137 enum machine_mode mode;
1140 rtx result = gen_lowpart_common (mode, x);
1144 else if (GET_CODE (x) == REG)
1146 /* Must be a hard reg that's not valid in MODE. */
1147 result = gen_lowpart_common (mode, copy_to_reg (x));
1152 else if (GET_CODE (x) == MEM)
1154 /* The only additional case we can do is MEM. */
1155 register int offset = 0;
1156 if (WORDS_BIG_ENDIAN)
1157 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1158 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1160 if (BYTES_BIG_ENDIAN)
1161 /* Adjust the address so that the address-after-the-data
1163 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1164 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1166 return adjust_address (x, mode, offset);
1168 else if (GET_CODE (x) == ADDRESSOF)
1169 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1174 /* Like `gen_lowpart', but refer to the most significant part.
1175 This is used to access the imaginary part of a complex number. */
1178 gen_highpart (mode, x)
1179 enum machine_mode mode;
1182 unsigned int msize = GET_MODE_SIZE (mode);
1185 /* This case loses if X is a subreg. To catch bugs early,
1186 complain if an invalid MODE is used even in other cases. */
1187 if (msize > UNITS_PER_WORD
1188 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1191 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1192 subreg_highpart_offset (mode, GET_MODE (x)));
1194 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1195 the target if we have a MEM. gen_highpart must return a valid operand,
1196 emitting code if necessary to do so. */
1197 if (GET_CODE (result) == MEM)
1198 result = validize_mem (result);
1205 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1206 be VOIDmode constant. */
1208 gen_highpart_mode (outermode, innermode, exp)
1209 enum machine_mode outermode, innermode;
1212 if (GET_MODE (exp) != VOIDmode)
1214 if (GET_MODE (exp) != innermode)
1216 return gen_highpart (outermode, exp);
1218 return simplify_gen_subreg (outermode, exp, innermode,
1219 subreg_highpart_offset (outermode, innermode));
1221 /* Return offset in bytes to get OUTERMODE low part
1222 of the value in mode INNERMODE stored in memory in target format. */
1225 subreg_lowpart_offset (outermode, innermode)
1226 enum machine_mode outermode, innermode;
1228 unsigned int offset = 0;
1229 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1233 if (WORDS_BIG_ENDIAN)
1234 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1235 if (BYTES_BIG_ENDIAN)
1236 offset += difference % UNITS_PER_WORD;
1242 /* Return offset in bytes to get OUTERMODE high part
1243 of the value in mode INNERMODE stored in memory in target format. */
1245 subreg_highpart_offset (outermode, innermode)
1246 enum machine_mode outermode, innermode;
1248 unsigned int offset = 0;
1249 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1251 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1256 if (! WORDS_BIG_ENDIAN)
1257 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1258 if (! BYTES_BIG_ENDIAN)
1259 offset += difference % UNITS_PER_WORD;
1265 /* Return 1 iff X, assumed to be a SUBREG,
1266 refers to the least significant part of its containing reg.
1267 If X is not a SUBREG, always return 1 (it is its own low part!). */
1270 subreg_lowpart_p (x)
1273 if (GET_CODE (x) != SUBREG)
1275 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1278 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1279 == SUBREG_BYTE (x));
1283 /* Helper routine for all the constant cases of operand_subword.
1284 Some places invoke this directly. */
1287 constant_subword (op, offset, mode)
1290 enum machine_mode mode;
1292 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1295 /* If OP is already an integer word, return it. */
1296 if (GET_MODE_CLASS (mode) == MODE_INT
1297 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1300 #ifdef REAL_ARITHMETIC
1301 /* The output is some bits, the width of the target machine's word.
1302 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1304 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1305 && GET_MODE_CLASS (mode) == MODE_FLOAT
1306 && GET_MODE_BITSIZE (mode) == 64
1307 && GET_CODE (op) == CONST_DOUBLE)
1312 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1313 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1315 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1316 which the words are written depends on the word endianness.
1317 ??? This is a potential portability problem and should
1318 be fixed at some point.
1320 We must excercise caution with the sign bit. By definition there
1321 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1322 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1323 So we explicitly mask and sign-extend as necessary. */
1324 if (BITS_PER_WORD == 32)
1327 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1328 return GEN_INT (val);
1330 #if HOST_BITS_PER_WIDE_INT >= 64
1331 else if (BITS_PER_WORD >= 64 && offset == 0)
1333 val = k[! WORDS_BIG_ENDIAN];
1334 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1335 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1336 return GEN_INT (val);
1339 else if (BITS_PER_WORD == 16)
1341 val = k[offset >> 1];
1342 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1344 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1345 return GEN_INT (val);
1350 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1351 && GET_MODE_CLASS (mode) == MODE_FLOAT
1352 && GET_MODE_BITSIZE (mode) > 64
1353 && GET_CODE (op) == CONST_DOUBLE)
1358 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1359 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1361 if (BITS_PER_WORD == 32)
1364 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1365 return GEN_INT (val);
1367 #if HOST_BITS_PER_WIDE_INT >= 64
1368 else if (BITS_PER_WORD >= 64 && offset <= 1)
1370 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1371 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1372 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1373 return GEN_INT (val);
1379 #else /* no REAL_ARITHMETIC */
1380 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1381 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1382 || flag_pretend_float)
1383 && GET_MODE_CLASS (mode) == MODE_FLOAT
1384 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1385 && GET_CODE (op) == CONST_DOUBLE)
1387 /* The constant is stored in the host's word-ordering,
1388 but we want to access it in the target's word-ordering. Some
1389 compilers don't like a conditional inside macro args, so we have two
1390 copies of the return. */
1391 #ifdef HOST_WORDS_BIG_ENDIAN
1392 return GEN_INT (offset == WORDS_BIG_ENDIAN
1393 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1395 return GEN_INT (offset != WORDS_BIG_ENDIAN
1396 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1399 #endif /* no REAL_ARITHMETIC */
1401 /* Single word float is a little harder, since single- and double-word
1402 values often do not have the same high-order bits. We have already
1403 verified that we want the only defined word of the single-word value. */
1404 #ifdef REAL_ARITHMETIC
1405 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1406 && GET_MODE_BITSIZE (mode) == 32
1407 && GET_CODE (op) == CONST_DOUBLE)
1412 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1413 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1415 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1417 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1419 if (BITS_PER_WORD == 16)
1421 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1423 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1426 return GEN_INT (val);
1429 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1430 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1431 || flag_pretend_float)
1432 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1433 && GET_MODE_CLASS (mode) == MODE_FLOAT
1434 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1435 && GET_CODE (op) == CONST_DOUBLE)
1438 union {float f; HOST_WIDE_INT i; } u;
1440 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1443 return GEN_INT (u.i);
1445 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1446 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1447 || flag_pretend_float)
1448 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1449 && GET_MODE_CLASS (mode) == MODE_FLOAT
1450 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1451 && GET_CODE (op) == CONST_DOUBLE)
1454 union {double d; HOST_WIDE_INT i; } u;
1456 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1459 return GEN_INT (u.i);
1461 #endif /* no REAL_ARITHMETIC */
1463 /* The only remaining cases that we can handle are integers.
1464 Convert to proper endianness now since these cases need it.
1465 At this point, offset == 0 means the low-order word.
1467 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1468 in general. However, if OP is (const_int 0), we can just return
1471 if (op == const0_rtx)
1474 if (GET_MODE_CLASS (mode) != MODE_INT
1475 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1476 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1479 if (WORDS_BIG_ENDIAN)
1480 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1482 /* Find out which word on the host machine this value is in and get
1483 it from the constant. */
1484 val = (offset / size_ratio == 0
1485 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1486 : (GET_CODE (op) == CONST_INT
1487 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1489 /* Get the value we want into the low bits of val. */
1490 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1491 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1493 val = trunc_int_for_mode (val, word_mode);
1495 return GEN_INT (val);
1498 /* Return subword OFFSET of operand OP.
1499 The word number, OFFSET, is interpreted as the word number starting
1500 at the low-order address. OFFSET 0 is the low-order word if not
1501 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1503 If we cannot extract the required word, we return zero. Otherwise,
1504 an rtx corresponding to the requested word will be returned.
1506 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1507 reload has completed, a valid address will always be returned. After
1508 reload, if a valid address cannot be returned, we return zero.
1510 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1511 it is the responsibility of the caller.
1513 MODE is the mode of OP in case it is a CONST_INT.
1515 ??? This is still rather broken for some cases. The problem for the
1516 moment is that all callers of this thing provide no 'goal mode' to
1517 tell us to work with. This exists because all callers were written
1518 in a word based SUBREG world.
1519 Now use of this function can be deprecated by simplify_subreg in most
1524 operand_subword (op, offset, validate_address, mode)
1526 unsigned int offset;
1527 int validate_address;
1528 enum machine_mode mode;
1530 if (mode == VOIDmode)
1531 mode = GET_MODE (op);
1533 if (mode == VOIDmode)
1536 /* If OP is narrower than a word, fail. */
1538 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1541 /* If we want a word outside OP, return zero. */
1543 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1546 /* Form a new MEM at the requested address. */
1547 if (GET_CODE (op) == MEM)
1549 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1551 if (! validate_address)
1554 else if (reload_completed)
1556 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1560 return replace_equiv_address (new, XEXP (new, 0));
1563 /* Rest can be handled by simplify_subreg. */
1564 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1567 /* Similar to `operand_subword', but never return 0. If we can't extract
1568 the required subword, put OP into a register and try again. If that fails,
1569 abort. We always validate the address in this case.
1571 MODE is the mode of OP, in case it is CONST_INT. */
1574 operand_subword_force (op, offset, mode)
1576 unsigned int offset;
1577 enum machine_mode mode;
1579 rtx result = operand_subword (op, offset, 1, mode);
1584 if (mode != BLKmode && mode != VOIDmode)
1586 /* If this is a register which can not be accessed by words, copy it
1587 to a pseudo register. */
1588 if (GET_CODE (op) == REG)
1589 op = copy_to_reg (op);
1591 op = force_reg (mode, op);
1594 result = operand_subword (op, offset, 1, mode);
1601 /* Given a compare instruction, swap the operands.
1602 A test instruction is changed into a compare of 0 against the operand. */
1605 reverse_comparison (insn)
1608 rtx body = PATTERN (insn);
1611 if (GET_CODE (body) == SET)
1612 comp = SET_SRC (body);
1614 comp = SET_SRC (XVECEXP (body, 0, 0));
1616 if (GET_CODE (comp) == COMPARE)
1618 rtx op0 = XEXP (comp, 0);
1619 rtx op1 = XEXP (comp, 1);
1620 XEXP (comp, 0) = op1;
1621 XEXP (comp, 1) = op0;
1625 rtx new = gen_rtx_COMPARE (VOIDmode,
1626 CONST0_RTX (GET_MODE (comp)), comp);
1627 if (GET_CODE (body) == SET)
1628 SET_SRC (body) = new;
1630 SET_SRC (XVECEXP (body, 0, 0)) = new;
1635 /* Given REF, a MEM, and T, either the type of X or the expression
1636 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1637 if we are making a new object of this type. */
1640 set_mem_attributes (ref, t, objectp)
1647 /* It can happen that type_for_mode was given a mode for which there
1648 is no language-level type. In which case it returns NULL, which
1653 type = TYPE_P (t) ? t : TREE_TYPE (t);
1655 /* Get the alias set from the expression or type (perhaps using a
1656 front-end routine) and then copy bits from the type. */
1658 /* It is incorrect to set RTX_UNCHANGING_P from TREE_READONLY (type)
1659 here, because, in C and C++, the fact that a location is accessed
1660 through a const expression does not mean that the value there can
1663 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1664 wrong answer, as it assumes that DECL_RTL already has the right alias
1665 info. Callers should not set DECL_RTL until after the call to
1666 set_mem_attributes. */
1667 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1670 set_mem_alias_set (ref, get_alias_set (t));
1672 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1673 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1675 /* If we are making an object of this type, we know that it is a scalar if
1676 the type is not an aggregate. */
1677 if (objectp && ! AGGREGATE_TYPE_P (type))
1678 MEM_SCALAR_P (ref) = 1;
1680 /* If T is a type, this is all we can do. Otherwise, we may be able
1681 to deduce some more information about the expression. */
1685 maybe_set_unchanging (ref, t);
1686 if (TREE_THIS_VOLATILE (t))
1687 MEM_VOLATILE_P (ref) = 1;
1689 /* Now see if we can say more about whether it's an aggregate or
1690 scalar. If we already know it's an aggregate, don't bother. */
1691 if (MEM_IN_STRUCT_P (ref))
1694 /* Now remove any NOPs: they don't change what the underlying object is.
1695 Likewise for SAVE_EXPR. */
1696 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1697 || TREE_CODE (t) == NON_LVALUE_EXPR || TREE_CODE (t) == SAVE_EXPR)
1698 t = TREE_OPERAND (t, 0);
1700 /* Since we already know the type isn't an aggregate, if this is a decl,
1701 it must be a scalar. Or if it is a reference into an aggregate,
1702 this is part of an aggregate. Otherwise we don't know. */
1704 MEM_SCALAR_P (ref) = 1;
1705 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1706 || TREE_CODE (t) == ARRAY_RANGE_REF
1707 || TREE_CODE (t) == BIT_FIELD_REF)
1708 MEM_IN_STRUCT_P (ref) = 1;
1711 /* Set the alias set of MEM to SET. */
1714 set_mem_alias_set (mem, set)
1718 /* It would be nice to enable this check, but we can't quite yet. */
1720 #ifdef ENABLE_CHECKING
1721 /* If the new and old alias sets don't conflict, something is wrong. */
1722 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1727 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_DECL (mem), MEM_OFFSET (mem),
1728 MEM_SIZE (mem), MEM_ALIGN (mem));
1731 /* Return a memory reference like MEMREF, but with its mode changed
1732 to MODE and its address changed to ADDR.
1733 (VOIDmode means don't change the mode.
1734 NULL for ADDR means don't change the address.)
1735 VALIDATE is nonzero if the returned memory location is required to be
1739 change_address_1 (memref, mode, addr, validate)
1741 enum machine_mode mode;
1747 if (GET_CODE (memref) != MEM)
1749 if (mode == VOIDmode)
1750 mode = GET_MODE (memref);
1752 addr = XEXP (memref, 0);
1756 if (reload_in_progress || reload_completed)
1758 if (! memory_address_p (mode, addr))
1762 addr = memory_address (mode, addr);
1765 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1768 new = gen_rtx_MEM (mode, addr);
1769 MEM_COPY_ATTRIBUTES (new, memref);
1773 /* Return a memory reference like MEMREF, but with its mode changed
1774 to MODE and its address offset by OFFSET bytes. */
1777 adjust_address (memref, mode, offset)
1779 enum machine_mode mode;
1780 HOST_WIDE_INT offset;
1782 /* For now, this is just a wrapper for change_address, but eventually
1783 will do memref tracking. */
1784 rtx addr = XEXP (memref, 0);
1786 /* ??? Prefer to create garbage instead of creating shared rtl. */
1787 addr = copy_rtx (addr);
1789 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1790 object, we can merge it into the LO_SUM. */
1791 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1793 && (unsigned HOST_WIDE_INT) offset
1794 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1795 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1796 plus_constant (XEXP (addr, 1), offset));
1798 addr = plus_constant (addr, offset);
1800 return change_address (memref, mode, addr);
1803 /* Likewise, but the reference is not required to be valid. */
1806 adjust_address_nv (memref, mode, offset)
1808 enum machine_mode mode;
1809 HOST_WIDE_INT offset;
1811 /* For now, this is just a wrapper for change_address, but eventually
1812 will do memref tracking. */
1813 rtx addr = XEXP (memref, 0);
1815 /* If MEMREF is a LO_SUM and the offset is within the size of the
1816 object, we can merge it into the LO_SUM. */
1817 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1819 && (unsigned HOST_WIDE_INT) offset
1820 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1821 addr = gen_rtx_LO_SUM (mode, XEXP (addr, 0),
1822 plus_constant (XEXP (addr, 1), offset));
1824 addr = plus_constant (addr, offset);
1826 return change_address_1 (memref, mode, addr, 0);
1829 /* Return a memory reference like MEMREF, but with its address changed to
1830 ADDR. The caller is asserting that the actual piece of memory pointed
1831 to is the same, just the form of the address is being changed, such as
1832 by putting something into a register. */
1835 replace_equiv_address (memref, addr)
1839 /* For now, this is just a wrapper for change_address, but eventually
1840 will do memref tracking. */
1841 return change_address (memref, VOIDmode, addr);
1843 /* Likewise, but the reference is not required to be valid. */
1846 replace_equiv_address_nv (memref, addr)
1850 /* For now, this is just a wrapper for change_address, but eventually
1851 will do memref tracking. */
1852 return change_address_1 (memref, VOIDmode, addr, 0);
1855 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1862 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1863 NULL_RTX, label_num++, NULL, NULL);
1865 LABEL_NUSES (label) = 0;
1866 LABEL_ALTERNATE_NAME (label) = NULL;
1870 /* For procedure integration. */
1872 /* Install new pointers to the first and last insns in the chain.
1873 Also, set cur_insn_uid to one higher than the last in use.
1874 Used for an inline-procedure after copying the insn chain. */
1877 set_new_first_and_last_insn (first, last)
1886 for (insn = first; insn; insn = NEXT_INSN (insn))
1887 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1892 /* Set the range of label numbers found in the current function.
1893 This is used when belatedly compiling an inline function. */
1896 set_new_first_and_last_label_num (first, last)
1899 base_label_num = label_num;
1900 first_label_num = first;
1901 last_label_num = last;
1904 /* Set the last label number found in the current function.
1905 This is used when belatedly compiling an inline function. */
1908 set_new_last_label_num (last)
1911 base_label_num = label_num;
1912 last_label_num = last;
1915 /* Restore all variables describing the current status from the structure *P.
1916 This is used after a nested function. */
1919 restore_emit_status (p)
1920 struct function *p ATTRIBUTE_UNUSED;
1923 clear_emit_caches ();
1926 /* Clear out all parts of the state in F that can safely be discarded
1927 after the function has been compiled, to let garbage collection
1928 reclaim the memory. */
1931 free_emit_status (f)
1934 free (f->emit->x_regno_reg_rtx);
1935 free (f->emit->regno_pointer_align);
1940 /* Go through all the RTL insn bodies and copy any invalid shared
1941 structure. This routine should only be called once. */
1944 unshare_all_rtl (fndecl, insn)
1950 /* Make sure that virtual parameters are not shared. */
1951 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1952 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
1954 /* Make sure that virtual stack slots are not shared. */
1955 unshare_all_decls (DECL_INITIAL (fndecl));
1957 /* Unshare just about everything else. */
1958 unshare_all_rtl_1 (insn);
1960 /* Make sure the addresses of stack slots found outside the insn chain
1961 (such as, in DECL_RTL of a variable) are not shared
1962 with the insn chain.
1964 This special care is necessary when the stack slot MEM does not
1965 actually appear in the insn chain. If it does appear, its address
1966 is unshared from all else at that point. */
1967 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1970 /* Go through all the RTL insn bodies and copy any invalid shared
1971 structure, again. This is a fairly expensive thing to do so it
1972 should be done sparingly. */
1975 unshare_all_rtl_again (insn)
1981 for (p = insn; p; p = NEXT_INSN (p))
1984 reset_used_flags (PATTERN (p));
1985 reset_used_flags (REG_NOTES (p));
1986 reset_used_flags (LOG_LINKS (p));
1989 /* Make sure that virtual stack slots are not shared. */
1990 reset_used_decls (DECL_INITIAL (cfun->decl));
1992 /* Make sure that virtual parameters are not shared. */
1993 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1994 reset_used_flags (DECL_RTL (decl));
1996 reset_used_flags (stack_slot_list);
1998 unshare_all_rtl (cfun->decl, insn);
2001 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2002 Assumes the mark bits are cleared at entry. */
2005 unshare_all_rtl_1 (insn)
2008 for (; insn; insn = NEXT_INSN (insn))
2011 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2012 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2013 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2017 /* Go through all virtual stack slots of a function and copy any
2018 shared structure. */
2020 unshare_all_decls (blk)
2025 /* Copy shared decls. */
2026 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2027 if (DECL_RTL_SET_P (t))
2028 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2030 /* Now process sub-blocks. */
2031 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2032 unshare_all_decls (t);
2035 /* Go through all virtual stack slots of a function and mark them as
2038 reset_used_decls (blk)
2044 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2045 if (DECL_RTL_SET_P (t))
2046 reset_used_flags (DECL_RTL (t));
2048 /* Now process sub-blocks. */
2049 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2050 reset_used_decls (t);
2053 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2054 Recursively does the same for subexpressions. */
2057 copy_rtx_if_shared (orig)
2060 register rtx x = orig;
2062 register enum rtx_code code;
2063 register const char *format_ptr;
2069 code = GET_CODE (x);
2071 /* These types may be freely shared. */
2084 /* SCRATCH must be shared because they represent distinct values. */
2088 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2089 a LABEL_REF, it isn't sharable. */
2090 if (GET_CODE (XEXP (x, 0)) == PLUS
2091 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2092 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2101 /* The chain of insns is not being copied. */
2105 /* A MEM is allowed to be shared if its address is constant.
2107 We used to allow sharing of MEMs which referenced
2108 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2109 that can lose. instantiate_virtual_regs will not unshare
2110 the MEMs, and combine may change the structure of the address
2111 because it looks safe and profitable in one context, but
2112 in some other context it creates unrecognizable RTL. */
2113 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2122 /* This rtx may not be shared. If it has already been seen,
2123 replace it with a copy of itself. */
2129 copy = rtx_alloc (code);
2131 (sizeof (*copy) - sizeof (copy->fld)
2132 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2138 /* Now scan the subexpressions recursively.
2139 We can store any replaced subexpressions directly into X
2140 since we know X is not shared! Any vectors in X
2141 must be copied if X was copied. */
2143 format_ptr = GET_RTX_FORMAT (code);
2145 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2147 switch (*format_ptr++)
2150 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2154 if (XVEC (x, i) != NULL)
2157 int len = XVECLEN (x, i);
2159 if (copied && len > 0)
2160 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2161 for (j = 0; j < len; j++)
2162 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2170 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2171 to look for shared sub-parts. */
2174 reset_used_flags (x)
2178 register enum rtx_code code;
2179 register const char *format_ptr;
2184 code = GET_CODE (x);
2186 /* These types may be freely shared so we needn't do any resetting
2207 /* The chain of insns is not being copied. */
2216 format_ptr = GET_RTX_FORMAT (code);
2217 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2219 switch (*format_ptr++)
2222 reset_used_flags (XEXP (x, i));
2226 for (j = 0; j < XVECLEN (x, i); j++)
2227 reset_used_flags (XVECEXP (x, i, j));
2233 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2234 Return X or the rtx for the pseudo reg the value of X was copied into.
2235 OTHER must be valid as a SET_DEST. */
2238 make_safe_from (x, other)
2242 switch (GET_CODE (other))
2245 other = SUBREG_REG (other);
2247 case STRICT_LOW_PART:
2250 other = XEXP (other, 0);
2256 if ((GET_CODE (other) == MEM
2258 && GET_CODE (x) != REG
2259 && GET_CODE (x) != SUBREG)
2260 || (GET_CODE (other) == REG
2261 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2262 || reg_mentioned_p (other, x))))
2264 rtx temp = gen_reg_rtx (GET_MODE (x));
2265 emit_move_insn (temp, x);
2271 /* Emission of insns (adding them to the doubly-linked list). */
2273 /* Return the first insn of the current sequence or current function. */
2281 /* Return the last insn emitted in current sequence or current function. */
2289 /* Specify a new insn as the last in the chain. */
2292 set_last_insn (insn)
2295 if (NEXT_INSN (insn) != 0)
2300 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2303 get_last_insn_anywhere ()
2305 struct sequence_stack *stack;
2308 for (stack = seq_stack; stack; stack = stack->next)
2309 if (stack->last != 0)
2314 /* Return a number larger than any instruction's uid in this function. */
2319 return cur_insn_uid;
2322 /* Renumber instructions so that no instruction UIDs are wasted. */
2325 renumber_insns (stream)
2330 /* If we're not supposed to renumber instructions, don't. */
2331 if (!flag_renumber_insns)
2334 /* If there aren't that many instructions, then it's not really
2335 worth renumbering them. */
2336 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2341 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2344 fprintf (stream, "Renumbering insn %d to %d\n",
2345 INSN_UID (insn), cur_insn_uid);
2346 INSN_UID (insn) = cur_insn_uid++;
2350 /* Return the next insn. If it is a SEQUENCE, return the first insn
2359 insn = NEXT_INSN (insn);
2360 if (insn && GET_CODE (insn) == INSN
2361 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2362 insn = XVECEXP (PATTERN (insn), 0, 0);
2368 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2372 previous_insn (insn)
2377 insn = PREV_INSN (insn);
2378 if (insn && GET_CODE (insn) == INSN
2379 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2380 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2386 /* Return the next insn after INSN that is not a NOTE. This routine does not
2387 look inside SEQUENCEs. */
2390 next_nonnote_insn (insn)
2395 insn = NEXT_INSN (insn);
2396 if (insn == 0 || GET_CODE (insn) != NOTE)
2403 /* Return the previous insn before INSN that is not a NOTE. This routine does
2404 not look inside SEQUENCEs. */
2407 prev_nonnote_insn (insn)
2412 insn = PREV_INSN (insn);
2413 if (insn == 0 || GET_CODE (insn) != NOTE)
2420 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2421 or 0, if there is none. This routine does not look inside
2425 next_real_insn (insn)
2430 insn = NEXT_INSN (insn);
2431 if (insn == 0 || GET_CODE (insn) == INSN
2432 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2439 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2440 or 0, if there is none. This routine does not look inside
2444 prev_real_insn (insn)
2449 insn = PREV_INSN (insn);
2450 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2451 || GET_CODE (insn) == JUMP_INSN)
2458 /* Find the next insn after INSN that really does something. This routine
2459 does not look inside SEQUENCEs. Until reload has completed, this is the
2460 same as next_real_insn. */
2463 active_insn_p (insn)
2466 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2467 || (GET_CODE (insn) == INSN
2468 && (! reload_completed
2469 || (GET_CODE (PATTERN (insn)) != USE
2470 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2474 next_active_insn (insn)
2479 insn = NEXT_INSN (insn);
2480 if (insn == 0 || active_insn_p (insn))
2487 /* Find the last insn before INSN that really does something. This routine
2488 does not look inside SEQUENCEs. Until reload has completed, this is the
2489 same as prev_real_insn. */
2492 prev_active_insn (insn)
2497 insn = PREV_INSN (insn);
2498 if (insn == 0 || active_insn_p (insn))
2505 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2513 insn = NEXT_INSN (insn);
2514 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2521 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2529 insn = PREV_INSN (insn);
2530 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2538 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2539 and REG_CC_USER notes so we can find it. */
2542 link_cc0_insns (insn)
2545 rtx user = next_nonnote_insn (insn);
2547 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2548 user = XVECEXP (PATTERN (user), 0, 0);
2550 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2552 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2555 /* Return the next insn that uses CC0 after INSN, which is assumed to
2556 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2557 applied to the result of this function should yield INSN).
2559 Normally, this is simply the next insn. However, if a REG_CC_USER note
2560 is present, it contains the insn that uses CC0.
2562 Return 0 if we can't find the insn. */
2565 next_cc0_user (insn)
2568 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2571 return XEXP (note, 0);
2573 insn = next_nonnote_insn (insn);
2574 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2575 insn = XVECEXP (PATTERN (insn), 0, 0);
2577 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2583 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2584 note, it is the previous insn. */
2587 prev_cc0_setter (insn)
2590 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2593 return XEXP (note, 0);
2595 insn = prev_nonnote_insn (insn);
2596 if (! sets_cc0_p (PATTERN (insn)))
2603 /* Increment the label uses for all labels present in rtx. */
2609 register enum rtx_code code;
2611 register const char *fmt;
2613 code = GET_CODE (x);
2614 if (code == LABEL_REF)
2615 LABEL_NUSES (XEXP (x, 0))++;
2617 fmt = GET_RTX_FORMAT (code);
2618 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2621 mark_label_nuses (XEXP (x, i));
2622 else if (fmt[i] == 'E')
2623 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2624 mark_label_nuses (XVECEXP (x, i, j));
2629 /* Try splitting insns that can be split for better scheduling.
2630 PAT is the pattern which might split.
2631 TRIAL is the insn providing PAT.
2632 LAST is non-zero if we should return the last insn of the sequence produced.
2634 If this routine succeeds in splitting, it returns the first or last
2635 replacement insn depending on the value of LAST. Otherwise, it
2636 returns TRIAL. If the insn to be returned can be split, it will be. */
2639 try_split (pat, trial, last)
2643 rtx before = PREV_INSN (trial);
2644 rtx after = NEXT_INSN (trial);
2645 int has_barrier = 0;
2650 if (any_condjump_p (trial)
2651 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2652 split_branch_probability = INTVAL (XEXP (note, 0));
2653 probability = split_branch_probability;
2655 seq = split_insns (pat, trial);
2657 split_branch_probability = -1;
2659 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2660 We may need to handle this specially. */
2661 if (after && GET_CODE (after) == BARRIER)
2664 after = NEXT_INSN (after);
2669 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2670 The latter case will normally arise only when being done so that
2671 it, in turn, will be split (SFmode on the 29k is an example). */
2672 if (GET_CODE (seq) == SEQUENCE)
2676 /* Avoid infinite loop if any insn of the result matches
2677 the original pattern. */
2678 for (i = 0; i < XVECLEN (seq, 0); i++)
2679 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2680 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2684 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2685 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2687 rtx insn = XVECEXP (seq, 0, i);
2688 mark_jump_label (PATTERN (insn),
2689 XVECEXP (seq, 0, i), 0);
2691 if (probability != -1
2692 && any_condjump_p (insn)
2693 && !find_reg_note (insn, REG_BR_PROB, 0))
2695 /* We can preserve the REG_BR_PROB notes only if exactly
2696 one jump is created, otherwise the machinde description
2697 is responsible for this step using
2698 split_branch_probability variable. */
2702 = gen_rtx_EXPR_LIST (REG_BR_PROB,
2703 GEN_INT (probability),
2708 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2709 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2710 if (GET_CODE (trial) == CALL_INSN)
2711 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2712 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2713 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2714 = CALL_INSN_FUNCTION_USAGE (trial);
2716 /* Copy notes, particularly those related to the CFG. */
2717 for (note = REG_NOTES (trial); note ; note = XEXP (note, 1))
2719 switch (REG_NOTE_KIND (note))
2722 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2724 rtx insn = XVECEXP (seq, 0, i);
2725 if (GET_CODE (insn) == CALL_INSN
2726 || (flag_non_call_exceptions
2727 && may_trap_p (PATTERN (insn))))
2729 = gen_rtx_EXPR_LIST (REG_EH_REGION,
2737 case REG_ALWAYS_RETURN:
2738 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2740 rtx insn = XVECEXP (seq, 0, i);
2741 if (GET_CODE (insn) == CALL_INSN)
2743 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2749 case REG_NON_LOCAL_GOTO:
2750 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2752 rtx insn = XVECEXP (seq, 0, i);
2753 if (GET_CODE (insn) == JUMP_INSN)
2755 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2766 /* If there are LABELS inside the split insns increment the
2767 usage count so we don't delete the label. */
2768 if (GET_CODE (trial) == INSN)
2769 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2770 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2771 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2773 tem = emit_insn_after (seq, trial);
2775 delete_related_insns (trial);
2777 emit_barrier_after (tem);
2779 /* Recursively call try_split for each new insn created; by the
2780 time control returns here that insn will be fully split, so
2781 set LAST and continue from the insn after the one returned.
2782 We can't use next_active_insn here since AFTER may be a note.
2783 Ignore deleted insns, which can be occur if not optimizing. */
2784 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2785 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2786 tem = try_split (PATTERN (tem), tem, 1);
2788 /* Avoid infinite loop if the result matches the original pattern. */
2789 else if (rtx_equal_p (seq, pat))
2793 PATTERN (trial) = seq;
2794 INSN_CODE (trial) = -1;
2795 try_split (seq, trial, last);
2798 /* Return either the first or the last insn, depending on which was
2801 ? (after ? PREV_INSN (after) : last_insn)
2802 : NEXT_INSN (before);
2808 /* Make and return an INSN rtx, initializing all its slots.
2809 Store PATTERN in the pattern slots. */
2812 make_insn_raw (pattern)
2817 insn = rtx_alloc (INSN);
2819 INSN_UID (insn) = cur_insn_uid++;
2820 PATTERN (insn) = pattern;
2821 INSN_CODE (insn) = -1;
2822 LOG_LINKS (insn) = NULL;
2823 REG_NOTES (insn) = NULL;
2825 #ifdef ENABLE_RTL_CHECKING
2828 && (returnjump_p (insn)
2829 || (GET_CODE (insn) == SET
2830 && SET_DEST (insn) == pc_rtx)))
2832 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2840 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2843 make_jump_insn_raw (pattern)
2848 insn = rtx_alloc (JUMP_INSN);
2849 INSN_UID (insn) = cur_insn_uid++;
2851 PATTERN (insn) = pattern;
2852 INSN_CODE (insn) = -1;
2853 LOG_LINKS (insn) = NULL;
2854 REG_NOTES (insn) = NULL;
2855 JUMP_LABEL (insn) = NULL;
2860 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2863 make_call_insn_raw (pattern)
2868 insn = rtx_alloc (CALL_INSN);
2869 INSN_UID (insn) = cur_insn_uid++;
2871 PATTERN (insn) = pattern;
2872 INSN_CODE (insn) = -1;
2873 LOG_LINKS (insn) = NULL;
2874 REG_NOTES (insn) = NULL;
2875 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2880 /* Add INSN to the end of the doubly-linked list.
2881 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2887 PREV_INSN (insn) = last_insn;
2888 NEXT_INSN (insn) = 0;
2890 if (NULL != last_insn)
2891 NEXT_INSN (last_insn) = insn;
2893 if (NULL == first_insn)
2899 /* Add INSN into the doubly-linked list after insn AFTER. This and
2900 the next should be the only functions called to insert an insn once
2901 delay slots have been filled since only they know how to update a
2905 add_insn_after (insn, after)
2908 rtx next = NEXT_INSN (after);
2911 if (optimize && INSN_DELETED_P (after))
2914 NEXT_INSN (insn) = next;
2915 PREV_INSN (insn) = after;
2919 PREV_INSN (next) = insn;
2920 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2921 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2923 else if (last_insn == after)
2927 struct sequence_stack *stack = seq_stack;
2928 /* Scan all pending sequences too. */
2929 for (; stack; stack = stack->next)
2930 if (after == stack->last)
2940 if (basic_block_for_insn
2941 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
2942 && (bb = BLOCK_FOR_INSN (after)))
2944 set_block_for_insn (insn, bb);
2945 /* Should not happen as first in the BB is always
2946 eigther NOTE or LABEL. */
2947 if (bb->end == after
2948 /* Avoid clobbering of structure when creating new BB. */
2949 && GET_CODE (insn) != BARRIER
2950 && (GET_CODE (insn) != NOTE
2951 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
2955 NEXT_INSN (after) = insn;
2956 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2958 rtx sequence = PATTERN (after);
2959 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2963 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2964 the previous should be the only functions called to insert an insn once
2965 delay slots have been filled since only they know how to update a
2969 add_insn_before (insn, before)
2972 rtx prev = PREV_INSN (before);
2975 if (optimize && INSN_DELETED_P (before))
2978 PREV_INSN (insn) = prev;
2979 NEXT_INSN (insn) = before;
2983 NEXT_INSN (prev) = insn;
2984 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2986 rtx sequence = PATTERN (prev);
2987 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2990 else if (first_insn == before)
2994 struct sequence_stack *stack = seq_stack;
2995 /* Scan all pending sequences too. */
2996 for (; stack; stack = stack->next)
2997 if (before == stack->first)
2999 stack->first = insn;
3007 if (basic_block_for_insn
3008 && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements
3009 && (bb = BLOCK_FOR_INSN (before)))
3011 set_block_for_insn (insn, bb);
3012 /* Should not happen as first in the BB is always
3013 eigther NOTE or LABEl. */
3014 if (bb->head == insn
3015 /* Avoid clobbering of structure when creating new BB. */
3016 && GET_CODE (insn) != BARRIER
3017 && (GET_CODE (insn) != NOTE
3018 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3022 PREV_INSN (before) = insn;
3023 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3024 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3027 /* Remove an insn from its doubly-linked list. This function knows how
3028 to handle sequences. */
3033 rtx next = NEXT_INSN (insn);
3034 rtx prev = PREV_INSN (insn);
3039 NEXT_INSN (prev) = next;
3040 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3042 rtx sequence = PATTERN (prev);
3043 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3046 else if (first_insn == insn)
3050 struct sequence_stack *stack = seq_stack;
3051 /* Scan all pending sequences too. */
3052 for (; stack; stack = stack->next)
3053 if (insn == stack->first)
3055 stack->first = next;
3065 PREV_INSN (next) = prev;
3066 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3067 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3069 else if (last_insn == insn)
3073 struct sequence_stack *stack = seq_stack;
3074 /* Scan all pending sequences too. */
3075 for (; stack; stack = stack->next)
3076 if (insn == stack->last)
3085 if (basic_block_for_insn
3086 && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements
3087 && (bb = BLOCK_FOR_INSN (insn)))
3089 if (bb->head == insn)
3091 /* Never ever delete the basic block note without deleting whole basic
3093 if (GET_CODE (insn) == NOTE)
3097 if (bb->end == insn)
3102 /* Delete all insns made since FROM.
3103 FROM becomes the new last instruction. */
3106 delete_insns_since (from)
3112 NEXT_INSN (from) = 0;
3116 /* This function is deprecated, please use sequences instead.
3118 Move a consecutive bunch of insns to a different place in the chain.
3119 The insns to be moved are those between FROM and TO.
3120 They are moved to a new position after the insn AFTER.
3121 AFTER must not be FROM or TO or any insn in between.
3123 This function does not know about SEQUENCEs and hence should not be
3124 called after delay-slot filling has been done. */
3127 reorder_insns_nobb (from, to, after)
3128 rtx from, to, after;
3130 /* Splice this bunch out of where it is now. */
3131 if (PREV_INSN (from))
3132 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3134 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3135 if (last_insn == to)
3136 last_insn = PREV_INSN (from);
3137 if (first_insn == from)
3138 first_insn = NEXT_INSN (to);
3140 /* Make the new neighbors point to it and it to them. */
3141 if (NEXT_INSN (after))
3142 PREV_INSN (NEXT_INSN (after)) = to;
3144 NEXT_INSN (to) = NEXT_INSN (after);
3145 PREV_INSN (from) = after;
3146 NEXT_INSN (after) = from;
3147 if (after == last_insn)
3151 /* Same as function above, but take care to update BB boundaries. */
3153 reorder_insns (from, to, after)
3154 rtx from, to, after;
3156 rtx prev = PREV_INSN (from);
3157 basic_block bb, bb2;
3159 reorder_insns_nobb (from, to, after);
3161 if (basic_block_for_insn
3162 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3163 && (bb = BLOCK_FOR_INSN (after)))
3167 if (basic_block_for_insn
3168 && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements
3169 && (bb2 = BLOCK_FOR_INSN (from)))
3175 if (bb->end == after)
3178 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3179 set_block_for_insn (x, bb);
3183 /* Return the line note insn preceding INSN. */
3186 find_line_note (insn)
3189 if (no_line_numbers)
3192 for (; insn; insn = PREV_INSN (insn))
3193 if (GET_CODE (insn) == NOTE
3194 && NOTE_LINE_NUMBER (insn) >= 0)
3200 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3201 of the moved insns when debugging. This may insert a note between AFTER
3202 and FROM, and another one after TO. */
3205 reorder_insns_with_line_notes (from, to, after)
3206 rtx from, to, after;
3208 rtx from_line = find_line_note (from);
3209 rtx after_line = find_line_note (after);
3211 reorder_insns (from, to, after);
3213 if (from_line == after_line)
3217 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3218 NOTE_LINE_NUMBER (from_line),
3221 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3222 NOTE_LINE_NUMBER (after_line),
3226 /* Remove unnecessary notes from the instruction stream. */
3229 remove_unnecessary_notes ()
3231 rtx block_stack = NULL_RTX;
3232 rtx eh_stack = NULL_RTX;
3237 /* We must not remove the first instruction in the function because
3238 the compiler depends on the first instruction being a note. */
3239 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3241 /* Remember what's next. */
3242 next = NEXT_INSN (insn);
3244 /* We're only interested in notes. */
3245 if (GET_CODE (insn) != NOTE)
3248 switch (NOTE_LINE_NUMBER (insn))
3250 case NOTE_INSN_DELETED:
3254 case NOTE_INSN_EH_REGION_BEG:
3255 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3258 case NOTE_INSN_EH_REGION_END:
3259 /* Too many end notes. */
3260 if (eh_stack == NULL_RTX)
3262 /* Mismatched nesting. */
3263 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3266 eh_stack = XEXP (eh_stack, 1);
3267 free_INSN_LIST_node (tmp);
3270 case NOTE_INSN_BLOCK_BEG:
3271 /* By now, all notes indicating lexical blocks should have
3272 NOTE_BLOCK filled in. */
3273 if (NOTE_BLOCK (insn) == NULL_TREE)
3275 block_stack = alloc_INSN_LIST (insn, block_stack);
3278 case NOTE_INSN_BLOCK_END:
3279 /* Too many end notes. */
3280 if (block_stack == NULL_RTX)
3282 /* Mismatched nesting. */
3283 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3286 block_stack = XEXP (block_stack, 1);
3287 free_INSN_LIST_node (tmp);
3289 /* Scan back to see if there are any non-note instructions
3290 between INSN and the beginning of this block. If not,
3291 then there is no PC range in the generated code that will
3292 actually be in this block, so there's no point in
3293 remembering the existence of the block. */
3294 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3296 /* This block contains a real instruction. Note that we
3297 don't include labels; if the only thing in the block
3298 is a label, then there are still no PC values that
3299 lie within the block. */
3303 /* We're only interested in NOTEs. */
3304 if (GET_CODE (tmp) != NOTE)
3307 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3309 /* We just verified that this BLOCK matches us with
3310 the block_stack check above. Never delete the
3311 BLOCK for the outermost scope of the function; we
3312 can refer to names from that scope even if the
3313 block notes are messed up. */
3314 if (! is_body_block (NOTE_BLOCK (insn))
3315 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3322 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3323 /* There's a nested block. We need to leave the
3324 current block in place since otherwise the debugger
3325 wouldn't be able to show symbols from our block in
3326 the nested block. */
3332 /* Too many begin notes. */
3333 if (block_stack || eh_stack)
3338 /* Emit an insn of given code and pattern
3339 at a specified place within the doubly-linked list. */
3341 /* Make an instruction with body PATTERN
3342 and output it before the instruction BEFORE. */
3345 emit_insn_before (pattern, before)
3346 register rtx pattern, before;
3348 register rtx insn = before;
3350 if (GET_CODE (pattern) == SEQUENCE)
3354 for (i = 0; i < XVECLEN (pattern, 0); i++)
3356 insn = XVECEXP (pattern, 0, i);
3357 add_insn_before (insn, before);
3362 insn = make_insn_raw (pattern);
3363 add_insn_before (insn, before);
3369 /* Make an instruction with body PATTERN and code JUMP_INSN
3370 and output it before the instruction BEFORE. */
3373 emit_jump_insn_before (pattern, before)
3374 register rtx pattern, before;
3378 if (GET_CODE (pattern) == SEQUENCE)
3379 insn = emit_insn_before (pattern, before);
3382 insn = make_jump_insn_raw (pattern);
3383 add_insn_before (insn, before);
3389 /* Make an instruction with body PATTERN and code CALL_INSN
3390 and output it before the instruction BEFORE. */
3393 emit_call_insn_before (pattern, before)
3394 register rtx pattern, before;
3398 if (GET_CODE (pattern) == SEQUENCE)
3399 insn = emit_insn_before (pattern, before);
3402 insn = make_call_insn_raw (pattern);
3403 add_insn_before (insn, before);
3404 PUT_CODE (insn, CALL_INSN);
3410 /* Make an insn of code BARRIER
3411 and output it before the insn BEFORE. */
3414 emit_barrier_before (before)
3415 register rtx before;
3417 register rtx insn = rtx_alloc (BARRIER);
3419 INSN_UID (insn) = cur_insn_uid++;
3421 add_insn_before (insn, before);
3425 /* Emit the label LABEL before the insn BEFORE. */
3428 emit_label_before (label, before)
3431 /* This can be called twice for the same label as a result of the
3432 confusion that follows a syntax error! So make it harmless. */
3433 if (INSN_UID (label) == 0)
3435 INSN_UID (label) = cur_insn_uid++;
3436 add_insn_before (label, before);
3442 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3445 emit_note_before (subtype, before)
3449 register rtx note = rtx_alloc (NOTE);
3450 INSN_UID (note) = cur_insn_uid++;
3451 NOTE_SOURCE_FILE (note) = 0;
3452 NOTE_LINE_NUMBER (note) = subtype;
3454 add_insn_before (note, before);
3458 /* Make an insn of code INSN with body PATTERN
3459 and output it after the insn AFTER. */
3462 emit_insn_after (pattern, after)
3463 register rtx pattern, after;
3465 register rtx insn = after;
3467 if (GET_CODE (pattern) == SEQUENCE)
3471 for (i = 0; i < XVECLEN (pattern, 0); i++)
3473 insn = XVECEXP (pattern, 0, i);
3474 add_insn_after (insn, after);
3480 insn = make_insn_raw (pattern);
3481 add_insn_after (insn, after);
3487 /* Similar to emit_insn_after, except that line notes are to be inserted so
3488 as to act as if this insn were at FROM. */
3491 emit_insn_after_with_line_notes (pattern, after, from)
3492 rtx pattern, after, from;
3494 rtx from_line = find_line_note (from);
3495 rtx after_line = find_line_note (after);
3496 rtx insn = emit_insn_after (pattern, after);
3499 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3500 NOTE_LINE_NUMBER (from_line),
3504 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3505 NOTE_LINE_NUMBER (after_line),
3509 /* Make an insn of code JUMP_INSN with body PATTERN
3510 and output it after the insn AFTER. */
3513 emit_jump_insn_after (pattern, after)
3514 register rtx pattern, after;
3518 if (GET_CODE (pattern) == SEQUENCE)
3519 insn = emit_insn_after (pattern, after);
3522 insn = make_jump_insn_raw (pattern);
3523 add_insn_after (insn, after);
3529 /* Make an insn of code BARRIER
3530 and output it after the insn AFTER. */
3533 emit_barrier_after (after)
3536 register rtx insn = rtx_alloc (BARRIER);
3538 INSN_UID (insn) = cur_insn_uid++;
3540 add_insn_after (insn, after);
3544 /* Emit the label LABEL after the insn AFTER. */
3547 emit_label_after (label, after)
3550 /* This can be called twice for the same label
3551 as a result of the confusion that follows a syntax error!
3552 So make it harmless. */
3553 if (INSN_UID (label) == 0)
3555 INSN_UID (label) = cur_insn_uid++;
3556 add_insn_after (label, after);
3562 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3565 emit_note_after (subtype, after)
3569 register rtx note = rtx_alloc (NOTE);
3570 INSN_UID (note) = cur_insn_uid++;
3571 NOTE_SOURCE_FILE (note) = 0;
3572 NOTE_LINE_NUMBER (note) = subtype;
3573 add_insn_after (note, after);
3577 /* Emit a line note for FILE and LINE after the insn AFTER. */
3580 emit_line_note_after (file, line, after)
3587 if (no_line_numbers && line > 0)
3593 note = rtx_alloc (NOTE);
3594 INSN_UID (note) = cur_insn_uid++;
3595 NOTE_SOURCE_FILE (note) = file;
3596 NOTE_LINE_NUMBER (note) = line;
3597 add_insn_after (note, after);
3601 /* Make an insn of code INSN with pattern PATTERN
3602 and add it to the end of the doubly-linked list.
3603 If PATTERN is a SEQUENCE, take the elements of it
3604 and emit an insn for each element.
3606 Returns the last insn emitted. */
3612 rtx insn = last_insn;
3614 if (GET_CODE (pattern) == SEQUENCE)
3618 for (i = 0; i < XVECLEN (pattern, 0); i++)
3620 insn = XVECEXP (pattern, 0, i);
3626 insn = make_insn_raw (pattern);
3633 /* Emit the insns in a chain starting with INSN.
3634 Return the last insn emitted. */
3644 rtx next = NEXT_INSN (insn);
3653 /* Emit the insns in a chain starting with INSN and place them in front of
3654 the insn BEFORE. Return the last insn emitted. */
3657 emit_insns_before (insn, before)
3665 rtx next = NEXT_INSN (insn);
3666 add_insn_before (insn, before);
3674 /* Emit the insns in a chain starting with FIRST and place them in back of
3675 the insn AFTER. Return the last insn emitted. */
3678 emit_insns_after (first, after)
3683 register rtx after_after;
3692 if (basic_block_for_insn
3693 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3694 && (bb = BLOCK_FOR_INSN (after)))
3696 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3697 set_block_for_insn (last, bb);
3698 set_block_for_insn (last, bb);
3699 if (bb->end == after)
3703 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3706 after_after = NEXT_INSN (after);
3708 NEXT_INSN (after) = first;
3709 PREV_INSN (first) = after;
3710 NEXT_INSN (last) = after_after;
3712 PREV_INSN (after_after) = last;
3714 if (after == last_insn)
3719 /* Make an insn of code JUMP_INSN with pattern PATTERN
3720 and add it to the end of the doubly-linked list. */
3723 emit_jump_insn (pattern)
3726 if (GET_CODE (pattern) == SEQUENCE)
3727 return emit_insn (pattern);
3730 register rtx insn = make_jump_insn_raw (pattern);
3736 /* Make an insn of code CALL_INSN with pattern PATTERN
3737 and add it to the end of the doubly-linked list. */
3740 emit_call_insn (pattern)
3743 if (GET_CODE (pattern) == SEQUENCE)
3744 return emit_insn (pattern);
3747 register rtx insn = make_call_insn_raw (pattern);
3749 PUT_CODE (insn, CALL_INSN);
3754 /* Add the label LABEL to the end of the doubly-linked list. */
3760 /* This can be called twice for the same label
3761 as a result of the confusion that follows a syntax error!
3762 So make it harmless. */
3763 if (INSN_UID (label) == 0)
3765 INSN_UID (label) = cur_insn_uid++;
3771 /* Make an insn of code BARRIER
3772 and add it to the end of the doubly-linked list. */
3777 register rtx barrier = rtx_alloc (BARRIER);
3778 INSN_UID (barrier) = cur_insn_uid++;
3783 /* Make an insn of code NOTE
3784 with data-fields specified by FILE and LINE
3785 and add it to the end of the doubly-linked list,
3786 but only if line-numbers are desired for debugging info. */
3789 emit_line_note (file, line)
3793 set_file_and_line_for_stmt (file, line);
3796 if (no_line_numbers)
3800 return emit_note (file, line);
3803 /* Make an insn of code NOTE
3804 with data-fields specified by FILE and LINE
3805 and add it to the end of the doubly-linked list.
3806 If it is a line-number NOTE, omit it if it matches the previous one. */
3809 emit_note (file, line)
3817 if (file && last_filename && !strcmp (file, last_filename)
3818 && line == last_linenum)
3820 last_filename = file;
3821 last_linenum = line;
3824 if (no_line_numbers && line > 0)
3830 note = rtx_alloc (NOTE);
3831 INSN_UID (note) = cur_insn_uid++;
3832 NOTE_SOURCE_FILE (note) = file;
3833 NOTE_LINE_NUMBER (note) = line;
3838 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3841 emit_line_note_force (file, line)
3846 return emit_line_note (file, line);
3849 /* Cause next statement to emit a line note even if the line number
3850 has not changed. This is used at the beginning of a function. */
3853 force_next_line_note ()
3858 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3859 note of this type already exists, remove it first. */
3862 set_unique_reg_note (insn, kind, datum)
3867 rtx note = find_reg_note (insn, kind, NULL_RTX);
3869 /* First remove the note if there already is one. */
3871 remove_note (insn, note);
3873 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3876 /* Return an indication of which type of insn should have X as a body.
3877 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3883 if (GET_CODE (x) == CODE_LABEL)
3885 if (GET_CODE (x) == CALL)
3887 if (GET_CODE (x) == RETURN)
3889 if (GET_CODE (x) == SET)
3891 if (SET_DEST (x) == pc_rtx)
3893 else if (GET_CODE (SET_SRC (x)) == CALL)
3898 if (GET_CODE (x) == PARALLEL)
3901 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3902 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3904 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3905 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3907 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3908 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3914 /* Emit the rtl pattern X as an appropriate kind of insn.
3915 If X is a label, it is simply added into the insn chain. */
3921 enum rtx_code code = classify_insn (x);
3923 if (code == CODE_LABEL)
3924 return emit_label (x);
3925 else if (code == INSN)
3926 return emit_insn (x);
3927 else if (code == JUMP_INSN)
3929 register rtx insn = emit_jump_insn (x);
3930 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3931 return emit_barrier ();
3934 else if (code == CALL_INSN)
3935 return emit_call_insn (x);
3940 /* Begin emitting insns to a sequence which can be packaged in an
3941 RTL_EXPR. If this sequence will contain something that might cause
3942 the compiler to pop arguments to function calls (because those
3943 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3944 details), use do_pending_stack_adjust before calling this function.
3945 That will ensure that the deferred pops are not accidentally
3946 emitted in the middle of this sequence. */
3951 struct sequence_stack *tem;
3953 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3955 tem->next = seq_stack;
3956 tem->first = first_insn;
3957 tem->last = last_insn;
3958 tem->sequence_rtl_expr = seq_rtl_expr;
3966 /* Similarly, but indicate that this sequence will be placed in T, an
3967 RTL_EXPR. See the documentation for start_sequence for more
3968 information about how to use this function. */
3971 start_sequence_for_rtl_expr (t)
3979 /* Set up the insn chain starting with FIRST as the current sequence,
3980 saving the previously current one. See the documentation for
3981 start_sequence for more information about how to use this function. */
3984 push_to_sequence (first)
3991 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3997 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4000 push_to_full_sequence (first, last)
4006 /* We really should have the end of the insn chain here. */
4007 if (last && NEXT_INSN (last))
4011 /* Set up the outer-level insn chain
4012 as the current sequence, saving the previously current one. */
4015 push_topmost_sequence ()
4017 struct sequence_stack *stack, *top = NULL;
4021 for (stack = seq_stack; stack; stack = stack->next)
4024 first_insn = top->first;
4025 last_insn = top->last;
4026 seq_rtl_expr = top->sequence_rtl_expr;
4029 /* After emitting to the outer-level insn chain, update the outer-level
4030 insn chain, and restore the previous saved state. */
4033 pop_topmost_sequence ()
4035 struct sequence_stack *stack, *top = NULL;
4037 for (stack = seq_stack; stack; stack = stack->next)
4040 top->first = first_insn;
4041 top->last = last_insn;
4042 /* ??? Why don't we save seq_rtl_expr here? */
4047 /* After emitting to a sequence, restore previous saved state.
4049 To get the contents of the sequence just made, you must call
4050 `gen_sequence' *before* calling here.
4052 If the compiler might have deferred popping arguments while
4053 generating this sequence, and this sequence will not be immediately
4054 inserted into the instruction stream, use do_pending_stack_adjust
4055 before calling gen_sequence. That will ensure that the deferred
4056 pops are inserted into this sequence, and not into some random
4057 location in the instruction stream. See INHIBIT_DEFER_POP for more
4058 information about deferred popping of arguments. */
4063 struct sequence_stack *tem = seq_stack;
4065 first_insn = tem->first;
4066 last_insn = tem->last;
4067 seq_rtl_expr = tem->sequence_rtl_expr;
4068 seq_stack = tem->next;
4073 /* This works like end_sequence, but records the old sequence in FIRST
4077 end_full_sequence (first, last)
4080 *first = first_insn;
4085 /* Return 1 if currently emitting into a sequence. */
4090 return seq_stack != 0;
4093 /* Generate a SEQUENCE rtx containing the insns already emitted
4094 to the current sequence.
4096 This is how the gen_... function from a DEFINE_EXPAND
4097 constructs the SEQUENCE that it returns. */
4107 /* Count the insns in the chain. */
4109 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4112 /* If only one insn, return it rather than a SEQUENCE.
4113 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4114 the case of an empty list.)
4115 We only return the pattern of an insn if its code is INSN and it
4116 has no notes. This ensures that no information gets lost. */
4118 && ! RTX_FRAME_RELATED_P (first_insn)
4119 && GET_CODE (first_insn) == INSN
4120 /* Don't throw away any reg notes. */
4121 && REG_NOTES (first_insn) == 0)
4122 return PATTERN (first_insn);
4124 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4126 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4127 XVECEXP (result, 0, i) = tem;
4132 /* Put the various virtual registers into REGNO_REG_RTX. */
4135 init_virtual_regs (es)
4136 struct emit_status *es;
4138 rtx *ptr = es->x_regno_reg_rtx;
4139 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4140 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4141 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4142 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4143 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4147 clear_emit_caches ()
4151 /* Clear the start_sequence/gen_sequence cache. */
4152 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4153 sequence_result[i] = 0;
4157 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4158 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4159 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4160 static int copy_insn_n_scratches;
4162 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4163 copied an ASM_OPERANDS.
4164 In that case, it is the original input-operand vector. */
4165 static rtvec orig_asm_operands_vector;
4167 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4168 copied an ASM_OPERANDS.
4169 In that case, it is the copied input-operand vector. */
4170 static rtvec copy_asm_operands_vector;
4172 /* Likewise for the constraints vector. */
4173 static rtvec orig_asm_constraints_vector;
4174 static rtvec copy_asm_constraints_vector;
4176 /* Recursively create a new copy of an rtx for copy_insn.
4177 This function differs from copy_rtx in that it handles SCRATCHes and
4178 ASM_OPERANDs properly.
4179 Normally, this function is not used directly; use copy_insn as front end.
4180 However, you could first copy an insn pattern with copy_insn and then use
4181 this function afterwards to properly copy any REG_NOTEs containing
4190 register RTX_CODE code;
4191 register const char *format_ptr;
4193 code = GET_CODE (orig);
4209 for (i = 0; i < copy_insn_n_scratches; i++)
4210 if (copy_insn_scratch_in[i] == orig)
4211 return copy_insn_scratch_out[i];
4215 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4216 a LABEL_REF, it isn't sharable. */
4217 if (GET_CODE (XEXP (orig, 0)) == PLUS
4218 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4219 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4223 /* A MEM with a constant address is not sharable. The problem is that
4224 the constant address may need to be reloaded. If the mem is shared,
4225 then reloading one copy of this mem will cause all copies to appear
4226 to have been reloaded. */
4232 copy = rtx_alloc (code);
4234 /* Copy the various flags, and other information. We assume that
4235 all fields need copying, and then clear the fields that should
4236 not be copied. That is the sensible default behavior, and forces
4237 us to explicitly document why we are *not* copying a flag. */
4238 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4240 /* We do not copy the USED flag, which is used as a mark bit during
4241 walks over the RTL. */
4244 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4245 if (GET_RTX_CLASS (code) == 'i')
4249 copy->frame_related = 0;
4252 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4254 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4256 copy->fld[i] = orig->fld[i];
4257 switch (*format_ptr++)
4260 if (XEXP (orig, i) != NULL)
4261 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4266 if (XVEC (orig, i) == orig_asm_constraints_vector)
4267 XVEC (copy, i) = copy_asm_constraints_vector;
4268 else if (XVEC (orig, i) == orig_asm_operands_vector)
4269 XVEC (copy, i) = copy_asm_operands_vector;
4270 else if (XVEC (orig, i) != NULL)
4272 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4273 for (j = 0; j < XVECLEN (copy, i); j++)
4274 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4285 /* These are left unchanged. */
4293 if (code == SCRATCH)
4295 i = copy_insn_n_scratches++;
4296 if (i >= MAX_RECOG_OPERANDS)
4298 copy_insn_scratch_in[i] = orig;
4299 copy_insn_scratch_out[i] = copy;
4301 else if (code == ASM_OPERANDS)
4303 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4304 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4305 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4306 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4312 /* Create a new copy of an rtx.
4313 This function differs from copy_rtx in that it handles SCRATCHes and
4314 ASM_OPERANDs properly.
4315 INSN doesn't really have to be a full INSN; it could be just the
4321 copy_insn_n_scratches = 0;
4322 orig_asm_operands_vector = 0;
4323 orig_asm_constraints_vector = 0;
4324 copy_asm_operands_vector = 0;
4325 copy_asm_constraints_vector = 0;
4326 return copy_insn_1 (insn);
4329 /* Initialize data structures and variables in this file
4330 before generating rtl for each function. */
4335 struct function *f = cfun;
4337 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4340 seq_rtl_expr = NULL;
4342 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4345 first_label_num = label_num;
4349 clear_emit_caches ();
4351 /* Init the tables that describe all the pseudo regs. */
4353 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4355 f->emit->regno_pointer_align
4356 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4357 sizeof (unsigned char));
4360 = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
4363 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4364 init_virtual_regs (f->emit);
4366 /* Indicate that the virtual registers and stack locations are
4368 REG_POINTER (stack_pointer_rtx) = 1;
4369 REG_POINTER (frame_pointer_rtx) = 1;
4370 REG_POINTER (hard_frame_pointer_rtx) = 1;
4371 REG_POINTER (arg_pointer_rtx) = 1;
4373 REG_POINTER (virtual_incoming_args_rtx) = 1;
4374 REG_POINTER (virtual_stack_vars_rtx) = 1;
4375 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4376 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4377 REG_POINTER (virtual_cfa_rtx) = 1;
4379 #ifdef STACK_BOUNDARY
4380 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4381 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4382 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4383 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4385 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4386 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4387 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4388 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4389 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4392 #ifdef INIT_EXPANDERS
4397 /* Mark SS for GC. */
4400 mark_sequence_stack (ss)
4401 struct sequence_stack *ss;
4405 ggc_mark_rtx (ss->first);
4406 ggc_mark_tree (ss->sequence_rtl_expr);
4411 /* Mark ES for GC. */
4414 mark_emit_status (es)
4415 struct emit_status *es;
4423 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
4427 mark_sequence_stack (es->sequence_stack);
4428 ggc_mark_tree (es->sequence_rtl_expr);
4429 ggc_mark_rtx (es->x_first_insn);
4432 /* Create some permanent unique rtl objects shared between all functions.
4433 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4436 init_emit_once (line_numbers)
4440 enum machine_mode mode;
4441 enum machine_mode double_mode;
4443 /* Initialize the CONST_INT and memory attribute hash tables. */
4444 const_int_htab = htab_create (37, const_int_htab_hash,
4445 const_int_htab_eq, NULL);
4446 ggc_add_deletable_htab (const_int_htab, 0, 0);
4448 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4449 mem_attrs_htab_eq, NULL);
4450 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4452 no_line_numbers = ! line_numbers;
4454 /* Compute the word and byte modes. */
4456 byte_mode = VOIDmode;
4457 word_mode = VOIDmode;
4458 double_mode = VOIDmode;
4460 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4461 mode = GET_MODE_WIDER_MODE (mode))
4463 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4464 && byte_mode == VOIDmode)
4467 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4468 && word_mode == VOIDmode)
4472 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4473 mode = GET_MODE_WIDER_MODE (mode))
4475 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4476 && double_mode == VOIDmode)
4480 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4482 /* Assign register numbers to the globally defined register rtx.
4483 This must be done at runtime because the register number field
4484 is in a union and some compilers can't initialize unions. */
4486 pc_rtx = gen_rtx (PC, VOIDmode);
4487 cc0_rtx = gen_rtx (CC0, VOIDmode);
4488 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4489 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4490 if (hard_frame_pointer_rtx == 0)
4491 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4492 HARD_FRAME_POINTER_REGNUM);
4493 if (arg_pointer_rtx == 0)
4494 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4495 virtual_incoming_args_rtx =
4496 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4497 virtual_stack_vars_rtx =
4498 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4499 virtual_stack_dynamic_rtx =
4500 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4501 virtual_outgoing_args_rtx =
4502 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4503 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4505 /* These rtx must be roots if GC is enabled. */
4506 ggc_add_rtx_root (global_rtl, GR_MAX);
4508 #ifdef INIT_EXPANDERS
4509 /* This is to initialize {init|mark|free}_machine_status before the first
4510 call to push_function_context_to. This is needed by the Chill front
4511 end which calls push_function_context_to before the first cal to
4512 init_function_start. */
4516 /* Create the unique rtx's for certain rtx codes and operand values. */
4518 /* Don't use gen_rtx here since gen_rtx in this case
4519 tries to use these variables. */
4520 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4521 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4522 gen_rtx_raw_CONST_INT (VOIDmode, i);
4523 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4525 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4526 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4527 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4529 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4531 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4532 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4533 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4534 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4536 for (i = 0; i <= 2; i++)
4538 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4539 mode = GET_MODE_WIDER_MODE (mode))
4541 rtx tem = rtx_alloc (CONST_DOUBLE);
4542 union real_extract u;
4544 /* Zero any holes in a structure. */
4545 memset ((char *) &u, 0, sizeof u);
4546 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4548 /* Avoid trailing garbage in the rtx. */
4549 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4550 CONST_DOUBLE_LOW (tem) = 0;
4551 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4552 CONST_DOUBLE_HIGH (tem) = 0;
4554 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4555 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4556 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4557 PUT_MODE (tem, mode);
4559 const_tiny_rtx[i][(int) mode] = tem;
4562 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4564 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4565 mode = GET_MODE_WIDER_MODE (mode))
4566 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4568 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4570 mode = GET_MODE_WIDER_MODE (mode))
4571 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4574 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4575 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4576 const_tiny_rtx[0][i] = const0_rtx;
4578 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4579 if (STORE_FLAG_VALUE == 1)
4580 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4582 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4583 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4584 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4585 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4586 ggc_add_rtx_root (&const_true_rtx, 1);
4588 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4589 return_address_pointer_rtx
4590 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4594 struct_value_rtx = STRUCT_VALUE;
4596 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4599 #ifdef STRUCT_VALUE_INCOMING
4600 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4602 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4603 struct_value_incoming_rtx
4604 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4606 struct_value_incoming_rtx = struct_value_rtx;
4610 #ifdef STATIC_CHAIN_REGNUM
4611 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4613 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4614 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4615 static_chain_incoming_rtx
4616 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4619 static_chain_incoming_rtx = static_chain_rtx;
4623 static_chain_rtx = STATIC_CHAIN;
4625 #ifdef STATIC_CHAIN_INCOMING
4626 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4628 static_chain_incoming_rtx = static_chain_rtx;
4632 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4633 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4635 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4636 ggc_add_rtx_root (&struct_value_rtx, 1);
4637 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4638 ggc_add_rtx_root (&static_chain_rtx, 1);
4639 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4640 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4643 /* Query and clear/ restore no_line_numbers. This is used by the
4644 switch / case handling in stmt.c to give proper line numbers in
4645 warnings about unreachable code. */
4648 force_line_numbers ()
4650 int old = no_line_numbers;
4652 no_line_numbers = 0;
4654 force_next_line_note ();
4659 restore_line_number_status (old_value)
4662 no_line_numbers = old_value;