1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl[GR_MAX];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
108 REAL_VALUE_TYPE dconst0;
109 REAL_VALUE_TYPE dconst1;
110 REAL_VALUE_TYPE dconst2;
111 REAL_VALUE_TYPE dconstm1;
113 /* All references to the following fixed hard registers go through
114 these unique rtl objects. On machines where the frame-pointer and
115 arg-pointer are the same register, they use the same unique object.
117 After register allocation, other rtl objects which used to be pseudo-regs
118 may be clobbered to refer to the frame-pointer register.
119 But references that were originally to the frame-pointer can be
120 distinguished from the others because they contain frame_pointer_rtx.
122 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
123 tricky: until register elimination has taken place hard_frame_pointer_rtx
124 should be used if it is being set, and frame_pointer_rtx otherwise. After
125 register elimination hard_frame_pointer_rtx should always be used.
126 On machines where the two registers are same (most) then these are the
129 In an inline procedure, the stack and frame pointer rtxs may not be
130 used for anything else. */
131 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
132 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
133 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
134 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
135 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
137 /* This is used to implement __builtin_return_address for some machines.
138 See for instance the MIPS port. */
139 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
141 /* We make one copy of (const_int C) where C is in
142 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
143 to save space during the compilation and simplify comparisons of
146 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
148 /* A hash table storing CONST_INTs whose absolute value is greater
149 than MAX_SAVED_CONST_INT. */
151 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
152 htab_t const_int_htab;
154 /* A hash table storing memory attribute structures. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
156 htab_t mem_attrs_htab;
158 /* A hash table storing all CONST_DOUBLEs. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
160 htab_t const_double_htab;
162 #define first_insn (cfun->emit->x_first_insn)
163 #define last_insn (cfun->emit->x_last_insn)
164 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
165 #define last_linenum (cfun->emit->x_last_linenum)
166 #define last_filename (cfun->emit->x_last_filename)
167 #define first_label_num (cfun->emit->x_first_label_num)
169 static rtx make_jump_insn_raw PARAMS ((rtx));
170 static rtx make_call_insn_raw PARAMS ((rtx));
171 static rtx find_line_note PARAMS ((rtx));
172 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
174 static void unshare_all_rtl_1 PARAMS ((rtx));
175 static void unshare_all_decls PARAMS ((tree));
176 static void reset_used_decls PARAMS ((tree));
177 static void mark_label_nuses PARAMS ((rtx));
178 static hashval_t const_int_htab_hash PARAMS ((const void *));
179 static int const_int_htab_eq PARAMS ((const void *,
181 static hashval_t const_double_htab_hash PARAMS ((const void *));
182 static int const_double_htab_eq PARAMS ((const void *,
184 static rtx lookup_const_double PARAMS ((rtx));
185 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
186 static int mem_attrs_htab_eq PARAMS ((const void *,
188 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
191 static tree component_ref_for_mem_expr PARAMS ((tree));
192 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
194 /* Probability of the conditional branch currently proceeded by try_split.
195 Set to -1 otherwise. */
196 int split_branch_probability = -1;
198 /* Returns a hash code for X (which is a really a CONST_INT). */
201 const_int_htab_hash (x)
204 return (hashval_t) INTVAL ((struct rtx_def *) x);
207 /* Returns non-zero if the value represented by X (which is really a
208 CONST_INT) is the same as that given by Y (which is really a
212 const_int_htab_eq (x, y)
216 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
219 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
221 const_double_htab_hash (x)
228 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
229 h ^= XWINT (value, i);
233 /* Returns non-zero if the value represented by X (really a ...)
234 is the same as that represented by Y (really a ...) */
236 const_double_htab_eq (x, y)
240 rtx a = (rtx)x, b = (rtx)y;
243 if (GET_MODE (a) != GET_MODE (b))
245 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
246 if (XWINT (a, i) != XWINT (b, i))
252 /* Returns a hash code for X (which is a really a mem_attrs *). */
255 mem_attrs_htab_hash (x)
258 mem_attrs *p = (mem_attrs *) x;
260 return (p->alias ^ (p->align * 1000)
261 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
262 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
266 /* Returns non-zero if the value represented by X (which is really a
267 mem_attrs *) is the same as that given by Y (which is also really a
271 mem_attrs_htab_eq (x, y)
275 mem_attrs *p = (mem_attrs *) x;
276 mem_attrs *q = (mem_attrs *) y;
278 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
279 && p->size == q->size && p->align == q->align);
282 /* Allocate a new mem_attrs structure and insert it into the hash table if
283 one identical to it is not already in the table. We are doing this for
287 get_mem_attrs (alias, expr, offset, size, align, mode)
293 enum machine_mode mode;
298 /* If everything is the default, we can just return zero. */
299 if (alias == 0 && expr == 0 && offset == 0
301 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
302 && (align == BITS_PER_UNIT
304 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
309 attrs.offset = offset;
313 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
316 *slot = ggc_alloc (sizeof (mem_attrs));
317 memcpy (*slot, &attrs, sizeof (mem_attrs));
323 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
324 don't attempt to share with the various global pieces of rtl (such as
325 frame_pointer_rtx). */
328 gen_raw_REG (mode, regno)
329 enum machine_mode mode;
332 rtx x = gen_rtx_raw_REG (mode, regno);
333 ORIGINAL_REGNO (x) = regno;
337 /* There are some RTL codes that require special attention; the generation
338 functions do the raw handling. If you add to this list, modify
339 special_rtx in gengenrtl.c as well. */
342 gen_rtx_CONST_INT (mode, arg)
343 enum machine_mode mode ATTRIBUTE_UNUSED;
348 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
349 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
351 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
352 if (const_true_rtx && arg == STORE_FLAG_VALUE)
353 return const_true_rtx;
356 /* Look up the CONST_INT in the hash table. */
357 slot = htab_find_slot_with_hash (const_int_htab, &arg,
358 (hashval_t) arg, INSERT);
360 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
366 gen_int_mode (c, mode)
368 enum machine_mode mode;
370 return GEN_INT (trunc_int_for_mode (c, mode));
373 /* CONST_DOUBLEs might be created from pairs of integers, or from
374 REAL_VALUE_TYPEs. Also, their length is known only at run time,
375 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
377 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
378 hash table. If so, return its counterpart; otherwise add it
379 to the hash table and return it. */
381 lookup_const_double (real)
384 void **slot = htab_find_slot (const_double_htab, real, INSERT);
391 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
392 VALUE in mode MODE. */
394 const_double_from_real_value (value, mode)
395 REAL_VALUE_TYPE value;
396 enum machine_mode mode;
398 rtx real = rtx_alloc (CONST_DOUBLE);
399 PUT_MODE (real, mode);
401 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
403 return lookup_const_double (real);
406 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
407 of ints: I0 is the low-order word and I1 is the high-order word.
408 Do not use this routine for non-integer modes; convert to
409 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
412 immed_double_const (i0, i1, mode)
413 HOST_WIDE_INT i0, i1;
414 enum machine_mode mode;
419 if (mode != VOIDmode)
422 if (GET_MODE_CLASS (mode) != MODE_INT
423 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
424 /* We can get a 0 for an error mark. */
425 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
426 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
429 /* We clear out all bits that don't belong in MODE, unless they and
430 our sign bit are all one. So we get either a reasonable negative
431 value or a reasonable unsigned value for this mode. */
432 width = GET_MODE_BITSIZE (mode);
433 if (width < HOST_BITS_PER_WIDE_INT
434 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
435 != ((HOST_WIDE_INT) (-1) << (width - 1))))
436 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
437 else if (width == HOST_BITS_PER_WIDE_INT
438 && ! (i1 == ~0 && i0 < 0))
440 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
441 /* We cannot represent this value as a constant. */
444 /* If this would be an entire word for the target, but is not for
445 the host, then sign-extend on the host so that the number will
446 look the same way on the host that it would on the target.
448 For example, when building a 64 bit alpha hosted 32 bit sparc
449 targeted compiler, then we want the 32 bit unsigned value -1 to be
450 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
451 The latter confuses the sparc backend. */
453 if (width < HOST_BITS_PER_WIDE_INT
454 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
455 i0 |= ((HOST_WIDE_INT) (-1) << width);
457 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
460 ??? Strictly speaking, this is wrong if we create a CONST_INT for
461 a large unsigned constant with the size of MODE being
462 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
463 in a wider mode. In that case we will mis-interpret it as a
466 Unfortunately, the only alternative is to make a CONST_DOUBLE for
467 any constant in any mode if it is an unsigned constant larger
468 than the maximum signed integer in an int on the host. However,
469 doing this will break everyone that always expects to see a
470 CONST_INT for SImode and smaller.
472 We have always been making CONST_INTs in this case, so nothing
473 new is being broken. */
475 if (width <= HOST_BITS_PER_WIDE_INT)
476 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
479 /* If this integer fits in one word, return a CONST_INT. */
480 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
483 /* We use VOIDmode for integers. */
484 value = rtx_alloc (CONST_DOUBLE);
485 PUT_MODE (value, VOIDmode);
487 CONST_DOUBLE_LOW (value) = i0;
488 CONST_DOUBLE_HIGH (value) = i1;
490 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
491 XWINT (value, i) = 0;
493 return lookup_const_double (value);
497 gen_rtx_REG (mode, regno)
498 enum machine_mode mode;
501 /* In case the MD file explicitly references the frame pointer, have
502 all such references point to the same frame pointer. This is
503 used during frame pointer elimination to distinguish the explicit
504 references to these registers from pseudos that happened to be
507 If we have eliminated the frame pointer or arg pointer, we will
508 be using it as a normal register, for example as a spill
509 register. In such cases, we might be accessing it in a mode that
510 is not Pmode and therefore cannot use the pre-allocated rtx.
512 Also don't do this when we are making new REGs in reload, since
513 we don't want to get confused with the real pointers. */
515 if (mode == Pmode && !reload_in_progress)
517 if (regno == FRAME_POINTER_REGNUM
518 && (!reload_completed || frame_pointer_needed))
519 return frame_pointer_rtx;
520 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
521 if (regno == HARD_FRAME_POINTER_REGNUM
522 && (!reload_completed || frame_pointer_needed))
523 return hard_frame_pointer_rtx;
525 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
526 if (regno == ARG_POINTER_REGNUM)
527 return arg_pointer_rtx;
529 #ifdef RETURN_ADDRESS_POINTER_REGNUM
530 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
531 return return_address_pointer_rtx;
533 if (regno == PIC_OFFSET_TABLE_REGNUM
534 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
535 return pic_offset_table_rtx;
536 if (regno == STACK_POINTER_REGNUM)
537 return stack_pointer_rtx;
541 /* If the per-function register table has been set up, try to re-use
542 an existing entry in that table to avoid useless generation of RTL.
544 This code is disabled for now until we can fix the various backends
545 which depend on having non-shared hard registers in some cases. Long
546 term we want to re-enable this code as it can significantly cut down
547 on the amount of useless RTL that gets generated.
549 We'll also need to fix some code that runs after reload that wants to
550 set ORIGINAL_REGNO. */
555 && regno < FIRST_PSEUDO_REGISTER
556 && reg_raw_mode[regno] == mode)
557 return regno_reg_rtx[regno];
560 return gen_raw_REG (mode, regno);
564 gen_rtx_MEM (mode, addr)
565 enum machine_mode mode;
568 rtx rt = gen_rtx_raw_MEM (mode, addr);
570 /* This field is not cleared by the mere allocation of the rtx, so
578 gen_rtx_SUBREG (mode, reg, offset)
579 enum machine_mode mode;
583 /* This is the most common failure type.
584 Catch it early so we can see who does it. */
585 if ((offset % GET_MODE_SIZE (mode)) != 0)
588 /* This check isn't usable right now because combine will
589 throw arbitrary crap like a CALL into a SUBREG in
590 gen_lowpart_for_combine so we must just eat it. */
592 /* Check for this too. */
593 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
596 return gen_rtx_raw_SUBREG (mode, reg, offset);
599 /* Generate a SUBREG representing the least-significant part of REG if MODE
600 is smaller than mode of REG, otherwise paradoxical SUBREG. */
603 gen_lowpart_SUBREG (mode, reg)
604 enum machine_mode mode;
607 enum machine_mode inmode;
609 inmode = GET_MODE (reg);
610 if (inmode == VOIDmode)
612 return gen_rtx_SUBREG (mode, reg,
613 subreg_lowpart_offset (mode, inmode));
616 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
618 ** This routine generates an RTX of the size specified by
619 ** <code>, which is an RTX code. The RTX structure is initialized
620 ** from the arguments <element1> through <elementn>, which are
621 ** interpreted according to the specific RTX type's format. The
622 ** special machine mode associated with the rtx (if any) is specified
625 ** gen_rtx can be invoked in a way which resembles the lisp-like
626 ** rtx it will generate. For example, the following rtx structure:
628 ** (plus:QI (mem:QI (reg:SI 1))
629 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
631 ** ...would be generated by the following C code:
633 ** gen_rtx (PLUS, QImode,
634 ** gen_rtx (MEM, QImode,
635 ** gen_rtx (REG, SImode, 1)),
636 ** gen_rtx (MEM, QImode,
637 ** gen_rtx (PLUS, SImode,
638 ** gen_rtx (REG, SImode, 2),
639 ** gen_rtx (REG, SImode, 3)))),
644 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
646 int i; /* Array indices... */
647 const char *fmt; /* Current rtx's format... */
648 rtx rt_val; /* RTX to return to caller... */
651 VA_FIXEDARG (p, enum rtx_code, code);
652 VA_FIXEDARG (p, enum machine_mode, mode);
657 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
662 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
663 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
665 rt_val = immed_double_const (arg0, arg1, mode);
670 rt_val = gen_rtx_REG (mode, va_arg (p, int));
674 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
678 rt_val = rtx_alloc (code); /* Allocate the storage space. */
679 rt_val->mode = mode; /* Store the machine mode... */
681 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
682 for (i = 0; i < GET_RTX_LENGTH (code); i++)
686 case '0': /* Unused field. */
689 case 'i': /* An integer? */
690 XINT (rt_val, i) = va_arg (p, int);
693 case 'w': /* A wide integer? */
694 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
697 case 's': /* A string? */
698 XSTR (rt_val, i) = va_arg (p, char *);
701 case 'e': /* An expression? */
702 case 'u': /* An insn? Same except when printing. */
703 XEXP (rt_val, i) = va_arg (p, rtx);
706 case 'E': /* An RTX vector? */
707 XVEC (rt_val, i) = va_arg (p, rtvec);
710 case 'b': /* A bitmap? */
711 XBITMAP (rt_val, i) = va_arg (p, bitmap);
714 case 't': /* A tree? */
715 XTREE (rt_val, i) = va_arg (p, tree);
729 /* gen_rtvec (n, [rt1, ..., rtn])
731 ** This routine creates an rtvec and stores within it the
732 ** pointers to rtx's which are its arguments.
737 gen_rtvec VPARAMS ((int n, ...))
743 VA_FIXEDARG (p, int, n);
746 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
748 vector = (rtx *) alloca (n * sizeof (rtx));
750 for (i = 0; i < n; i++)
751 vector[i] = va_arg (p, rtx);
753 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
757 return gen_rtvec_v (save_n, vector);
761 gen_rtvec_v (n, argp)
769 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
771 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
773 for (i = 0; i < n; i++)
774 rt_val->elem[i] = *argp++;
779 /* Generate a REG rtx for a new pseudo register of mode MODE.
780 This pseudo is assigned the next sequential register number. */
784 enum machine_mode mode;
786 struct function *f = cfun;
789 /* Don't let anything called after initial flow analysis create new
794 if (generating_concat_p
795 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
796 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
798 /* For complex modes, don't make a single pseudo.
799 Instead, make a CONCAT of two pseudos.
800 This allows noncontiguous allocation of the real and imaginary parts,
801 which makes much better code. Besides, allocating DCmode
802 pseudos overstrains reload on some machines like the 386. */
803 rtx realpart, imagpart;
804 int size = GET_MODE_UNIT_SIZE (mode);
805 enum machine_mode partmode
806 = mode_for_size (size * BITS_PER_UNIT,
807 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
808 ? MODE_FLOAT : MODE_INT),
811 realpart = gen_reg_rtx (partmode);
812 imagpart = gen_reg_rtx (partmode);
813 return gen_rtx_CONCAT (mode, realpart, imagpart);
816 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
817 enough to have an element for this pseudo reg number. */
819 if (reg_rtx_no == f->emit->regno_pointer_align_length)
821 int old_size = f->emit->regno_pointer_align_length;
826 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
827 memset (new + old_size, 0, old_size);
828 f->emit->regno_pointer_align = (unsigned char *) new;
830 new1 = (rtx *) ggc_realloc (f->emit->x_regno_reg_rtx,
831 old_size * 2 * sizeof (rtx));
832 memset (new1 + old_size, 0, old_size * sizeof (rtx));
833 regno_reg_rtx = new1;
835 new2 = (tree *) ggc_realloc (f->emit->regno_decl,
836 old_size * 2 * sizeof (tree));
837 memset (new2 + old_size, 0, old_size * sizeof (tree));
838 f->emit->regno_decl = new2;
840 f->emit->regno_pointer_align_length = old_size * 2;
843 val = gen_raw_REG (mode, reg_rtx_no);
844 regno_reg_rtx[reg_rtx_no++] = val;
848 /* Identify REG (which may be a CONCAT) as a user register. */
854 if (GET_CODE (reg) == CONCAT)
856 REG_USERVAR_P (XEXP (reg, 0)) = 1;
857 REG_USERVAR_P (XEXP (reg, 1)) = 1;
859 else if (GET_CODE (reg) == REG)
860 REG_USERVAR_P (reg) = 1;
865 /* Identify REG as a probable pointer register and show its alignment
866 as ALIGN, if nonzero. */
869 mark_reg_pointer (reg, align)
873 if (! REG_POINTER (reg))
875 REG_POINTER (reg) = 1;
878 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
880 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
881 /* We can no-longer be sure just how aligned this pointer is */
882 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
885 /* Return 1 plus largest pseudo reg number used in the current function. */
893 /* Return 1 + the largest label number used so far in the current function. */
898 if (last_label_num && label_num == base_label_num)
899 return last_label_num;
903 /* Return first label number used in this function (if any were used). */
906 get_first_label_num ()
908 return first_label_num;
911 /* Return the final regno of X, which is a SUBREG of a hard
914 subreg_hard_regno (x, check_mode)
918 enum machine_mode mode = GET_MODE (x);
919 unsigned int byte_offset, base_regno, final_regno;
920 rtx reg = SUBREG_REG (x);
922 /* This is where we attempt to catch illegal subregs
923 created by the compiler. */
924 if (GET_CODE (x) != SUBREG
925 || GET_CODE (reg) != REG)
927 base_regno = REGNO (reg);
928 if (base_regno >= FIRST_PSEUDO_REGISTER)
930 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
933 /* Catch non-congruent offsets too. */
934 byte_offset = SUBREG_BYTE (x);
935 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
938 final_regno = subreg_regno (x);
943 /* Return a value representing some low-order bits of X, where the number
944 of low-order bits is given by MODE. Note that no conversion is done
945 between floating-point and fixed-point values, rather, the bit
946 representation is returned.
948 This function handles the cases in common between gen_lowpart, below,
949 and two variants in cse.c and combine.c. These are the cases that can
950 be safely handled at all points in the compilation.
952 If this is not a case we can handle, return 0. */
955 gen_lowpart_common (mode, x)
956 enum machine_mode mode;
959 int msize = GET_MODE_SIZE (mode);
960 int xsize = GET_MODE_SIZE (GET_MODE (x));
963 if (GET_MODE (x) == mode)
966 /* MODE must occupy no more words than the mode of X. */
967 if (GET_MODE (x) != VOIDmode
968 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
969 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
972 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
973 if (GET_MODE_CLASS (mode) == MODE_FLOAT
974 && GET_MODE (x) != VOIDmode && msize > xsize)
977 offset = subreg_lowpart_offset (mode, GET_MODE (x));
979 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
980 && (GET_MODE_CLASS (mode) == MODE_INT
981 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
983 /* If we are getting the low-order part of something that has been
984 sign- or zero-extended, we can either just use the object being
985 extended or make a narrower extension. If we want an even smaller
986 piece than the size of the object being extended, call ourselves
989 This case is used mostly by combine and cse. */
991 if (GET_MODE (XEXP (x, 0)) == mode)
993 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
994 return gen_lowpart_common (mode, XEXP (x, 0));
995 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
996 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
998 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
999 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1000 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1001 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1002 from the low-order part of the constant. */
1003 else if ((GET_MODE_CLASS (mode) == MODE_INT
1004 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1005 && GET_MODE (x) == VOIDmode
1006 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1008 /* If MODE is twice the host word size, X is already the desired
1009 representation. Otherwise, if MODE is wider than a word, we can't
1010 do this. If MODE is exactly a word, return just one CONST_INT. */
1012 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1014 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1016 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1017 return (GET_CODE (x) == CONST_INT ? x
1018 : GEN_INT (CONST_DOUBLE_LOW (x)));
1021 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1022 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1023 : CONST_DOUBLE_LOW (x));
1025 /* Sign extend to HOST_WIDE_INT. */
1026 val = trunc_int_for_mode (val, mode);
1028 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1033 /* The floating-point emulator can handle all conversions between
1034 FP and integer operands. This simplifies reload because it
1035 doesn't have to deal with constructs like (subreg:DI
1036 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1037 /* Single-precision floats are always 32-bits and double-precision
1038 floats are always 64-bits. */
1040 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1041 && GET_MODE_BITSIZE (mode) == 32
1042 && GET_CODE (x) == CONST_INT)
1048 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
1049 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1051 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1052 && GET_MODE_BITSIZE (mode) == 64
1053 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1054 && GET_MODE (x) == VOIDmode)
1058 HOST_WIDE_INT low, high;
1060 if (GET_CODE (x) == CONST_INT)
1063 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1067 low = CONST_DOUBLE_LOW (x);
1068 high = CONST_DOUBLE_HIGH (x);
1071 #if HOST_BITS_PER_WIDE_INT == 32
1072 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1074 if (WORDS_BIG_ENDIAN)
1075 i[0] = high, i[1] = low;
1077 i[0] = low, i[1] = high;
1082 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1083 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1085 else if ((GET_MODE_CLASS (mode) == MODE_INT
1086 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1087 && GET_CODE (x) == CONST_DOUBLE
1088 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1091 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1092 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1094 /* Convert 'r' into an array of four 32-bit words in target word
1096 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1097 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1100 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1103 i[3 - 3 * endian] = 0;
1106 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1107 i[2 - 2 * endian] = 0;
1108 i[3 - 2 * endian] = 0;
1111 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1112 i[3 - 3 * endian] = 0;
1115 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1120 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1122 #if HOST_BITS_PER_WIDE_INT == 32
1123 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1125 if (HOST_BITS_PER_WIDE_INT != 64)
1128 return immed_double_const ((((unsigned long) i[3 * endian])
1129 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1130 (((unsigned long) i[2 - endian])
1131 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1136 /* Otherwise, we can't do this. */
1140 /* Return the real part (which has mode MODE) of a complex value X.
1141 This always comes at the low address in memory. */
1144 gen_realpart (mode, x)
1145 enum machine_mode mode;
1148 if (WORDS_BIG_ENDIAN
1149 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1151 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1153 ("can't access real part of complex value in hard register");
1154 else if (WORDS_BIG_ENDIAN)
1155 return gen_highpart (mode, x);
1157 return gen_lowpart (mode, x);
1160 /* Return the imaginary part (which has mode MODE) of a complex value X.
1161 This always comes at the high address in memory. */
1164 gen_imagpart (mode, x)
1165 enum machine_mode mode;
1168 if (WORDS_BIG_ENDIAN)
1169 return gen_lowpart (mode, x);
1170 else if (! WORDS_BIG_ENDIAN
1171 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1173 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1175 ("can't access imaginary part of complex value in hard register");
1177 return gen_highpart (mode, x);
1180 /* Return 1 iff X, assumed to be a SUBREG,
1181 refers to the real part of the complex value in its containing reg.
1182 Complex values are always stored with the real part in the first word,
1183 regardless of WORDS_BIG_ENDIAN. */
1186 subreg_realpart_p (x)
1189 if (GET_CODE (x) != SUBREG)
1192 return ((unsigned int) SUBREG_BYTE (x)
1193 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1196 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1197 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1198 least-significant part of X.
1199 MODE specifies how big a part of X to return;
1200 it usually should not be larger than a word.
1201 If X is a MEM whose address is a QUEUED, the value may be so also. */
1204 gen_lowpart (mode, x)
1205 enum machine_mode mode;
1208 rtx result = gen_lowpart_common (mode, x);
1212 else if (GET_CODE (x) == REG)
1214 /* Must be a hard reg that's not valid in MODE. */
1215 result = gen_lowpart_common (mode, copy_to_reg (x));
1220 else if (GET_CODE (x) == MEM)
1222 /* The only additional case we can do is MEM. */
1224 if (WORDS_BIG_ENDIAN)
1225 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1226 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1228 if (BYTES_BIG_ENDIAN)
1229 /* Adjust the address so that the address-after-the-data
1231 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1232 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1234 return adjust_address (x, mode, offset);
1236 else if (GET_CODE (x) == ADDRESSOF)
1237 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1242 /* Like `gen_lowpart', but refer to the most significant part.
1243 This is used to access the imaginary part of a complex number. */
1246 gen_highpart (mode, x)
1247 enum machine_mode mode;
1250 unsigned int msize = GET_MODE_SIZE (mode);
1253 /* This case loses if X is a subreg. To catch bugs early,
1254 complain if an invalid MODE is used even in other cases. */
1255 if (msize > UNITS_PER_WORD
1256 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1259 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1260 subreg_highpart_offset (mode, GET_MODE (x)));
1262 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1263 the target if we have a MEM. gen_highpart must return a valid operand,
1264 emitting code if necessary to do so. */
1265 if (result != NULL_RTX && GET_CODE (result) == MEM)
1266 result = validize_mem (result);
1273 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1274 be VOIDmode constant. */
1276 gen_highpart_mode (outermode, innermode, exp)
1277 enum machine_mode outermode, innermode;
1280 if (GET_MODE (exp) != VOIDmode)
1282 if (GET_MODE (exp) != innermode)
1284 return gen_highpart (outermode, exp);
1286 return simplify_gen_subreg (outermode, exp, innermode,
1287 subreg_highpart_offset (outermode, innermode));
1290 /* Return offset in bytes to get OUTERMODE low part
1291 of the value in mode INNERMODE stored in memory in target format. */
1294 subreg_lowpart_offset (outermode, innermode)
1295 enum machine_mode outermode, innermode;
1297 unsigned int offset = 0;
1298 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1302 if (WORDS_BIG_ENDIAN)
1303 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1304 if (BYTES_BIG_ENDIAN)
1305 offset += difference % UNITS_PER_WORD;
1311 /* Return offset in bytes to get OUTERMODE high part
1312 of the value in mode INNERMODE stored in memory in target format. */
1314 subreg_highpart_offset (outermode, innermode)
1315 enum machine_mode outermode, innermode;
1317 unsigned int offset = 0;
1318 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1320 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1325 if (! WORDS_BIG_ENDIAN)
1326 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1327 if (! BYTES_BIG_ENDIAN)
1328 offset += difference % UNITS_PER_WORD;
1334 /* Return 1 iff X, assumed to be a SUBREG,
1335 refers to the least significant part of its containing reg.
1336 If X is not a SUBREG, always return 1 (it is its own low part!). */
1339 subreg_lowpart_p (x)
1342 if (GET_CODE (x) != SUBREG)
1344 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1347 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1348 == SUBREG_BYTE (x));
1352 /* Helper routine for all the constant cases of operand_subword.
1353 Some places invoke this directly. */
1356 constant_subword (op, offset, mode)
1359 enum machine_mode mode;
1361 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1364 /* If OP is already an integer word, return it. */
1365 if (GET_MODE_CLASS (mode) == MODE_INT
1366 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1369 /* The output is some bits, the width of the target machine's word.
1370 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1372 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1373 && GET_MODE_CLASS (mode) == MODE_FLOAT
1374 && GET_MODE_BITSIZE (mode) == 64
1375 && GET_CODE (op) == CONST_DOUBLE)
1380 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1381 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1383 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1384 which the words are written depends on the word endianness.
1385 ??? This is a potential portability problem and should
1386 be fixed at some point.
1388 We must exercise caution with the sign bit. By definition there
1389 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1390 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1391 So we explicitly mask and sign-extend as necessary. */
1392 if (BITS_PER_WORD == 32)
1395 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1396 return GEN_INT (val);
1398 #if HOST_BITS_PER_WIDE_INT >= 64
1399 else if (BITS_PER_WORD >= 64 && offset == 0)
1401 val = k[! WORDS_BIG_ENDIAN];
1402 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1403 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1404 return GEN_INT (val);
1407 else if (BITS_PER_WORD == 16)
1409 val = k[offset >> 1];
1410 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1412 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1413 return GEN_INT (val);
1418 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1419 && GET_MODE_CLASS (mode) == MODE_FLOAT
1420 && GET_MODE_BITSIZE (mode) > 64
1421 && GET_CODE (op) == CONST_DOUBLE)
1426 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1427 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1429 if (BITS_PER_WORD == 32)
1432 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1433 return GEN_INT (val);
1435 #if HOST_BITS_PER_WIDE_INT >= 64
1436 else if (BITS_PER_WORD >= 64 && offset <= 1)
1438 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1439 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1440 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1441 return GEN_INT (val);
1448 /* Single word float is a little harder, since single- and double-word
1449 values often do not have the same high-order bits. We have already
1450 verified that we want the only defined word of the single-word value. */
1451 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1452 && GET_MODE_BITSIZE (mode) == 32
1453 && GET_CODE (op) == CONST_DOUBLE)
1458 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1459 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1461 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1463 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1465 if (BITS_PER_WORD == 16)
1467 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1469 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1472 return GEN_INT (val);
1475 /* The only remaining cases that we can handle are integers.
1476 Convert to proper endianness now since these cases need it.
1477 At this point, offset == 0 means the low-order word.
1479 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1480 in general. However, if OP is (const_int 0), we can just return
1483 if (op == const0_rtx)
1486 if (GET_MODE_CLASS (mode) != MODE_INT
1487 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1488 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1491 if (WORDS_BIG_ENDIAN)
1492 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1494 /* Find out which word on the host machine this value is in and get
1495 it from the constant. */
1496 val = (offset / size_ratio == 0
1497 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1498 : (GET_CODE (op) == CONST_INT
1499 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1501 /* Get the value we want into the low bits of val. */
1502 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1503 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1505 val = trunc_int_for_mode (val, word_mode);
1507 return GEN_INT (val);
1510 /* Return subword OFFSET of operand OP.
1511 The word number, OFFSET, is interpreted as the word number starting
1512 at the low-order address. OFFSET 0 is the low-order word if not
1513 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1515 If we cannot extract the required word, we return zero. Otherwise,
1516 an rtx corresponding to the requested word will be returned.
1518 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1519 reload has completed, a valid address will always be returned. After
1520 reload, if a valid address cannot be returned, we return zero.
1522 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1523 it is the responsibility of the caller.
1525 MODE is the mode of OP in case it is a CONST_INT.
1527 ??? This is still rather broken for some cases. The problem for the
1528 moment is that all callers of this thing provide no 'goal mode' to
1529 tell us to work with. This exists because all callers were written
1530 in a word based SUBREG world.
1531 Now use of this function can be deprecated by simplify_subreg in most
1536 operand_subword (op, offset, validate_address, mode)
1538 unsigned int offset;
1539 int validate_address;
1540 enum machine_mode mode;
1542 if (mode == VOIDmode)
1543 mode = GET_MODE (op);
1545 if (mode == VOIDmode)
1548 /* If OP is narrower than a word, fail. */
1550 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1553 /* If we want a word outside OP, return zero. */
1555 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1558 /* Form a new MEM at the requested address. */
1559 if (GET_CODE (op) == MEM)
1561 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1563 if (! validate_address)
1566 else if (reload_completed)
1568 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1572 return replace_equiv_address (new, XEXP (new, 0));
1575 /* Rest can be handled by simplify_subreg. */
1576 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1579 /* Similar to `operand_subword', but never return 0. If we can't extract
1580 the required subword, put OP into a register and try again. If that fails,
1581 abort. We always validate the address in this case.
1583 MODE is the mode of OP, in case it is CONST_INT. */
1586 operand_subword_force (op, offset, mode)
1588 unsigned int offset;
1589 enum machine_mode mode;
1591 rtx result = operand_subword (op, offset, 1, mode);
1596 if (mode != BLKmode && mode != VOIDmode)
1598 /* If this is a register which can not be accessed by words, copy it
1599 to a pseudo register. */
1600 if (GET_CODE (op) == REG)
1601 op = copy_to_reg (op);
1603 op = force_reg (mode, op);
1606 result = operand_subword (op, offset, 1, mode);
1613 /* Given a compare instruction, swap the operands.
1614 A test instruction is changed into a compare of 0 against the operand. */
1617 reverse_comparison (insn)
1620 rtx body = PATTERN (insn);
1623 if (GET_CODE (body) == SET)
1624 comp = SET_SRC (body);
1626 comp = SET_SRC (XVECEXP (body, 0, 0));
1628 if (GET_CODE (comp) == COMPARE)
1630 rtx op0 = XEXP (comp, 0);
1631 rtx op1 = XEXP (comp, 1);
1632 XEXP (comp, 0) = op1;
1633 XEXP (comp, 1) = op0;
1637 rtx new = gen_rtx_COMPARE (VOIDmode,
1638 CONST0_RTX (GET_MODE (comp)), comp);
1639 if (GET_CODE (body) == SET)
1640 SET_SRC (body) = new;
1642 SET_SRC (XVECEXP (body, 0, 0)) = new;
1646 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1647 or (2) a component ref of something variable. Represent the later with
1648 a NULL expression. */
1651 component_ref_for_mem_expr (ref)
1654 tree inner = TREE_OPERAND (ref, 0);
1656 if (TREE_CODE (inner) == COMPONENT_REF)
1657 inner = component_ref_for_mem_expr (inner);
1660 tree placeholder_ptr = 0;
1662 /* Now remove any conversions: they don't change what the underlying
1663 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1664 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1665 || TREE_CODE (inner) == NON_LVALUE_EXPR
1666 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1667 || TREE_CODE (inner) == SAVE_EXPR
1668 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1669 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1670 inner = find_placeholder (inner, &placeholder_ptr);
1672 inner = TREE_OPERAND (inner, 0);
1674 if (! DECL_P (inner))
1678 if (inner == TREE_OPERAND (ref, 0))
1681 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1682 TREE_OPERAND (ref, 1));
1685 /* Given REF, a MEM, and T, either the type of X or the expression
1686 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1687 if we are making a new object of this type. BITPOS is nonzero if
1688 there is an offset outstanding on T that will be applied later. */
1691 set_mem_attributes_minus_bitpos (ref, t, objectp, bitpos)
1695 HOST_WIDE_INT bitpos;
1697 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1698 tree expr = MEM_EXPR (ref);
1699 rtx offset = MEM_OFFSET (ref);
1700 rtx size = MEM_SIZE (ref);
1701 unsigned int align = MEM_ALIGN (ref);
1702 HOST_WIDE_INT apply_bitpos = 0;
1705 /* It can happen that type_for_mode was given a mode for which there
1706 is no language-level type. In which case it returns NULL, which
1711 type = TYPE_P (t) ? t : TREE_TYPE (t);
1713 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1714 wrong answer, as it assumes that DECL_RTL already has the right alias
1715 info. Callers should not set DECL_RTL until after the call to
1716 set_mem_attributes. */
1717 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1720 /* Get the alias set from the expression or type (perhaps using a
1721 front-end routine) and use it. */
1722 alias = get_alias_set (t);
1724 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1725 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1726 RTX_UNCHANGING_P (ref)
1727 |= ((lang_hooks.honor_readonly
1728 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1729 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1731 /* If we are making an object of this type, or if this is a DECL, we know
1732 that it is a scalar if the type is not an aggregate. */
1733 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1734 MEM_SCALAR_P (ref) = 1;
1736 /* We can set the alignment from the type if we are making an object,
1737 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1738 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1739 align = MAX (align, TYPE_ALIGN (type));
1741 /* If the size is known, we can set that. */
1742 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1743 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1745 /* If T is not a type, we may be able to deduce some more information about
1749 maybe_set_unchanging (ref, t);
1750 if (TREE_THIS_VOLATILE (t))
1751 MEM_VOLATILE_P (ref) = 1;
1753 /* Now remove any conversions: they don't change what the underlying
1754 object is. Likewise for SAVE_EXPR. */
1755 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1756 || TREE_CODE (t) == NON_LVALUE_EXPR
1757 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1758 || TREE_CODE (t) == SAVE_EXPR)
1759 t = TREE_OPERAND (t, 0);
1761 /* If this expression can't be addressed (e.g., it contains a reference
1762 to a non-addressable field), show we don't change its alias set. */
1763 if (! can_address_p (t))
1764 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1766 /* If this is a decl, set the attributes of the MEM from it. */
1770 offset = const0_rtx;
1771 apply_bitpos = bitpos;
1772 size = (DECL_SIZE_UNIT (t)
1773 && host_integerp (DECL_SIZE_UNIT (t), 1)
1774 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1775 align = DECL_ALIGN (t);
1778 /* If this is a constant, we know the alignment. */
1779 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1781 align = TYPE_ALIGN (type);
1782 #ifdef CONSTANT_ALIGNMENT
1783 align = CONSTANT_ALIGNMENT (t, align);
1787 /* If this is a field reference and not a bit-field, record it. */
1788 /* ??? There is some information that can be gleened from bit-fields,
1789 such as the word offset in the structure that might be modified.
1790 But skip it for now. */
1791 else if (TREE_CODE (t) == COMPONENT_REF
1792 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1794 expr = component_ref_for_mem_expr (t);
1795 offset = const0_rtx;
1796 apply_bitpos = bitpos;
1797 /* ??? Any reason the field size would be different than
1798 the size we got from the type? */
1801 /* If this is an array reference, look for an outer field reference. */
1802 else if (TREE_CODE (t) == ARRAY_REF)
1804 tree off_tree = size_zero_node;
1808 tree index = TREE_OPERAND (t, 1);
1809 tree array = TREE_OPERAND (t, 0);
1810 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1811 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1812 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1814 /* We assume all arrays have sizes that are a multiple of a byte.
1815 First subtract the lower bound, if any, in the type of the
1816 index, then convert to sizetype and multiply by the size of the
1818 if (low_bound != 0 && ! integer_zerop (low_bound))
1819 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1822 /* If the index has a self-referential type, pass it to a
1823 WITH_RECORD_EXPR; if the component size is, pass our
1824 component to one. */
1825 if (! TREE_CONSTANT (index)
1826 && contains_placeholder_p (index))
1827 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t);
1828 if (! TREE_CONSTANT (unit_size)
1829 && contains_placeholder_p (unit_size))
1830 unit_size = build (WITH_RECORD_EXPR, sizetype,
1834 = fold (build (PLUS_EXPR, sizetype,
1835 fold (build (MULT_EXPR, sizetype,
1839 t = TREE_OPERAND (t, 0);
1841 while (TREE_CODE (t) == ARRAY_REF);
1847 if (host_integerp (off_tree, 1))
1849 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1850 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1851 align = DECL_ALIGN (t);
1852 if (aoff && aoff < align)
1854 offset = GEN_INT (ioff);
1855 apply_bitpos = bitpos;
1858 else if (TREE_CODE (t) == COMPONENT_REF)
1860 expr = component_ref_for_mem_expr (t);
1861 if (host_integerp (off_tree, 1))
1863 offset = GEN_INT (tree_low_cst (off_tree, 1));
1864 apply_bitpos = bitpos;
1866 /* ??? Any reason the field size would be different than
1867 the size we got from the type? */
1869 else if (flag_argument_noalias > 1
1870 && TREE_CODE (t) == INDIRECT_REF
1871 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1878 /* If this is a Fortran indirect argument reference, record the
1880 else if (flag_argument_noalias > 1
1881 && TREE_CODE (t) == INDIRECT_REF
1882 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1889 /* If we modified OFFSET based on T, then subtract the outstanding
1890 bit position offset. */
1892 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1894 /* Now set the attributes we computed above. */
1896 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1898 /* If this is already known to be a scalar or aggregate, we are done. */
1899 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1902 /* If it is a reference into an aggregate, this is part of an aggregate.
1903 Otherwise we don't know. */
1904 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1905 || TREE_CODE (t) == ARRAY_RANGE_REF
1906 || TREE_CODE (t) == BIT_FIELD_REF)
1907 MEM_IN_STRUCT_P (ref) = 1;
1911 set_mem_attributes (ref, t, objectp)
1916 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1919 /* Set the alias set of MEM to SET. */
1922 set_mem_alias_set (mem, set)
1926 #ifdef ENABLE_CHECKING
1927 /* If the new and old alias sets don't conflict, something is wrong. */
1928 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1932 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1933 MEM_SIZE (mem), MEM_ALIGN (mem),
1937 /* Set the alignment of MEM to ALIGN bits. */
1940 set_mem_align (mem, align)
1944 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1945 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1949 /* Set the expr for MEM to EXPR. */
1952 set_mem_expr (mem, expr)
1957 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1958 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1961 /* Set the offset of MEM to OFFSET. */
1964 set_mem_offset (mem, offset)
1967 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1968 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1972 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1973 and its address changed to ADDR. (VOIDmode means don't change the mode.
1974 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1975 returned memory location is required to be valid. The memory
1976 attributes are not changed. */
1979 change_address_1 (memref, mode, addr, validate)
1981 enum machine_mode mode;
1987 if (GET_CODE (memref) != MEM)
1989 if (mode == VOIDmode)
1990 mode = GET_MODE (memref);
1992 addr = XEXP (memref, 0);
1996 if (reload_in_progress || reload_completed)
1998 if (! memory_address_p (mode, addr))
2002 addr = memory_address (mode, addr);
2005 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2008 new = gen_rtx_MEM (mode, addr);
2009 MEM_COPY_ATTRIBUTES (new, memref);
2013 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2014 way we are changing MEMREF, so we only preserve the alias set. */
2017 change_address (memref, mode, addr)
2019 enum machine_mode mode;
2022 rtx new = change_address_1 (memref, mode, addr, 1);
2023 enum machine_mode mmode = GET_MODE (new);
2026 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2027 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2028 (mmode == BLKmode ? BITS_PER_UNIT
2029 : GET_MODE_ALIGNMENT (mmode)),
2035 /* Return a memory reference like MEMREF, but with its mode changed
2036 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2037 nonzero, the memory address is forced to be valid.
2038 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2039 and caller is responsible for adjusting MEMREF base register. */
2042 adjust_address_1 (memref, mode, offset, validate, adjust)
2044 enum machine_mode mode;
2045 HOST_WIDE_INT offset;
2046 int validate, adjust;
2048 rtx addr = XEXP (memref, 0);
2050 rtx memoffset = MEM_OFFSET (memref);
2052 unsigned int memalign = MEM_ALIGN (memref);
2054 /* ??? Prefer to create garbage instead of creating shared rtl.
2055 This may happen even if offset is non-zero -- consider
2056 (plus (plus reg reg) const_int) -- so do this always. */
2057 addr = copy_rtx (addr);
2061 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2062 object, we can merge it into the LO_SUM. */
2063 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2065 && (unsigned HOST_WIDE_INT) offset
2066 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2067 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2068 plus_constant (XEXP (addr, 1), offset));
2070 addr = plus_constant (addr, offset);
2073 new = change_address_1 (memref, mode, addr, validate);
2075 /* Compute the new values of the memory attributes due to this adjustment.
2076 We add the offsets and update the alignment. */
2078 memoffset = GEN_INT (offset + INTVAL (memoffset));
2080 /* Compute the new alignment by taking the MIN of the alignment and the
2081 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2086 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2088 /* We can compute the size in a number of ways. */
2089 if (GET_MODE (new) != BLKmode)
2090 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2091 else if (MEM_SIZE (memref))
2092 size = plus_constant (MEM_SIZE (memref), -offset);
2094 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2095 memoffset, size, memalign, GET_MODE (new));
2097 /* At some point, we should validate that this offset is within the object,
2098 if all the appropriate values are known. */
2102 /* Return a memory reference like MEMREF, but with its mode changed
2103 to MODE and its address changed to ADDR, which is assumed to be
2104 MEMREF offseted by OFFSET bytes. If VALIDATE is
2105 nonzero, the memory address is forced to be valid. */
2108 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2110 enum machine_mode mode;
2112 HOST_WIDE_INT offset;
2115 memref = change_address_1 (memref, VOIDmode, addr, validate);
2116 return adjust_address_1 (memref, mode, offset, validate, 0);
2119 /* Return a memory reference like MEMREF, but whose address is changed by
2120 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2121 known to be in OFFSET (possibly 1). */
2124 offset_address (memref, offset, pow2)
2129 rtx new, addr = XEXP (memref, 0);
2131 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2133 /* At this point we don't know _why_ the address is invalid. It
2134 could have secondary memory refereces, multiplies or anything.
2136 However, if we did go and rearrange things, we can wind up not
2137 being able to recognize the magic around pic_offset_table_rtx.
2138 This stuff is fragile, and is yet another example of why it is
2139 bad to expose PIC machinery too early. */
2140 if (! memory_address_p (GET_MODE (memref), new)
2141 && GET_CODE (addr) == PLUS
2142 && XEXP (addr, 0) == pic_offset_table_rtx)
2144 addr = force_reg (GET_MODE (addr), addr);
2145 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2148 update_temp_slot_address (XEXP (memref, 0), new);
2149 new = change_address_1 (memref, VOIDmode, new, 1);
2151 /* Update the alignment to reflect the offset. Reset the offset, which
2154 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2155 MIN (MEM_ALIGN (memref),
2156 (unsigned HOST_WIDE_INT) pow2 * BITS_PER_UNIT),
2161 /* Return a memory reference like MEMREF, but with its address changed to
2162 ADDR. The caller is asserting that the actual piece of memory pointed
2163 to is the same, just the form of the address is being changed, such as
2164 by putting something into a register. */
2167 replace_equiv_address (memref, addr)
2171 /* change_address_1 copies the memory attribute structure without change
2172 and that's exactly what we want here. */
2173 update_temp_slot_address (XEXP (memref, 0), addr);
2174 return change_address_1 (memref, VOIDmode, addr, 1);
2177 /* Likewise, but the reference is not required to be valid. */
2180 replace_equiv_address_nv (memref, addr)
2184 return change_address_1 (memref, VOIDmode, addr, 0);
2187 /* Return a memory reference like MEMREF, but with its mode widened to
2188 MODE and offset by OFFSET. This would be used by targets that e.g.
2189 cannot issue QImode memory operations and have to use SImode memory
2190 operations plus masking logic. */
2193 widen_memory_access (memref, mode, offset)
2195 enum machine_mode mode;
2196 HOST_WIDE_INT offset;
2198 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2199 tree expr = MEM_EXPR (new);
2200 rtx memoffset = MEM_OFFSET (new);
2201 unsigned int size = GET_MODE_SIZE (mode);
2203 /* If we don't know what offset we were at within the expression, then
2204 we can't know if we've overstepped the bounds. */
2210 if (TREE_CODE (expr) == COMPONENT_REF)
2212 tree field = TREE_OPERAND (expr, 1);
2214 if (! DECL_SIZE_UNIT (field))
2220 /* Is the field at least as large as the access? If so, ok,
2221 otherwise strip back to the containing structure. */
2222 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2223 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2224 && INTVAL (memoffset) >= 0)
2227 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2233 expr = TREE_OPERAND (expr, 0);
2234 memoffset = (GEN_INT (INTVAL (memoffset)
2235 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2236 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2239 /* Similarly for the decl. */
2240 else if (DECL_P (expr)
2241 && DECL_SIZE_UNIT (expr)
2242 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2243 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2244 && (! memoffset || INTVAL (memoffset) >= 0))
2248 /* The widened memory access overflows the expression, which means
2249 that it could alias another expression. Zap it. */
2256 memoffset = NULL_RTX;
2258 /* The widened memory may alias other stuff, so zap the alias set. */
2259 /* ??? Maybe use get_alias_set on any remaining expression. */
2261 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2262 MEM_ALIGN (new), mode);
2267 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2272 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2273 NULL, label_num++, NULL);
2276 /* For procedure integration. */
2278 /* Install new pointers to the first and last insns in the chain.
2279 Also, set cur_insn_uid to one higher than the last in use.
2280 Used for an inline-procedure after copying the insn chain. */
2283 set_new_first_and_last_insn (first, last)
2292 for (insn = first; insn; insn = NEXT_INSN (insn))
2293 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2298 /* Set the range of label numbers found in the current function.
2299 This is used when belatedly compiling an inline function. */
2302 set_new_first_and_last_label_num (first, last)
2305 base_label_num = label_num;
2306 first_label_num = first;
2307 last_label_num = last;
2310 /* Set the last label number found in the current function.
2311 This is used when belatedly compiling an inline function. */
2314 set_new_last_label_num (last)
2317 base_label_num = label_num;
2318 last_label_num = last;
2321 /* Restore all variables describing the current status from the structure *P.
2322 This is used after a nested function. */
2325 restore_emit_status (p)
2326 struct function *p ATTRIBUTE_UNUSED;
2331 /* Go through all the RTL insn bodies and copy any invalid shared
2332 structure. This routine should only be called once. */
2335 unshare_all_rtl (fndecl, insn)
2341 /* Make sure that virtual parameters are not shared. */
2342 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2343 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2345 /* Make sure that virtual stack slots are not shared. */
2346 unshare_all_decls (DECL_INITIAL (fndecl));
2348 /* Unshare just about everything else. */
2349 unshare_all_rtl_1 (insn);
2351 /* Make sure the addresses of stack slots found outside the insn chain
2352 (such as, in DECL_RTL of a variable) are not shared
2353 with the insn chain.
2355 This special care is necessary when the stack slot MEM does not
2356 actually appear in the insn chain. If it does appear, its address
2357 is unshared from all else at that point. */
2358 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2361 /* Go through all the RTL insn bodies and copy any invalid shared
2362 structure, again. This is a fairly expensive thing to do so it
2363 should be done sparingly. */
2366 unshare_all_rtl_again (insn)
2372 for (p = insn; p; p = NEXT_INSN (p))
2375 reset_used_flags (PATTERN (p));
2376 reset_used_flags (REG_NOTES (p));
2377 reset_used_flags (LOG_LINKS (p));
2380 /* Make sure that virtual stack slots are not shared. */
2381 reset_used_decls (DECL_INITIAL (cfun->decl));
2383 /* Make sure that virtual parameters are not shared. */
2384 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2385 reset_used_flags (DECL_RTL (decl));
2387 reset_used_flags (stack_slot_list);
2389 unshare_all_rtl (cfun->decl, insn);
2392 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2393 Assumes the mark bits are cleared at entry. */
2396 unshare_all_rtl_1 (insn)
2399 for (; insn; insn = NEXT_INSN (insn))
2402 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2403 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2404 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2408 /* Go through all virtual stack slots of a function and copy any
2409 shared structure. */
2411 unshare_all_decls (blk)
2416 /* Copy shared decls. */
2417 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2418 if (DECL_RTL_SET_P (t))
2419 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2421 /* Now process sub-blocks. */
2422 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2423 unshare_all_decls (t);
2426 /* Go through all virtual stack slots of a function and mark them as
2429 reset_used_decls (blk)
2435 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2436 if (DECL_RTL_SET_P (t))
2437 reset_used_flags (DECL_RTL (t));
2439 /* Now process sub-blocks. */
2440 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2441 reset_used_decls (t);
2444 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2445 placed in the result directly, rather than being copied. MAY_SHARE is
2446 either a MEM of an EXPR_LIST of MEMs. */
2449 copy_most_rtx (orig, may_share)
2456 const char *format_ptr;
2458 if (orig == may_share
2459 || (GET_CODE (may_share) == EXPR_LIST
2460 && in_expr_list_p (may_share, orig)))
2463 code = GET_CODE (orig);
2481 copy = rtx_alloc (code);
2482 PUT_MODE (copy, GET_MODE (orig));
2483 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2484 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2485 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2486 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2487 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2489 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2491 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2493 switch (*format_ptr++)
2496 XEXP (copy, i) = XEXP (orig, i);
2497 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2498 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2502 XEXP (copy, i) = XEXP (orig, i);
2507 XVEC (copy, i) = XVEC (orig, i);
2508 if (XVEC (orig, i) != NULL)
2510 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2511 for (j = 0; j < XVECLEN (copy, i); j++)
2512 XVECEXP (copy, i, j)
2513 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2518 XWINT (copy, i) = XWINT (orig, i);
2523 XINT (copy, i) = XINT (orig, i);
2527 XTREE (copy, i) = XTREE (orig, i);
2532 XSTR (copy, i) = XSTR (orig, i);
2536 /* Copy this through the wide int field; that's safest. */
2537 X0WINT (copy, i) = X0WINT (orig, i);
2547 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2548 Recursively does the same for subexpressions. */
2551 copy_rtx_if_shared (orig)
2557 const char *format_ptr;
2563 code = GET_CODE (x);
2565 /* These types may be freely shared. */
2579 /* SCRATCH must be shared because they represent distinct values. */
2583 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2584 a LABEL_REF, it isn't sharable. */
2585 if (GET_CODE (XEXP (x, 0)) == PLUS
2586 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2587 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2596 /* The chain of insns is not being copied. */
2600 /* A MEM is allowed to be shared if its address is constant.
2602 We used to allow sharing of MEMs which referenced
2603 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2604 that can lose. instantiate_virtual_regs will not unshare
2605 the MEMs, and combine may change the structure of the address
2606 because it looks safe and profitable in one context, but
2607 in some other context it creates unrecognizable RTL. */
2608 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2617 /* This rtx may not be shared. If it has already been seen,
2618 replace it with a copy of itself. */
2620 if (RTX_FLAG (x, used))
2624 copy = rtx_alloc (code);
2626 (sizeof (*copy) - sizeof (copy->fld)
2627 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2631 RTX_FLAG (x, used) = 1;
2633 /* Now scan the subexpressions recursively.
2634 We can store any replaced subexpressions directly into X
2635 since we know X is not shared! Any vectors in X
2636 must be copied if X was copied. */
2638 format_ptr = GET_RTX_FORMAT (code);
2640 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2642 switch (*format_ptr++)
2645 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2649 if (XVEC (x, i) != NULL)
2652 int len = XVECLEN (x, i);
2654 if (copied && len > 0)
2655 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2656 for (j = 0; j < len; j++)
2657 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2665 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2666 to look for shared sub-parts. */
2669 reset_used_flags (x)
2674 const char *format_ptr;
2679 code = GET_CODE (x);
2681 /* These types may be freely shared so we needn't do any resetting
2703 /* The chain of insns is not being copied. */
2710 RTX_FLAG (x, used) = 0;
2712 format_ptr = GET_RTX_FORMAT (code);
2713 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2715 switch (*format_ptr++)
2718 reset_used_flags (XEXP (x, i));
2722 for (j = 0; j < XVECLEN (x, i); j++)
2723 reset_used_flags (XVECEXP (x, i, j));
2729 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2730 Return X or the rtx for the pseudo reg the value of X was copied into.
2731 OTHER must be valid as a SET_DEST. */
2734 make_safe_from (x, other)
2738 switch (GET_CODE (other))
2741 other = SUBREG_REG (other);
2743 case STRICT_LOW_PART:
2746 other = XEXP (other, 0);
2752 if ((GET_CODE (other) == MEM
2754 && GET_CODE (x) != REG
2755 && GET_CODE (x) != SUBREG)
2756 || (GET_CODE (other) == REG
2757 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2758 || reg_mentioned_p (other, x))))
2760 rtx temp = gen_reg_rtx (GET_MODE (x));
2761 emit_move_insn (temp, x);
2767 /* Emission of insns (adding them to the doubly-linked list). */
2769 /* Return the first insn of the current sequence or current function. */
2777 /* Specify a new insn as the first in the chain. */
2780 set_first_insn (insn)
2783 if (PREV_INSN (insn) != 0)
2788 /* Return the last insn emitted in current sequence or current function. */
2796 /* Specify a new insn as the last in the chain. */
2799 set_last_insn (insn)
2802 if (NEXT_INSN (insn) != 0)
2807 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2810 get_last_insn_anywhere ()
2812 struct sequence_stack *stack;
2815 for (stack = seq_stack; stack; stack = stack->next)
2816 if (stack->last != 0)
2821 /* Return the first nonnote insn emitted in current sequence or current
2822 function. This routine looks inside SEQUENCEs. */
2825 get_first_nonnote_insn ()
2827 rtx insn = first_insn;
2831 insn = next_insn (insn);
2832 if (insn == 0 || GET_CODE (insn) != NOTE)
2839 /* Return the last nonnote insn emitted in current sequence or current
2840 function. This routine looks inside SEQUENCEs. */
2843 get_last_nonnote_insn ()
2845 rtx insn = last_insn;
2849 insn = previous_insn (insn);
2850 if (insn == 0 || GET_CODE (insn) != NOTE)
2857 /* Return a number larger than any instruction's uid in this function. */
2862 return cur_insn_uid;
2865 /* Renumber instructions so that no instruction UIDs are wasted. */
2868 renumber_insns (stream)
2873 /* If we're not supposed to renumber instructions, don't. */
2874 if (!flag_renumber_insns)
2877 /* If there aren't that many instructions, then it's not really
2878 worth renumbering them. */
2879 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2884 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2887 fprintf (stream, "Renumbering insn %d to %d\n",
2888 INSN_UID (insn), cur_insn_uid);
2889 INSN_UID (insn) = cur_insn_uid++;
2893 /* Return the next insn. If it is a SEQUENCE, return the first insn
2902 insn = NEXT_INSN (insn);
2903 if (insn && GET_CODE (insn) == INSN
2904 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2905 insn = XVECEXP (PATTERN (insn), 0, 0);
2911 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2915 previous_insn (insn)
2920 insn = PREV_INSN (insn);
2921 if (insn && GET_CODE (insn) == INSN
2922 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2923 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2929 /* Return the next insn after INSN that is not a NOTE. This routine does not
2930 look inside SEQUENCEs. */
2933 next_nonnote_insn (insn)
2938 insn = NEXT_INSN (insn);
2939 if (insn == 0 || GET_CODE (insn) != NOTE)
2946 /* Return the previous insn before INSN that is not a NOTE. This routine does
2947 not look inside SEQUENCEs. */
2950 prev_nonnote_insn (insn)
2955 insn = PREV_INSN (insn);
2956 if (insn == 0 || GET_CODE (insn) != NOTE)
2963 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2964 or 0, if there is none. This routine does not look inside
2968 next_real_insn (insn)
2973 insn = NEXT_INSN (insn);
2974 if (insn == 0 || GET_CODE (insn) == INSN
2975 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2982 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2983 or 0, if there is none. This routine does not look inside
2987 prev_real_insn (insn)
2992 insn = PREV_INSN (insn);
2993 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2994 || GET_CODE (insn) == JUMP_INSN)
3001 /* Find the next insn after INSN that really does something. This routine
3002 does not look inside SEQUENCEs. Until reload has completed, this is the
3003 same as next_real_insn. */
3006 active_insn_p (insn)
3009 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3010 || (GET_CODE (insn) == INSN
3011 && (! reload_completed
3012 || (GET_CODE (PATTERN (insn)) != USE
3013 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3017 next_active_insn (insn)
3022 insn = NEXT_INSN (insn);
3023 if (insn == 0 || active_insn_p (insn))
3030 /* Find the last insn before INSN that really does something. This routine
3031 does not look inside SEQUENCEs. Until reload has completed, this is the
3032 same as prev_real_insn. */
3035 prev_active_insn (insn)
3040 insn = PREV_INSN (insn);
3041 if (insn == 0 || active_insn_p (insn))
3048 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3056 insn = NEXT_INSN (insn);
3057 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3064 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3072 insn = PREV_INSN (insn);
3073 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3081 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3082 and REG_CC_USER notes so we can find it. */
3085 link_cc0_insns (insn)
3088 rtx user = next_nonnote_insn (insn);
3090 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3091 user = XVECEXP (PATTERN (user), 0, 0);
3093 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3095 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3098 /* Return the next insn that uses CC0 after INSN, which is assumed to
3099 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3100 applied to the result of this function should yield INSN).
3102 Normally, this is simply the next insn. However, if a REG_CC_USER note
3103 is present, it contains the insn that uses CC0.
3105 Return 0 if we can't find the insn. */
3108 next_cc0_user (insn)
3111 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3114 return XEXP (note, 0);
3116 insn = next_nonnote_insn (insn);
3117 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3118 insn = XVECEXP (PATTERN (insn), 0, 0);
3120 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3126 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3127 note, it is the previous insn. */
3130 prev_cc0_setter (insn)
3133 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3136 return XEXP (note, 0);
3138 insn = prev_nonnote_insn (insn);
3139 if (! sets_cc0_p (PATTERN (insn)))
3146 /* Increment the label uses for all labels present in rtx. */
3149 mark_label_nuses (x)
3156 code = GET_CODE (x);
3157 if (code == LABEL_REF)
3158 LABEL_NUSES (XEXP (x, 0))++;
3160 fmt = GET_RTX_FORMAT (code);
3161 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3164 mark_label_nuses (XEXP (x, i));
3165 else if (fmt[i] == 'E')
3166 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3167 mark_label_nuses (XVECEXP (x, i, j));
3172 /* Try splitting insns that can be split for better scheduling.
3173 PAT is the pattern which might split.
3174 TRIAL is the insn providing PAT.
3175 LAST is non-zero if we should return the last insn of the sequence produced.
3177 If this routine succeeds in splitting, it returns the first or last
3178 replacement insn depending on the value of LAST. Otherwise, it
3179 returns TRIAL. If the insn to be returned can be split, it will be. */
3182 try_split (pat, trial, last)
3186 rtx before = PREV_INSN (trial);
3187 rtx after = NEXT_INSN (trial);
3188 int has_barrier = 0;
3193 if (any_condjump_p (trial)
3194 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3195 split_branch_probability = INTVAL (XEXP (note, 0));
3196 probability = split_branch_probability;
3198 seq = split_insns (pat, trial);
3200 split_branch_probability = -1;
3202 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3203 We may need to handle this specially. */
3204 if (after && GET_CODE (after) == BARRIER)
3207 after = NEXT_INSN (after);
3212 /* Sometimes there will be only one insn in that list, this case will
3213 normally arise only when we want it in turn to be split (SFmode on
3214 the 29k is an example). */
3215 if (NEXT_INSN (seq) != NULL_RTX)
3217 rtx insn_last, insn;
3220 /* Avoid infinite loop if any insn of the result matches
3221 the original pattern. */
3225 if (INSN_P (insn_last)
3226 && rtx_equal_p (PATTERN (insn_last), pat))
3228 if (NEXT_INSN (insn_last) == NULL_RTX)
3230 insn_last = NEXT_INSN (insn_last);
3235 while (insn != NULL_RTX)
3237 if (GET_CODE (insn) == JUMP_INSN)
3239 mark_jump_label (PATTERN (insn), insn, 0);
3241 if (probability != -1
3242 && any_condjump_p (insn)
3243 && !find_reg_note (insn, REG_BR_PROB, 0))
3245 /* We can preserve the REG_BR_PROB notes only if exactly
3246 one jump is created, otherwise the machine description
3247 is responsible for this step using
3248 split_branch_probability variable. */
3252 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3253 GEN_INT (probability),
3258 insn = PREV_INSN (insn);
3261 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3262 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3263 if (GET_CODE (trial) == CALL_INSN)
3266 while (insn != NULL_RTX)
3268 if (GET_CODE (insn) == CALL_INSN)
3269 CALL_INSN_FUNCTION_USAGE (insn)
3270 = CALL_INSN_FUNCTION_USAGE (trial);
3272 insn = PREV_INSN (insn);
3276 /* Copy notes, particularly those related to the CFG. */
3277 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3279 switch (REG_NOTE_KIND (note))
3283 while (insn != NULL_RTX)
3285 if (GET_CODE (insn) == CALL_INSN
3286 || (flag_non_call_exceptions
3287 && may_trap_p (PATTERN (insn))))
3289 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3292 insn = PREV_INSN (insn);
3298 case REG_ALWAYS_RETURN:
3300 while (insn != NULL_RTX)
3302 if (GET_CODE (insn) == CALL_INSN)
3304 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3307 insn = PREV_INSN (insn);
3311 case REG_NON_LOCAL_GOTO:
3313 while (insn != NULL_RTX)
3315 if (GET_CODE (insn) == JUMP_INSN)
3317 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3320 insn = PREV_INSN (insn);
3329 /* If there are LABELS inside the split insns increment the
3330 usage count so we don't delete the label. */
3331 if (GET_CODE (trial) == INSN)
3334 while (insn != NULL_RTX)
3336 if (GET_CODE (insn) == INSN)
3337 mark_label_nuses (PATTERN (insn));
3339 insn = PREV_INSN (insn);
3343 tem = emit_insn_after_scope (seq, trial, INSN_SCOPE (trial));
3345 delete_insn (trial);
3347 emit_barrier_after (tem);
3349 /* Recursively call try_split for each new insn created; by the
3350 time control returns here that insn will be fully split, so
3351 set LAST and continue from the insn after the one returned.
3352 We can't use next_active_insn here since AFTER may be a note.
3353 Ignore deleted insns, which can be occur if not optimizing. */
3354 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3355 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3356 tem = try_split (PATTERN (tem), tem, 1);
3358 /* Avoid infinite loop if the result matches the original pattern. */
3359 else if (rtx_equal_p (PATTERN (seq), pat))
3363 PATTERN (trial) = PATTERN (seq);
3364 INSN_CODE (trial) = -1;
3365 try_split (PATTERN (trial), trial, last);
3368 /* Return either the first or the last insn, depending on which was
3371 ? (after ? PREV_INSN (after) : last_insn)
3372 : NEXT_INSN (before);
3378 /* Make and return an INSN rtx, initializing all its slots.
3379 Store PATTERN in the pattern slots. */
3382 make_insn_raw (pattern)
3387 insn = rtx_alloc (INSN);
3389 INSN_UID (insn) = cur_insn_uid++;
3390 PATTERN (insn) = pattern;
3391 INSN_CODE (insn) = -1;
3392 LOG_LINKS (insn) = NULL;
3393 REG_NOTES (insn) = NULL;
3394 INSN_SCOPE (insn) = NULL;
3395 BLOCK_FOR_INSN (insn) = NULL;
3397 #ifdef ENABLE_RTL_CHECKING
3400 && (returnjump_p (insn)
3401 || (GET_CODE (insn) == SET
3402 && SET_DEST (insn) == pc_rtx)))
3404 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3412 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3415 make_jump_insn_raw (pattern)
3420 insn = rtx_alloc (JUMP_INSN);
3421 INSN_UID (insn) = cur_insn_uid++;
3423 PATTERN (insn) = pattern;
3424 INSN_CODE (insn) = -1;
3425 LOG_LINKS (insn) = NULL;
3426 REG_NOTES (insn) = NULL;
3427 JUMP_LABEL (insn) = NULL;
3428 INSN_SCOPE (insn) = NULL;
3429 BLOCK_FOR_INSN (insn) = NULL;
3434 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3437 make_call_insn_raw (pattern)
3442 insn = rtx_alloc (CALL_INSN);
3443 INSN_UID (insn) = cur_insn_uid++;
3445 PATTERN (insn) = pattern;
3446 INSN_CODE (insn) = -1;
3447 LOG_LINKS (insn) = NULL;
3448 REG_NOTES (insn) = NULL;
3449 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3450 INSN_SCOPE (insn) = NULL;
3451 BLOCK_FOR_INSN (insn) = NULL;
3456 /* Add INSN to the end of the doubly-linked list.
3457 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3463 PREV_INSN (insn) = last_insn;
3464 NEXT_INSN (insn) = 0;
3466 if (NULL != last_insn)
3467 NEXT_INSN (last_insn) = insn;
3469 if (NULL == first_insn)
3475 /* Add INSN into the doubly-linked list after insn AFTER. This and
3476 the next should be the only functions called to insert an insn once
3477 delay slots have been filled since only they know how to update a
3481 add_insn_after (insn, after)
3484 rtx next = NEXT_INSN (after);
3487 if (optimize && INSN_DELETED_P (after))
3490 NEXT_INSN (insn) = next;
3491 PREV_INSN (insn) = after;
3495 PREV_INSN (next) = insn;
3496 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3497 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3499 else if (last_insn == after)
3503 struct sequence_stack *stack = seq_stack;
3504 /* Scan all pending sequences too. */
3505 for (; stack; stack = stack->next)
3506 if (after == stack->last)
3516 if (GET_CODE (after) != BARRIER
3517 && GET_CODE (insn) != BARRIER
3518 && (bb = BLOCK_FOR_INSN (after)))
3520 set_block_for_insn (insn, bb);
3522 bb->flags |= BB_DIRTY;
3523 /* Should not happen as first in the BB is always
3524 either NOTE or LABEL. */
3525 if (bb->end == after
3526 /* Avoid clobbering of structure when creating new BB. */
3527 && GET_CODE (insn) != BARRIER
3528 && (GET_CODE (insn) != NOTE
3529 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3533 NEXT_INSN (after) = insn;
3534 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3536 rtx sequence = PATTERN (after);
3537 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3541 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3542 the previous should be the only functions called to insert an insn once
3543 delay slots have been filled since only they know how to update a
3547 add_insn_before (insn, before)
3550 rtx prev = PREV_INSN (before);
3553 if (optimize && INSN_DELETED_P (before))
3556 PREV_INSN (insn) = prev;
3557 NEXT_INSN (insn) = before;
3561 NEXT_INSN (prev) = insn;
3562 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3564 rtx sequence = PATTERN (prev);
3565 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3568 else if (first_insn == before)
3572 struct sequence_stack *stack = seq_stack;
3573 /* Scan all pending sequences too. */
3574 for (; stack; stack = stack->next)
3575 if (before == stack->first)
3577 stack->first = insn;
3585 if (GET_CODE (before) != BARRIER
3586 && GET_CODE (insn) != BARRIER
3587 && (bb = BLOCK_FOR_INSN (before)))
3589 set_block_for_insn (insn, bb);
3591 bb->flags |= BB_DIRTY;
3592 /* Should not happen as first in the BB is always
3593 either NOTE or LABEl. */
3594 if (bb->head == insn
3595 /* Avoid clobbering of structure when creating new BB. */
3596 && GET_CODE (insn) != BARRIER
3597 && (GET_CODE (insn) != NOTE
3598 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3602 PREV_INSN (before) = insn;
3603 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3604 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3607 /* Remove an insn from its doubly-linked list. This function knows how
3608 to handle sequences. */
3613 rtx next = NEXT_INSN (insn);
3614 rtx prev = PREV_INSN (insn);
3619 NEXT_INSN (prev) = next;
3620 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3622 rtx sequence = PATTERN (prev);
3623 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3626 else if (first_insn == insn)
3630 struct sequence_stack *stack = seq_stack;
3631 /* Scan all pending sequences too. */
3632 for (; stack; stack = stack->next)
3633 if (insn == stack->first)
3635 stack->first = next;
3645 PREV_INSN (next) = prev;
3646 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3647 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3649 else if (last_insn == insn)
3653 struct sequence_stack *stack = seq_stack;
3654 /* Scan all pending sequences too. */
3655 for (; stack; stack = stack->next)
3656 if (insn == stack->last)
3665 if (GET_CODE (insn) != BARRIER
3666 && (bb = BLOCK_FOR_INSN (insn)))
3669 bb->flags |= BB_DIRTY;
3670 if (bb->head == insn)
3672 /* Never ever delete the basic block note without deleting whole
3674 if (GET_CODE (insn) == NOTE)
3678 if (bb->end == insn)
3683 /* Delete all insns made since FROM.
3684 FROM becomes the new last instruction. */
3687 delete_insns_since (from)
3693 NEXT_INSN (from) = 0;
3697 /* This function is deprecated, please use sequences instead.
3699 Move a consecutive bunch of insns to a different place in the chain.
3700 The insns to be moved are those between FROM and TO.
3701 They are moved to a new position after the insn AFTER.
3702 AFTER must not be FROM or TO or any insn in between.
3704 This function does not know about SEQUENCEs and hence should not be
3705 called after delay-slot filling has been done. */
3708 reorder_insns_nobb (from, to, after)
3709 rtx from, to, after;
3711 /* Splice this bunch out of where it is now. */
3712 if (PREV_INSN (from))
3713 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3715 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3716 if (last_insn == to)
3717 last_insn = PREV_INSN (from);
3718 if (first_insn == from)
3719 first_insn = NEXT_INSN (to);
3721 /* Make the new neighbors point to it and it to them. */
3722 if (NEXT_INSN (after))
3723 PREV_INSN (NEXT_INSN (after)) = to;
3725 NEXT_INSN (to) = NEXT_INSN (after);
3726 PREV_INSN (from) = after;
3727 NEXT_INSN (after) = from;
3728 if (after == last_insn)
3732 /* Same as function above, but take care to update BB boundaries. */
3734 reorder_insns (from, to, after)
3735 rtx from, to, after;
3737 rtx prev = PREV_INSN (from);
3738 basic_block bb, bb2;
3740 reorder_insns_nobb (from, to, after);
3742 if (GET_CODE (after) != BARRIER
3743 && (bb = BLOCK_FOR_INSN (after)))
3746 bb->flags |= BB_DIRTY;
3748 if (GET_CODE (from) != BARRIER
3749 && (bb2 = BLOCK_FOR_INSN (from)))
3753 bb2->flags |= BB_DIRTY;
3756 if (bb->end == after)
3759 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3760 set_block_for_insn (x, bb);
3764 /* Return the line note insn preceding INSN. */
3767 find_line_note (insn)
3770 if (no_line_numbers)
3773 for (; insn; insn = PREV_INSN (insn))
3774 if (GET_CODE (insn) == NOTE
3775 && NOTE_LINE_NUMBER (insn) >= 0)
3781 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3782 of the moved insns when debugging. This may insert a note between AFTER
3783 and FROM, and another one after TO. */
3786 reorder_insns_with_line_notes (from, to, after)
3787 rtx from, to, after;
3789 rtx from_line = find_line_note (from);
3790 rtx after_line = find_line_note (after);
3792 reorder_insns (from, to, after);
3794 if (from_line == after_line)
3798 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3799 NOTE_LINE_NUMBER (from_line),
3802 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3803 NOTE_LINE_NUMBER (after_line),
3807 /* Remove unnecessary notes from the instruction stream. */
3810 remove_unnecessary_notes ()
3812 rtx block_stack = NULL_RTX;
3813 rtx eh_stack = NULL_RTX;
3818 /* We must not remove the first instruction in the function because
3819 the compiler depends on the first instruction being a note. */
3820 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3822 /* Remember what's next. */
3823 next = NEXT_INSN (insn);
3825 /* We're only interested in notes. */
3826 if (GET_CODE (insn) != NOTE)
3829 switch (NOTE_LINE_NUMBER (insn))
3831 case NOTE_INSN_DELETED:
3832 case NOTE_INSN_LOOP_END_TOP_COND:
3836 case NOTE_INSN_EH_REGION_BEG:
3837 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3840 case NOTE_INSN_EH_REGION_END:
3841 /* Too many end notes. */
3842 if (eh_stack == NULL_RTX)
3844 /* Mismatched nesting. */
3845 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3848 eh_stack = XEXP (eh_stack, 1);
3849 free_INSN_LIST_node (tmp);
3852 case NOTE_INSN_BLOCK_BEG:
3853 /* By now, all notes indicating lexical blocks should have
3854 NOTE_BLOCK filled in. */
3855 if (NOTE_BLOCK (insn) == NULL_TREE)
3857 block_stack = alloc_INSN_LIST (insn, block_stack);
3860 case NOTE_INSN_BLOCK_END:
3861 /* Too many end notes. */
3862 if (block_stack == NULL_RTX)
3864 /* Mismatched nesting. */
3865 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3868 block_stack = XEXP (block_stack, 1);
3869 free_INSN_LIST_node (tmp);
3871 /* Scan back to see if there are any non-note instructions
3872 between INSN and the beginning of this block. If not,
3873 then there is no PC range in the generated code that will
3874 actually be in this block, so there's no point in
3875 remembering the existence of the block. */
3876 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3878 /* This block contains a real instruction. Note that we
3879 don't include labels; if the only thing in the block
3880 is a label, then there are still no PC values that
3881 lie within the block. */
3885 /* We're only interested in NOTEs. */
3886 if (GET_CODE (tmp) != NOTE)
3889 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3891 /* We just verified that this BLOCK matches us with
3892 the block_stack check above. Never delete the
3893 BLOCK for the outermost scope of the function; we
3894 can refer to names from that scope even if the
3895 block notes are messed up. */
3896 if (! is_body_block (NOTE_BLOCK (insn))
3897 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3904 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3905 /* There's a nested block. We need to leave the
3906 current block in place since otherwise the debugger
3907 wouldn't be able to show symbols from our block in
3908 the nested block. */
3914 /* Too many begin notes. */
3915 if (block_stack || eh_stack)
3920 /* Emit insn(s) of given code and pattern
3921 at a specified place within the doubly-linked list.
3923 All of the emit_foo global entry points accept an object
3924 X which is either an insn list or a PATTERN of a single
3927 There are thus a few canonical ways to generate code and
3928 emit it at a specific place in the instruction stream. For
3929 example, consider the instruction named SPOT and the fact that
3930 we would like to emit some instructions before SPOT. We might
3934 ... emit the new instructions ...
3935 insns_head = get_insns ();
3938 emit_insn_before (insns_head, SPOT);
3940 It used to be common to generate SEQUENCE rtl instead, but that
3941 is a relic of the past which no longer occurs. The reason is that
3942 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3943 generated would almost certainly die right after it was created. */
3945 /* Make X be output before the instruction BEFORE. */
3948 emit_insn_before (x, before)
3954 #ifdef ENABLE_RTL_CHECKING
3955 if (before == NULL_RTX)
3962 switch (GET_CODE (x))
3973 rtx next = NEXT_INSN (insn);
3974 add_insn_before (insn, before);
3980 #ifdef ENABLE_RTL_CHECKING
3987 last = make_insn_raw (x);
3988 add_insn_before (last, before);
3995 /* Make an instruction with body X and code JUMP_INSN
3996 and output it before the instruction BEFORE. */
3999 emit_jump_insn_before (x, before)
4002 rtx insn, last = NULL_RTX;
4004 #ifdef ENABLE_RTL_CHECKING
4005 if (before == NULL_RTX)
4009 switch (GET_CODE (x))
4020 rtx next = NEXT_INSN (insn);
4021 add_insn_before (insn, before);
4027 #ifdef ENABLE_RTL_CHECKING
4034 last = make_jump_insn_raw (x);
4035 add_insn_before (last, before);
4042 /* Make an instruction with body X and code CALL_INSN
4043 and output it before the instruction BEFORE. */
4046 emit_call_insn_before (x, before)
4049 rtx last = NULL_RTX, insn;
4051 #ifdef ENABLE_RTL_CHECKING
4052 if (before == NULL_RTX)
4056 switch (GET_CODE (x))
4067 rtx next = NEXT_INSN (insn);
4068 add_insn_before (insn, before);
4074 #ifdef ENABLE_RTL_CHECKING
4081 last = make_call_insn_raw (x);
4082 add_insn_before (last, before);
4089 /* Make an insn of code BARRIER
4090 and output it before the insn BEFORE. */
4093 emit_barrier_before (before)
4096 rtx insn = rtx_alloc (BARRIER);
4098 INSN_UID (insn) = cur_insn_uid++;
4100 add_insn_before (insn, before);
4104 /* Emit the label LABEL before the insn BEFORE. */
4107 emit_label_before (label, before)
4110 /* This can be called twice for the same label as a result of the
4111 confusion that follows a syntax error! So make it harmless. */
4112 if (INSN_UID (label) == 0)
4114 INSN_UID (label) = cur_insn_uid++;
4115 add_insn_before (label, before);
4121 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4124 emit_note_before (subtype, before)
4128 rtx note = rtx_alloc (NOTE);
4129 INSN_UID (note) = cur_insn_uid++;
4130 NOTE_SOURCE_FILE (note) = 0;
4131 NOTE_LINE_NUMBER (note) = subtype;
4132 BLOCK_FOR_INSN (note) = NULL;
4134 add_insn_before (note, before);
4138 /* Helper for emit_insn_after, handles lists of instructions
4141 static rtx emit_insn_after_1 PARAMS ((rtx, rtx));
4144 emit_insn_after_1 (first, after)
4151 if (GET_CODE (after) != BARRIER
4152 && (bb = BLOCK_FOR_INSN (after)))
4154 bb->flags |= BB_DIRTY;
4155 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4156 if (GET_CODE (last) != BARRIER)
4157 set_block_for_insn (last, bb);
4158 if (GET_CODE (last) != BARRIER)
4159 set_block_for_insn (last, bb);
4160 if (bb->end == after)
4164 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4167 after_after = NEXT_INSN (after);
4169 NEXT_INSN (after) = first;
4170 PREV_INSN (first) = after;
4171 NEXT_INSN (last) = after_after;
4173 PREV_INSN (after_after) = last;
4175 if (after == last_insn)
4180 /* Make X be output after the insn AFTER. */
4183 emit_insn_after (x, after)
4188 #ifdef ENABLE_RTL_CHECKING
4189 if (after == NULL_RTX)
4196 switch (GET_CODE (x))
4204 last = emit_insn_after_1 (x, after);
4207 #ifdef ENABLE_RTL_CHECKING
4214 last = make_insn_raw (x);
4215 add_insn_after (last, after);
4222 /* Similar to emit_insn_after, except that line notes are to be inserted so
4223 as to act as if this insn were at FROM. */
4226 emit_insn_after_with_line_notes (x, after, from)
4229 rtx from_line = find_line_note (from);
4230 rtx after_line = find_line_note (after);
4231 rtx insn = emit_insn_after (x, after);
4234 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
4235 NOTE_LINE_NUMBER (from_line),
4239 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
4240 NOTE_LINE_NUMBER (after_line),
4244 /* Make an insn of code JUMP_INSN with body X
4245 and output it after the insn AFTER. */
4248 emit_jump_insn_after (x, after)
4253 #ifdef ENABLE_RTL_CHECKING
4254 if (after == NULL_RTX)
4258 switch (GET_CODE (x))
4266 last = emit_insn_after_1 (x, after);
4269 #ifdef ENABLE_RTL_CHECKING
4276 last = make_jump_insn_raw (x);
4277 add_insn_after (last, after);
4284 /* Make an instruction with body X and code CALL_INSN
4285 and output it after the instruction AFTER. */
4288 emit_call_insn_after (x, after)
4293 #ifdef ENABLE_RTL_CHECKING
4294 if (after == NULL_RTX)
4298 switch (GET_CODE (x))
4306 last = emit_insn_after_1 (x, after);
4309 #ifdef ENABLE_RTL_CHECKING
4316 last = make_call_insn_raw (x);
4317 add_insn_after (last, after);
4324 /* Make an insn of code BARRIER
4325 and output it after the insn AFTER. */
4328 emit_barrier_after (after)
4331 rtx insn = rtx_alloc (BARRIER);
4333 INSN_UID (insn) = cur_insn_uid++;
4335 add_insn_after (insn, after);
4339 /* Emit the label LABEL after the insn AFTER. */
4342 emit_label_after (label, after)
4345 /* This can be called twice for the same label
4346 as a result of the confusion that follows a syntax error!
4347 So make it harmless. */
4348 if (INSN_UID (label) == 0)
4350 INSN_UID (label) = cur_insn_uid++;
4351 add_insn_after (label, after);
4357 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4360 emit_note_after (subtype, after)
4364 rtx note = rtx_alloc (NOTE);
4365 INSN_UID (note) = cur_insn_uid++;
4366 NOTE_SOURCE_FILE (note) = 0;
4367 NOTE_LINE_NUMBER (note) = subtype;
4368 BLOCK_FOR_INSN (note) = NULL;
4369 add_insn_after (note, after);
4373 /* Emit a line note for FILE and LINE after the insn AFTER. */
4376 emit_line_note_after (file, line, after)
4383 if (no_line_numbers && line > 0)
4389 note = rtx_alloc (NOTE);
4390 INSN_UID (note) = cur_insn_uid++;
4391 NOTE_SOURCE_FILE (note) = file;
4392 NOTE_LINE_NUMBER (note) = line;
4393 BLOCK_FOR_INSN (note) = NULL;
4394 add_insn_after (note, after);
4398 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4400 emit_insn_after_scope (pattern, after, scope)
4404 rtx last = emit_insn_after (pattern, after);
4406 after = NEXT_INSN (after);
4409 if (active_insn_p (after))
4410 INSN_SCOPE (after) = scope;
4413 after = NEXT_INSN (after);
4418 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4420 emit_jump_insn_after_scope (pattern, after, scope)
4424 rtx last = emit_jump_insn_after (pattern, after);
4426 after = NEXT_INSN (after);
4429 if (active_insn_p (after))
4430 INSN_SCOPE (after) = scope;
4433 after = NEXT_INSN (after);
4438 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4440 emit_call_insn_after_scope (pattern, after, scope)
4444 rtx last = emit_call_insn_after (pattern, after);
4446 after = NEXT_INSN (after);
4449 if (active_insn_p (after))
4450 INSN_SCOPE (after) = scope;
4453 after = NEXT_INSN (after);
4458 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4460 emit_insn_before_scope (pattern, before, scope)
4461 rtx pattern, before;
4464 rtx first = PREV_INSN (before);
4465 rtx last = emit_insn_before (pattern, before);
4467 first = NEXT_INSN (first);
4470 if (active_insn_p (first))
4471 INSN_SCOPE (first) = scope;
4474 first = NEXT_INSN (first);
4479 /* Take X and emit it at the end of the doubly-linked
4482 Returns the last insn emitted. */
4488 rtx last = last_insn;
4494 switch (GET_CODE (x))
4505 rtx next = NEXT_INSN (insn);
4512 #ifdef ENABLE_RTL_CHECKING
4519 last = make_insn_raw (x);
4527 /* Make an insn of code JUMP_INSN with pattern X
4528 and add it to the end of the doubly-linked list. */
4534 rtx last = NULL_RTX, insn;
4536 switch (GET_CODE (x))
4547 rtx next = NEXT_INSN (insn);
4554 #ifdef ENABLE_RTL_CHECKING
4561 last = make_jump_insn_raw (x);
4569 /* Make an insn of code CALL_INSN with pattern X
4570 and add it to the end of the doubly-linked list. */
4578 switch (GET_CODE (x))
4586 insn = emit_insn (x);
4589 #ifdef ENABLE_RTL_CHECKING
4596 insn = make_call_insn_raw (x);
4604 /* Add the label LABEL to the end of the doubly-linked list. */
4610 /* This can be called twice for the same label
4611 as a result of the confusion that follows a syntax error!
4612 So make it harmless. */
4613 if (INSN_UID (label) == 0)
4615 INSN_UID (label) = cur_insn_uid++;
4621 /* Make an insn of code BARRIER
4622 and add it to the end of the doubly-linked list. */
4627 rtx barrier = rtx_alloc (BARRIER);
4628 INSN_UID (barrier) = cur_insn_uid++;
4633 /* Make an insn of code NOTE
4634 with data-fields specified by FILE and LINE
4635 and add it to the end of the doubly-linked list,
4636 but only if line-numbers are desired for debugging info. */
4639 emit_line_note (file, line)
4643 set_file_and_line_for_stmt (file, line);
4646 if (no_line_numbers)
4650 return emit_note (file, line);
4653 /* Make an insn of code NOTE
4654 with data-fields specified by FILE and LINE
4655 and add it to the end of the doubly-linked list.
4656 If it is a line-number NOTE, omit it if it matches the previous one. */
4659 emit_note (file, line)
4667 if (file && last_filename && !strcmp (file, last_filename)
4668 && line == last_linenum)
4670 last_filename = file;
4671 last_linenum = line;
4674 if (no_line_numbers && line > 0)
4680 note = rtx_alloc (NOTE);
4681 INSN_UID (note) = cur_insn_uid++;
4682 NOTE_SOURCE_FILE (note) = file;
4683 NOTE_LINE_NUMBER (note) = line;
4684 BLOCK_FOR_INSN (note) = NULL;
4689 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4692 emit_line_note_force (file, line)
4697 return emit_line_note (file, line);
4700 /* Cause next statement to emit a line note even if the line number
4701 has not changed. This is used at the beginning of a function. */
4704 force_next_line_note ()
4709 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4710 note of this type already exists, remove it first. */
4713 set_unique_reg_note (insn, kind, datum)
4718 rtx note = find_reg_note (insn, kind, NULL_RTX);
4724 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4725 has multiple sets (some callers assume single_set
4726 means the insn only has one set, when in fact it
4727 means the insn only has one * useful * set). */
4728 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4735 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4736 It serves no useful purpose and breaks eliminate_regs. */
4737 if (GET_CODE (datum) == ASM_OPERANDS)
4747 XEXP (note, 0) = datum;
4751 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4752 return REG_NOTES (insn);
4755 /* Return an indication of which type of insn should have X as a body.
4756 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4762 if (GET_CODE (x) == CODE_LABEL)
4764 if (GET_CODE (x) == CALL)
4766 if (GET_CODE (x) == RETURN)
4768 if (GET_CODE (x) == SET)
4770 if (SET_DEST (x) == pc_rtx)
4772 else if (GET_CODE (SET_SRC (x)) == CALL)
4777 if (GET_CODE (x) == PARALLEL)
4780 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4781 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4783 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4784 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4786 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4787 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4793 /* Emit the rtl pattern X as an appropriate kind of insn.
4794 If X is a label, it is simply added into the insn chain. */
4800 enum rtx_code code = classify_insn (x);
4802 if (code == CODE_LABEL)
4803 return emit_label (x);
4804 else if (code == INSN)
4805 return emit_insn (x);
4806 else if (code == JUMP_INSN)
4808 rtx insn = emit_jump_insn (x);
4809 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4810 return emit_barrier ();
4813 else if (code == CALL_INSN)
4814 return emit_call_insn (x);
4819 /* Space for free sequence stack entries. */
4820 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4822 /* Begin emitting insns to a sequence which can be packaged in an
4823 RTL_EXPR. If this sequence will contain something that might cause
4824 the compiler to pop arguments to function calls (because those
4825 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4826 details), use do_pending_stack_adjust before calling this function.
4827 That will ensure that the deferred pops are not accidentally
4828 emitted in the middle of this sequence. */
4833 struct sequence_stack *tem;
4835 if (free_sequence_stack != NULL)
4837 tem = free_sequence_stack;
4838 free_sequence_stack = tem->next;
4841 tem = (struct sequence_stack *) ggc_alloc (sizeof (struct sequence_stack));
4843 tem->next = seq_stack;
4844 tem->first = first_insn;
4845 tem->last = last_insn;
4846 tem->sequence_rtl_expr = seq_rtl_expr;
4854 /* Similarly, but indicate that this sequence will be placed in T, an
4855 RTL_EXPR. See the documentation for start_sequence for more
4856 information about how to use this function. */
4859 start_sequence_for_rtl_expr (t)
4867 /* Set up the insn chain starting with FIRST as the current sequence,
4868 saving the previously current one. See the documentation for
4869 start_sequence for more information about how to use this function. */
4872 push_to_sequence (first)
4879 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4885 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4888 push_to_full_sequence (first, last)
4894 /* We really should have the end of the insn chain here. */
4895 if (last && NEXT_INSN (last))
4899 /* Set up the outer-level insn chain
4900 as the current sequence, saving the previously current one. */
4903 push_topmost_sequence ()
4905 struct sequence_stack *stack, *top = NULL;
4909 for (stack = seq_stack; stack; stack = stack->next)
4912 first_insn = top->first;
4913 last_insn = top->last;
4914 seq_rtl_expr = top->sequence_rtl_expr;
4917 /* After emitting to the outer-level insn chain, update the outer-level
4918 insn chain, and restore the previous saved state. */
4921 pop_topmost_sequence ()
4923 struct sequence_stack *stack, *top = NULL;
4925 for (stack = seq_stack; stack; stack = stack->next)
4928 top->first = first_insn;
4929 top->last = last_insn;
4930 /* ??? Why don't we save seq_rtl_expr here? */
4935 /* After emitting to a sequence, restore previous saved state.
4937 To get the contents of the sequence just made, you must call
4938 `get_insns' *before* calling here.
4940 If the compiler might have deferred popping arguments while
4941 generating this sequence, and this sequence will not be immediately
4942 inserted into the instruction stream, use do_pending_stack_adjust
4943 before calling get_insns. That will ensure that the deferred
4944 pops are inserted into this sequence, and not into some random
4945 location in the instruction stream. See INHIBIT_DEFER_POP for more
4946 information about deferred popping of arguments. */
4951 struct sequence_stack *tem = seq_stack;
4953 first_insn = tem->first;
4954 last_insn = tem->last;
4955 seq_rtl_expr = tem->sequence_rtl_expr;
4956 seq_stack = tem->next;
4958 memset (tem, 0, sizeof (*tem));
4959 tem->next = free_sequence_stack;
4960 free_sequence_stack = tem;
4963 /* This works like end_sequence, but records the old sequence in FIRST
4967 end_full_sequence (first, last)
4970 *first = first_insn;
4975 /* Return 1 if currently emitting into a sequence. */
4980 return seq_stack != 0;
4983 /* Put the various virtual registers into REGNO_REG_RTX. */
4986 init_virtual_regs (es)
4987 struct emit_status *es;
4989 rtx *ptr = es->x_regno_reg_rtx;
4990 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4991 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4992 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4993 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4994 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4998 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4999 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5000 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5001 static int copy_insn_n_scratches;
5003 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5004 copied an ASM_OPERANDS.
5005 In that case, it is the original input-operand vector. */
5006 static rtvec orig_asm_operands_vector;
5008 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5009 copied an ASM_OPERANDS.
5010 In that case, it is the copied input-operand vector. */
5011 static rtvec copy_asm_operands_vector;
5013 /* Likewise for the constraints vector. */
5014 static rtvec orig_asm_constraints_vector;
5015 static rtvec copy_asm_constraints_vector;
5017 /* Recursively create a new copy of an rtx for copy_insn.
5018 This function differs from copy_rtx in that it handles SCRATCHes and
5019 ASM_OPERANDs properly.
5020 Normally, this function is not used directly; use copy_insn as front end.
5021 However, you could first copy an insn pattern with copy_insn and then use
5022 this function afterwards to properly copy any REG_NOTEs containing
5032 const char *format_ptr;
5034 code = GET_CODE (orig);
5051 for (i = 0; i < copy_insn_n_scratches; i++)
5052 if (copy_insn_scratch_in[i] == orig)
5053 return copy_insn_scratch_out[i];
5057 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5058 a LABEL_REF, it isn't sharable. */
5059 if (GET_CODE (XEXP (orig, 0)) == PLUS
5060 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5061 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5065 /* A MEM with a constant address is not sharable. The problem is that
5066 the constant address may need to be reloaded. If the mem is shared,
5067 then reloading one copy of this mem will cause all copies to appear
5068 to have been reloaded. */
5074 copy = rtx_alloc (code);
5076 /* Copy the various flags, and other information. We assume that
5077 all fields need copying, and then clear the fields that should
5078 not be copied. That is the sensible default behavior, and forces
5079 us to explicitly document why we are *not* copying a flag. */
5080 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
5082 /* We do not copy the USED flag, which is used as a mark bit during
5083 walks over the RTL. */
5084 RTX_FLAG (copy, used) = 0;
5086 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5087 if (GET_RTX_CLASS (code) == 'i')
5089 RTX_FLAG (copy, jump) = 0;
5090 RTX_FLAG (copy, call) = 0;
5091 RTX_FLAG (copy, frame_related) = 0;
5094 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5096 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5098 copy->fld[i] = orig->fld[i];
5099 switch (*format_ptr++)
5102 if (XEXP (orig, i) != NULL)
5103 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5108 if (XVEC (orig, i) == orig_asm_constraints_vector)
5109 XVEC (copy, i) = copy_asm_constraints_vector;
5110 else if (XVEC (orig, i) == orig_asm_operands_vector)
5111 XVEC (copy, i) = copy_asm_operands_vector;
5112 else if (XVEC (orig, i) != NULL)
5114 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5115 for (j = 0; j < XVECLEN (copy, i); j++)
5116 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5127 /* These are left unchanged. */
5135 if (code == SCRATCH)
5137 i = copy_insn_n_scratches++;
5138 if (i >= MAX_RECOG_OPERANDS)
5140 copy_insn_scratch_in[i] = orig;
5141 copy_insn_scratch_out[i] = copy;
5143 else if (code == ASM_OPERANDS)
5145 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5146 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5147 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5148 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5154 /* Create a new copy of an rtx.
5155 This function differs from copy_rtx in that it handles SCRATCHes and
5156 ASM_OPERANDs properly.
5157 INSN doesn't really have to be a full INSN; it could be just the
5163 copy_insn_n_scratches = 0;
5164 orig_asm_operands_vector = 0;
5165 orig_asm_constraints_vector = 0;
5166 copy_asm_operands_vector = 0;
5167 copy_asm_constraints_vector = 0;
5168 return copy_insn_1 (insn);
5171 /* Initialize data structures and variables in this file
5172 before generating rtl for each function. */
5177 struct function *f = cfun;
5179 f->emit = (struct emit_status *) ggc_alloc (sizeof (struct emit_status));
5182 seq_rtl_expr = NULL;
5184 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5187 first_label_num = label_num;
5191 /* Init the tables that describe all the pseudo regs. */
5193 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5195 f->emit->regno_pointer_align
5196 = (unsigned char *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5197 * sizeof (unsigned char));
5200 = (rtx *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5204 = (tree *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5207 /* Put copies of all the hard registers into regno_reg_rtx. */
5208 memcpy (regno_reg_rtx,
5209 static_regno_reg_rtx,
5210 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5212 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5213 init_virtual_regs (f->emit);
5215 /* Indicate that the virtual registers and stack locations are
5217 REG_POINTER (stack_pointer_rtx) = 1;
5218 REG_POINTER (frame_pointer_rtx) = 1;
5219 REG_POINTER (hard_frame_pointer_rtx) = 1;
5220 REG_POINTER (arg_pointer_rtx) = 1;
5222 REG_POINTER (virtual_incoming_args_rtx) = 1;
5223 REG_POINTER (virtual_stack_vars_rtx) = 1;
5224 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5225 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5226 REG_POINTER (virtual_cfa_rtx) = 1;
5228 #ifdef STACK_BOUNDARY
5229 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5230 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5231 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5232 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5234 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5235 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5236 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5237 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5238 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5241 #ifdef INIT_EXPANDERS
5246 /* Generate the constant 0. */
5249 gen_const_vector_0 (mode)
5250 enum machine_mode mode;
5255 enum machine_mode inner;
5257 units = GET_MODE_NUNITS (mode);
5258 inner = GET_MODE_INNER (mode);
5260 v = rtvec_alloc (units);
5262 /* We need to call this function after we to set CONST0_RTX first. */
5263 if (!CONST0_RTX (inner))
5266 for (i = 0; i < units; ++i)
5267 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5269 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5273 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5274 all elements are zero. */
5276 gen_rtx_CONST_VECTOR (mode, v)
5277 enum machine_mode mode;
5280 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5283 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5284 if (RTVEC_ELT (v, i) != inner_zero)
5285 return gen_rtx_raw_CONST_VECTOR (mode, v);
5286 return CONST0_RTX (mode);
5289 /* Create some permanent unique rtl objects shared between all functions.
5290 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5293 init_emit_once (line_numbers)
5297 enum machine_mode mode;
5298 enum machine_mode double_mode;
5300 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5302 const_int_htab = htab_create (37, const_int_htab_hash,
5303 const_int_htab_eq, NULL);
5305 const_double_htab = htab_create (37, const_double_htab_hash,
5306 const_double_htab_eq, NULL);
5308 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
5309 mem_attrs_htab_eq, NULL);
5311 no_line_numbers = ! line_numbers;
5313 /* Compute the word and byte modes. */
5315 byte_mode = VOIDmode;
5316 word_mode = VOIDmode;
5317 double_mode = VOIDmode;
5319 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5320 mode = GET_MODE_WIDER_MODE (mode))
5322 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5323 && byte_mode == VOIDmode)
5326 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5327 && word_mode == VOIDmode)
5331 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5332 mode = GET_MODE_WIDER_MODE (mode))
5334 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5335 && double_mode == VOIDmode)
5339 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5341 /* Assign register numbers to the globally defined register rtx.
5342 This must be done at runtime because the register number field
5343 is in a union and some compilers can't initialize unions. */
5345 pc_rtx = gen_rtx (PC, VOIDmode);
5346 cc0_rtx = gen_rtx (CC0, VOIDmode);
5347 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5348 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5349 if (hard_frame_pointer_rtx == 0)
5350 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5351 HARD_FRAME_POINTER_REGNUM);
5352 if (arg_pointer_rtx == 0)
5353 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5354 virtual_incoming_args_rtx =
5355 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5356 virtual_stack_vars_rtx =
5357 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5358 virtual_stack_dynamic_rtx =
5359 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5360 virtual_outgoing_args_rtx =
5361 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5362 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5364 /* Initialize RTL for commonly used hard registers. These are
5365 copied into regno_reg_rtx as we begin to compile each function. */
5366 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5367 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5369 #ifdef INIT_EXPANDERS
5370 /* This is to initialize {init|mark|free}_machine_status before the first
5371 call to push_function_context_to. This is needed by the Chill front
5372 end which calls push_function_context_to before the first call to
5373 init_function_start. */
5377 /* Create the unique rtx's for certain rtx codes and operand values. */
5379 /* Don't use gen_rtx here since gen_rtx in this case
5380 tries to use these variables. */
5381 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5382 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5383 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5385 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5386 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5387 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5389 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5391 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5392 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5393 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5394 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5396 for (i = 0; i <= 2; i++)
5398 REAL_VALUE_TYPE *r =
5399 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5401 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5402 mode = GET_MODE_WIDER_MODE (mode))
5403 const_tiny_rtx[i][(int) mode] =
5404 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5406 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5408 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5409 mode = GET_MODE_WIDER_MODE (mode))
5410 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5412 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5414 mode = GET_MODE_WIDER_MODE (mode))
5415 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5418 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5420 mode = GET_MODE_WIDER_MODE (mode))
5421 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5423 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5425 mode = GET_MODE_WIDER_MODE (mode))
5426 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5428 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5429 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5430 const_tiny_rtx[0][i] = const0_rtx;
5432 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5433 if (STORE_FLAG_VALUE == 1)
5434 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5436 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5437 return_address_pointer_rtx
5438 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5442 struct_value_rtx = STRUCT_VALUE;
5444 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5447 #ifdef STRUCT_VALUE_INCOMING
5448 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5450 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5451 struct_value_incoming_rtx
5452 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5454 struct_value_incoming_rtx = struct_value_rtx;
5458 #ifdef STATIC_CHAIN_REGNUM
5459 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5461 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5462 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5463 static_chain_incoming_rtx
5464 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5467 static_chain_incoming_rtx = static_chain_rtx;
5471 static_chain_rtx = STATIC_CHAIN;
5473 #ifdef STATIC_CHAIN_INCOMING
5474 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5476 static_chain_incoming_rtx = static_chain_rtx;
5480 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5481 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5484 /* Query and clear/ restore no_line_numbers. This is used by the
5485 switch / case handling in stmt.c to give proper line numbers in
5486 warnings about unreachable code. */
5489 force_line_numbers ()
5491 int old = no_line_numbers;
5493 no_line_numbers = 0;
5495 force_next_line_note ();
5500 restore_line_number_status (old_value)
5503 no_line_numbers = old_value;
5506 /* Produce exact duplicate of insn INSN after AFTER.
5507 Care updating of libcall regions if present. */
5510 emit_copy_of_insn_after (insn, after)
5514 rtx note1, note2, link;
5516 switch (GET_CODE (insn))
5519 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5523 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5527 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5528 if (CALL_INSN_FUNCTION_USAGE (insn))
5529 CALL_INSN_FUNCTION_USAGE (new)
5530 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5531 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5532 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5539 /* Update LABEL_NUSES. */
5540 mark_jump_label (PATTERN (new), new, 0);
5542 INSN_SCOPE (new) = INSN_SCOPE (insn);
5544 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5546 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5547 if (REG_NOTE_KIND (link) != REG_LABEL)
5549 if (GET_CODE (link) == EXPR_LIST)
5551 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5556 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5561 /* Fix the libcall sequences. */
5562 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5565 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5567 XEXP (note1, 0) = p;
5568 XEXP (note2, 0) = new;
5573 #include "gt-emit-rtl.h"