1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
46 #include "hard-reg-set.h"
47 #include "insn-config.h"
53 /* Commonly used modes. */
55 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
56 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
57 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
58 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
60 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
61 After rtl generation, it is 1 plus the largest register number used. */
63 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
65 /* This is *not* reset after each function. It gives each CODE_LABEL
66 in the entire compilation a unique label number. */
68 static int label_num = 1;
70 /* Lowest label number in current function. */
72 static int first_label_num;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these except perhaps the floating-point CONST_DOUBLEs
92 are unique; no other rtx-object will be equal to any of these. */
94 /* Avoid warnings by initializing the `fld' field. Since its a union,
95 bypass problems with KNR compilers by only doing so when __GNUC__. */
102 struct _global_rtl global_rtl =
104 {PC, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* pc_rtx */
105 {CC0, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* cc0_rtx */
106 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* stack_pointer_rtx */
107 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* frame_pointer_rtx */
108 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* hard_frame_pointer_rtx */
109 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* arg_pointer_rtx */
110 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_incoming_args_rtx */
111 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_vars_rtx */
112 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_dynamic_rtx */
113 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_outgoing_args_rtx */
114 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_cfa_rtx */
117 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
118 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
119 record a copy of const[012]_rtx. */
121 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
125 REAL_VALUE_TYPE dconst0;
126 REAL_VALUE_TYPE dconst1;
127 REAL_VALUE_TYPE dconst2;
128 REAL_VALUE_TYPE dconstm1;
130 /* All references to the following fixed hard registers go through
131 these unique rtl objects. On machines where the frame-pointer and
132 arg-pointer are the same register, they use the same unique object.
134 After register allocation, other rtl objects which used to be pseudo-regs
135 may be clobbered to refer to the frame-pointer register.
136 But references that were originally to the frame-pointer can be
137 distinguished from the others because they contain frame_pointer_rtx.
139 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
140 tricky: until register elimination has taken place hard_frame_pointer_rtx
141 should be used if it is being set, and frame_pointer_rtx otherwise. After
142 register elimination hard_frame_pointer_rtx should always be used.
143 On machines where the two registers are same (most) then these are the
146 In an inline procedure, the stack and frame pointer rtxs may not be
147 used for anything else. */
148 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
149 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
150 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
151 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
152 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
154 /* This is used to implement __builtin_return_address for some machines.
155 See for instance the MIPS port. */
156 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
158 /* We make one copy of (const_int C) where C is in
159 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
160 to save space during the compilation and simplify comparisons of
163 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
165 /* The ends of the doubly-linked chain of rtl for the current function.
166 Both are reset to null at the start of rtl generation for the function.
168 start_sequence saves both of these on `sequence_stack' along with
169 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
171 static rtx first_insn = NULL;
172 static rtx last_insn = NULL;
174 /* RTL_EXPR within which the current sequence will be placed. Use to
175 prevent reuse of any temporaries within the sequence until after the
176 RTL_EXPR is emitted. */
178 tree sequence_rtl_expr = NULL;
180 /* INSN_UID for next insn emitted.
181 Reset to 1 for each function compiled. */
183 static int cur_insn_uid = 1;
185 /* Line number and source file of the last line-number NOTE emitted.
186 This is used to avoid generating duplicates. */
188 static int last_linenum = 0;
189 static char *last_filename = 0;
191 /* A vector indexed by pseudo reg number. The allocated length
192 of this vector is regno_pointer_flag_length. Since this
193 vector is needed during the expansion phase when the total
194 number of registers in the function is not yet known,
195 it is copied and made bigger when necessary. */
197 char *regno_pointer_flag;
198 int regno_pointer_flag_length;
200 /* Indexed by pseudo register number, if nonzero gives the known alignment
201 for that pseudo (if regno_pointer_flag is set).
202 Allocated in parallel with regno_pointer_flag. */
203 char *regno_pointer_align;
205 /* Indexed by pseudo register number, gives the rtx for that pseudo.
206 Allocated in parallel with regno_pointer_flag. */
210 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
211 Each element describes one pending sequence.
212 The main insn-chain is saved in the last element of the chain,
213 unless the chain is empty. */
215 struct sequence_stack *sequence_stack;
217 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
218 shortly thrown away. We use two mechanisms to prevent this waste:
220 First, we keep a list of the expressions used to represent the sequence
221 stack in sequence_element_free_list.
223 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
224 rtvec for use by gen_sequence. One entry for each size is sufficient
225 because most cases are calls to gen_sequence followed by immediately
226 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
227 destructive on the insn in it anyway and hence can't be redone.
229 We do not bother to save this cached data over nested function calls.
230 Instead, we just reinitialize them. */
232 #define SEQUENCE_RESULT_SIZE 5
234 static struct sequence_stack *sequence_element_free_list;
235 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
237 /* During RTL generation, we also keep a list of free INSN rtl codes. */
238 static rtx free_insn;
240 extern int rtx_equal_function_value_matters;
242 /* Filename and line number of last line-number note,
243 whether we actually emitted it or not. */
244 extern char *emit_filename;
245 extern int emit_lineno;
247 static rtx make_jump_insn_raw PROTO((rtx));
248 static rtx make_call_insn_raw PROTO((rtx));
249 static rtx find_line_note PROTO((rtx));
252 gen_rtx_CONST_INT (mode, arg)
253 enum machine_mode mode;
256 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
257 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx && arg == STORE_FLAG_VALUE)
261 return const_true_rtx;
264 return gen_rtx_raw_CONST_INT (mode, arg);
267 /* CONST_DOUBLEs needs special handling because its length is known
270 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
271 enum machine_mode mode;
273 HOST_WIDE_INT arg1, arg2;
275 rtx r = rtx_alloc (CONST_DOUBLE);
280 XEXP (r, 1) = NULL_RTX;
284 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
291 gen_rtx_REG (mode, regno)
292 enum machine_mode mode;
295 /* In case the MD file explicitly references the frame pointer, have
296 all such references point to the same frame pointer. This is
297 used during frame pointer elimination to distinguish the explicit
298 references to these registers from pseudos that happened to be
301 If we have eliminated the frame pointer or arg pointer, we will
302 be using it as a normal register, for example as a spill
303 register. In such cases, we might be accessing it in a mode that
304 is not Pmode and therefore cannot use the pre-allocated rtx.
306 Also don't do this when we are making new REGs in reload, since
307 we don't want to get confused with the real pointers. */
309 if (mode == Pmode && !reload_in_progress)
311 if (regno == FRAME_POINTER_REGNUM)
312 return frame_pointer_rtx;
313 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
314 if (regno == HARD_FRAME_POINTER_REGNUM)
315 return hard_frame_pointer_rtx;
317 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
318 if (regno == ARG_POINTER_REGNUM)
319 return arg_pointer_rtx;
321 #ifdef RETURN_ADDRESS_POINTER_REGNUM
322 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
323 return return_address_pointer_rtx;
325 if (regno == STACK_POINTER_REGNUM)
326 return stack_pointer_rtx;
329 return gen_rtx_raw_REG (mode, regno);
333 gen_rtx_MEM (mode, addr)
334 enum machine_mode mode;
337 rtx rt = gen_rtx_raw_MEM (mode, addr);
339 /* This field is not cleared by the mere allocation of the rtx, so
341 MEM_ALIAS_SET (rt) = 0;
346 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
348 ** This routine generates an RTX of the size specified by
349 ** <code>, which is an RTX code. The RTX structure is initialized
350 ** from the arguments <element1> through <elementn>, which are
351 ** interpreted according to the specific RTX type's format. The
352 ** special machine mode associated with the rtx (if any) is specified
355 ** gen_rtx can be invoked in a way which resembles the lisp-like
356 ** rtx it will generate. For example, the following rtx structure:
358 ** (plus:QI (mem:QI (reg:SI 1))
359 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
361 ** ...would be generated by the following C code:
363 ** gen_rtx (PLUS, QImode,
364 ** gen_rtx (MEM, QImode,
365 ** gen_rtx (REG, SImode, 1)),
366 ** gen_rtx (MEM, QImode,
367 ** gen_rtx (PLUS, SImode,
368 ** gen_rtx (REG, SImode, 2),
369 ** gen_rtx (REG, SImode, 3)))),
374 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
376 #ifndef ANSI_PROTOTYPES
378 enum machine_mode mode;
381 register int i; /* Array indices... */
382 register char *fmt; /* Current rtx's format... */
383 register rtx rt_val; /* RTX to return to caller... */
387 #ifndef ANSI_PROTOTYPES
388 code = va_arg (p, enum rtx_code);
389 mode = va_arg (p, enum machine_mode);
395 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
400 rtx arg0 = va_arg (p, rtx);
401 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
402 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
403 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
408 rt_val = gen_rtx_REG (mode, va_arg (p, int));
412 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
416 rt_val = rtx_alloc (code); /* Allocate the storage space. */
417 rt_val->mode = mode; /* Store the machine mode... */
419 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
420 for (i = 0; i < GET_RTX_LENGTH (code); i++)
424 case '0': /* Unused field. */
427 case 'i': /* An integer? */
428 XINT (rt_val, i) = va_arg (p, int);
431 case 'w': /* A wide integer? */
432 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
435 case 's': /* A string? */
436 XSTR (rt_val, i) = va_arg (p, char *);
439 case 'e': /* An expression? */
440 case 'u': /* An insn? Same except when printing. */
441 XEXP (rt_val, i) = va_arg (p, rtx);
444 case 'E': /* An RTX vector? */
445 XVEC (rt_val, i) = va_arg (p, rtvec);
448 case 'b': /* A bitmap? */
449 XBITMAP (rt_val, i) = va_arg (p, bitmap);
452 case 't': /* A tree? */
453 XTREE (rt_val, i) = va_arg (p, tree);
467 /* gen_rtvec (n, [rt1, ..., rtn])
469 ** This routine creates an rtvec and stores within it the
470 ** pointers to rtx's which are its arguments.
475 gen_rtvec VPROTO((int n, ...))
477 #ifndef ANSI_PROTOTYPES
486 #ifndef ANSI_PROTOTYPES
491 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
493 vector = (rtx *) alloca (n * sizeof (rtx));
495 for (i = 0; i < n; i++)
496 vector[i] = va_arg (p, rtx);
499 return gen_rtvec_v (n, vector);
503 gen_rtvec_v (n, argp)
508 register rtvec rt_val;
511 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
513 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
515 for (i = 0; i < n; i++)
516 rt_val->elem[i].rtx = *argp++;
522 gen_rtvec_vv (n, argp)
527 register rtvec rt_val;
530 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
532 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
534 for (i = 0; i < n; i++)
535 rt_val->elem[i].rtx = (argp++)->rtx;
540 /* Generate a REG rtx for a new pseudo register of mode MODE.
541 This pseudo is assigned the next sequential register number. */
545 enum machine_mode mode;
549 /* Don't let anything called after initial flow analysis create new
554 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
555 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
557 /* For complex modes, don't make a single pseudo.
558 Instead, make a CONCAT of two pseudos.
559 This allows noncontiguous allocation of the real and imaginary parts,
560 which makes much better code. Besides, allocating DCmode
561 pseudos overstrains reload on some machines like the 386. */
562 rtx realpart, imagpart;
563 int size = GET_MODE_UNIT_SIZE (mode);
564 enum machine_mode partmode
565 = mode_for_size (size * BITS_PER_UNIT,
566 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
567 ? MODE_FLOAT : MODE_INT),
570 realpart = gen_reg_rtx (partmode);
571 imagpart = gen_reg_rtx (partmode);
572 return gen_rtx_CONCAT (mode, realpart, imagpart);
575 /* Make sure regno_pointer_flag and regno_reg_rtx are large
576 enough to have an element for this pseudo reg number. */
578 if (reg_rtx_no == regno_pointer_flag_length)
582 (char *) savealloc (regno_pointer_flag_length * 2);
583 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
584 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
585 regno_pointer_flag = new;
587 new = (char *) savealloc (regno_pointer_flag_length * 2);
588 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
589 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
590 regno_pointer_align = new;
592 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
593 bcopy ((char *) regno_reg_rtx, (char *) new1,
594 regno_pointer_flag_length * sizeof (rtx));
595 bzero ((char *) &new1[regno_pointer_flag_length],
596 regno_pointer_flag_length * sizeof (rtx));
597 regno_reg_rtx = new1;
599 regno_pointer_flag_length *= 2;
602 val = gen_rtx_raw_REG (mode, reg_rtx_no);
603 regno_reg_rtx[reg_rtx_no++] = val;
607 /* Identify REG (which may be a CONCAT) as a user register. */
613 if (GET_CODE (reg) == CONCAT)
615 REG_USERVAR_P (XEXP (reg, 0)) = 1;
616 REG_USERVAR_P (XEXP (reg, 1)) = 1;
618 else if (GET_CODE (reg) == REG)
619 REG_USERVAR_P (reg) = 1;
624 /* Identify REG as a probable pointer register and show its alignment
625 as ALIGN, if nonzero. */
628 mark_reg_pointer (reg, align)
632 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
635 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
638 /* Return 1 plus largest pseudo reg number used in the current function. */
646 /* Return 1 + the largest label number used so far in the current function. */
651 if (last_label_num && label_num == base_label_num)
652 return last_label_num;
656 /* Return first label number used in this function (if any were used). */
659 get_first_label_num ()
661 return first_label_num;
664 /* Return a value representing some low-order bits of X, where the number
665 of low-order bits is given by MODE. Note that no conversion is done
666 between floating-point and fixed-point values, rather, the bit
667 representation is returned.
669 This function handles the cases in common between gen_lowpart, below,
670 and two variants in cse.c and combine.c. These are the cases that can
671 be safely handled at all points in the compilation.
673 If this is not a case we can handle, return 0. */
676 gen_lowpart_common (mode, x)
677 enum machine_mode mode;
682 if (GET_MODE (x) == mode)
685 /* MODE must occupy no more words than the mode of X. */
686 if (GET_MODE (x) != VOIDmode
687 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
688 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
692 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
693 word = ((GET_MODE_SIZE (GET_MODE (x))
694 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
697 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
698 && (GET_MODE_CLASS (mode) == MODE_INT
699 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
701 /* If we are getting the low-order part of something that has been
702 sign- or zero-extended, we can either just use the object being
703 extended or make a narrower extension. If we want an even smaller
704 piece than the size of the object being extended, call ourselves
707 This case is used mostly by combine and cse. */
709 if (GET_MODE (XEXP (x, 0)) == mode)
711 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
712 return gen_lowpart_common (mode, XEXP (x, 0));
713 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
714 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
716 else if (GET_CODE (x) == SUBREG
717 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
718 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
719 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
721 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
722 else if (GET_CODE (x) == REG)
724 /* Let the backend decide how many registers to skip. This is needed
725 in particular for Sparc64 where fp regs are smaller than a word. */
726 /* ??? Note that subregs are now ambiguous, in that those against
727 pseudos are sized by the Word Size, while those against hard
728 regs are sized by the underlying register size. Better would be
729 to always interpret the subreg offset parameter as bytes or bits. */
731 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
732 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
733 - HARD_REGNO_NREGS (REGNO (x), mode));
735 /* If the register is not valid for MODE, return 0. If we don't
736 do this, there is no way to fix up the resulting REG later.
737 But we do do this if the current REG is not valid for its
738 mode. This latter is a kludge, but is required due to the
739 way that parameters are passed on some machines, most
741 if (REGNO (x) < FIRST_PSEUDO_REGISTER
742 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
743 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
745 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
746 /* integrate.c can't handle parts of a return value register. */
747 && (! REG_FUNCTION_VALUE_P (x)
748 || ! rtx_equal_function_value_matters)
749 #ifdef CLASS_CANNOT_CHANGE_SIZE
750 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
751 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
752 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
753 && (TEST_HARD_REG_BIT
754 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
757 /* We want to keep the stack, frame, and arg pointers
759 && x != frame_pointer_rtx
760 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
761 && x != arg_pointer_rtx
763 && x != stack_pointer_rtx)
764 return gen_rtx_REG (mode, REGNO (x) + word);
766 return gen_rtx_SUBREG (mode, x, word);
768 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
769 from the low-order part of the constant. */
770 else if ((GET_MODE_CLASS (mode) == MODE_INT
771 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
772 && GET_MODE (x) == VOIDmode
773 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
775 /* If MODE is twice the host word size, X is already the desired
776 representation. Otherwise, if MODE is wider than a word, we can't
777 do this. If MODE is exactly a word, return just one CONST_INT.
778 If MODE is smaller than a word, clear the bits that don't belong
779 in our mode, unless they and our sign bit are all one. So we get
780 either a reasonable negative value or a reasonable unsigned value
783 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
785 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
787 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
788 return (GET_CODE (x) == CONST_INT ? x
789 : GEN_INT (CONST_DOUBLE_LOW (x)));
792 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
793 int width = GET_MODE_BITSIZE (mode);
794 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
795 : CONST_DOUBLE_LOW (x));
797 /* Sign extend to HOST_WIDE_INT. */
798 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
800 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
805 /* If X is an integral constant but we want it in floating-point, it
806 must be the case that we have a union of an integer and a floating-point
807 value. If the machine-parameters allow it, simulate that union here
808 and return the result. The two-word and single-word cases are
811 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
812 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
813 || flag_pretend_float)
814 && GET_MODE_CLASS (mode) == MODE_FLOAT
815 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
816 && GET_CODE (x) == CONST_INT
817 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
818 #ifdef REAL_ARITHMETIC
824 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
825 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
829 union {HOST_WIDE_INT i; float d; } u;
832 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
835 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
836 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
837 || flag_pretend_float)
838 && GET_MODE_CLASS (mode) == MODE_FLOAT
839 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
840 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
841 && GET_MODE (x) == VOIDmode
842 && (sizeof (double) * HOST_BITS_PER_CHAR
843 == 2 * HOST_BITS_PER_WIDE_INT))
844 #ifdef REAL_ARITHMETIC
848 HOST_WIDE_INT low, high;
850 if (GET_CODE (x) == CONST_INT)
851 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
853 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
855 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
857 if (WORDS_BIG_ENDIAN)
858 i[0] = high, i[1] = low;
860 i[0] = low, i[1] = high;
862 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
863 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
867 union {HOST_WIDE_INT i[2]; double d; } u;
868 HOST_WIDE_INT low, high;
870 if (GET_CODE (x) == CONST_INT)
871 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
873 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
875 #ifdef HOST_WORDS_BIG_ENDIAN
876 u.i[0] = high, u.i[1] = low;
878 u.i[0] = low, u.i[1] = high;
881 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
885 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
886 same as sizeof (double) or when sizeof (float) is larger than the
887 size of a word on the target machine. */
888 #ifdef REAL_ARITHMETIC
889 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
895 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
896 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
900 /* Similarly, if this is converting a floating-point value into a
901 single-word integer. Only do this is the host and target parameters are
904 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
905 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
906 || flag_pretend_float)
907 && (GET_MODE_CLASS (mode) == MODE_INT
908 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
909 && GET_CODE (x) == CONST_DOUBLE
910 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
911 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
912 return operand_subword (x, word, 0, GET_MODE (x));
914 /* Similarly, if this is converting a floating-point value into a
915 two-word integer, we can do this one word at a time and make an
916 integer. Only do this is the host and target parameters are
919 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
920 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
921 || flag_pretend_float)
922 && (GET_MODE_CLASS (mode) == MODE_INT
923 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
924 && GET_CODE (x) == CONST_DOUBLE
925 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
926 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
929 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
931 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
933 if (lowpart && GET_CODE (lowpart) == CONST_INT
934 && highpart && GET_CODE (highpart) == CONST_INT)
935 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
938 /* Otherwise, we can't do this. */
942 /* Return the real part (which has mode MODE) of a complex value X.
943 This always comes at the low address in memory. */
946 gen_realpart (mode, x)
947 enum machine_mode mode;
950 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
952 else if (WORDS_BIG_ENDIAN)
953 return gen_highpart (mode, x);
955 return gen_lowpart (mode, x);
958 /* Return the imaginary part (which has mode MODE) of a complex value X.
959 This always comes at the high address in memory. */
962 gen_imagpart (mode, x)
963 enum machine_mode mode;
966 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
968 else if (WORDS_BIG_ENDIAN)
969 return gen_lowpart (mode, x);
971 return gen_highpart (mode, x);
974 /* Return 1 iff X, assumed to be a SUBREG,
975 refers to the real part of the complex value in its containing reg.
976 Complex values are always stored with the real part in the first word,
977 regardless of WORDS_BIG_ENDIAN. */
980 subreg_realpart_p (x)
983 if (GET_CODE (x) != SUBREG)
986 return SUBREG_WORD (x) * UNITS_PER_WORD < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)));
989 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
990 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
991 least-significant part of X.
992 MODE specifies how big a part of X to return;
993 it usually should not be larger than a word.
994 If X is a MEM whose address is a QUEUED, the value may be so also. */
997 gen_lowpart (mode, x)
998 enum machine_mode mode;
1001 rtx result = gen_lowpart_common (mode, x);
1005 else if (GET_CODE (x) == REG)
1007 /* Must be a hard reg that's not valid in MODE. */
1008 result = gen_lowpart_common (mode, copy_to_reg (x));
1013 else if (GET_CODE (x) == MEM)
1015 /* The only additional case we can do is MEM. */
1016 register int offset = 0;
1017 if (WORDS_BIG_ENDIAN)
1018 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1019 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1021 if (BYTES_BIG_ENDIAN)
1022 /* Adjust the address so that the address-after-the-data
1024 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1025 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1027 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1029 else if (GET_CODE (x) == ADDRESSOF)
1030 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1035 /* Like `gen_lowpart', but refer to the most significant part.
1036 This is used to access the imaginary part of a complex number. */
1039 gen_highpart (mode, x)
1040 enum machine_mode mode;
1043 /* This case loses if X is a subreg. To catch bugs early,
1044 complain if an invalid MODE is used even in other cases. */
1045 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1046 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1048 if (GET_CODE (x) == CONST_DOUBLE
1049 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1050 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1053 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1054 else if (GET_CODE (x) == CONST_INT)
1056 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1058 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1060 else if (GET_CODE (x) == MEM)
1062 register int offset = 0;
1063 if (! WORDS_BIG_ENDIAN)
1064 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1065 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1067 if (! BYTES_BIG_ENDIAN
1068 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1069 offset -= (GET_MODE_SIZE (mode)
1070 - MIN (UNITS_PER_WORD,
1071 GET_MODE_SIZE (GET_MODE (x))));
1073 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1075 else if (GET_CODE (x) == SUBREG)
1077 /* The only time this should occur is when we are looking at a
1078 multi-word item with a SUBREG whose mode is the same as that of the
1079 item. It isn't clear what we would do if it wasn't. */
1080 if (SUBREG_WORD (x) != 0)
1082 return gen_highpart (mode, SUBREG_REG (x));
1084 else if (GET_CODE (x) == REG)
1088 /* Let the backend decide how many registers to skip. This is needed
1089 in particular for sparc64 where fp regs are smaller than a word. */
1090 /* ??? Note that subregs are now ambiguous, in that those against
1091 pseudos are sized by the word size, while those against hard
1092 regs are sized by the underlying register size. Better would be
1093 to always interpret the subreg offset parameter as bytes or bits. */
1095 if (WORDS_BIG_ENDIAN)
1097 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1098 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1099 - HARD_REGNO_NREGS (REGNO (x), mode));
1101 word = ((GET_MODE_SIZE (GET_MODE (x))
1102 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1105 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1106 /* integrate.c can't handle parts of a return value register. */
1107 && (! REG_FUNCTION_VALUE_P (x)
1108 || ! rtx_equal_function_value_matters)
1109 /* We want to keep the stack, frame, and arg pointers special. */
1110 && x != frame_pointer_rtx
1111 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1112 && x != arg_pointer_rtx
1114 && x != stack_pointer_rtx)
1115 return gen_rtx_REG (mode, REGNO (x) + word);
1117 return gen_rtx_SUBREG (mode, x, word);
1123 /* Return 1 iff X, assumed to be a SUBREG,
1124 refers to the least significant part of its containing reg.
1125 If X is not a SUBREG, always return 1 (it is its own low part!). */
1128 subreg_lowpart_p (x)
1131 if (GET_CODE (x) != SUBREG)
1133 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1136 if (WORDS_BIG_ENDIAN
1137 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1138 return (SUBREG_WORD (x)
1139 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1140 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1143 return SUBREG_WORD (x) == 0;
1146 /* Return subword I of operand OP.
1147 The word number, I, is interpreted as the word number starting at the
1148 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1149 otherwise it is the high-order word.
1151 If we cannot extract the required word, we return zero. Otherwise, an
1152 rtx corresponding to the requested word will be returned.
1154 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1155 reload has completed, a valid address will always be returned. After
1156 reload, if a valid address cannot be returned, we return zero.
1158 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1159 it is the responsibility of the caller.
1161 MODE is the mode of OP in case it is a CONST_INT. */
1164 operand_subword (op, i, validate_address, mode)
1167 int validate_address;
1168 enum machine_mode mode;
1171 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1172 int bits_per_word = BITS_PER_WORD;
1174 if (mode == VOIDmode)
1175 mode = GET_MODE (op);
1177 if (mode == VOIDmode)
1180 /* If OP is narrower than a word, fail. */
1182 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1185 /* If we want a word outside OP, return zero. */
1187 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1190 /* If OP is already an integer word, return it. */
1191 if (GET_MODE_CLASS (mode) == MODE_INT
1192 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1195 /* If OP is a REG or SUBREG, we can handle it very simply. */
1196 if (GET_CODE (op) == REG)
1198 /* If the register is not valid for MODE, return 0. If we don't
1199 do this, there is no way to fix up the resulting REG later. */
1200 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1201 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1203 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1204 || (REG_FUNCTION_VALUE_P (op)
1205 && rtx_equal_function_value_matters)
1206 /* We want to keep the stack, frame, and arg pointers
1208 || op == frame_pointer_rtx
1209 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1210 || op == arg_pointer_rtx
1212 || op == stack_pointer_rtx)
1213 return gen_rtx_SUBREG (word_mode, op, i);
1215 return gen_rtx_REG (word_mode, REGNO (op) + i);
1217 else if (GET_CODE (op) == SUBREG)
1218 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1219 else if (GET_CODE (op) == CONCAT)
1221 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1223 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1224 return operand_subword (XEXP (op, 1), i - partwords,
1225 validate_address, mode);
1228 /* Form a new MEM at the requested address. */
1229 if (GET_CODE (op) == MEM)
1231 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1234 if (validate_address)
1236 if (reload_completed)
1238 if (! strict_memory_address_p (word_mode, addr))
1242 addr = memory_address (word_mode, addr);
1245 new = gen_rtx_MEM (word_mode, addr);
1247 MEM_COPY_ATTRIBUTES (new, op);
1248 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1253 /* The only remaining cases are when OP is a constant. If the host and
1254 target floating formats are the same, handling two-word floating
1255 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1256 are defined as returning one or two 32 bit values, respectively,
1257 and not values of BITS_PER_WORD bits. */
1258 #ifdef REAL_ARITHMETIC
1259 /* The output is some bits, the width of the target machine's word.
1260 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1262 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1263 && GET_MODE_CLASS (mode) == MODE_FLOAT
1264 && GET_MODE_BITSIZE (mode) == 64
1265 && GET_CODE (op) == CONST_DOUBLE)
1270 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1271 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1273 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1274 which the words are written depends on the word endianness.
1276 ??? This is a potential portability problem and should
1277 be fixed at some point. */
1278 if (BITS_PER_WORD == 32)
1279 return GEN_INT ((HOST_WIDE_INT) k[i]);
1280 #if HOST_BITS_PER_WIDE_INT > 32
1281 else if (BITS_PER_WORD >= 64 && i == 0)
1282 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1283 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1285 else if (BITS_PER_WORD == 16)
1289 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1292 return GEN_INT ((HOST_WIDE_INT) value);
1297 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1298 && GET_MODE_CLASS (mode) == MODE_FLOAT
1299 && GET_MODE_BITSIZE (mode) > 64
1300 && GET_CODE (op) == CONST_DOUBLE)
1305 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1306 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1308 if (BITS_PER_WORD == 32)
1309 return GEN_INT ((HOST_WIDE_INT) k[i]);
1311 #else /* no REAL_ARITHMETIC */
1312 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1313 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1314 || flag_pretend_float)
1315 && GET_MODE_CLASS (mode) == MODE_FLOAT
1316 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1317 && GET_CODE (op) == CONST_DOUBLE)
1319 /* The constant is stored in the host's word-ordering,
1320 but we want to access it in the target's word-ordering. Some
1321 compilers don't like a conditional inside macro args, so we have two
1322 copies of the return. */
1323 #ifdef HOST_WORDS_BIG_ENDIAN
1324 return GEN_INT (i == WORDS_BIG_ENDIAN
1325 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1327 return GEN_INT (i != WORDS_BIG_ENDIAN
1328 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1331 #endif /* no REAL_ARITHMETIC */
1333 /* Single word float is a little harder, since single- and double-word
1334 values often do not have the same high-order bits. We have already
1335 verified that we want the only defined word of the single-word value. */
1336 #ifdef REAL_ARITHMETIC
1337 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1338 && GET_MODE_BITSIZE (mode) == 32
1339 && GET_CODE (op) == CONST_DOUBLE)
1344 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1345 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1347 /* If 32 bits is an entire word for the target, but not for the host,
1348 then sign-extend on the host so that the number will look the same
1349 way on the host that it would on the target. See for instance
1350 simplify_unary_operation. The #if is needed to avoid compiler
1353 #if HOST_BITS_PER_LONG > 32
1354 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32
1355 && (l & ((long) 1 << 31)))
1356 l |= ((long) (-1) << 32);
1359 if (BITS_PER_WORD == 16)
1361 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1365 return GEN_INT ((HOST_WIDE_INT) l);
1368 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1369 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1370 || flag_pretend_float)
1371 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1372 && GET_MODE_CLASS (mode) == MODE_FLOAT
1373 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1374 && GET_CODE (op) == CONST_DOUBLE)
1377 union {float f; HOST_WIDE_INT i; } u;
1379 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1382 return GEN_INT (u.i);
1384 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1385 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1386 || flag_pretend_float)
1387 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1388 && GET_MODE_CLASS (mode) == MODE_FLOAT
1389 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1390 && GET_CODE (op) == CONST_DOUBLE)
1393 union {double d; HOST_WIDE_INT i; } u;
1395 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1398 return GEN_INT (u.i);
1400 #endif /* no REAL_ARITHMETIC */
1402 /* The only remaining cases that we can handle are integers.
1403 Convert to proper endianness now since these cases need it.
1404 At this point, i == 0 means the low-order word.
1406 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1407 in general. However, if OP is (const_int 0), we can just return
1410 if (op == const0_rtx)
1413 if (GET_MODE_CLASS (mode) != MODE_INT
1414 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1415 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1418 if (WORDS_BIG_ENDIAN)
1419 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1421 /* Find out which word on the host machine this value is in and get
1422 it from the constant. */
1423 val = (i / size_ratio == 0
1424 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1425 : (GET_CODE (op) == CONST_INT
1426 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1428 /* Get the value we want into the low bits of val. */
1429 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1430 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1432 /* Clear the bits that don't belong in our mode, unless they and our sign
1433 bit are all one. So we get either a reasonable negative value or a
1434 reasonable unsigned value for this mode. */
1435 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1436 && ((val & ((HOST_WIDE_INT) (-1) << (bits_per_word - 1)))
1437 != ((HOST_WIDE_INT) (-1) << (bits_per_word - 1))))
1438 val &= ((HOST_WIDE_INT) 1 << bits_per_word) - 1;
1440 /* If this would be an entire word for the target, but is not for
1441 the host, then sign-extend on the host so that the number will look
1442 the same way on the host that it would on the target.
1444 For example, when building a 64 bit alpha hosted 32 bit sparc
1445 targeted compiler, then we want the 32 bit unsigned value -1 to be
1446 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1447 The later confuses the sparc backend. */
1449 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1450 && (val & ((HOST_WIDE_INT) 1 << (bits_per_word - 1))))
1451 val |= ((HOST_WIDE_INT) (-1) << bits_per_word);
1453 return GEN_INT (val);
1456 /* Similar to `operand_subword', but never return 0. If we can't extract
1457 the required subword, put OP into a register and try again. If that fails,
1458 abort. We always validate the address in this case. It is not valid
1459 to call this function after reload; it is mostly meant for RTL
1462 MODE is the mode of OP, in case it is CONST_INT. */
1465 operand_subword_force (op, i, mode)
1468 enum machine_mode mode;
1470 rtx result = operand_subword (op, i, 1, mode);
1475 if (mode != BLKmode && mode != VOIDmode)
1477 /* If this is a register which can not be accessed by words, copy it
1478 to a pseudo register. */
1479 if (GET_CODE (op) == REG)
1480 op = copy_to_reg (op);
1482 op = force_reg (mode, op);
1485 result = operand_subword (op, i, 1, mode);
1492 /* Given a compare instruction, swap the operands.
1493 A test instruction is changed into a compare of 0 against the operand. */
1496 reverse_comparison (insn)
1499 rtx body = PATTERN (insn);
1502 if (GET_CODE (body) == SET)
1503 comp = SET_SRC (body);
1505 comp = SET_SRC (XVECEXP (body, 0, 0));
1507 if (GET_CODE (comp) == COMPARE)
1509 rtx op0 = XEXP (comp, 0);
1510 rtx op1 = XEXP (comp, 1);
1511 XEXP (comp, 0) = op1;
1512 XEXP (comp, 1) = op0;
1516 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1517 if (GET_CODE (body) == SET)
1518 SET_SRC (body) = new;
1520 SET_SRC (XVECEXP (body, 0, 0)) = new;
1524 /* Return a memory reference like MEMREF, but with its mode changed
1525 to MODE and its address changed to ADDR.
1526 (VOIDmode means don't change the mode.
1527 NULL for ADDR means don't change the address.) */
1530 change_address (memref, mode, addr)
1532 enum machine_mode mode;
1537 if (GET_CODE (memref) != MEM)
1539 if (mode == VOIDmode)
1540 mode = GET_MODE (memref);
1542 addr = XEXP (memref, 0);
1544 /* If reload is in progress or has completed, ADDR must be valid.
1545 Otherwise, we can call memory_address to make it valid. */
1546 if (reload_completed || reload_in_progress)
1548 if (! memory_address_p (mode, addr))
1552 addr = memory_address (mode, addr);
1554 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1557 new = gen_rtx_MEM (mode, addr);
1558 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1559 MEM_COPY_ATTRIBUTES (new, memref);
1563 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1570 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1571 NULL_RTX, label_num++, NULL_PTR);
1573 LABEL_NUSES (label) = 0;
1577 /* For procedure integration. */
1579 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1580 from a permanent obstack when the opportunity arises. */
1583 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1584 last_labelno, max_parm_regnum, max_regnum, args_size,
1585 pops_args, stack_slots, forced_labels, function_flags,
1586 outgoing_args_size, original_arg_vector,
1587 original_decl_initial, regno_rtx, regno_flag,
1588 regno_align, parm_reg_stack_loc)
1589 rtx first_insn, first_parm_insn;
1590 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1595 int outgoing_args_size;
1596 rtvec original_arg_vector;
1597 rtx original_decl_initial;
1601 rtvec parm_reg_stack_loc;
1603 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1604 cur_insn_uid++, NULL_RTX,
1605 first_insn, first_parm_insn,
1606 first_labelno, last_labelno,
1607 max_parm_regnum, max_regnum, args_size,
1608 pops_args, stack_slots, forced_labels,
1609 function_flags, outgoing_args_size,
1610 original_arg_vector,
1611 original_decl_initial,
1612 regno_rtx, regno_flag, regno_align,
1613 parm_reg_stack_loc);
1617 /* Install new pointers to the first and last insns in the chain.
1618 Also, set cur_insn_uid to one higher than the last in use.
1619 Used for an inline-procedure after copying the insn chain. */
1622 set_new_first_and_last_insn (first, last)
1631 for (insn = first; insn; insn = NEXT_INSN (insn))
1632 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1637 /* Set the range of label numbers found in the current function.
1638 This is used when belatedly compiling an inline function. */
1641 set_new_first_and_last_label_num (first, last)
1644 base_label_num = label_num;
1645 first_label_num = first;
1646 last_label_num = last;
1649 /* Save all variables describing the current status into the structure *P.
1650 This is used before starting a nested function. */
1653 save_emit_status (p)
1656 p->reg_rtx_no = reg_rtx_no;
1657 p->first_label_num = first_label_num;
1658 p->first_insn = first_insn;
1659 p->last_insn = last_insn;
1660 p->sequence_rtl_expr = sequence_rtl_expr;
1661 p->sequence_stack = sequence_stack;
1662 p->cur_insn_uid = cur_insn_uid;
1663 p->last_linenum = last_linenum;
1664 p->last_filename = last_filename;
1665 p->regno_pointer_flag = regno_pointer_flag;
1666 p->regno_pointer_align = regno_pointer_align;
1667 p->regno_pointer_flag_length = regno_pointer_flag_length;
1668 p->regno_reg_rtx = regno_reg_rtx;
1671 /* Restore all variables describing the current status from the structure *P.
1672 This is used after a nested function. */
1675 restore_emit_status (p)
1680 reg_rtx_no = p->reg_rtx_no;
1681 first_label_num = p->first_label_num;
1683 first_insn = p->first_insn;
1684 last_insn = p->last_insn;
1685 sequence_rtl_expr = p->sequence_rtl_expr;
1686 sequence_stack = p->sequence_stack;
1687 cur_insn_uid = p->cur_insn_uid;
1688 last_linenum = p->last_linenum;
1689 last_filename = p->last_filename;
1690 regno_pointer_flag = p->regno_pointer_flag;
1691 regno_pointer_align = p->regno_pointer_align;
1692 regno_pointer_flag_length = p->regno_pointer_flag_length;
1693 regno_reg_rtx = p->regno_reg_rtx;
1695 /* Clear our cache of rtx expressions for start_sequence and
1697 sequence_element_free_list = 0;
1698 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1699 sequence_result[i] = 0;
1704 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1705 It does not work to do this twice, because the mark bits set here
1706 are not cleared afterwards. */
1709 unshare_all_rtl (insn)
1712 for (; insn; insn = NEXT_INSN (insn))
1713 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1714 || GET_CODE (insn) == CALL_INSN)
1716 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1717 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1718 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1721 /* Make sure the addresses of stack slots found outside the insn chain
1722 (such as, in DECL_RTL of a variable) are not shared
1723 with the insn chain.
1725 This special care is necessary when the stack slot MEM does not
1726 actually appear in the insn chain. If it does appear, its address
1727 is unshared from all else at that point. */
1729 copy_rtx_if_shared (stack_slot_list);
1732 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1733 Recursively does the same for subexpressions. */
1736 copy_rtx_if_shared (orig)
1739 register rtx x = orig;
1741 register enum rtx_code code;
1742 register char *format_ptr;
1748 code = GET_CODE (x);
1750 /* These types may be freely shared. */
1763 /* SCRATCH must be shared because they represent distinct values. */
1767 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1768 a LABEL_REF, it isn't sharable. */
1769 if (GET_CODE (XEXP (x, 0)) == PLUS
1770 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1771 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1780 /* The chain of insns is not being copied. */
1784 /* A MEM is allowed to be shared if its address is constant
1785 or is a constant plus one of the special registers. */
1786 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1787 || XEXP (x, 0) == virtual_stack_vars_rtx
1788 || XEXP (x, 0) == virtual_incoming_args_rtx)
1791 if (GET_CODE (XEXP (x, 0)) == PLUS
1792 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1793 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1794 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1796 /* This MEM can appear in more than one place,
1797 but its address better not be shared with anything else. */
1799 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1809 /* This rtx may not be shared. If it has already been seen,
1810 replace it with a copy of itself. */
1816 copy = rtx_alloc (code);
1817 bcopy ((char *) x, (char *) copy,
1818 (sizeof (*copy) - sizeof (copy->fld)
1819 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1825 /* Now scan the subexpressions recursively.
1826 We can store any replaced subexpressions directly into X
1827 since we know X is not shared! Any vectors in X
1828 must be copied if X was copied. */
1830 format_ptr = GET_RTX_FORMAT (code);
1832 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1834 switch (*format_ptr++)
1837 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1841 if (XVEC (x, i) != NULL)
1844 int len = XVECLEN (x, i);
1846 if (copied && len > 0)
1847 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1848 for (j = 0; j < len; j++)
1849 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1857 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1858 to look for shared sub-parts. */
1861 reset_used_flags (x)
1865 register enum rtx_code code;
1866 register char *format_ptr;
1871 code = GET_CODE (x);
1873 /* These types may be freely shared so we needn't do any resetting
1894 /* The chain of insns is not being copied. */
1903 format_ptr = GET_RTX_FORMAT (code);
1904 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1906 switch (*format_ptr++)
1909 reset_used_flags (XEXP (x, i));
1913 for (j = 0; j < XVECLEN (x, i); j++)
1914 reset_used_flags (XVECEXP (x, i, j));
1920 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1921 Return X or the rtx for the pseudo reg the value of X was copied into.
1922 OTHER must be valid as a SET_DEST. */
1925 make_safe_from (x, other)
1929 switch (GET_CODE (other))
1932 other = SUBREG_REG (other);
1934 case STRICT_LOW_PART:
1937 other = XEXP (other, 0);
1943 if ((GET_CODE (other) == MEM
1945 && GET_CODE (x) != REG
1946 && GET_CODE (x) != SUBREG)
1947 || (GET_CODE (other) == REG
1948 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1949 || reg_mentioned_p (other, x))))
1951 rtx temp = gen_reg_rtx (GET_MODE (x));
1952 emit_move_insn (temp, x);
1958 /* Emission of insns (adding them to the doubly-linked list). */
1960 /* Return the first insn of the current sequence or current function. */
1968 /* Return the last insn emitted in current sequence or current function. */
1976 /* Specify a new insn as the last in the chain. */
1979 set_last_insn (insn)
1982 if (NEXT_INSN (insn) != 0)
1987 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1990 get_last_insn_anywhere ()
1992 struct sequence_stack *stack;
1995 for (stack = sequence_stack; stack; stack = stack->next)
1996 if (stack->last != 0)
2001 /* Return a number larger than any instruction's uid in this function. */
2006 return cur_insn_uid;
2009 /* Return the next insn. If it is a SEQUENCE, return the first insn
2018 insn = NEXT_INSN (insn);
2019 if (insn && GET_CODE (insn) == INSN
2020 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2021 insn = XVECEXP (PATTERN (insn), 0, 0);
2027 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2031 previous_insn (insn)
2036 insn = PREV_INSN (insn);
2037 if (insn && GET_CODE (insn) == INSN
2038 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2039 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2045 /* Return the next insn after INSN that is not a NOTE. This routine does not
2046 look inside SEQUENCEs. */
2049 next_nonnote_insn (insn)
2054 insn = NEXT_INSN (insn);
2055 if (insn == 0 || GET_CODE (insn) != NOTE)
2062 /* Return the previous insn before INSN that is not a NOTE. This routine does
2063 not look inside SEQUENCEs. */
2066 prev_nonnote_insn (insn)
2071 insn = PREV_INSN (insn);
2072 if (insn == 0 || GET_CODE (insn) != NOTE)
2079 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2080 or 0, if there is none. This routine does not look inside
2084 next_real_insn (insn)
2089 insn = NEXT_INSN (insn);
2090 if (insn == 0 || GET_CODE (insn) == INSN
2091 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2098 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2099 or 0, if there is none. This routine does not look inside
2103 prev_real_insn (insn)
2108 insn = PREV_INSN (insn);
2109 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2110 || GET_CODE (insn) == JUMP_INSN)
2117 /* Find the next insn after INSN that really does something. This routine
2118 does not look inside SEQUENCEs. Until reload has completed, this is the
2119 same as next_real_insn. */
2122 next_active_insn (insn)
2127 insn = NEXT_INSN (insn);
2129 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2130 || (GET_CODE (insn) == INSN
2131 && (! reload_completed
2132 || (GET_CODE (PATTERN (insn)) != USE
2133 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2140 /* Find the last insn before INSN that really does something. This routine
2141 does not look inside SEQUENCEs. Until reload has completed, this is the
2142 same as prev_real_insn. */
2145 prev_active_insn (insn)
2150 insn = PREV_INSN (insn);
2152 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2153 || (GET_CODE (insn) == INSN
2154 && (! reload_completed
2155 || (GET_CODE (PATTERN (insn)) != USE
2156 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2163 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2171 insn = NEXT_INSN (insn);
2172 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2179 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2187 insn = PREV_INSN (insn);
2188 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2196 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2197 and REG_CC_USER notes so we can find it. */
2200 link_cc0_insns (insn)
2203 rtx user = next_nonnote_insn (insn);
2205 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2206 user = XVECEXP (PATTERN (user), 0, 0);
2208 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2209 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2212 /* Return the next insn that uses CC0 after INSN, which is assumed to
2213 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2214 applied to the result of this function should yield INSN).
2216 Normally, this is simply the next insn. However, if a REG_CC_USER note
2217 is present, it contains the insn that uses CC0.
2219 Return 0 if we can't find the insn. */
2222 next_cc0_user (insn)
2225 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2228 return XEXP (note, 0);
2230 insn = next_nonnote_insn (insn);
2231 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2232 insn = XVECEXP (PATTERN (insn), 0, 0);
2234 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2235 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2241 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2242 note, it is the previous insn. */
2245 prev_cc0_setter (insn)
2248 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2251 return XEXP (note, 0);
2253 insn = prev_nonnote_insn (insn);
2254 if (! sets_cc0_p (PATTERN (insn)))
2261 /* Try splitting insns that can be split for better scheduling.
2262 PAT is the pattern which might split.
2263 TRIAL is the insn providing PAT.
2264 LAST is non-zero if we should return the last insn of the sequence produced.
2266 If this routine succeeds in splitting, it returns the first or last
2267 replacement insn depending on the value of LAST. Otherwise, it
2268 returns TRIAL. If the insn to be returned can be split, it will be. */
2271 try_split (pat, trial, last)
2275 rtx before = PREV_INSN (trial);
2276 rtx after = NEXT_INSN (trial);
2277 rtx seq = split_insns (pat, trial);
2278 int has_barrier = 0;
2281 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2282 We may need to handle this specially. */
2283 if (after && GET_CODE (after) == BARRIER)
2286 after = NEXT_INSN (after);
2291 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2292 The latter case will normally arise only when being done so that
2293 it, in turn, will be split (SFmode on the 29k is an example). */
2294 if (GET_CODE (seq) == SEQUENCE)
2296 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2297 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2298 increment the usage count so we don't delete the label. */
2301 if (GET_CODE (trial) == JUMP_INSN)
2302 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2303 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2305 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2307 if (JUMP_LABEL (trial))
2308 LABEL_NUSES (JUMP_LABEL (trial))++;
2311 tem = emit_insn_after (seq, before);
2313 delete_insn (trial);
2315 emit_barrier_after (tem);
2317 /* Recursively call try_split for each new insn created; by the
2318 time control returns here that insn will be fully split, so
2319 set LAST and continue from the insn after the one returned.
2320 We can't use next_active_insn here since AFTER may be a note.
2321 Ignore deleted insns, which can be occur if not optimizing. */
2322 for (tem = NEXT_INSN (before); tem != after;
2323 tem = NEXT_INSN (tem))
2324 if (! INSN_DELETED_P (tem)
2325 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2326 tem = try_split (PATTERN (tem), tem, 1);
2328 /* Avoid infinite loop if the result matches the original pattern. */
2329 else if (rtx_equal_p (seq, pat))
2333 PATTERN (trial) = seq;
2334 INSN_CODE (trial) = -1;
2335 try_split (seq, trial, last);
2338 /* Return either the first or the last insn, depending on which was
2340 return last ? prev_active_insn (after) : next_active_insn (before);
2346 /* Make and return an INSN rtx, initializing all its slots.
2347 Store PATTERN in the pattern slots. */
2350 make_insn_raw (pattern)
2355 /* If in RTL generation phase, see if FREE_INSN can be used. */
2356 if (free_insn != 0 && rtx_equal_function_value_matters)
2359 free_insn = NEXT_INSN (free_insn);
2360 PUT_CODE (insn, INSN);
2363 insn = rtx_alloc (INSN);
2365 INSN_UID (insn) = cur_insn_uid++;
2366 PATTERN (insn) = pattern;
2367 INSN_CODE (insn) = -1;
2368 LOG_LINKS (insn) = NULL;
2369 REG_NOTES (insn) = NULL;
2374 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2377 make_jump_insn_raw (pattern)
2382 insn = rtx_alloc (JUMP_INSN);
2383 INSN_UID (insn) = cur_insn_uid++;
2385 PATTERN (insn) = pattern;
2386 INSN_CODE (insn) = -1;
2387 LOG_LINKS (insn) = NULL;
2388 REG_NOTES (insn) = NULL;
2389 JUMP_LABEL (insn) = NULL;
2394 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2397 make_call_insn_raw (pattern)
2402 insn = rtx_alloc (CALL_INSN);
2403 INSN_UID (insn) = cur_insn_uid++;
2405 PATTERN (insn) = pattern;
2406 INSN_CODE (insn) = -1;
2407 LOG_LINKS (insn) = NULL;
2408 REG_NOTES (insn) = NULL;
2409 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2414 /* Add INSN to the end of the doubly-linked list.
2415 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2421 PREV_INSN (insn) = last_insn;
2422 NEXT_INSN (insn) = 0;
2424 if (NULL != last_insn)
2425 NEXT_INSN (last_insn) = insn;
2427 if (NULL == first_insn)
2433 /* Add INSN into the doubly-linked list after insn AFTER. This and
2434 the next should be the only functions called to insert an insn once
2435 delay slots have been filled since only they know how to update a
2439 add_insn_after (insn, after)
2442 rtx next = NEXT_INSN (after);
2444 if (optimize && INSN_DELETED_P (after))
2447 NEXT_INSN (insn) = next;
2448 PREV_INSN (insn) = after;
2452 PREV_INSN (next) = insn;
2453 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2454 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2456 else if (last_insn == after)
2460 struct sequence_stack *stack = sequence_stack;
2461 /* Scan all pending sequences too. */
2462 for (; stack; stack = stack->next)
2463 if (after == stack->last)
2473 NEXT_INSN (after) = insn;
2474 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2476 rtx sequence = PATTERN (after);
2477 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2481 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2482 the previous should be the only functions called to insert an insn once
2483 delay slots have been filled since only they know how to update a
2487 add_insn_before (insn, before)
2490 rtx prev = PREV_INSN (before);
2492 if (optimize && INSN_DELETED_P (before))
2495 PREV_INSN (insn) = prev;
2496 NEXT_INSN (insn) = before;
2500 NEXT_INSN (prev) = insn;
2501 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2503 rtx sequence = PATTERN (prev);
2504 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2507 else if (first_insn == before)
2511 struct sequence_stack *stack = sequence_stack;
2512 /* Scan all pending sequences too. */
2513 for (; stack; stack = stack->next)
2514 if (before == stack->first)
2516 stack->first = insn;
2524 PREV_INSN (before) = insn;
2525 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2526 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2529 /* Remove an insn from its doubly-linked list. This function knows how
2530 to handle sequences. */
2535 rtx next = NEXT_INSN (insn);
2536 rtx prev = PREV_INSN (insn);
2539 NEXT_INSN (prev) = next;
2540 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2542 rtx sequence = PATTERN (prev);
2543 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2546 else if (first_insn == insn)
2550 struct sequence_stack *stack = sequence_stack;
2551 /* Scan all pending sequences too. */
2552 for (; stack; stack = stack->next)
2553 if (insn == stack->first)
2555 stack->first = next;
2565 PREV_INSN (next) = prev;
2566 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2567 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2569 else if (last_insn == insn)
2573 struct sequence_stack *stack = sequence_stack;
2574 /* Scan all pending sequences too. */
2575 for (; stack; stack = stack->next)
2576 if (insn == stack->last)
2587 /* Delete all insns made since FROM.
2588 FROM becomes the new last instruction. */
2591 delete_insns_since (from)
2597 NEXT_INSN (from) = 0;
2601 /* This function is deprecated, please use sequences instead.
2603 Move a consecutive bunch of insns to a different place in the chain.
2604 The insns to be moved are those between FROM and TO.
2605 They are moved to a new position after the insn AFTER.
2606 AFTER must not be FROM or TO or any insn in between.
2608 This function does not know about SEQUENCEs and hence should not be
2609 called after delay-slot filling has been done. */
2612 reorder_insns (from, to, after)
2613 rtx from, to, after;
2615 /* Splice this bunch out of where it is now. */
2616 if (PREV_INSN (from))
2617 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2619 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2620 if (last_insn == to)
2621 last_insn = PREV_INSN (from);
2622 if (first_insn == from)
2623 first_insn = NEXT_INSN (to);
2625 /* Make the new neighbors point to it and it to them. */
2626 if (NEXT_INSN (after))
2627 PREV_INSN (NEXT_INSN (after)) = to;
2629 NEXT_INSN (to) = NEXT_INSN (after);
2630 PREV_INSN (from) = after;
2631 NEXT_INSN (after) = from;
2632 if (after == last_insn)
2636 /* Return the line note insn preceding INSN. */
2639 find_line_note (insn)
2642 if (no_line_numbers)
2645 for (; insn; insn = PREV_INSN (insn))
2646 if (GET_CODE (insn) == NOTE
2647 && NOTE_LINE_NUMBER (insn) >= 0)
2653 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2654 of the moved insns when debugging. This may insert a note between AFTER
2655 and FROM, and another one after TO. */
2658 reorder_insns_with_line_notes (from, to, after)
2659 rtx from, to, after;
2661 rtx from_line = find_line_note (from);
2662 rtx after_line = find_line_note (after);
2664 reorder_insns (from, to, after);
2666 if (from_line == after_line)
2670 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2671 NOTE_LINE_NUMBER (from_line),
2674 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2675 NOTE_LINE_NUMBER (after_line),
2679 /* Emit an insn of given code and pattern
2680 at a specified place within the doubly-linked list. */
2682 /* Make an instruction with body PATTERN
2683 and output it before the instruction BEFORE. */
2686 emit_insn_before (pattern, before)
2687 register rtx pattern, before;
2689 register rtx insn = before;
2691 if (GET_CODE (pattern) == SEQUENCE)
2695 for (i = 0; i < XVECLEN (pattern, 0); i++)
2697 insn = XVECEXP (pattern, 0, i);
2698 add_insn_before (insn, before);
2700 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2701 sequence_result[XVECLEN (pattern, 0)] = pattern;
2705 insn = make_insn_raw (pattern);
2706 add_insn_before (insn, before);
2712 /* Make an instruction with body PATTERN and code JUMP_INSN
2713 and output it before the instruction BEFORE. */
2716 emit_jump_insn_before (pattern, before)
2717 register rtx pattern, before;
2721 if (GET_CODE (pattern) == SEQUENCE)
2722 insn = emit_insn_before (pattern, before);
2725 insn = make_jump_insn_raw (pattern);
2726 add_insn_before (insn, before);
2732 /* Make an instruction with body PATTERN and code CALL_INSN
2733 and output it before the instruction BEFORE. */
2736 emit_call_insn_before (pattern, before)
2737 register rtx pattern, before;
2741 if (GET_CODE (pattern) == SEQUENCE)
2742 insn = emit_insn_before (pattern, before);
2745 insn = make_call_insn_raw (pattern);
2746 add_insn_before (insn, before);
2747 PUT_CODE (insn, CALL_INSN);
2753 /* Make an insn of code BARRIER
2754 and output it before the insn BEFORE. */
2757 emit_barrier_before (before)
2758 register rtx before;
2760 register rtx insn = rtx_alloc (BARRIER);
2762 INSN_UID (insn) = cur_insn_uid++;
2764 add_insn_before (insn, before);
2768 /* Emit the label LABEL before the insn BEFORE. */
2771 emit_label_before (label, before)
2774 /* This can be called twice for the same label as a result of the
2775 confusion that follows a syntax error! So make it harmless. */
2776 if (INSN_UID (label) == 0)
2778 INSN_UID (label) = cur_insn_uid++;
2779 add_insn_before (label, before);
2785 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2788 emit_note_before (subtype, before)
2792 register rtx note = rtx_alloc (NOTE);
2793 INSN_UID (note) = cur_insn_uid++;
2794 NOTE_SOURCE_FILE (note) = 0;
2795 NOTE_LINE_NUMBER (note) = subtype;
2797 add_insn_before (note, before);
2801 /* Make an insn of code INSN with body PATTERN
2802 and output it after the insn AFTER. */
2805 emit_insn_after (pattern, after)
2806 register rtx pattern, after;
2808 register rtx insn = after;
2810 if (GET_CODE (pattern) == SEQUENCE)
2814 for (i = 0; i < XVECLEN (pattern, 0); i++)
2816 insn = XVECEXP (pattern, 0, i);
2817 add_insn_after (insn, after);
2820 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2821 sequence_result[XVECLEN (pattern, 0)] = pattern;
2825 insn = make_insn_raw (pattern);
2826 add_insn_after (insn, after);
2832 /* Similar to emit_insn_after, except that line notes are to be inserted so
2833 as to act as if this insn were at FROM. */
2836 emit_insn_after_with_line_notes (pattern, after, from)
2837 rtx pattern, after, from;
2839 rtx from_line = find_line_note (from);
2840 rtx after_line = find_line_note (after);
2841 rtx insn = emit_insn_after (pattern, after);
2844 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2845 NOTE_LINE_NUMBER (from_line),
2849 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2850 NOTE_LINE_NUMBER (after_line),
2854 /* Make an insn of code JUMP_INSN with body PATTERN
2855 and output it after the insn AFTER. */
2858 emit_jump_insn_after (pattern, after)
2859 register rtx pattern, after;
2863 if (GET_CODE (pattern) == SEQUENCE)
2864 insn = emit_insn_after (pattern, after);
2867 insn = make_jump_insn_raw (pattern);
2868 add_insn_after (insn, after);
2874 /* Make an insn of code BARRIER
2875 and output it after the insn AFTER. */
2878 emit_barrier_after (after)
2881 register rtx insn = rtx_alloc (BARRIER);
2883 INSN_UID (insn) = cur_insn_uid++;
2885 add_insn_after (insn, after);
2889 /* Emit the label LABEL after the insn AFTER. */
2892 emit_label_after (label, after)
2895 /* This can be called twice for the same label
2896 as a result of the confusion that follows a syntax error!
2897 So make it harmless. */
2898 if (INSN_UID (label) == 0)
2900 INSN_UID (label) = cur_insn_uid++;
2901 add_insn_after (label, after);
2907 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2910 emit_note_after (subtype, after)
2914 register rtx note = rtx_alloc (NOTE);
2915 INSN_UID (note) = cur_insn_uid++;
2916 NOTE_SOURCE_FILE (note) = 0;
2917 NOTE_LINE_NUMBER (note) = subtype;
2918 add_insn_after (note, after);
2922 /* Emit a line note for FILE and LINE after the insn AFTER. */
2925 emit_line_note_after (file, line, after)
2932 if (no_line_numbers && line > 0)
2938 note = rtx_alloc (NOTE);
2939 INSN_UID (note) = cur_insn_uid++;
2940 NOTE_SOURCE_FILE (note) = file;
2941 NOTE_LINE_NUMBER (note) = line;
2942 add_insn_after (note, after);
2946 /* Make an insn of code INSN with pattern PATTERN
2947 and add it to the end of the doubly-linked list.
2948 If PATTERN is a SEQUENCE, take the elements of it
2949 and emit an insn for each element.
2951 Returns the last insn emitted. */
2957 rtx insn = last_insn;
2959 if (GET_CODE (pattern) == SEQUENCE)
2963 for (i = 0; i < XVECLEN (pattern, 0); i++)
2965 insn = XVECEXP (pattern, 0, i);
2968 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2969 sequence_result[XVECLEN (pattern, 0)] = pattern;
2973 insn = make_insn_raw (pattern);
2980 /* Emit the insns in a chain starting with INSN.
2981 Return the last insn emitted. */
2991 rtx next = NEXT_INSN (insn);
3000 /* Emit the insns in a chain starting with INSN and place them in front of
3001 the insn BEFORE. Return the last insn emitted. */
3004 emit_insns_before (insn, before)
3012 rtx next = NEXT_INSN (insn);
3013 add_insn_before (insn, before);
3021 /* Emit the insns in a chain starting with FIRST and place them in back of
3022 the insn AFTER. Return the last insn emitted. */
3025 emit_insns_after (first, after)
3030 register rtx after_after;
3038 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3041 after_after = NEXT_INSN (after);
3043 NEXT_INSN (after) = first;
3044 PREV_INSN (first) = after;
3045 NEXT_INSN (last) = after_after;
3047 PREV_INSN (after_after) = last;
3049 if (after == last_insn)
3054 /* Make an insn of code JUMP_INSN with pattern PATTERN
3055 and add it to the end of the doubly-linked list. */
3058 emit_jump_insn (pattern)
3061 if (GET_CODE (pattern) == SEQUENCE)
3062 return emit_insn (pattern);
3065 register rtx insn = make_jump_insn_raw (pattern);
3071 /* Make an insn of code CALL_INSN with pattern PATTERN
3072 and add it to the end of the doubly-linked list. */
3075 emit_call_insn (pattern)
3078 if (GET_CODE (pattern) == SEQUENCE)
3079 return emit_insn (pattern);
3082 register rtx insn = make_call_insn_raw (pattern);
3084 PUT_CODE (insn, CALL_INSN);
3089 /* Add the label LABEL to the end of the doubly-linked list. */
3095 /* This can be called twice for the same label
3096 as a result of the confusion that follows a syntax error!
3097 So make it harmless. */
3098 if (INSN_UID (label) == 0)
3100 INSN_UID (label) = cur_insn_uid++;
3106 /* Make an insn of code BARRIER
3107 and add it to the end of the doubly-linked list. */
3112 register rtx barrier = rtx_alloc (BARRIER);
3113 INSN_UID (barrier) = cur_insn_uid++;
3118 /* Make an insn of code NOTE
3119 with data-fields specified by FILE and LINE
3120 and add it to the end of the doubly-linked list,
3121 but only if line-numbers are desired for debugging info. */
3124 emit_line_note (file, line)
3128 emit_filename = file;
3132 if (no_line_numbers)
3136 return emit_note (file, line);
3139 /* Make an insn of code NOTE
3140 with data-fields specified by FILE and LINE
3141 and add it to the end of the doubly-linked list.
3142 If it is a line-number NOTE, omit it if it matches the previous one. */
3145 emit_note (file, line)
3153 if (file && last_filename && !strcmp (file, last_filename)
3154 && line == last_linenum)
3156 last_filename = file;
3157 last_linenum = line;
3160 if (no_line_numbers && line > 0)
3166 note = rtx_alloc (NOTE);
3167 INSN_UID (note) = cur_insn_uid++;
3168 NOTE_SOURCE_FILE (note) = file;
3169 NOTE_LINE_NUMBER (note) = line;
3174 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3177 emit_line_note_force (file, line)
3182 return emit_line_note (file, line);
3185 /* Cause next statement to emit a line note even if the line number
3186 has not changed. This is used at the beginning of a function. */
3189 force_next_line_note ()
3194 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3195 note of this type already exists, remove it first. */
3198 set_unique_reg_note (insn, kind, datum)
3203 rtx note = find_reg_note (insn, kind, NULL_RTX);
3205 /* First remove the note if there already is one. */
3207 remove_note (insn, note);
3209 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3212 /* Return an indication of which type of insn should have X as a body.
3213 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3219 if (GET_CODE (x) == CODE_LABEL)
3221 if (GET_CODE (x) == CALL)
3223 if (GET_CODE (x) == RETURN)
3225 if (GET_CODE (x) == SET)
3227 if (SET_DEST (x) == pc_rtx)
3229 else if (GET_CODE (SET_SRC (x)) == CALL)
3234 if (GET_CODE (x) == PARALLEL)
3237 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3238 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3240 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3241 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3243 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3244 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3250 /* Emit the rtl pattern X as an appropriate kind of insn.
3251 If X is a label, it is simply added into the insn chain. */
3257 enum rtx_code code = classify_insn (x);
3259 if (code == CODE_LABEL)
3260 return emit_label (x);
3261 else if (code == INSN)
3262 return emit_insn (x);
3263 else if (code == JUMP_INSN)
3265 register rtx insn = emit_jump_insn (x);
3266 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3267 return emit_barrier ();
3270 else if (code == CALL_INSN)
3271 return emit_call_insn (x);
3276 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3281 struct sequence_stack *tem;
3283 if (sequence_element_free_list)
3285 /* Reuse a previously-saved struct sequence_stack. */
3286 tem = sequence_element_free_list;
3287 sequence_element_free_list = tem->next;
3290 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3292 tem->next = sequence_stack;
3293 tem->first = first_insn;
3294 tem->last = last_insn;
3295 tem->sequence_rtl_expr = sequence_rtl_expr;
3297 sequence_stack = tem;
3303 /* Similarly, but indicate that this sequence will be placed in
3307 start_sequence_for_rtl_expr (t)
3312 sequence_rtl_expr = t;
3315 /* Set up the insn chain starting with FIRST
3316 as the current sequence, saving the previously current one. */
3319 push_to_sequence (first)
3326 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3332 /* Set up the outer-level insn chain
3333 as the current sequence, saving the previously current one. */
3336 push_topmost_sequence ()
3338 struct sequence_stack *stack, *top = NULL;
3342 for (stack = sequence_stack; stack; stack = stack->next)
3345 first_insn = top->first;
3346 last_insn = top->last;
3347 sequence_rtl_expr = top->sequence_rtl_expr;
3350 /* After emitting to the outer-level insn chain, update the outer-level
3351 insn chain, and restore the previous saved state. */
3354 pop_topmost_sequence ()
3356 struct sequence_stack *stack, *top = NULL;
3358 for (stack = sequence_stack; stack; stack = stack->next)
3361 top->first = first_insn;
3362 top->last = last_insn;
3363 /* ??? Why don't we save sequence_rtl_expr here? */
3368 /* After emitting to a sequence, restore previous saved state.
3370 To get the contents of the sequence just made,
3371 you must call `gen_sequence' *before* calling here. */
3376 struct sequence_stack *tem = sequence_stack;
3378 first_insn = tem->first;
3379 last_insn = tem->last;
3380 sequence_rtl_expr = tem->sequence_rtl_expr;
3381 sequence_stack = tem->next;
3383 tem->next = sequence_element_free_list;
3384 sequence_element_free_list = tem;
3387 /* Return 1 if currently emitting into a sequence. */
3392 return sequence_stack != 0;
3395 /* Generate a SEQUENCE rtx containing the insns already emitted
3396 to the current sequence.
3398 This is how the gen_... function from a DEFINE_EXPAND
3399 constructs the SEQUENCE that it returns. */
3409 /* Count the insns in the chain. */
3411 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3414 /* If only one insn, return its pattern rather than a SEQUENCE.
3415 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3416 the case of an empty list.) */
3418 && ! RTX_FRAME_RELATED_P (first_insn)
3419 && (GET_CODE (first_insn) == INSN
3420 || GET_CODE (first_insn) == JUMP_INSN
3421 /* Don't discard the call usage field. */
3422 || (GET_CODE (first_insn) == CALL_INSN
3423 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3425 NEXT_INSN (first_insn) = free_insn;
3426 free_insn = first_insn;
3427 return PATTERN (first_insn);
3430 /* Put them in a vector. See if we already have a SEQUENCE of the
3431 appropriate length around. */
3432 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3433 sequence_result[len] = 0;
3436 /* Ensure that this rtl goes in saveable_obstack, since we may
3438 push_obstacks_nochange ();
3439 rtl_in_saveable_obstack ();
3440 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3444 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3445 XVECEXP (result, 0, i) = tem;
3450 /* Put the various virtual registers into REGNO_REG_RTX. */
3453 init_virtual_regs ()
3455 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3456 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3457 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3458 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3459 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3462 /* Initialize data structures and variables in this file
3463 before generating rtl for each function. */
3472 sequence_rtl_expr = NULL;
3474 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3477 first_label_num = label_num;
3479 sequence_stack = NULL;
3481 /* Clear the start_sequence/gen_sequence cache. */
3482 sequence_element_free_list = 0;
3483 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3484 sequence_result[i] = 0;
3487 /* Init the tables that describe all the pseudo regs. */
3489 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3492 = (char *) savealloc (regno_pointer_flag_length);
3493 bzero (regno_pointer_flag, regno_pointer_flag_length);
3496 = (char *) savealloc (regno_pointer_flag_length);
3497 bzero (regno_pointer_align, regno_pointer_flag_length);
3500 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3501 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3503 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3504 init_virtual_regs ();
3506 /* Indicate that the virtual registers and stack locations are
3508 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3509 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3510 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3511 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3513 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3514 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3515 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3516 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3517 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3519 #ifdef STACK_BOUNDARY
3520 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3521 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3522 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3523 = STACK_BOUNDARY / BITS_PER_UNIT;
3524 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3526 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3527 = STACK_BOUNDARY / BITS_PER_UNIT;
3528 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3529 = STACK_BOUNDARY / BITS_PER_UNIT;
3530 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3531 = STACK_BOUNDARY / BITS_PER_UNIT;
3532 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3533 = STACK_BOUNDARY / BITS_PER_UNIT;
3534 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
3537 #ifdef INIT_EXPANDERS
3542 /* Create some permanent unique rtl objects shared between all functions.
3543 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3546 init_emit_once (line_numbers)
3550 enum machine_mode mode;
3551 enum machine_mode double_mode;
3553 no_line_numbers = ! line_numbers;
3555 sequence_stack = NULL;
3557 /* Compute the word and byte modes. */
3559 byte_mode = VOIDmode;
3560 word_mode = VOIDmode;
3561 double_mode = VOIDmode;
3563 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3564 mode = GET_MODE_WIDER_MODE (mode))
3566 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3567 && byte_mode == VOIDmode)
3570 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3571 && word_mode == VOIDmode)
3575 #ifndef DOUBLE_TYPE_SIZE
3576 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3579 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3580 mode = GET_MODE_WIDER_MODE (mode))
3582 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3583 && double_mode == VOIDmode)
3587 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3589 /* Create the unique rtx's for certain rtx codes and operand values. */
3591 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3593 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3594 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3595 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3598 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3599 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3600 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3602 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3604 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3605 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3606 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3607 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3609 for (i = 0; i <= 2; i++)
3611 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3612 mode = GET_MODE_WIDER_MODE (mode))
3614 rtx tem = rtx_alloc (CONST_DOUBLE);
3615 union real_extract u;
3617 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3618 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3620 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3621 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3622 PUT_MODE (tem, mode);
3624 const_tiny_rtx[i][(int) mode] = tem;
3627 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3629 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3630 mode = GET_MODE_WIDER_MODE (mode))
3631 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3633 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3635 mode = GET_MODE_WIDER_MODE (mode))
3636 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3639 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3640 mode = GET_MODE_WIDER_MODE (mode))
3641 const_tiny_rtx[0][(int) mode] = const0_rtx;
3644 /* Assign register numbers to the globally defined register rtx.
3645 This must be done at runtime because the register number field
3646 is in a union and some compilers can't initialize unions. */
3648 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3649 PUT_MODE (stack_pointer_rtx, Pmode);
3650 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3651 PUT_MODE (frame_pointer_rtx, Pmode);
3652 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3653 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3654 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3656 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3657 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3658 PUT_MODE (arg_pointer_rtx, Pmode);
3661 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3662 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3663 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3664 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3665 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3666 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3667 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3668 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3669 REGNO (virtual_cfa_rtx) = VIRTUAL_CFA_REGNUM;
3670 PUT_MODE (virtual_cfa_rtx, Pmode);
3672 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3673 return_address_pointer_rtx
3674 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3678 struct_value_rtx = STRUCT_VALUE;
3680 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3683 #ifdef STRUCT_VALUE_INCOMING
3684 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3686 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3687 struct_value_incoming_rtx
3688 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3690 struct_value_incoming_rtx = struct_value_rtx;
3694 #ifdef STATIC_CHAIN_REGNUM
3695 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3697 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3698 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3699 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3702 static_chain_incoming_rtx = static_chain_rtx;
3706 static_chain_rtx = STATIC_CHAIN;
3708 #ifdef STATIC_CHAIN_INCOMING
3709 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3711 static_chain_incoming_rtx = static_chain_rtx;
3715 #ifdef PIC_OFFSET_TABLE_REGNUM
3716 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3719 #ifdef INIT_EXPANDERS
3720 /* This is to initialize save_machine_status and restore_machine_status before
3721 the first call to push_function_context_to. This is needed by the Chill
3722 front end which calls push_function_context_to before the first cal to
3723 init_function_start. */
3728 /* Query and clear/ restore no_line_numbers. This is used by the
3729 switch / case handling in stmt.c to give proper line numbers in
3730 warnings about unreachable code. */
3733 force_line_numbers ()
3735 int old = no_line_numbers;
3737 no_line_numbers = 0;
3739 force_next_line_note ();
3744 restore_line_number_status (old_value)
3747 no_line_numbers = old_value;