1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
46 #include "hard-reg-set.h"
47 #include "insn-config.h"
53 /* Commonly used modes. */
55 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
56 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
57 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
58 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
60 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
61 After rtl generation, it is 1 plus the largest register number used. */
63 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
65 /* This is *not* reset after each function. It gives each CODE_LABEL
66 in the entire compilation a unique label number. */
68 static int label_num = 1;
70 /* Lowest label number in current function. */
72 static int first_label_num;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these except perhaps the floating-point CONST_DOUBLEs
92 are unique; no other rtx-object will be equal to any of these. */
94 /* Avoid warnings by initializing the `fld' field. Since its a union,
95 bypass problems with KNR compilers by only doing so when __GNUC__. */
102 struct _global_rtl global_rtl =
104 {PC, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* pc_rtx */
105 {CC0, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* cc0_rtx */
106 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* stack_pointer_rtx */
107 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* frame_pointer_rtx */
108 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* hard_frame_pointer_rtx */
109 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* arg_pointer_rtx */
110 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_incoming_args_rtx */
111 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_vars_rtx */
112 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_dynamic_rtx */
113 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_outgoing_args_rtx */
114 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_cfa_rtx */
117 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
118 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
119 record a copy of const[012]_rtx. */
121 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
125 REAL_VALUE_TYPE dconst0;
126 REAL_VALUE_TYPE dconst1;
127 REAL_VALUE_TYPE dconst2;
128 REAL_VALUE_TYPE dconstm1;
130 /* All references to the following fixed hard registers go through
131 these unique rtl objects. On machines where the frame-pointer and
132 arg-pointer are the same register, they use the same unique object.
134 After register allocation, other rtl objects which used to be pseudo-regs
135 may be clobbered to refer to the frame-pointer register.
136 But references that were originally to the frame-pointer can be
137 distinguished from the others because they contain frame_pointer_rtx.
139 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
140 tricky: until register elimination has taken place hard_frame_pointer_rtx
141 should be used if it is being set, and frame_pointer_rtx otherwise. After
142 register elimination hard_frame_pointer_rtx should always be used.
143 On machines where the two registers are same (most) then these are the
146 In an inline procedure, the stack and frame pointer rtxs may not be
147 used for anything else. */
148 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
149 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
150 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
151 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
152 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
154 /* This is used to implement __builtin_return_address for some machines.
155 See for instance the MIPS port. */
156 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
158 /* We make one copy of (const_int C) where C is in
159 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
160 to save space during the compilation and simplify comparisons of
163 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
165 /* The ends of the doubly-linked chain of rtl for the current function.
166 Both are reset to null at the start of rtl generation for the function.
168 start_sequence saves both of these on `sequence_stack' along with
169 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
171 static rtx first_insn = NULL;
172 static rtx last_insn = NULL;
174 /* RTL_EXPR within which the current sequence will be placed. Use to
175 prevent reuse of any temporaries within the sequence until after the
176 RTL_EXPR is emitted. */
178 tree sequence_rtl_expr = NULL;
180 /* INSN_UID for next insn emitted.
181 Reset to 1 for each function compiled. */
183 static int cur_insn_uid = 1;
185 /* Line number and source file of the last line-number NOTE emitted.
186 This is used to avoid generating duplicates. */
188 static int last_linenum = 0;
189 static char *last_filename = 0;
191 /* A vector indexed by pseudo reg number. The allocated length
192 of this vector is regno_pointer_flag_length. Since this
193 vector is needed during the expansion phase when the total
194 number of registers in the function is not yet known,
195 it is copied and made bigger when necessary. */
197 char *regno_pointer_flag;
198 int regno_pointer_flag_length;
200 /* Indexed by pseudo register number, if nonzero gives the known alignment
201 for that pseudo (if regno_pointer_flag is set).
202 Allocated in parallel with regno_pointer_flag. */
203 char *regno_pointer_align;
205 /* Indexed by pseudo register number, gives the rtx for that pseudo.
206 Allocated in parallel with regno_pointer_flag. */
210 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
211 Each element describes one pending sequence.
212 The main insn-chain is saved in the last element of the chain,
213 unless the chain is empty. */
215 struct sequence_stack *sequence_stack;
217 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
218 shortly thrown away. We use two mechanisms to prevent this waste:
220 First, we keep a list of the expressions used to represent the sequence
221 stack in sequence_element_free_list.
223 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
224 rtvec for use by gen_sequence. One entry for each size is sufficient
225 because most cases are calls to gen_sequence followed by immediately
226 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
227 destructive on the insn in it anyway and hence can't be redone.
229 We do not bother to save this cached data over nested function calls.
230 Instead, we just reinitialize them. */
232 #define SEQUENCE_RESULT_SIZE 5
234 static struct sequence_stack *sequence_element_free_list;
235 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
237 /* During RTL generation, we also keep a list of free INSN rtl codes. */
238 static rtx free_insn;
240 extern int rtx_equal_function_value_matters;
242 /* Filename and line number of last line-number note,
243 whether we actually emitted it or not. */
244 extern char *emit_filename;
245 extern int emit_lineno;
247 static rtx make_jump_insn_raw PROTO((rtx));
248 static rtx make_call_insn_raw PROTO((rtx));
249 static rtx find_line_note PROTO((rtx));
252 gen_rtx_CONST_INT (mode, arg)
253 enum machine_mode mode;
256 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
257 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx && arg == STORE_FLAG_VALUE)
261 return const_true_rtx;
264 return gen_rtx_raw_CONST_INT (mode, arg);
268 gen_rtx_REG (mode, regno)
269 enum machine_mode mode;
272 /* In case the MD file explicitly references the frame pointer, have
273 all such references point to the same frame pointer. This is
274 used during frame pointer elimination to distinguish the explicit
275 references to these registers from pseudos that happened to be
278 If we have eliminated the frame pointer or arg pointer, we will
279 be using it as a normal register, for example as a spill
280 register. In such cases, we might be accessing it in a mode that
281 is not Pmode and therefore cannot use the pre-allocated rtx.
283 Also don't do this when we are making new REGs in reload, since
284 we don't want to get confused with the real pointers. */
286 if (mode == Pmode && !reload_in_progress)
288 if (regno == FRAME_POINTER_REGNUM)
289 return frame_pointer_rtx;
290 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
291 if (regno == HARD_FRAME_POINTER_REGNUM)
292 return hard_frame_pointer_rtx;
294 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
295 if (regno == ARG_POINTER_REGNUM)
296 return arg_pointer_rtx;
298 #ifdef RETURN_ADDRESS_POINTER_REGNUM
299 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
300 return return_address_pointer_rtx;
302 if (regno == STACK_POINTER_REGNUM)
303 return stack_pointer_rtx;
306 return gen_rtx_raw_REG (mode, regno);
310 gen_rtx_MEM (mode, addr)
311 enum machine_mode mode;
314 rtx rt = gen_rtx_raw_MEM (mode, addr);
316 /* This field is not cleared by the mere allocation of the rtx, so
318 MEM_ALIAS_SET (rt) = 0;
323 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
325 ** This routine generates an RTX of the size specified by
326 ** <code>, which is an RTX code. The RTX structure is initialized
327 ** from the arguments <element1> through <elementn>, which are
328 ** interpreted according to the specific RTX type's format. The
329 ** special machine mode associated with the rtx (if any) is specified
332 ** gen_rtx can be invoked in a way which resembles the lisp-like
333 ** rtx it will generate. For example, the following rtx structure:
335 ** (plus:QI (mem:QI (reg:SI 1))
336 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
338 ** ...would be generated by the following C code:
340 ** gen_rtx (PLUS, QImode,
341 ** gen_rtx (MEM, QImode,
342 ** gen_rtx (REG, SImode, 1)),
343 ** gen_rtx (MEM, QImode,
344 ** gen_rtx (PLUS, SImode,
345 ** gen_rtx (REG, SImode, 2),
346 ** gen_rtx (REG, SImode, 3)))),
351 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
355 enum machine_mode mode;
358 register int i; /* Array indices... */
359 register char *fmt; /* Current rtx's format... */
360 register rtx rt_val; /* RTX to return to caller... */
365 code = va_arg (p, enum rtx_code);
366 mode = va_arg (p, enum machine_mode);
369 if (code == CONST_INT)
370 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
371 else if (code == REG)
372 rt_val = gen_rtx_REG (mode, va_arg (p, int));
373 else if (code == MEM)
374 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
377 rt_val = rtx_alloc (code); /* Allocate the storage space. */
378 rt_val->mode = mode; /* Store the machine mode... */
380 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
381 for (i = 0; i < GET_RTX_LENGTH (code); i++)
385 case '0': /* Unused field. */
388 case 'i': /* An integer? */
389 XINT (rt_val, i) = va_arg (p, int);
392 case 'w': /* A wide integer? */
393 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
396 case 's': /* A string? */
397 XSTR (rt_val, i) = va_arg (p, char *);
400 case 'e': /* An expression? */
401 case 'u': /* An insn? Same except when printing. */
402 XEXP (rt_val, i) = va_arg (p, rtx);
405 case 'E': /* An RTX vector? */
406 XVEC (rt_val, i) = va_arg (p, rtvec);
409 case 'b': /* A bitmap? */
410 XBITMAP (rt_val, i) = va_arg (p, bitmap);
413 case 't': /* A tree? */
414 XTREE (rt_val, i) = va_arg (p, tree);
423 return rt_val; /* Return the new RTX... */
426 /* gen_rtvec (n, [rt1, ..., rtn])
428 ** This routine creates an rtvec and stores within it the
429 ** pointers to rtx's which are its arguments.
434 gen_rtvec VPROTO((int n, ...))
450 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
452 vector = (rtx *) alloca (n * sizeof (rtx));
454 for (i = 0; i < n; i++)
455 vector[i] = va_arg (p, rtx);
458 return gen_rtvec_v (n, vector);
462 gen_rtvec_v (n, argp)
467 register rtvec rt_val;
470 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
472 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
474 for (i = 0; i < n; i++)
475 rt_val->elem[i].rtx = *argp++;
481 gen_rtvec_vv (n, argp)
486 register rtvec rt_val;
489 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
491 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
493 for (i = 0; i < n; i++)
494 rt_val->elem[i].rtx = (argp++)->rtx;
499 /* Generate a REG rtx for a new pseudo register of mode MODE.
500 This pseudo is assigned the next sequential register number. */
504 enum machine_mode mode;
508 /* Don't let anything called by or after reload create new registers
509 (actually, registers can't be created after flow, but this is a good
512 if (reload_in_progress || reload_completed)
515 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
516 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
518 /* For complex modes, don't make a single pseudo.
519 Instead, make a CONCAT of two pseudos.
520 This allows noncontiguous allocation of the real and imaginary parts,
521 which makes much better code. Besides, allocating DCmode
522 pseudos overstrains reload on some machines like the 386. */
523 rtx realpart, imagpart;
524 int size = GET_MODE_UNIT_SIZE (mode);
525 enum machine_mode partmode
526 = mode_for_size (size * BITS_PER_UNIT,
527 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
528 ? MODE_FLOAT : MODE_INT),
531 realpart = gen_reg_rtx (partmode);
532 imagpart = gen_reg_rtx (partmode);
533 return gen_rtx_CONCAT (mode, realpart, imagpart);
536 /* Make sure regno_pointer_flag and regno_reg_rtx are large
537 enough to have an element for this pseudo reg number. */
539 if (reg_rtx_no == regno_pointer_flag_length)
543 (char *) savealloc (regno_pointer_flag_length * 2);
544 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
545 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
546 regno_pointer_flag = new;
548 new = (char *) savealloc (regno_pointer_flag_length * 2);
549 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
550 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
551 regno_pointer_align = new;
553 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
554 bcopy ((char *) regno_reg_rtx, (char *) new1,
555 regno_pointer_flag_length * sizeof (rtx));
556 bzero ((char *) &new1[regno_pointer_flag_length],
557 regno_pointer_flag_length * sizeof (rtx));
558 regno_reg_rtx = new1;
560 regno_pointer_flag_length *= 2;
563 val = gen_rtx_raw_REG (mode, reg_rtx_no);
564 regno_reg_rtx[reg_rtx_no++] = val;
568 /* Identify REG (which may be a CONCAT) as a user register. */
574 if (GET_CODE (reg) == CONCAT)
576 REG_USERVAR_P (XEXP (reg, 0)) = 1;
577 REG_USERVAR_P (XEXP (reg, 1)) = 1;
579 else if (GET_CODE (reg) == REG)
580 REG_USERVAR_P (reg) = 1;
585 /* Identify REG as a probable pointer register and show its alignment
586 as ALIGN, if nonzero. */
589 mark_reg_pointer (reg, align)
593 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
596 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
599 /* Return 1 plus largest pseudo reg number used in the current function. */
607 /* Return 1 + the largest label number used so far in the current function. */
612 if (last_label_num && label_num == base_label_num)
613 return last_label_num;
617 /* Return first label number used in this function (if any were used). */
620 get_first_label_num ()
622 return first_label_num;
625 /* Return a value representing some low-order bits of X, where the number
626 of low-order bits is given by MODE. Note that no conversion is done
627 between floating-point and fixed-point values, rather, the bit
628 representation is returned.
630 This function handles the cases in common between gen_lowpart, below,
631 and two variants in cse.c and combine.c. These are the cases that can
632 be safely handled at all points in the compilation.
634 If this is not a case we can handle, return 0. */
637 gen_lowpart_common (mode, x)
638 enum machine_mode mode;
643 if (GET_MODE (x) == mode)
646 /* MODE must occupy no more words than the mode of X. */
647 if (GET_MODE (x) != VOIDmode
648 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
649 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
653 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
654 word = ((GET_MODE_SIZE (GET_MODE (x))
655 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
658 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
659 && (GET_MODE_CLASS (mode) == MODE_INT
660 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
662 /* If we are getting the low-order part of something that has been
663 sign- or zero-extended, we can either just use the object being
664 extended or make a narrower extension. If we want an even smaller
665 piece than the size of the object being extended, call ourselves
668 This case is used mostly by combine and cse. */
670 if (GET_MODE (XEXP (x, 0)) == mode)
672 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
673 return gen_lowpart_common (mode, XEXP (x, 0));
674 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
675 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
677 else if (GET_CODE (x) == SUBREG
678 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
679 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
680 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
682 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
683 else if (GET_CODE (x) == REG)
685 /* Let the backend decide how many registers to skip. This is needed
686 in particular for Sparc64 where fp regs are smaller than a word. */
687 /* ??? Note that subregs are now ambiguous, in that those against
688 pseudos are sized by the Word Size, while those against hard
689 regs are sized by the underlying register size. Better would be
690 to always interpret the subreg offset parameter as bytes or bits. */
692 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
693 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
694 - HARD_REGNO_NREGS (REGNO (x), mode));
696 /* If the register is not valid for MODE, return 0. If we don't
697 do this, there is no way to fix up the resulting REG later.
698 But we do do this if the current REG is not valid for its
699 mode. This latter is a kludge, but is required due to the
700 way that parameters are passed on some machines, most
702 if (REGNO (x) < FIRST_PSEUDO_REGISTER
703 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
704 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
706 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
707 /* integrate.c can't handle parts of a return value register. */
708 && (! REG_FUNCTION_VALUE_P (x)
709 || ! rtx_equal_function_value_matters)
710 #ifdef CLASS_CANNOT_CHANGE_SIZE
711 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
712 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
713 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
714 && (TEST_HARD_REG_BIT
715 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
718 /* We want to keep the stack, frame, and arg pointers
720 && x != frame_pointer_rtx
721 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
722 && x != arg_pointer_rtx
724 && x != stack_pointer_rtx)
725 return gen_rtx_REG (mode, REGNO (x) + word);
727 return gen_rtx_SUBREG (mode, x, word);
729 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
730 from the low-order part of the constant. */
731 else if ((GET_MODE_CLASS (mode) == MODE_INT
732 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
733 && GET_MODE (x) == VOIDmode
734 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
736 /* If MODE is twice the host word size, X is already the desired
737 representation. Otherwise, if MODE is wider than a word, we can't
738 do this. If MODE is exactly a word, return just one CONST_INT.
739 If MODE is smaller than a word, clear the bits that don't belong
740 in our mode, unless they and our sign bit are all one. So we get
741 either a reasonable negative value or a reasonable unsigned value
744 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
746 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
748 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
749 return (GET_CODE (x) == CONST_INT ? x
750 : GEN_INT (CONST_DOUBLE_LOW (x)));
753 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
754 int width = GET_MODE_BITSIZE (mode);
755 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
756 : CONST_DOUBLE_LOW (x));
758 /* Sign extend to HOST_WIDE_INT. */
759 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
761 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
766 /* If X is an integral constant but we want it in floating-point, it
767 must be the case that we have a union of an integer and a floating-point
768 value. If the machine-parameters allow it, simulate that union here
769 and return the result. The two-word and single-word cases are
772 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
773 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
774 || flag_pretend_float)
775 && GET_MODE_CLASS (mode) == MODE_FLOAT
776 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
777 && GET_CODE (x) == CONST_INT
778 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
779 #ifdef REAL_ARITHMETIC
785 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
786 /* Avoid changing the bit pattern of a NaN. */
787 if (REAL_VALUE_ISNAN (r))
789 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
793 union {HOST_WIDE_INT i; float d; } u;
796 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
799 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
800 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
801 || flag_pretend_float)
802 && GET_MODE_CLASS (mode) == MODE_FLOAT
803 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
804 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
805 && GET_MODE (x) == VOIDmode
806 && (sizeof (double) * HOST_BITS_PER_CHAR
807 == 2 * HOST_BITS_PER_WIDE_INT))
808 #ifdef REAL_ARITHMETIC
812 HOST_WIDE_INT low, high;
814 if (GET_CODE (x) == CONST_INT)
815 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
817 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
819 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
821 if (WORDS_BIG_ENDIAN)
822 i[0] = high, i[1] = low;
824 i[0] = low, i[1] = high;
826 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
827 if (REAL_VALUE_ISNAN (r))
829 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
833 union {HOST_WIDE_INT i[2]; double d; } u;
834 HOST_WIDE_INT low, high;
836 if (GET_CODE (x) == CONST_INT)
837 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
839 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
841 #ifdef HOST_WORDS_BIG_ENDIAN
842 u.i[0] = high, u.i[1] = low;
844 u.i[0] = low, u.i[1] = high;
847 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
851 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
852 same as sizeof (double) or when sizeof (float) is larger than the
853 size of a word on the target machine. */
854 #ifdef REAL_ARITHMETIC
855 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
861 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
862 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
866 /* Similarly, if this is converting a floating-point value into a
867 single-word integer. Only do this is the host and target parameters are
870 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
871 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
872 || flag_pretend_float)
873 && (GET_MODE_CLASS (mode) == MODE_INT
874 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
875 && GET_CODE (x) == CONST_DOUBLE
876 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
877 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
878 return operand_subword (x, word, 0, GET_MODE (x));
880 /* Similarly, if this is converting a floating-point value into a
881 two-word integer, we can do this one word at a time and make an
882 integer. Only do this is the host and target parameters are
885 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
886 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
887 || flag_pretend_float)
888 && (GET_MODE_CLASS (mode) == MODE_INT
889 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
890 && GET_CODE (x) == CONST_DOUBLE
891 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
892 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
895 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
897 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
899 if (lowpart && GET_CODE (lowpart) == CONST_INT
900 && highpart && GET_CODE (highpart) == CONST_INT)
901 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
904 /* Otherwise, we can't do this. */
908 /* Return the real part (which has mode MODE) of a complex value X.
909 This always comes at the low address in memory. */
912 gen_realpart (mode, x)
913 enum machine_mode mode;
916 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
918 else if (WORDS_BIG_ENDIAN)
919 return gen_highpart (mode, x);
921 return gen_lowpart (mode, x);
924 /* Return the imaginary part (which has mode MODE) of a complex value X.
925 This always comes at the high address in memory. */
928 gen_imagpart (mode, x)
929 enum machine_mode mode;
932 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
934 else if (WORDS_BIG_ENDIAN)
935 return gen_lowpart (mode, x);
937 return gen_highpart (mode, x);
940 /* Return 1 iff X, assumed to be a SUBREG,
941 refers to the real part of the complex value in its containing reg.
942 Complex values are always stored with the real part in the first word,
943 regardless of WORDS_BIG_ENDIAN. */
946 subreg_realpart_p (x)
949 if (GET_CODE (x) != SUBREG)
952 return SUBREG_WORD (x) == 0;
955 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
956 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
957 least-significant part of X.
958 MODE specifies how big a part of X to return;
959 it usually should not be larger than a word.
960 If X is a MEM whose address is a QUEUED, the value may be so also. */
963 gen_lowpart (mode, x)
964 enum machine_mode mode;
967 rtx result = gen_lowpart_common (mode, x);
971 else if (GET_CODE (x) == REG)
973 /* Must be a hard reg that's not valid in MODE. */
974 result = gen_lowpart_common (mode, copy_to_reg (x));
979 else if (GET_CODE (x) == MEM)
981 /* The only additional case we can do is MEM. */
982 register int offset = 0;
983 if (WORDS_BIG_ENDIAN)
984 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
985 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
987 if (BYTES_BIG_ENDIAN)
988 /* Adjust the address so that the address-after-the-data
990 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
991 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
993 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
995 else if (GET_CODE (x) == ADDRESSOF)
996 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1001 /* Like `gen_lowpart', but refer to the most significant part.
1002 This is used to access the imaginary part of a complex number. */
1005 gen_highpart (mode, x)
1006 enum machine_mode mode;
1009 /* This case loses if X is a subreg. To catch bugs early,
1010 complain if an invalid MODE is used even in other cases. */
1011 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1012 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1014 if (GET_CODE (x) == CONST_DOUBLE
1015 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1016 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1019 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1020 else if (GET_CODE (x) == CONST_INT)
1022 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1024 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1026 else if (GET_CODE (x) == MEM)
1028 register int offset = 0;
1029 if (! WORDS_BIG_ENDIAN)
1030 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1031 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1033 if (! BYTES_BIG_ENDIAN
1034 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1035 offset -= (GET_MODE_SIZE (mode)
1036 - MIN (UNITS_PER_WORD,
1037 GET_MODE_SIZE (GET_MODE (x))));
1039 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1041 else if (GET_CODE (x) == SUBREG)
1043 /* The only time this should occur is when we are looking at a
1044 multi-word item with a SUBREG whose mode is the same as that of the
1045 item. It isn't clear what we would do if it wasn't. */
1046 if (SUBREG_WORD (x) != 0)
1048 return gen_highpart (mode, SUBREG_REG (x));
1050 else if (GET_CODE (x) == REG)
1054 /* Let the backend decide how many registers to skip. This is needed
1055 in particular for sparc64 where fp regs are smaller than a word. */
1056 /* ??? Note that subregs are now ambiguous, in that those against
1057 pseudos are sized by the word size, while those against hard
1058 regs are sized by the underlying register size. Better would be
1059 to always interpret the subreg offset parameter as bytes or bits. */
1061 if (WORDS_BIG_ENDIAN)
1063 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1064 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1065 - HARD_REGNO_NREGS (REGNO (x), mode));
1067 word = ((GET_MODE_SIZE (GET_MODE (x))
1068 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1071 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1072 /* integrate.c can't handle parts of a return value register. */
1073 && (! REG_FUNCTION_VALUE_P (x)
1074 || ! rtx_equal_function_value_matters)
1075 /* We want to keep the stack, frame, and arg pointers special. */
1076 && x != frame_pointer_rtx
1077 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1078 && x != arg_pointer_rtx
1080 && x != stack_pointer_rtx)
1081 return gen_rtx_REG (mode, REGNO (x) + word);
1083 return gen_rtx_SUBREG (mode, x, word);
1089 /* Return 1 iff X, assumed to be a SUBREG,
1090 refers to the least significant part of its containing reg.
1091 If X is not a SUBREG, always return 1 (it is its own low part!). */
1094 subreg_lowpart_p (x)
1097 if (GET_CODE (x) != SUBREG)
1099 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1102 if (WORDS_BIG_ENDIAN
1103 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1104 return (SUBREG_WORD (x)
1105 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1106 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1109 return SUBREG_WORD (x) == 0;
1112 /* Return subword I of operand OP.
1113 The word number, I, is interpreted as the word number starting at the
1114 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1115 otherwise it is the high-order word.
1117 If we cannot extract the required word, we return zero. Otherwise, an
1118 rtx corresponding to the requested word will be returned.
1120 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1121 reload has completed, a valid address will always be returned. After
1122 reload, if a valid address cannot be returned, we return zero.
1124 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1125 it is the responsibility of the caller.
1127 MODE is the mode of OP in case it is a CONST_INT. */
1130 operand_subword (op, i, validate_address, mode)
1133 int validate_address;
1134 enum machine_mode mode;
1137 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1138 int bits_per_word = BITS_PER_WORD;
1140 if (mode == VOIDmode)
1141 mode = GET_MODE (op);
1143 if (mode == VOIDmode)
1146 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1148 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1149 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1152 /* If OP is already an integer word, return it. */
1153 if (GET_MODE_CLASS (mode) == MODE_INT
1154 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1157 /* If OP is a REG or SUBREG, we can handle it very simply. */
1158 if (GET_CODE (op) == REG)
1160 /* If the register is not valid for MODE, return 0. If we don't
1161 do this, there is no way to fix up the resulting REG later. */
1162 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1163 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1165 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1166 || (REG_FUNCTION_VALUE_P (op)
1167 && rtx_equal_function_value_matters)
1168 /* We want to keep the stack, frame, and arg pointers
1170 || op == frame_pointer_rtx
1171 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1172 || op == arg_pointer_rtx
1174 || op == stack_pointer_rtx)
1175 return gen_rtx_SUBREG (word_mode, op, i);
1177 return gen_rtx_REG (word_mode, REGNO (op) + i);
1179 else if (GET_CODE (op) == SUBREG)
1180 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1181 else if (GET_CODE (op) == CONCAT)
1183 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1185 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1186 return operand_subword (XEXP (op, 1), i - partwords,
1187 validate_address, mode);
1190 /* Form a new MEM at the requested address. */
1191 if (GET_CODE (op) == MEM)
1193 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1196 if (validate_address)
1198 if (reload_completed)
1200 if (! strict_memory_address_p (word_mode, addr))
1204 addr = memory_address (word_mode, addr);
1207 new = gen_rtx_MEM (word_mode, addr);
1209 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1210 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1211 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1216 /* The only remaining cases are when OP is a constant. If the host and
1217 target floating formats are the same, handling two-word floating
1218 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1219 are defined as returning one or two 32 bit values, respectively,
1220 and not values of BITS_PER_WORD bits. */
1221 #ifdef REAL_ARITHMETIC
1222 /* The output is some bits, the width of the target machine's word.
1223 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1225 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1226 && GET_MODE_CLASS (mode) == MODE_FLOAT
1227 && GET_MODE_BITSIZE (mode) == 64
1228 && GET_CODE (op) == CONST_DOUBLE)
1233 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1234 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1236 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1237 which the words are written depends on the word endianness.
1239 ??? This is a potential portability problem and should
1240 be fixed at some point. */
1241 if (BITS_PER_WORD == 32)
1242 return GEN_INT ((HOST_WIDE_INT) k[i]);
1243 #if HOST_BITS_PER_WIDE_INT > 32
1244 else if (BITS_PER_WORD >= 64 && i == 0)
1245 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1246 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1248 else if (BITS_PER_WORD == 16)
1252 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1255 return GEN_INT ((HOST_WIDE_INT) value);
1260 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1261 && GET_MODE_CLASS (mode) == MODE_FLOAT
1262 && GET_MODE_BITSIZE (mode) > 64
1263 && GET_CODE (op) == CONST_DOUBLE)
1268 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1269 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1271 if (BITS_PER_WORD == 32)
1272 return GEN_INT ((HOST_WIDE_INT) k[i]);
1274 #else /* no REAL_ARITHMETIC */
1275 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1276 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1277 || flag_pretend_float)
1278 && GET_MODE_CLASS (mode) == MODE_FLOAT
1279 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1280 && GET_CODE (op) == CONST_DOUBLE)
1282 /* The constant is stored in the host's word-ordering,
1283 but we want to access it in the target's word-ordering. Some
1284 compilers don't like a conditional inside macro args, so we have two
1285 copies of the return. */
1286 #ifdef HOST_WORDS_BIG_ENDIAN
1287 return GEN_INT (i == WORDS_BIG_ENDIAN
1288 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1290 return GEN_INT (i != WORDS_BIG_ENDIAN
1291 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1294 #endif /* no REAL_ARITHMETIC */
1296 /* Single word float is a little harder, since single- and double-word
1297 values often do not have the same high-order bits. We have already
1298 verified that we want the only defined word of the single-word value. */
1299 #ifdef REAL_ARITHMETIC
1300 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1301 && GET_MODE_BITSIZE (mode) == 32
1302 && GET_CODE (op) == CONST_DOUBLE)
1307 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1308 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1310 if (BITS_PER_WORD == 16)
1312 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1316 return GEN_INT ((HOST_WIDE_INT) l);
1319 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1320 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1321 || flag_pretend_float)
1322 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1323 && GET_MODE_CLASS (mode) == MODE_FLOAT
1324 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1325 && GET_CODE (op) == CONST_DOUBLE)
1328 union {float f; HOST_WIDE_INT i; } u;
1330 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1333 return GEN_INT (u.i);
1335 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1336 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1337 || flag_pretend_float)
1338 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1339 && GET_MODE_CLASS (mode) == MODE_FLOAT
1340 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1341 && GET_CODE (op) == CONST_DOUBLE)
1344 union {double d; HOST_WIDE_INT i; } u;
1346 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1349 return GEN_INT (u.i);
1351 #endif /* no REAL_ARITHMETIC */
1353 /* The only remaining cases that we can handle are integers.
1354 Convert to proper endianness now since these cases need it.
1355 At this point, i == 0 means the low-order word.
1357 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1358 in general. However, if OP is (const_int 0), we can just return
1361 if (op == const0_rtx)
1364 if (GET_MODE_CLASS (mode) != MODE_INT
1365 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1366 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1369 if (WORDS_BIG_ENDIAN)
1370 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1372 /* Find out which word on the host machine this value is in and get
1373 it from the constant. */
1374 val = (i / size_ratio == 0
1375 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1376 : (GET_CODE (op) == CONST_INT
1377 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1379 /* Get the value we want into the low bits of val. */
1380 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1381 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1383 /* Clear the bits that don't belong in our mode, unless they and our sign
1384 bit are all one. So we get either a reasonable negative value or a
1385 reasonable unsigned value for this mode. */
1386 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1387 && ((val & ((HOST_WIDE_INT) (-1) << (bits_per_word - 1)))
1388 != ((HOST_WIDE_INT) (-1) << (bits_per_word - 1))))
1389 val &= ((HOST_WIDE_INT) 1 << bits_per_word) - 1;
1391 /* If this would be an entire word for the target, but is not for
1392 the host, then sign-extend on the host so that the number will look
1393 the same way on the host that it would on the target.
1395 For example, when building a 64 bit alpha hosted 32 bit sparc
1396 targeted compiler, then we want the 32 bit unsigned value -1 to be
1397 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1398 The later confuses the sparc backend. */
1400 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1401 && (val & ((HOST_WIDE_INT) 1 << (bits_per_word - 1))))
1402 val |= ((HOST_WIDE_INT) (-1) << bits_per_word);
1404 return GEN_INT (val);
1407 /* Similar to `operand_subword', but never return 0. If we can't extract
1408 the required subword, put OP into a register and try again. If that fails,
1409 abort. We always validate the address in this case. It is not valid
1410 to call this function after reload; it is mostly meant for RTL
1413 MODE is the mode of OP, in case it is CONST_INT. */
1416 operand_subword_force (op, i, mode)
1419 enum machine_mode mode;
1421 rtx result = operand_subword (op, i, 1, mode);
1426 if (mode != BLKmode && mode != VOIDmode)
1428 /* If this is a register which can not be accessed by words, copy it
1429 to a pseudo register. */
1430 if (GET_CODE (op) == REG)
1431 op = copy_to_reg (op);
1433 op = force_reg (mode, op);
1436 result = operand_subword (op, i, 1, mode);
1443 /* Given a compare instruction, swap the operands.
1444 A test instruction is changed into a compare of 0 against the operand. */
1447 reverse_comparison (insn)
1450 rtx body = PATTERN (insn);
1453 if (GET_CODE (body) == SET)
1454 comp = SET_SRC (body);
1456 comp = SET_SRC (XVECEXP (body, 0, 0));
1458 if (GET_CODE (comp) == COMPARE)
1460 rtx op0 = XEXP (comp, 0);
1461 rtx op1 = XEXP (comp, 1);
1462 XEXP (comp, 0) = op1;
1463 XEXP (comp, 1) = op0;
1467 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1468 if (GET_CODE (body) == SET)
1469 SET_SRC (body) = new;
1471 SET_SRC (XVECEXP (body, 0, 0)) = new;
1475 /* Return a memory reference like MEMREF, but with its mode changed
1476 to MODE and its address changed to ADDR.
1477 (VOIDmode means don't change the mode.
1478 NULL for ADDR means don't change the address.) */
1481 change_address (memref, mode, addr)
1483 enum machine_mode mode;
1488 if (GET_CODE (memref) != MEM)
1490 if (mode == VOIDmode)
1491 mode = GET_MODE (memref);
1493 addr = XEXP (memref, 0);
1495 /* If reload is in progress or has completed, ADDR must be valid.
1496 Otherwise, we can call memory_address to make it valid. */
1497 if (reload_completed || reload_in_progress)
1499 if (! memory_address_p (mode, addr))
1503 addr = memory_address (mode, addr);
1505 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1508 new = gen_rtx_MEM (mode, addr);
1509 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1510 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1511 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1515 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1522 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1523 NULL_RTX, label_num++, NULL_PTR);
1525 LABEL_NUSES (label) = 0;
1529 /* For procedure integration. */
1531 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1532 from a permanent obstack when the opportunity arises. */
1535 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1536 last_labelno, max_parm_regnum, max_regnum, args_size,
1537 pops_args, stack_slots, forced_labels, function_flags,
1538 outgoing_args_size, original_arg_vector,
1539 original_decl_initial, regno_rtx, regno_flag,
1540 regno_align, parm_reg_stack_loc)
1541 rtx first_insn, first_parm_insn;
1542 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1547 int outgoing_args_size;
1548 rtvec original_arg_vector;
1549 rtx original_decl_initial;
1553 rtvec parm_reg_stack_loc;
1555 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1556 cur_insn_uid++, NULL_RTX,
1557 first_insn, first_parm_insn,
1558 first_labelno, last_labelno,
1559 max_parm_regnum, max_regnum, args_size,
1560 pops_args, stack_slots, forced_labels,
1561 function_flags, outgoing_args_size,
1562 original_arg_vector,
1563 original_decl_initial,
1564 regno_rtx, regno_flag, regno_align,
1565 parm_reg_stack_loc);
1569 /* Install new pointers to the first and last insns in the chain.
1570 Also, set cur_insn_uid to one higher than the last in use.
1571 Used for an inline-procedure after copying the insn chain. */
1574 set_new_first_and_last_insn (first, last)
1583 for (insn = first; insn; insn = NEXT_INSN (insn))
1584 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1589 /* Set the range of label numbers found in the current function.
1590 This is used when belatedly compiling an inline function. */
1593 set_new_first_and_last_label_num (first, last)
1596 base_label_num = label_num;
1597 first_label_num = first;
1598 last_label_num = last;
1601 /* Save all variables describing the current status into the structure *P.
1602 This is used before starting a nested function. */
1605 save_emit_status (p)
1608 p->reg_rtx_no = reg_rtx_no;
1609 p->first_label_num = first_label_num;
1610 p->first_insn = first_insn;
1611 p->last_insn = last_insn;
1612 p->sequence_rtl_expr = sequence_rtl_expr;
1613 p->sequence_stack = sequence_stack;
1614 p->cur_insn_uid = cur_insn_uid;
1615 p->last_linenum = last_linenum;
1616 p->last_filename = last_filename;
1617 p->regno_pointer_flag = regno_pointer_flag;
1618 p->regno_pointer_align = regno_pointer_align;
1619 p->regno_pointer_flag_length = regno_pointer_flag_length;
1620 p->regno_reg_rtx = regno_reg_rtx;
1623 /* Restore all variables describing the current status from the structure *P.
1624 This is used after a nested function. */
1627 restore_emit_status (p)
1632 reg_rtx_no = p->reg_rtx_no;
1633 first_label_num = p->first_label_num;
1635 first_insn = p->first_insn;
1636 last_insn = p->last_insn;
1637 sequence_rtl_expr = p->sequence_rtl_expr;
1638 sequence_stack = p->sequence_stack;
1639 cur_insn_uid = p->cur_insn_uid;
1640 last_linenum = p->last_linenum;
1641 last_filename = p->last_filename;
1642 regno_pointer_flag = p->regno_pointer_flag;
1643 regno_pointer_align = p->regno_pointer_align;
1644 regno_pointer_flag_length = p->regno_pointer_flag_length;
1645 regno_reg_rtx = p->regno_reg_rtx;
1647 /* Clear our cache of rtx expressions for start_sequence and
1649 sequence_element_free_list = 0;
1650 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1651 sequence_result[i] = 0;
1656 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1657 It does not work to do this twice, because the mark bits set here
1658 are not cleared afterwards. */
1661 unshare_all_rtl (insn)
1664 for (; insn; insn = NEXT_INSN (insn))
1665 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1666 || GET_CODE (insn) == CALL_INSN)
1668 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1669 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1670 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1673 /* Make sure the addresses of stack slots found outside the insn chain
1674 (such as, in DECL_RTL of a variable) are not shared
1675 with the insn chain.
1677 This special care is necessary when the stack slot MEM does not
1678 actually appear in the insn chain. If it does appear, its address
1679 is unshared from all else at that point. */
1681 copy_rtx_if_shared (stack_slot_list);
1684 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1685 Recursively does the same for subexpressions. */
1688 copy_rtx_if_shared (orig)
1691 register rtx x = orig;
1693 register enum rtx_code code;
1694 register char *format_ptr;
1700 code = GET_CODE (x);
1702 /* These types may be freely shared. */
1715 /* SCRATCH must be shared because they represent distinct values. */
1719 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1720 a LABEL_REF, it isn't sharable. */
1721 if (GET_CODE (XEXP (x, 0)) == PLUS
1722 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1723 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1732 /* The chain of insns is not being copied. */
1736 /* A MEM is allowed to be shared if its address is constant
1737 or is a constant plus one of the special registers. */
1738 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1739 || XEXP (x, 0) == virtual_stack_vars_rtx
1740 || XEXP (x, 0) == virtual_incoming_args_rtx)
1743 if (GET_CODE (XEXP (x, 0)) == PLUS
1744 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1745 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1746 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1748 /* This MEM can appear in more than one place,
1749 but its address better not be shared with anything else. */
1751 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1761 /* This rtx may not be shared. If it has already been seen,
1762 replace it with a copy of itself. */
1768 copy = rtx_alloc (code);
1769 bcopy ((char *) x, (char *) copy,
1770 (sizeof (*copy) - sizeof (copy->fld)
1771 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1777 /* Now scan the subexpressions recursively.
1778 We can store any replaced subexpressions directly into X
1779 since we know X is not shared! Any vectors in X
1780 must be copied if X was copied. */
1782 format_ptr = GET_RTX_FORMAT (code);
1784 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1786 switch (*format_ptr++)
1789 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1793 if (XVEC (x, i) != NULL)
1796 int len = XVECLEN (x, i);
1798 if (copied && len > 0)
1799 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1800 for (j = 0; j < len; j++)
1801 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1809 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1810 to look for shared sub-parts. */
1813 reset_used_flags (x)
1817 register enum rtx_code code;
1818 register char *format_ptr;
1823 code = GET_CODE (x);
1825 /* These types may be freely shared so we needn't do any resetting
1846 /* The chain of insns is not being copied. */
1855 format_ptr = GET_RTX_FORMAT (code);
1856 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1858 switch (*format_ptr++)
1861 reset_used_flags (XEXP (x, i));
1865 for (j = 0; j < XVECLEN (x, i); j++)
1866 reset_used_flags (XVECEXP (x, i, j));
1872 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1873 Return X or the rtx for the pseudo reg the value of X was copied into.
1874 OTHER must be valid as a SET_DEST. */
1877 make_safe_from (x, other)
1881 switch (GET_CODE (other))
1884 other = SUBREG_REG (other);
1886 case STRICT_LOW_PART:
1889 other = XEXP (other, 0);
1895 if ((GET_CODE (other) == MEM
1897 && GET_CODE (x) != REG
1898 && GET_CODE (x) != SUBREG)
1899 || (GET_CODE (other) == REG
1900 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1901 || reg_mentioned_p (other, x))))
1903 rtx temp = gen_reg_rtx (GET_MODE (x));
1904 emit_move_insn (temp, x);
1910 /* Emission of insns (adding them to the doubly-linked list). */
1912 /* Return the first insn of the current sequence or current function. */
1920 /* Return the last insn emitted in current sequence or current function. */
1928 /* Specify a new insn as the last in the chain. */
1931 set_last_insn (insn)
1934 if (NEXT_INSN (insn) != 0)
1939 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1942 get_last_insn_anywhere ()
1944 struct sequence_stack *stack;
1947 for (stack = sequence_stack; stack; stack = stack->next)
1948 if (stack->last != 0)
1953 /* Return a number larger than any instruction's uid in this function. */
1958 return cur_insn_uid;
1961 /* Return the next insn. If it is a SEQUENCE, return the first insn
1970 insn = NEXT_INSN (insn);
1971 if (insn && GET_CODE (insn) == INSN
1972 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1973 insn = XVECEXP (PATTERN (insn), 0, 0);
1979 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1983 previous_insn (insn)
1988 insn = PREV_INSN (insn);
1989 if (insn && GET_CODE (insn) == INSN
1990 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1991 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1997 /* Return the next insn after INSN that is not a NOTE. This routine does not
1998 look inside SEQUENCEs. */
2001 next_nonnote_insn (insn)
2006 insn = NEXT_INSN (insn);
2007 if (insn == 0 || GET_CODE (insn) != NOTE)
2014 /* Return the previous insn before INSN that is not a NOTE. This routine does
2015 not look inside SEQUENCEs. */
2018 prev_nonnote_insn (insn)
2023 insn = PREV_INSN (insn);
2024 if (insn == 0 || GET_CODE (insn) != NOTE)
2031 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2032 or 0, if there is none. This routine does not look inside
2036 next_real_insn (insn)
2041 insn = NEXT_INSN (insn);
2042 if (insn == 0 || GET_CODE (insn) == INSN
2043 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2050 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2051 or 0, if there is none. This routine does not look inside
2055 prev_real_insn (insn)
2060 insn = PREV_INSN (insn);
2061 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2062 || GET_CODE (insn) == JUMP_INSN)
2069 /* Find the next insn after INSN that really does something. This routine
2070 does not look inside SEQUENCEs. Until reload has completed, this is the
2071 same as next_real_insn. */
2074 next_active_insn (insn)
2079 insn = NEXT_INSN (insn);
2081 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2082 || (GET_CODE (insn) == INSN
2083 && (! reload_completed
2084 || (GET_CODE (PATTERN (insn)) != USE
2085 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2092 /* Find the last insn before INSN that really does something. This routine
2093 does not look inside SEQUENCEs. Until reload has completed, this is the
2094 same as prev_real_insn. */
2097 prev_active_insn (insn)
2102 insn = PREV_INSN (insn);
2104 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2105 || (GET_CODE (insn) == INSN
2106 && (! reload_completed
2107 || (GET_CODE (PATTERN (insn)) != USE
2108 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2115 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2123 insn = NEXT_INSN (insn);
2124 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2131 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2139 insn = PREV_INSN (insn);
2140 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2148 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2149 and REG_CC_USER notes so we can find it. */
2152 link_cc0_insns (insn)
2155 rtx user = next_nonnote_insn (insn);
2157 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2158 user = XVECEXP (PATTERN (user), 0, 0);
2160 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2161 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2164 /* Return the next insn that uses CC0 after INSN, which is assumed to
2165 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2166 applied to the result of this function should yield INSN).
2168 Normally, this is simply the next insn. However, if a REG_CC_USER note
2169 is present, it contains the insn that uses CC0.
2171 Return 0 if we can't find the insn. */
2174 next_cc0_user (insn)
2177 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2180 return XEXP (note, 0);
2182 insn = next_nonnote_insn (insn);
2183 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2184 insn = XVECEXP (PATTERN (insn), 0, 0);
2186 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2187 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2193 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2194 note, it is the previous insn. */
2197 prev_cc0_setter (insn)
2200 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2203 return XEXP (note, 0);
2205 insn = prev_nonnote_insn (insn);
2206 if (! sets_cc0_p (PATTERN (insn)))
2213 /* Try splitting insns that can be split for better scheduling.
2214 PAT is the pattern which might split.
2215 TRIAL is the insn providing PAT.
2216 LAST is non-zero if we should return the last insn of the sequence produced.
2218 If this routine succeeds in splitting, it returns the first or last
2219 replacement insn depending on the value of LAST. Otherwise, it
2220 returns TRIAL. If the insn to be returned can be split, it will be. */
2223 try_split (pat, trial, last)
2227 rtx before = PREV_INSN (trial);
2228 rtx after = NEXT_INSN (trial);
2229 rtx seq = split_insns (pat, trial);
2230 int has_barrier = 0;
2233 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2234 We may need to handle this specially. */
2235 if (after && GET_CODE (after) == BARRIER)
2238 after = NEXT_INSN (after);
2243 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2244 The latter case will normally arise only when being done so that
2245 it, in turn, will be split (SFmode on the 29k is an example). */
2246 if (GET_CODE (seq) == SEQUENCE)
2248 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2249 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2250 increment the usage count so we don't delete the label. */
2253 if (GET_CODE (trial) == JUMP_INSN)
2254 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2255 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2257 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2259 if (JUMP_LABEL (trial))
2260 LABEL_NUSES (JUMP_LABEL (trial))++;
2263 tem = emit_insn_after (seq, before);
2265 delete_insn (trial);
2267 emit_barrier_after (tem);
2269 /* Recursively call try_split for each new insn created; by the
2270 time control returns here that insn will be fully split, so
2271 set LAST and continue from the insn after the one returned.
2272 We can't use next_active_insn here since AFTER may be a note.
2273 Ignore deleted insns, which can be occur if not optimizing,
2274 and ignore BARRIERs which can occur if we split the insn
2275 immediately before a BARRIER. */
2276 for (tem = NEXT_INSN (before); tem != after;
2277 tem = NEXT_INSN (tem))
2278 if (! INSN_DELETED_P (tem) && ! GET_CODE (tem) == BARRIER)
2279 tem = try_split (PATTERN (tem), tem, 1);
2281 /* Avoid infinite loop if the result matches the original pattern. */
2282 else if (rtx_equal_p (seq, pat))
2286 PATTERN (trial) = seq;
2287 INSN_CODE (trial) = -1;
2288 try_split (seq, trial, last);
2291 /* Return either the first or the last insn, depending on which was
2293 return last ? prev_active_insn (after) : next_active_insn (before);
2299 /* Make and return an INSN rtx, initializing all its slots.
2300 Store PATTERN in the pattern slots. */
2303 make_insn_raw (pattern)
2308 /* If in RTL generation phase, see if FREE_INSN can be used. */
2309 if (free_insn != 0 && rtx_equal_function_value_matters)
2312 free_insn = NEXT_INSN (free_insn);
2313 PUT_CODE (insn, INSN);
2316 insn = rtx_alloc (INSN);
2318 INSN_UID (insn) = cur_insn_uid++;
2319 PATTERN (insn) = pattern;
2320 INSN_CODE (insn) = -1;
2321 LOG_LINKS (insn) = NULL;
2322 REG_NOTES (insn) = NULL;
2327 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2330 make_jump_insn_raw (pattern)
2335 insn = rtx_alloc (JUMP_INSN);
2336 INSN_UID (insn) = cur_insn_uid++;
2338 PATTERN (insn) = pattern;
2339 INSN_CODE (insn) = -1;
2340 LOG_LINKS (insn) = NULL;
2341 REG_NOTES (insn) = NULL;
2342 JUMP_LABEL (insn) = NULL;
2347 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2350 make_call_insn_raw (pattern)
2355 insn = rtx_alloc (CALL_INSN);
2356 INSN_UID (insn) = cur_insn_uid++;
2358 PATTERN (insn) = pattern;
2359 INSN_CODE (insn) = -1;
2360 LOG_LINKS (insn) = NULL;
2361 REG_NOTES (insn) = NULL;
2362 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2367 /* Add INSN to the end of the doubly-linked list.
2368 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2374 PREV_INSN (insn) = last_insn;
2375 NEXT_INSN (insn) = 0;
2377 if (NULL != last_insn)
2378 NEXT_INSN (last_insn) = insn;
2380 if (NULL == first_insn)
2386 /* Add INSN into the doubly-linked list after insn AFTER. This and
2387 the next should be the only functions called to insert an insn once
2388 delay slots have been filled since only they know how to update a
2392 add_insn_after (insn, after)
2395 rtx next = NEXT_INSN (after);
2397 if (optimize && INSN_DELETED_P (after))
2400 NEXT_INSN (insn) = next;
2401 PREV_INSN (insn) = after;
2405 PREV_INSN (next) = insn;
2406 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2407 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2409 else if (last_insn == after)
2413 struct sequence_stack *stack = sequence_stack;
2414 /* Scan all pending sequences too. */
2415 for (; stack; stack = stack->next)
2416 if (after == stack->last)
2426 NEXT_INSN (after) = insn;
2427 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2429 rtx sequence = PATTERN (after);
2430 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2434 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2435 the previous should be the only functions called to insert an insn once
2436 delay slots have been filled since only they know how to update a
2440 add_insn_before (insn, before)
2443 rtx prev = PREV_INSN (before);
2445 if (optimize && INSN_DELETED_P (before))
2448 PREV_INSN (insn) = prev;
2449 NEXT_INSN (insn) = before;
2453 NEXT_INSN (prev) = insn;
2454 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2456 rtx sequence = PATTERN (prev);
2457 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2460 else if (first_insn == before)
2464 struct sequence_stack *stack = sequence_stack;
2465 /* Scan all pending sequences too. */
2466 for (; stack; stack = stack->next)
2467 if (before == stack->first)
2469 stack->first = insn;
2477 PREV_INSN (before) = insn;
2478 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2479 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2482 /* Delete all insns made since FROM.
2483 FROM becomes the new last instruction. */
2486 delete_insns_since (from)
2492 NEXT_INSN (from) = 0;
2496 /* This function is deprecated, please use sequences instead.
2498 Move a consecutive bunch of insns to a different place in the chain.
2499 The insns to be moved are those between FROM and TO.
2500 They are moved to a new position after the insn AFTER.
2501 AFTER must not be FROM or TO or any insn in between.
2503 This function does not know about SEQUENCEs and hence should not be
2504 called after delay-slot filling has been done. */
2507 reorder_insns (from, to, after)
2508 rtx from, to, after;
2510 /* Splice this bunch out of where it is now. */
2511 if (PREV_INSN (from))
2512 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2514 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2515 if (last_insn == to)
2516 last_insn = PREV_INSN (from);
2517 if (first_insn == from)
2518 first_insn = NEXT_INSN (to);
2520 /* Make the new neighbors point to it and it to them. */
2521 if (NEXT_INSN (after))
2522 PREV_INSN (NEXT_INSN (after)) = to;
2524 NEXT_INSN (to) = NEXT_INSN (after);
2525 PREV_INSN (from) = after;
2526 NEXT_INSN (after) = from;
2527 if (after == last_insn)
2531 /* Return the line note insn preceding INSN. */
2534 find_line_note (insn)
2537 if (no_line_numbers)
2540 for (; insn; insn = PREV_INSN (insn))
2541 if (GET_CODE (insn) == NOTE
2542 && NOTE_LINE_NUMBER (insn) >= 0)
2548 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2549 of the moved insns when debugging. This may insert a note between AFTER
2550 and FROM, and another one after TO. */
2553 reorder_insns_with_line_notes (from, to, after)
2554 rtx from, to, after;
2556 rtx from_line = find_line_note (from);
2557 rtx after_line = find_line_note (after);
2559 reorder_insns (from, to, after);
2561 if (from_line == after_line)
2565 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2566 NOTE_LINE_NUMBER (from_line),
2569 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2570 NOTE_LINE_NUMBER (after_line),
2574 /* Emit an insn of given code and pattern
2575 at a specified place within the doubly-linked list. */
2577 /* Make an instruction with body PATTERN
2578 and output it before the instruction BEFORE. */
2581 emit_insn_before (pattern, before)
2582 register rtx pattern, before;
2584 register rtx insn = before;
2586 if (GET_CODE (pattern) == SEQUENCE)
2590 for (i = 0; i < XVECLEN (pattern, 0); i++)
2592 insn = XVECEXP (pattern, 0, i);
2593 add_insn_before (insn, before);
2595 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2596 sequence_result[XVECLEN (pattern, 0)] = pattern;
2600 insn = make_insn_raw (pattern);
2601 add_insn_before (insn, before);
2607 /* Make an instruction with body PATTERN and code JUMP_INSN
2608 and output it before the instruction BEFORE. */
2611 emit_jump_insn_before (pattern, before)
2612 register rtx pattern, before;
2616 if (GET_CODE (pattern) == SEQUENCE)
2617 insn = emit_insn_before (pattern, before);
2620 insn = make_jump_insn_raw (pattern);
2621 add_insn_before (insn, before);
2627 /* Make an instruction with body PATTERN and code CALL_INSN
2628 and output it before the instruction BEFORE. */
2631 emit_call_insn_before (pattern, before)
2632 register rtx pattern, before;
2636 if (GET_CODE (pattern) == SEQUENCE)
2637 insn = emit_insn_before (pattern, before);
2640 insn = make_call_insn_raw (pattern);
2641 add_insn_before (insn, before);
2642 PUT_CODE (insn, CALL_INSN);
2648 /* Make an insn of code BARRIER
2649 and output it before the insn AFTER. */
2652 emit_barrier_before (before)
2653 register rtx before;
2655 register rtx insn = rtx_alloc (BARRIER);
2657 INSN_UID (insn) = cur_insn_uid++;
2659 add_insn_before (insn, before);
2663 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2666 emit_note_before (subtype, before)
2670 register rtx note = rtx_alloc (NOTE);
2671 INSN_UID (note) = cur_insn_uid++;
2672 NOTE_SOURCE_FILE (note) = 0;
2673 NOTE_LINE_NUMBER (note) = subtype;
2675 add_insn_before (note, before);
2679 /* Make an insn of code INSN with body PATTERN
2680 and output it after the insn AFTER. */
2683 emit_insn_after (pattern, after)
2684 register rtx pattern, after;
2686 register rtx insn = after;
2688 if (GET_CODE (pattern) == SEQUENCE)
2692 for (i = 0; i < XVECLEN (pattern, 0); i++)
2694 insn = XVECEXP (pattern, 0, i);
2695 add_insn_after (insn, after);
2698 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2699 sequence_result[XVECLEN (pattern, 0)] = pattern;
2703 insn = make_insn_raw (pattern);
2704 add_insn_after (insn, after);
2710 /* Similar to emit_insn_after, except that line notes are to be inserted so
2711 as to act as if this insn were at FROM. */
2714 emit_insn_after_with_line_notes (pattern, after, from)
2715 rtx pattern, after, from;
2717 rtx from_line = find_line_note (from);
2718 rtx after_line = find_line_note (after);
2719 rtx insn = emit_insn_after (pattern, after);
2722 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2723 NOTE_LINE_NUMBER (from_line),
2727 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2728 NOTE_LINE_NUMBER (after_line),
2732 /* Make an insn of code JUMP_INSN with body PATTERN
2733 and output it after the insn AFTER. */
2736 emit_jump_insn_after (pattern, after)
2737 register rtx pattern, after;
2741 if (GET_CODE (pattern) == SEQUENCE)
2742 insn = emit_insn_after (pattern, after);
2745 insn = make_jump_insn_raw (pattern);
2746 add_insn_after (insn, after);
2752 /* Make an insn of code BARRIER
2753 and output it after the insn AFTER. */
2756 emit_barrier_after (after)
2759 register rtx insn = rtx_alloc (BARRIER);
2761 INSN_UID (insn) = cur_insn_uid++;
2763 add_insn_after (insn, after);
2767 /* Emit the label LABEL after the insn AFTER. */
2770 emit_label_after (label, after)
2773 /* This can be called twice for the same label
2774 as a result of the confusion that follows a syntax error!
2775 So make it harmless. */
2776 if (INSN_UID (label) == 0)
2778 INSN_UID (label) = cur_insn_uid++;
2779 add_insn_after (label, after);
2785 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2788 emit_note_after (subtype, after)
2792 register rtx note = rtx_alloc (NOTE);
2793 INSN_UID (note) = cur_insn_uid++;
2794 NOTE_SOURCE_FILE (note) = 0;
2795 NOTE_LINE_NUMBER (note) = subtype;
2796 add_insn_after (note, after);
2800 /* Emit a line note for FILE and LINE after the insn AFTER. */
2803 emit_line_note_after (file, line, after)
2810 if (no_line_numbers && line > 0)
2816 note = rtx_alloc (NOTE);
2817 INSN_UID (note) = cur_insn_uid++;
2818 NOTE_SOURCE_FILE (note) = file;
2819 NOTE_LINE_NUMBER (note) = line;
2820 add_insn_after (note, after);
2824 /* Make an insn of code INSN with pattern PATTERN
2825 and add it to the end of the doubly-linked list.
2826 If PATTERN is a SEQUENCE, take the elements of it
2827 and emit an insn for each element.
2829 Returns the last insn emitted. */
2835 rtx insn = last_insn;
2837 if (GET_CODE (pattern) == SEQUENCE)
2841 for (i = 0; i < XVECLEN (pattern, 0); i++)
2843 insn = XVECEXP (pattern, 0, i);
2846 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2847 sequence_result[XVECLEN (pattern, 0)] = pattern;
2851 insn = make_insn_raw (pattern);
2858 /* Emit the insns in a chain starting with INSN.
2859 Return the last insn emitted. */
2869 rtx next = NEXT_INSN (insn);
2878 /* Emit the insns in a chain starting with INSN and place them in front of
2879 the insn BEFORE. Return the last insn emitted. */
2882 emit_insns_before (insn, before)
2890 rtx next = NEXT_INSN (insn);
2891 add_insn_before (insn, before);
2899 /* Emit the insns in a chain starting with FIRST and place them in back of
2900 the insn AFTER. Return the last insn emitted. */
2903 emit_insns_after (first, after)
2908 register rtx after_after;
2916 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2919 after_after = NEXT_INSN (after);
2921 NEXT_INSN (after) = first;
2922 PREV_INSN (first) = after;
2923 NEXT_INSN (last) = after_after;
2925 PREV_INSN (after_after) = last;
2927 if (after == last_insn)
2932 /* Make an insn of code JUMP_INSN with pattern PATTERN
2933 and add it to the end of the doubly-linked list. */
2936 emit_jump_insn (pattern)
2939 if (GET_CODE (pattern) == SEQUENCE)
2940 return emit_insn (pattern);
2943 register rtx insn = make_jump_insn_raw (pattern);
2949 /* Make an insn of code CALL_INSN with pattern PATTERN
2950 and add it to the end of the doubly-linked list. */
2953 emit_call_insn (pattern)
2956 if (GET_CODE (pattern) == SEQUENCE)
2957 return emit_insn (pattern);
2960 register rtx insn = make_call_insn_raw (pattern);
2962 PUT_CODE (insn, CALL_INSN);
2967 /* Add the label LABEL to the end of the doubly-linked list. */
2973 /* This can be called twice for the same label
2974 as a result of the confusion that follows a syntax error!
2975 So make it harmless. */
2976 if (INSN_UID (label) == 0)
2978 INSN_UID (label) = cur_insn_uid++;
2984 /* Make an insn of code BARRIER
2985 and add it to the end of the doubly-linked list. */
2990 register rtx barrier = rtx_alloc (BARRIER);
2991 INSN_UID (barrier) = cur_insn_uid++;
2996 /* Make an insn of code NOTE
2997 with data-fields specified by FILE and LINE
2998 and add it to the end of the doubly-linked list,
2999 but only if line-numbers are desired for debugging info. */
3002 emit_line_note (file, line)
3006 emit_filename = file;
3010 if (no_line_numbers)
3014 return emit_note (file, line);
3017 /* Make an insn of code NOTE
3018 with data-fields specified by FILE and LINE
3019 and add it to the end of the doubly-linked list.
3020 If it is a line-number NOTE, omit it if it matches the previous one. */
3023 emit_note (file, line)
3031 if (file && last_filename && !strcmp (file, last_filename)
3032 && line == last_linenum)
3034 last_filename = file;
3035 last_linenum = line;
3038 if (no_line_numbers && line > 0)
3044 note = rtx_alloc (NOTE);
3045 INSN_UID (note) = cur_insn_uid++;
3046 NOTE_SOURCE_FILE (note) = file;
3047 NOTE_LINE_NUMBER (note) = line;
3052 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
3055 emit_line_note_force (file, line)
3060 return emit_line_note (file, line);
3063 /* Cause next statement to emit a line note even if the line number
3064 has not changed. This is used at the beginning of a function. */
3067 force_next_line_note ()
3072 /* Return an indication of which type of insn should have X as a body.
3073 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3079 if (GET_CODE (x) == CODE_LABEL)
3081 if (GET_CODE (x) == CALL)
3083 if (GET_CODE (x) == RETURN)
3085 if (GET_CODE (x) == SET)
3087 if (SET_DEST (x) == pc_rtx)
3089 else if (GET_CODE (SET_SRC (x)) == CALL)
3094 if (GET_CODE (x) == PARALLEL)
3097 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3098 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3100 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3101 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3103 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3104 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3110 /* Emit the rtl pattern X as an appropriate kind of insn.
3111 If X is a label, it is simply added into the insn chain. */
3117 enum rtx_code code = classify_insn (x);
3119 if (code == CODE_LABEL)
3120 return emit_label (x);
3121 else if (code == INSN)
3122 return emit_insn (x);
3123 else if (code == JUMP_INSN)
3125 register rtx insn = emit_jump_insn (x);
3126 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3127 return emit_barrier ();
3130 else if (code == CALL_INSN)
3131 return emit_call_insn (x);
3136 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3141 struct sequence_stack *tem;
3143 if (sequence_element_free_list)
3145 /* Reuse a previously-saved struct sequence_stack. */
3146 tem = sequence_element_free_list;
3147 sequence_element_free_list = tem->next;
3150 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3152 tem->next = sequence_stack;
3153 tem->first = first_insn;
3154 tem->last = last_insn;
3155 tem->sequence_rtl_expr = sequence_rtl_expr;
3157 sequence_stack = tem;
3163 /* Similarly, but indicate that this sequence will be placed in
3167 start_sequence_for_rtl_expr (t)
3172 sequence_rtl_expr = t;
3175 /* Set up the insn chain starting with FIRST
3176 as the current sequence, saving the previously current one. */
3179 push_to_sequence (first)
3186 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3192 /* Set up the outer-level insn chain
3193 as the current sequence, saving the previously current one. */
3196 push_topmost_sequence ()
3198 struct sequence_stack *stack, *top = NULL;
3202 for (stack = sequence_stack; stack; stack = stack->next)
3205 first_insn = top->first;
3206 last_insn = top->last;
3207 sequence_rtl_expr = top->sequence_rtl_expr;
3210 /* After emitting to the outer-level insn chain, update the outer-level
3211 insn chain, and restore the previous saved state. */
3214 pop_topmost_sequence ()
3216 struct sequence_stack *stack, *top = NULL;
3218 for (stack = sequence_stack; stack; stack = stack->next)
3221 top->first = first_insn;
3222 top->last = last_insn;
3223 /* ??? Why don't we save sequence_rtl_expr here? */
3228 /* After emitting to a sequence, restore previous saved state.
3230 To get the contents of the sequence just made,
3231 you must call `gen_sequence' *before* calling here. */
3236 struct sequence_stack *tem = sequence_stack;
3238 first_insn = tem->first;
3239 last_insn = tem->last;
3240 sequence_rtl_expr = tem->sequence_rtl_expr;
3241 sequence_stack = tem->next;
3243 tem->next = sequence_element_free_list;
3244 sequence_element_free_list = tem;
3247 /* Return 1 if currently emitting into a sequence. */
3252 return sequence_stack != 0;
3255 /* Generate a SEQUENCE rtx containing the insns already emitted
3256 to the current sequence.
3258 This is how the gen_... function from a DEFINE_EXPAND
3259 constructs the SEQUENCE that it returns. */
3269 /* Count the insns in the chain. */
3271 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3274 /* If only one insn, return its pattern rather than a SEQUENCE.
3275 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3276 the case of an empty list.) */
3278 && ! RTX_FRAME_RELATED_P (first_insn)
3279 && (GET_CODE (first_insn) == INSN
3280 || GET_CODE (first_insn) == JUMP_INSN
3281 /* Don't discard the call usage field. */
3282 || (GET_CODE (first_insn) == CALL_INSN
3283 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3285 NEXT_INSN (first_insn) = free_insn;
3286 free_insn = first_insn;
3287 return PATTERN (first_insn);
3290 /* Put them in a vector. See if we already have a SEQUENCE of the
3291 appropriate length around. */
3292 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3293 sequence_result[len] = 0;
3296 /* Ensure that this rtl goes in saveable_obstack, since we may
3298 push_obstacks_nochange ();
3299 rtl_in_saveable_obstack ();
3300 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3304 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3305 XVECEXP (result, 0, i) = tem;
3310 /* Put the various virtual registers into REGNO_REG_RTX. */
3313 init_virtual_regs ()
3315 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3316 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3317 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3318 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3319 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3322 /* Initialize data structures and variables in this file
3323 before generating rtl for each function. */
3332 sequence_rtl_expr = NULL;
3334 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3337 first_label_num = label_num;
3339 sequence_stack = NULL;
3341 /* Clear the start_sequence/gen_sequence cache. */
3342 sequence_element_free_list = 0;
3343 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3344 sequence_result[i] = 0;
3347 /* Init the tables that describe all the pseudo regs. */
3349 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3352 = (char *) savealloc (regno_pointer_flag_length);
3353 bzero (regno_pointer_flag, regno_pointer_flag_length);
3356 = (char *) savealloc (regno_pointer_flag_length);
3357 bzero (regno_pointer_align, regno_pointer_flag_length);
3360 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3361 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3363 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3364 init_virtual_regs ();
3366 /* Indicate that the virtual registers and stack locations are
3368 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3369 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3370 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3371 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3373 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3374 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3375 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3376 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3377 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3379 #ifdef STACK_BOUNDARY
3380 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3381 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3382 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3383 = STACK_BOUNDARY / BITS_PER_UNIT;
3384 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3386 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3387 = STACK_BOUNDARY / BITS_PER_UNIT;
3388 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3389 = STACK_BOUNDARY / BITS_PER_UNIT;
3390 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3391 = STACK_BOUNDARY / BITS_PER_UNIT;
3392 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3393 = STACK_BOUNDARY / BITS_PER_UNIT;
3394 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
3397 #ifdef INIT_EXPANDERS
3402 /* Create some permanent unique rtl objects shared between all functions.
3403 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3406 init_emit_once (line_numbers)
3410 enum machine_mode mode;
3411 enum machine_mode double_mode;
3413 no_line_numbers = ! line_numbers;
3415 sequence_stack = NULL;
3417 /* Compute the word and byte modes. */
3419 byte_mode = VOIDmode;
3420 word_mode = VOIDmode;
3421 double_mode = VOIDmode;
3423 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3424 mode = GET_MODE_WIDER_MODE (mode))
3426 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3427 && byte_mode == VOIDmode)
3430 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3431 && word_mode == VOIDmode)
3435 #ifndef DOUBLE_TYPE_SIZE
3436 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3439 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3440 mode = GET_MODE_WIDER_MODE (mode))
3442 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3443 && double_mode == VOIDmode)
3447 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3449 /* Create the unique rtx's for certain rtx codes and operand values. */
3451 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3453 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3454 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3455 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3458 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3459 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3460 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3462 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3464 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3465 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3466 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3467 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3469 for (i = 0; i <= 2; i++)
3471 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3472 mode = GET_MODE_WIDER_MODE (mode))
3474 rtx tem = rtx_alloc (CONST_DOUBLE);
3475 union real_extract u;
3477 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3478 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3480 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3481 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3482 PUT_MODE (tem, mode);
3484 const_tiny_rtx[i][(int) mode] = tem;
3487 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3489 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3490 mode = GET_MODE_WIDER_MODE (mode))
3491 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3493 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3495 mode = GET_MODE_WIDER_MODE (mode))
3496 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3499 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3500 mode = GET_MODE_WIDER_MODE (mode))
3501 const_tiny_rtx[0][(int) mode] = const0_rtx;
3504 /* Assign register numbers to the globally defined register rtx.
3505 This must be done at runtime because the register number field
3506 is in a union and some compilers can't initialize unions. */
3508 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3509 PUT_MODE (stack_pointer_rtx, Pmode);
3510 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3511 PUT_MODE (frame_pointer_rtx, Pmode);
3512 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3513 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3514 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3516 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3517 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3518 PUT_MODE (arg_pointer_rtx, Pmode);
3521 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3522 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3523 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3524 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3525 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3526 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3527 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3528 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3529 REGNO (virtual_cfa_rtx) = VIRTUAL_CFA_REGNUM;
3530 PUT_MODE (virtual_cfa_rtx, Pmode);
3532 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3533 return_address_pointer_rtx
3534 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3538 struct_value_rtx = STRUCT_VALUE;
3540 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3543 #ifdef STRUCT_VALUE_INCOMING
3544 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3546 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3547 struct_value_incoming_rtx
3548 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3550 struct_value_incoming_rtx = struct_value_rtx;
3554 #ifdef STATIC_CHAIN_REGNUM
3555 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3557 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3558 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3559 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3562 static_chain_incoming_rtx = static_chain_rtx;
3566 static_chain_rtx = STATIC_CHAIN;
3568 #ifdef STATIC_CHAIN_INCOMING
3569 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3571 static_chain_incoming_rtx = static_chain_rtx;
3575 #ifdef PIC_OFFSET_TABLE_REGNUM
3576 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3579 #ifdef INIT_EXPANDERS
3580 /* This is to initialize save_machine_status and restore_machine_status before
3581 the first call to push_function_context_to. This is needed by the Chill
3582 front end which calls push_function_context_to before the first cal to
3583 init_function_start. */
3588 /* Query and clear/ restore no_line_numbers. This is used by the
3589 switch / case handling in stmt.c to give proper line numbers in
3590 warnings about unreachable code. */
3593 force_line_numbers ()
3595 int old = no_line_numbers;
3597 no_line_numbers = 0;
3599 force_next_line_note ();
3604 restore_line_number_status (old_value)
3607 no_line_numbers = old_value;