1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* Datastructures maintained for currently processed function in RTL form. */
71 struct rtl_data x_rtl;
73 /* Indexed by pseudo register number, gives the rtx for that pseudo.
74 Allocated in parallel with regno_pointer_align.
75 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
76 with length attribute nested in top level structures. */
80 /* This is *not* reset after each function. It gives each CODE_LABEL
81 in the entire compilation a unique label number. */
83 static GTY(()) int label_num = 1;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconsthalf;
116 /* Record fixed-point constant 0 and 1. */
117 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
118 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
157 htab_t const_int_htab;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
161 htab_t mem_attrs_htab;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
165 htab_t reg_attrs_htab;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_double_htab;
171 /* A hash table storing all CONST_FIXEDs. */
172 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
173 htab_t const_fixed_htab;
175 #define first_insn (crtl->emit.x_first_insn)
176 #define last_insn (crtl->emit.x_last_insn)
177 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
178 #define last_location (crtl->emit.x_last_location)
179 #define first_label_num (crtl->emit.x_first_label_num)
181 static rtx make_call_insn_raw (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void set_used_decls (tree);
184 static void mark_label_nuses (rtx);
185 static hashval_t const_int_htab_hash (const void *);
186 static int const_int_htab_eq (const void *, const void *);
187 static hashval_t const_double_htab_hash (const void *);
188 static int const_double_htab_eq (const void *, const void *);
189 static rtx lookup_const_double (rtx);
190 static hashval_t const_fixed_htab_hash (const void *);
191 static int const_fixed_htab_eq (const void *, const void *);
192 static rtx lookup_const_fixed (rtx);
193 static hashval_t mem_attrs_htab_hash (const void *);
194 static int mem_attrs_htab_eq (const void *, const void *);
195 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
197 static hashval_t reg_attrs_htab_hash (const void *);
198 static int reg_attrs_htab_eq (const void *, const void *);
199 static reg_attrs *get_reg_attrs (tree, int);
200 static tree component_ref_for_mem_expr (tree);
201 static rtx gen_const_vector (enum machine_mode, int);
202 static void copy_rtx_if_shared_1 (rtx *orig);
204 /* Probability of the conditional branch currently proceeded by try_split.
205 Set to -1 otherwise. */
206 int split_branch_probability = -1;
208 /* Returns a hash code for X (which is a really a CONST_INT). */
211 const_int_htab_hash (const void *x)
213 return (hashval_t) INTVAL ((const_rtx) x);
216 /* Returns nonzero if the value represented by X (which is really a
217 CONST_INT) is the same as that given by Y (which is really a
221 const_int_htab_eq (const void *x, const void *y)
223 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
226 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
228 const_double_htab_hash (const void *x)
230 const_rtx const value = (const_rtx) x;
233 if (GET_MODE (value) == VOIDmode)
234 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
237 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
238 /* MODE is used in the comparison, so it should be in the hash. */
239 h ^= GET_MODE (value);
244 /* Returns nonzero if the value represented by X (really a ...)
245 is the same as that represented by Y (really a ...) */
247 const_double_htab_eq (const void *x, const void *y)
249 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
251 if (GET_MODE (a) != GET_MODE (b))
253 if (GET_MODE (a) == VOIDmode)
254 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
255 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
257 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
258 CONST_DOUBLE_REAL_VALUE (b));
261 /* Returns a hash code for X (which is really a CONST_FIXED). */
264 const_fixed_htab_hash (const void *x)
266 const_rtx const value = (const_rtx) x;
269 h = fixed_hash (CONST_FIXED_VALUE (value));
270 /* MODE is used in the comparison, so it should be in the hash. */
271 h ^= GET_MODE (value);
275 /* Returns nonzero if the value represented by X (really a ...)
276 is the same as that represented by Y (really a ...). */
279 const_fixed_htab_eq (const void *x, const void *y)
281 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
283 if (GET_MODE (a) != GET_MODE (b))
285 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
288 /* Returns a hash code for X (which is a really a mem_attrs *). */
291 mem_attrs_htab_hash (const void *x)
293 const mem_attrs *const p = (const mem_attrs *) x;
295 return (p->alias ^ (p->align * 1000)
296 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
297 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
298 ^ (size_t) iterative_hash_expr (p->expr, 0));
301 /* Returns nonzero if the value represented by X (which is really a
302 mem_attrs *) is the same as that given by Y (which is also really a
306 mem_attrs_htab_eq (const void *x, const void *y)
308 const mem_attrs *const p = (const mem_attrs *) x;
309 const mem_attrs *const q = (const mem_attrs *) y;
311 return (p->alias == q->alias && p->offset == q->offset
312 && p->size == q->size && p->align == q->align
313 && (p->expr == q->expr
314 || (p->expr != NULL_TREE && q->expr != NULL_TREE
315 && operand_equal_p (p->expr, q->expr, 0))));
318 /* Allocate a new mem_attrs structure and insert it into the hash table if
319 one identical to it is not already in the table. We are doing this for
323 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
324 unsigned int align, enum machine_mode mode)
329 /* If everything is the default, we can just return zero.
330 This must match what the corresponding MEM_* macros return when the
331 field is not present. */
332 if (alias == 0 && expr == 0 && offset == 0
334 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
335 && (STRICT_ALIGNMENT && mode != BLKmode
336 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
341 attrs.offset = offset;
345 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
348 *slot = ggc_alloc (sizeof (mem_attrs));
349 memcpy (*slot, &attrs, sizeof (mem_attrs));
355 /* Returns a hash code for X (which is a really a reg_attrs *). */
358 reg_attrs_htab_hash (const void *x)
360 const reg_attrs *const p = (const reg_attrs *) x;
362 return ((p->offset * 1000) ^ (long) p->decl);
365 /* Returns nonzero if the value represented by X (which is really a
366 reg_attrs *) is the same as that given by Y (which is also really a
370 reg_attrs_htab_eq (const void *x, const void *y)
372 const reg_attrs *const p = (const reg_attrs *) x;
373 const reg_attrs *const q = (const reg_attrs *) y;
375 return (p->decl == q->decl && p->offset == q->offset);
377 /* Allocate a new reg_attrs structure and insert it into the hash table if
378 one identical to it is not already in the table. We are doing this for
382 get_reg_attrs (tree decl, int offset)
387 /* If everything is the default, we can just return zero. */
388 if (decl == 0 && offset == 0)
392 attrs.offset = offset;
394 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
397 *slot = ggc_alloc (sizeof (reg_attrs));
398 memcpy (*slot, &attrs, sizeof (reg_attrs));
406 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
412 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
413 MEM_VOLATILE_P (x) = true;
419 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
420 don't attempt to share with the various global pieces of rtl (such as
421 frame_pointer_rtx). */
424 gen_raw_REG (enum machine_mode mode, int regno)
426 rtx x = gen_rtx_raw_REG (mode, regno);
427 ORIGINAL_REGNO (x) = regno;
431 /* There are some RTL codes that require special attention; the generation
432 functions do the raw handling. If you add to this list, modify
433 special_rtx in gengenrtl.c as well. */
436 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
440 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
441 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
443 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
444 if (const_true_rtx && arg == STORE_FLAG_VALUE)
445 return const_true_rtx;
448 /* Look up the CONST_INT in the hash table. */
449 slot = htab_find_slot_with_hash (const_int_htab, &arg,
450 (hashval_t) arg, INSERT);
452 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
458 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
460 return GEN_INT (trunc_int_for_mode (c, mode));
463 /* CONST_DOUBLEs might be created from pairs of integers, or from
464 REAL_VALUE_TYPEs. Also, their length is known only at run time,
465 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
467 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
468 hash table. If so, return its counterpart; otherwise add it
469 to the hash table and return it. */
471 lookup_const_double (rtx real)
473 void **slot = htab_find_slot (const_double_htab, real, INSERT);
480 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
481 VALUE in mode MODE. */
483 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
485 rtx real = rtx_alloc (CONST_DOUBLE);
486 PUT_MODE (real, mode);
490 return lookup_const_double (real);
493 /* Determine whether FIXED, a CONST_FIXED, already exists in the
494 hash table. If so, return its counterpart; otherwise add it
495 to the hash table and return it. */
498 lookup_const_fixed (rtx fixed)
500 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
507 /* Return a CONST_FIXED rtx for a fixed-point value specified by
508 VALUE in mode MODE. */
511 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
513 rtx fixed = rtx_alloc (CONST_FIXED);
514 PUT_MODE (fixed, mode);
518 return lookup_const_fixed (fixed);
521 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
522 of ints: I0 is the low-order word and I1 is the high-order word.
523 Do not use this routine for non-integer modes; convert to
524 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
527 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
532 /* There are the following cases (note that there are no modes with
533 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
535 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
537 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
538 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
539 from copies of the sign bit, and sign of i0 and i1 are the same), then
540 we return a CONST_INT for i0.
541 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
542 if (mode != VOIDmode)
544 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
545 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
546 /* We can get a 0 for an error mark. */
547 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
548 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
550 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
551 return gen_int_mode (i0, mode);
553 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
556 /* If this integer fits in one word, return a CONST_INT. */
557 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
560 /* We use VOIDmode for integers. */
561 value = rtx_alloc (CONST_DOUBLE);
562 PUT_MODE (value, VOIDmode);
564 CONST_DOUBLE_LOW (value) = i0;
565 CONST_DOUBLE_HIGH (value) = i1;
567 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
568 XWINT (value, i) = 0;
570 return lookup_const_double (value);
574 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
576 /* In case the MD file explicitly references the frame pointer, have
577 all such references point to the same frame pointer. This is
578 used during frame pointer elimination to distinguish the explicit
579 references to these registers from pseudos that happened to be
582 If we have eliminated the frame pointer or arg pointer, we will
583 be using it as a normal register, for example as a spill
584 register. In such cases, we might be accessing it in a mode that
585 is not Pmode and therefore cannot use the pre-allocated rtx.
587 Also don't do this when we are making new REGs in reload, since
588 we don't want to get confused with the real pointers. */
590 if (mode == Pmode && !reload_in_progress)
592 if (regno == FRAME_POINTER_REGNUM
593 && (!reload_completed || frame_pointer_needed))
594 return frame_pointer_rtx;
595 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
596 if (regno == HARD_FRAME_POINTER_REGNUM
597 && (!reload_completed || frame_pointer_needed))
598 return hard_frame_pointer_rtx;
600 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
601 if (regno == ARG_POINTER_REGNUM)
602 return arg_pointer_rtx;
604 #ifdef RETURN_ADDRESS_POINTER_REGNUM
605 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
606 return return_address_pointer_rtx;
608 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
609 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
610 return pic_offset_table_rtx;
611 if (regno == STACK_POINTER_REGNUM)
612 return stack_pointer_rtx;
616 /* If the per-function register table has been set up, try to re-use
617 an existing entry in that table to avoid useless generation of RTL.
619 This code is disabled for now until we can fix the various backends
620 which depend on having non-shared hard registers in some cases. Long
621 term we want to re-enable this code as it can significantly cut down
622 on the amount of useless RTL that gets generated.
624 We'll also need to fix some code that runs after reload that wants to
625 set ORIGINAL_REGNO. */
630 && regno < FIRST_PSEUDO_REGISTER
631 && reg_raw_mode[regno] == mode)
632 return regno_reg_rtx[regno];
635 return gen_raw_REG (mode, regno);
639 gen_rtx_MEM (enum machine_mode mode, rtx addr)
641 rtx rt = gen_rtx_raw_MEM (mode, addr);
643 /* This field is not cleared by the mere allocation of the rtx, so
650 /* Generate a memory referring to non-trapping constant memory. */
653 gen_const_mem (enum machine_mode mode, rtx addr)
655 rtx mem = gen_rtx_MEM (mode, addr);
656 MEM_READONLY_P (mem) = 1;
657 MEM_NOTRAP_P (mem) = 1;
661 /* Generate a MEM referring to fixed portions of the frame, e.g., register
665 gen_frame_mem (enum machine_mode mode, rtx addr)
667 rtx mem = gen_rtx_MEM (mode, addr);
668 MEM_NOTRAP_P (mem) = 1;
669 set_mem_alias_set (mem, get_frame_alias_set ());
673 /* Generate a MEM referring to a temporary use of the stack, not part
674 of the fixed stack frame. For example, something which is pushed
675 by a target splitter. */
677 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
679 rtx mem = gen_rtx_MEM (mode, addr);
680 MEM_NOTRAP_P (mem) = 1;
681 if (!cfun->calls_alloca)
682 set_mem_alias_set (mem, get_frame_alias_set ());
686 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
687 this construct would be valid, and false otherwise. */
690 validate_subreg (enum machine_mode omode, enum machine_mode imode,
691 const_rtx reg, unsigned int offset)
693 unsigned int isize = GET_MODE_SIZE (imode);
694 unsigned int osize = GET_MODE_SIZE (omode);
696 /* All subregs must be aligned. */
697 if (offset % osize != 0)
700 /* The subreg offset cannot be outside the inner object. */
704 /* ??? This should not be here. Temporarily continue to allow word_mode
705 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
706 Generally, backends are doing something sketchy but it'll take time to
708 if (omode == word_mode)
710 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
711 is the culprit here, and not the backends. */
712 else if (osize >= UNITS_PER_WORD && isize >= osize)
714 /* Allow component subregs of complex and vector. Though given the below
715 extraction rules, it's not always clear what that means. */
716 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
717 && GET_MODE_INNER (imode) == omode)
719 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
720 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
721 represent this. It's questionable if this ought to be represented at
722 all -- why can't this all be hidden in post-reload splitters that make
723 arbitrarily mode changes to the registers themselves. */
724 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
726 /* Subregs involving floating point modes are not allowed to
727 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
728 (subreg:SI (reg:DF) 0) isn't. */
729 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
735 /* Paradoxical subregs must have offset zero. */
739 /* This is a normal subreg. Verify that the offset is representable. */
741 /* For hard registers, we already have most of these rules collected in
742 subreg_offset_representable_p. */
743 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
745 unsigned int regno = REGNO (reg);
747 #ifdef CANNOT_CHANGE_MODE_CLASS
748 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
749 && GET_MODE_INNER (imode) == omode)
751 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
755 return subreg_offset_representable_p (regno, imode, offset, omode);
758 /* For pseudo registers, we want most of the same checks. Namely:
759 If the register no larger than a word, the subreg must be lowpart.
760 If the register is larger than a word, the subreg must be the lowpart
761 of a subword. A subreg does *not* perform arbitrary bit extraction.
762 Given that we've already checked mode/offset alignment, we only have
763 to check subword subregs here. */
764 if (osize < UNITS_PER_WORD)
766 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
767 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
768 if (offset % UNITS_PER_WORD != low_off)
775 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
777 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
778 return gen_rtx_raw_SUBREG (mode, reg, offset);
781 /* Generate a SUBREG representing the least-significant part of REG if MODE
782 is smaller than mode of REG, otherwise paradoxical SUBREG. */
785 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
787 enum machine_mode inmode;
789 inmode = GET_MODE (reg);
790 if (inmode == VOIDmode)
792 return gen_rtx_SUBREG (mode, reg,
793 subreg_lowpart_offset (mode, inmode));
796 /* gen_rtvec (n, [rt1, ..., rtn])
798 ** This routine creates an rtvec and stores within it the
799 ** pointers to rtx's which are its arguments.
804 gen_rtvec (int n, ...)
813 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
815 vector = alloca (n * sizeof (rtx));
817 for (i = 0; i < n; i++)
818 vector[i] = va_arg (p, rtx);
820 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
824 return gen_rtvec_v (save_n, vector);
828 gen_rtvec_v (int n, rtx *argp)
834 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
836 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
838 for (i = 0; i < n; i++)
839 rt_val->elem[i] = *argp++;
844 /* Return the number of bytes between the start of an OUTER_MODE
845 in-memory value and the start of an INNER_MODE in-memory value,
846 given that the former is a lowpart of the latter. It may be a
847 paradoxical lowpart, in which case the offset will be negative
848 on big-endian targets. */
851 byte_lowpart_offset (enum machine_mode outer_mode,
852 enum machine_mode inner_mode)
854 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
855 return subreg_lowpart_offset (outer_mode, inner_mode);
857 return -subreg_lowpart_offset (inner_mode, outer_mode);
860 /* Generate a REG rtx for a new pseudo register of mode MODE.
861 This pseudo is assigned the next sequential register number. */
864 gen_reg_rtx (enum machine_mode mode)
868 gcc_assert (can_create_pseudo_p ());
870 if (generating_concat_p
871 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
872 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
874 /* For complex modes, don't make a single pseudo.
875 Instead, make a CONCAT of two pseudos.
876 This allows noncontiguous allocation of the real and imaginary parts,
877 which makes much better code. Besides, allocating DCmode
878 pseudos overstrains reload on some machines like the 386. */
879 rtx realpart, imagpart;
880 enum machine_mode partmode = GET_MODE_INNER (mode);
882 realpart = gen_reg_rtx (partmode);
883 imagpart = gen_reg_rtx (partmode);
884 return gen_rtx_CONCAT (mode, realpart, imagpart);
887 /* Make sure regno_pointer_align, and regno_reg_rtx are large
888 enough to have an element for this pseudo reg number. */
890 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
892 int old_size = crtl->emit.regno_pointer_align_length;
896 new = xrealloc (crtl->emit.regno_pointer_align, old_size * 2);
897 memset (new + old_size, 0, old_size);
898 crtl->emit.regno_pointer_align = (unsigned char *) new;
900 new1 = ggc_realloc (regno_reg_rtx,
901 old_size * 2 * sizeof (rtx));
902 memset (new1 + old_size, 0, old_size * sizeof (rtx));
903 regno_reg_rtx = new1;
905 crtl->emit.regno_pointer_align_length = old_size * 2;
908 val = gen_raw_REG (mode, reg_rtx_no);
909 regno_reg_rtx[reg_rtx_no++] = val;
913 /* Update NEW with the same attributes as REG, but with OFFSET added
914 to the REG_OFFSET. */
917 update_reg_offset (rtx new, rtx reg, int offset)
919 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
920 REG_OFFSET (reg) + offset);
923 /* Generate a register with same attributes as REG, but with OFFSET
924 added to the REG_OFFSET. */
927 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
930 rtx new = gen_rtx_REG (mode, regno);
932 update_reg_offset (new, reg, offset);
936 /* Generate a new pseudo-register with the same attributes as REG, but
937 with OFFSET added to the REG_OFFSET. */
940 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
942 rtx new = gen_reg_rtx (mode);
944 update_reg_offset (new, reg, offset);
948 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
949 new register is a (possibly paradoxical) lowpart of the old one. */
952 adjust_reg_mode (rtx reg, enum machine_mode mode)
954 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
955 PUT_MODE (reg, mode);
958 /* Copy REG's attributes from X, if X has any attributes. If REG and X
959 have different modes, REG is a (possibly paradoxical) lowpart of X. */
962 set_reg_attrs_from_value (rtx reg, rtx x)
966 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
969 if (MEM_OFFSET (x) && GET_CODE (MEM_OFFSET (x)) == CONST_INT)
971 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
973 mark_reg_pointer (reg, MEM_ALIGN (x));
978 update_reg_offset (reg, x, offset);
980 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
984 /* Generate a REG rtx for a new pseudo register, copying the mode
985 and attributes from X. */
988 gen_reg_rtx_and_attrs (rtx x)
990 rtx reg = gen_reg_rtx (GET_MODE (x));
991 set_reg_attrs_from_value (reg, x);
995 /* Set the register attributes for registers contained in PARM_RTX.
996 Use needed values from memory attributes of MEM. */
999 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1001 if (REG_P (parm_rtx))
1002 set_reg_attrs_from_value (parm_rtx, mem);
1003 else if (GET_CODE (parm_rtx) == PARALLEL)
1005 /* Check for a NULL entry in the first slot, used to indicate that the
1006 parameter goes both on the stack and in registers. */
1007 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1008 for (; i < XVECLEN (parm_rtx, 0); i++)
1010 rtx x = XVECEXP (parm_rtx, 0, i);
1011 if (REG_P (XEXP (x, 0)))
1012 REG_ATTRS (XEXP (x, 0))
1013 = get_reg_attrs (MEM_EXPR (mem),
1014 INTVAL (XEXP (x, 1)));
1019 /* Set the REG_ATTRS for registers in value X, given that X represents
1023 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1025 if (GET_CODE (x) == SUBREG)
1027 gcc_assert (subreg_lowpart_p (x));
1032 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1034 if (GET_CODE (x) == CONCAT)
1036 if (REG_P (XEXP (x, 0)))
1037 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1038 if (REG_P (XEXP (x, 1)))
1039 REG_ATTRS (XEXP (x, 1))
1040 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1042 if (GET_CODE (x) == PARALLEL)
1046 /* Check for a NULL entry, used to indicate that the parameter goes
1047 both on the stack and in registers. */
1048 if (XEXP (XVECEXP (x, 0, 0), 0))
1053 for (i = start; i < XVECLEN (x, 0); i++)
1055 rtx y = XVECEXP (x, 0, i);
1056 if (REG_P (XEXP (y, 0)))
1057 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1062 /* Assign the RTX X to declaration T. */
1065 set_decl_rtl (tree t, rtx x)
1067 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1069 set_reg_attrs_for_decl_rtl (t, x);
1072 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1073 if the ABI requires the parameter to be passed by reference. */
1076 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1078 DECL_INCOMING_RTL (t) = x;
1079 if (x && !by_reference_p)
1080 set_reg_attrs_for_decl_rtl (t, x);
1083 /* Identify REG (which may be a CONCAT) as a user register. */
1086 mark_user_reg (rtx reg)
1088 if (GET_CODE (reg) == CONCAT)
1090 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1091 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1095 gcc_assert (REG_P (reg));
1096 REG_USERVAR_P (reg) = 1;
1100 /* Identify REG as a probable pointer register and show its alignment
1101 as ALIGN, if nonzero. */
1104 mark_reg_pointer (rtx reg, int align)
1106 if (! REG_POINTER (reg))
1108 REG_POINTER (reg) = 1;
1111 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1113 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1114 /* We can no-longer be sure just how aligned this pointer is. */
1115 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1118 /* Return 1 plus largest pseudo reg number used in the current function. */
1126 /* Return 1 + the largest label number used so far in the current function. */
1129 max_label_num (void)
1134 /* Return first label number used in this function (if any were used). */
1137 get_first_label_num (void)
1139 return first_label_num;
1142 /* If the rtx for label was created during the expansion of a nested
1143 function, then first_label_num won't include this label number.
1144 Fix this now so that array indices work later. */
1147 maybe_set_first_label_num (rtx x)
1149 if (CODE_LABEL_NUMBER (x) < first_label_num)
1150 first_label_num = CODE_LABEL_NUMBER (x);
1153 /* Return a value representing some low-order bits of X, where the number
1154 of low-order bits is given by MODE. Note that no conversion is done
1155 between floating-point and fixed-point values, rather, the bit
1156 representation is returned.
1158 This function handles the cases in common between gen_lowpart, below,
1159 and two variants in cse.c and combine.c. These are the cases that can
1160 be safely handled at all points in the compilation.
1162 If this is not a case we can handle, return 0. */
1165 gen_lowpart_common (enum machine_mode mode, rtx x)
1167 int msize = GET_MODE_SIZE (mode);
1170 enum machine_mode innermode;
1172 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1173 so we have to make one up. Yuk. */
1174 innermode = GET_MODE (x);
1175 if (GET_CODE (x) == CONST_INT
1176 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1177 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1178 else if (innermode == VOIDmode)
1179 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1181 xsize = GET_MODE_SIZE (innermode);
1183 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1185 if (innermode == mode)
1188 /* MODE must occupy no more words than the mode of X. */
1189 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1190 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1193 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1194 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1197 offset = subreg_lowpart_offset (mode, innermode);
1199 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1200 && (GET_MODE_CLASS (mode) == MODE_INT
1201 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1203 /* If we are getting the low-order part of something that has been
1204 sign- or zero-extended, we can either just use the object being
1205 extended or make a narrower extension. If we want an even smaller
1206 piece than the size of the object being extended, call ourselves
1209 This case is used mostly by combine and cse. */
1211 if (GET_MODE (XEXP (x, 0)) == mode)
1213 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1214 return gen_lowpart_common (mode, XEXP (x, 0));
1215 else if (msize < xsize)
1216 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1218 else if (GET_CODE (x) == SUBREG || REG_P (x)
1219 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1220 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1221 return simplify_gen_subreg (mode, x, innermode, offset);
1223 /* Otherwise, we can't do this. */
1228 gen_highpart (enum machine_mode mode, rtx x)
1230 unsigned int msize = GET_MODE_SIZE (mode);
1233 /* This case loses if X is a subreg. To catch bugs early,
1234 complain if an invalid MODE is used even in other cases. */
1235 gcc_assert (msize <= UNITS_PER_WORD
1236 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1238 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1239 subreg_highpart_offset (mode, GET_MODE (x)));
1240 gcc_assert (result);
1242 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1243 the target if we have a MEM. gen_highpart must return a valid operand,
1244 emitting code if necessary to do so. */
1247 result = validize_mem (result);
1248 gcc_assert (result);
1254 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1255 be VOIDmode constant. */
1257 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1259 if (GET_MODE (exp) != VOIDmode)
1261 gcc_assert (GET_MODE (exp) == innermode);
1262 return gen_highpart (outermode, exp);
1264 return simplify_gen_subreg (outermode, exp, innermode,
1265 subreg_highpart_offset (outermode, innermode));
1268 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1271 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1273 unsigned int offset = 0;
1274 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1278 if (WORDS_BIG_ENDIAN)
1279 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1280 if (BYTES_BIG_ENDIAN)
1281 offset += difference % UNITS_PER_WORD;
1287 /* Return offset in bytes to get OUTERMODE high part
1288 of the value in mode INNERMODE stored in memory in target format. */
1290 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1292 unsigned int offset = 0;
1293 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1295 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1299 if (! WORDS_BIG_ENDIAN)
1300 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1301 if (! BYTES_BIG_ENDIAN)
1302 offset += difference % UNITS_PER_WORD;
1308 /* Return 1 iff X, assumed to be a SUBREG,
1309 refers to the least significant part of its containing reg.
1310 If X is not a SUBREG, always return 1 (it is its own low part!). */
1313 subreg_lowpart_p (const_rtx x)
1315 if (GET_CODE (x) != SUBREG)
1317 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1320 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1321 == SUBREG_BYTE (x));
1324 /* Return subword OFFSET of operand OP.
1325 The word number, OFFSET, is interpreted as the word number starting
1326 at the low-order address. OFFSET 0 is the low-order word if not
1327 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1329 If we cannot extract the required word, we return zero. Otherwise,
1330 an rtx corresponding to the requested word will be returned.
1332 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1333 reload has completed, a valid address will always be returned. After
1334 reload, if a valid address cannot be returned, we return zero.
1336 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1337 it is the responsibility of the caller.
1339 MODE is the mode of OP in case it is a CONST_INT.
1341 ??? This is still rather broken for some cases. The problem for the
1342 moment is that all callers of this thing provide no 'goal mode' to
1343 tell us to work with. This exists because all callers were written
1344 in a word based SUBREG world.
1345 Now use of this function can be deprecated by simplify_subreg in most
1350 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1352 if (mode == VOIDmode)
1353 mode = GET_MODE (op);
1355 gcc_assert (mode != VOIDmode);
1357 /* If OP is narrower than a word, fail. */
1359 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1362 /* If we want a word outside OP, return zero. */
1364 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1367 /* Form a new MEM at the requested address. */
1370 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1372 if (! validate_address)
1375 else if (reload_completed)
1377 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1381 return replace_equiv_address (new, XEXP (new, 0));
1384 /* Rest can be handled by simplify_subreg. */
1385 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1388 /* Similar to `operand_subword', but never return 0. If we can't
1389 extract the required subword, put OP into a register and try again.
1390 The second attempt must succeed. We always validate the address in
1393 MODE is the mode of OP, in case it is CONST_INT. */
1396 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1398 rtx result = operand_subword (op, offset, 1, mode);
1403 if (mode != BLKmode && mode != VOIDmode)
1405 /* If this is a register which can not be accessed by words, copy it
1406 to a pseudo register. */
1408 op = copy_to_reg (op);
1410 op = force_reg (mode, op);
1413 result = operand_subword (op, offset, 1, mode);
1414 gcc_assert (result);
1419 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1420 or (2) a component ref of something variable. Represent the later with
1421 a NULL expression. */
1424 component_ref_for_mem_expr (tree ref)
1426 tree inner = TREE_OPERAND (ref, 0);
1428 if (TREE_CODE (inner) == COMPONENT_REF)
1429 inner = component_ref_for_mem_expr (inner);
1432 /* Now remove any conversions: they don't change what the underlying
1433 object is. Likewise for SAVE_EXPR. */
1434 while (CONVERT_EXPR_P (inner)
1435 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1436 || TREE_CODE (inner) == SAVE_EXPR)
1437 inner = TREE_OPERAND (inner, 0);
1439 if (! DECL_P (inner))
1443 if (inner == TREE_OPERAND (ref, 0))
1446 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1447 TREE_OPERAND (ref, 1), NULL_TREE);
1450 /* Returns 1 if both MEM_EXPR can be considered equal
1454 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1459 if (! expr1 || ! expr2)
1462 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1465 if (TREE_CODE (expr1) == COMPONENT_REF)
1467 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1468 TREE_OPERAND (expr2, 0))
1469 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1470 TREE_OPERAND (expr2, 1));
1472 if (INDIRECT_REF_P (expr1))
1473 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1474 TREE_OPERAND (expr2, 0));
1476 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1477 have been resolved here. */
1478 gcc_assert (DECL_P (expr1));
1480 /* Decls with different pointers can't be equal. */
1484 /* Given REF, a MEM, and T, either the type of X or the expression
1485 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1486 if we are making a new object of this type. BITPOS is nonzero if
1487 there is an offset outstanding on T that will be applied later. */
1490 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1491 HOST_WIDE_INT bitpos)
1493 alias_set_type alias = MEM_ALIAS_SET (ref);
1494 tree expr = MEM_EXPR (ref);
1495 rtx offset = MEM_OFFSET (ref);
1496 rtx size = MEM_SIZE (ref);
1497 unsigned int align = MEM_ALIGN (ref);
1498 HOST_WIDE_INT apply_bitpos = 0;
1501 /* It can happen that type_for_mode was given a mode for which there
1502 is no language-level type. In which case it returns NULL, which
1507 type = TYPE_P (t) ? t : TREE_TYPE (t);
1508 if (type == error_mark_node)
1511 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1512 wrong answer, as it assumes that DECL_RTL already has the right alias
1513 info. Callers should not set DECL_RTL until after the call to
1514 set_mem_attributes. */
1515 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1517 /* Get the alias set from the expression or type (perhaps using a
1518 front-end routine) and use it. */
1519 alias = get_alias_set (t);
1521 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1522 MEM_IN_STRUCT_P (ref)
1523 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1524 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1526 /* If we are making an object of this type, or if this is a DECL, we know
1527 that it is a scalar if the type is not an aggregate. */
1528 if ((objectp || DECL_P (t))
1529 && ! AGGREGATE_TYPE_P (type)
1530 && TREE_CODE (type) != COMPLEX_TYPE)
1531 MEM_SCALAR_P (ref) = 1;
1533 /* We can set the alignment from the type if we are making an object,
1534 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1535 if (objectp || TREE_CODE (t) == INDIRECT_REF
1536 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1537 || TYPE_ALIGN_OK (type))
1538 align = MAX (align, TYPE_ALIGN (type));
1540 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1542 if (integer_zerop (TREE_OPERAND (t, 1)))
1543 /* We don't know anything about the alignment. */
1544 align = BITS_PER_UNIT;
1546 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1549 /* If the size is known, we can set that. */
1550 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1551 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1553 /* If T is not a type, we may be able to deduce some more information about
1559 if (TREE_THIS_VOLATILE (t))
1560 MEM_VOLATILE_P (ref) = 1;
1562 /* Now remove any conversions: they don't change what the underlying
1563 object is. Likewise for SAVE_EXPR. */
1564 while (CONVERT_EXPR_P (t)
1565 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1566 || TREE_CODE (t) == SAVE_EXPR)
1567 t = TREE_OPERAND (t, 0);
1569 /* We may look through structure-like accesses for the purposes of
1570 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1572 while (TREE_CODE (base) == COMPONENT_REF
1573 || TREE_CODE (base) == REALPART_EXPR
1574 || TREE_CODE (base) == IMAGPART_EXPR
1575 || TREE_CODE (base) == BIT_FIELD_REF)
1576 base = TREE_OPERAND (base, 0);
1580 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1581 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1583 MEM_NOTRAP_P (ref) = 1;
1586 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1588 base = get_base_address (base);
1589 if (base && DECL_P (base)
1590 && TREE_READONLY (base)
1591 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1593 tree base_type = TREE_TYPE (base);
1594 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1595 || DECL_ARTIFICIAL (base));
1596 MEM_READONLY_P (ref) = 1;
1599 /* If this expression uses it's parent's alias set, mark it such
1600 that we won't change it. */
1601 if (component_uses_parent_alias_set (t))
1602 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1604 /* If this is a decl, set the attributes of the MEM from it. */
1608 offset = const0_rtx;
1609 apply_bitpos = bitpos;
1610 size = (DECL_SIZE_UNIT (t)
1611 && host_integerp (DECL_SIZE_UNIT (t), 1)
1612 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1613 align = DECL_ALIGN (t);
1616 /* If this is a constant, we know the alignment. */
1617 else if (CONSTANT_CLASS_P (t))
1619 align = TYPE_ALIGN (type);
1620 #ifdef CONSTANT_ALIGNMENT
1621 align = CONSTANT_ALIGNMENT (t, align);
1625 /* If this is a field reference and not a bit-field, record it. */
1626 /* ??? There is some information that can be gleaned from bit-fields,
1627 such as the word offset in the structure that might be modified.
1628 But skip it for now. */
1629 else if (TREE_CODE (t) == COMPONENT_REF
1630 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1632 expr = component_ref_for_mem_expr (t);
1633 offset = const0_rtx;
1634 apply_bitpos = bitpos;
1635 /* ??? Any reason the field size would be different than
1636 the size we got from the type? */
1639 /* If this is an array reference, look for an outer field reference. */
1640 else if (TREE_CODE (t) == ARRAY_REF)
1642 tree off_tree = size_zero_node;
1643 /* We can't modify t, because we use it at the end of the
1649 tree index = TREE_OPERAND (t2, 1);
1650 tree low_bound = array_ref_low_bound (t2);
1651 tree unit_size = array_ref_element_size (t2);
1653 /* We assume all arrays have sizes that are a multiple of a byte.
1654 First subtract the lower bound, if any, in the type of the
1655 index, then convert to sizetype and multiply by the size of
1656 the array element. */
1657 if (! integer_zerop (low_bound))
1658 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1661 off_tree = size_binop (PLUS_EXPR,
1662 size_binop (MULT_EXPR,
1663 fold_convert (sizetype,
1667 t2 = TREE_OPERAND (t2, 0);
1669 while (TREE_CODE (t2) == ARRAY_REF);
1675 if (host_integerp (off_tree, 1))
1677 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1678 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1679 align = DECL_ALIGN (t2);
1680 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1682 offset = GEN_INT (ioff);
1683 apply_bitpos = bitpos;
1686 else if (TREE_CODE (t2) == COMPONENT_REF)
1688 expr = component_ref_for_mem_expr (t2);
1689 if (host_integerp (off_tree, 1))
1691 offset = GEN_INT (tree_low_cst (off_tree, 1));
1692 apply_bitpos = bitpos;
1694 /* ??? Any reason the field size would be different than
1695 the size we got from the type? */
1697 else if (flag_argument_noalias > 1
1698 && (INDIRECT_REF_P (t2))
1699 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1706 /* If this is a Fortran indirect argument reference, record the
1708 else if (flag_argument_noalias > 1
1709 && (INDIRECT_REF_P (t))
1710 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1717 /* If we modified OFFSET based on T, then subtract the outstanding
1718 bit position offset. Similarly, increase the size of the accessed
1719 object to contain the negative offset. */
1722 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1724 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1727 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1729 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1730 we're overlapping. */
1735 /* Now set the attributes we computed above. */
1737 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1739 /* If this is already known to be a scalar or aggregate, we are done. */
1740 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1743 /* If it is a reference into an aggregate, this is part of an aggregate.
1744 Otherwise we don't know. */
1745 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1746 || TREE_CODE (t) == ARRAY_RANGE_REF
1747 || TREE_CODE (t) == BIT_FIELD_REF)
1748 MEM_IN_STRUCT_P (ref) = 1;
1752 set_mem_attributes (rtx ref, tree t, int objectp)
1754 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1757 /* Set MEM to the decl that REG refers to. */
1760 set_mem_attrs_from_reg (rtx mem, rtx reg)
1763 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1764 GEN_INT (REG_OFFSET (reg)),
1765 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1768 /* Set the alias set of MEM to SET. */
1771 set_mem_alias_set (rtx mem, alias_set_type set)
1773 #ifdef ENABLE_CHECKING
1774 /* If the new and old alias sets don't conflict, something is wrong. */
1775 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1778 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1779 MEM_SIZE (mem), MEM_ALIGN (mem),
1783 /* Set the alignment of MEM to ALIGN bits. */
1786 set_mem_align (rtx mem, unsigned int align)
1788 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1789 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1793 /* Set the expr for MEM to EXPR. */
1796 set_mem_expr (rtx mem, tree expr)
1799 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1800 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1803 /* Set the offset of MEM to OFFSET. */
1806 set_mem_offset (rtx mem, rtx offset)
1808 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1809 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1813 /* Set the size of MEM to SIZE. */
1816 set_mem_size (rtx mem, rtx size)
1818 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1819 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1823 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1824 and its address changed to ADDR. (VOIDmode means don't change the mode.
1825 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1826 returned memory location is required to be valid. The memory
1827 attributes are not changed. */
1830 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1834 gcc_assert (MEM_P (memref));
1835 if (mode == VOIDmode)
1836 mode = GET_MODE (memref);
1838 addr = XEXP (memref, 0);
1839 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1840 && (!validate || memory_address_p (mode, addr)))
1845 if (reload_in_progress || reload_completed)
1846 gcc_assert (memory_address_p (mode, addr));
1848 addr = memory_address (mode, addr);
1851 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1854 new = gen_rtx_MEM (mode, addr);
1855 MEM_COPY_ATTRIBUTES (new, memref);
1859 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1860 way we are changing MEMREF, so we only preserve the alias set. */
1863 change_address (rtx memref, enum machine_mode mode, rtx addr)
1865 rtx new = change_address_1 (memref, mode, addr, 1), size;
1866 enum machine_mode mmode = GET_MODE (new);
1869 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1870 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1872 /* If there are no changes, just return the original memory reference. */
1875 if (MEM_ATTRS (memref) == 0
1876 || (MEM_EXPR (memref) == NULL
1877 && MEM_OFFSET (memref) == NULL
1878 && MEM_SIZE (memref) == size
1879 && MEM_ALIGN (memref) == align))
1882 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1883 MEM_COPY_ATTRIBUTES (new, memref);
1887 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1892 /* Return a memory reference like MEMREF, but with its mode changed
1893 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1894 nonzero, the memory address is forced to be valid.
1895 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1896 and caller is responsible for adjusting MEMREF base register. */
1899 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1900 int validate, int adjust)
1902 rtx addr = XEXP (memref, 0);
1904 rtx memoffset = MEM_OFFSET (memref);
1906 unsigned int memalign = MEM_ALIGN (memref);
1908 /* If there are no changes, just return the original memory reference. */
1909 if (mode == GET_MODE (memref) && !offset
1910 && (!validate || memory_address_p (mode, addr)))
1913 /* ??? Prefer to create garbage instead of creating shared rtl.
1914 This may happen even if offset is nonzero -- consider
1915 (plus (plus reg reg) const_int) -- so do this always. */
1916 addr = copy_rtx (addr);
1920 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1921 object, we can merge it into the LO_SUM. */
1922 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1924 && (unsigned HOST_WIDE_INT) offset
1925 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1926 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1927 plus_constant (XEXP (addr, 1), offset));
1929 addr = plus_constant (addr, offset);
1932 new = change_address_1 (memref, mode, addr, validate);
1934 /* Compute the new values of the memory attributes due to this adjustment.
1935 We add the offsets and update the alignment. */
1937 memoffset = GEN_INT (offset + INTVAL (memoffset));
1939 /* Compute the new alignment by taking the MIN of the alignment and the
1940 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1945 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1947 /* We can compute the size in a number of ways. */
1948 if (GET_MODE (new) != BLKmode)
1949 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1950 else if (MEM_SIZE (memref))
1951 size = plus_constant (MEM_SIZE (memref), -offset);
1953 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1954 memoffset, size, memalign, GET_MODE (new));
1956 /* At some point, we should validate that this offset is within the object,
1957 if all the appropriate values are known. */
1961 /* Return a memory reference like MEMREF, but with its mode changed
1962 to MODE and its address changed to ADDR, which is assumed to be
1963 MEMREF offset by OFFSET bytes. If VALIDATE is
1964 nonzero, the memory address is forced to be valid. */
1967 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1968 HOST_WIDE_INT offset, int validate)
1970 memref = change_address_1 (memref, VOIDmode, addr, validate);
1971 return adjust_address_1 (memref, mode, offset, validate, 0);
1974 /* Return a memory reference like MEMREF, but whose address is changed by
1975 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1976 known to be in OFFSET (possibly 1). */
1979 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1981 rtx new, addr = XEXP (memref, 0);
1983 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1985 /* At this point we don't know _why_ the address is invalid. It
1986 could have secondary memory references, multiplies or anything.
1988 However, if we did go and rearrange things, we can wind up not
1989 being able to recognize the magic around pic_offset_table_rtx.
1990 This stuff is fragile, and is yet another example of why it is
1991 bad to expose PIC machinery too early. */
1992 if (! memory_address_p (GET_MODE (memref), new)
1993 && GET_CODE (addr) == PLUS
1994 && XEXP (addr, 0) == pic_offset_table_rtx)
1996 addr = force_reg (GET_MODE (addr), addr);
1997 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2000 update_temp_slot_address (XEXP (memref, 0), new);
2001 new = change_address_1 (memref, VOIDmode, new, 1);
2003 /* If there are no changes, just return the original memory reference. */
2007 /* Update the alignment to reflect the offset. Reset the offset, which
2010 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2011 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2016 /* Return a memory reference like MEMREF, but with its address changed to
2017 ADDR. The caller is asserting that the actual piece of memory pointed
2018 to is the same, just the form of the address is being changed, such as
2019 by putting something into a register. */
2022 replace_equiv_address (rtx memref, rtx addr)
2024 /* change_address_1 copies the memory attribute structure without change
2025 and that's exactly what we want here. */
2026 update_temp_slot_address (XEXP (memref, 0), addr);
2027 return change_address_1 (memref, VOIDmode, addr, 1);
2030 /* Likewise, but the reference is not required to be valid. */
2033 replace_equiv_address_nv (rtx memref, rtx addr)
2035 return change_address_1 (memref, VOIDmode, addr, 0);
2038 /* Return a memory reference like MEMREF, but with its mode widened to
2039 MODE and offset by OFFSET. This would be used by targets that e.g.
2040 cannot issue QImode memory operations and have to use SImode memory
2041 operations plus masking logic. */
2044 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2046 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2047 tree expr = MEM_EXPR (new);
2048 rtx memoffset = MEM_OFFSET (new);
2049 unsigned int size = GET_MODE_SIZE (mode);
2051 /* If there are no changes, just return the original memory reference. */
2055 /* If we don't know what offset we were at within the expression, then
2056 we can't know if we've overstepped the bounds. */
2062 if (TREE_CODE (expr) == COMPONENT_REF)
2064 tree field = TREE_OPERAND (expr, 1);
2065 tree offset = component_ref_field_offset (expr);
2067 if (! DECL_SIZE_UNIT (field))
2073 /* Is the field at least as large as the access? If so, ok,
2074 otherwise strip back to the containing structure. */
2075 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2076 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2077 && INTVAL (memoffset) >= 0)
2080 if (! host_integerp (offset, 1))
2086 expr = TREE_OPERAND (expr, 0);
2088 = (GEN_INT (INTVAL (memoffset)
2089 + tree_low_cst (offset, 1)
2090 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2093 /* Similarly for the decl. */
2094 else if (DECL_P (expr)
2095 && DECL_SIZE_UNIT (expr)
2096 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2097 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2098 && (! memoffset || INTVAL (memoffset) >= 0))
2102 /* The widened memory access overflows the expression, which means
2103 that it could alias another expression. Zap it. */
2110 memoffset = NULL_RTX;
2112 /* The widened memory may alias other stuff, so zap the alias set. */
2113 /* ??? Maybe use get_alias_set on any remaining expression. */
2115 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2116 MEM_ALIGN (new), mode);
2121 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2124 gen_label_rtx (void)
2126 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2127 NULL, label_num++, NULL);
2130 /* For procedure integration. */
2132 /* Install new pointers to the first and last insns in the chain.
2133 Also, set cur_insn_uid to one higher than the last in use.
2134 Used for an inline-procedure after copying the insn chain. */
2137 set_new_first_and_last_insn (rtx first, rtx last)
2145 for (insn = first; insn; insn = NEXT_INSN (insn))
2146 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2151 /* Go through all the RTL insn bodies and copy any invalid shared
2152 structure. This routine should only be called once. */
2155 unshare_all_rtl_1 (rtx insn)
2157 /* Unshare just about everything else. */
2158 unshare_all_rtl_in_chain (insn);
2160 /* Make sure the addresses of stack slots found outside the insn chain
2161 (such as, in DECL_RTL of a variable) are not shared
2162 with the insn chain.
2164 This special care is necessary when the stack slot MEM does not
2165 actually appear in the insn chain. If it does appear, its address
2166 is unshared from all else at that point. */
2167 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2170 /* Go through all the RTL insn bodies and copy any invalid shared
2171 structure, again. This is a fairly expensive thing to do so it
2172 should be done sparingly. */
2175 unshare_all_rtl_again (rtx insn)
2180 for (p = insn; p; p = NEXT_INSN (p))
2183 reset_used_flags (PATTERN (p));
2184 reset_used_flags (REG_NOTES (p));
2187 /* Make sure that virtual stack slots are not shared. */
2188 set_used_decls (DECL_INITIAL (cfun->decl));
2190 /* Make sure that virtual parameters are not shared. */
2191 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2192 set_used_flags (DECL_RTL (decl));
2194 reset_used_flags (stack_slot_list);
2196 unshare_all_rtl_1 (insn);
2200 unshare_all_rtl (void)
2202 unshare_all_rtl_1 (get_insns ());
2206 struct rtl_opt_pass pass_unshare_all_rtl =
2210 "unshare", /* name */
2212 unshare_all_rtl, /* execute */
2215 0, /* static_pass_number */
2217 0, /* properties_required */
2218 0, /* properties_provided */
2219 0, /* properties_destroyed */
2220 0, /* todo_flags_start */
2221 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2226 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2227 Recursively does the same for subexpressions. */
2230 verify_rtx_sharing (rtx orig, rtx insn)
2235 const char *format_ptr;
2240 code = GET_CODE (x);
2242 /* These types may be freely shared. */
2258 /* SCRATCH must be shared because they represent distinct values. */
2260 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2265 if (shared_const_p (orig))
2270 /* A MEM is allowed to be shared if its address is constant. */
2271 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2272 || reload_completed || reload_in_progress)
2281 /* This rtx may not be shared. If it has already been seen,
2282 replace it with a copy of itself. */
2283 #ifdef ENABLE_CHECKING
2284 if (RTX_FLAG (x, used))
2286 error ("invalid rtl sharing found in the insn");
2288 error ("shared rtx");
2290 internal_error ("internal consistency failure");
2293 gcc_assert (!RTX_FLAG (x, used));
2295 RTX_FLAG (x, used) = 1;
2297 /* Now scan the subexpressions recursively. */
2299 format_ptr = GET_RTX_FORMAT (code);
2301 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2303 switch (*format_ptr++)
2306 verify_rtx_sharing (XEXP (x, i), insn);
2310 if (XVEC (x, i) != NULL)
2313 int len = XVECLEN (x, i);
2315 for (j = 0; j < len; j++)
2317 /* We allow sharing of ASM_OPERANDS inside single
2319 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2320 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2322 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2324 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2333 /* Go through all the RTL insn bodies and check that there is no unexpected
2334 sharing in between the subexpressions. */
2337 verify_rtl_sharing (void)
2341 for (p = get_insns (); p; p = NEXT_INSN (p))
2344 reset_used_flags (PATTERN (p));
2345 reset_used_flags (REG_NOTES (p));
2346 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2349 rtx q, sequence = PATTERN (p);
2351 for (i = 0; i < XVECLEN (sequence, 0); i++)
2353 q = XVECEXP (sequence, 0, i);
2354 gcc_assert (INSN_P (q));
2355 reset_used_flags (PATTERN (q));
2356 reset_used_flags (REG_NOTES (q));
2361 for (p = get_insns (); p; p = NEXT_INSN (p))
2364 verify_rtx_sharing (PATTERN (p), p);
2365 verify_rtx_sharing (REG_NOTES (p), p);
2369 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2370 Assumes the mark bits are cleared at entry. */
2373 unshare_all_rtl_in_chain (rtx insn)
2375 for (; insn; insn = NEXT_INSN (insn))
2378 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2379 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2383 /* Go through all virtual stack slots of a function and mark them as
2384 shared. We never replace the DECL_RTLs themselves with a copy,
2385 but expressions mentioned into a DECL_RTL cannot be shared with
2386 expressions in the instruction stream.
2388 Note that reload may convert pseudo registers into memories in-place.
2389 Pseudo registers are always shared, but MEMs never are. Thus if we
2390 reset the used flags on MEMs in the instruction stream, we must set
2391 them again on MEMs that appear in DECL_RTLs. */
2394 set_used_decls (tree blk)
2399 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2400 if (DECL_RTL_SET_P (t))
2401 set_used_flags (DECL_RTL (t));
2403 /* Now process sub-blocks. */
2404 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2408 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2409 Recursively does the same for subexpressions. Uses
2410 copy_rtx_if_shared_1 to reduce stack space. */
2413 copy_rtx_if_shared (rtx orig)
2415 copy_rtx_if_shared_1 (&orig);
2419 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2420 use. Recursively does the same for subexpressions. */
2423 copy_rtx_if_shared_1 (rtx *orig1)
2429 const char *format_ptr;
2433 /* Repeat is used to turn tail-recursion into iteration. */
2440 code = GET_CODE (x);
2442 /* These types may be freely shared. */
2457 /* SCRATCH must be shared because they represent distinct values. */
2460 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2465 if (shared_const_p (x))
2474 /* The chain of insns is not being copied. */
2481 /* This rtx may not be shared. If it has already been seen,
2482 replace it with a copy of itself. */
2484 if (RTX_FLAG (x, used))
2486 x = shallow_copy_rtx (x);
2489 RTX_FLAG (x, used) = 1;
2491 /* Now scan the subexpressions recursively.
2492 We can store any replaced subexpressions directly into X
2493 since we know X is not shared! Any vectors in X
2494 must be copied if X was copied. */
2496 format_ptr = GET_RTX_FORMAT (code);
2497 length = GET_RTX_LENGTH (code);
2500 for (i = 0; i < length; i++)
2502 switch (*format_ptr++)
2506 copy_rtx_if_shared_1 (last_ptr);
2507 last_ptr = &XEXP (x, i);
2511 if (XVEC (x, i) != NULL)
2514 int len = XVECLEN (x, i);
2516 /* Copy the vector iff I copied the rtx and the length
2518 if (copied && len > 0)
2519 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2521 /* Call recursively on all inside the vector. */
2522 for (j = 0; j < len; j++)
2525 copy_rtx_if_shared_1 (last_ptr);
2526 last_ptr = &XVECEXP (x, i, j);
2541 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2542 to look for shared sub-parts. */
2545 reset_used_flags (rtx x)
2549 const char *format_ptr;
2552 /* Repeat is used to turn tail-recursion into iteration. */
2557 code = GET_CODE (x);
2559 /* These types may be freely shared so we needn't do any resetting
2581 /* The chain of insns is not being copied. */
2588 RTX_FLAG (x, used) = 0;
2590 format_ptr = GET_RTX_FORMAT (code);
2591 length = GET_RTX_LENGTH (code);
2593 for (i = 0; i < length; i++)
2595 switch (*format_ptr++)
2603 reset_used_flags (XEXP (x, i));
2607 for (j = 0; j < XVECLEN (x, i); j++)
2608 reset_used_flags (XVECEXP (x, i, j));
2614 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2615 to look for shared sub-parts. */
2618 set_used_flags (rtx x)
2622 const char *format_ptr;
2627 code = GET_CODE (x);
2629 /* These types may be freely shared so we needn't do any resetting
2651 /* The chain of insns is not being copied. */
2658 RTX_FLAG (x, used) = 1;
2660 format_ptr = GET_RTX_FORMAT (code);
2661 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2663 switch (*format_ptr++)
2666 set_used_flags (XEXP (x, i));
2670 for (j = 0; j < XVECLEN (x, i); j++)
2671 set_used_flags (XVECEXP (x, i, j));
2677 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2678 Return X or the rtx for the pseudo reg the value of X was copied into.
2679 OTHER must be valid as a SET_DEST. */
2682 make_safe_from (rtx x, rtx other)
2685 switch (GET_CODE (other))
2688 other = SUBREG_REG (other);
2690 case STRICT_LOW_PART:
2693 other = XEXP (other, 0);
2702 && GET_CODE (x) != SUBREG)
2704 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2705 || reg_mentioned_p (other, x))))
2707 rtx temp = gen_reg_rtx (GET_MODE (x));
2708 emit_move_insn (temp, x);
2714 /* Emission of insns (adding them to the doubly-linked list). */
2716 /* Return the first insn of the current sequence or current function. */
2724 /* Specify a new insn as the first in the chain. */
2727 set_first_insn (rtx insn)
2729 gcc_assert (!PREV_INSN (insn));
2733 /* Return the last insn emitted in current sequence or current function. */
2736 get_last_insn (void)
2741 /* Specify a new insn as the last in the chain. */
2744 set_last_insn (rtx insn)
2746 gcc_assert (!NEXT_INSN (insn));
2750 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2753 get_last_insn_anywhere (void)
2755 struct sequence_stack *stack;
2758 for (stack = seq_stack; stack; stack = stack->next)
2759 if (stack->last != 0)
2764 /* Return the first nonnote insn emitted in current sequence or current
2765 function. This routine looks inside SEQUENCEs. */
2768 get_first_nonnote_insn (void)
2770 rtx insn = first_insn;
2775 for (insn = next_insn (insn);
2776 insn && NOTE_P (insn);
2777 insn = next_insn (insn))
2781 if (NONJUMP_INSN_P (insn)
2782 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2783 insn = XVECEXP (PATTERN (insn), 0, 0);
2790 /* Return the last nonnote insn emitted in current sequence or current
2791 function. This routine looks inside SEQUENCEs. */
2794 get_last_nonnote_insn (void)
2796 rtx insn = last_insn;
2801 for (insn = previous_insn (insn);
2802 insn && NOTE_P (insn);
2803 insn = previous_insn (insn))
2807 if (NONJUMP_INSN_P (insn)
2808 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2809 insn = XVECEXP (PATTERN (insn), 0,
2810 XVECLEN (PATTERN (insn), 0) - 1);
2817 /* Return a number larger than any instruction's uid in this function. */
2822 return cur_insn_uid;
2825 /* Return the next insn. If it is a SEQUENCE, return the first insn
2829 next_insn (rtx insn)
2833 insn = NEXT_INSN (insn);
2834 if (insn && NONJUMP_INSN_P (insn)
2835 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2836 insn = XVECEXP (PATTERN (insn), 0, 0);
2842 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2846 previous_insn (rtx insn)
2850 insn = PREV_INSN (insn);
2851 if (insn && NONJUMP_INSN_P (insn)
2852 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2853 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2859 /* Return the next insn after INSN that is not a NOTE. This routine does not
2860 look inside SEQUENCEs. */
2863 next_nonnote_insn (rtx insn)
2867 insn = NEXT_INSN (insn);
2868 if (insn == 0 || !NOTE_P (insn))
2875 /* Return the previous insn before INSN that is not a NOTE. This routine does
2876 not look inside SEQUENCEs. */
2879 prev_nonnote_insn (rtx insn)
2883 insn = PREV_INSN (insn);
2884 if (insn == 0 || !NOTE_P (insn))
2891 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2892 or 0, if there is none. This routine does not look inside
2896 next_real_insn (rtx insn)
2900 insn = NEXT_INSN (insn);
2901 if (insn == 0 || INSN_P (insn))
2908 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2909 or 0, if there is none. This routine does not look inside
2913 prev_real_insn (rtx insn)
2917 insn = PREV_INSN (insn);
2918 if (insn == 0 || INSN_P (insn))
2925 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2926 This routine does not look inside SEQUENCEs. */
2929 last_call_insn (void)
2933 for (insn = get_last_insn ();
2934 insn && !CALL_P (insn);
2935 insn = PREV_INSN (insn))
2941 /* Find the next insn after INSN that really does something. This routine
2942 does not look inside SEQUENCEs. Until reload has completed, this is the
2943 same as next_real_insn. */
2946 active_insn_p (const_rtx insn)
2948 return (CALL_P (insn) || JUMP_P (insn)
2949 || (NONJUMP_INSN_P (insn)
2950 && (! reload_completed
2951 || (GET_CODE (PATTERN (insn)) != USE
2952 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2956 next_active_insn (rtx insn)
2960 insn = NEXT_INSN (insn);
2961 if (insn == 0 || active_insn_p (insn))
2968 /* Find the last insn before INSN that really does something. This routine
2969 does not look inside SEQUENCEs. Until reload has completed, this is the
2970 same as prev_real_insn. */
2973 prev_active_insn (rtx insn)
2977 insn = PREV_INSN (insn);
2978 if (insn == 0 || active_insn_p (insn))
2985 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2988 next_label (rtx insn)
2992 insn = NEXT_INSN (insn);
2993 if (insn == 0 || LABEL_P (insn))
3000 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3003 prev_label (rtx insn)
3007 insn = PREV_INSN (insn);
3008 if (insn == 0 || LABEL_P (insn))
3015 /* Return the last label to mark the same position as LABEL. Return null
3016 if LABEL itself is null. */
3019 skip_consecutive_labels (rtx label)
3023 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3031 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3032 and REG_CC_USER notes so we can find it. */
3035 link_cc0_insns (rtx insn)
3037 rtx user = next_nonnote_insn (insn);
3039 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3040 user = XVECEXP (PATTERN (user), 0, 0);
3042 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3044 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3047 /* Return the next insn that uses CC0 after INSN, which is assumed to
3048 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3049 applied to the result of this function should yield INSN).
3051 Normally, this is simply the next insn. However, if a REG_CC_USER note
3052 is present, it contains the insn that uses CC0.
3054 Return 0 if we can't find the insn. */
3057 next_cc0_user (rtx insn)
3059 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3062 return XEXP (note, 0);
3064 insn = next_nonnote_insn (insn);
3065 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3066 insn = XVECEXP (PATTERN (insn), 0, 0);
3068 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3074 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3075 note, it is the previous insn. */
3078 prev_cc0_setter (rtx insn)
3080 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3083 return XEXP (note, 0);
3085 insn = prev_nonnote_insn (insn);
3086 gcc_assert (sets_cc0_p (PATTERN (insn)));
3093 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3096 find_auto_inc (rtx *xp, void *data)
3101 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3104 switch (GET_CODE (x))
3112 if (rtx_equal_p (reg, XEXP (x, 0)))
3123 /* Increment the label uses for all labels present in rtx. */
3126 mark_label_nuses (rtx x)
3132 code = GET_CODE (x);
3133 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3134 LABEL_NUSES (XEXP (x, 0))++;
3136 fmt = GET_RTX_FORMAT (code);
3137 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3140 mark_label_nuses (XEXP (x, i));
3141 else if (fmt[i] == 'E')
3142 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3143 mark_label_nuses (XVECEXP (x, i, j));
3148 /* Try splitting insns that can be split for better scheduling.
3149 PAT is the pattern which might split.
3150 TRIAL is the insn providing PAT.
3151 LAST is nonzero if we should return the last insn of the sequence produced.
3153 If this routine succeeds in splitting, it returns the first or last
3154 replacement insn depending on the value of LAST. Otherwise, it
3155 returns TRIAL. If the insn to be returned can be split, it will be. */
3158 try_split (rtx pat, rtx trial, int last)
3160 rtx before = PREV_INSN (trial);
3161 rtx after = NEXT_INSN (trial);
3162 int has_barrier = 0;
3165 rtx insn_last, insn;
3168 if (any_condjump_p (trial)
3169 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3170 split_branch_probability = INTVAL (XEXP (note, 0));
3171 probability = split_branch_probability;
3173 seq = split_insns (pat, trial);
3175 split_branch_probability = -1;
3177 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3178 We may need to handle this specially. */
3179 if (after && BARRIER_P (after))
3182 after = NEXT_INSN (after);
3188 /* Avoid infinite loop if any insn of the result matches
3189 the original pattern. */
3193 if (INSN_P (insn_last)
3194 && rtx_equal_p (PATTERN (insn_last), pat))
3196 if (!NEXT_INSN (insn_last))
3198 insn_last = NEXT_INSN (insn_last);
3201 /* We will be adding the new sequence to the function. The splitters
3202 may have introduced invalid RTL sharing, so unshare the sequence now. */
3203 unshare_all_rtl_in_chain (seq);
3206 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3210 mark_jump_label (PATTERN (insn), insn, 0);
3212 if (probability != -1
3213 && any_condjump_p (insn)
3214 && !find_reg_note (insn, REG_BR_PROB, 0))
3216 /* We can preserve the REG_BR_PROB notes only if exactly
3217 one jump is created, otherwise the machine description
3218 is responsible for this step using
3219 split_branch_probability variable. */
3220 gcc_assert (njumps == 1);
3222 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3223 GEN_INT (probability),
3229 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3230 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3233 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3236 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3239 *p = CALL_INSN_FUNCTION_USAGE (trial);
3240 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3244 /* Copy notes, particularly those related to the CFG. */
3245 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3247 switch (REG_NOTE_KIND (note))
3250 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3253 || (flag_non_call_exceptions && INSN_P (insn)
3254 && may_trap_p (PATTERN (insn))))
3256 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3264 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3268 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3274 case REG_NON_LOCAL_GOTO:
3275 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3279 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3287 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3289 rtx reg = XEXP (note, 0);
3290 if (!FIND_REG_INC_NOTE (insn, reg)
3291 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3292 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, reg,
3303 /* If there are LABELS inside the split insns increment the
3304 usage count so we don't delete the label. */
3308 while (insn != NULL_RTX)
3310 /* JUMP_P insns have already been "marked" above. */
3311 if (NONJUMP_INSN_P (insn))
3312 mark_label_nuses (PATTERN (insn));
3314 insn = PREV_INSN (insn);
3318 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3320 delete_insn (trial);
3322 emit_barrier_after (tem);
3324 /* Recursively call try_split for each new insn created; by the
3325 time control returns here that insn will be fully split, so
3326 set LAST and continue from the insn after the one returned.
3327 We can't use next_active_insn here since AFTER may be a note.
3328 Ignore deleted insns, which can be occur if not optimizing. */
3329 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3330 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3331 tem = try_split (PATTERN (tem), tem, 1);
3333 /* Return either the first or the last insn, depending on which was
3336 ? (after ? PREV_INSN (after) : last_insn)
3337 : NEXT_INSN (before);
3340 /* Make and return an INSN rtx, initializing all its slots.
3341 Store PATTERN in the pattern slots. */
3344 make_insn_raw (rtx pattern)
3348 insn = rtx_alloc (INSN);
3350 INSN_UID (insn) = cur_insn_uid++;
3351 PATTERN (insn) = pattern;
3352 INSN_CODE (insn) = -1;
3353 REG_NOTES (insn) = NULL;
3354 INSN_LOCATOR (insn) = curr_insn_locator ();
3355 BLOCK_FOR_INSN (insn) = NULL;
3357 #ifdef ENABLE_RTL_CHECKING
3360 && (returnjump_p (insn)
3361 || (GET_CODE (insn) == SET
3362 && SET_DEST (insn) == pc_rtx)))
3364 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3372 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3375 make_jump_insn_raw (rtx pattern)
3379 insn = rtx_alloc (JUMP_INSN);
3380 INSN_UID (insn) = cur_insn_uid++;
3382 PATTERN (insn) = pattern;
3383 INSN_CODE (insn) = -1;
3384 REG_NOTES (insn) = NULL;
3385 JUMP_LABEL (insn) = NULL;
3386 INSN_LOCATOR (insn) = curr_insn_locator ();
3387 BLOCK_FOR_INSN (insn) = NULL;
3392 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3395 make_call_insn_raw (rtx pattern)
3399 insn = rtx_alloc (CALL_INSN);
3400 INSN_UID (insn) = cur_insn_uid++;
3402 PATTERN (insn) = pattern;
3403 INSN_CODE (insn) = -1;
3404 REG_NOTES (insn) = NULL;
3405 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3406 INSN_LOCATOR (insn) = curr_insn_locator ();
3407 BLOCK_FOR_INSN (insn) = NULL;
3412 /* Add INSN to the end of the doubly-linked list.
3413 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3418 PREV_INSN (insn) = last_insn;
3419 NEXT_INSN (insn) = 0;
3421 if (NULL != last_insn)
3422 NEXT_INSN (last_insn) = insn;
3424 if (NULL == first_insn)
3430 /* Add INSN into the doubly-linked list after insn AFTER. This and
3431 the next should be the only functions called to insert an insn once
3432 delay slots have been filled since only they know how to update a
3436 add_insn_after (rtx insn, rtx after, basic_block bb)
3438 rtx next = NEXT_INSN (after);
3440 gcc_assert (!optimize || !INSN_DELETED_P (after));
3442 NEXT_INSN (insn) = next;
3443 PREV_INSN (insn) = after;
3447 PREV_INSN (next) = insn;
3448 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3449 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3451 else if (last_insn == after)
3455 struct sequence_stack *stack = seq_stack;
3456 /* Scan all pending sequences too. */
3457 for (; stack; stack = stack->next)
3458 if (after == stack->last)
3467 if (!BARRIER_P (after)
3468 && !BARRIER_P (insn)
3469 && (bb = BLOCK_FOR_INSN (after)))
3471 set_block_for_insn (insn, bb);
3473 df_insn_rescan (insn);
3474 /* Should not happen as first in the BB is always
3475 either NOTE or LABEL. */
3476 if (BB_END (bb) == after
3477 /* Avoid clobbering of structure when creating new BB. */
3478 && !BARRIER_P (insn)
3479 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3483 NEXT_INSN (after) = insn;
3484 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3486 rtx sequence = PATTERN (after);
3487 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3491 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3492 the previous should be the only functions called to insert an insn
3493 once delay slots have been filled since only they know how to
3494 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3498 add_insn_before (rtx insn, rtx before, basic_block bb)
3500 rtx prev = PREV_INSN (before);
3502 gcc_assert (!optimize || !INSN_DELETED_P (before));
3504 PREV_INSN (insn) = prev;
3505 NEXT_INSN (insn) = before;
3509 NEXT_INSN (prev) = insn;
3510 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3512 rtx sequence = PATTERN (prev);
3513 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3516 else if (first_insn == before)
3520 struct sequence_stack *stack = seq_stack;
3521 /* Scan all pending sequences too. */
3522 for (; stack; stack = stack->next)
3523 if (before == stack->first)
3525 stack->first = insn;
3533 && !BARRIER_P (before)
3534 && !BARRIER_P (insn))
3535 bb = BLOCK_FOR_INSN (before);
3539 set_block_for_insn (insn, bb);
3541 df_insn_rescan (insn);
3542 /* Should not happen as first in the BB is always either NOTE or
3544 gcc_assert (BB_HEAD (bb) != insn
3545 /* Avoid clobbering of structure when creating new BB. */
3547 || NOTE_INSN_BASIC_BLOCK_P (insn));
3550 PREV_INSN (before) = insn;
3551 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3552 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3556 /* Replace insn with an deleted instruction note. */
3558 void set_insn_deleted (rtx insn)
3560 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3561 PUT_CODE (insn, NOTE);
3562 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3566 /* Remove an insn from its doubly-linked list. This function knows how
3567 to handle sequences. */
3569 remove_insn (rtx insn)
3571 rtx next = NEXT_INSN (insn);
3572 rtx prev = PREV_INSN (insn);
3575 /* Later in the code, the block will be marked dirty. */
3576 df_insn_delete (NULL, INSN_UID (insn));
3580 NEXT_INSN (prev) = next;
3581 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3583 rtx sequence = PATTERN (prev);
3584 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3587 else if (first_insn == insn)
3591 struct sequence_stack *stack = seq_stack;
3592 /* Scan all pending sequences too. */
3593 for (; stack; stack = stack->next)
3594 if (insn == stack->first)
3596 stack->first = next;
3605 PREV_INSN (next) = prev;
3606 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3607 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3609 else if (last_insn == insn)
3613 struct sequence_stack *stack = seq_stack;
3614 /* Scan all pending sequences too. */
3615 for (; stack; stack = stack->next)
3616 if (insn == stack->last)
3624 if (!BARRIER_P (insn)
3625 && (bb = BLOCK_FOR_INSN (insn)))
3628 df_set_bb_dirty (bb);
3629 if (BB_HEAD (bb) == insn)
3631 /* Never ever delete the basic block note without deleting whole
3633 gcc_assert (!NOTE_P (insn));
3634 BB_HEAD (bb) = next;
3636 if (BB_END (bb) == insn)
3641 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3644 add_function_usage_to (rtx call_insn, rtx call_fusage)
3646 gcc_assert (call_insn && CALL_P (call_insn));
3648 /* Put the register usage information on the CALL. If there is already
3649 some usage information, put ours at the end. */
3650 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3654 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3655 link = XEXP (link, 1))
3658 XEXP (link, 1) = call_fusage;
3661 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3664 /* Delete all insns made since FROM.
3665 FROM becomes the new last instruction. */
3668 delete_insns_since (rtx from)
3673 NEXT_INSN (from) = 0;
3677 /* This function is deprecated, please use sequences instead.
3679 Move a consecutive bunch of insns to a different place in the chain.
3680 The insns to be moved are those between FROM and TO.
3681 They are moved to a new position after the insn AFTER.
3682 AFTER must not be FROM or TO or any insn in between.
3684 This function does not know about SEQUENCEs and hence should not be
3685 called after delay-slot filling has been done. */
3688 reorder_insns_nobb (rtx from, rtx to, rtx after)
3690 /* Splice this bunch out of where it is now. */
3691 if (PREV_INSN (from))
3692 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3694 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3695 if (last_insn == to)
3696 last_insn = PREV_INSN (from);
3697 if (first_insn == from)
3698 first_insn = NEXT_INSN (to);
3700 /* Make the new neighbors point to it and it to them. */
3701 if (NEXT_INSN (after))
3702 PREV_INSN (NEXT_INSN (after)) = to;
3704 NEXT_INSN (to) = NEXT_INSN (after);
3705 PREV_INSN (from) = after;
3706 NEXT_INSN (after) = from;
3707 if (after == last_insn)
3711 /* Same as function above, but take care to update BB boundaries. */
3713 reorder_insns (rtx from, rtx to, rtx after)
3715 rtx prev = PREV_INSN (from);
3716 basic_block bb, bb2;
3718 reorder_insns_nobb (from, to, after);
3720 if (!BARRIER_P (after)
3721 && (bb = BLOCK_FOR_INSN (after)))
3724 df_set_bb_dirty (bb);
3726 if (!BARRIER_P (from)
3727 && (bb2 = BLOCK_FOR_INSN (from)))
3729 if (BB_END (bb2) == to)
3730 BB_END (bb2) = prev;
3731 df_set_bb_dirty (bb2);
3734 if (BB_END (bb) == after)
3737 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3739 df_insn_change_bb (x, bb);
3744 /* Emit insn(s) of given code and pattern
3745 at a specified place within the doubly-linked list.
3747 All of the emit_foo global entry points accept an object
3748 X which is either an insn list or a PATTERN of a single
3751 There are thus a few canonical ways to generate code and
3752 emit it at a specific place in the instruction stream. For
3753 example, consider the instruction named SPOT and the fact that
3754 we would like to emit some instructions before SPOT. We might
3758 ... emit the new instructions ...
3759 insns_head = get_insns ();
3762 emit_insn_before (insns_head, SPOT);
3764 It used to be common to generate SEQUENCE rtl instead, but that
3765 is a relic of the past which no longer occurs. The reason is that
3766 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3767 generated would almost certainly die right after it was created. */
3769 /* Make X be output before the instruction BEFORE. */
3772 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
3777 gcc_assert (before);
3782 switch (GET_CODE (x))
3793 rtx next = NEXT_INSN (insn);
3794 add_insn_before (insn, before, bb);
3800 #ifdef ENABLE_RTL_CHECKING
3807 last = make_insn_raw (x);
3808 add_insn_before (last, before, bb);
3815 /* Make an instruction with body X and code JUMP_INSN
3816 and output it before the instruction BEFORE. */
3819 emit_jump_insn_before_noloc (rtx x, rtx before)
3821 rtx insn, last = NULL_RTX;
3823 gcc_assert (before);
3825 switch (GET_CODE (x))
3836 rtx next = NEXT_INSN (insn);
3837 add_insn_before (insn, before, NULL);
3843 #ifdef ENABLE_RTL_CHECKING
3850 last = make_jump_insn_raw (x);
3851 add_insn_before (last, before, NULL);
3858 /* Make an instruction with body X and code CALL_INSN
3859 and output it before the instruction BEFORE. */
3862 emit_call_insn_before_noloc (rtx x, rtx before)
3864 rtx last = NULL_RTX, insn;
3866 gcc_assert (before);
3868 switch (GET_CODE (x))
3879 rtx next = NEXT_INSN (insn);
3880 add_insn_before (insn, before, NULL);
3886 #ifdef ENABLE_RTL_CHECKING
3893 last = make_call_insn_raw (x);
3894 add_insn_before (last, before, NULL);
3901 /* Make an insn of code BARRIER
3902 and output it before the insn BEFORE. */
3905 emit_barrier_before (rtx before)
3907 rtx insn = rtx_alloc (BARRIER);
3909 INSN_UID (insn) = cur_insn_uid++;
3911 add_insn_before (insn, before, NULL);
3915 /* Emit the label LABEL before the insn BEFORE. */
3918 emit_label_before (rtx label, rtx before)
3920 /* This can be called twice for the same label as a result of the
3921 confusion that follows a syntax error! So make it harmless. */
3922 if (INSN_UID (label) == 0)
3924 INSN_UID (label) = cur_insn_uid++;
3925 add_insn_before (label, before, NULL);
3931 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3934 emit_note_before (enum insn_note subtype, rtx before)
3936 rtx note = rtx_alloc (NOTE);
3937 INSN_UID (note) = cur_insn_uid++;
3938 NOTE_KIND (note) = subtype;
3939 BLOCK_FOR_INSN (note) = NULL;
3940 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
3942 add_insn_before (note, before, NULL);
3946 /* Helper for emit_insn_after, handles lists of instructions
3950 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
3954 if (!bb && !BARRIER_P (after))
3955 bb = BLOCK_FOR_INSN (after);
3959 df_set_bb_dirty (bb);
3960 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3961 if (!BARRIER_P (last))
3963 set_block_for_insn (last, bb);
3964 df_insn_rescan (last);
3966 if (!BARRIER_P (last))
3968 set_block_for_insn (last, bb);
3969 df_insn_rescan (last);
3971 if (BB_END (bb) == after)
3975 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3978 after_after = NEXT_INSN (after);
3980 NEXT_INSN (after) = first;
3981 PREV_INSN (first) = after;
3982 NEXT_INSN (last) = after_after;
3984 PREV_INSN (after_after) = last;
3986 if (after == last_insn)
3991 /* Make X be output after the insn AFTER and set the BB of insn. If
3992 BB is NULL, an attempt is made to infer the BB from AFTER. */
3995 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4004 switch (GET_CODE (x))
4012 last = emit_insn_after_1 (x, after, bb);
4015 #ifdef ENABLE_RTL_CHECKING
4022 last = make_insn_raw (x);
4023 add_insn_after (last, after, bb);
4031 /* Make an insn of code JUMP_INSN with body X
4032 and output it after the insn AFTER. */
4035 emit_jump_insn_after_noloc (rtx x, rtx after)
4041 switch (GET_CODE (x))
4049 last = emit_insn_after_1 (x, after, NULL);
4052 #ifdef ENABLE_RTL_CHECKING
4059 last = make_jump_insn_raw (x);
4060 add_insn_after (last, after, NULL);
4067 /* Make an instruction with body X and code CALL_INSN
4068 and output it after the instruction AFTER. */
4071 emit_call_insn_after_noloc (rtx x, rtx after)
4077 switch (GET_CODE (x))
4085 last = emit_insn_after_1 (x, after, NULL);
4088 #ifdef ENABLE_RTL_CHECKING
4095 last = make_call_insn_raw (x);
4096 add_insn_after (last, after, NULL);
4103 /* Make an insn of code BARRIER
4104 and output it after the insn AFTER. */
4107 emit_barrier_after (rtx after)
4109 rtx insn = rtx_alloc (BARRIER);
4111 INSN_UID (insn) = cur_insn_uid++;
4113 add_insn_after (insn, after, NULL);
4117 /* Emit the label LABEL after the insn AFTER. */
4120 emit_label_after (rtx label, rtx after)
4122 /* This can be called twice for the same label
4123 as a result of the confusion that follows a syntax error!
4124 So make it harmless. */
4125 if (INSN_UID (label) == 0)
4127 INSN_UID (label) = cur_insn_uid++;
4128 add_insn_after (label, after, NULL);
4134 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4137 emit_note_after (enum insn_note subtype, rtx after)
4139 rtx note = rtx_alloc (NOTE);
4140 INSN_UID (note) = cur_insn_uid++;
4141 NOTE_KIND (note) = subtype;
4142 BLOCK_FOR_INSN (note) = NULL;
4143 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4144 add_insn_after (note, after, NULL);
4148 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4150 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4152 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4154 if (pattern == NULL_RTX || !loc)
4157 after = NEXT_INSN (after);
4160 if (active_insn_p (after) && !INSN_LOCATOR (after))
4161 INSN_LOCATOR (after) = loc;
4164 after = NEXT_INSN (after);
4169 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4171 emit_insn_after (rtx pattern, rtx after)
4174 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4176 return emit_insn_after_noloc (pattern, after, NULL);
4179 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4181 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4183 rtx last = emit_jump_insn_after_noloc (pattern, after);
4185 if (pattern == NULL_RTX || !loc)
4188 after = NEXT_INSN (after);
4191 if (active_insn_p (after) && !INSN_LOCATOR (after))
4192 INSN_LOCATOR (after) = loc;
4195 after = NEXT_INSN (after);
4200 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4202 emit_jump_insn_after (rtx pattern, rtx after)
4205 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4207 return emit_jump_insn_after_noloc (pattern, after);
4210 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4212 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4214 rtx last = emit_call_insn_after_noloc (pattern, after);
4216 if (pattern == NULL_RTX || !loc)
4219 after = NEXT_INSN (after);
4222 if (active_insn_p (after) && !INSN_LOCATOR (after))
4223 INSN_LOCATOR (after) = loc;
4226 after = NEXT_INSN (after);
4231 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4233 emit_call_insn_after (rtx pattern, rtx after)
4236 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4238 return emit_call_insn_after_noloc (pattern, after);
4241 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4243 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4245 rtx first = PREV_INSN (before);
4246 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4248 if (pattern == NULL_RTX || !loc)
4252 first = get_insns ();
4254 first = NEXT_INSN (first);
4257 if (active_insn_p (first) && !INSN_LOCATOR (first))
4258 INSN_LOCATOR (first) = loc;
4261 first = NEXT_INSN (first);
4266 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4268 emit_insn_before (rtx pattern, rtx before)
4270 if (INSN_P (before))
4271 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4273 return emit_insn_before_noloc (pattern, before, NULL);
4276 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4278 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4280 rtx first = PREV_INSN (before);
4281 rtx last = emit_jump_insn_before_noloc (pattern, before);
4283 if (pattern == NULL_RTX)
4286 first = NEXT_INSN (first);
4289 if (active_insn_p (first) && !INSN_LOCATOR (first))
4290 INSN_LOCATOR (first) = loc;
4293 first = NEXT_INSN (first);
4298 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4300 emit_jump_insn_before (rtx pattern, rtx before)
4302 if (INSN_P (before))
4303 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4305 return emit_jump_insn_before_noloc (pattern, before);
4308 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4310 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4312 rtx first = PREV_INSN (before);
4313 rtx last = emit_call_insn_before_noloc (pattern, before);
4315 if (pattern == NULL_RTX)
4318 first = NEXT_INSN (first);
4321 if (active_insn_p (first) && !INSN_LOCATOR (first))
4322 INSN_LOCATOR (first) = loc;
4325 first = NEXT_INSN (first);
4330 /* like emit_call_insn_before_noloc,
4331 but set insn_locator according to before. */
4333 emit_call_insn_before (rtx pattern, rtx before)
4335 if (INSN_P (before))
4336 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4338 return emit_call_insn_before_noloc (pattern, before);
4341 /* Take X and emit it at the end of the doubly-linked
4344 Returns the last insn emitted. */
4349 rtx last = last_insn;
4355 switch (GET_CODE (x))
4366 rtx next = NEXT_INSN (insn);
4373 #ifdef ENABLE_RTL_CHECKING
4380 last = make_insn_raw (x);
4388 /* Make an insn of code JUMP_INSN with pattern X
4389 and add it to the end of the doubly-linked list. */
4392 emit_jump_insn (rtx x)
4394 rtx last = NULL_RTX, insn;
4396 switch (GET_CODE (x))
4407 rtx next = NEXT_INSN (insn);
4414 #ifdef ENABLE_RTL_CHECKING
4421 last = make_jump_insn_raw (x);
4429 /* Make an insn of code CALL_INSN with pattern X
4430 and add it to the end of the doubly-linked list. */
4433 emit_call_insn (rtx x)
4437 switch (GET_CODE (x))
4445 insn = emit_insn (x);
4448 #ifdef ENABLE_RTL_CHECKING
4455 insn = make_call_insn_raw (x);
4463 /* Add the label LABEL to the end of the doubly-linked list. */
4466 emit_label (rtx label)
4468 /* This can be called twice for the same label
4469 as a result of the confusion that follows a syntax error!
4470 So make it harmless. */
4471 if (INSN_UID (label) == 0)
4473 INSN_UID (label) = cur_insn_uid++;
4479 /* Make an insn of code BARRIER
4480 and add it to the end of the doubly-linked list. */
4485 rtx barrier = rtx_alloc (BARRIER);
4486 INSN_UID (barrier) = cur_insn_uid++;
4491 /* Emit a copy of note ORIG. */
4494 emit_note_copy (rtx orig)
4498 note = rtx_alloc (NOTE);
4500 INSN_UID (note) = cur_insn_uid++;
4501 NOTE_DATA (note) = NOTE_DATA (orig);
4502 NOTE_KIND (note) = NOTE_KIND (orig);
4503 BLOCK_FOR_INSN (note) = NULL;
4509 /* Make an insn of code NOTE or type NOTE_NO
4510 and add it to the end of the doubly-linked list. */
4513 emit_note (enum insn_note kind)
4517 note = rtx_alloc (NOTE);
4518 INSN_UID (note) = cur_insn_uid++;
4519 NOTE_KIND (note) = kind;
4520 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4521 BLOCK_FOR_INSN (note) = NULL;
4526 /* Emit a clobber of lvalue X. */
4529 emit_clobber (rtx x)
4531 /* CONCATs should not appear in the insn stream. */
4532 if (GET_CODE (x) == CONCAT)
4534 emit_clobber (XEXP (x, 0));
4535 return emit_clobber (XEXP (x, 1));
4537 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4540 /* Return a sequence of insns to clobber lvalue X. */
4554 /* Emit a use of rvalue X. */
4559 /* CONCATs should not appear in the insn stream. */
4560 if (GET_CODE (x) == CONCAT)
4562 emit_use (XEXP (x, 0));
4563 return emit_use (XEXP (x, 1));
4565 return emit_insn (gen_rtx_USE (VOIDmode, x));
4568 /* Return a sequence of insns to use rvalue X. */
4582 /* Cause next statement to emit a line note even if the line number
4586 force_next_line_note (void)
4591 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4592 note of this type already exists, remove it first. */
4595 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4597 rtx note = find_reg_note (insn, kind, NULL_RTX);
4598 rtx new_note = NULL;
4604 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4605 has multiple sets (some callers assume single_set
4606 means the insn only has one set, when in fact it
4607 means the insn only has one * useful * set). */
4608 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4614 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4615 It serves no useful purpose and breaks eliminate_regs. */
4616 if (GET_CODE (datum) == ASM_OPERANDS)
4621 XEXP (note, 0) = datum;
4622 df_notes_rescan (insn);
4630 XEXP (note, 0) = datum;
4636 new_note = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4637 REG_NOTES (insn) = new_note;
4643 df_notes_rescan (insn);
4649 return REG_NOTES (insn);
4652 /* Return an indication of which type of insn should have X as a body.
4653 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4655 static enum rtx_code
4656 classify_insn (rtx x)
4660 if (GET_CODE (x) == CALL)
4662 if (GET_CODE (x) == RETURN)
4664 if (GET_CODE (x) == SET)
4666 if (SET_DEST (x) == pc_rtx)
4668 else if (GET_CODE (SET_SRC (x)) == CALL)
4673 if (GET_CODE (x) == PARALLEL)
4676 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4677 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4679 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4680 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4682 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4683 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4689 /* Emit the rtl pattern X as an appropriate kind of insn.
4690 If X is a label, it is simply added into the insn chain. */
4695 enum rtx_code code = classify_insn (x);
4700 return emit_label (x);
4702 return emit_insn (x);
4705 rtx insn = emit_jump_insn (x);
4706 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4707 return emit_barrier ();
4711 return emit_call_insn (x);
4717 /* Space for free sequence stack entries. */
4718 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4720 /* Begin emitting insns to a sequence. If this sequence will contain
4721 something that might cause the compiler to pop arguments to function
4722 calls (because those pops have previously been deferred; see
4723 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4724 before calling this function. That will ensure that the deferred
4725 pops are not accidentally emitted in the middle of this sequence. */
4728 start_sequence (void)
4730 struct sequence_stack *tem;
4732 if (free_sequence_stack != NULL)
4734 tem = free_sequence_stack;
4735 free_sequence_stack = tem->next;
4738 tem = ggc_alloc (sizeof (struct sequence_stack));
4740 tem->next = seq_stack;
4741 tem->first = first_insn;
4742 tem->last = last_insn;
4750 /* Set up the insn chain starting with FIRST as the current sequence,
4751 saving the previously current one. See the documentation for
4752 start_sequence for more information about how to use this function. */
4755 push_to_sequence (rtx first)
4761 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4767 /* Like push_to_sequence, but take the last insn as an argument to avoid
4768 looping through the list. */
4771 push_to_sequence2 (rtx first, rtx last)
4779 /* Set up the outer-level insn chain
4780 as the current sequence, saving the previously current one. */
4783 push_topmost_sequence (void)
4785 struct sequence_stack *stack, *top = NULL;
4789 for (stack = seq_stack; stack; stack = stack->next)
4792 first_insn = top->first;
4793 last_insn = top->last;
4796 /* After emitting to the outer-level insn chain, update the outer-level
4797 insn chain, and restore the previous saved state. */
4800 pop_topmost_sequence (void)
4802 struct sequence_stack *stack, *top = NULL;
4804 for (stack = seq_stack; stack; stack = stack->next)
4807 top->first = first_insn;
4808 top->last = last_insn;
4813 /* After emitting to a sequence, restore previous saved state.
4815 To get the contents of the sequence just made, you must call
4816 `get_insns' *before* calling here.
4818 If the compiler might have deferred popping arguments while
4819 generating this sequence, and this sequence will not be immediately
4820 inserted into the instruction stream, use do_pending_stack_adjust
4821 before calling get_insns. That will ensure that the deferred
4822 pops are inserted into this sequence, and not into some random
4823 location in the instruction stream. See INHIBIT_DEFER_POP for more
4824 information about deferred popping of arguments. */
4829 struct sequence_stack *tem = seq_stack;
4831 first_insn = tem->first;
4832 last_insn = tem->last;
4833 seq_stack = tem->next;
4835 memset (tem, 0, sizeof (*tem));
4836 tem->next = free_sequence_stack;
4837 free_sequence_stack = tem;
4840 /* Return 1 if currently emitting into a sequence. */
4843 in_sequence_p (void)
4845 return seq_stack != 0;
4848 /* Put the various virtual registers into REGNO_REG_RTX. */
4851 init_virtual_regs (void)
4853 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4854 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4855 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4856 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4857 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4861 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4862 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4863 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4864 static int copy_insn_n_scratches;
4866 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4867 copied an ASM_OPERANDS.
4868 In that case, it is the original input-operand vector. */
4869 static rtvec orig_asm_operands_vector;
4871 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4872 copied an ASM_OPERANDS.
4873 In that case, it is the copied input-operand vector. */
4874 static rtvec copy_asm_operands_vector;
4876 /* Likewise for the constraints vector. */
4877 static rtvec orig_asm_constraints_vector;
4878 static rtvec copy_asm_constraints_vector;
4880 /* Recursively create a new copy of an rtx for copy_insn.
4881 This function differs from copy_rtx in that it handles SCRATCHes and
4882 ASM_OPERANDs properly.
4883 Normally, this function is not used directly; use copy_insn as front end.
4884 However, you could first copy an insn pattern with copy_insn and then use
4885 this function afterwards to properly copy any REG_NOTEs containing
4889 copy_insn_1 (rtx orig)
4894 const char *format_ptr;
4896 code = GET_CODE (orig);
4911 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4916 for (i = 0; i < copy_insn_n_scratches; i++)
4917 if (copy_insn_scratch_in[i] == orig)
4918 return copy_insn_scratch_out[i];
4922 if (shared_const_p (orig))
4926 /* A MEM with a constant address is not sharable. The problem is that
4927 the constant address may need to be reloaded. If the mem is shared,
4928 then reloading one copy of this mem will cause all copies to appear
4929 to have been reloaded. */
4935 /* Copy the various flags, fields, and other information. We assume
4936 that all fields need copying, and then clear the fields that should
4937 not be copied. That is the sensible default behavior, and forces
4938 us to explicitly document why we are *not* copying a flag. */
4939 copy = shallow_copy_rtx (orig);
4941 /* We do not copy the USED flag, which is used as a mark bit during
4942 walks over the RTL. */
4943 RTX_FLAG (copy, used) = 0;
4945 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4948 RTX_FLAG (copy, jump) = 0;
4949 RTX_FLAG (copy, call) = 0;
4950 RTX_FLAG (copy, frame_related) = 0;
4953 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4955 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4956 switch (*format_ptr++)
4959 if (XEXP (orig, i) != NULL)
4960 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4965 if (XVEC (orig, i) == orig_asm_constraints_vector)
4966 XVEC (copy, i) = copy_asm_constraints_vector;
4967 else if (XVEC (orig, i) == orig_asm_operands_vector)
4968 XVEC (copy, i) = copy_asm_operands_vector;
4969 else if (XVEC (orig, i) != NULL)
4971 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4972 for (j = 0; j < XVECLEN (copy, i); j++)
4973 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4984 /* These are left unchanged. */
4991 if (code == SCRATCH)
4993 i = copy_insn_n_scratches++;
4994 gcc_assert (i < MAX_RECOG_OPERANDS);
4995 copy_insn_scratch_in[i] = orig;
4996 copy_insn_scratch_out[i] = copy;
4998 else if (code == ASM_OPERANDS)
5000 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5001 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5002 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5003 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5009 /* Create a new copy of an rtx.
5010 This function differs from copy_rtx in that it handles SCRATCHes and
5011 ASM_OPERANDs properly.
5012 INSN doesn't really have to be a full INSN; it could be just the
5015 copy_insn (rtx insn)
5017 copy_insn_n_scratches = 0;
5018 orig_asm_operands_vector = 0;
5019 orig_asm_constraints_vector = 0;
5020 copy_asm_operands_vector = 0;
5021 copy_asm_constraints_vector = 0;
5022 return copy_insn_1 (insn);
5025 /* Initialize data structures and variables in this file
5026 before generating rtl for each function. */
5034 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5035 last_location = UNKNOWN_LOCATION;
5036 first_label_num = label_num;
5039 /* Init the tables that describe all the pseudo regs. */
5041 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5043 crtl->emit.regno_pointer_align
5044 = xcalloc (crtl->emit.regno_pointer_align_length
5045 * sizeof (unsigned char), 1);
5048 = ggc_alloc (crtl->emit.regno_pointer_align_length * sizeof (rtx));
5050 /* Put copies of all the hard registers into regno_reg_rtx. */
5051 memcpy (regno_reg_rtx,
5052 static_regno_reg_rtx,
5053 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5055 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5056 init_virtual_regs ();
5058 /* Indicate that the virtual registers and stack locations are
5060 REG_POINTER (stack_pointer_rtx) = 1;
5061 REG_POINTER (frame_pointer_rtx) = 1;
5062 REG_POINTER (hard_frame_pointer_rtx) = 1;
5063 REG_POINTER (arg_pointer_rtx) = 1;
5065 REG_POINTER (virtual_incoming_args_rtx) = 1;
5066 REG_POINTER (virtual_stack_vars_rtx) = 1;
5067 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5068 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5069 REG_POINTER (virtual_cfa_rtx) = 1;
5071 #ifdef STACK_BOUNDARY
5072 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5073 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5074 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5075 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5077 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5078 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5079 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5080 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5081 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5084 #ifdef INIT_EXPANDERS
5089 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5092 gen_const_vector (enum machine_mode mode, int constant)
5097 enum machine_mode inner;
5099 units = GET_MODE_NUNITS (mode);
5100 inner = GET_MODE_INNER (mode);
5102 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5104 v = rtvec_alloc (units);
5106 /* We need to call this function after we set the scalar const_tiny_rtx
5108 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5110 for (i = 0; i < units; ++i)
5111 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5113 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5117 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5118 all elements are zero, and the one vector when all elements are one. */
5120 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5122 enum machine_mode inner = GET_MODE_INNER (mode);
5123 int nunits = GET_MODE_NUNITS (mode);
5127 /* Check to see if all of the elements have the same value. */
5128 x = RTVEC_ELT (v, nunits - 1);
5129 for (i = nunits - 2; i >= 0; i--)
5130 if (RTVEC_ELT (v, i) != x)
5133 /* If the values are all the same, check to see if we can use one of the
5134 standard constant vectors. */
5137 if (x == CONST0_RTX (inner))
5138 return CONST0_RTX (mode);
5139 else if (x == CONST1_RTX (inner))
5140 return CONST1_RTX (mode);
5143 return gen_rtx_raw_CONST_VECTOR (mode, v);
5146 /* Initialise global register information required by all functions. */
5149 init_emit_regs (void)
5153 /* Reset register attributes */
5154 htab_empty (reg_attrs_htab);
5156 /* We need reg_raw_mode, so initialize the modes now. */
5157 init_reg_modes_target ();
5159 /* Assign register numbers to the globally defined register rtx. */
5160 pc_rtx = gen_rtx_PC (VOIDmode);
5161 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5162 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5163 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5164 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5165 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5166 virtual_incoming_args_rtx =
5167 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5168 virtual_stack_vars_rtx =
5169 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5170 virtual_stack_dynamic_rtx =
5171 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5172 virtual_outgoing_args_rtx =
5173 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5174 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5176 /* Initialize RTL for commonly used hard registers. These are
5177 copied into regno_reg_rtx as we begin to compile each function. */
5178 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5179 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5181 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5182 return_address_pointer_rtx
5183 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5186 #ifdef STATIC_CHAIN_REGNUM
5187 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5189 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5190 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5191 static_chain_incoming_rtx
5192 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5195 static_chain_incoming_rtx = static_chain_rtx;
5199 static_chain_rtx = STATIC_CHAIN;
5201 #ifdef STATIC_CHAIN_INCOMING
5202 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5204 static_chain_incoming_rtx = static_chain_rtx;
5208 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5209 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5211 pic_offset_table_rtx = NULL_RTX;
5214 /* Create some permanent unique rtl objects shared between all functions.
5215 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5218 init_emit_once (int line_numbers)
5221 enum machine_mode mode;
5222 enum machine_mode double_mode;
5224 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5226 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5227 const_int_htab_eq, NULL);
5229 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5230 const_double_htab_eq, NULL);
5232 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5233 const_fixed_htab_eq, NULL);
5235 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5236 mem_attrs_htab_eq, NULL);
5237 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5238 reg_attrs_htab_eq, NULL);
5240 no_line_numbers = ! line_numbers;
5242 /* Compute the word and byte modes. */
5244 byte_mode = VOIDmode;
5245 word_mode = VOIDmode;
5246 double_mode = VOIDmode;
5248 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5250 mode = GET_MODE_WIDER_MODE (mode))
5252 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5253 && byte_mode == VOIDmode)
5256 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5257 && word_mode == VOIDmode)
5261 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5263 mode = GET_MODE_WIDER_MODE (mode))
5265 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5266 && double_mode == VOIDmode)
5270 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5272 #ifdef INIT_EXPANDERS
5273 /* This is to initialize {init|mark|free}_machine_status before the first
5274 call to push_function_context_to. This is needed by the Chill front
5275 end which calls push_function_context_to before the first call to
5276 init_function_start. */
5280 /* Create the unique rtx's for certain rtx codes and operand values. */
5282 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5283 tries to use these variables. */
5284 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5285 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5286 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5288 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5289 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5290 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5292 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5294 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5295 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5296 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5301 dconsthalf = dconst1;
5302 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5304 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5306 const REAL_VALUE_TYPE *const r =
5307 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5309 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5311 mode = GET_MODE_WIDER_MODE (mode))
5312 const_tiny_rtx[i][(int) mode] =
5313 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5315 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5317 mode = GET_MODE_WIDER_MODE (mode))
5318 const_tiny_rtx[i][(int) mode] =
5319 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5321 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5323 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5325 mode = GET_MODE_WIDER_MODE (mode))
5326 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5328 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5330 mode = GET_MODE_WIDER_MODE (mode))
5331 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5334 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5336 mode = GET_MODE_WIDER_MODE (mode))
5338 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5339 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5342 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5344 mode = GET_MODE_WIDER_MODE (mode))
5346 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5347 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5350 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5352 mode = GET_MODE_WIDER_MODE (mode))
5354 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5355 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5358 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5360 mode = GET_MODE_WIDER_MODE (mode))
5362 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5363 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5366 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5368 mode = GET_MODE_WIDER_MODE (mode))
5370 FCONST0(mode).data.high = 0;
5371 FCONST0(mode).data.low = 0;
5372 FCONST0(mode).mode = mode;
5373 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5374 FCONST0 (mode), mode);
5377 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5379 mode = GET_MODE_WIDER_MODE (mode))
5381 FCONST0(mode).data.high = 0;
5382 FCONST0(mode).data.low = 0;
5383 FCONST0(mode).mode = mode;
5384 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5385 FCONST0 (mode), mode);
5388 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5390 mode = GET_MODE_WIDER_MODE (mode))
5392 FCONST0(mode).data.high = 0;
5393 FCONST0(mode).data.low = 0;
5394 FCONST0(mode).mode = mode;
5395 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5396 FCONST0 (mode), mode);
5398 /* We store the value 1. */
5399 FCONST1(mode).data.high = 0;
5400 FCONST1(mode).data.low = 0;
5401 FCONST1(mode).mode = mode;
5402 lshift_double (1, 0, GET_MODE_FBIT (mode),
5403 2 * HOST_BITS_PER_WIDE_INT,
5404 &FCONST1(mode).data.low,
5405 &FCONST1(mode).data.high,
5406 SIGNED_FIXED_POINT_MODE_P (mode));
5407 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5408 FCONST1 (mode), mode);
5411 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5413 mode = GET_MODE_WIDER_MODE (mode))
5415 FCONST0(mode).data.high = 0;
5416 FCONST0(mode).data.low = 0;
5417 FCONST0(mode).mode = mode;
5418 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5419 FCONST0 (mode), mode);
5421 /* We store the value 1. */
5422 FCONST1(mode).data.high = 0;
5423 FCONST1(mode).data.low = 0;
5424 FCONST1(mode).mode = mode;
5425 lshift_double (1, 0, GET_MODE_FBIT (mode),
5426 2 * HOST_BITS_PER_WIDE_INT,
5427 &FCONST1(mode).data.low,
5428 &FCONST1(mode).data.high,
5429 SIGNED_FIXED_POINT_MODE_P (mode));
5430 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5431 FCONST1 (mode), mode);
5434 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5436 mode = GET_MODE_WIDER_MODE (mode))
5438 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5441 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5443 mode = GET_MODE_WIDER_MODE (mode))
5445 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5448 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5450 mode = GET_MODE_WIDER_MODE (mode))
5452 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5453 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5456 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5458 mode = GET_MODE_WIDER_MODE (mode))
5460 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5461 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5464 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5465 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5466 const_tiny_rtx[0][i] = const0_rtx;
5468 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5469 if (STORE_FLAG_VALUE == 1)
5470 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5473 /* Produce exact duplicate of insn INSN after AFTER.
5474 Care updating of libcall regions if present. */
5477 emit_copy_of_insn_after (rtx insn, rtx after)
5481 switch (GET_CODE (insn))
5484 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5488 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5492 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5493 if (CALL_INSN_FUNCTION_USAGE (insn))
5494 CALL_INSN_FUNCTION_USAGE (new)
5495 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5496 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5497 RTL_CONST_CALL_P (new) = RTL_CONST_CALL_P (insn);
5498 RTL_PURE_CALL_P (new) = RTL_PURE_CALL_P (insn);
5499 RTL_LOOPING_CONST_OR_PURE_CALL_P (new)
5500 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5507 /* Update LABEL_NUSES. */
5508 mark_jump_label (PATTERN (new), new, 0);
5510 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5512 /* If the old insn is frame related, then so is the new one. This is
5513 primarily needed for IA-64 unwind info which marks epilogue insns,
5514 which may be duplicated by the basic block reordering code. */
5515 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn);
5517 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5518 will make them. REG_LABEL_TARGETs are created there too, but are
5519 supposed to be sticky, so we copy them. */
5520 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5521 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5523 if (GET_CODE (link) == EXPR_LIST)
5525 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5526 copy_insn_1 (XEXP (link, 0)), REG_NOTES (new));
5529 = gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5530 XEXP (link, 0), REG_NOTES (new));
5533 INSN_CODE (new) = INSN_CODE (insn);
5537 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5539 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5541 if (hard_reg_clobbers[mode][regno])
5542 return hard_reg_clobbers[mode][regno];
5544 return (hard_reg_clobbers[mode][regno] =
5545 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5548 #include "gt-emit-rtl.h"