1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
50 #include "insn-config.h"
56 #include "bc-opcode.h"
57 #include "bc-typecd.h"
65 #ifdef BCDEBUG_PRINT_CODE
68 #include "bc-opname.h"
75 /* Commonly used modes. */
77 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
78 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
79 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
81 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
82 After rtl generation, it is 1 plus the largest register number used. */
84 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
86 /* This is *not* reset after each function. It gives each CODE_LABEL
87 in the entire compilation a unique label number. */
89 static int label_num = 1;
91 /* Lowest label number in current function. */
93 static int first_label_num;
95 /* Highest label number in current function.
96 Zero means use the value of label_num instead.
97 This is nonzero only when belatedly compiling an inline function. */
99 static int last_label_num;
101 /* Value label_num had when set_new_first_and_last_label_number was called.
102 If label_num has not changed since then, last_label_num is valid. */
104 static int base_label_num;
106 /* Nonzero means do not generate NOTEs for source line numbers. */
108 static int no_line_numbers;
110 /* Commonly used rtx's, so that we only need space for one copy.
111 These are initialized once for the entire compilation.
112 All of these except perhaps the floating-point CONST_DOUBLEs
113 are unique; no other rtx-object will be equal to any of these. */
115 rtx pc_rtx; /* (PC) */
116 rtx cc0_rtx; /* (CC0) */
117 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
118 rtx const0_rtx; /* (CONST_INT 0) */
119 rtx const1_rtx; /* (CONST_INT 1) */
120 rtx const2_rtx; /* (CONST_INT 2) */
121 rtx constm1_rtx; /* (CONST_INT -1) */
122 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
124 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
125 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
126 record a copy of const[012]_rtx. */
128 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
130 REAL_VALUE_TYPE dconst0;
131 REAL_VALUE_TYPE dconst1;
132 REAL_VALUE_TYPE dconst2;
133 REAL_VALUE_TYPE dconstm1;
135 /* All references to the following fixed hard registers go through
136 these unique rtl objects. On machines where the frame-pointer and
137 arg-pointer are the same register, they use the same unique object.
139 After register allocation, other rtl objects which used to be pseudo-regs
140 may be clobbered to refer to the frame-pointer register.
141 But references that were originally to the frame-pointer can be
142 distinguished from the others because they contain frame_pointer_rtx.
144 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
145 tricky: until register elimination has taken place hard_frame_pointer_rtx
146 should be used if it is being set, and frame_pointer_rtx otherwise. After
147 register elimination hard_frame_pointer_rtx should always be used.
148 On machines where the two registers are same (most) then these are the
151 In an inline procedure, the stack and frame pointer rtxs may not be
152 used for anything else. */
153 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
154 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
155 rtx hard_frame_pointer_rtx; /* (REG:Pmode HARD_FRAME_POINTER_REGNUM) */
156 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
157 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
158 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
159 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
160 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
161 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
163 /* This is used to implement __builtin_return_address for some machines.
164 See for instance the MIPS port. */
165 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
167 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
168 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
169 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
170 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
172 /* We make one copy of (const_int C) where C is in
173 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
174 to save space during the compilation and simplify comparisons of
177 #define MAX_SAVED_CONST_INT 64
179 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
181 /* The ends of the doubly-linked chain of rtl for the current function.
182 Both are reset to null at the start of rtl generation for the function.
184 start_sequence saves both of these on `sequence_stack' along with
185 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
187 static rtx first_insn = NULL;
188 static rtx last_insn = NULL;
190 /* RTL_EXPR within which the current sequence will be placed. Use to
191 prevent reuse of any temporaries within the sequence until after the
192 RTL_EXPR is emitted. */
194 tree sequence_rtl_expr = NULL;
196 /* INSN_UID for next insn emitted.
197 Reset to 1 for each function compiled. */
199 static int cur_insn_uid = 1;
201 /* Line number and source file of the last line-number NOTE emitted.
202 This is used to avoid generating duplicates. */
204 static int last_linenum = 0;
205 static char *last_filename = 0;
207 /* A vector indexed by pseudo reg number. The allocated length
208 of this vector is regno_pointer_flag_length. Since this
209 vector is needed during the expansion phase when the total
210 number of registers in the function is not yet known,
211 it is copied and made bigger when necessary. */
213 char *regno_pointer_flag;
214 int regno_pointer_flag_length;
216 /* Indexed by pseudo register number, if nonzero gives the known alignment
217 for that pseudo (if regno_pointer_flag is set).
218 Allocated in parallel with regno_pointer_flag. */
219 char *regno_pointer_align;
221 /* Indexed by pseudo register number, gives the rtx for that pseudo.
222 Allocated in parallel with regno_pointer_flag. */
226 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
227 Each element describes one pending sequence.
228 The main insn-chain is saved in the last element of the chain,
229 unless the chain is empty. */
231 struct sequence_stack *sequence_stack;
233 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
234 shortly thrown away. We use two mechanisms to prevent this waste:
236 First, we keep a list of the expressions used to represent the sequence
237 stack in sequence_element_free_list.
239 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
240 rtvec for use by gen_sequence. One entry for each size is sufficient
241 because most cases are calls to gen_sequence followed by immediately
242 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
243 destructive on the insn in it anyway and hence can't be redone.
245 We do not bother to save this cached data over nested function calls.
246 Instead, we just reinitialize them. */
248 #define SEQUENCE_RESULT_SIZE 5
250 static struct sequence_stack *sequence_element_free_list;
251 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
253 /* During RTL generation, we also keep a list of free INSN rtl codes. */
254 static rtx free_insn;
256 extern int rtx_equal_function_value_matters;
258 /* Filename and line number of last line-number note,
259 whether we actually emitted it or not. */
260 extern char *emit_filename;
261 extern int emit_lineno;
263 rtx change_address ();
266 extern struct obstack *rtl_obstack;
268 extern int stack_depth;
269 extern int max_stack_depth;
271 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
273 ** This routine generates an RTX of the size specified by
274 ** <code>, which is an RTX code. The RTX structure is initialized
275 ** from the arguments <element1> through <elementn>, which are
276 ** interpreted according to the specific RTX type's format. The
277 ** special machine mode associated with the rtx (if any) is specified
280 ** gen_rtx can be invoked in a way which resembles the lisp-like
281 ** rtx it will generate. For example, the following rtx structure:
283 ** (plus:QI (mem:QI (reg:SI 1))
284 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
286 ** ...would be generated by the following C code:
288 ** gen_rtx (PLUS, QImode,
289 ** gen_rtx (MEM, QImode,
290 ** gen_rtx (REG, SImode, 1)),
291 ** gen_rtx (MEM, QImode,
292 ** gen_rtx (PLUS, SImode,
293 ** gen_rtx (REG, SImode, 2),
294 ** gen_rtx (REG, SImode, 3)))),
299 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
303 enum machine_mode mode;
306 register int i; /* Array indices... */
307 register char *fmt; /* Current rtx's format... */
308 register rtx rt_val; /* RTX to return to caller... */
313 code = va_arg (p, enum rtx_code);
314 mode = va_arg (p, enum machine_mode);
317 if (code == CONST_INT)
319 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
321 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
322 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
324 if (const_true_rtx && arg == STORE_FLAG_VALUE)
325 return const_true_rtx;
327 rt_val = rtx_alloc (code);
328 INTVAL (rt_val) = arg;
330 else if (code == REG)
332 int regno = va_arg (p, int);
334 /* In case the MD file explicitly references the frame pointer, have
335 all such references point to the same frame pointer. This is used
336 during frame pointer elimination to distinguish the explicit
337 references to these registers from pseudos that happened to be
340 If we have eliminated the frame pointer or arg pointer, we will
341 be using it as a normal register, for example as a spill register.
342 In such cases, we might be accessing it in a mode that is not
343 Pmode and therefore cannot use the pre-allocated rtx.
345 Also don't do this when we are making new REGs in reload,
346 since we don't want to get confused with the real pointers. */
348 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
349 && ! reload_in_progress)
350 return frame_pointer_rtx;
351 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
352 if (hard_frame_pointer_rtx && regno == HARD_FRAME_POINTER_REGNUM
353 && mode == Pmode && ! reload_in_progress)
354 return hard_frame_pointer_rtx;
356 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
357 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
358 && ! reload_in_progress)
359 return arg_pointer_rtx;
361 #ifdef RETURN_ADDRESS_POINTER_REGNUM
362 if (return_address_pointer_rtx && regno == RETURN_ADDRESS_POINTER_REGNUM
363 && mode == Pmode && ! reload_in_progress)
364 return return_address_pointer_rtx;
366 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
367 && ! reload_in_progress)
368 return stack_pointer_rtx;
371 rt_val = rtx_alloc (code);
373 REGNO (rt_val) = regno;
379 rt_val = rtx_alloc (code); /* Allocate the storage space. */
380 rt_val->mode = mode; /* Store the machine mode... */
382 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
383 for (i = 0; i < GET_RTX_LENGTH (code); i++)
387 case '0': /* Unused field. */
390 case 'i': /* An integer? */
391 XINT (rt_val, i) = va_arg (p, int);
394 case 'w': /* A wide integer? */
395 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
398 case 's': /* A string? */
399 XSTR (rt_val, i) = va_arg (p, char *);
402 case 'e': /* An expression? */
403 case 'u': /* An insn? Same except when printing. */
404 XEXP (rt_val, i) = va_arg (p, rtx);
407 case 'E': /* An RTX vector? */
408 XVEC (rt_val, i) = va_arg (p, rtvec);
417 return rt_val; /* Return the new RTX... */
420 /* gen_rtvec (n, [rt1, ..., rtn])
422 ** This routine creates an rtvec and stores within it the
423 ** pointers to rtx's which are its arguments.
428 gen_rtvec VPROTO((int n, ...))
444 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
446 vector = (rtx *) alloca (n * sizeof (rtx));
448 for (i = 0; i < n; i++)
449 vector[i] = va_arg (p, rtx);
452 return gen_rtvec_v (n, vector);
456 gen_rtvec_v (n, argp)
461 register rtvec rt_val;
464 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
466 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
468 for (i = 0; i < n; i++)
469 rt_val->elem[i].rtx = *argp++;
474 /* Generate a REG rtx for a new pseudo register of mode MODE.
475 This pseudo is assigned the next sequential register number. */
479 enum machine_mode mode;
483 /* Don't let anything called by or after reload create new registers
484 (actually, registers can't be created after flow, but this is a good
487 if (reload_in_progress || reload_completed)
490 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
491 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
493 /* For complex modes, don't make a single pseudo.
494 Instead, make a CONCAT of two pseudos.
495 This allows noncontiguous allocation of the real and imaginary parts,
496 which makes much better code. Besides, allocating DCmode
497 pseudos overstrains reload on some machines like the 386. */
498 rtx realpart, imagpart;
499 int size = GET_MODE_UNIT_SIZE (mode);
500 enum machine_mode partmode
501 = mode_for_size (size * BITS_PER_UNIT,
502 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
503 ? MODE_FLOAT : MODE_INT),
506 realpart = gen_reg_rtx (partmode);
507 imagpart = gen_reg_rtx (partmode);
508 return gen_rtx (CONCAT, mode, realpart, imagpart);
511 /* Make sure regno_pointer_flag and regno_reg_rtx are large
512 enough to have an element for this pseudo reg number. */
514 if (reg_rtx_no == regno_pointer_flag_length)
518 (char *) savealloc (regno_pointer_flag_length * 2);
519 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
520 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
521 regno_pointer_flag = new;
523 new = (char *) savealloc (regno_pointer_flag_length * 2);
524 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
525 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
526 regno_pointer_align = new;
528 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
529 bcopy ((char *) regno_reg_rtx, (char *) new1,
530 regno_pointer_flag_length * sizeof (rtx));
531 bzero ((char *) &new1[regno_pointer_flag_length],
532 regno_pointer_flag_length * sizeof (rtx));
533 regno_reg_rtx = new1;
535 regno_pointer_flag_length *= 2;
538 val = gen_rtx (REG, mode, reg_rtx_no);
539 regno_reg_rtx[reg_rtx_no++] = val;
543 /* Identify REG as a probable pointer register and show its alignment
544 as ALIGN, if nonzero. */
547 mark_reg_pointer (reg, align)
551 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
554 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
557 /* Return 1 plus largest pseudo reg number used in the current function. */
565 /* Return 1 + the largest label number used so far in the current function. */
570 if (last_label_num && label_num == base_label_num)
571 return last_label_num;
575 /* Return first label number used in this function (if any were used). */
578 get_first_label_num ()
580 return first_label_num;
583 /* Return a value representing some low-order bits of X, where the number
584 of low-order bits is given by MODE. Note that no conversion is done
585 between floating-point and fixed-point values, rather, the bit
586 representation is returned.
588 This function handles the cases in common between gen_lowpart, below,
589 and two variants in cse.c and combine.c. These are the cases that can
590 be safely handled at all points in the compilation.
592 If this is not a case we can handle, return 0. */
595 gen_lowpart_common (mode, x)
596 enum machine_mode mode;
601 if (GET_MODE (x) == mode)
604 /* MODE must occupy no more words than the mode of X. */
605 if (GET_MODE (x) != VOIDmode
606 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
607 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
611 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
612 word = ((GET_MODE_SIZE (GET_MODE (x))
613 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
616 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
617 && (GET_MODE_CLASS (mode) == MODE_INT
618 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
620 /* If we are getting the low-order part of something that has been
621 sign- or zero-extended, we can either just use the object being
622 extended or make a narrower extension. If we want an even smaller
623 piece than the size of the object being extended, call ourselves
626 This case is used mostly by combine and cse. */
628 if (GET_MODE (XEXP (x, 0)) == mode)
630 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
631 return gen_lowpart_common (mode, XEXP (x, 0));
632 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
633 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
635 else if (GET_CODE (x) == SUBREG
636 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
637 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
638 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
640 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
641 else if (GET_CODE (x) == REG)
643 /* If the register is not valid for MODE, return 0. If we don't
644 do this, there is no way to fix up the resulting REG later.
645 But we do do this if the current REG is not valid for its
646 mode. This latter is a kludge, but is required due to the
647 way that parameters are passed on some machines, most
649 if (REGNO (x) < FIRST_PSEUDO_REGISTER
650 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
651 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
653 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
654 /* integrate.c can't handle parts of a return value register. */
655 && (! REG_FUNCTION_VALUE_P (x)
656 || ! rtx_equal_function_value_matters)
657 /* We want to keep the stack, frame, and arg pointers
659 && x != frame_pointer_rtx
660 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
661 && x != arg_pointer_rtx
663 && x != stack_pointer_rtx)
664 return gen_rtx (REG, mode, REGNO (x) + word);
666 return gen_rtx (SUBREG, mode, x, word);
668 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
669 from the low-order part of the constant. */
670 else if ((GET_MODE_CLASS (mode) == MODE_INT
671 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
672 && GET_MODE (x) == VOIDmode
673 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
675 /* If MODE is twice the host word size, X is already the desired
676 representation. Otherwise, if MODE is wider than a word, we can't
677 do this. If MODE is exactly a word, return just one CONST_INT.
678 If MODE is smaller than a word, clear the bits that don't belong
679 in our mode, unless they and our sign bit are all one. So we get
680 either a reasonable negative value or a reasonable unsigned value
683 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
685 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
687 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
688 return (GET_CODE (x) == CONST_INT ? x
689 : GEN_INT (CONST_DOUBLE_LOW (x)));
692 /* MODE must be narrower than HOST_BITS_PER_INT. */
693 int width = GET_MODE_BITSIZE (mode);
694 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
695 : CONST_DOUBLE_LOW (x));
697 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
698 != ((HOST_WIDE_INT) (-1) << (width - 1))))
699 val &= ((HOST_WIDE_INT) 1 << width) - 1;
701 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
706 /* If X is an integral constant but we want it in floating-point, it
707 must be the case that we have a union of an integer and a floating-point
708 value. If the machine-parameters allow it, simulate that union here
709 and return the result. The two-word and single-word cases are
712 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
713 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
714 || flag_pretend_float)
715 && GET_MODE_CLASS (mode) == MODE_FLOAT
716 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
717 && GET_CODE (x) == CONST_INT
718 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
719 #ifdef REAL_ARITHMETIC
725 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
726 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
730 union {HOST_WIDE_INT i; float d; } u;
733 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
736 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
737 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
738 || flag_pretend_float)
739 && GET_MODE_CLASS (mode) == MODE_FLOAT
740 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
741 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
742 && GET_MODE (x) == VOIDmode
743 && (sizeof (double) * HOST_BITS_PER_CHAR
744 == 2 * HOST_BITS_PER_WIDE_INT))
745 #ifdef REAL_ARITHMETIC
749 HOST_WIDE_INT low, high;
751 if (GET_CODE (x) == CONST_INT)
752 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
754 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
756 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
758 if (WORDS_BIG_ENDIAN)
759 i[0] = high, i[1] = low;
761 i[0] = low, i[1] = high;
763 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
764 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
768 union {HOST_WIDE_INT i[2]; double d; } u;
769 HOST_WIDE_INT low, high;
771 if (GET_CODE (x) == CONST_INT)
772 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
774 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
776 #ifdef HOST_WORDS_BIG_ENDIAN
777 u.i[0] = high, u.i[1] = low;
779 u.i[0] = low, u.i[1] = high;
782 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
785 /* Similarly, if this is converting a floating-point value into a
786 single-word integer. Only do this is the host and target parameters are
789 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
790 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
791 || flag_pretend_float)
792 && (GET_MODE_CLASS (mode) == MODE_INT
793 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
794 && GET_CODE (x) == CONST_DOUBLE
795 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
796 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
797 return operand_subword (x, 0, 0, GET_MODE (x));
799 /* Similarly, if this is converting a floating-point value into a
800 two-word integer, we can do this one word at a time and make an
801 integer. Only do this is the host and target parameters are
804 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
805 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
806 || flag_pretend_float)
807 && (GET_MODE_CLASS (mode) == MODE_INT
808 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
809 && GET_CODE (x) == CONST_DOUBLE
810 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
811 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
813 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
814 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
816 if (lowpart && GET_CODE (lowpart) == CONST_INT
817 && highpart && GET_CODE (highpart) == CONST_INT)
818 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
821 /* Otherwise, we can't do this. */
825 /* Return the real part (which has mode MODE) of a complex value X.
826 This always comes at the low address in memory. */
829 gen_realpart (mode, x)
830 enum machine_mode mode;
833 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
835 else if (WORDS_BIG_ENDIAN)
836 return gen_highpart (mode, x);
838 return gen_lowpart (mode, x);
841 /* Return the imaginary part (which has mode MODE) of a complex value X.
842 This always comes at the high address in memory. */
845 gen_imagpart (mode, x)
846 enum machine_mode mode;
849 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
851 else if (WORDS_BIG_ENDIAN)
852 return gen_lowpart (mode, x);
854 return gen_highpart (mode, x);
857 /* Return 1 iff X, assumed to be a SUBREG,
858 refers to the real part of the complex value in its containing reg.
859 Complex values are always stored with the real part in the first word,
860 regardless of WORDS_BIG_ENDIAN. */
863 subreg_realpart_p (x)
866 if (GET_CODE (x) != SUBREG)
869 return SUBREG_WORD (x) == 0;
872 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
873 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
874 least-significant part of X.
875 MODE specifies how big a part of X to return;
876 it usually should not be larger than a word.
877 If X is a MEM whose address is a QUEUED, the value may be so also. */
880 gen_lowpart (mode, x)
881 enum machine_mode mode;
884 rtx result = gen_lowpart_common (mode, x);
888 else if (GET_CODE (x) == REG)
890 /* Must be a hard reg that's not valid in MODE. */
891 result = gen_lowpart_common (mode, copy_to_reg (x));
896 else if (GET_CODE (x) == MEM)
898 /* The only additional case we can do is MEM. */
899 register int offset = 0;
900 if (WORDS_BIG_ENDIAN)
901 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
902 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
904 if (BYTES_BIG_ENDIAN)
905 /* Adjust the address so that the address-after-the-data
907 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
908 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
910 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
916 /* Like `gen_lowpart', but refer to the most significant part.
917 This is used to access the imaginary part of a complex number. */
920 gen_highpart (mode, x)
921 enum machine_mode mode;
924 /* This case loses if X is a subreg. To catch bugs early,
925 complain if an invalid MODE is used even in other cases. */
926 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
927 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
929 if (GET_CODE (x) == CONST_DOUBLE
930 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
931 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
934 return gen_rtx (CONST_INT, VOIDmode,
935 CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
936 else if (GET_CODE (x) == CONST_INT)
938 else if (GET_CODE (x) == MEM)
940 register int offset = 0;
941 if (! WORDS_BIG_ENDIAN)
942 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
943 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
945 if (! BYTES_BIG_ENDIAN
946 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
947 offset -= (GET_MODE_SIZE (mode)
948 - MIN (UNITS_PER_WORD,
949 GET_MODE_SIZE (GET_MODE (x))));
951 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
953 else if (GET_CODE (x) == SUBREG)
955 /* The only time this should occur is when we are looking at a
956 multi-word item with a SUBREG whose mode is the same as that of the
957 item. It isn't clear what we would do if it wasn't. */
958 if (SUBREG_WORD (x) != 0)
960 return gen_highpart (mode, SUBREG_REG (x));
962 else if (GET_CODE (x) == REG)
966 if (! WORDS_BIG_ENDIAN
967 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
968 word = ((GET_MODE_SIZE (GET_MODE (x))
969 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
973 * ??? This fails miserably for complex values being passed in registers
974 * where the sizeof the real and imaginary part are not equal to the
975 * sizeof SImode. FIXME
978 if (REGNO (x) < FIRST_PSEUDO_REGISTER
979 /* integrate.c can't handle parts of a return value register. */
980 && (! REG_FUNCTION_VALUE_P (x)
981 || ! rtx_equal_function_value_matters)
982 /* We want to keep the stack, frame, and arg pointers special. */
983 && x != frame_pointer_rtx
984 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
985 && x != arg_pointer_rtx
987 && x != stack_pointer_rtx)
988 return gen_rtx (REG, mode, REGNO (x) + word);
990 return gen_rtx (SUBREG, mode, x, word);
996 /* Return 1 iff X, assumed to be a SUBREG,
997 refers to the least significant part of its containing reg.
998 If X is not a SUBREG, always return 1 (it is its own low part!). */
1001 subreg_lowpart_p (x)
1004 if (GET_CODE (x) != SUBREG)
1007 if (WORDS_BIG_ENDIAN
1008 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1009 return (SUBREG_WORD (x)
1010 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1011 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1014 return SUBREG_WORD (x) == 0;
1017 /* Return subword I of operand OP.
1018 The word number, I, is interpreted as the word number starting at the
1019 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1020 otherwise it is the high-order word.
1022 If we cannot extract the required word, we return zero. Otherwise, an
1023 rtx corresponding to the requested word will be returned.
1025 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1026 reload has completed, a valid address will always be returned. After
1027 reload, if a valid address cannot be returned, we return zero.
1029 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1030 it is the responsibility of the caller.
1032 MODE is the mode of OP in case it is a CONST_INT. */
1035 operand_subword (op, i, validate_address, mode)
1038 int validate_address;
1039 enum machine_mode mode;
1042 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1044 if (mode == VOIDmode)
1045 mode = GET_MODE (op);
1047 if (mode == VOIDmode)
1050 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1052 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1053 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1056 /* If OP is already an integer word, return it. */
1057 if (GET_MODE_CLASS (mode) == MODE_INT
1058 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1061 /* If OP is a REG or SUBREG, we can handle it very simply. */
1062 if (GET_CODE (op) == REG)
1064 /* If the register is not valid for MODE, return 0. If we don't
1065 do this, there is no way to fix up the resulting REG later. */
1066 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1067 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1069 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1070 || (REG_FUNCTION_VALUE_P (op)
1071 && rtx_equal_function_value_matters)
1072 /* We want to keep the stack, frame, and arg pointers
1074 || op == frame_pointer_rtx
1075 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1076 || op == arg_pointer_rtx
1078 || op == stack_pointer_rtx)
1079 return gen_rtx (SUBREG, word_mode, op, i);
1081 return gen_rtx (REG, word_mode, REGNO (op) + i);
1083 else if (GET_CODE (op) == SUBREG)
1084 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1085 else if (GET_CODE (op) == CONCAT)
1087 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1089 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1090 return operand_subword (XEXP (op, 1), i - partwords,
1091 validate_address, mode);
1094 /* Form a new MEM at the requested address. */
1095 if (GET_CODE (op) == MEM)
1097 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1100 if (validate_address)
1102 if (reload_completed)
1104 if (! strict_memory_address_p (word_mode, addr))
1108 addr = memory_address (word_mode, addr);
1111 new = gen_rtx (MEM, word_mode, addr);
1113 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1114 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1115 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1120 /* The only remaining cases are when OP is a constant. If the host and
1121 target floating formats are the same, handling two-word floating
1122 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1123 are defined as returning one or two 32 bit values, respectively,
1124 and not values of BITS_PER_WORD bits. */
1125 #ifdef REAL_ARITHMETIC
1126 /* The output is some bits, the width of the target machine's word.
1127 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1129 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1130 && GET_MODE_CLASS (mode) == MODE_FLOAT
1131 && GET_MODE_BITSIZE (mode) == 64
1132 && GET_CODE (op) == CONST_DOUBLE)
1137 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1138 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1140 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1141 which the words are written depends on the word endianness.
1143 ??? This is a potential portability problem and should
1144 be fixed at some point. */
1145 if (BITS_PER_WORD == 32)
1146 return GEN_INT ((HOST_WIDE_INT) k[i]);
1147 #if HOST_BITS_PER_WIDE_INT > 32
1148 else if (BITS_PER_WORD >= 64 && i == 0)
1149 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1150 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1152 else if (BITS_PER_WORD == 16)
1159 return GEN_INT ((HOST_WIDE_INT) value);
1164 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1165 && GET_MODE_CLASS (mode) == MODE_FLOAT
1166 && GET_MODE_BITSIZE (mode) > 64
1167 && GET_CODE (op) == CONST_DOUBLE)
1172 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1173 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1175 if (BITS_PER_WORD == 32)
1176 return GEN_INT ((HOST_WIDE_INT) k[i]);
1178 #else /* no REAL_ARITHMETIC */
1179 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1180 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1181 || flag_pretend_float)
1182 && GET_MODE_CLASS (mode) == MODE_FLOAT
1183 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1184 && GET_CODE (op) == CONST_DOUBLE)
1186 /* The constant is stored in the host's word-ordering,
1187 but we want to access it in the target's word-ordering. Some
1188 compilers don't like a conditional inside macro args, so we have two
1189 copies of the return. */
1190 #ifdef HOST_WORDS_BIG_ENDIAN
1191 return GEN_INT (i == WORDS_BIG_ENDIAN
1192 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1194 return GEN_INT (i != WORDS_BIG_ENDIAN
1195 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1198 #endif /* no REAL_ARITHMETIC */
1200 /* Single word float is a little harder, since single- and double-word
1201 values often do not have the same high-order bits. We have already
1202 verified that we want the only defined word of the single-word value. */
1203 #ifdef REAL_ARITHMETIC
1204 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1205 && GET_MODE_BITSIZE (mode) == 32
1206 && GET_CODE (op) == CONST_DOUBLE)
1211 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1212 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1213 return GEN_INT ((HOST_WIDE_INT) l);
1216 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1217 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1218 || flag_pretend_float)
1219 && GET_MODE_CLASS (mode) == MODE_FLOAT
1220 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1221 && GET_CODE (op) == CONST_DOUBLE)
1224 union {float f; HOST_WIDE_INT i; } u;
1226 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1229 return GEN_INT (u.i);
1231 #endif /* no REAL_ARITHMETIC */
1233 /* The only remaining cases that we can handle are integers.
1234 Convert to proper endianness now since these cases need it.
1235 At this point, i == 0 means the low-order word.
1237 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1238 in general. However, if OP is (const_int 0), we can just return
1241 if (op == const0_rtx)
1244 if (GET_MODE_CLASS (mode) != MODE_INT
1245 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1246 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1249 if (WORDS_BIG_ENDIAN)
1250 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1252 /* Find out which word on the host machine this value is in and get
1253 it from the constant. */
1254 val = (i / size_ratio == 0
1255 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1256 : (GET_CODE (op) == CONST_INT
1257 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1259 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1260 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1261 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
1262 & (((HOST_WIDE_INT) 1
1263 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
1265 return GEN_INT (val);
1268 /* Similar to `operand_subword', but never return 0. If we can't extract
1269 the required subword, put OP into a register and try again. If that fails,
1270 abort. We always validate the address in this case. It is not valid
1271 to call this function after reload; it is mostly meant for RTL
1274 MODE is the mode of OP, in case it is CONST_INT. */
1277 operand_subword_force (op, i, mode)
1280 enum machine_mode mode;
1282 rtx result = operand_subword (op, i, 1, mode);
1287 if (mode != BLKmode && mode != VOIDmode)
1288 op = force_reg (mode, op);
1290 result = operand_subword (op, i, 1, mode);
1297 /* Given a compare instruction, swap the operands.
1298 A test instruction is changed into a compare of 0 against the operand. */
1301 reverse_comparison (insn)
1304 rtx body = PATTERN (insn);
1307 if (GET_CODE (body) == SET)
1308 comp = SET_SRC (body);
1310 comp = SET_SRC (XVECEXP (body, 0, 0));
1312 if (GET_CODE (comp) == COMPARE)
1314 rtx op0 = XEXP (comp, 0);
1315 rtx op1 = XEXP (comp, 1);
1316 XEXP (comp, 0) = op1;
1317 XEXP (comp, 1) = op0;
1321 rtx new = gen_rtx (COMPARE, VOIDmode,
1322 CONST0_RTX (GET_MODE (comp)), comp);
1323 if (GET_CODE (body) == SET)
1324 SET_SRC (body) = new;
1326 SET_SRC (XVECEXP (body, 0, 0)) = new;
1330 /* Return a memory reference like MEMREF, but with its mode changed
1331 to MODE and its address changed to ADDR.
1332 (VOIDmode means don't change the mode.
1333 NULL for ADDR means don't change the address.) */
1336 change_address (memref, mode, addr)
1338 enum machine_mode mode;
1343 if (GET_CODE (memref) != MEM)
1345 if (mode == VOIDmode)
1346 mode = GET_MODE (memref);
1348 addr = XEXP (memref, 0);
1350 /* If reload is in progress or has completed, ADDR must be valid.
1351 Otherwise, we can call memory_address to make it valid. */
1352 if (reload_completed || reload_in_progress)
1354 if (! memory_address_p (mode, addr))
1358 addr = memory_address (mode, addr);
1360 new = gen_rtx (MEM, mode, addr);
1361 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1362 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1363 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1367 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1374 label = (output_bytecode
1375 ? gen_rtx (CODE_LABEL, VOIDmode, NULL, bc_get_bytecode_label ())
1376 : gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, label_num++, NULL_PTR));
1378 LABEL_NUSES (label) = 0;
1382 /* For procedure integration. */
1384 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1385 from a permanent obstack when the opportunity arises. */
1388 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1389 last_labelno, max_parm_regnum, max_regnum, args_size,
1390 pops_args, stack_slots, forced_labels, function_flags,
1391 outgoing_args_size, original_arg_vector,
1392 original_decl_initial, regno_rtx, regno_flag,
1394 rtx first_insn, first_parm_insn;
1395 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1400 int outgoing_args_size;
1401 rtvec original_arg_vector;
1402 rtx original_decl_initial;
1407 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
1408 cur_insn_uid++, NULL_RTX,
1409 first_insn, first_parm_insn,
1410 first_labelno, last_labelno,
1411 max_parm_regnum, max_regnum, args_size, pops_args,
1412 stack_slots, forced_labels, function_flags,
1413 outgoing_args_size, original_arg_vector,
1414 original_decl_initial,
1415 regno_rtx, regno_flag, regno_align);
1419 /* Install new pointers to the first and last insns in the chain.
1420 Also, set cur_insn_uid to one higher than the last in use.
1421 Used for an inline-procedure after copying the insn chain. */
1424 set_new_first_and_last_insn (first, last)
1433 for (insn = first; insn; insn = NEXT_INSN (insn))
1434 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1439 /* Set the range of label numbers found in the current function.
1440 This is used when belatedly compiling an inline function. */
1443 set_new_first_and_last_label_num (first, last)
1446 base_label_num = label_num;
1447 first_label_num = first;
1448 last_label_num = last;
1451 /* Save all variables describing the current status into the structure *P.
1452 This is used before starting a nested function. */
1455 save_emit_status (p)
1458 p->reg_rtx_no = reg_rtx_no;
1459 p->first_label_num = first_label_num;
1460 p->first_insn = first_insn;
1461 p->last_insn = last_insn;
1462 p->sequence_rtl_expr = sequence_rtl_expr;
1463 p->sequence_stack = sequence_stack;
1464 p->cur_insn_uid = cur_insn_uid;
1465 p->last_linenum = last_linenum;
1466 p->last_filename = last_filename;
1467 p->regno_pointer_flag = regno_pointer_flag;
1468 p->regno_pointer_align = regno_pointer_align;
1469 p->regno_pointer_flag_length = regno_pointer_flag_length;
1470 p->regno_reg_rtx = regno_reg_rtx;
1473 /* Restore all variables describing the current status from the structure *P.
1474 This is used after a nested function. */
1477 restore_emit_status (p)
1482 reg_rtx_no = p->reg_rtx_no;
1483 first_label_num = p->first_label_num;
1485 first_insn = p->first_insn;
1486 last_insn = p->last_insn;
1487 sequence_rtl_expr = p->sequence_rtl_expr;
1488 sequence_stack = p->sequence_stack;
1489 cur_insn_uid = p->cur_insn_uid;
1490 last_linenum = p->last_linenum;
1491 last_filename = p->last_filename;
1492 regno_pointer_flag = p->regno_pointer_flag;
1493 regno_pointer_align = p->regno_pointer_align;
1494 regno_pointer_flag_length = p->regno_pointer_flag_length;
1495 regno_reg_rtx = p->regno_reg_rtx;
1497 /* Clear our cache of rtx expressions for start_sequence and
1499 sequence_element_free_list = 0;
1500 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1501 sequence_result[i] = 0;
1506 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1507 It does not work to do this twice, because the mark bits set here
1508 are not cleared afterwards. */
1511 unshare_all_rtl (insn)
1514 for (; insn; insn = NEXT_INSN (insn))
1515 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1516 || GET_CODE (insn) == CALL_INSN)
1518 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1519 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1520 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1523 /* Make sure the addresses of stack slots found outside the insn chain
1524 (such as, in DECL_RTL of a variable) are not shared
1525 with the insn chain.
1527 This special care is necessary when the stack slot MEM does not
1528 actually appear in the insn chain. If it does appear, its address
1529 is unshared from all else at that point. */
1531 copy_rtx_if_shared (stack_slot_list);
1534 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1535 Recursively does the same for subexpressions. */
1538 copy_rtx_if_shared (orig)
1541 register rtx x = orig;
1543 register enum rtx_code code;
1544 register char *format_ptr;
1550 code = GET_CODE (x);
1552 /* These types may be freely shared. */
1565 /* SCRATCH must be shared because they represent distinct values. */
1569 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1570 a LABEL_REF, it isn't sharable. */
1571 if (GET_CODE (XEXP (x, 0)) == PLUS
1572 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1573 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1582 /* The chain of insns is not being copied. */
1586 /* A MEM is allowed to be shared if its address is constant
1587 or is a constant plus one of the special registers. */
1588 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1589 || XEXP (x, 0) == virtual_stack_vars_rtx
1590 || XEXP (x, 0) == virtual_incoming_args_rtx)
1593 if (GET_CODE (XEXP (x, 0)) == PLUS
1594 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1595 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1596 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1598 /* This MEM can appear in more than one place,
1599 but its address better not be shared with anything else. */
1601 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1607 /* This rtx may not be shared. If it has already been seen,
1608 replace it with a copy of itself. */
1614 copy = rtx_alloc (code);
1615 bcopy ((char *) x, (char *) copy,
1616 (sizeof (*copy) - sizeof (copy->fld)
1617 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1623 /* Now scan the subexpressions recursively.
1624 We can store any replaced subexpressions directly into X
1625 since we know X is not shared! Any vectors in X
1626 must be copied if X was copied. */
1628 format_ptr = GET_RTX_FORMAT (code);
1630 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1632 switch (*format_ptr++)
1635 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1639 if (XVEC (x, i) != NULL)
1642 int len = XVECLEN (x, i);
1644 if (copied && len > 0)
1645 XVEC (x, i) = gen_rtvec_v (len, &XVECEXP (x, i, 0));
1646 for (j = 0; j < len; j++)
1647 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1655 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1656 to look for shared sub-parts. */
1659 reset_used_flags (x)
1663 register enum rtx_code code;
1664 register char *format_ptr;
1669 code = GET_CODE (x);
1671 /* These types may be freely shared so we needn't do any resetting
1692 /* The chain of insns is not being copied. */
1698 format_ptr = GET_RTX_FORMAT (code);
1699 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1701 switch (*format_ptr++)
1704 reset_used_flags (XEXP (x, i));
1708 for (j = 0; j < XVECLEN (x, i); j++)
1709 reset_used_flags (XVECEXP (x, i, j));
1715 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1716 Return X or the rtx for the pseudo reg the value of X was copied into.
1717 OTHER must be valid as a SET_DEST. */
1720 make_safe_from (x, other)
1724 switch (GET_CODE (other))
1727 other = SUBREG_REG (other);
1729 case STRICT_LOW_PART:
1732 other = XEXP (other, 0);
1738 if ((GET_CODE (other) == MEM
1740 && GET_CODE (x) != REG
1741 && GET_CODE (x) != SUBREG)
1742 || (GET_CODE (other) == REG
1743 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1744 || reg_mentioned_p (other, x))))
1746 rtx temp = gen_reg_rtx (GET_MODE (x));
1747 emit_move_insn (temp, x);
1753 /* Emission of insns (adding them to the doubly-linked list). */
1755 /* Return the first insn of the current sequence or current function. */
1763 /* Return the last insn emitted in current sequence or current function. */
1771 /* Specify a new insn as the last in the chain. */
1774 set_last_insn (insn)
1777 if (NEXT_INSN (insn) != 0)
1782 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1785 get_last_insn_anywhere ()
1787 struct sequence_stack *stack;
1790 for (stack = sequence_stack; stack; stack = stack->next)
1791 if (stack->last != 0)
1796 /* Return a number larger than any instruction's uid in this function. */
1801 return cur_insn_uid;
1804 /* Return the next insn. If it is a SEQUENCE, return the first insn
1813 insn = NEXT_INSN (insn);
1814 if (insn && GET_CODE (insn) == INSN
1815 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1816 insn = XVECEXP (PATTERN (insn), 0, 0);
1822 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1826 previous_insn (insn)
1831 insn = PREV_INSN (insn);
1832 if (insn && GET_CODE (insn) == INSN
1833 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1834 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1840 /* Return the next insn after INSN that is not a NOTE. This routine does not
1841 look inside SEQUENCEs. */
1844 next_nonnote_insn (insn)
1849 insn = NEXT_INSN (insn);
1850 if (insn == 0 || GET_CODE (insn) != NOTE)
1857 /* Return the previous insn before INSN that is not a NOTE. This routine does
1858 not look inside SEQUENCEs. */
1861 prev_nonnote_insn (insn)
1866 insn = PREV_INSN (insn);
1867 if (insn == 0 || GET_CODE (insn) != NOTE)
1874 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1875 or 0, if there is none. This routine does not look inside
1879 next_real_insn (insn)
1884 insn = NEXT_INSN (insn);
1885 if (insn == 0 || GET_CODE (insn) == INSN
1886 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1893 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1894 or 0, if there is none. This routine does not look inside
1898 prev_real_insn (insn)
1903 insn = PREV_INSN (insn);
1904 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1905 || GET_CODE (insn) == JUMP_INSN)
1912 /* Find the next insn after INSN that really does something. This routine
1913 does not look inside SEQUENCEs. Until reload has completed, this is the
1914 same as next_real_insn. */
1917 next_active_insn (insn)
1922 insn = NEXT_INSN (insn);
1924 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1925 || (GET_CODE (insn) == INSN
1926 && (! reload_completed
1927 || (GET_CODE (PATTERN (insn)) != USE
1928 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1935 /* Find the last insn before INSN that really does something. This routine
1936 does not look inside SEQUENCEs. Until reload has completed, this is the
1937 same as prev_real_insn. */
1940 prev_active_insn (insn)
1945 insn = PREV_INSN (insn);
1947 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1948 || (GET_CODE (insn) == INSN
1949 && (! reload_completed
1950 || (GET_CODE (PATTERN (insn)) != USE
1951 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1958 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1966 insn = NEXT_INSN (insn);
1967 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1974 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1982 insn = PREV_INSN (insn);
1983 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1991 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1992 and REG_CC_USER notes so we can find it. */
1995 link_cc0_insns (insn)
1998 rtx user = next_nonnote_insn (insn);
2000 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2001 user = XVECEXP (PATTERN (user), 0, 0);
2003 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
2005 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
2008 /* Return the next insn that uses CC0 after INSN, which is assumed to
2009 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2010 applied to the result of this function should yield INSN).
2012 Normally, this is simply the next insn. However, if a REG_CC_USER note
2013 is present, it contains the insn that uses CC0.
2015 Return 0 if we can't find the insn. */
2018 next_cc0_user (insn)
2021 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2024 return XEXP (note, 0);
2026 insn = next_nonnote_insn (insn);
2027 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2028 insn = XVECEXP (PATTERN (insn), 0, 0);
2030 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2031 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2037 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2038 note, it is the previous insn. */
2041 prev_cc0_setter (insn)
2044 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2048 return XEXP (note, 0);
2050 insn = prev_nonnote_insn (insn);
2051 if (! sets_cc0_p (PATTERN (insn)))
2058 /* Try splitting insns that can be split for better scheduling.
2059 PAT is the pattern which might split.
2060 TRIAL is the insn providing PAT.
2061 LAST is non-zero if we should return the last insn of the sequence produced.
2063 If this routine succeeds in splitting, it returns the first or last
2064 replacement insn depending on the value of LAST. Otherwise, it
2065 returns TRIAL. If the insn to be returned can be split, it will be. */
2068 try_split (pat, trial, last)
2072 rtx before = PREV_INSN (trial);
2073 rtx after = NEXT_INSN (trial);
2074 rtx seq = split_insns (pat, trial);
2075 int has_barrier = 0;
2078 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2079 We may need to handle this specially. */
2080 if (after && GET_CODE (after) == BARRIER)
2083 after = NEXT_INSN (after);
2088 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2089 The latter case will normally arise only when being done so that
2090 it, in turn, will be split (SFmode on the 29k is an example). */
2091 if (GET_CODE (seq) == SEQUENCE)
2093 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2094 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2095 increment the usage count so we don't delete the label. */
2098 if (GET_CODE (trial) == JUMP_INSN)
2099 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2100 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2102 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2104 if (JUMP_LABEL (trial))
2105 LABEL_NUSES (JUMP_LABEL (trial))++;
2108 tem = emit_insn_after (seq, before);
2110 delete_insn (trial);
2112 emit_barrier_after (tem);
2114 /* Recursively call try_split for each new insn created; by the
2115 time control returns here that insn will be fully split, so
2116 set LAST and continue from the insn after the one returned.
2117 We can't use next_active_insn here since AFTER may be a note.
2118 Ignore deleted insns, which can be occur if not optimizing. */
2119 for (tem = NEXT_INSN (before); tem != after;
2120 tem = NEXT_INSN (tem))
2121 if (! INSN_DELETED_P (tem))
2122 tem = try_split (PATTERN (tem), tem, 1);
2124 /* Avoid infinite loop if the result matches the original pattern. */
2125 else if (rtx_equal_p (seq, pat))
2129 PATTERN (trial) = seq;
2130 INSN_CODE (trial) = -1;
2131 try_split (seq, trial, last);
2134 /* Return either the first or the last insn, depending on which was
2136 return last ? prev_active_insn (after) : next_active_insn (before);
2142 /* Make and return an INSN rtx, initializing all its slots.
2143 Store PATTERN in the pattern slots. */
2146 make_insn_raw (pattern)
2151 /* If in RTL generation phase, see if FREE_INSN can be used. */
2152 if (free_insn != 0 && rtx_equal_function_value_matters)
2155 free_insn = NEXT_INSN (free_insn);
2156 PUT_CODE (insn, INSN);
2159 insn = rtx_alloc (INSN);
2161 INSN_UID (insn) = cur_insn_uid++;
2162 PATTERN (insn) = pattern;
2163 INSN_CODE (insn) = -1;
2164 LOG_LINKS (insn) = NULL;
2165 REG_NOTES (insn) = NULL;
2170 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2173 make_jump_insn_raw (pattern)
2178 insn = rtx_alloc (JUMP_INSN);
2179 INSN_UID (insn) = cur_insn_uid++;
2181 PATTERN (insn) = pattern;
2182 INSN_CODE (insn) = -1;
2183 LOG_LINKS (insn) = NULL;
2184 REG_NOTES (insn) = NULL;
2185 JUMP_LABEL (insn) = NULL;
2190 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2193 make_call_insn_raw (pattern)
2198 insn = rtx_alloc (CALL_INSN);
2199 INSN_UID (insn) = cur_insn_uid++;
2201 PATTERN (insn) = pattern;
2202 INSN_CODE (insn) = -1;
2203 LOG_LINKS (insn) = NULL;
2204 REG_NOTES (insn) = NULL;
2205 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2210 /* Add INSN to the end of the doubly-linked list.
2211 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2217 PREV_INSN (insn) = last_insn;
2218 NEXT_INSN (insn) = 0;
2220 if (NULL != last_insn)
2221 NEXT_INSN (last_insn) = insn;
2223 if (NULL == first_insn)
2229 /* Add INSN into the doubly-linked list after insn AFTER. This and
2230 the next should be the only functions called to insert an insn once
2231 delay slots have been filled since only they know how to update a
2235 add_insn_after (insn, after)
2238 rtx next = NEXT_INSN (after);
2240 if (optimize && INSN_DELETED_P (after))
2243 NEXT_INSN (insn) = next;
2244 PREV_INSN (insn) = after;
2248 PREV_INSN (next) = insn;
2249 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2250 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2252 else if (last_insn == after)
2256 struct sequence_stack *stack = sequence_stack;
2257 /* Scan all pending sequences too. */
2258 for (; stack; stack = stack->next)
2259 if (after == stack->last)
2269 NEXT_INSN (after) = insn;
2270 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2272 rtx sequence = PATTERN (after);
2273 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2277 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2278 the previous should be the only functions called to insert an insn once
2279 delay slots have been filled since only they know how to update a
2283 add_insn_before (insn, before)
2286 rtx prev = PREV_INSN (before);
2288 if (optimize && INSN_DELETED_P (before))
2291 PREV_INSN (insn) = prev;
2292 NEXT_INSN (insn) = before;
2296 NEXT_INSN (prev) = insn;
2297 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2299 rtx sequence = PATTERN (prev);
2300 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2303 else if (first_insn == before)
2307 struct sequence_stack *stack = sequence_stack;
2308 /* Scan all pending sequences too. */
2309 for (; stack; stack = stack->next)
2310 if (before == stack->first)
2312 stack->first = insn;
2320 PREV_INSN (before) = insn;
2321 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2322 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2325 /* Delete all insns made since FROM.
2326 FROM becomes the new last instruction. */
2329 delete_insns_since (from)
2335 NEXT_INSN (from) = 0;
2339 /* This function is deprecated, please use sequences instead.
2341 Move a consecutive bunch of insns to a different place in the chain.
2342 The insns to be moved are those between FROM and TO.
2343 They are moved to a new position after the insn AFTER.
2344 AFTER must not be FROM or TO or any insn in between.
2346 This function does not know about SEQUENCEs and hence should not be
2347 called after delay-slot filling has been done. */
2350 reorder_insns (from, to, after)
2351 rtx from, to, after;
2353 /* Splice this bunch out of where it is now. */
2354 if (PREV_INSN (from))
2355 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2357 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2358 if (last_insn == to)
2359 last_insn = PREV_INSN (from);
2360 if (first_insn == from)
2361 first_insn = NEXT_INSN (to);
2363 /* Make the new neighbors point to it and it to them. */
2364 if (NEXT_INSN (after))
2365 PREV_INSN (NEXT_INSN (after)) = to;
2367 NEXT_INSN (to) = NEXT_INSN (after);
2368 PREV_INSN (from) = after;
2369 NEXT_INSN (after) = from;
2370 if (after == last_insn)
2374 /* Return the line note insn preceding INSN. */
2377 find_line_note (insn)
2380 if (no_line_numbers)
2383 for (; insn; insn = PREV_INSN (insn))
2384 if (GET_CODE (insn) == NOTE
2385 && NOTE_LINE_NUMBER (insn) >= 0)
2391 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2392 of the moved insns when debugging. This may insert a note between AFTER
2393 and FROM, and another one after TO. */
2396 reorder_insns_with_line_notes (from, to, after)
2397 rtx from, to, after;
2399 rtx from_line = find_line_note (from);
2400 rtx after_line = find_line_note (after);
2402 reorder_insns (from, to, after);
2404 if (from_line == after_line)
2408 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2409 NOTE_LINE_NUMBER (from_line),
2412 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2413 NOTE_LINE_NUMBER (after_line),
2417 /* Emit an insn of given code and pattern
2418 at a specified place within the doubly-linked list. */
2420 /* Make an instruction with body PATTERN
2421 and output it before the instruction BEFORE. */
2424 emit_insn_before (pattern, before)
2425 register rtx pattern, before;
2427 register rtx insn = before;
2429 if (GET_CODE (pattern) == SEQUENCE)
2433 for (i = 0; i < XVECLEN (pattern, 0); i++)
2435 insn = XVECEXP (pattern, 0, i);
2436 add_insn_before (insn, before);
2438 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2439 sequence_result[XVECLEN (pattern, 0)] = pattern;
2443 insn = make_insn_raw (pattern);
2444 add_insn_before (insn, before);
2450 /* Make an instruction with body PATTERN and code JUMP_INSN
2451 and output it before the instruction BEFORE. */
2454 emit_jump_insn_before (pattern, before)
2455 register rtx pattern, before;
2459 if (GET_CODE (pattern) == SEQUENCE)
2460 insn = emit_insn_before (pattern, before);
2463 insn = make_jump_insn_raw (pattern);
2464 add_insn_before (insn, before);
2470 /* Make an instruction with body PATTERN and code CALL_INSN
2471 and output it before the instruction BEFORE. */
2474 emit_call_insn_before (pattern, before)
2475 register rtx pattern, before;
2479 if (GET_CODE (pattern) == SEQUENCE)
2480 insn = emit_insn_before (pattern, before);
2483 insn = make_call_insn_raw (pattern);
2484 add_insn_before (insn, before);
2485 PUT_CODE (insn, CALL_INSN);
2491 /* Make an insn of code BARRIER
2492 and output it before the insn AFTER. */
2495 emit_barrier_before (before)
2496 register rtx before;
2498 register rtx insn = rtx_alloc (BARRIER);
2500 INSN_UID (insn) = cur_insn_uid++;
2502 add_insn_before (insn, before);
2506 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2509 emit_note_before (subtype, before)
2513 register rtx note = rtx_alloc (NOTE);
2514 INSN_UID (note) = cur_insn_uid++;
2515 NOTE_SOURCE_FILE (note) = 0;
2516 NOTE_LINE_NUMBER (note) = subtype;
2518 add_insn_before (note, before);
2522 /* Make an insn of code INSN with body PATTERN
2523 and output it after the insn AFTER. */
2526 emit_insn_after (pattern, after)
2527 register rtx pattern, after;
2529 register rtx insn = after;
2531 if (GET_CODE (pattern) == SEQUENCE)
2535 for (i = 0; i < XVECLEN (pattern, 0); i++)
2537 insn = XVECEXP (pattern, 0, i);
2538 add_insn_after (insn, after);
2541 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2542 sequence_result[XVECLEN (pattern, 0)] = pattern;
2546 insn = make_insn_raw (pattern);
2547 add_insn_after (insn, after);
2553 /* Similar to emit_insn_after, except that line notes are to be inserted so
2554 as to act as if this insn were at FROM. */
2557 emit_insn_after_with_line_notes (pattern, after, from)
2558 rtx pattern, after, from;
2560 rtx from_line = find_line_note (from);
2561 rtx after_line = find_line_note (after);
2562 rtx insn = emit_insn_after (pattern, after);
2565 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2566 NOTE_LINE_NUMBER (from_line),
2570 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2571 NOTE_LINE_NUMBER (after_line),
2575 /* Make an insn of code JUMP_INSN with body PATTERN
2576 and output it after the insn AFTER. */
2579 emit_jump_insn_after (pattern, after)
2580 register rtx pattern, after;
2584 if (GET_CODE (pattern) == SEQUENCE)
2585 insn = emit_insn_after (pattern, after);
2588 insn = make_jump_insn_raw (pattern);
2589 add_insn_after (insn, after);
2595 /* Make an insn of code BARRIER
2596 and output it after the insn AFTER. */
2599 emit_barrier_after (after)
2602 register rtx insn = rtx_alloc (BARRIER);
2604 INSN_UID (insn) = cur_insn_uid++;
2606 add_insn_after (insn, after);
2610 /* Emit the label LABEL after the insn AFTER. */
2613 emit_label_after (label, after)
2616 /* This can be called twice for the same label
2617 as a result of the confusion that follows a syntax error!
2618 So make it harmless. */
2619 if (INSN_UID (label) == 0)
2621 INSN_UID (label) = cur_insn_uid++;
2622 add_insn_after (label, after);
2628 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2631 emit_note_after (subtype, after)
2635 register rtx note = rtx_alloc (NOTE);
2636 INSN_UID (note) = cur_insn_uid++;
2637 NOTE_SOURCE_FILE (note) = 0;
2638 NOTE_LINE_NUMBER (note) = subtype;
2639 add_insn_after (note, after);
2643 /* Emit a line note for FILE and LINE after the insn AFTER. */
2646 emit_line_note_after (file, line, after)
2653 if (no_line_numbers && line > 0)
2659 note = rtx_alloc (NOTE);
2660 INSN_UID (note) = cur_insn_uid++;
2661 NOTE_SOURCE_FILE (note) = file;
2662 NOTE_LINE_NUMBER (note) = line;
2663 add_insn_after (note, after);
2667 /* Make an insn of code INSN with pattern PATTERN
2668 and add it to the end of the doubly-linked list.
2669 If PATTERN is a SEQUENCE, take the elements of it
2670 and emit an insn for each element.
2672 Returns the last insn emitted. */
2678 rtx insn = last_insn;
2680 if (GET_CODE (pattern) == SEQUENCE)
2684 for (i = 0; i < XVECLEN (pattern, 0); i++)
2686 insn = XVECEXP (pattern, 0, i);
2689 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2690 sequence_result[XVECLEN (pattern, 0)] = pattern;
2694 insn = make_insn_raw (pattern);
2701 /* Emit the insns in a chain starting with INSN.
2702 Return the last insn emitted. */
2712 rtx next = NEXT_INSN (insn);
2721 /* Emit the insns in a chain starting with INSN and place them in front of
2722 the insn BEFORE. Return the last insn emitted. */
2725 emit_insns_before (insn, before)
2733 rtx next = NEXT_INSN (insn);
2734 add_insn_before (insn, before);
2742 /* Emit the insns in a chain starting with FIRST and place them in back of
2743 the insn AFTER. Return the last insn emitted. */
2746 emit_insns_after (first, after)
2751 register rtx after_after;
2759 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2762 after_after = NEXT_INSN (after);
2764 NEXT_INSN (after) = first;
2765 PREV_INSN (first) = after;
2766 NEXT_INSN (last) = after_after;
2768 PREV_INSN (after_after) = last;
2770 if (after == last_insn)
2775 /* Make an insn of code JUMP_INSN with pattern PATTERN
2776 and add it to the end of the doubly-linked list. */
2779 emit_jump_insn (pattern)
2782 if (GET_CODE (pattern) == SEQUENCE)
2783 return emit_insn (pattern);
2786 register rtx insn = make_jump_insn_raw (pattern);
2792 /* Make an insn of code CALL_INSN with pattern PATTERN
2793 and add it to the end of the doubly-linked list. */
2796 emit_call_insn (pattern)
2799 if (GET_CODE (pattern) == SEQUENCE)
2800 return emit_insn (pattern);
2803 register rtx insn = make_call_insn_raw (pattern);
2805 PUT_CODE (insn, CALL_INSN);
2810 /* Add the label LABEL to the end of the doubly-linked list. */
2816 /* This can be called twice for the same label
2817 as a result of the confusion that follows a syntax error!
2818 So make it harmless. */
2819 if (INSN_UID (label) == 0)
2821 INSN_UID (label) = cur_insn_uid++;
2827 /* Make an insn of code BARRIER
2828 and add it to the end of the doubly-linked list. */
2833 register rtx barrier = rtx_alloc (BARRIER);
2834 INSN_UID (barrier) = cur_insn_uid++;
2839 /* Make an insn of code NOTE
2840 with data-fields specified by FILE and LINE
2841 and add it to the end of the doubly-linked list,
2842 but only if line-numbers are desired for debugging info. */
2845 emit_line_note (file, line)
2849 if (output_bytecode)
2851 /* FIXME: for now we do nothing, but eventually we will have to deal with
2852 debugging information. */
2856 emit_filename = file;
2860 if (no_line_numbers)
2864 return emit_note (file, line);
2867 /* Make an insn of code NOTE
2868 with data-fields specified by FILE and LINE
2869 and add it to the end of the doubly-linked list.
2870 If it is a line-number NOTE, omit it if it matches the previous one. */
2873 emit_note (file, line)
2881 if (file && last_filename && !strcmp (file, last_filename)
2882 && line == last_linenum)
2884 last_filename = file;
2885 last_linenum = line;
2888 if (no_line_numbers && line > 0)
2894 note = rtx_alloc (NOTE);
2895 INSN_UID (note) = cur_insn_uid++;
2896 NOTE_SOURCE_FILE (note) = file;
2897 NOTE_LINE_NUMBER (note) = line;
2902 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2905 emit_line_note_force (file, line)
2910 return emit_line_note (file, line);
2913 /* Cause next statement to emit a line note even if the line number
2914 has not changed. This is used at the beginning of a function. */
2917 force_next_line_note ()
2922 /* Return an indication of which type of insn should have X as a body.
2923 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2929 if (GET_CODE (x) == CODE_LABEL)
2931 if (GET_CODE (x) == CALL)
2933 if (GET_CODE (x) == RETURN)
2935 if (GET_CODE (x) == SET)
2937 if (SET_DEST (x) == pc_rtx)
2939 else if (GET_CODE (SET_SRC (x)) == CALL)
2944 if (GET_CODE (x) == PARALLEL)
2947 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2948 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2950 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2951 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2953 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2954 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2960 /* Emit the rtl pattern X as an appropriate kind of insn.
2961 If X is a label, it is simply added into the insn chain. */
2967 enum rtx_code code = classify_insn (x);
2969 if (code == CODE_LABEL)
2970 return emit_label (x);
2971 else if (code == INSN)
2972 return emit_insn (x);
2973 else if (code == JUMP_INSN)
2975 register rtx insn = emit_jump_insn (x);
2976 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2977 return emit_barrier ();
2980 else if (code == CALL_INSN)
2981 return emit_call_insn (x);
2986 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2991 struct sequence_stack *tem;
2993 if (sequence_element_free_list)
2995 /* Reuse a previously-saved struct sequence_stack. */
2996 tem = sequence_element_free_list;
2997 sequence_element_free_list = tem->next;
3000 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3002 tem->next = sequence_stack;
3003 tem->first = first_insn;
3004 tem->last = last_insn;
3005 tem->sequence_rtl_expr = sequence_rtl_expr;
3007 sequence_stack = tem;
3013 /* Similarly, but indicate that this sequence will be placed in
3017 start_sequence_for_rtl_expr (t)
3022 sequence_rtl_expr = t;
3025 /* Set up the insn chain starting with FIRST
3026 as the current sequence, saving the previously current one. */
3029 push_to_sequence (first)
3036 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3042 /* Set up the outer-level insn chain
3043 as the current sequence, saving the previously current one. */
3046 push_topmost_sequence ()
3048 struct sequence_stack *stack, *top;
3052 for (stack = sequence_stack; stack; stack = stack->next)
3055 first_insn = top->first;
3056 last_insn = top->last;
3057 sequence_rtl_expr = top->sequence_rtl_expr;
3060 /* After emitting to the outer-level insn chain, update the outer-level
3061 insn chain, and restore the previous saved state. */
3064 pop_topmost_sequence ()
3066 struct sequence_stack *stack, *top;
3068 for (stack = sequence_stack; stack; stack = stack->next)
3071 top->first = first_insn;
3072 top->last = last_insn;
3073 /* ??? Why don't we save sequence_rtl_expr here? */
3078 /* After emitting to a sequence, restore previous saved state.
3080 To get the contents of the sequence just made,
3081 you must call `gen_sequence' *before* calling here. */
3086 struct sequence_stack *tem = sequence_stack;
3088 first_insn = tem->first;
3089 last_insn = tem->last;
3090 sequence_rtl_expr = tem->sequence_rtl_expr;
3091 sequence_stack = tem->next;
3093 tem->next = sequence_element_free_list;
3094 sequence_element_free_list = tem;
3097 /* Return 1 if currently emitting into a sequence. */
3102 return sequence_stack != 0;
3105 /* Generate a SEQUENCE rtx containing the insns already emitted
3106 to the current sequence.
3108 This is how the gen_... function from a DEFINE_EXPAND
3109 constructs the SEQUENCE that it returns. */
3119 /* Count the insns in the chain. */
3121 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3124 /* If only one insn, return its pattern rather than a SEQUENCE.
3125 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3126 the case of an empty list.) */
3128 && (GET_CODE (first_insn) == INSN
3129 || GET_CODE (first_insn) == JUMP_INSN
3130 /* Don't discard the call usage field. */
3131 || (GET_CODE (first_insn) == CALL_INSN
3132 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3134 NEXT_INSN (first_insn) = free_insn;
3135 free_insn = first_insn;
3136 return PATTERN (first_insn);
3139 /* Put them in a vector. See if we already have a SEQUENCE of the
3140 appropriate length around. */
3141 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3142 sequence_result[len] = 0;
3145 /* Ensure that this rtl goes in saveable_obstack, since we may
3147 push_obstacks_nochange ();
3148 rtl_in_saveable_obstack ();
3149 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
3153 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3154 XVECEXP (result, 0, i) = tem;
3159 /* Initialize data structures and variables in this file
3160 before generating rtl for each function. */
3169 sequence_rtl_expr = NULL;
3171 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3174 first_label_num = label_num;
3176 sequence_stack = NULL;
3178 /* Clear the start_sequence/gen_sequence cache. */
3179 sequence_element_free_list = 0;
3180 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3181 sequence_result[i] = 0;
3184 /* Init the tables that describe all the pseudo regs. */
3186 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3189 = (char *) savealloc (regno_pointer_flag_length);
3190 bzero (regno_pointer_flag, regno_pointer_flag_length);
3193 = (char *) savealloc (regno_pointer_flag_length);
3194 bzero (regno_pointer_align, regno_pointer_flag_length);
3197 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3198 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3200 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3201 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3202 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3203 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3204 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3206 /* Indicate that the virtual registers and stack locations are
3208 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3209 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3210 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3211 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3213 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3214 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3215 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3216 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3218 #ifdef STACK_BOUNDARY
3219 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3220 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3221 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3222 = STACK_BOUNDARY / BITS_PER_UNIT;
3223 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3225 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3226 = STACK_BOUNDARY / BITS_PER_UNIT;
3227 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3228 = STACK_BOUNDARY / BITS_PER_UNIT;
3229 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3230 = STACK_BOUNDARY / BITS_PER_UNIT;
3231 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3232 = STACK_BOUNDARY / BITS_PER_UNIT;
3235 #ifdef INIT_EXPANDERS
3240 /* Create some permanent unique rtl objects shared between all functions.
3241 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3244 init_emit_once (line_numbers)
3248 enum machine_mode mode;
3250 no_line_numbers = ! line_numbers;
3252 sequence_stack = NULL;
3254 /* Compute the word and byte modes. */
3256 byte_mode = VOIDmode;
3257 word_mode = VOIDmode;
3259 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3260 mode = GET_MODE_WIDER_MODE (mode))
3262 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3263 && byte_mode == VOIDmode)
3266 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3267 && word_mode == VOIDmode)
3271 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3273 /* Create the unique rtx's for certain rtx codes and operand values. */
3275 pc_rtx = gen_rtx (PC, VOIDmode);
3276 cc0_rtx = gen_rtx (CC0, VOIDmode);
3278 /* Don't use gen_rtx here since gen_rtx in this case
3279 tries to use these variables. */
3280 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3282 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
3283 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3284 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3287 /* These four calls obtain some of the rtx expressions made above. */
3288 const0_rtx = GEN_INT (0);
3289 const1_rtx = GEN_INT (1);
3290 const2_rtx = GEN_INT (2);
3291 constm1_rtx = GEN_INT (-1);
3293 /* This will usually be one of the above constants, but may be a new rtx. */
3294 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
3296 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3297 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3298 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3299 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3301 for (i = 0; i <= 2; i++)
3303 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3304 mode = GET_MODE_WIDER_MODE (mode))
3306 rtx tem = rtx_alloc (CONST_DOUBLE);
3307 union real_extract u;
3309 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3310 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3312 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3313 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3314 PUT_MODE (tem, mode);
3316 const_tiny_rtx[i][(int) mode] = tem;
3319 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3321 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3322 mode = GET_MODE_WIDER_MODE (mode))
3323 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3325 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3327 mode = GET_MODE_WIDER_MODE (mode))
3328 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3331 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3332 mode = GET_MODE_WIDER_MODE (mode))
3333 const_tiny_rtx[0][(int) mode] = const0_rtx;
3335 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
3336 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
3338 if (HARD_FRAME_POINTER_REGNUM == FRAME_POINTER_REGNUM)
3339 hard_frame_pointer_rtx = frame_pointer_rtx;
3341 hard_frame_pointer_rtx = gen_rtx (REG, Pmode, HARD_FRAME_POINTER_REGNUM);
3343 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3344 arg_pointer_rtx = frame_pointer_rtx;
3345 else if (HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3346 arg_pointer_rtx = hard_frame_pointer_rtx;
3347 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
3348 arg_pointer_rtx = stack_pointer_rtx;
3350 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
3352 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3353 return_address_pointer_rtx = gen_rtx (REG, Pmode,
3354 RETURN_ADDRESS_POINTER_REGNUM);
3357 /* Create the virtual registers. Do so here since the following objects
3358 might reference them. */
3360 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
3361 VIRTUAL_INCOMING_ARGS_REGNUM);
3362 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
3363 VIRTUAL_STACK_VARS_REGNUM);
3364 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
3365 VIRTUAL_STACK_DYNAMIC_REGNUM);
3366 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
3367 VIRTUAL_OUTGOING_ARGS_REGNUM);
3370 struct_value_rtx = STRUCT_VALUE;
3372 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
3375 #ifdef STRUCT_VALUE_INCOMING
3376 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3378 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3379 struct_value_incoming_rtx
3380 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3382 struct_value_incoming_rtx = struct_value_rtx;
3386 #ifdef STATIC_CHAIN_REGNUM
3387 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
3389 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3390 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3391 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3394 static_chain_incoming_rtx = static_chain_rtx;
3398 static_chain_rtx = STATIC_CHAIN;
3400 #ifdef STATIC_CHAIN_INCOMING
3401 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3403 static_chain_incoming_rtx = static_chain_rtx;
3407 #ifdef PIC_OFFSET_TABLE_REGNUM
3408 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);