1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
62 #include "tree-flow.h"
64 struct target_rtl default_target_rtl;
66 struct target_rtl *this_target_rtl = &default_target_rtl;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num = 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
97 is set only for MODE_INT and MODE_VECTOR_INT modes. */
99 rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
107 REAL_VALUE_TYPE dconsthalf;
109 /* Record fixed-point constant 0 and 1. */
110 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
111 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
113 /* We make one copy of (const_int C) where C is in
114 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
115 to save space during the compilation and simplify comparisons of
118 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
120 /* A hash table storing CONST_INTs whose absolute value is greater
121 than MAX_SAVED_CONST_INT. */
123 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
124 htab_t const_int_htab;
126 /* A hash table storing memory attribute structures. */
127 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
128 htab_t mem_attrs_htab;
130 /* A hash table storing register attribute structures. */
131 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
132 htab_t reg_attrs_htab;
134 /* A hash table storing all CONST_DOUBLEs. */
135 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
136 htab_t const_double_htab;
138 /* A hash table storing all CONST_FIXEDs. */
139 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
140 htab_t const_fixed_htab;
142 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
143 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
144 #define last_location (crtl->emit.x_last_location)
145 #define first_label_num (crtl->emit.x_first_label_num)
147 static rtx make_call_insn_raw (rtx);
148 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
149 static void set_used_decls (tree);
150 static void mark_label_nuses (rtx);
151 static hashval_t const_int_htab_hash (const void *);
152 static int const_int_htab_eq (const void *, const void *);
153 static hashval_t const_double_htab_hash (const void *);
154 static int const_double_htab_eq (const void *, const void *);
155 static rtx lookup_const_double (rtx);
156 static hashval_t const_fixed_htab_hash (const void *);
157 static int const_fixed_htab_eq (const void *, const void *);
158 static rtx lookup_const_fixed (rtx);
159 static hashval_t mem_attrs_htab_hash (const void *);
160 static int mem_attrs_htab_eq (const void *, const void *);
161 static hashval_t reg_attrs_htab_hash (const void *);
162 static int reg_attrs_htab_eq (const void *, const void *);
163 static reg_attrs *get_reg_attrs (tree, int);
164 static rtx gen_const_vector (enum machine_mode, int);
165 static void copy_rtx_if_shared_1 (rtx *orig);
167 /* Probability of the conditional branch currently proceeded by try_split.
168 Set to -1 otherwise. */
169 int split_branch_probability = -1;
171 /* Returns a hash code for X (which is a really a CONST_INT). */
174 const_int_htab_hash (const void *x)
176 return (hashval_t) INTVAL ((const_rtx) x);
179 /* Returns nonzero if the value represented by X (which is really a
180 CONST_INT) is the same as that given by Y (which is really a
184 const_int_htab_eq (const void *x, const void *y)
186 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
189 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
191 const_double_htab_hash (const void *x)
193 const_rtx const value = (const_rtx) x;
196 if (GET_MODE (value) == VOIDmode)
197 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
200 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
201 /* MODE is used in the comparison, so it should be in the hash. */
202 h ^= GET_MODE (value);
207 /* Returns nonzero if the value represented by X (really a ...)
208 is the same as that represented by Y (really a ...) */
210 const_double_htab_eq (const void *x, const void *y)
212 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
214 if (GET_MODE (a) != GET_MODE (b))
216 if (GET_MODE (a) == VOIDmode)
217 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
218 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
220 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
221 CONST_DOUBLE_REAL_VALUE (b));
224 /* Returns a hash code for X (which is really a CONST_FIXED). */
227 const_fixed_htab_hash (const void *x)
229 const_rtx const value = (const_rtx) x;
232 h = fixed_hash (CONST_FIXED_VALUE (value));
233 /* MODE is used in the comparison, so it should be in the hash. */
234 h ^= GET_MODE (value);
238 /* Returns nonzero if the value represented by X (really a ...)
239 is the same as that represented by Y (really a ...). */
242 const_fixed_htab_eq (const void *x, const void *y)
244 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
246 if (GET_MODE (a) != GET_MODE (b))
248 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
251 /* Returns a hash code for X (which is a really a mem_attrs *). */
254 mem_attrs_htab_hash (const void *x)
256 const mem_attrs *const p = (const mem_attrs *) x;
258 return (p->alias ^ (p->align * 1000)
259 ^ (p->addrspace * 4000)
260 ^ ((p->offset_known_p ? p->offset : 0) * 50000)
261 ^ ((p->size_known_p ? p->size : 0) * 2500000)
262 ^ (size_t) iterative_hash_expr (p->expr, 0));
265 /* Return true if the given memory attributes are equal. */
268 mem_attrs_eq_p (const struct mem_attrs *p, const struct mem_attrs *q)
270 return (p->alias == q->alias
271 && p->offset_known_p == q->offset_known_p
272 && (!p->offset_known_p || p->offset == q->offset)
273 && p->size_known_p == q->size_known_p
274 && (!p->size_known_p || p->size == q->size)
275 && p->align == q->align
276 && p->addrspace == q->addrspace
277 && (p->expr == q->expr
278 || (p->expr != NULL_TREE && q->expr != NULL_TREE
279 && operand_equal_p (p->expr, q->expr, 0))));
282 /* Returns nonzero if the value represented by X (which is really a
283 mem_attrs *) is the same as that given by Y (which is also really a
287 mem_attrs_htab_eq (const void *x, const void *y)
289 return mem_attrs_eq_p ((const mem_attrs *) x, (const mem_attrs *) y);
292 /* Set MEM's memory attributes so that they are the same as ATTRS. */
295 set_mem_attrs (rtx mem, mem_attrs *attrs)
299 /* If everything is the default, we can just clear the attributes. */
300 if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
306 slot = htab_find_slot (mem_attrs_htab, attrs, INSERT);
309 *slot = ggc_alloc_mem_attrs ();
310 memcpy (*slot, attrs, sizeof (mem_attrs));
313 MEM_ATTRS (mem) = (mem_attrs *) *slot;
316 /* Returns a hash code for X (which is a really a reg_attrs *). */
319 reg_attrs_htab_hash (const void *x)
321 const reg_attrs *const p = (const reg_attrs *) x;
323 return ((p->offset * 1000) ^ (intptr_t) p->decl);
326 /* Returns nonzero if the value represented by X (which is really a
327 reg_attrs *) is the same as that given by Y (which is also really a
331 reg_attrs_htab_eq (const void *x, const void *y)
333 const reg_attrs *const p = (const reg_attrs *) x;
334 const reg_attrs *const q = (const reg_attrs *) y;
336 return (p->decl == q->decl && p->offset == q->offset);
338 /* Allocate a new reg_attrs structure and insert it into the hash table if
339 one identical to it is not already in the table. We are doing this for
343 get_reg_attrs (tree decl, int offset)
348 /* If everything is the default, we can just return zero. */
349 if (decl == 0 && offset == 0)
353 attrs.offset = offset;
355 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
358 *slot = ggc_alloc_reg_attrs ();
359 memcpy (*slot, &attrs, sizeof (reg_attrs));
362 return (reg_attrs *) *slot;
367 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
373 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
374 MEM_VOLATILE_P (x) = true;
380 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
381 don't attempt to share with the various global pieces of rtl (such as
382 frame_pointer_rtx). */
385 gen_raw_REG (enum machine_mode mode, int regno)
387 rtx x = gen_rtx_raw_REG (mode, regno);
388 ORIGINAL_REGNO (x) = regno;
392 /* There are some RTL codes that require special attention; the generation
393 functions do the raw handling. If you add to this list, modify
394 special_rtx in gengenrtl.c as well. */
397 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
401 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
402 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
404 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
405 if (const_true_rtx && arg == STORE_FLAG_VALUE)
406 return const_true_rtx;
409 /* Look up the CONST_INT in the hash table. */
410 slot = htab_find_slot_with_hash (const_int_htab, &arg,
411 (hashval_t) arg, INSERT);
413 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
419 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
421 return GEN_INT (trunc_int_for_mode (c, mode));
424 /* CONST_DOUBLEs might be created from pairs of integers, or from
425 REAL_VALUE_TYPEs. Also, their length is known only at run time,
426 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
428 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
429 hash table. If so, return its counterpart; otherwise add it
430 to the hash table and return it. */
432 lookup_const_double (rtx real)
434 void **slot = htab_find_slot (const_double_htab, real, INSERT);
441 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
442 VALUE in mode MODE. */
444 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
446 rtx real = rtx_alloc (CONST_DOUBLE);
447 PUT_MODE (real, mode);
451 return lookup_const_double (real);
454 /* Determine whether FIXED, a CONST_FIXED, already exists in the
455 hash table. If so, return its counterpart; otherwise add it
456 to the hash table and return it. */
459 lookup_const_fixed (rtx fixed)
461 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
468 /* Return a CONST_FIXED rtx for a fixed-point value specified by
469 VALUE in mode MODE. */
472 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
474 rtx fixed = rtx_alloc (CONST_FIXED);
475 PUT_MODE (fixed, mode);
479 return lookup_const_fixed (fixed);
482 /* Constructs double_int from rtx CST. */
485 rtx_to_double_int (const_rtx cst)
489 if (CONST_INT_P (cst))
490 r = shwi_to_double_int (INTVAL (cst));
491 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
493 r.low = CONST_DOUBLE_LOW (cst);
494 r.high = CONST_DOUBLE_HIGH (cst);
503 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
507 immed_double_int_const (double_int i, enum machine_mode mode)
509 return immed_double_const (i.low, i.high, mode);
512 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
513 of ints: I0 is the low-order word and I1 is the high-order word.
514 Do not use this routine for non-integer modes; convert to
515 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
518 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
523 /* There are the following cases (note that there are no modes with
524 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
526 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
528 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
529 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
530 from copies of the sign bit, and sign of i0 and i1 are the same), then
531 we return a CONST_INT for i0.
532 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
533 if (mode != VOIDmode)
535 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
536 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
537 /* We can get a 0 for an error mark. */
538 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
539 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
541 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
542 return gen_int_mode (i0, mode);
544 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
547 /* If this integer fits in one word, return a CONST_INT. */
548 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
551 /* We use VOIDmode for integers. */
552 value = rtx_alloc (CONST_DOUBLE);
553 PUT_MODE (value, VOIDmode);
555 CONST_DOUBLE_LOW (value) = i0;
556 CONST_DOUBLE_HIGH (value) = i1;
558 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
559 XWINT (value, i) = 0;
561 return lookup_const_double (value);
565 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
567 /* In case the MD file explicitly references the frame pointer, have
568 all such references point to the same frame pointer. This is
569 used during frame pointer elimination to distinguish the explicit
570 references to these registers from pseudos that happened to be
573 If we have eliminated the frame pointer or arg pointer, we will
574 be using it as a normal register, for example as a spill
575 register. In such cases, we might be accessing it in a mode that
576 is not Pmode and therefore cannot use the pre-allocated rtx.
578 Also don't do this when we are making new REGs in reload, since
579 we don't want to get confused with the real pointers. */
581 if (mode == Pmode && !reload_in_progress)
583 if (regno == FRAME_POINTER_REGNUM
584 && (!reload_completed || frame_pointer_needed))
585 return frame_pointer_rtx;
586 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
587 if (regno == HARD_FRAME_POINTER_REGNUM
588 && (!reload_completed || frame_pointer_needed))
589 return hard_frame_pointer_rtx;
591 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
592 if (regno == ARG_POINTER_REGNUM)
593 return arg_pointer_rtx;
595 #ifdef RETURN_ADDRESS_POINTER_REGNUM
596 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
597 return return_address_pointer_rtx;
599 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
600 && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
601 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
602 return pic_offset_table_rtx;
603 if (regno == STACK_POINTER_REGNUM)
604 return stack_pointer_rtx;
608 /* If the per-function register table has been set up, try to re-use
609 an existing entry in that table to avoid useless generation of RTL.
611 This code is disabled for now until we can fix the various backends
612 which depend on having non-shared hard registers in some cases. Long
613 term we want to re-enable this code as it can significantly cut down
614 on the amount of useless RTL that gets generated.
616 We'll also need to fix some code that runs after reload that wants to
617 set ORIGINAL_REGNO. */
622 && regno < FIRST_PSEUDO_REGISTER
623 && reg_raw_mode[regno] == mode)
624 return regno_reg_rtx[regno];
627 return gen_raw_REG (mode, regno);
631 gen_rtx_MEM (enum machine_mode mode, rtx addr)
633 rtx rt = gen_rtx_raw_MEM (mode, addr);
635 /* This field is not cleared by the mere allocation of the rtx, so
642 /* Generate a memory referring to non-trapping constant memory. */
645 gen_const_mem (enum machine_mode mode, rtx addr)
647 rtx mem = gen_rtx_MEM (mode, addr);
648 MEM_READONLY_P (mem) = 1;
649 MEM_NOTRAP_P (mem) = 1;
653 /* Generate a MEM referring to fixed portions of the frame, e.g., register
657 gen_frame_mem (enum machine_mode mode, rtx addr)
659 rtx mem = gen_rtx_MEM (mode, addr);
660 MEM_NOTRAP_P (mem) = 1;
661 set_mem_alias_set (mem, get_frame_alias_set ());
665 /* Generate a MEM referring to a temporary use of the stack, not part
666 of the fixed stack frame. For example, something which is pushed
667 by a target splitter. */
669 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
671 rtx mem = gen_rtx_MEM (mode, addr);
672 MEM_NOTRAP_P (mem) = 1;
673 if (!cfun->calls_alloca)
674 set_mem_alias_set (mem, get_frame_alias_set ());
678 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
679 this construct would be valid, and false otherwise. */
682 validate_subreg (enum machine_mode omode, enum machine_mode imode,
683 const_rtx reg, unsigned int offset)
685 unsigned int isize = GET_MODE_SIZE (imode);
686 unsigned int osize = GET_MODE_SIZE (omode);
688 /* All subregs must be aligned. */
689 if (offset % osize != 0)
692 /* The subreg offset cannot be outside the inner object. */
696 /* ??? This should not be here. Temporarily continue to allow word_mode
697 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
698 Generally, backends are doing something sketchy but it'll take time to
700 if (omode == word_mode)
702 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
703 is the culprit here, and not the backends. */
704 else if (osize >= UNITS_PER_WORD && isize >= osize)
706 /* Allow component subregs of complex and vector. Though given the below
707 extraction rules, it's not always clear what that means. */
708 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
709 && GET_MODE_INNER (imode) == omode)
711 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
712 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
713 represent this. It's questionable if this ought to be represented at
714 all -- why can't this all be hidden in post-reload splitters that make
715 arbitrarily mode changes to the registers themselves. */
716 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
718 /* Subregs involving floating point modes are not allowed to
719 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
720 (subreg:SI (reg:DF) 0) isn't. */
721 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
727 /* Paradoxical subregs must have offset zero. */
731 /* This is a normal subreg. Verify that the offset is representable. */
733 /* For hard registers, we already have most of these rules collected in
734 subreg_offset_representable_p. */
735 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
737 unsigned int regno = REGNO (reg);
739 #ifdef CANNOT_CHANGE_MODE_CLASS
740 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
741 && GET_MODE_INNER (imode) == omode)
743 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
747 return subreg_offset_representable_p (regno, imode, offset, omode);
750 /* For pseudo registers, we want most of the same checks. Namely:
751 If the register no larger than a word, the subreg must be lowpart.
752 If the register is larger than a word, the subreg must be the lowpart
753 of a subword. A subreg does *not* perform arbitrary bit extraction.
754 Given that we've already checked mode/offset alignment, we only have
755 to check subword subregs here. */
756 if (osize < UNITS_PER_WORD)
758 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
759 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
760 if (offset % UNITS_PER_WORD != low_off)
767 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
769 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
770 return gen_rtx_raw_SUBREG (mode, reg, offset);
773 /* Generate a SUBREG representing the least-significant part of REG if MODE
774 is smaller than mode of REG, otherwise paradoxical SUBREG. */
777 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
779 enum machine_mode inmode;
781 inmode = GET_MODE (reg);
782 if (inmode == VOIDmode)
784 return gen_rtx_SUBREG (mode, reg,
785 subreg_lowpart_offset (mode, inmode));
789 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
792 gen_rtvec (int n, ...)
800 /* Don't allocate an empty rtvec... */
807 rt_val = rtvec_alloc (n);
809 for (i = 0; i < n; i++)
810 rt_val->elem[i] = va_arg (p, rtx);
817 gen_rtvec_v (int n, rtx *argp)
822 /* Don't allocate an empty rtvec... */
826 rt_val = rtvec_alloc (n);
828 for (i = 0; i < n; i++)
829 rt_val->elem[i] = *argp++;
834 /* Return the number of bytes between the start of an OUTER_MODE
835 in-memory value and the start of an INNER_MODE in-memory value,
836 given that the former is a lowpart of the latter. It may be a
837 paradoxical lowpart, in which case the offset will be negative
838 on big-endian targets. */
841 byte_lowpart_offset (enum machine_mode outer_mode,
842 enum machine_mode inner_mode)
844 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
845 return subreg_lowpart_offset (outer_mode, inner_mode);
847 return -subreg_lowpart_offset (inner_mode, outer_mode);
850 /* Generate a REG rtx for a new pseudo register of mode MODE.
851 This pseudo is assigned the next sequential register number. */
854 gen_reg_rtx (enum machine_mode mode)
857 unsigned int align = GET_MODE_ALIGNMENT (mode);
859 gcc_assert (can_create_pseudo_p ());
861 /* If a virtual register with bigger mode alignment is generated,
862 increase stack alignment estimation because it might be spilled
864 if (SUPPORTS_STACK_ALIGNMENT
865 && crtl->stack_alignment_estimated < align
866 && !crtl->stack_realign_processed)
868 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
869 if (crtl->stack_alignment_estimated < min_align)
870 crtl->stack_alignment_estimated = min_align;
873 if (generating_concat_p
874 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
875 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
877 /* For complex modes, don't make a single pseudo.
878 Instead, make a CONCAT of two pseudos.
879 This allows noncontiguous allocation of the real and imaginary parts,
880 which makes much better code. Besides, allocating DCmode
881 pseudos overstrains reload on some machines like the 386. */
882 rtx realpart, imagpart;
883 enum machine_mode partmode = GET_MODE_INNER (mode);
885 realpart = gen_reg_rtx (partmode);
886 imagpart = gen_reg_rtx (partmode);
887 return gen_rtx_CONCAT (mode, realpart, imagpart);
890 /* Make sure regno_pointer_align, and regno_reg_rtx are large
891 enough to have an element for this pseudo reg number. */
893 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
895 int old_size = crtl->emit.regno_pointer_align_length;
899 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
900 memset (tmp + old_size, 0, old_size);
901 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
903 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
904 memset (new1 + old_size, 0, old_size * sizeof (rtx));
905 regno_reg_rtx = new1;
907 crtl->emit.regno_pointer_align_length = old_size * 2;
910 val = gen_raw_REG (mode, reg_rtx_no);
911 regno_reg_rtx[reg_rtx_no++] = val;
915 /* Update NEW with the same attributes as REG, but with OFFSET added
916 to the REG_OFFSET. */
919 update_reg_offset (rtx new_rtx, rtx reg, int offset)
921 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
922 REG_OFFSET (reg) + offset);
925 /* Generate a register with same attributes as REG, but with OFFSET
926 added to the REG_OFFSET. */
929 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
932 rtx new_rtx = gen_rtx_REG (mode, regno);
934 update_reg_offset (new_rtx, reg, offset);
938 /* Generate a new pseudo-register with the same attributes as REG, but
939 with OFFSET added to the REG_OFFSET. */
942 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
944 rtx new_rtx = gen_reg_rtx (mode);
946 update_reg_offset (new_rtx, reg, offset);
950 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
951 new register is a (possibly paradoxical) lowpart of the old one. */
954 adjust_reg_mode (rtx reg, enum machine_mode mode)
956 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
957 PUT_MODE (reg, mode);
960 /* Copy REG's attributes from X, if X has any attributes. If REG and X
961 have different modes, REG is a (possibly paradoxical) lowpart of X. */
964 set_reg_attrs_from_value (rtx reg, rtx x)
968 /* Hard registers can be reused for multiple purposes within the same
969 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
971 if (HARD_REGISTER_P (reg))
974 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
977 if (MEM_OFFSET_KNOWN_P (x))
978 REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
979 MEM_OFFSET (x) + offset);
981 mark_reg_pointer (reg, 0);
986 update_reg_offset (reg, x, offset);
988 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
992 /* Generate a REG rtx for a new pseudo register, copying the mode
993 and attributes from X. */
996 gen_reg_rtx_and_attrs (rtx x)
998 rtx reg = gen_reg_rtx (GET_MODE (x));
999 set_reg_attrs_from_value (reg, x);
1003 /* Set the register attributes for registers contained in PARM_RTX.
1004 Use needed values from memory attributes of MEM. */
1007 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1009 if (REG_P (parm_rtx))
1010 set_reg_attrs_from_value (parm_rtx, mem);
1011 else if (GET_CODE (parm_rtx) == PARALLEL)
1013 /* Check for a NULL entry in the first slot, used to indicate that the
1014 parameter goes both on the stack and in registers. */
1015 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1016 for (; i < XVECLEN (parm_rtx, 0); i++)
1018 rtx x = XVECEXP (parm_rtx, 0, i);
1019 if (REG_P (XEXP (x, 0)))
1020 REG_ATTRS (XEXP (x, 0))
1021 = get_reg_attrs (MEM_EXPR (mem),
1022 INTVAL (XEXP (x, 1)));
1027 /* Set the REG_ATTRS for registers in value X, given that X represents
1031 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1033 if (GET_CODE (x) == SUBREG)
1035 gcc_assert (subreg_lowpart_p (x));
1040 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1042 if (GET_CODE (x) == CONCAT)
1044 if (REG_P (XEXP (x, 0)))
1045 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1046 if (REG_P (XEXP (x, 1)))
1047 REG_ATTRS (XEXP (x, 1))
1048 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1050 if (GET_CODE (x) == PARALLEL)
1054 /* Check for a NULL entry, used to indicate that the parameter goes
1055 both on the stack and in registers. */
1056 if (XEXP (XVECEXP (x, 0, 0), 0))
1061 for (i = start; i < XVECLEN (x, 0); i++)
1063 rtx y = XVECEXP (x, 0, i);
1064 if (REG_P (XEXP (y, 0)))
1065 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1070 /* Assign the RTX X to declaration T. */
1073 set_decl_rtl (tree t, rtx x)
1075 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1077 set_reg_attrs_for_decl_rtl (t, x);
1080 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1081 if the ABI requires the parameter to be passed by reference. */
1084 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1086 DECL_INCOMING_RTL (t) = x;
1087 if (x && !by_reference_p)
1088 set_reg_attrs_for_decl_rtl (t, x);
1091 /* Identify REG (which may be a CONCAT) as a user register. */
1094 mark_user_reg (rtx reg)
1096 if (GET_CODE (reg) == CONCAT)
1098 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1099 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1103 gcc_assert (REG_P (reg));
1104 REG_USERVAR_P (reg) = 1;
1108 /* Identify REG as a probable pointer register and show its alignment
1109 as ALIGN, if nonzero. */
1112 mark_reg_pointer (rtx reg, int align)
1114 if (! REG_POINTER (reg))
1116 REG_POINTER (reg) = 1;
1119 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1121 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1122 /* We can no-longer be sure just how aligned this pointer is. */
1123 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1126 /* Return 1 plus largest pseudo reg number used in the current function. */
1134 /* Return 1 + the largest label number used so far in the current function. */
1137 max_label_num (void)
1142 /* Return first label number used in this function (if any were used). */
1145 get_first_label_num (void)
1147 return first_label_num;
1150 /* If the rtx for label was created during the expansion of a nested
1151 function, then first_label_num won't include this label number.
1152 Fix this now so that array indices work later. */
1155 maybe_set_first_label_num (rtx x)
1157 if (CODE_LABEL_NUMBER (x) < first_label_num)
1158 first_label_num = CODE_LABEL_NUMBER (x);
1161 /* Return a value representing some low-order bits of X, where the number
1162 of low-order bits is given by MODE. Note that no conversion is done
1163 between floating-point and fixed-point values, rather, the bit
1164 representation is returned.
1166 This function handles the cases in common between gen_lowpart, below,
1167 and two variants in cse.c and combine.c. These are the cases that can
1168 be safely handled at all points in the compilation.
1170 If this is not a case we can handle, return 0. */
1173 gen_lowpart_common (enum machine_mode mode, rtx x)
1175 int msize = GET_MODE_SIZE (mode);
1178 enum machine_mode innermode;
1180 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1181 so we have to make one up. Yuk. */
1182 innermode = GET_MODE (x);
1184 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1185 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1186 else if (innermode == VOIDmode)
1187 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1189 xsize = GET_MODE_SIZE (innermode);
1191 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1193 if (innermode == mode)
1196 /* MODE must occupy no more words than the mode of X. */
1197 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1198 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1201 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1202 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1205 offset = subreg_lowpart_offset (mode, innermode);
1207 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1208 && (GET_MODE_CLASS (mode) == MODE_INT
1209 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1211 /* If we are getting the low-order part of something that has been
1212 sign- or zero-extended, we can either just use the object being
1213 extended or make a narrower extension. If we want an even smaller
1214 piece than the size of the object being extended, call ourselves
1217 This case is used mostly by combine and cse. */
1219 if (GET_MODE (XEXP (x, 0)) == mode)
1221 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1222 return gen_lowpart_common (mode, XEXP (x, 0));
1223 else if (msize < xsize)
1224 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1226 else if (GET_CODE (x) == SUBREG || REG_P (x)
1227 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1228 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1229 return simplify_gen_subreg (mode, x, innermode, offset);
1231 /* Otherwise, we can't do this. */
1236 gen_highpart (enum machine_mode mode, rtx x)
1238 unsigned int msize = GET_MODE_SIZE (mode);
1241 /* This case loses if X is a subreg. To catch bugs early,
1242 complain if an invalid MODE is used even in other cases. */
1243 gcc_assert (msize <= UNITS_PER_WORD
1244 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1246 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1247 subreg_highpart_offset (mode, GET_MODE (x)));
1248 gcc_assert (result);
1250 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1251 the target if we have a MEM. gen_highpart must return a valid operand,
1252 emitting code if necessary to do so. */
1255 result = validize_mem (result);
1256 gcc_assert (result);
1262 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1263 be VOIDmode constant. */
1265 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1267 if (GET_MODE (exp) != VOIDmode)
1269 gcc_assert (GET_MODE (exp) == innermode);
1270 return gen_highpart (outermode, exp);
1272 return simplify_gen_subreg (outermode, exp, innermode,
1273 subreg_highpart_offset (outermode, innermode));
1276 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1279 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1281 unsigned int offset = 0;
1282 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1286 if (WORDS_BIG_ENDIAN)
1287 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1288 if (BYTES_BIG_ENDIAN)
1289 offset += difference % UNITS_PER_WORD;
1295 /* Return offset in bytes to get OUTERMODE high part
1296 of the value in mode INNERMODE stored in memory in target format. */
1298 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1300 unsigned int offset = 0;
1301 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1303 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1307 if (! WORDS_BIG_ENDIAN)
1308 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1309 if (! BYTES_BIG_ENDIAN)
1310 offset += difference % UNITS_PER_WORD;
1316 /* Return 1 iff X, assumed to be a SUBREG,
1317 refers to the least significant part of its containing reg.
1318 If X is not a SUBREG, always return 1 (it is its own low part!). */
1321 subreg_lowpart_p (const_rtx x)
1323 if (GET_CODE (x) != SUBREG)
1325 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1328 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1329 == SUBREG_BYTE (x));
1332 /* Return true if X is a paradoxical subreg, false otherwise. */
1334 paradoxical_subreg_p (const_rtx x)
1336 if (GET_CODE (x) != SUBREG)
1338 return (GET_MODE_PRECISION (GET_MODE (x))
1339 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x))));
1342 /* Return subword OFFSET of operand OP.
1343 The word number, OFFSET, is interpreted as the word number starting
1344 at the low-order address. OFFSET 0 is the low-order word if not
1345 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1347 If we cannot extract the required word, we return zero. Otherwise,
1348 an rtx corresponding to the requested word will be returned.
1350 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1351 reload has completed, a valid address will always be returned. After
1352 reload, if a valid address cannot be returned, we return zero.
1354 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1355 it is the responsibility of the caller.
1357 MODE is the mode of OP in case it is a CONST_INT.
1359 ??? This is still rather broken for some cases. The problem for the
1360 moment is that all callers of this thing provide no 'goal mode' to
1361 tell us to work with. This exists because all callers were written
1362 in a word based SUBREG world.
1363 Now use of this function can be deprecated by simplify_subreg in most
1368 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1370 if (mode == VOIDmode)
1371 mode = GET_MODE (op);
1373 gcc_assert (mode != VOIDmode);
1375 /* If OP is narrower than a word, fail. */
1377 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1380 /* If we want a word outside OP, return zero. */
1382 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1385 /* Form a new MEM at the requested address. */
1388 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1390 if (! validate_address)
1393 else if (reload_completed)
1395 if (! strict_memory_address_addr_space_p (word_mode,
1397 MEM_ADDR_SPACE (op)))
1401 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1404 /* Rest can be handled by simplify_subreg. */
1405 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1408 /* Similar to `operand_subword', but never return 0. If we can't
1409 extract the required subword, put OP into a register and try again.
1410 The second attempt must succeed. We always validate the address in
1413 MODE is the mode of OP, in case it is CONST_INT. */
1416 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1418 rtx result = operand_subword (op, offset, 1, mode);
1423 if (mode != BLKmode && mode != VOIDmode)
1425 /* If this is a register which can not be accessed by words, copy it
1426 to a pseudo register. */
1428 op = copy_to_reg (op);
1430 op = force_reg (mode, op);
1433 result = operand_subword (op, offset, 1, mode);
1434 gcc_assert (result);
1439 /* Returns 1 if both MEM_EXPR can be considered equal
1443 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1448 if (! expr1 || ! expr2)
1451 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1454 return operand_equal_p (expr1, expr2, 0);
1457 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1458 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1462 get_mem_align_offset (rtx mem, unsigned int align)
1465 unsigned HOST_WIDE_INT offset;
1467 /* This function can't use
1468 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1469 || (MAX (MEM_ALIGN (mem),
1470 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1474 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1476 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1477 for <variable>. get_inner_reference doesn't handle it and
1478 even if it did, the alignment in that case needs to be determined
1479 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1480 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1481 isn't sufficiently aligned, the object it is in might be. */
1482 gcc_assert (MEM_P (mem));
1483 expr = MEM_EXPR (mem);
1484 if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1487 offset = MEM_OFFSET (mem);
1490 if (DECL_ALIGN (expr) < align)
1493 else if (INDIRECT_REF_P (expr))
1495 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1498 else if (TREE_CODE (expr) == COMPONENT_REF)
1502 tree inner = TREE_OPERAND (expr, 0);
1503 tree field = TREE_OPERAND (expr, 1);
1504 tree byte_offset = component_ref_field_offset (expr);
1505 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1508 || !host_integerp (byte_offset, 1)
1509 || !host_integerp (bit_offset, 1))
1512 offset += tree_low_cst (byte_offset, 1);
1513 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1515 if (inner == NULL_TREE)
1517 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1518 < (unsigned int) align)
1522 else if (DECL_P (inner))
1524 if (DECL_ALIGN (inner) < align)
1528 else if (TREE_CODE (inner) != COMPONENT_REF)
1536 return offset & ((align / BITS_PER_UNIT) - 1);
1539 /* Given REF (a MEM) and T, either the type of X or the expression
1540 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1541 if we are making a new object of this type. BITPOS is nonzero if
1542 there is an offset outstanding on T that will be applied later. */
1545 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1546 HOST_WIDE_INT bitpos)
1548 HOST_WIDE_INT apply_bitpos = 0;
1550 struct mem_attrs attrs, *defattrs, *refattrs;
1553 /* It can happen that type_for_mode was given a mode for which there
1554 is no language-level type. In which case it returns NULL, which
1559 type = TYPE_P (t) ? t : TREE_TYPE (t);
1560 if (type == error_mark_node)
1563 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1564 wrong answer, as it assumes that DECL_RTL already has the right alias
1565 info. Callers should not set DECL_RTL until after the call to
1566 set_mem_attributes. */
1567 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1569 memset (&attrs, 0, sizeof (attrs));
1571 /* Get the alias set from the expression or type (perhaps using a
1572 front-end routine) and use it. */
1573 attrs.alias = get_alias_set (t);
1575 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1576 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1578 /* Default values from pre-existing memory attributes if present. */
1579 refattrs = MEM_ATTRS (ref);
1582 /* ??? Can this ever happen? Calling this routine on a MEM that
1583 already carries memory attributes should probably be invalid. */
1584 attrs.expr = refattrs->expr;
1585 attrs.offset_known_p = refattrs->offset_known_p;
1586 attrs.offset = refattrs->offset;
1587 attrs.size_known_p = refattrs->size_known_p;
1588 attrs.size = refattrs->size;
1589 attrs.align = refattrs->align;
1592 /* Otherwise, default values from the mode of the MEM reference. */
1595 defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
1596 gcc_assert (!defattrs->expr);
1597 gcc_assert (!defattrs->offset_known_p);
1599 /* Respect mode size. */
1600 attrs.size_known_p = defattrs->size_known_p;
1601 attrs.size = defattrs->size;
1602 /* ??? Is this really necessary? We probably should always get
1603 the size from the type below. */
1605 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1606 if T is an object, always compute the object alignment below. */
1608 attrs.align = defattrs->align;
1610 attrs.align = BITS_PER_UNIT;
1611 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1612 e.g. if the type carries an alignment attribute. Should we be
1613 able to simply always use TYPE_ALIGN? */
1616 /* We can set the alignment from the type if we are making an object,
1617 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1618 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1619 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1621 else if (TREE_CODE (t) == MEM_REF)
1623 tree op0 = TREE_OPERAND (t, 0);
1624 if (TREE_CODE (op0) == ADDR_EXPR
1625 && (DECL_P (TREE_OPERAND (op0, 0))
1626 || CONSTANT_CLASS_P (TREE_OPERAND (op0, 0))))
1628 if (DECL_P (TREE_OPERAND (op0, 0)))
1629 attrs.align = DECL_ALIGN (TREE_OPERAND (op0, 0));
1630 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0)))
1632 attrs.align = TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0, 0)));
1633 #ifdef CONSTANT_ALIGNMENT
1634 attrs.align = CONSTANT_ALIGNMENT (TREE_OPERAND (op0, 0),
1638 if (TREE_INT_CST_LOW (TREE_OPERAND (t, 1)) != 0)
1640 unsigned HOST_WIDE_INT ioff
1641 = TREE_INT_CST_LOW (TREE_OPERAND (t, 1));
1642 unsigned HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1643 attrs.align = MIN (aoff, attrs.align);
1647 /* ??? This isn't fully correct, we can't set the alignment from the
1648 type in all cases. */
1649 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1652 else if (TREE_CODE (t) == TARGET_MEM_REF)
1653 /* ??? This isn't fully correct, we can't set the alignment from the
1654 type in all cases. */
1655 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1657 /* If the size is known, we can set that. */
1658 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1660 attrs.size_known_p = true;
1661 attrs.size = tree_low_cst (TYPE_SIZE_UNIT (type), 1);
1664 /* If T is not a type, we may be able to deduce some more information about
1669 bool align_computed = false;
1671 if (TREE_THIS_VOLATILE (t))
1672 MEM_VOLATILE_P (ref) = 1;
1674 /* Now remove any conversions: they don't change what the underlying
1675 object is. Likewise for SAVE_EXPR. */
1676 while (CONVERT_EXPR_P (t)
1677 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1678 || TREE_CODE (t) == SAVE_EXPR)
1679 t = TREE_OPERAND (t, 0);
1681 /* Note whether this expression can trap. */
1682 MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
1684 base = get_base_address (t);
1688 && TREE_READONLY (base)
1689 && (TREE_STATIC (base) || DECL_EXTERNAL (base))
1690 && !TREE_THIS_VOLATILE (base))
1691 MEM_READONLY_P (ref) = 1;
1693 /* Mark static const strings readonly as well. */
1694 if (TREE_CODE (base) == STRING_CST
1695 && TREE_READONLY (base)
1696 && TREE_STATIC (base))
1697 MEM_READONLY_P (ref) = 1;
1699 if (TREE_CODE (base) == MEM_REF
1700 || TREE_CODE (base) == TARGET_MEM_REF)
1701 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
1704 as = TYPE_ADDR_SPACE (TREE_TYPE (base));
1707 as = TYPE_ADDR_SPACE (type);
1709 /* If this expression uses it's parent's alias set, mark it such
1710 that we won't change it. */
1711 if (component_uses_parent_alias_set (t))
1712 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1714 /* If this is a decl, set the attributes of the MEM from it. */
1718 attrs.offset_known_p = true;
1720 apply_bitpos = bitpos;
1721 if (DECL_SIZE_UNIT (t) && host_integerp (DECL_SIZE_UNIT (t), 1))
1723 attrs.size_known_p = true;
1724 attrs.size = tree_low_cst (DECL_SIZE_UNIT (t), 1);
1727 attrs.size_known_p = false;
1728 attrs.align = DECL_ALIGN (t);
1729 align_computed = true;
1732 /* If this is a constant, we know the alignment. */
1733 else if (CONSTANT_CLASS_P (t))
1735 attrs.align = TYPE_ALIGN (type);
1736 #ifdef CONSTANT_ALIGNMENT
1737 attrs.align = CONSTANT_ALIGNMENT (t, attrs.align);
1739 align_computed = true;
1742 /* If this is a field reference and not a bit-field, record it. */
1743 /* ??? There is some information that can be gleaned from bit-fields,
1744 such as the word offset in the structure that might be modified.
1745 But skip it for now. */
1746 else if (TREE_CODE (t) == COMPONENT_REF
1747 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1750 attrs.offset_known_p = true;
1752 apply_bitpos = bitpos;
1753 /* ??? Any reason the field size would be different than
1754 the size we got from the type? */
1757 /* If this is an array reference, look for an outer field reference. */
1758 else if (TREE_CODE (t) == ARRAY_REF)
1760 tree off_tree = size_zero_node;
1761 /* We can't modify t, because we use it at the end of the
1767 tree index = TREE_OPERAND (t2, 1);
1768 tree low_bound = array_ref_low_bound (t2);
1769 tree unit_size = array_ref_element_size (t2);
1771 /* We assume all arrays have sizes that are a multiple of a byte.
1772 First subtract the lower bound, if any, in the type of the
1773 index, then convert to sizetype and multiply by the size of
1774 the array element. */
1775 if (! integer_zerop (low_bound))
1776 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1779 off_tree = size_binop (PLUS_EXPR,
1780 size_binop (MULT_EXPR,
1781 fold_convert (sizetype,
1785 t2 = TREE_OPERAND (t2, 0);
1787 while (TREE_CODE (t2) == ARRAY_REF);
1792 attrs.offset_known_p = false;
1793 if (host_integerp (off_tree, 1))
1795 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1796 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1797 attrs.align = DECL_ALIGN (t2);
1798 if (aoff && (unsigned HOST_WIDE_INT) aoff < attrs.align)
1800 align_computed = true;
1801 attrs.offset_known_p = true;
1802 attrs.offset = ioff;
1803 apply_bitpos = bitpos;
1806 else if (TREE_CODE (t2) == COMPONENT_REF)
1809 attrs.offset_known_p = false;
1810 if (host_integerp (off_tree, 1))
1812 attrs.offset_known_p = true;
1813 attrs.offset = tree_low_cst (off_tree, 1);
1814 apply_bitpos = bitpos;
1816 /* ??? Any reason the field size would be different than
1817 the size we got from the type? */
1820 /* If this is an indirect reference, record it. */
1821 else if (TREE_CODE (t) == MEM_REF)
1824 attrs.offset_known_p = true;
1826 apply_bitpos = bitpos;
1830 /* If this is an indirect reference, record it. */
1831 else if (TREE_CODE (t) == MEM_REF
1832 || TREE_CODE (t) == TARGET_MEM_REF)
1835 attrs.offset_known_p = true;
1837 apply_bitpos = bitpos;
1840 if (!align_computed)
1842 unsigned int obj_align = get_object_alignment (t);
1843 attrs.align = MAX (attrs.align, obj_align);
1847 as = TYPE_ADDR_SPACE (type);
1849 /* If we modified OFFSET based on T, then subtract the outstanding
1850 bit position offset. Similarly, increase the size of the accessed
1851 object to contain the negative offset. */
1854 gcc_assert (attrs.offset_known_p);
1855 attrs.offset -= apply_bitpos / BITS_PER_UNIT;
1856 if (attrs.size_known_p)
1857 attrs.size += apply_bitpos / BITS_PER_UNIT;
1860 /* Now set the attributes we computed above. */
1861 attrs.addrspace = as;
1862 set_mem_attrs (ref, &attrs);
1866 set_mem_attributes (rtx ref, tree t, int objectp)
1868 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1871 /* Set the alias set of MEM to SET. */
1874 set_mem_alias_set (rtx mem, alias_set_type set)
1876 struct mem_attrs attrs;
1878 /* If the new and old alias sets don't conflict, something is wrong. */
1879 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1880 attrs = *get_mem_attrs (mem);
1882 set_mem_attrs (mem, &attrs);
1885 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1888 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1890 struct mem_attrs attrs;
1892 attrs = *get_mem_attrs (mem);
1893 attrs.addrspace = addrspace;
1894 set_mem_attrs (mem, &attrs);
1897 /* Set the alignment of MEM to ALIGN bits. */
1900 set_mem_align (rtx mem, unsigned int align)
1902 struct mem_attrs attrs;
1904 attrs = *get_mem_attrs (mem);
1905 attrs.align = align;
1906 set_mem_attrs (mem, &attrs);
1909 /* Set the expr for MEM to EXPR. */
1912 set_mem_expr (rtx mem, tree expr)
1914 struct mem_attrs attrs;
1916 attrs = *get_mem_attrs (mem);
1918 set_mem_attrs (mem, &attrs);
1921 /* Set the offset of MEM to OFFSET. */
1924 set_mem_offset (rtx mem, HOST_WIDE_INT offset)
1926 struct mem_attrs attrs;
1928 attrs = *get_mem_attrs (mem);
1929 attrs.offset_known_p = true;
1930 attrs.offset = offset;
1931 set_mem_attrs (mem, &attrs);
1934 /* Clear the offset of MEM. */
1937 clear_mem_offset (rtx mem)
1939 struct mem_attrs attrs;
1941 attrs = *get_mem_attrs (mem);
1942 attrs.offset_known_p = false;
1943 set_mem_attrs (mem, &attrs);
1946 /* Set the size of MEM to SIZE. */
1949 set_mem_size (rtx mem, HOST_WIDE_INT size)
1951 struct mem_attrs attrs;
1953 attrs = *get_mem_attrs (mem);
1954 attrs.size_known_p = true;
1956 set_mem_attrs (mem, &attrs);
1959 /* Clear the size of MEM. */
1962 clear_mem_size (rtx mem)
1964 struct mem_attrs attrs;
1966 attrs = *get_mem_attrs (mem);
1967 attrs.size_known_p = false;
1968 set_mem_attrs (mem, &attrs);
1971 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1972 and its address changed to ADDR. (VOIDmode means don't change the mode.
1973 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1974 returned memory location is required to be valid. The memory
1975 attributes are not changed. */
1978 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1983 gcc_assert (MEM_P (memref));
1984 as = MEM_ADDR_SPACE (memref);
1985 if (mode == VOIDmode)
1986 mode = GET_MODE (memref);
1988 addr = XEXP (memref, 0);
1989 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1990 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1995 if (reload_in_progress || reload_completed)
1996 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1998 addr = memory_address_addr_space (mode, addr, as);
2001 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2004 new_rtx = gen_rtx_MEM (mode, addr);
2005 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2009 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2010 way we are changing MEMREF, so we only preserve the alias set. */
2013 change_address (rtx memref, enum machine_mode mode, rtx addr)
2015 rtx new_rtx = change_address_1 (memref, mode, addr, 1);
2016 enum machine_mode mmode = GET_MODE (new_rtx);
2017 struct mem_attrs attrs, *defattrs;
2019 attrs = *get_mem_attrs (memref);
2020 defattrs = mode_mem_attrs[(int) mmode];
2021 attrs.expr = NULL_TREE;
2022 attrs.offset_known_p = false;
2023 attrs.size_known_p = defattrs->size_known_p;
2024 attrs.size = defattrs->size;
2025 attrs.align = defattrs->align;
2027 /* If there are no changes, just return the original memory reference. */
2028 if (new_rtx == memref)
2030 if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2033 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2034 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2037 set_mem_attrs (new_rtx, &attrs);
2041 /* Return a memory reference like MEMREF, but with its mode changed
2042 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2043 nonzero, the memory address is forced to be valid.
2044 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2045 and caller is responsible for adjusting MEMREF base register. */
2048 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2049 int validate, int adjust)
2051 rtx addr = XEXP (memref, 0);
2053 enum machine_mode address_mode;
2055 struct mem_attrs attrs, *defattrs;
2056 unsigned HOST_WIDE_INT max_align;
2058 attrs = *get_mem_attrs (memref);
2060 /* If there are no changes, just return the original memory reference. */
2061 if (mode == GET_MODE (memref) && !offset
2062 && (!validate || memory_address_addr_space_p (mode, addr,
2066 /* ??? Prefer to create garbage instead of creating shared rtl.
2067 This may happen even if offset is nonzero -- consider
2068 (plus (plus reg reg) const_int) -- so do this always. */
2069 addr = copy_rtx (addr);
2071 /* Convert a possibly large offset to a signed value within the
2072 range of the target address space. */
2073 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2074 pbits = GET_MODE_BITSIZE (address_mode);
2075 if (HOST_BITS_PER_WIDE_INT > pbits)
2077 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2078 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2084 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2085 object, we can merge it into the LO_SUM. */
2086 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2088 && (unsigned HOST_WIDE_INT) offset
2089 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2090 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2091 plus_constant (XEXP (addr, 1), offset));
2093 addr = plus_constant (addr, offset);
2096 new_rtx = change_address_1 (memref, mode, addr, validate);
2098 /* If the address is a REG, change_address_1 rightfully returns memref,
2099 but this would destroy memref's MEM_ATTRS. */
2100 if (new_rtx == memref && offset != 0)
2101 new_rtx = copy_rtx (new_rtx);
2103 /* Compute the new values of the memory attributes due to this adjustment.
2104 We add the offsets and update the alignment. */
2105 if (attrs.offset_known_p)
2106 attrs.offset += offset;
2108 /* Compute the new alignment by taking the MIN of the alignment and the
2109 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2113 max_align = (offset & -offset) * BITS_PER_UNIT;
2114 attrs.align = MIN (attrs.align, max_align);
2117 /* We can compute the size in a number of ways. */
2118 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2119 if (defattrs->size_known_p)
2121 attrs.size_known_p = true;
2122 attrs.size = defattrs->size;
2124 else if (attrs.size_known_p)
2125 attrs.size -= offset;
2127 set_mem_attrs (new_rtx, &attrs);
2129 /* At some point, we should validate that this offset is within the object,
2130 if all the appropriate values are known. */
2134 /* Return a memory reference like MEMREF, but with its mode changed
2135 to MODE and its address changed to ADDR, which is assumed to be
2136 MEMREF offset by OFFSET bytes. If VALIDATE is
2137 nonzero, the memory address is forced to be valid. */
2140 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2141 HOST_WIDE_INT offset, int validate)
2143 memref = change_address_1 (memref, VOIDmode, addr, validate);
2144 return adjust_address_1 (memref, mode, offset, validate, 0);
2147 /* Return a memory reference like MEMREF, but whose address is changed by
2148 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2149 known to be in OFFSET (possibly 1). */
2152 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2154 rtx new_rtx, addr = XEXP (memref, 0);
2155 enum machine_mode address_mode;
2156 struct mem_attrs attrs, *defattrs;
2158 attrs = *get_mem_attrs (memref);
2159 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2160 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2162 /* At this point we don't know _why_ the address is invalid. It
2163 could have secondary memory references, multiplies or anything.
2165 However, if we did go and rearrange things, we can wind up not
2166 being able to recognize the magic around pic_offset_table_rtx.
2167 This stuff is fragile, and is yet another example of why it is
2168 bad to expose PIC machinery too early. */
2169 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2171 && GET_CODE (addr) == PLUS
2172 && XEXP (addr, 0) == pic_offset_table_rtx)
2174 addr = force_reg (GET_MODE (addr), addr);
2175 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2178 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2179 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2181 /* If there are no changes, just return the original memory reference. */
2182 if (new_rtx == memref)
2185 /* Update the alignment to reflect the offset. Reset the offset, which
2187 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2188 attrs.offset_known_p = false;
2189 attrs.size_known_p = defattrs->size_known_p;
2190 attrs.size = defattrs->size;
2191 attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2192 set_mem_attrs (new_rtx, &attrs);
2196 /* Return a memory reference like MEMREF, but with its address changed to
2197 ADDR. The caller is asserting that the actual piece of memory pointed
2198 to is the same, just the form of the address is being changed, such as
2199 by putting something into a register. */
2202 replace_equiv_address (rtx memref, rtx addr)
2204 /* change_address_1 copies the memory attribute structure without change
2205 and that's exactly what we want here. */
2206 update_temp_slot_address (XEXP (memref, 0), addr);
2207 return change_address_1 (memref, VOIDmode, addr, 1);
2210 /* Likewise, but the reference is not required to be valid. */
2213 replace_equiv_address_nv (rtx memref, rtx addr)
2215 return change_address_1 (memref, VOIDmode, addr, 0);
2218 /* Return a memory reference like MEMREF, but with its mode widened to
2219 MODE and offset by OFFSET. This would be used by targets that e.g.
2220 cannot issue QImode memory operations and have to use SImode memory
2221 operations plus masking logic. */
2224 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2226 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2227 struct mem_attrs attrs;
2228 unsigned int size = GET_MODE_SIZE (mode);
2230 /* If there are no changes, just return the original memory reference. */
2231 if (new_rtx == memref)
2234 attrs = *get_mem_attrs (new_rtx);
2236 /* If we don't know what offset we were at within the expression, then
2237 we can't know if we've overstepped the bounds. */
2238 if (! attrs.offset_known_p)
2239 attrs.expr = NULL_TREE;
2243 if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2245 tree field = TREE_OPERAND (attrs.expr, 1);
2246 tree offset = component_ref_field_offset (attrs.expr);
2248 if (! DECL_SIZE_UNIT (field))
2250 attrs.expr = NULL_TREE;
2254 /* Is the field at least as large as the access? If so, ok,
2255 otherwise strip back to the containing structure. */
2256 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2257 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2258 && attrs.offset >= 0)
2261 if (! host_integerp (offset, 1))
2263 attrs.expr = NULL_TREE;
2267 attrs.expr = TREE_OPERAND (attrs.expr, 0);
2268 attrs.offset += tree_low_cst (offset, 1);
2269 attrs.offset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2272 /* Similarly for the decl. */
2273 else if (DECL_P (attrs.expr)
2274 && DECL_SIZE_UNIT (attrs.expr)
2275 && TREE_CODE (DECL_SIZE_UNIT (attrs.expr)) == INTEGER_CST
2276 && compare_tree_int (DECL_SIZE_UNIT (attrs.expr), size) >= 0
2277 && (! attrs.offset_known_p || attrs.offset >= 0))
2281 /* The widened memory access overflows the expression, which means
2282 that it could alias another expression. Zap it. */
2283 attrs.expr = NULL_TREE;
2289 attrs.offset_known_p = false;
2291 /* The widened memory may alias other stuff, so zap the alias set. */
2292 /* ??? Maybe use get_alias_set on any remaining expression. */
2294 attrs.size_known_p = true;
2296 set_mem_attrs (new_rtx, &attrs);
2300 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2301 static GTY(()) tree spill_slot_decl;
2304 get_spill_slot_decl (bool force_build_p)
2306 tree d = spill_slot_decl;
2308 struct mem_attrs attrs;
2310 if (d || !force_build_p)
2313 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2314 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2315 DECL_ARTIFICIAL (d) = 1;
2316 DECL_IGNORED_P (d) = 1;
2318 spill_slot_decl = d;
2320 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2321 MEM_NOTRAP_P (rd) = 1;
2322 attrs = *mode_mem_attrs[(int) BLKmode];
2323 attrs.alias = new_alias_set ();
2325 set_mem_attrs (rd, &attrs);
2326 SET_DECL_RTL (d, rd);
2331 /* Given MEM, a result from assign_stack_local, fill in the memory
2332 attributes as appropriate for a register allocator spill slot.
2333 These slots are not aliasable by other memory. We arrange for
2334 them all to use a single MEM_EXPR, so that the aliasing code can
2335 work properly in the case of shared spill slots. */
2338 set_mem_attrs_for_spill (rtx mem)
2340 struct mem_attrs attrs;
2343 attrs = *get_mem_attrs (mem);
2344 attrs.expr = get_spill_slot_decl (true);
2345 attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2346 attrs.addrspace = ADDR_SPACE_GENERIC;
2348 /* We expect the incoming memory to be of the form:
2349 (mem:MODE (plus (reg sfp) (const_int offset)))
2350 with perhaps the plus missing for offset = 0. */
2351 addr = XEXP (mem, 0);
2352 attrs.offset_known_p = true;
2354 if (GET_CODE (addr) == PLUS
2355 && CONST_INT_P (XEXP (addr, 1)))
2356 attrs.offset = INTVAL (XEXP (addr, 1));
2358 set_mem_attrs (mem, &attrs);
2359 MEM_NOTRAP_P (mem) = 1;
2362 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2365 gen_label_rtx (void)
2367 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2368 NULL, label_num++, NULL);
2371 /* For procedure integration. */
2373 /* Install new pointers to the first and last insns in the chain.
2374 Also, set cur_insn_uid to one higher than the last in use.
2375 Used for an inline-procedure after copying the insn chain. */
2378 set_new_first_and_last_insn (rtx first, rtx last)
2382 set_first_insn (first);
2383 set_last_insn (last);
2386 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2388 int debug_count = 0;
2390 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2391 cur_debug_insn_uid = 0;
2393 for (insn = first; insn; insn = NEXT_INSN (insn))
2394 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2395 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2398 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2399 if (DEBUG_INSN_P (insn))
2404 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2406 cur_debug_insn_uid++;
2409 for (insn = first; insn; insn = NEXT_INSN (insn))
2410 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2415 /* Go through all the RTL insn bodies and copy any invalid shared
2416 structure. This routine should only be called once. */
2419 unshare_all_rtl_1 (rtx insn)
2421 /* Unshare just about everything else. */
2422 unshare_all_rtl_in_chain (insn);
2424 /* Make sure the addresses of stack slots found outside the insn chain
2425 (such as, in DECL_RTL of a variable) are not shared
2426 with the insn chain.
2428 This special care is necessary when the stack slot MEM does not
2429 actually appear in the insn chain. If it does appear, its address
2430 is unshared from all else at that point. */
2431 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2434 /* Go through all the RTL insn bodies and copy any invalid shared
2435 structure, again. This is a fairly expensive thing to do so it
2436 should be done sparingly. */
2439 unshare_all_rtl_again (rtx insn)
2444 for (p = insn; p; p = NEXT_INSN (p))
2447 reset_used_flags (PATTERN (p));
2448 reset_used_flags (REG_NOTES (p));
2450 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2453 /* Make sure that virtual stack slots are not shared. */
2454 set_used_decls (DECL_INITIAL (cfun->decl));
2456 /* Make sure that virtual parameters are not shared. */
2457 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2458 set_used_flags (DECL_RTL (decl));
2460 reset_used_flags (stack_slot_list);
2462 unshare_all_rtl_1 (insn);
2466 unshare_all_rtl (void)
2468 unshare_all_rtl_1 (get_insns ());
2472 struct rtl_opt_pass pass_unshare_all_rtl =
2476 "unshare", /* name */
2478 unshare_all_rtl, /* execute */
2481 0, /* static_pass_number */
2482 TV_NONE, /* tv_id */
2483 0, /* properties_required */
2484 0, /* properties_provided */
2485 0, /* properties_destroyed */
2486 0, /* todo_flags_start */
2487 TODO_verify_rtl_sharing /* todo_flags_finish */
2492 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2493 Recursively does the same for subexpressions. */
2496 verify_rtx_sharing (rtx orig, rtx insn)
2501 const char *format_ptr;
2506 code = GET_CODE (x);
2508 /* These types may be freely shared. */
2528 /* SCRATCH must be shared because they represent distinct values. */
2530 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2535 if (shared_const_p (orig))
2540 /* A MEM is allowed to be shared if its address is constant. */
2541 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2542 || reload_completed || reload_in_progress)
2551 /* This rtx may not be shared. If it has already been seen,
2552 replace it with a copy of itself. */
2553 #ifdef ENABLE_CHECKING
2554 if (RTX_FLAG (x, used))
2556 error ("invalid rtl sharing found in the insn");
2558 error ("shared rtx");
2560 internal_error ("internal consistency failure");
2563 gcc_assert (!RTX_FLAG (x, used));
2565 RTX_FLAG (x, used) = 1;
2567 /* Now scan the subexpressions recursively. */
2569 format_ptr = GET_RTX_FORMAT (code);
2571 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2573 switch (*format_ptr++)
2576 verify_rtx_sharing (XEXP (x, i), insn);
2580 if (XVEC (x, i) != NULL)
2583 int len = XVECLEN (x, i);
2585 for (j = 0; j < len; j++)
2587 /* We allow sharing of ASM_OPERANDS inside single
2589 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2590 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2592 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2594 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2603 /* Go through all the RTL insn bodies and check that there is no unexpected
2604 sharing in between the subexpressions. */
2607 verify_rtl_sharing (void)
2611 timevar_push (TV_VERIFY_RTL_SHARING);
2613 for (p = get_insns (); p; p = NEXT_INSN (p))
2616 reset_used_flags (PATTERN (p));
2617 reset_used_flags (REG_NOTES (p));
2619 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2620 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2623 rtx q, sequence = PATTERN (p);
2625 for (i = 0; i < XVECLEN (sequence, 0); i++)
2627 q = XVECEXP (sequence, 0, i);
2628 gcc_assert (INSN_P (q));
2629 reset_used_flags (PATTERN (q));
2630 reset_used_flags (REG_NOTES (q));
2632 reset_used_flags (CALL_INSN_FUNCTION_USAGE (q));
2637 for (p = get_insns (); p; p = NEXT_INSN (p))
2640 verify_rtx_sharing (PATTERN (p), p);
2641 verify_rtx_sharing (REG_NOTES (p), p);
2643 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (p), p);
2646 timevar_pop (TV_VERIFY_RTL_SHARING);
2649 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2650 Assumes the mark bits are cleared at entry. */
2653 unshare_all_rtl_in_chain (rtx insn)
2655 for (; insn; insn = NEXT_INSN (insn))
2658 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2659 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2661 CALL_INSN_FUNCTION_USAGE (insn)
2662 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
2666 /* Go through all virtual stack slots of a function and mark them as
2667 shared. We never replace the DECL_RTLs themselves with a copy,
2668 but expressions mentioned into a DECL_RTL cannot be shared with
2669 expressions in the instruction stream.
2671 Note that reload may convert pseudo registers into memories in-place.
2672 Pseudo registers are always shared, but MEMs never are. Thus if we
2673 reset the used flags on MEMs in the instruction stream, we must set
2674 them again on MEMs that appear in DECL_RTLs. */
2677 set_used_decls (tree blk)
2682 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2683 if (DECL_RTL_SET_P (t))
2684 set_used_flags (DECL_RTL (t));
2686 /* Now process sub-blocks. */
2687 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2691 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2692 Recursively does the same for subexpressions. Uses
2693 copy_rtx_if_shared_1 to reduce stack space. */
2696 copy_rtx_if_shared (rtx orig)
2698 copy_rtx_if_shared_1 (&orig);
2702 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2703 use. Recursively does the same for subexpressions. */
2706 copy_rtx_if_shared_1 (rtx *orig1)
2712 const char *format_ptr;
2716 /* Repeat is used to turn tail-recursion into iteration. */
2723 code = GET_CODE (x);
2725 /* These types may be freely shared. */
2744 /* SCRATCH must be shared because they represent distinct values. */
2747 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2752 if (shared_const_p (x))
2762 /* The chain of insns is not being copied. */
2769 /* This rtx may not be shared. If it has already been seen,
2770 replace it with a copy of itself. */
2772 if (RTX_FLAG (x, used))
2774 x = shallow_copy_rtx (x);
2777 RTX_FLAG (x, used) = 1;
2779 /* Now scan the subexpressions recursively.
2780 We can store any replaced subexpressions directly into X
2781 since we know X is not shared! Any vectors in X
2782 must be copied if X was copied. */
2784 format_ptr = GET_RTX_FORMAT (code);
2785 length = GET_RTX_LENGTH (code);
2788 for (i = 0; i < length; i++)
2790 switch (*format_ptr++)
2794 copy_rtx_if_shared_1 (last_ptr);
2795 last_ptr = &XEXP (x, i);
2799 if (XVEC (x, i) != NULL)
2802 int len = XVECLEN (x, i);
2804 /* Copy the vector iff I copied the rtx and the length
2806 if (copied && len > 0)
2807 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2809 /* Call recursively on all inside the vector. */
2810 for (j = 0; j < len; j++)
2813 copy_rtx_if_shared_1 (last_ptr);
2814 last_ptr = &XVECEXP (x, i, j);
2829 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2832 mark_used_flags (rtx x, int flag)
2836 const char *format_ptr;
2839 /* Repeat is used to turn tail-recursion into iteration. */
2844 code = GET_CODE (x);
2846 /* These types may be freely shared so we needn't do any resetting
2873 /* The chain of insns is not being copied. */
2880 RTX_FLAG (x, used) = flag;
2882 format_ptr = GET_RTX_FORMAT (code);
2883 length = GET_RTX_LENGTH (code);
2885 for (i = 0; i < length; i++)
2887 switch (*format_ptr++)
2895 mark_used_flags (XEXP (x, i), flag);
2899 for (j = 0; j < XVECLEN (x, i); j++)
2900 mark_used_flags (XVECEXP (x, i, j), flag);
2906 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2907 to look for shared sub-parts. */
2910 reset_used_flags (rtx x)
2912 mark_used_flags (x, 0);
2915 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2916 to look for shared sub-parts. */
2919 set_used_flags (rtx x)
2921 mark_used_flags (x, 1);
2924 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2925 Return X or the rtx for the pseudo reg the value of X was copied into.
2926 OTHER must be valid as a SET_DEST. */
2929 make_safe_from (rtx x, rtx other)
2932 switch (GET_CODE (other))
2935 other = SUBREG_REG (other);
2937 case STRICT_LOW_PART:
2940 other = XEXP (other, 0);
2949 && GET_CODE (x) != SUBREG)
2951 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2952 || reg_mentioned_p (other, x))))
2954 rtx temp = gen_reg_rtx (GET_MODE (x));
2955 emit_move_insn (temp, x);
2961 /* Emission of insns (adding them to the doubly-linked list). */
2963 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2966 get_last_insn_anywhere (void)
2968 struct sequence_stack *stack;
2969 if (get_last_insn ())
2970 return get_last_insn ();
2971 for (stack = seq_stack; stack; stack = stack->next)
2972 if (stack->last != 0)
2977 /* Return the first nonnote insn emitted in current sequence or current
2978 function. This routine looks inside SEQUENCEs. */
2981 get_first_nonnote_insn (void)
2983 rtx insn = get_insns ();
2988 for (insn = next_insn (insn);
2989 insn && NOTE_P (insn);
2990 insn = next_insn (insn))
2994 if (NONJUMP_INSN_P (insn)
2995 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2996 insn = XVECEXP (PATTERN (insn), 0, 0);
3003 /* Return the last nonnote insn emitted in current sequence or current
3004 function. This routine looks inside SEQUENCEs. */
3007 get_last_nonnote_insn (void)
3009 rtx insn = get_last_insn ();
3014 for (insn = previous_insn (insn);
3015 insn && NOTE_P (insn);
3016 insn = previous_insn (insn))
3020 if (NONJUMP_INSN_P (insn)
3021 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3022 insn = XVECEXP (PATTERN (insn), 0,
3023 XVECLEN (PATTERN (insn), 0) - 1);
3030 /* Return the number of actual (non-debug) insns emitted in this
3034 get_max_insn_count (void)
3036 int n = cur_insn_uid;
3038 /* The table size must be stable across -g, to avoid codegen
3039 differences due to debug insns, and not be affected by
3040 -fmin-insn-uid, to avoid excessive table size and to simplify
3041 debugging of -fcompare-debug failures. */
3042 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3043 n -= cur_debug_insn_uid;
3045 n -= MIN_NONDEBUG_INSN_UID;
3051 /* Return the next insn. If it is a SEQUENCE, return the first insn
3055 next_insn (rtx insn)
3059 insn = NEXT_INSN (insn);
3060 if (insn && NONJUMP_INSN_P (insn)
3061 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3062 insn = XVECEXP (PATTERN (insn), 0, 0);
3068 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3072 previous_insn (rtx insn)
3076 insn = PREV_INSN (insn);
3077 if (insn && NONJUMP_INSN_P (insn)
3078 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3079 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3085 /* Return the next insn after INSN that is not a NOTE. This routine does not
3086 look inside SEQUENCEs. */
3089 next_nonnote_insn (rtx insn)
3093 insn = NEXT_INSN (insn);
3094 if (insn == 0 || !NOTE_P (insn))
3101 /* Return the next insn after INSN that is not a NOTE, but stop the
3102 search before we enter another basic block. This routine does not
3103 look inside SEQUENCEs. */
3106 next_nonnote_insn_bb (rtx insn)
3110 insn = NEXT_INSN (insn);
3111 if (insn == 0 || !NOTE_P (insn))
3113 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3120 /* Return the previous insn before INSN that is not a NOTE. This routine does
3121 not look inside SEQUENCEs. */
3124 prev_nonnote_insn (rtx insn)
3128 insn = PREV_INSN (insn);
3129 if (insn == 0 || !NOTE_P (insn))
3136 /* Return the previous insn before INSN that is not a NOTE, but stop
3137 the search before we enter another basic block. This routine does
3138 not look inside SEQUENCEs. */
3141 prev_nonnote_insn_bb (rtx insn)
3145 insn = PREV_INSN (insn);
3146 if (insn == 0 || !NOTE_P (insn))
3148 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3155 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3156 routine does not look inside SEQUENCEs. */
3159 next_nondebug_insn (rtx insn)
3163 insn = NEXT_INSN (insn);
3164 if (insn == 0 || !DEBUG_INSN_P (insn))
3171 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3172 This routine does not look inside SEQUENCEs. */
3175 prev_nondebug_insn (rtx insn)
3179 insn = PREV_INSN (insn);
3180 if (insn == 0 || !DEBUG_INSN_P (insn))
3187 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3188 This routine does not look inside SEQUENCEs. */
3191 next_nonnote_nondebug_insn (rtx insn)
3195 insn = NEXT_INSN (insn);
3196 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3203 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3204 This routine does not look inside SEQUENCEs. */
3207 prev_nonnote_nondebug_insn (rtx insn)
3211 insn = PREV_INSN (insn);
3212 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3219 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3220 or 0, if there is none. This routine does not look inside
3224 next_real_insn (rtx insn)
3228 insn = NEXT_INSN (insn);
3229 if (insn == 0 || INSN_P (insn))
3236 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3237 or 0, if there is none. This routine does not look inside
3241 prev_real_insn (rtx insn)
3245 insn = PREV_INSN (insn);
3246 if (insn == 0 || INSN_P (insn))
3253 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3254 This routine does not look inside SEQUENCEs. */
3257 last_call_insn (void)
3261 for (insn = get_last_insn ();
3262 insn && !CALL_P (insn);
3263 insn = PREV_INSN (insn))
3269 /* Find the next insn after INSN that really does something. This routine
3270 does not look inside SEQUENCEs. After reload this also skips over
3271 standalone USE and CLOBBER insn. */
3274 active_insn_p (const_rtx insn)
3276 return (CALL_P (insn) || JUMP_P (insn)
3277 || (NONJUMP_INSN_P (insn)
3278 && (! reload_completed
3279 || (GET_CODE (PATTERN (insn)) != USE
3280 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3284 next_active_insn (rtx insn)
3288 insn = NEXT_INSN (insn);
3289 if (insn == 0 || active_insn_p (insn))
3296 /* Find the last insn before INSN that really does something. This routine
3297 does not look inside SEQUENCEs. After reload this also skips over
3298 standalone USE and CLOBBER insn. */
3301 prev_active_insn (rtx insn)
3305 insn = PREV_INSN (insn);
3306 if (insn == 0 || active_insn_p (insn))
3313 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3316 next_label (rtx insn)
3320 insn = NEXT_INSN (insn);
3321 if (insn == 0 || LABEL_P (insn))
3328 /* Return the last label to mark the same position as LABEL. Return LABEL
3329 itself if it is null or any return rtx. */
3332 skip_consecutive_labels (rtx label)
3336 if (label && ANY_RETURN_P (label))
3339 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3347 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3348 and REG_CC_USER notes so we can find it. */
3351 link_cc0_insns (rtx insn)
3353 rtx user = next_nonnote_insn (insn);
3355 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3356 user = XVECEXP (PATTERN (user), 0, 0);
3358 add_reg_note (user, REG_CC_SETTER, insn);
3359 add_reg_note (insn, REG_CC_USER, user);
3362 /* Return the next insn that uses CC0 after INSN, which is assumed to
3363 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3364 applied to the result of this function should yield INSN).
3366 Normally, this is simply the next insn. However, if a REG_CC_USER note
3367 is present, it contains the insn that uses CC0.
3369 Return 0 if we can't find the insn. */
3372 next_cc0_user (rtx insn)
3374 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3377 return XEXP (note, 0);
3379 insn = next_nonnote_insn (insn);
3380 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3381 insn = XVECEXP (PATTERN (insn), 0, 0);
3383 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3389 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3390 note, it is the previous insn. */
3393 prev_cc0_setter (rtx insn)
3395 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3398 return XEXP (note, 0);
3400 insn = prev_nonnote_insn (insn);
3401 gcc_assert (sets_cc0_p (PATTERN (insn)));
3408 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3411 find_auto_inc (rtx *xp, void *data)
3414 rtx reg = (rtx) data;
3416 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3419 switch (GET_CODE (x))
3427 if (rtx_equal_p (reg, XEXP (x, 0)))
3438 /* Increment the label uses for all labels present in rtx. */
3441 mark_label_nuses (rtx x)
3447 code = GET_CODE (x);
3448 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3449 LABEL_NUSES (XEXP (x, 0))++;
3451 fmt = GET_RTX_FORMAT (code);
3452 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3455 mark_label_nuses (XEXP (x, i));
3456 else if (fmt[i] == 'E')
3457 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3458 mark_label_nuses (XVECEXP (x, i, j));
3463 /* Try splitting insns that can be split for better scheduling.
3464 PAT is the pattern which might split.
3465 TRIAL is the insn providing PAT.
3466 LAST is nonzero if we should return the last insn of the sequence produced.
3468 If this routine succeeds in splitting, it returns the first or last
3469 replacement insn depending on the value of LAST. Otherwise, it
3470 returns TRIAL. If the insn to be returned can be split, it will be. */
3473 try_split (rtx pat, rtx trial, int last)
3475 rtx before = PREV_INSN (trial);
3476 rtx after = NEXT_INSN (trial);
3477 int has_barrier = 0;
3480 rtx insn_last, insn;
3483 /* We're not good at redistributing frame information. */
3484 if (RTX_FRAME_RELATED_P (trial))
3487 if (any_condjump_p (trial)
3488 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3489 split_branch_probability = INTVAL (XEXP (note, 0));
3490 probability = split_branch_probability;
3492 seq = split_insns (pat, trial);
3494 split_branch_probability = -1;
3496 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3497 We may need to handle this specially. */
3498 if (after && BARRIER_P (after))
3501 after = NEXT_INSN (after);
3507 /* Avoid infinite loop if any insn of the result matches
3508 the original pattern. */
3512 if (INSN_P (insn_last)
3513 && rtx_equal_p (PATTERN (insn_last), pat))
3515 if (!NEXT_INSN (insn_last))
3517 insn_last = NEXT_INSN (insn_last);
3520 /* We will be adding the new sequence to the function. The splitters
3521 may have introduced invalid RTL sharing, so unshare the sequence now. */
3522 unshare_all_rtl_in_chain (seq);
3525 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3529 mark_jump_label (PATTERN (insn), insn, 0);
3531 if (probability != -1
3532 && any_condjump_p (insn)
3533 && !find_reg_note (insn, REG_BR_PROB, 0))
3535 /* We can preserve the REG_BR_PROB notes only if exactly
3536 one jump is created, otherwise the machine description
3537 is responsible for this step using
3538 split_branch_probability variable. */
3539 gcc_assert (njumps == 1);
3540 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3545 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3546 in SEQ and copy any additional information across. */
3549 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3554 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3555 target may have explicitly specified. */
3556 p = &CALL_INSN_FUNCTION_USAGE (insn);
3559 *p = CALL_INSN_FUNCTION_USAGE (trial);
3561 /* If the old call was a sibling call, the new one must
3563 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3565 /* If the new call is the last instruction in the sequence,
3566 it will effectively replace the old call in-situ. Otherwise
3567 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3568 so that it comes immediately after the new call. */
3569 if (NEXT_INSN (insn))
3570 for (next = NEXT_INSN (trial);
3571 next && NOTE_P (next);
3572 next = NEXT_INSN (next))
3573 if (NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
3576 add_insn_after (next, insn, NULL);
3582 /* Copy notes, particularly those related to the CFG. */
3583 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3585 switch (REG_NOTE_KIND (note))
3588 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3594 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3597 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3601 case REG_NON_LOCAL_GOTO:
3602 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3605 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3611 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3613 rtx reg = XEXP (note, 0);
3614 if (!FIND_REG_INC_NOTE (insn, reg)
3615 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3616 add_reg_note (insn, REG_INC, reg);
3622 fixup_args_size_notes (NULL_RTX, insn_last, INTVAL (XEXP (note, 0)));
3630 /* If there are LABELS inside the split insns increment the
3631 usage count so we don't delete the label. */
3635 while (insn != NULL_RTX)
3637 /* JUMP_P insns have already been "marked" above. */
3638 if (NONJUMP_INSN_P (insn))
3639 mark_label_nuses (PATTERN (insn));
3641 insn = PREV_INSN (insn);
3645 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3647 delete_insn (trial);
3649 emit_barrier_after (tem);
3651 /* Recursively call try_split for each new insn created; by the
3652 time control returns here that insn will be fully split, so
3653 set LAST and continue from the insn after the one returned.
3654 We can't use next_active_insn here since AFTER may be a note.
3655 Ignore deleted insns, which can be occur if not optimizing. */
3656 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3657 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3658 tem = try_split (PATTERN (tem), tem, 1);
3660 /* Return either the first or the last insn, depending on which was
3663 ? (after ? PREV_INSN (after) : get_last_insn ())
3664 : NEXT_INSN (before);
3667 /* Make and return an INSN rtx, initializing all its slots.
3668 Store PATTERN in the pattern slots. */
3671 make_insn_raw (rtx pattern)
3675 insn = rtx_alloc (INSN);
3677 INSN_UID (insn) = cur_insn_uid++;
3678 PATTERN (insn) = pattern;
3679 INSN_CODE (insn) = -1;
3680 REG_NOTES (insn) = NULL;
3681 INSN_LOCATOR (insn) = curr_insn_locator ();
3682 BLOCK_FOR_INSN (insn) = NULL;
3684 #ifdef ENABLE_RTL_CHECKING
3687 && (returnjump_p (insn)
3688 || (GET_CODE (insn) == SET
3689 && SET_DEST (insn) == pc_rtx)))
3691 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3699 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3702 make_debug_insn_raw (rtx pattern)
3706 insn = rtx_alloc (DEBUG_INSN);
3707 INSN_UID (insn) = cur_debug_insn_uid++;
3708 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3709 INSN_UID (insn) = cur_insn_uid++;
3711 PATTERN (insn) = pattern;
3712 INSN_CODE (insn) = -1;
3713 REG_NOTES (insn) = NULL;
3714 INSN_LOCATOR (insn) = curr_insn_locator ();
3715 BLOCK_FOR_INSN (insn) = NULL;
3720 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3723 make_jump_insn_raw (rtx pattern)
3727 insn = rtx_alloc (JUMP_INSN);
3728 INSN_UID (insn) = cur_insn_uid++;
3730 PATTERN (insn) = pattern;
3731 INSN_CODE (insn) = -1;
3732 REG_NOTES (insn) = NULL;
3733 JUMP_LABEL (insn) = NULL;
3734 INSN_LOCATOR (insn) = curr_insn_locator ();
3735 BLOCK_FOR_INSN (insn) = NULL;
3740 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3743 make_call_insn_raw (rtx pattern)
3747 insn = rtx_alloc (CALL_INSN);
3748 INSN_UID (insn) = cur_insn_uid++;
3750 PATTERN (insn) = pattern;
3751 INSN_CODE (insn) = -1;
3752 REG_NOTES (insn) = NULL;
3753 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3754 INSN_LOCATOR (insn) = curr_insn_locator ();
3755 BLOCK_FOR_INSN (insn) = NULL;
3760 /* Add INSN to the end of the doubly-linked list.
3761 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3766 PREV_INSN (insn) = get_last_insn();
3767 NEXT_INSN (insn) = 0;
3769 if (NULL != get_last_insn())
3770 NEXT_INSN (get_last_insn ()) = insn;
3772 if (NULL == get_insns ())
3773 set_first_insn (insn);
3775 set_last_insn (insn);
3778 /* Add INSN into the doubly-linked list after insn AFTER. This and
3779 the next should be the only functions called to insert an insn once
3780 delay slots have been filled since only they know how to update a
3784 add_insn_after (rtx insn, rtx after, basic_block bb)
3786 rtx next = NEXT_INSN (after);
3788 gcc_assert (!optimize || !INSN_DELETED_P (after));
3790 NEXT_INSN (insn) = next;
3791 PREV_INSN (insn) = after;
3795 PREV_INSN (next) = insn;
3796 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3797 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3799 else if (get_last_insn () == after)
3800 set_last_insn (insn);
3803 struct sequence_stack *stack = seq_stack;
3804 /* Scan all pending sequences too. */
3805 for (; stack; stack = stack->next)
3806 if (after == stack->last)
3815 if (!BARRIER_P (after)
3816 && !BARRIER_P (insn)
3817 && (bb = BLOCK_FOR_INSN (after)))
3819 set_block_for_insn (insn, bb);
3821 df_insn_rescan (insn);
3822 /* Should not happen as first in the BB is always
3823 either NOTE or LABEL. */
3824 if (BB_END (bb) == after
3825 /* Avoid clobbering of structure when creating new BB. */
3826 && !BARRIER_P (insn)
3827 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3831 NEXT_INSN (after) = insn;
3832 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3834 rtx sequence = PATTERN (after);
3835 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3839 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3840 the previous should be the only functions called to insert an insn
3841 once delay slots have been filled since only they know how to
3842 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3846 add_insn_before (rtx insn, rtx before, basic_block bb)
3848 rtx prev = PREV_INSN (before);
3850 gcc_assert (!optimize || !INSN_DELETED_P (before));
3852 PREV_INSN (insn) = prev;
3853 NEXT_INSN (insn) = before;
3857 NEXT_INSN (prev) = insn;
3858 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3860 rtx sequence = PATTERN (prev);
3861 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3864 else if (get_insns () == before)
3865 set_first_insn (insn);
3868 struct sequence_stack *stack = seq_stack;
3869 /* Scan all pending sequences too. */
3870 for (; stack; stack = stack->next)
3871 if (before == stack->first)
3873 stack->first = insn;
3881 && !BARRIER_P (before)
3882 && !BARRIER_P (insn))
3883 bb = BLOCK_FOR_INSN (before);
3887 set_block_for_insn (insn, bb);
3889 df_insn_rescan (insn);
3890 /* Should not happen as first in the BB is always either NOTE or
3892 gcc_assert (BB_HEAD (bb) != insn
3893 /* Avoid clobbering of structure when creating new BB. */
3895 || NOTE_INSN_BASIC_BLOCK_P (insn));
3898 PREV_INSN (before) = insn;
3899 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3900 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3904 /* Replace insn with an deleted instruction note. */
3907 set_insn_deleted (rtx insn)
3909 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3910 PUT_CODE (insn, NOTE);
3911 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3915 /* Remove an insn from its doubly-linked list. This function knows how
3916 to handle sequences. */
3918 remove_insn (rtx insn)
3920 rtx next = NEXT_INSN (insn);
3921 rtx prev = PREV_INSN (insn);
3924 /* Later in the code, the block will be marked dirty. */
3925 df_insn_delete (NULL, INSN_UID (insn));
3929 NEXT_INSN (prev) = next;
3930 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3932 rtx sequence = PATTERN (prev);
3933 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3936 else if (get_insns () == insn)
3939 PREV_INSN (next) = NULL;
3940 set_first_insn (next);
3944 struct sequence_stack *stack = seq_stack;
3945 /* Scan all pending sequences too. */
3946 for (; stack; stack = stack->next)
3947 if (insn == stack->first)
3949 stack->first = next;
3958 PREV_INSN (next) = prev;
3959 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3960 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3962 else if (get_last_insn () == insn)
3963 set_last_insn (prev);
3966 struct sequence_stack *stack = seq_stack;
3967 /* Scan all pending sequences too. */
3968 for (; stack; stack = stack->next)
3969 if (insn == stack->last)
3977 if (!BARRIER_P (insn)
3978 && (bb = BLOCK_FOR_INSN (insn)))
3980 if (NONDEBUG_INSN_P (insn))
3981 df_set_bb_dirty (bb);
3982 if (BB_HEAD (bb) == insn)
3984 /* Never ever delete the basic block note without deleting whole
3986 gcc_assert (!NOTE_P (insn));
3987 BB_HEAD (bb) = next;
3989 if (BB_END (bb) == insn)
3994 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3997 add_function_usage_to (rtx call_insn, rtx call_fusage)
3999 gcc_assert (call_insn && CALL_P (call_insn));
4001 /* Put the register usage information on the CALL. If there is already
4002 some usage information, put ours at the end. */
4003 if (CALL_INSN_FUNCTION_USAGE (call_insn))
4007 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
4008 link = XEXP (link, 1))
4011 XEXP (link, 1) = call_fusage;
4014 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4017 /* Delete all insns made since FROM.
4018 FROM becomes the new last instruction. */
4021 delete_insns_since (rtx from)
4026 NEXT_INSN (from) = 0;
4027 set_last_insn (from);
4030 /* This function is deprecated, please use sequences instead.
4032 Move a consecutive bunch of insns to a different place in the chain.
4033 The insns to be moved are those between FROM and TO.
4034 They are moved to a new position after the insn AFTER.
4035 AFTER must not be FROM or TO or any insn in between.
4037 This function does not know about SEQUENCEs and hence should not be
4038 called after delay-slot filling has been done. */
4041 reorder_insns_nobb (rtx from, rtx to, rtx after)
4043 #ifdef ENABLE_CHECKING
4045 for (x = from; x != to; x = NEXT_INSN (x))
4046 gcc_assert (after != x);
4047 gcc_assert (after != to);
4050 /* Splice this bunch out of where it is now. */
4051 if (PREV_INSN (from))
4052 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4054 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4055 if (get_last_insn () == to)
4056 set_last_insn (PREV_INSN (from));
4057 if (get_insns () == from)
4058 set_first_insn (NEXT_INSN (to));
4060 /* Make the new neighbors point to it and it to them. */
4061 if (NEXT_INSN (after))
4062 PREV_INSN (NEXT_INSN (after)) = to;
4064 NEXT_INSN (to) = NEXT_INSN (after);
4065 PREV_INSN (from) = after;
4066 NEXT_INSN (after) = from;
4067 if (after == get_last_insn())
4071 /* Same as function above, but take care to update BB boundaries. */
4073 reorder_insns (rtx from, rtx to, rtx after)
4075 rtx prev = PREV_INSN (from);
4076 basic_block bb, bb2;
4078 reorder_insns_nobb (from, to, after);
4080 if (!BARRIER_P (after)
4081 && (bb = BLOCK_FOR_INSN (after)))
4084 df_set_bb_dirty (bb);
4086 if (!BARRIER_P (from)
4087 && (bb2 = BLOCK_FOR_INSN (from)))
4089 if (BB_END (bb2) == to)
4090 BB_END (bb2) = prev;
4091 df_set_bb_dirty (bb2);
4094 if (BB_END (bb) == after)
4097 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4099 df_insn_change_bb (x, bb);
4104 /* Emit insn(s) of given code and pattern
4105 at a specified place within the doubly-linked list.
4107 All of the emit_foo global entry points accept an object
4108 X which is either an insn list or a PATTERN of a single
4111 There are thus a few canonical ways to generate code and
4112 emit it at a specific place in the instruction stream. For
4113 example, consider the instruction named SPOT and the fact that
4114 we would like to emit some instructions before SPOT. We might
4118 ... emit the new instructions ...
4119 insns_head = get_insns ();
4122 emit_insn_before (insns_head, SPOT);
4124 It used to be common to generate SEQUENCE rtl instead, but that
4125 is a relic of the past which no longer occurs. The reason is that
4126 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4127 generated would almost certainly die right after it was created. */
4130 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
4131 rtx (*make_raw) (rtx))
4135 gcc_assert (before);
4140 switch (GET_CODE (x))
4152 rtx next = NEXT_INSN (insn);
4153 add_insn_before (insn, before, bb);
4159 #ifdef ENABLE_RTL_CHECKING
4166 last = (*make_raw) (x);
4167 add_insn_before (last, before, bb);
4174 /* Make X be output before the instruction BEFORE. */
4177 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4179 return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4182 /* Make an instruction with body X and code JUMP_INSN
4183 and output it before the instruction BEFORE. */
4186 emit_jump_insn_before_noloc (rtx x, rtx before)
4188 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4189 make_jump_insn_raw);
4192 /* Make an instruction with body X and code CALL_INSN
4193 and output it before the instruction BEFORE. */
4196 emit_call_insn_before_noloc (rtx x, rtx before)
4198 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4199 make_call_insn_raw);
4202 /* Make an instruction with body X and code DEBUG_INSN
4203 and output it before the instruction BEFORE. */
4206 emit_debug_insn_before_noloc (rtx x, rtx before)
4208 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4209 make_debug_insn_raw);
4212 /* Make an insn of code BARRIER
4213 and output it before the insn BEFORE. */
4216 emit_barrier_before (rtx before)
4218 rtx insn = rtx_alloc (BARRIER);
4220 INSN_UID (insn) = cur_insn_uid++;
4222 add_insn_before (insn, before, NULL);
4226 /* Emit the label LABEL before the insn BEFORE. */
4229 emit_label_before (rtx label, rtx before)
4231 /* This can be called twice for the same label as a result of the
4232 confusion that follows a syntax error! So make it harmless. */
4233 if (INSN_UID (label) == 0)
4235 INSN_UID (label) = cur_insn_uid++;
4236 add_insn_before (label, before, NULL);
4242 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4245 emit_note_before (enum insn_note subtype, rtx before)
4247 rtx note = rtx_alloc (NOTE);
4248 INSN_UID (note) = cur_insn_uid++;
4249 NOTE_KIND (note) = subtype;
4250 BLOCK_FOR_INSN (note) = NULL;
4251 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4253 add_insn_before (note, before, NULL);
4257 /* Helper for emit_insn_after, handles lists of instructions
4261 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4265 if (!bb && !BARRIER_P (after))
4266 bb = BLOCK_FOR_INSN (after);
4270 df_set_bb_dirty (bb);
4271 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4272 if (!BARRIER_P (last))
4274 set_block_for_insn (last, bb);
4275 df_insn_rescan (last);
4277 if (!BARRIER_P (last))
4279 set_block_for_insn (last, bb);
4280 df_insn_rescan (last);
4282 if (BB_END (bb) == after)
4286 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4289 after_after = NEXT_INSN (after);
4291 NEXT_INSN (after) = first;
4292 PREV_INSN (first) = after;
4293 NEXT_INSN (last) = after_after;
4295 PREV_INSN (after_after) = last;
4297 if (after == get_last_insn())
4298 set_last_insn (last);
4304 emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
4305 rtx (*make_raw)(rtx))
4314 switch (GET_CODE (x))
4323 last = emit_insn_after_1 (x, after, bb);
4326 #ifdef ENABLE_RTL_CHECKING
4333 last = (*make_raw) (x);
4334 add_insn_after (last, after, bb);
4341 /* Make X be output after the insn AFTER and set the BB of insn. If
4342 BB is NULL, an attempt is made to infer the BB from AFTER. */
4345 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4347 return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4351 /* Make an insn of code JUMP_INSN with body X
4352 and output it after the insn AFTER. */
4355 emit_jump_insn_after_noloc (rtx x, rtx after)
4357 return emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw);
4360 /* Make an instruction with body X and code CALL_INSN
4361 and output it after the instruction AFTER. */
4364 emit_call_insn_after_noloc (rtx x, rtx after)
4366 return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4369 /* Make an instruction with body X and code CALL_INSN
4370 and output it after the instruction AFTER. */
4373 emit_debug_insn_after_noloc (rtx x, rtx after)
4375 return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4378 /* Make an insn of code BARRIER
4379 and output it after the insn AFTER. */
4382 emit_barrier_after (rtx after)
4384 rtx insn = rtx_alloc (BARRIER);
4386 INSN_UID (insn) = cur_insn_uid++;
4388 add_insn_after (insn, after, NULL);
4392 /* Emit the label LABEL after the insn AFTER. */
4395 emit_label_after (rtx label, rtx after)
4397 /* This can be called twice for the same label
4398 as a result of the confusion that follows a syntax error!
4399 So make it harmless. */
4400 if (INSN_UID (label) == 0)
4402 INSN_UID (label) = cur_insn_uid++;
4403 add_insn_after (label, after, NULL);
4409 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4412 emit_note_after (enum insn_note subtype, rtx after)
4414 rtx note = rtx_alloc (NOTE);
4415 INSN_UID (note) = cur_insn_uid++;
4416 NOTE_KIND (note) = subtype;
4417 BLOCK_FOR_INSN (note) = NULL;
4418 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4419 add_insn_after (note, after, NULL);
4423 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4424 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4427 emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
4428 rtx (*make_raw) (rtx))
4430 rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4432 if (pattern == NULL_RTX || !loc)
4435 after = NEXT_INSN (after);
4438 if (active_insn_p (after) && !INSN_LOCATOR (after))
4439 INSN_LOCATOR (after) = loc;
4442 after = NEXT_INSN (after);
4447 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4448 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4452 emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
4453 rtx (*make_raw) (rtx))
4457 if (skip_debug_insns)
4458 while (DEBUG_INSN_P (prev))
4459 prev = PREV_INSN (prev);
4462 return emit_pattern_after_setloc (pattern, after, INSN_LOCATOR (prev),
4465 return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4468 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4470 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4472 return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
4475 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4477 emit_insn_after (rtx pattern, rtx after)
4479 return emit_pattern_after (pattern, after, true, make_insn_raw);
4482 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4484 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4486 return emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw);
4489 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4491 emit_jump_insn_after (rtx pattern, rtx after)
4493 return emit_pattern_after (pattern, after, true, make_jump_insn_raw);
4496 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4498 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4500 return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
4503 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4505 emit_call_insn_after (rtx pattern, rtx after)
4507 return emit_pattern_after (pattern, after, true, make_call_insn_raw);
4510 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4512 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4514 return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
4517 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4519 emit_debug_insn_after (rtx pattern, rtx after)
4521 return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
4524 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4525 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4526 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4530 emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
4531 rtx (*make_raw) (rtx))
4533 rtx first = PREV_INSN (before);
4534 rtx last = emit_pattern_before_noloc (pattern, before,
4535 insnp ? before : NULL_RTX,
4538 if (pattern == NULL_RTX || !loc)
4542 first = get_insns ();
4544 first = NEXT_INSN (first);
4547 if (active_insn_p (first) && !INSN_LOCATOR (first))
4548 INSN_LOCATOR (first) = loc;
4551 first = NEXT_INSN (first);
4556 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4557 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4558 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4559 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4562 emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
4563 bool insnp, rtx (*make_raw) (rtx))
4567 if (skip_debug_insns)
4568 while (DEBUG_INSN_P (next))
4569 next = PREV_INSN (next);
4572 return emit_pattern_before_setloc (pattern, before, INSN_LOCATOR (next),
4575 return emit_pattern_before_noloc (pattern, before,
4576 insnp ? before : NULL_RTX,
4580 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4582 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4584 return emit_pattern_before_setloc (pattern, before, loc, true,
4588 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4590 emit_insn_before (rtx pattern, rtx before)
4592 return emit_pattern_before (pattern, before, true, true, make_insn_raw);
4595 /* like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4597 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4599 return emit_pattern_before_setloc (pattern, before, loc, false,
4600 make_jump_insn_raw);
4603 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4605 emit_jump_insn_before (rtx pattern, rtx before)
4607 return emit_pattern_before (pattern, before, true, false,
4608 make_jump_insn_raw);
4611 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4613 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4615 return emit_pattern_before_setloc (pattern, before, loc, false,
4616 make_call_insn_raw);
4619 /* Like emit_call_insn_before_noloc,
4620 but set insn_locator according to BEFORE. */
4622 emit_call_insn_before (rtx pattern, rtx before)
4624 return emit_pattern_before (pattern, before, true, false,
4625 make_call_insn_raw);
4628 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4630 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4632 return emit_pattern_before_setloc (pattern, before, loc, false,
4633 make_debug_insn_raw);
4636 /* Like emit_debug_insn_before_noloc,
4637 but set insn_locator according to BEFORE. */
4639 emit_debug_insn_before (rtx pattern, rtx before)
4641 return emit_pattern_before (pattern, before, false, false,
4642 make_debug_insn_raw);
4645 /* Take X and emit it at the end of the doubly-linked
4648 Returns the last insn emitted. */
4653 rtx last = get_last_insn();
4659 switch (GET_CODE (x))
4671 rtx next = NEXT_INSN (insn);
4678 #ifdef ENABLE_RTL_CHECKING
4685 last = make_insn_raw (x);
4693 /* Make an insn of code DEBUG_INSN with pattern X
4694 and add it to the end of the doubly-linked list. */
4697 emit_debug_insn (rtx x)
4699 rtx last = get_last_insn();
4705 switch (GET_CODE (x))
4717 rtx next = NEXT_INSN (insn);
4724 #ifdef ENABLE_RTL_CHECKING
4731 last = make_debug_insn_raw (x);
4739 /* Make an insn of code JUMP_INSN with pattern X
4740 and add it to the end of the doubly-linked list. */
4743 emit_jump_insn (rtx x)
4745 rtx last = NULL_RTX, insn;
4747 switch (GET_CODE (x))
4759 rtx next = NEXT_INSN (insn);
4766 #ifdef ENABLE_RTL_CHECKING
4773 last = make_jump_insn_raw (x);
4781 /* Make an insn of code CALL_INSN with pattern X
4782 and add it to the end of the doubly-linked list. */
4785 emit_call_insn (rtx x)
4789 switch (GET_CODE (x))
4798 insn = emit_insn (x);
4801 #ifdef ENABLE_RTL_CHECKING
4808 insn = make_call_insn_raw (x);
4816 /* Add the label LABEL to the end of the doubly-linked list. */
4819 emit_label (rtx label)
4821 /* This can be called twice for the same label
4822 as a result of the confusion that follows a syntax error!
4823 So make it harmless. */
4824 if (INSN_UID (label) == 0)
4826 INSN_UID (label) = cur_insn_uid++;
4832 /* Make an insn of code BARRIER
4833 and add it to the end of the doubly-linked list. */
4838 rtx barrier = rtx_alloc (BARRIER);
4839 INSN_UID (barrier) = cur_insn_uid++;
4844 /* Emit a copy of note ORIG. */
4847 emit_note_copy (rtx orig)
4851 note = rtx_alloc (NOTE);
4853 INSN_UID (note) = cur_insn_uid++;
4854 NOTE_DATA (note) = NOTE_DATA (orig);
4855 NOTE_KIND (note) = NOTE_KIND (orig);
4856 BLOCK_FOR_INSN (note) = NULL;
4862 /* Make an insn of code NOTE or type NOTE_NO
4863 and add it to the end of the doubly-linked list. */
4866 emit_note (enum insn_note kind)
4870 note = rtx_alloc (NOTE);
4871 INSN_UID (note) = cur_insn_uid++;
4872 NOTE_KIND (note) = kind;
4873 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4874 BLOCK_FOR_INSN (note) = NULL;
4879 /* Emit a clobber of lvalue X. */
4882 emit_clobber (rtx x)
4884 /* CONCATs should not appear in the insn stream. */
4885 if (GET_CODE (x) == CONCAT)
4887 emit_clobber (XEXP (x, 0));
4888 return emit_clobber (XEXP (x, 1));
4890 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4893 /* Return a sequence of insns to clobber lvalue X. */
4907 /* Emit a use of rvalue X. */
4912 /* CONCATs should not appear in the insn stream. */
4913 if (GET_CODE (x) == CONCAT)
4915 emit_use (XEXP (x, 0));
4916 return emit_use (XEXP (x, 1));
4918 return emit_insn (gen_rtx_USE (VOIDmode, x));
4921 /* Return a sequence of insns to use rvalue X. */
4935 /* Cause next statement to emit a line note even if the line number
4939 force_next_line_note (void)
4944 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4945 note of this type already exists, remove it first. */
4948 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4950 rtx note = find_reg_note (insn, kind, NULL_RTX);
4956 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4957 has multiple sets (some callers assume single_set
4958 means the insn only has one set, when in fact it
4959 means the insn only has one * useful * set). */
4960 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4966 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4967 It serves no useful purpose and breaks eliminate_regs. */
4968 if (GET_CODE (datum) == ASM_OPERANDS)
4973 XEXP (note, 0) = datum;
4974 df_notes_rescan (insn);
4982 XEXP (note, 0) = datum;
4988 add_reg_note (insn, kind, datum);
4994 df_notes_rescan (insn);
5000 return REG_NOTES (insn);
5003 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5005 set_dst_reg_note (rtx insn, enum reg_note kind, rtx datum, rtx dst)
5007 rtx set = single_set (insn);
5009 if (set && SET_DEST (set) == dst)
5010 return set_unique_reg_note (insn, kind, datum);
5014 /* Return an indication of which type of insn should have X as a body.
5015 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5017 static enum rtx_code
5018 classify_insn (rtx x)
5022 if (GET_CODE (x) == CALL)
5024 if (ANY_RETURN_P (x))
5026 if (GET_CODE (x) == SET)
5028 if (SET_DEST (x) == pc_rtx)
5030 else if (GET_CODE (SET_SRC (x)) == CALL)
5035 if (GET_CODE (x) == PARALLEL)
5038 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5039 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5041 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5042 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5044 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5045 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5051 /* Emit the rtl pattern X as an appropriate kind of insn.
5052 If X is a label, it is simply added into the insn chain. */
5057 enum rtx_code code = classify_insn (x);
5062 return emit_label (x);
5064 return emit_insn (x);
5067 rtx insn = emit_jump_insn (x);
5068 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5069 return emit_barrier ();
5073 return emit_call_insn (x);
5075 return emit_debug_insn (x);
5081 /* Space for free sequence stack entries. */
5082 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5084 /* Begin emitting insns to a sequence. If this sequence will contain
5085 something that might cause the compiler to pop arguments to function
5086 calls (because those pops have previously been deferred; see
5087 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5088 before calling this function. That will ensure that the deferred
5089 pops are not accidentally emitted in the middle of this sequence. */
5092 start_sequence (void)
5094 struct sequence_stack *tem;
5096 if (free_sequence_stack != NULL)
5098 tem = free_sequence_stack;
5099 free_sequence_stack = tem->next;
5102 tem = ggc_alloc_sequence_stack ();
5104 tem->next = seq_stack;
5105 tem->first = get_insns ();
5106 tem->last = get_last_insn ();
5114 /* Set up the insn chain starting with FIRST as the current sequence,
5115 saving the previously current one. See the documentation for
5116 start_sequence for more information about how to use this function. */
5119 push_to_sequence (rtx first)
5125 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5128 set_first_insn (first);
5129 set_last_insn (last);
5132 /* Like push_to_sequence, but take the last insn as an argument to avoid
5133 looping through the list. */
5136 push_to_sequence2 (rtx first, rtx last)
5140 set_first_insn (first);
5141 set_last_insn (last);
5144 /* Set up the outer-level insn chain
5145 as the current sequence, saving the previously current one. */
5148 push_topmost_sequence (void)
5150 struct sequence_stack *stack, *top = NULL;
5154 for (stack = seq_stack; stack; stack = stack->next)
5157 set_first_insn (top->first);
5158 set_last_insn (top->last);
5161 /* After emitting to the outer-level insn chain, update the outer-level
5162 insn chain, and restore the previous saved state. */
5165 pop_topmost_sequence (void)
5167 struct sequence_stack *stack, *top = NULL;
5169 for (stack = seq_stack; stack; stack = stack->next)
5172 top->first = get_insns ();
5173 top->last = get_last_insn ();
5178 /* After emitting to a sequence, restore previous saved state.
5180 To get the contents of the sequence just made, you must call
5181 `get_insns' *before* calling here.
5183 If the compiler might have deferred popping arguments while
5184 generating this sequence, and this sequence will not be immediately
5185 inserted into the instruction stream, use do_pending_stack_adjust
5186 before calling get_insns. That will ensure that the deferred
5187 pops are inserted into this sequence, and not into some random
5188 location in the instruction stream. See INHIBIT_DEFER_POP for more
5189 information about deferred popping of arguments. */
5194 struct sequence_stack *tem = seq_stack;
5196 set_first_insn (tem->first);
5197 set_last_insn (tem->last);
5198 seq_stack = tem->next;
5200 memset (tem, 0, sizeof (*tem));
5201 tem->next = free_sequence_stack;
5202 free_sequence_stack = tem;
5205 /* Return 1 if currently emitting into a sequence. */
5208 in_sequence_p (void)
5210 return seq_stack != 0;
5213 /* Put the various virtual registers into REGNO_REG_RTX. */
5216 init_virtual_regs (void)
5218 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5219 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5220 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5221 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5222 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5223 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5224 = virtual_preferred_stack_boundary_rtx;
5228 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5229 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5230 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5231 static int copy_insn_n_scratches;
5233 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5234 copied an ASM_OPERANDS.
5235 In that case, it is the original input-operand vector. */
5236 static rtvec orig_asm_operands_vector;
5238 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5239 copied an ASM_OPERANDS.
5240 In that case, it is the copied input-operand vector. */
5241 static rtvec copy_asm_operands_vector;
5243 /* Likewise for the constraints vector. */
5244 static rtvec orig_asm_constraints_vector;
5245 static rtvec copy_asm_constraints_vector;
5247 /* Recursively create a new copy of an rtx for copy_insn.
5248 This function differs from copy_rtx in that it handles SCRATCHes and
5249 ASM_OPERANDs properly.
5250 Normally, this function is not used directly; use copy_insn as front end.
5251 However, you could first copy an insn pattern with copy_insn and then use
5252 this function afterwards to properly copy any REG_NOTEs containing
5256 copy_insn_1 (rtx orig)
5261 const char *format_ptr;
5266 code = GET_CODE (orig);
5284 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5289 for (i = 0; i < copy_insn_n_scratches; i++)
5290 if (copy_insn_scratch_in[i] == orig)
5291 return copy_insn_scratch_out[i];
5295 if (shared_const_p (orig))
5299 /* A MEM with a constant address is not sharable. The problem is that
5300 the constant address may need to be reloaded. If the mem is shared,
5301 then reloading one copy of this mem will cause all copies to appear
5302 to have been reloaded. */
5308 /* Copy the various flags, fields, and other information. We assume
5309 that all fields need copying, and then clear the fields that should
5310 not be copied. That is the sensible default behavior, and forces
5311 us to explicitly document why we are *not* copying a flag. */
5312 copy = shallow_copy_rtx (orig);
5314 /* We do not copy the USED flag, which is used as a mark bit during
5315 walks over the RTL. */
5316 RTX_FLAG (copy, used) = 0;
5318 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5321 RTX_FLAG (copy, jump) = 0;
5322 RTX_FLAG (copy, call) = 0;
5323 RTX_FLAG (copy, frame_related) = 0;
5326 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5328 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5329 switch (*format_ptr++)
5332 if (XEXP (orig, i) != NULL)
5333 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5338 if (XVEC (orig, i) == orig_asm_constraints_vector)
5339 XVEC (copy, i) = copy_asm_constraints_vector;
5340 else if (XVEC (orig, i) == orig_asm_operands_vector)
5341 XVEC (copy, i) = copy_asm_operands_vector;
5342 else if (XVEC (orig, i) != NULL)
5344 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5345 for (j = 0; j < XVECLEN (copy, i); j++)
5346 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5357 /* These are left unchanged. */
5364 if (code == SCRATCH)
5366 i = copy_insn_n_scratches++;
5367 gcc_assert (i < MAX_RECOG_OPERANDS);
5368 copy_insn_scratch_in[i] = orig;
5369 copy_insn_scratch_out[i] = copy;
5371 else if (code == ASM_OPERANDS)
5373 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5374 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5375 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5376 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5382 /* Create a new copy of an rtx.
5383 This function differs from copy_rtx in that it handles SCRATCHes and
5384 ASM_OPERANDs properly.
5385 INSN doesn't really have to be a full INSN; it could be just the
5388 copy_insn (rtx insn)
5390 copy_insn_n_scratches = 0;
5391 orig_asm_operands_vector = 0;
5392 orig_asm_constraints_vector = 0;
5393 copy_asm_operands_vector = 0;
5394 copy_asm_constraints_vector = 0;
5395 return copy_insn_1 (insn);
5398 /* Initialize data structures and variables in this file
5399 before generating rtl for each function. */
5404 set_first_insn (NULL);
5405 set_last_insn (NULL);
5406 if (MIN_NONDEBUG_INSN_UID)
5407 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5410 cur_debug_insn_uid = 1;
5411 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5412 last_location = UNKNOWN_LOCATION;
5413 first_label_num = label_num;
5416 /* Init the tables that describe all the pseudo regs. */
5418 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5420 crtl->emit.regno_pointer_align
5421 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5423 regno_reg_rtx = ggc_alloc_vec_rtx (crtl->emit.regno_pointer_align_length);
5425 /* Put copies of all the hard registers into regno_reg_rtx. */
5426 memcpy (regno_reg_rtx,
5427 initial_regno_reg_rtx,
5428 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5430 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5431 init_virtual_regs ();
5433 /* Indicate that the virtual registers and stack locations are
5435 REG_POINTER (stack_pointer_rtx) = 1;
5436 REG_POINTER (frame_pointer_rtx) = 1;
5437 REG_POINTER (hard_frame_pointer_rtx) = 1;
5438 REG_POINTER (arg_pointer_rtx) = 1;
5440 REG_POINTER (virtual_incoming_args_rtx) = 1;
5441 REG_POINTER (virtual_stack_vars_rtx) = 1;
5442 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5443 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5444 REG_POINTER (virtual_cfa_rtx) = 1;
5446 #ifdef STACK_BOUNDARY
5447 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5448 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5449 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5450 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5452 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5453 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5454 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5455 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5456 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5459 #ifdef INIT_EXPANDERS
5464 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5467 gen_const_vector (enum machine_mode mode, int constant)
5472 enum machine_mode inner;
5474 units = GET_MODE_NUNITS (mode);
5475 inner = GET_MODE_INNER (mode);
5477 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5479 v = rtvec_alloc (units);
5481 /* We need to call this function after we set the scalar const_tiny_rtx
5483 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5485 for (i = 0; i < units; ++i)
5486 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5488 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5492 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5493 all elements are zero, and the one vector when all elements are one. */
5495 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5497 enum machine_mode inner = GET_MODE_INNER (mode);
5498 int nunits = GET_MODE_NUNITS (mode);
5502 /* Check to see if all of the elements have the same value. */
5503 x = RTVEC_ELT (v, nunits - 1);
5504 for (i = nunits - 2; i >= 0; i--)
5505 if (RTVEC_ELT (v, i) != x)
5508 /* If the values are all the same, check to see if we can use one of the
5509 standard constant vectors. */
5512 if (x == CONST0_RTX (inner))
5513 return CONST0_RTX (mode);
5514 else if (x == CONST1_RTX (inner))
5515 return CONST1_RTX (mode);
5516 else if (x == CONSTM1_RTX (inner))
5517 return CONSTM1_RTX (mode);
5520 return gen_rtx_raw_CONST_VECTOR (mode, v);
5523 /* Initialise global register information required by all functions. */
5526 init_emit_regs (void)
5529 enum machine_mode mode;
5532 /* Reset register attributes */
5533 htab_empty (reg_attrs_htab);
5535 /* We need reg_raw_mode, so initialize the modes now. */
5536 init_reg_modes_target ();
5538 /* Assign register numbers to the globally defined register rtx. */
5539 pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
5540 ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
5541 simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
5542 cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
5543 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5544 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5545 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5546 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5547 virtual_incoming_args_rtx =
5548 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5549 virtual_stack_vars_rtx =
5550 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5551 virtual_stack_dynamic_rtx =
5552 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5553 virtual_outgoing_args_rtx =
5554 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5555 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5556 virtual_preferred_stack_boundary_rtx =
5557 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5559 /* Initialize RTL for commonly used hard registers. These are
5560 copied into regno_reg_rtx as we begin to compile each function. */
5561 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5562 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5564 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5565 return_address_pointer_rtx
5566 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5569 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5570 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5572 pic_offset_table_rtx = NULL_RTX;
5574 for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
5576 mode = (enum machine_mode) i;
5577 attrs = ggc_alloc_cleared_mem_attrs ();
5578 attrs->align = BITS_PER_UNIT;
5579 attrs->addrspace = ADDR_SPACE_GENERIC;
5580 if (mode != BLKmode)
5582 attrs->size_known_p = true;
5583 attrs->size = GET_MODE_SIZE (mode);
5584 if (STRICT_ALIGNMENT)
5585 attrs->align = GET_MODE_ALIGNMENT (mode);
5587 mode_mem_attrs[i] = attrs;
5591 /* Create some permanent unique rtl objects shared between all functions. */
5594 init_emit_once (void)
5597 enum machine_mode mode;
5598 enum machine_mode double_mode;
5600 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5602 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5603 const_int_htab_eq, NULL);
5605 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5606 const_double_htab_eq, NULL);
5608 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5609 const_fixed_htab_eq, NULL);
5611 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5612 mem_attrs_htab_eq, NULL);
5613 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5614 reg_attrs_htab_eq, NULL);
5616 /* Compute the word and byte modes. */
5618 byte_mode = VOIDmode;
5619 word_mode = VOIDmode;
5620 double_mode = VOIDmode;
5622 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5624 mode = GET_MODE_WIDER_MODE (mode))
5626 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5627 && byte_mode == VOIDmode)
5630 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5631 && word_mode == VOIDmode)
5635 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5637 mode = GET_MODE_WIDER_MODE (mode))
5639 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5640 && double_mode == VOIDmode)
5644 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5646 #ifdef INIT_EXPANDERS
5647 /* This is to initialize {init|mark|free}_machine_status before the first
5648 call to push_function_context_to. This is needed by the Chill front
5649 end which calls push_function_context_to before the first call to
5650 init_function_start. */
5654 /* Create the unique rtx's for certain rtx codes and operand values. */
5656 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5657 tries to use these variables. */
5658 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5659 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5660 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5662 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5663 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5664 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5666 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5668 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5669 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5670 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5675 dconsthalf = dconst1;
5676 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5678 for (i = 0; i < 3; i++)
5680 const REAL_VALUE_TYPE *const r =
5681 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5683 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5685 mode = GET_MODE_WIDER_MODE (mode))
5686 const_tiny_rtx[i][(int) mode] =
5687 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5689 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5691 mode = GET_MODE_WIDER_MODE (mode))
5692 const_tiny_rtx[i][(int) mode] =
5693 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5695 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5697 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5699 mode = GET_MODE_WIDER_MODE (mode))
5700 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5702 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5704 mode = GET_MODE_WIDER_MODE (mode))
5705 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5708 const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
5710 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5712 mode = GET_MODE_WIDER_MODE (mode))
5713 const_tiny_rtx[3][(int) mode] = constm1_rtx;
5715 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5717 mode = GET_MODE_WIDER_MODE (mode))
5718 const_tiny_rtx[3][(int) mode] = constm1_rtx;
5720 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5722 mode = GET_MODE_WIDER_MODE (mode))
5724 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5725 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5728 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5730 mode = GET_MODE_WIDER_MODE (mode))
5732 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5733 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5736 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5738 mode = GET_MODE_WIDER_MODE (mode))
5740 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5741 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5742 const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
5745 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5747 mode = GET_MODE_WIDER_MODE (mode))
5749 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5750 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5753 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5755 mode = GET_MODE_WIDER_MODE (mode))
5757 FCONST0(mode).data.high = 0;
5758 FCONST0(mode).data.low = 0;
5759 FCONST0(mode).mode = mode;
5760 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5761 FCONST0 (mode), mode);
5764 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5766 mode = GET_MODE_WIDER_MODE (mode))
5768 FCONST0(mode).data.high = 0;
5769 FCONST0(mode).data.low = 0;
5770 FCONST0(mode).mode = mode;
5771 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5772 FCONST0 (mode), mode);
5775 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5777 mode = GET_MODE_WIDER_MODE (mode))
5779 FCONST0(mode).data.high = 0;
5780 FCONST0(mode).data.low = 0;
5781 FCONST0(mode).mode = mode;
5782 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5783 FCONST0 (mode), mode);
5785 /* We store the value 1. */
5786 FCONST1(mode).data.high = 0;
5787 FCONST1(mode).data.low = 0;
5788 FCONST1(mode).mode = mode;
5789 lshift_double (1, 0, GET_MODE_FBIT (mode),
5790 2 * HOST_BITS_PER_WIDE_INT,
5791 &FCONST1(mode).data.low,
5792 &FCONST1(mode).data.high,
5793 SIGNED_FIXED_POINT_MODE_P (mode));
5794 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5795 FCONST1 (mode), mode);
5798 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5800 mode = GET_MODE_WIDER_MODE (mode))
5802 FCONST0(mode).data.high = 0;
5803 FCONST0(mode).data.low = 0;
5804 FCONST0(mode).mode = mode;
5805 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5806 FCONST0 (mode), mode);
5808 /* We store the value 1. */
5809 FCONST1(mode).data.high = 0;
5810 FCONST1(mode).data.low = 0;
5811 FCONST1(mode).mode = mode;
5812 lshift_double (1, 0, GET_MODE_FBIT (mode),
5813 2 * HOST_BITS_PER_WIDE_INT,
5814 &FCONST1(mode).data.low,
5815 &FCONST1(mode).data.high,
5816 SIGNED_FIXED_POINT_MODE_P (mode));
5817 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5818 FCONST1 (mode), mode);
5821 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5823 mode = GET_MODE_WIDER_MODE (mode))
5825 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5828 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5830 mode = GET_MODE_WIDER_MODE (mode))
5832 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5835 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5837 mode = GET_MODE_WIDER_MODE (mode))
5839 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5840 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5843 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5845 mode = GET_MODE_WIDER_MODE (mode))
5847 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5848 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5851 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5852 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5853 const_tiny_rtx[0][i] = const0_rtx;
5855 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5856 if (STORE_FLAG_VALUE == 1)
5857 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5860 /* Produce exact duplicate of insn INSN after AFTER.
5861 Care updating of libcall regions if present. */
5864 emit_copy_of_insn_after (rtx insn, rtx after)
5868 switch (GET_CODE (insn))
5871 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5875 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5879 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5883 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5884 if (CALL_INSN_FUNCTION_USAGE (insn))
5885 CALL_INSN_FUNCTION_USAGE (new_rtx)
5886 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5887 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5888 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5889 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5890 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5891 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5898 /* Update LABEL_NUSES. */
5899 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5901 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5903 /* If the old insn is frame related, then so is the new one. This is
5904 primarily needed for IA-64 unwind info which marks epilogue insns,
5905 which may be duplicated by the basic block reordering code. */
5906 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5908 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5909 will make them. REG_LABEL_TARGETs are created there too, but are
5910 supposed to be sticky, so we copy them. */
5911 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5912 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5914 if (GET_CODE (link) == EXPR_LIST)
5915 add_reg_note (new_rtx, REG_NOTE_KIND (link),
5916 copy_insn_1 (XEXP (link, 0)));
5918 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
5921 INSN_CODE (new_rtx) = INSN_CODE (insn);
5925 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5927 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5929 if (hard_reg_clobbers[mode][regno])
5930 return hard_reg_clobbers[mode][regno];
5932 return (hard_reg_clobbers[mode][regno] =
5933 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5936 #include "gt-emit-rtl.h"