1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
46 #include "hard-reg-set.h"
47 #include "insn-config.h"
54 /* Commonly used modes. */
56 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
57 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
58 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
59 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
62 /* This is *not* reset after each function. It gives each CODE_LABEL
63 in the entire compilation a unique label number. */
65 static int label_num = 1;
67 /* Highest label number in current function.
68 Zero means use the value of label_num instead.
69 This is nonzero only when belatedly compiling an inline function. */
71 static int last_label_num;
73 /* Value label_num had when set_new_first_and_last_label_number was called.
74 If label_num has not changed since then, last_label_num is valid. */
76 static int base_label_num;
78 /* Nonzero means do not generate NOTEs for source line numbers. */
80 static int no_line_numbers;
82 /* Commonly used rtx's, so that we only need space for one copy.
83 These are initialized once for the entire compilation.
84 All of these except perhaps the floating-point CONST_DOUBLEs
85 are unique; no other rtx-object will be equal to any of these. */
87 /* Avoid warnings by initializing the `fld' field. Since its a union,
88 bypass problems with KNR compilers by only doing so when __GNUC__. */
95 struct _global_rtl global_rtl =
97 {PC, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* pc_rtx */
98 {CC0, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* cc0_rtx */
99 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* stack_pointer_rtx */
100 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* frame_pointer_rtx */
101 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* hard_frame_pointer_rtx */
102 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* arg_pointer_rtx */
103 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_incoming_args_rtx */
104 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_vars_rtx */
105 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_dynamic_rtx */
106 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_outgoing_args_rtx */
107 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_cfa_rtx */
110 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
111 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
112 record a copy of const[012]_rtx. */
114 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
118 REAL_VALUE_TYPE dconst0;
119 REAL_VALUE_TYPE dconst1;
120 REAL_VALUE_TYPE dconst2;
121 REAL_VALUE_TYPE dconstm1;
123 /* All references to the following fixed hard registers go through
124 these unique rtl objects. On machines where the frame-pointer and
125 arg-pointer are the same register, they use the same unique object.
127 After register allocation, other rtl objects which used to be pseudo-regs
128 may be clobbered to refer to the frame-pointer register.
129 But references that were originally to the frame-pointer can be
130 distinguished from the others because they contain frame_pointer_rtx.
132 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
133 tricky: until register elimination has taken place hard_frame_pointer_rtx
134 should be used if it is being set, and frame_pointer_rtx otherwise. After
135 register elimination hard_frame_pointer_rtx should always be used.
136 On machines where the two registers are same (most) then these are the
139 In an inline procedure, the stack and frame pointer rtxs may not be
140 used for anything else. */
141 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
142 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
143 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
144 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
145 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
147 /* This is used to implement __builtin_return_address for some machines.
148 See for instance the MIPS port. */
149 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
151 /* We make one copy of (const_int C) where C is in
152 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
153 to save space during the compilation and simplify comparisons of
156 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
158 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
159 shortly thrown away. We use two mechanisms to prevent this waste:
161 First, we keep a list of the expressions used to represent the sequence
162 stack in sequence_element_free_list.
164 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
165 rtvec for use by gen_sequence. One entry for each size is sufficient
166 because most cases are calls to gen_sequence followed by immediately
167 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
168 destructive on the insn in it anyway and hence can't be redone.
170 We do not bother to save this cached data over nested function calls.
171 Instead, we just reinitialize them. */
173 #define SEQUENCE_RESULT_SIZE 5
175 static struct sequence_stack *sequence_element_free_list;
176 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
178 /* During RTL generation, we also keep a list of free INSN rtl codes. */
179 static rtx free_insn;
181 #define first_insn (current_function->emit->x_first_insn)
182 #define last_insn (current_function->emit->x_last_insn)
183 #define cur_insn_uid (current_function->emit->x_cur_insn_uid)
184 #define last_linenum (current_function->emit->x_last_linenum)
185 #define last_filename (current_function->emit->x_last_filename)
186 #define first_label_num (current_function->emit->x_first_label_num)
188 static rtx make_jump_insn_raw PROTO((rtx));
189 static rtx make_call_insn_raw PROTO((rtx));
190 static rtx find_line_note PROTO((rtx));
191 static void mark_sequence_stack PROTO((struct sequence_stack *));
194 gen_rtx_CONST_INT (mode, arg)
195 enum machine_mode mode;
198 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
199 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
201 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
202 if (const_true_rtx && arg == STORE_FLAG_VALUE)
203 return const_true_rtx;
206 return gen_rtx_raw_CONST_INT (mode, arg);
209 /* CONST_DOUBLEs needs special handling because its length is known
212 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
213 enum machine_mode mode;
215 HOST_WIDE_INT arg1, arg2;
217 rtx r = rtx_alloc (CONST_DOUBLE);
222 X0EXP (r, 1) = NULL_RTX;
226 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
233 gen_rtx_REG (mode, regno)
234 enum machine_mode mode;
237 /* In case the MD file explicitly references the frame pointer, have
238 all such references point to the same frame pointer. This is
239 used during frame pointer elimination to distinguish the explicit
240 references to these registers from pseudos that happened to be
243 If we have eliminated the frame pointer or arg pointer, we will
244 be using it as a normal register, for example as a spill
245 register. In such cases, we might be accessing it in a mode that
246 is not Pmode and therefore cannot use the pre-allocated rtx.
248 Also don't do this when we are making new REGs in reload, since
249 we don't want to get confused with the real pointers. */
251 if (mode == Pmode && !reload_in_progress)
253 if (regno == FRAME_POINTER_REGNUM)
254 return frame_pointer_rtx;
255 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
256 if (regno == HARD_FRAME_POINTER_REGNUM)
257 return hard_frame_pointer_rtx;
259 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
260 if (regno == ARG_POINTER_REGNUM)
261 return arg_pointer_rtx;
263 #ifdef RETURN_ADDRESS_POINTER_REGNUM
264 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
265 return return_address_pointer_rtx;
267 if (regno == STACK_POINTER_REGNUM)
268 return stack_pointer_rtx;
271 return gen_rtx_raw_REG (mode, regno);
275 gen_rtx_MEM (mode, addr)
276 enum machine_mode mode;
279 rtx rt = gen_rtx_raw_MEM (mode, addr);
281 /* This field is not cleared by the mere allocation of the rtx, so
283 MEM_ALIAS_SET (rt) = 0;
288 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
290 ** This routine generates an RTX of the size specified by
291 ** <code>, which is an RTX code. The RTX structure is initialized
292 ** from the arguments <element1> through <elementn>, which are
293 ** interpreted according to the specific RTX type's format. The
294 ** special machine mode associated with the rtx (if any) is specified
297 ** gen_rtx can be invoked in a way which resembles the lisp-like
298 ** rtx it will generate. For example, the following rtx structure:
300 ** (plus:QI (mem:QI (reg:SI 1))
301 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
303 ** ...would be generated by the following C code:
305 ** gen_rtx (PLUS, QImode,
306 ** gen_rtx (MEM, QImode,
307 ** gen_rtx (REG, SImode, 1)),
308 ** gen_rtx (MEM, QImode,
309 ** gen_rtx (PLUS, SImode,
310 ** gen_rtx (REG, SImode, 2),
311 ** gen_rtx (REG, SImode, 3)))),
316 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
318 #ifndef ANSI_PROTOTYPES
320 enum machine_mode mode;
323 register int i; /* Array indices... */
324 register const char *fmt; /* Current rtx's format... */
325 register rtx rt_val; /* RTX to return to caller... */
329 #ifndef ANSI_PROTOTYPES
330 code = va_arg (p, enum rtx_code);
331 mode = va_arg (p, enum machine_mode);
337 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
342 rtx arg0 = va_arg (p, rtx);
343 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
344 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
345 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
350 rt_val = gen_rtx_REG (mode, va_arg (p, int));
354 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
358 rt_val = rtx_alloc (code); /* Allocate the storage space. */
359 rt_val->mode = mode; /* Store the machine mode... */
361 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
362 for (i = 0; i < GET_RTX_LENGTH (code); i++)
366 case '0': /* Unused field. */
369 case 'i': /* An integer? */
370 XINT (rt_val, i) = va_arg (p, int);
373 case 'w': /* A wide integer? */
374 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
377 case 's': /* A string? */
378 XSTR (rt_val, i) = va_arg (p, char *);
381 case 'e': /* An expression? */
382 case 'u': /* An insn? Same except when printing. */
383 XEXP (rt_val, i) = va_arg (p, rtx);
386 case 'E': /* An RTX vector? */
387 XVEC (rt_val, i) = va_arg (p, rtvec);
390 case 'b': /* A bitmap? */
391 XBITMAP (rt_val, i) = va_arg (p, bitmap);
394 case 't': /* A tree? */
395 XTREE (rt_val, i) = va_arg (p, tree);
409 /* gen_rtvec (n, [rt1, ..., rtn])
411 ** This routine creates an rtvec and stores within it the
412 ** pointers to rtx's which are its arguments.
417 gen_rtvec VPROTO((int n, ...))
419 #ifndef ANSI_PROTOTYPES
428 #ifndef ANSI_PROTOTYPES
433 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
435 vector = (rtx *) alloca (n * sizeof (rtx));
437 for (i = 0; i < n; i++)
438 vector[i] = va_arg (p, rtx);
441 return gen_rtvec_v (n, vector);
445 gen_rtvec_v (n, argp)
450 register rtvec rt_val;
453 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
455 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
457 for (i = 0; i < n; i++)
458 rt_val->elem[i] = *argp++;
464 /* Generate a REG rtx for a new pseudo register of mode MODE.
465 This pseudo is assigned the next sequential register number. */
469 enum machine_mode mode;
471 struct function *f = current_function;
474 /* Don't let anything called after initial flow analysis create new
479 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
480 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
482 /* For complex modes, don't make a single pseudo.
483 Instead, make a CONCAT of two pseudos.
484 This allows noncontiguous allocation of the real and imaginary parts,
485 which makes much better code. Besides, allocating DCmode
486 pseudos overstrains reload on some machines like the 386. */
487 rtx realpart, imagpart;
488 int size = GET_MODE_UNIT_SIZE (mode);
489 enum machine_mode partmode
490 = mode_for_size (size * BITS_PER_UNIT,
491 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
492 ? MODE_FLOAT : MODE_INT),
495 realpart = gen_reg_rtx (partmode);
496 imagpart = gen_reg_rtx (partmode);
497 return gen_rtx_CONCAT (mode, realpart, imagpart);
500 /* Make sure regno_pointer_flag and regno_reg_rtx are large
501 enough to have an element for this pseudo reg number. */
503 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
505 int old_size = f->emit->regno_pointer_flag_length;
508 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
509 memset (new + old_size, 0, old_size);
510 f->emit->regno_pointer_flag = new;
512 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
513 memset (new + old_size, 0, old_size);
514 f->emit->regno_pointer_align = new;
516 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
517 old_size * 2 * sizeof (rtx));
518 memset (new1 + old_size, 0, old_size * sizeof (rtx));
519 regno_reg_rtx = new1;
521 f->emit->regno_pointer_flag_length = old_size * 2;
524 val = gen_rtx_raw_REG (mode, reg_rtx_no);
525 regno_reg_rtx[reg_rtx_no++] = val;
529 /* Identify REG (which may be a CONCAT) as a user register. */
535 if (GET_CODE (reg) == CONCAT)
537 REG_USERVAR_P (XEXP (reg, 0)) = 1;
538 REG_USERVAR_P (XEXP (reg, 1)) = 1;
540 else if (GET_CODE (reg) == REG)
541 REG_USERVAR_P (reg) = 1;
546 /* Identify REG as a probable pointer register and show its alignment
547 as ALIGN, if nonzero. */
550 mark_reg_pointer (reg, align)
554 if (! REGNO_POINTER_FLAG (REGNO (reg)))
556 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
559 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
561 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
562 /* We can no-longer be sure just how aligned this pointer is */
563 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
566 /* Return 1 plus largest pseudo reg number used in the current function. */
574 /* Return 1 + the largest label number used so far in the current function. */
579 if (last_label_num && label_num == base_label_num)
580 return last_label_num;
584 /* Return first label number used in this function (if any were used). */
587 get_first_label_num ()
589 return first_label_num;
592 /* Return a value representing some low-order bits of X, where the number
593 of low-order bits is given by MODE. Note that no conversion is done
594 between floating-point and fixed-point values, rather, the bit
595 representation is returned.
597 This function handles the cases in common between gen_lowpart, below,
598 and two variants in cse.c and combine.c. These are the cases that can
599 be safely handled at all points in the compilation.
601 If this is not a case we can handle, return 0. */
604 gen_lowpart_common (mode, x)
605 enum machine_mode mode;
610 if (GET_MODE (x) == mode)
613 /* MODE must occupy no more words than the mode of X. */
614 if (GET_MODE (x) != VOIDmode
615 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
616 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
620 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
621 word = ((GET_MODE_SIZE (GET_MODE (x))
622 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
625 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
626 && (GET_MODE_CLASS (mode) == MODE_INT
627 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
629 /* If we are getting the low-order part of something that has been
630 sign- or zero-extended, we can either just use the object being
631 extended or make a narrower extension. If we want an even smaller
632 piece than the size of the object being extended, call ourselves
635 This case is used mostly by combine and cse. */
637 if (GET_MODE (XEXP (x, 0)) == mode)
639 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
640 return gen_lowpart_common (mode, XEXP (x, 0));
641 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
642 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
644 else if (GET_CODE (x) == SUBREG
645 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
646 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
647 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
649 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
650 else if (GET_CODE (x) == REG)
652 /* Let the backend decide how many registers to skip. This is needed
653 in particular for Sparc64 where fp regs are smaller than a word. */
654 /* ??? Note that subregs are now ambiguous, in that those against
655 pseudos are sized by the Word Size, while those against hard
656 regs are sized by the underlying register size. Better would be
657 to always interpret the subreg offset parameter as bytes or bits. */
659 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
660 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
661 - HARD_REGNO_NREGS (REGNO (x), mode));
663 /* If the register is not valid for MODE, return 0. If we don't
664 do this, there is no way to fix up the resulting REG later.
665 But we do do this if the current REG is not valid for its
666 mode. This latter is a kludge, but is required due to the
667 way that parameters are passed on some machines, most
669 if (REGNO (x) < FIRST_PSEUDO_REGISTER
670 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
671 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
673 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
674 /* integrate.c can't handle parts of a return value register. */
675 && (! REG_FUNCTION_VALUE_P (x)
676 || ! rtx_equal_function_value_matters)
677 #ifdef CLASS_CANNOT_CHANGE_SIZE
678 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
679 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
680 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
681 && (TEST_HARD_REG_BIT
682 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
685 /* We want to keep the stack, frame, and arg pointers
687 && x != frame_pointer_rtx
688 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
689 && x != arg_pointer_rtx
691 && x != stack_pointer_rtx)
692 return gen_rtx_REG (mode, REGNO (x) + word);
694 return gen_rtx_SUBREG (mode, x, word);
696 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
697 from the low-order part of the constant. */
698 else if ((GET_MODE_CLASS (mode) == MODE_INT
699 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
700 && GET_MODE (x) == VOIDmode
701 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
703 /* If MODE is twice the host word size, X is already the desired
704 representation. Otherwise, if MODE is wider than a word, we can't
705 do this. If MODE is exactly a word, return just one CONST_INT.
706 If MODE is smaller than a word, clear the bits that don't belong
707 in our mode, unless they and our sign bit are all one. So we get
708 either a reasonable negative value or a reasonable unsigned value
711 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
713 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
715 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
716 return (GET_CODE (x) == CONST_INT ? x
717 : GEN_INT (CONST_DOUBLE_LOW (x)));
720 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
721 int width = GET_MODE_BITSIZE (mode);
722 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
723 : CONST_DOUBLE_LOW (x));
725 /* Sign extend to HOST_WIDE_INT. */
726 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
728 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
733 /* If X is an integral constant but we want it in floating-point, it
734 must be the case that we have a union of an integer and a floating-point
735 value. If the machine-parameters allow it, simulate that union here
736 and return the result. The two-word and single-word cases are
739 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
740 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
741 || flag_pretend_float)
742 && GET_MODE_CLASS (mode) == MODE_FLOAT
743 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
744 && GET_CODE (x) == CONST_INT
745 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
746 #ifdef REAL_ARITHMETIC
752 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
753 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
757 union {HOST_WIDE_INT i; float d; } u;
760 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
763 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
764 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
765 || flag_pretend_float)
766 && GET_MODE_CLASS (mode) == MODE_FLOAT
767 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
768 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
769 && GET_MODE (x) == VOIDmode
770 && (sizeof (double) * HOST_BITS_PER_CHAR
771 == 2 * HOST_BITS_PER_WIDE_INT))
772 #ifdef REAL_ARITHMETIC
776 HOST_WIDE_INT low, high;
778 if (GET_CODE (x) == CONST_INT)
779 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
781 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
783 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
785 if (WORDS_BIG_ENDIAN)
786 i[0] = high, i[1] = low;
788 i[0] = low, i[1] = high;
790 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
791 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
795 union {HOST_WIDE_INT i[2]; double d; } u;
796 HOST_WIDE_INT low, high;
798 if (GET_CODE (x) == CONST_INT)
799 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
801 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
803 #ifdef HOST_WORDS_BIG_ENDIAN
804 u.i[0] = high, u.i[1] = low;
806 u.i[0] = low, u.i[1] = high;
809 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
813 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
814 same as sizeof (double) or when sizeof (float) is larger than the
815 size of a word on the target machine. */
816 #ifdef REAL_ARITHMETIC
817 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
823 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
824 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
826 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
827 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
828 || flag_pretend_float)
829 && GET_MODE_CLASS (mode) == MODE_FLOAT
830 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
831 && GET_CODE (x) == CONST_INT
832 && (sizeof (double) * HOST_BITS_PER_CHAR
833 == HOST_BITS_PER_WIDE_INT))
839 r = REAL_VALUE_FROM_TARGET_DOUBLE (&i);
840 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
844 /* Similarly, if this is converting a floating-point value into a
845 single-word integer. Only do this is the host and target parameters are
848 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
849 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
850 || flag_pretend_float)
851 && (GET_MODE_CLASS (mode) == MODE_INT
852 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
853 && GET_CODE (x) == CONST_DOUBLE
854 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
855 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
856 return operand_subword (x, word, 0, GET_MODE (x));
858 /* Similarly, if this is converting a floating-point value into a
859 two-word integer, we can do this one word at a time and make an
860 integer. Only do this is the host and target parameters are
863 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
864 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
865 || flag_pretend_float)
866 && (GET_MODE_CLASS (mode) == MODE_INT
867 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
868 && GET_CODE (x) == CONST_DOUBLE
869 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
870 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
873 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
875 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
877 if (lowpart && GET_CODE (lowpart) == CONST_INT
878 && highpart && GET_CODE (highpart) == CONST_INT)
879 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
882 /* Otherwise, we can't do this. */
886 /* Return the real part (which has mode MODE) of a complex value X.
887 This always comes at the low address in memory. */
890 gen_realpart (mode, x)
891 enum machine_mode mode;
894 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
896 else if (WORDS_BIG_ENDIAN
897 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
899 && REGNO (x) < FIRST_PSEUDO_REGISTER)
900 fatal ("Unable to access real part of complex value in a hard register on this target");
901 else if (WORDS_BIG_ENDIAN)
902 return gen_highpart (mode, x);
904 return gen_lowpart (mode, x);
907 /* Return the imaginary part (which has mode MODE) of a complex value X.
908 This always comes at the high address in memory. */
911 gen_imagpart (mode, x)
912 enum machine_mode mode;
915 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
917 else if (WORDS_BIG_ENDIAN)
918 return gen_lowpart (mode, x);
919 else if (!WORDS_BIG_ENDIAN
920 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
922 && REGNO (x) < FIRST_PSEUDO_REGISTER)
923 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
925 return gen_highpart (mode, x);
928 /* Return 1 iff X, assumed to be a SUBREG,
929 refers to the real part of the complex value in its containing reg.
930 Complex values are always stored with the real part in the first word,
931 regardless of WORDS_BIG_ENDIAN. */
934 subreg_realpart_p (x)
937 if (GET_CODE (x) != SUBREG)
940 return SUBREG_WORD (x) * UNITS_PER_WORD < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)));
943 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
944 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
945 least-significant part of X.
946 MODE specifies how big a part of X to return;
947 it usually should not be larger than a word.
948 If X is a MEM whose address is a QUEUED, the value may be so also. */
951 gen_lowpart (mode, x)
952 enum machine_mode mode;
955 rtx result = gen_lowpart_common (mode, x);
959 else if (GET_CODE (x) == REG)
961 /* Must be a hard reg that's not valid in MODE. */
962 result = gen_lowpart_common (mode, copy_to_reg (x));
967 else if (GET_CODE (x) == MEM)
969 /* The only additional case we can do is MEM. */
970 register int offset = 0;
971 if (WORDS_BIG_ENDIAN)
972 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
973 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
975 if (BYTES_BIG_ENDIAN)
976 /* Adjust the address so that the address-after-the-data
978 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
979 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
981 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
983 else if (GET_CODE (x) == ADDRESSOF)
984 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
989 /* Like `gen_lowpart', but refer to the most significant part.
990 This is used to access the imaginary part of a complex number. */
993 gen_highpart (mode, x)
994 enum machine_mode mode;
997 /* This case loses if X is a subreg. To catch bugs early,
998 complain if an invalid MODE is used even in other cases. */
999 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1000 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1002 if (GET_CODE (x) == CONST_DOUBLE
1003 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1004 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1007 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1008 else if (GET_CODE (x) == CONST_INT)
1010 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1012 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1014 else if (GET_CODE (x) == MEM)
1016 register int offset = 0;
1017 if (! WORDS_BIG_ENDIAN)
1018 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1019 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1021 if (! BYTES_BIG_ENDIAN
1022 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1023 offset -= (GET_MODE_SIZE (mode)
1024 - MIN (UNITS_PER_WORD,
1025 GET_MODE_SIZE (GET_MODE (x))));
1027 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1029 else if (GET_CODE (x) == SUBREG)
1031 /* The only time this should occur is when we are looking at a
1032 multi-word item with a SUBREG whose mode is the same as that of the
1033 item. It isn't clear what we would do if it wasn't. */
1034 if (SUBREG_WORD (x) != 0)
1036 return gen_highpart (mode, SUBREG_REG (x));
1038 else if (GET_CODE (x) == REG)
1042 /* Let the backend decide how many registers to skip. This is needed
1043 in particular for sparc64 where fp regs are smaller than a word. */
1044 /* ??? Note that subregs are now ambiguous, in that those against
1045 pseudos are sized by the word size, while those against hard
1046 regs are sized by the underlying register size. Better would be
1047 to always interpret the subreg offset parameter as bytes or bits. */
1049 if (WORDS_BIG_ENDIAN)
1051 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1052 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1053 - HARD_REGNO_NREGS (REGNO (x), mode));
1055 word = ((GET_MODE_SIZE (GET_MODE (x))
1056 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1059 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1060 /* integrate.c can't handle parts of a return value register. */
1061 && (! REG_FUNCTION_VALUE_P (x)
1062 || ! rtx_equal_function_value_matters)
1063 /* We want to keep the stack, frame, and arg pointers special. */
1064 && x != frame_pointer_rtx
1065 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1066 && x != arg_pointer_rtx
1068 && x != stack_pointer_rtx)
1069 return gen_rtx_REG (mode, REGNO (x) + word);
1071 return gen_rtx_SUBREG (mode, x, word);
1077 /* Return 1 iff X, assumed to be a SUBREG,
1078 refers to the least significant part of its containing reg.
1079 If X is not a SUBREG, always return 1 (it is its own low part!). */
1082 subreg_lowpart_p (x)
1085 if (GET_CODE (x) != SUBREG)
1087 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1090 if (WORDS_BIG_ENDIAN
1091 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1092 return (SUBREG_WORD (x)
1093 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1094 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1097 return SUBREG_WORD (x) == 0;
1100 /* Return subword I of operand OP.
1101 The word number, I, is interpreted as the word number starting at the
1102 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1103 otherwise it is the high-order word.
1105 If we cannot extract the required word, we return zero. Otherwise, an
1106 rtx corresponding to the requested word will be returned.
1108 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1109 reload has completed, a valid address will always be returned. After
1110 reload, if a valid address cannot be returned, we return zero.
1112 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1113 it is the responsibility of the caller.
1115 MODE is the mode of OP in case it is a CONST_INT. */
1118 operand_subword (op, i, validate_address, mode)
1121 int validate_address;
1122 enum machine_mode mode;
1125 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1127 if (mode == VOIDmode)
1128 mode = GET_MODE (op);
1130 if (mode == VOIDmode)
1133 /* If OP is narrower than a word, fail. */
1135 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1138 /* If we want a word outside OP, return zero. */
1140 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1143 /* If OP is already an integer word, return it. */
1144 if (GET_MODE_CLASS (mode) == MODE_INT
1145 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1148 /* If OP is a REG or SUBREG, we can handle it very simply. */
1149 if (GET_CODE (op) == REG)
1151 /* ??? There is a potential problem with this code. It does not
1152 properly handle extractions of a subword from a hard register
1153 that is larger than word_mode. Presumably the check for
1154 HARD_REGNO_MODE_OK catches these most of these cases. */
1156 /* If OP is a hard register, but OP + I is not a hard register,
1157 then extracting a subword is impossible.
1159 For example, consider if OP is the last hard register and it is
1160 larger than word_mode. If we wanted word N (for N > 0) because a
1161 part of that hard register was known to contain a useful value,
1162 then OP + I would refer to a pseudo, not the hard register we
1164 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1165 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1168 /* If the register is not valid for MODE, return 0. Note we
1169 have to check both OP and OP + I since they may refer to
1170 different parts of the register file.
1172 Consider if OP refers to the last 96bit FP register and we want
1173 subword 3 because that subword is known to contain a value we
1175 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1176 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1177 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1179 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1180 || (REG_FUNCTION_VALUE_P (op)
1181 && rtx_equal_function_value_matters)
1182 /* We want to keep the stack, frame, and arg pointers
1184 || op == frame_pointer_rtx
1185 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1186 || op == arg_pointer_rtx
1188 || op == stack_pointer_rtx)
1189 return gen_rtx_SUBREG (word_mode, op, i);
1191 return gen_rtx_REG (word_mode, REGNO (op) + i);
1193 else if (GET_CODE (op) == SUBREG)
1194 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1195 else if (GET_CODE (op) == CONCAT)
1197 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1199 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1200 return operand_subword (XEXP (op, 1), i - partwords,
1201 validate_address, mode);
1204 /* Form a new MEM at the requested address. */
1205 if (GET_CODE (op) == MEM)
1207 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1210 if (validate_address)
1212 if (reload_completed)
1214 if (! strict_memory_address_p (word_mode, addr))
1218 addr = memory_address (word_mode, addr);
1221 new = gen_rtx_MEM (word_mode, addr);
1223 MEM_COPY_ATTRIBUTES (new, op);
1224 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1225 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (op);
1230 /* The only remaining cases are when OP is a constant. If the host and
1231 target floating formats are the same, handling two-word floating
1232 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1233 are defined as returning one or two 32 bit values, respectively,
1234 and not values of BITS_PER_WORD bits. */
1235 #ifdef REAL_ARITHMETIC
1236 /* The output is some bits, the width of the target machine's word.
1237 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1239 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1240 && GET_MODE_CLASS (mode) == MODE_FLOAT
1241 && GET_MODE_BITSIZE (mode) == 64
1242 && GET_CODE (op) == CONST_DOUBLE)
1247 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1248 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1250 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1251 which the words are written depends on the word endianness.
1252 ??? This is a potential portability problem and should
1253 be fixed at some point.
1255 We must excercise caution with the sign bit. By definition there
1256 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1257 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1258 So we explicitly mask and sign-extend as necessary. */
1259 if (BITS_PER_WORD == 32)
1262 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1263 return GEN_INT (val);
1265 #if HOST_BITS_PER_WIDE_INT >= 64
1266 else if (BITS_PER_WORD >= 64 && i == 0)
1268 val = k[! WORDS_BIG_ENDIAN];
1269 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1270 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1271 return GEN_INT (val);
1274 else if (BITS_PER_WORD == 16)
1277 if ((i & 1) == !WORDS_BIG_ENDIAN)
1280 return GEN_INT (val);
1285 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1286 && GET_MODE_CLASS (mode) == MODE_FLOAT
1287 && GET_MODE_BITSIZE (mode) > 64
1288 && GET_CODE (op) == CONST_DOUBLE)
1293 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1294 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1296 if (BITS_PER_WORD == 32)
1299 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1300 return GEN_INT (val);
1305 #else /* no REAL_ARITHMETIC */
1306 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1307 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1308 || flag_pretend_float)
1309 && GET_MODE_CLASS (mode) == MODE_FLOAT
1310 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1311 && GET_CODE (op) == CONST_DOUBLE)
1313 /* The constant is stored in the host's word-ordering,
1314 but we want to access it in the target's word-ordering. Some
1315 compilers don't like a conditional inside macro args, so we have two
1316 copies of the return. */
1317 #ifdef HOST_WORDS_BIG_ENDIAN
1318 return GEN_INT (i == WORDS_BIG_ENDIAN
1319 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1321 return GEN_INT (i != WORDS_BIG_ENDIAN
1322 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1325 #endif /* no REAL_ARITHMETIC */
1327 /* Single word float is a little harder, since single- and double-word
1328 values often do not have the same high-order bits. We have already
1329 verified that we want the only defined word of the single-word value. */
1330 #ifdef REAL_ARITHMETIC
1331 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1332 && GET_MODE_BITSIZE (mode) == 32
1333 && GET_CODE (op) == CONST_DOUBLE)
1338 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1339 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1341 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1343 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1345 if (BITS_PER_WORD == 16)
1347 if ((i & 1) == !WORDS_BIG_ENDIAN)
1352 return GEN_INT (val);
1355 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1356 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1357 || flag_pretend_float)
1358 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1359 && GET_MODE_CLASS (mode) == MODE_FLOAT
1360 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1361 && GET_CODE (op) == CONST_DOUBLE)
1364 union {float f; HOST_WIDE_INT i; } u;
1366 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1369 return GEN_INT (u.i);
1371 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1372 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1373 || flag_pretend_float)
1374 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1375 && GET_MODE_CLASS (mode) == MODE_FLOAT
1376 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1377 && GET_CODE (op) == CONST_DOUBLE)
1380 union {double d; HOST_WIDE_INT i; } u;
1382 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1385 return GEN_INT (u.i);
1387 #endif /* no REAL_ARITHMETIC */
1389 /* The only remaining cases that we can handle are integers.
1390 Convert to proper endianness now since these cases need it.
1391 At this point, i == 0 means the low-order word.
1393 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1394 in general. However, if OP is (const_int 0), we can just return
1397 if (op == const0_rtx)
1400 if (GET_MODE_CLASS (mode) != MODE_INT
1401 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1402 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1405 if (WORDS_BIG_ENDIAN)
1406 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1408 /* Find out which word on the host machine this value is in and get
1409 it from the constant. */
1410 val = (i / size_ratio == 0
1411 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1412 : (GET_CODE (op) == CONST_INT
1413 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1415 /* Get the value we want into the low bits of val. */
1416 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1417 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1419 val = trunc_int_for_mode (val, word_mode);
1421 return GEN_INT (val);
1424 /* Similar to `operand_subword', but never return 0. If we can't extract
1425 the required subword, put OP into a register and try again. If that fails,
1426 abort. We always validate the address in this case. It is not valid
1427 to call this function after reload; it is mostly meant for RTL
1430 MODE is the mode of OP, in case it is CONST_INT. */
1433 operand_subword_force (op, i, mode)
1436 enum machine_mode mode;
1438 rtx result = operand_subword (op, i, 1, mode);
1443 if (mode != BLKmode && mode != VOIDmode)
1445 /* If this is a register which can not be accessed by words, copy it
1446 to a pseudo register. */
1447 if (GET_CODE (op) == REG)
1448 op = copy_to_reg (op);
1450 op = force_reg (mode, op);
1453 result = operand_subword (op, i, 1, mode);
1460 /* Given a compare instruction, swap the operands.
1461 A test instruction is changed into a compare of 0 against the operand. */
1464 reverse_comparison (insn)
1467 rtx body = PATTERN (insn);
1470 if (GET_CODE (body) == SET)
1471 comp = SET_SRC (body);
1473 comp = SET_SRC (XVECEXP (body, 0, 0));
1475 if (GET_CODE (comp) == COMPARE)
1477 rtx op0 = XEXP (comp, 0);
1478 rtx op1 = XEXP (comp, 1);
1479 XEXP (comp, 0) = op1;
1480 XEXP (comp, 1) = op0;
1484 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1485 if (GET_CODE (body) == SET)
1486 SET_SRC (body) = new;
1488 SET_SRC (XVECEXP (body, 0, 0)) = new;
1492 /* Return a memory reference like MEMREF, but with its mode changed
1493 to MODE and its address changed to ADDR.
1494 (VOIDmode means don't change the mode.
1495 NULL for ADDR means don't change the address.) */
1498 change_address (memref, mode, addr)
1500 enum machine_mode mode;
1505 if (GET_CODE (memref) != MEM)
1507 if (mode == VOIDmode)
1508 mode = GET_MODE (memref);
1510 addr = XEXP (memref, 0);
1512 /* If reload is in progress or has completed, ADDR must be valid.
1513 Otherwise, we can call memory_address to make it valid. */
1514 if (reload_completed || reload_in_progress)
1516 if (! memory_address_p (mode, addr))
1520 addr = memory_address (mode, addr);
1522 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1525 new = gen_rtx_MEM (mode, addr);
1526 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1527 MEM_COPY_ATTRIBUTES (new, memref);
1528 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (memref);
1532 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1539 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1540 NULL_RTX, label_num++, NULL_PTR);
1542 LABEL_NUSES (label) = 0;
1546 /* For procedure integration. */
1548 /* Install new pointers to the first and last insns in the chain.
1549 Also, set cur_insn_uid to one higher than the last in use.
1550 Used for an inline-procedure after copying the insn chain. */
1553 set_new_first_and_last_insn (first, last)
1562 for (insn = first; insn; insn = NEXT_INSN (insn))
1563 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1568 /* Set the range of label numbers found in the current function.
1569 This is used when belatedly compiling an inline function. */
1572 set_new_first_and_last_label_num (first, last)
1575 base_label_num = label_num;
1576 first_label_num = first;
1577 last_label_num = last;
1580 /* Set the last label number found in the current function.
1581 This is used when belatedly compiling an inline function. */
1584 set_new_last_label_num (last)
1587 base_label_num = label_num;
1588 last_label_num = last;
1591 /* Restore all variables describing the current status from the structure *P.
1592 This is used after a nested function. */
1595 restore_emit_status (p)
1599 clear_emit_caches ();
1602 /* Clear out all parts of our state in F that can safely be discarded
1603 after the function has been compiled, to let garbage collection
1604 reclaim the memory. */
1606 free_emit_status (f)
1609 free (f->emit->x_regno_reg_rtx);
1610 free (f->emit->regno_pointer_flag);
1611 free (f->emit->regno_pointer_align);
1612 f->emit->x_regno_reg_rtx = 0;
1615 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1616 It does not work to do this twice, because the mark bits set here
1617 are not cleared afterwards. */
1620 unshare_all_rtl (insn)
1623 for (; insn; insn = NEXT_INSN (insn))
1624 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1625 || GET_CODE (insn) == CALL_INSN)
1627 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1628 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1629 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1632 /* Make sure the addresses of stack slots found outside the insn chain
1633 (such as, in DECL_RTL of a variable) are not shared
1634 with the insn chain.
1636 This special care is necessary when the stack slot MEM does not
1637 actually appear in the insn chain. If it does appear, its address
1638 is unshared from all else at that point. */
1640 copy_rtx_if_shared (stack_slot_list);
1643 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1644 Recursively does the same for subexpressions. */
1647 copy_rtx_if_shared (orig)
1650 register rtx x = orig;
1652 register enum rtx_code code;
1653 register const char *format_ptr;
1659 code = GET_CODE (x);
1661 /* These types may be freely shared. */
1674 /* SCRATCH must be shared because they represent distinct values. */
1678 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1679 a LABEL_REF, it isn't sharable. */
1680 if (GET_CODE (XEXP (x, 0)) == PLUS
1681 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1682 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1691 /* The chain of insns is not being copied. */
1695 /* A MEM is allowed to be shared if its address is constant.
1697 We used to allow sharing of MEMs which referenced
1698 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1699 that can lose. instantiate_virtual_regs will not unshare
1700 the MEMs, and combine may change the structure of the address
1701 because it looks safe and profitable in one context, but
1702 in some other context it creates unrecognizable RTL. */
1703 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1712 /* This rtx may not be shared. If it has already been seen,
1713 replace it with a copy of itself. */
1719 copy = rtx_alloc (code);
1720 bcopy ((char *) x, (char *) copy,
1721 (sizeof (*copy) - sizeof (copy->fld)
1722 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1728 /* Now scan the subexpressions recursively.
1729 We can store any replaced subexpressions directly into X
1730 since we know X is not shared! Any vectors in X
1731 must be copied if X was copied. */
1733 format_ptr = GET_RTX_FORMAT (code);
1735 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1737 switch (*format_ptr++)
1740 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1744 if (XVEC (x, i) != NULL)
1747 int len = XVECLEN (x, i);
1749 if (copied && len > 0)
1750 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1751 for (j = 0; j < len; j++)
1752 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1760 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1761 to look for shared sub-parts. */
1764 reset_used_flags (x)
1768 register enum rtx_code code;
1769 register const char *format_ptr;
1774 code = GET_CODE (x);
1776 /* These types may be freely shared so we needn't do any resetting
1797 /* The chain of insns is not being copied. */
1806 format_ptr = GET_RTX_FORMAT (code);
1807 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1809 switch (*format_ptr++)
1812 reset_used_flags (XEXP (x, i));
1816 for (j = 0; j < XVECLEN (x, i); j++)
1817 reset_used_flags (XVECEXP (x, i, j));
1823 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1824 Return X or the rtx for the pseudo reg the value of X was copied into.
1825 OTHER must be valid as a SET_DEST. */
1828 make_safe_from (x, other)
1832 switch (GET_CODE (other))
1835 other = SUBREG_REG (other);
1837 case STRICT_LOW_PART:
1840 other = XEXP (other, 0);
1846 if ((GET_CODE (other) == MEM
1848 && GET_CODE (x) != REG
1849 && GET_CODE (x) != SUBREG)
1850 || (GET_CODE (other) == REG
1851 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1852 || reg_mentioned_p (other, x))))
1854 rtx temp = gen_reg_rtx (GET_MODE (x));
1855 emit_move_insn (temp, x);
1861 /* Emission of insns (adding them to the doubly-linked list). */
1863 /* Return the first insn of the current sequence or current function. */
1871 /* Return the last insn emitted in current sequence or current function. */
1879 /* Specify a new insn as the last in the chain. */
1882 set_last_insn (insn)
1885 if (NEXT_INSN (insn) != 0)
1890 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1893 get_last_insn_anywhere ()
1895 struct sequence_stack *stack;
1898 for (stack = seq_stack; stack; stack = stack->next)
1899 if (stack->last != 0)
1904 /* Return a number larger than any instruction's uid in this function. */
1909 return cur_insn_uid;
1912 /* Return the next insn. If it is a SEQUENCE, return the first insn
1921 insn = NEXT_INSN (insn);
1922 if (insn && GET_CODE (insn) == INSN
1923 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1924 insn = XVECEXP (PATTERN (insn), 0, 0);
1930 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1934 previous_insn (insn)
1939 insn = PREV_INSN (insn);
1940 if (insn && GET_CODE (insn) == INSN
1941 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1942 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1948 /* Return the next insn after INSN that is not a NOTE. This routine does not
1949 look inside SEQUENCEs. */
1952 next_nonnote_insn (insn)
1957 insn = NEXT_INSN (insn);
1958 if (insn == 0 || GET_CODE (insn) != NOTE)
1965 /* Return the previous insn before INSN that is not a NOTE. This routine does
1966 not look inside SEQUENCEs. */
1969 prev_nonnote_insn (insn)
1974 insn = PREV_INSN (insn);
1975 if (insn == 0 || GET_CODE (insn) != NOTE)
1982 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1983 or 0, if there is none. This routine does not look inside
1987 next_real_insn (insn)
1992 insn = NEXT_INSN (insn);
1993 if (insn == 0 || GET_CODE (insn) == INSN
1994 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2001 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2002 or 0, if there is none. This routine does not look inside
2006 prev_real_insn (insn)
2011 insn = PREV_INSN (insn);
2012 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2013 || GET_CODE (insn) == JUMP_INSN)
2020 /* Find the next insn after INSN that really does something. This routine
2021 does not look inside SEQUENCEs. Until reload has completed, this is the
2022 same as next_real_insn. */
2025 next_active_insn (insn)
2030 insn = NEXT_INSN (insn);
2032 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2033 || (GET_CODE (insn) == INSN
2034 && (! reload_completed
2035 || (GET_CODE (PATTERN (insn)) != USE
2036 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2043 /* Find the last insn before INSN that really does something. This routine
2044 does not look inside SEQUENCEs. Until reload has completed, this is the
2045 same as prev_real_insn. */
2048 prev_active_insn (insn)
2053 insn = PREV_INSN (insn);
2055 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2056 || (GET_CODE (insn) == INSN
2057 && (! reload_completed
2058 || (GET_CODE (PATTERN (insn)) != USE
2059 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2066 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2074 insn = NEXT_INSN (insn);
2075 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2082 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2090 insn = PREV_INSN (insn);
2091 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2099 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2100 and REG_CC_USER notes so we can find it. */
2103 link_cc0_insns (insn)
2106 rtx user = next_nonnote_insn (insn);
2108 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2109 user = XVECEXP (PATTERN (user), 0, 0);
2111 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2112 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2115 /* Return the next insn that uses CC0 after INSN, which is assumed to
2116 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2117 applied to the result of this function should yield INSN).
2119 Normally, this is simply the next insn. However, if a REG_CC_USER note
2120 is present, it contains the insn that uses CC0.
2122 Return 0 if we can't find the insn. */
2125 next_cc0_user (insn)
2128 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2131 return XEXP (note, 0);
2133 insn = next_nonnote_insn (insn);
2134 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2135 insn = XVECEXP (PATTERN (insn), 0, 0);
2137 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2138 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2144 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2145 note, it is the previous insn. */
2148 prev_cc0_setter (insn)
2151 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2154 return XEXP (note, 0);
2156 insn = prev_nonnote_insn (insn);
2157 if (! sets_cc0_p (PATTERN (insn)))
2164 /* Try splitting insns that can be split for better scheduling.
2165 PAT is the pattern which might split.
2166 TRIAL is the insn providing PAT.
2167 LAST is non-zero if we should return the last insn of the sequence produced.
2169 If this routine succeeds in splitting, it returns the first or last
2170 replacement insn depending on the value of LAST. Otherwise, it
2171 returns TRIAL. If the insn to be returned can be split, it will be. */
2174 try_split (pat, trial, last)
2178 rtx before = PREV_INSN (trial);
2179 rtx after = NEXT_INSN (trial);
2180 rtx seq = split_insns (pat, trial);
2181 int has_barrier = 0;
2184 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2185 We may need to handle this specially. */
2186 if (after && GET_CODE (after) == BARRIER)
2189 after = NEXT_INSN (after);
2194 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2195 The latter case will normally arise only when being done so that
2196 it, in turn, will be split (SFmode on the 29k is an example). */
2197 if (GET_CODE (seq) == SEQUENCE)
2199 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2200 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2201 increment the usage count so we don't delete the label. */
2204 if (GET_CODE (trial) == JUMP_INSN)
2205 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2206 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2208 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2210 if (JUMP_LABEL (trial))
2211 LABEL_NUSES (JUMP_LABEL (trial))++;
2214 tem = emit_insn_after (seq, before);
2216 delete_insn (trial);
2218 emit_barrier_after (tem);
2220 /* Recursively call try_split for each new insn created; by the
2221 time control returns here that insn will be fully split, so
2222 set LAST and continue from the insn after the one returned.
2223 We can't use next_active_insn here since AFTER may be a note.
2224 Ignore deleted insns, which can be occur if not optimizing. */
2225 for (tem = NEXT_INSN (before); tem != after;
2226 tem = NEXT_INSN (tem))
2227 if (! INSN_DELETED_P (tem)
2228 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2229 tem = try_split (PATTERN (tem), tem, 1);
2231 /* Avoid infinite loop if the result matches the original pattern. */
2232 else if (rtx_equal_p (seq, pat))
2236 PATTERN (trial) = seq;
2237 INSN_CODE (trial) = -1;
2238 try_split (seq, trial, last);
2241 /* Return either the first or the last insn, depending on which was
2243 return last ? prev_active_insn (after) : next_active_insn (before);
2249 /* Make and return an INSN rtx, initializing all its slots.
2250 Store PATTERN in the pattern slots. */
2253 make_insn_raw (pattern)
2258 /* If in RTL generation phase, see if FREE_INSN can be used. */
2259 if (free_insn != 0 && rtx_equal_function_value_matters)
2262 free_insn = NEXT_INSN (free_insn);
2263 PUT_CODE (insn, INSN);
2266 insn = rtx_alloc (INSN);
2268 INSN_UID (insn) = cur_insn_uid++;
2269 PATTERN (insn) = pattern;
2270 INSN_CODE (insn) = -1;
2271 LOG_LINKS (insn) = NULL;
2272 REG_NOTES (insn) = NULL;
2277 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2280 make_jump_insn_raw (pattern)
2285 insn = rtx_alloc (JUMP_INSN);
2286 INSN_UID (insn) = cur_insn_uid++;
2288 PATTERN (insn) = pattern;
2289 INSN_CODE (insn) = -1;
2290 LOG_LINKS (insn) = NULL;
2291 REG_NOTES (insn) = NULL;
2292 JUMP_LABEL (insn) = NULL;
2297 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2300 make_call_insn_raw (pattern)
2305 insn = rtx_alloc (CALL_INSN);
2306 INSN_UID (insn) = cur_insn_uid++;
2308 PATTERN (insn) = pattern;
2309 INSN_CODE (insn) = -1;
2310 LOG_LINKS (insn) = NULL;
2311 REG_NOTES (insn) = NULL;
2312 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2317 /* Add INSN to the end of the doubly-linked list.
2318 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2324 PREV_INSN (insn) = last_insn;
2325 NEXT_INSN (insn) = 0;
2327 if (NULL != last_insn)
2328 NEXT_INSN (last_insn) = insn;
2330 if (NULL == first_insn)
2336 /* Add INSN into the doubly-linked list after insn AFTER. This and
2337 the next should be the only functions called to insert an insn once
2338 delay slots have been filled since only they know how to update a
2342 add_insn_after (insn, after)
2345 rtx next = NEXT_INSN (after);
2347 if (optimize && INSN_DELETED_P (after))
2350 NEXT_INSN (insn) = next;
2351 PREV_INSN (insn) = after;
2355 PREV_INSN (next) = insn;
2356 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2357 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2359 else if (last_insn == after)
2363 struct sequence_stack *stack = seq_stack;
2364 /* Scan all pending sequences too. */
2365 for (; stack; stack = stack->next)
2366 if (after == stack->last)
2376 NEXT_INSN (after) = insn;
2377 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2379 rtx sequence = PATTERN (after);
2380 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2384 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2385 the previous should be the only functions called to insert an insn once
2386 delay slots have been filled since only they know how to update a
2390 add_insn_before (insn, before)
2393 rtx prev = PREV_INSN (before);
2395 if (optimize && INSN_DELETED_P (before))
2398 PREV_INSN (insn) = prev;
2399 NEXT_INSN (insn) = before;
2403 NEXT_INSN (prev) = insn;
2404 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2406 rtx sequence = PATTERN (prev);
2407 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2410 else if (first_insn == before)
2414 struct sequence_stack *stack = seq_stack;
2415 /* Scan all pending sequences too. */
2416 for (; stack; stack = stack->next)
2417 if (before == stack->first)
2419 stack->first = insn;
2427 PREV_INSN (before) = insn;
2428 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2429 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2432 /* Remove an insn from its doubly-linked list. This function knows how
2433 to handle sequences. */
2438 rtx next = NEXT_INSN (insn);
2439 rtx prev = PREV_INSN (insn);
2442 NEXT_INSN (prev) = next;
2443 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2445 rtx sequence = PATTERN (prev);
2446 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2449 else if (first_insn == insn)
2453 struct sequence_stack *stack = seq_stack;
2454 /* Scan all pending sequences too. */
2455 for (; stack; stack = stack->next)
2456 if (insn == stack->first)
2458 stack->first = next;
2468 PREV_INSN (next) = prev;
2469 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2470 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2472 else if (last_insn == insn)
2476 struct sequence_stack *stack = seq_stack;
2477 /* Scan all pending sequences too. */
2478 for (; stack; stack = stack->next)
2479 if (insn == stack->last)
2490 /* Delete all insns made since FROM.
2491 FROM becomes the new last instruction. */
2494 delete_insns_since (from)
2500 NEXT_INSN (from) = 0;
2504 /* This function is deprecated, please use sequences instead.
2506 Move a consecutive bunch of insns to a different place in the chain.
2507 The insns to be moved are those between FROM and TO.
2508 They are moved to a new position after the insn AFTER.
2509 AFTER must not be FROM or TO or any insn in between.
2511 This function does not know about SEQUENCEs and hence should not be
2512 called after delay-slot filling has been done. */
2515 reorder_insns (from, to, after)
2516 rtx from, to, after;
2518 /* Splice this bunch out of where it is now. */
2519 if (PREV_INSN (from))
2520 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2522 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2523 if (last_insn == to)
2524 last_insn = PREV_INSN (from);
2525 if (first_insn == from)
2526 first_insn = NEXT_INSN (to);
2528 /* Make the new neighbors point to it and it to them. */
2529 if (NEXT_INSN (after))
2530 PREV_INSN (NEXT_INSN (after)) = to;
2532 NEXT_INSN (to) = NEXT_INSN (after);
2533 PREV_INSN (from) = after;
2534 NEXT_INSN (after) = from;
2535 if (after == last_insn)
2539 /* Return the line note insn preceding INSN. */
2542 find_line_note (insn)
2545 if (no_line_numbers)
2548 for (; insn; insn = PREV_INSN (insn))
2549 if (GET_CODE (insn) == NOTE
2550 && NOTE_LINE_NUMBER (insn) >= 0)
2556 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2557 of the moved insns when debugging. This may insert a note between AFTER
2558 and FROM, and another one after TO. */
2561 reorder_insns_with_line_notes (from, to, after)
2562 rtx from, to, after;
2564 rtx from_line = find_line_note (from);
2565 rtx after_line = find_line_note (after);
2567 reorder_insns (from, to, after);
2569 if (from_line == after_line)
2573 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2574 NOTE_LINE_NUMBER (from_line),
2577 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2578 NOTE_LINE_NUMBER (after_line),
2582 /* Emit an insn of given code and pattern
2583 at a specified place within the doubly-linked list. */
2585 /* Make an instruction with body PATTERN
2586 and output it before the instruction BEFORE. */
2589 emit_insn_before (pattern, before)
2590 register rtx pattern, before;
2592 register rtx insn = before;
2594 if (GET_CODE (pattern) == SEQUENCE)
2598 for (i = 0; i < XVECLEN (pattern, 0); i++)
2600 insn = XVECEXP (pattern, 0, i);
2601 add_insn_before (insn, before);
2603 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2604 sequence_result[XVECLEN (pattern, 0)] = pattern;
2608 insn = make_insn_raw (pattern);
2609 add_insn_before (insn, before);
2615 /* Make an instruction with body PATTERN and code JUMP_INSN
2616 and output it before the instruction BEFORE. */
2619 emit_jump_insn_before (pattern, before)
2620 register rtx pattern, before;
2624 if (GET_CODE (pattern) == SEQUENCE)
2625 insn = emit_insn_before (pattern, before);
2628 insn = make_jump_insn_raw (pattern);
2629 add_insn_before (insn, before);
2635 /* Make an instruction with body PATTERN and code CALL_INSN
2636 and output it before the instruction BEFORE. */
2639 emit_call_insn_before (pattern, before)
2640 register rtx pattern, before;
2644 if (GET_CODE (pattern) == SEQUENCE)
2645 insn = emit_insn_before (pattern, before);
2648 insn = make_call_insn_raw (pattern);
2649 add_insn_before (insn, before);
2650 PUT_CODE (insn, CALL_INSN);
2656 /* Make an insn of code BARRIER
2657 and output it before the insn BEFORE. */
2660 emit_barrier_before (before)
2661 register rtx before;
2663 register rtx insn = rtx_alloc (BARRIER);
2665 INSN_UID (insn) = cur_insn_uid++;
2667 add_insn_before (insn, before);
2671 /* Emit the label LABEL before the insn BEFORE. */
2674 emit_label_before (label, before)
2677 /* This can be called twice for the same label as a result of the
2678 confusion that follows a syntax error! So make it harmless. */
2679 if (INSN_UID (label) == 0)
2681 INSN_UID (label) = cur_insn_uid++;
2682 add_insn_before (label, before);
2688 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2691 emit_note_before (subtype, before)
2695 register rtx note = rtx_alloc (NOTE);
2696 INSN_UID (note) = cur_insn_uid++;
2697 NOTE_SOURCE_FILE (note) = 0;
2698 NOTE_LINE_NUMBER (note) = subtype;
2700 add_insn_before (note, before);
2704 /* Make an insn of code INSN with body PATTERN
2705 and output it after the insn AFTER. */
2708 emit_insn_after (pattern, after)
2709 register rtx pattern, after;
2711 register rtx insn = after;
2713 if (GET_CODE (pattern) == SEQUENCE)
2717 for (i = 0; i < XVECLEN (pattern, 0); i++)
2719 insn = XVECEXP (pattern, 0, i);
2720 add_insn_after (insn, after);
2723 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2724 sequence_result[XVECLEN (pattern, 0)] = pattern;
2728 insn = make_insn_raw (pattern);
2729 add_insn_after (insn, after);
2735 /* Similar to emit_insn_after, except that line notes are to be inserted so
2736 as to act as if this insn were at FROM. */
2739 emit_insn_after_with_line_notes (pattern, after, from)
2740 rtx pattern, after, from;
2742 rtx from_line = find_line_note (from);
2743 rtx after_line = find_line_note (after);
2744 rtx insn = emit_insn_after (pattern, after);
2747 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2748 NOTE_LINE_NUMBER (from_line),
2752 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2753 NOTE_LINE_NUMBER (after_line),
2757 /* Make an insn of code JUMP_INSN with body PATTERN
2758 and output it after the insn AFTER. */
2761 emit_jump_insn_after (pattern, after)
2762 register rtx pattern, after;
2766 if (GET_CODE (pattern) == SEQUENCE)
2767 insn = emit_insn_after (pattern, after);
2770 insn = make_jump_insn_raw (pattern);
2771 add_insn_after (insn, after);
2777 /* Make an insn of code BARRIER
2778 and output it after the insn AFTER. */
2781 emit_barrier_after (after)
2784 register rtx insn = rtx_alloc (BARRIER);
2786 INSN_UID (insn) = cur_insn_uid++;
2788 add_insn_after (insn, after);
2792 /* Emit the label LABEL after the insn AFTER. */
2795 emit_label_after (label, after)
2798 /* This can be called twice for the same label
2799 as a result of the confusion that follows a syntax error!
2800 So make it harmless. */
2801 if (INSN_UID (label) == 0)
2803 INSN_UID (label) = cur_insn_uid++;
2804 add_insn_after (label, after);
2810 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2813 emit_note_after (subtype, after)
2817 register rtx note = rtx_alloc (NOTE);
2818 INSN_UID (note) = cur_insn_uid++;
2819 NOTE_SOURCE_FILE (note) = 0;
2820 NOTE_LINE_NUMBER (note) = subtype;
2821 add_insn_after (note, after);
2825 /* Emit a line note for FILE and LINE after the insn AFTER. */
2828 emit_line_note_after (file, line, after)
2835 if (no_line_numbers && line > 0)
2841 note = rtx_alloc (NOTE);
2842 INSN_UID (note) = cur_insn_uid++;
2843 NOTE_SOURCE_FILE (note) = file;
2844 NOTE_LINE_NUMBER (note) = line;
2845 add_insn_after (note, after);
2849 /* Make an insn of code INSN with pattern PATTERN
2850 and add it to the end of the doubly-linked list.
2851 If PATTERN is a SEQUENCE, take the elements of it
2852 and emit an insn for each element.
2854 Returns the last insn emitted. */
2860 rtx insn = last_insn;
2862 if (GET_CODE (pattern) == SEQUENCE)
2866 for (i = 0; i < XVECLEN (pattern, 0); i++)
2868 insn = XVECEXP (pattern, 0, i);
2871 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2872 sequence_result[XVECLEN (pattern, 0)] = pattern;
2876 insn = make_insn_raw (pattern);
2883 /* Emit the insns in a chain starting with INSN.
2884 Return the last insn emitted. */
2894 rtx next = NEXT_INSN (insn);
2903 /* Emit the insns in a chain starting with INSN and place them in front of
2904 the insn BEFORE. Return the last insn emitted. */
2907 emit_insns_before (insn, before)
2915 rtx next = NEXT_INSN (insn);
2916 add_insn_before (insn, before);
2924 /* Emit the insns in a chain starting with FIRST and place them in back of
2925 the insn AFTER. Return the last insn emitted. */
2928 emit_insns_after (first, after)
2933 register rtx after_after;
2941 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2944 after_after = NEXT_INSN (after);
2946 NEXT_INSN (after) = first;
2947 PREV_INSN (first) = after;
2948 NEXT_INSN (last) = after_after;
2950 PREV_INSN (after_after) = last;
2952 if (after == last_insn)
2957 /* Make an insn of code JUMP_INSN with pattern PATTERN
2958 and add it to the end of the doubly-linked list. */
2961 emit_jump_insn (pattern)
2964 if (GET_CODE (pattern) == SEQUENCE)
2965 return emit_insn (pattern);
2968 register rtx insn = make_jump_insn_raw (pattern);
2974 /* Make an insn of code CALL_INSN with pattern PATTERN
2975 and add it to the end of the doubly-linked list. */
2978 emit_call_insn (pattern)
2981 if (GET_CODE (pattern) == SEQUENCE)
2982 return emit_insn (pattern);
2985 register rtx insn = make_call_insn_raw (pattern);
2987 PUT_CODE (insn, CALL_INSN);
2992 /* Add the label LABEL to the end of the doubly-linked list. */
2998 /* This can be called twice for the same label
2999 as a result of the confusion that follows a syntax error!
3000 So make it harmless. */
3001 if (INSN_UID (label) == 0)
3003 INSN_UID (label) = cur_insn_uid++;
3009 /* Make an insn of code BARRIER
3010 and add it to the end of the doubly-linked list. */
3015 register rtx barrier = rtx_alloc (BARRIER);
3016 INSN_UID (barrier) = cur_insn_uid++;
3021 /* Make an insn of code NOTE
3022 with data-fields specified by FILE and LINE
3023 and add it to the end of the doubly-linked list,
3024 but only if line-numbers are desired for debugging info. */
3027 emit_line_note (file, line)
3031 set_file_and_line_for_stmt (file, line);
3034 if (no_line_numbers)
3038 return emit_note (file, line);
3041 /* Make an insn of code NOTE
3042 with data-fields specified by FILE and LINE
3043 and add it to the end of the doubly-linked list.
3044 If it is a line-number NOTE, omit it if it matches the previous one. */
3047 emit_note (file, line)
3055 if (file && last_filename && !strcmp (file, last_filename)
3056 && line == last_linenum)
3058 last_filename = file;
3059 last_linenum = line;
3062 if (no_line_numbers && line > 0)
3068 note = rtx_alloc (NOTE);
3069 INSN_UID (note) = cur_insn_uid++;
3070 NOTE_SOURCE_FILE (note) = file;
3071 NOTE_LINE_NUMBER (note) = line;
3076 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3079 emit_line_note_force (file, line)
3084 return emit_line_note (file, line);
3087 /* Cause next statement to emit a line note even if the line number
3088 has not changed. This is used at the beginning of a function. */
3091 force_next_line_note ()
3096 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3097 note of this type already exists, remove it first. */
3100 set_unique_reg_note (insn, kind, datum)
3105 rtx note = find_reg_note (insn, kind, NULL_RTX);
3107 /* First remove the note if there already is one. */
3109 remove_note (insn, note);
3111 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3114 /* Return an indication of which type of insn should have X as a body.
3115 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3121 if (GET_CODE (x) == CODE_LABEL)
3123 if (GET_CODE (x) == CALL)
3125 if (GET_CODE (x) == RETURN)
3127 if (GET_CODE (x) == SET)
3129 if (SET_DEST (x) == pc_rtx)
3131 else if (GET_CODE (SET_SRC (x)) == CALL)
3136 if (GET_CODE (x) == PARALLEL)
3139 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3140 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3142 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3143 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3145 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3146 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3152 /* Emit the rtl pattern X as an appropriate kind of insn.
3153 If X is a label, it is simply added into the insn chain. */
3159 enum rtx_code code = classify_insn (x);
3161 if (code == CODE_LABEL)
3162 return emit_label (x);
3163 else if (code == INSN)
3164 return emit_insn (x);
3165 else if (code == JUMP_INSN)
3167 register rtx insn = emit_jump_insn (x);
3168 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3169 return emit_barrier ();
3172 else if (code == CALL_INSN)
3173 return emit_call_insn (x);
3178 /* Begin emitting insns to a sequence which can be packaged in an
3179 RTL_EXPR. If this sequence will contain something that might cause
3180 the compiler to pop arguments to function calls (because those
3181 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3182 details), use do_pending_stack_adjust before calling this function.
3183 That will ensure that the deferred pops are not accidentally
3184 emitted in the middel of this sequence. */
3189 struct sequence_stack *tem;
3191 if (sequence_element_free_list)
3193 /* Reuse a previously-saved struct sequence_stack. */
3194 tem = sequence_element_free_list;
3195 sequence_element_free_list = tem->next;
3198 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3200 tem->next = seq_stack;
3201 tem->first = first_insn;
3202 tem->last = last_insn;
3203 tem->sequence_rtl_expr = seq_rtl_expr;
3211 /* Similarly, but indicate that this sequence will be placed in T, an
3212 RTL_EXPR. See the documentation for start_sequence for more
3213 information about how to use this function. */
3216 start_sequence_for_rtl_expr (t)
3224 /* Set up the insn chain starting with FIRST as the current sequence,
3225 saving the previously current one. See the documentation for
3226 start_sequence for more information about how to use this function. */
3229 push_to_sequence (first)
3236 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3242 /* Set up the outer-level insn chain
3243 as the current sequence, saving the previously current one. */
3246 push_topmost_sequence ()
3248 struct sequence_stack *stack, *top = NULL;
3252 for (stack = seq_stack; stack; stack = stack->next)
3255 first_insn = top->first;
3256 last_insn = top->last;
3257 seq_rtl_expr = top->sequence_rtl_expr;
3260 /* After emitting to the outer-level insn chain, update the outer-level
3261 insn chain, and restore the previous saved state. */
3264 pop_topmost_sequence ()
3266 struct sequence_stack *stack, *top = NULL;
3268 for (stack = seq_stack; stack; stack = stack->next)
3271 top->first = first_insn;
3272 top->last = last_insn;
3273 /* ??? Why don't we save seq_rtl_expr here? */
3278 /* After emitting to a sequence, restore previous saved state.
3280 To get the contents of the sequence just made, you must call
3281 `gen_sequence' *before* calling here.
3283 If the compiler might have deferred popping arguments while
3284 generating this sequence, and this sequence will not be immediately
3285 inserted into the instruction stream, use do_pending_stack_adjust
3286 before calling gen_sequence. That will ensure that the deferred
3287 pops are inserted into this sequence, and not into some random
3288 location in the instruction stream. See INHIBIT_DEFER_POP for more
3289 information about deferred popping of arguments. */
3294 struct sequence_stack *tem = seq_stack;
3296 first_insn = tem->first;
3297 last_insn = tem->last;
3298 seq_rtl_expr = tem->sequence_rtl_expr;
3299 seq_stack = tem->next;
3301 tem->next = sequence_element_free_list;
3302 sequence_element_free_list = tem;
3305 /* Return 1 if currently emitting into a sequence. */
3310 return seq_stack != 0;
3313 /* Generate a SEQUENCE rtx containing the insns already emitted
3314 to the current sequence.
3316 This is how the gen_... function from a DEFINE_EXPAND
3317 constructs the SEQUENCE that it returns. */
3327 /* Count the insns in the chain. */
3329 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3332 /* If only one insn, return its pattern rather than a SEQUENCE.
3333 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3334 the case of an empty list.) */
3336 && ! RTX_FRAME_RELATED_P (first_insn)
3337 && (GET_CODE (first_insn) == INSN
3338 || GET_CODE (first_insn) == JUMP_INSN
3339 /* Don't discard the call usage field. */
3340 || (GET_CODE (first_insn) == CALL_INSN
3341 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3343 NEXT_INSN (first_insn) = free_insn;
3344 free_insn = first_insn;
3345 return PATTERN (first_insn);
3348 /* Put them in a vector. See if we already have a SEQUENCE of the
3349 appropriate length around. */
3350 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3351 sequence_result[len] = 0;
3354 /* Ensure that this rtl goes in saveable_obstack, since we may
3356 push_obstacks_nochange ();
3357 rtl_in_saveable_obstack ();
3358 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3362 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3363 XVECEXP (result, 0, i) = tem;
3368 /* Put the various virtual registers into REGNO_REG_RTX. */
3371 init_virtual_regs (es)
3372 struct emit_status *es;
3374 rtx *ptr = es->x_regno_reg_rtx;
3375 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3376 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3377 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3378 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3379 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3383 clear_emit_caches ()
3387 /* Clear the start_sequence/gen_sequence cache. */
3388 sequence_element_free_list = 0;
3389 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3390 sequence_result[i] = 0;
3394 /* Initialize data structures and variables in this file
3395 before generating rtl for each function. */
3400 struct function *f = current_function;
3402 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3405 seq_rtl_expr = NULL;
3407 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3410 first_label_num = label_num;
3414 clear_emit_caches ();
3416 /* Init the tables that describe all the pseudo regs. */
3418 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3420 f->emit->regno_pointer_flag
3421 = (char *) xmalloc (f->emit->regno_pointer_flag_length);
3422 bzero (f->emit->regno_pointer_flag, f->emit->regno_pointer_flag_length);
3424 f->emit->regno_pointer_align
3425 = (char *) xmalloc (f->emit->regno_pointer_flag_length);
3426 bzero (f->emit->regno_pointer_align, f->emit->regno_pointer_flag_length);
3429 = (rtx *) xmalloc (f->emit->regno_pointer_flag_length * sizeof (rtx));
3430 bzero ((char *) regno_reg_rtx,
3431 f->emit->regno_pointer_flag_length * sizeof (rtx));
3433 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3434 init_virtual_regs (f->emit);
3436 /* Indicate that the virtual registers and stack locations are
3438 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3439 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3440 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3441 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3443 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3444 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3445 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3446 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3447 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3449 #ifdef STACK_BOUNDARY
3450 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3451 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3452 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3453 = STACK_BOUNDARY / BITS_PER_UNIT;
3454 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3456 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3457 = STACK_BOUNDARY / BITS_PER_UNIT;
3458 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3459 = STACK_BOUNDARY / BITS_PER_UNIT;
3460 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3461 = STACK_BOUNDARY / BITS_PER_UNIT;
3462 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3463 = STACK_BOUNDARY / BITS_PER_UNIT;
3464 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
3467 #ifdef INIT_EXPANDERS
3472 /* Mark SS for GC. */
3475 mark_sequence_stack (ss)
3476 struct sequence_stack *ss;
3480 ggc_mark_rtx (ss->first);
3481 ggc_mark_tree (ss->sequence_rtl_expr);
3486 /* Mark ES for GC. */
3489 mark_emit_state (es)
3490 struct emit_status *es;
3498 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
3502 mark_sequence_stack (es->sequence_stack);
3503 ggc_mark_tree (es->sequence_rtl_expr);
3504 ggc_mark_rtx (es->x_first_insn);
3507 /* Create some permanent unique rtl objects shared between all functions.
3508 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3511 init_emit_once (line_numbers)
3515 enum machine_mode mode;
3516 enum machine_mode double_mode;
3518 no_line_numbers = ! line_numbers;
3520 /* Compute the word and byte modes. */
3522 byte_mode = VOIDmode;
3523 word_mode = VOIDmode;
3524 double_mode = VOIDmode;
3526 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3527 mode = GET_MODE_WIDER_MODE (mode))
3529 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3530 && byte_mode == VOIDmode)
3533 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3534 && word_mode == VOIDmode)
3538 #ifndef DOUBLE_TYPE_SIZE
3539 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3542 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3543 mode = GET_MODE_WIDER_MODE (mode))
3545 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3546 && double_mode == VOIDmode)
3550 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3552 /* Create the unique rtx's for certain rtx codes and operand values. */
3554 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3556 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3557 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3558 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3561 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3562 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3563 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3565 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3567 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3568 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3569 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3570 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3572 for (i = 0; i <= 2; i++)
3574 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3575 mode = GET_MODE_WIDER_MODE (mode))
3577 rtx tem = rtx_alloc (CONST_DOUBLE);
3578 union real_extract u;
3580 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3581 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3583 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3584 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3585 PUT_MODE (tem, mode);
3587 const_tiny_rtx[i][(int) mode] = tem;
3590 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3592 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3593 mode = GET_MODE_WIDER_MODE (mode))
3594 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3596 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3598 mode = GET_MODE_WIDER_MODE (mode))
3599 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3602 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
3603 if (GET_MODE_CLASS (mode) == MODE_CC)
3604 const_tiny_rtx[0][(int) mode] = const0_rtx;
3606 /* Assign register numbers to the globally defined register rtx.
3607 This must be done at runtime because the register number field
3608 is in a union and some compilers can't initialize unions. */
3610 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3611 PUT_MODE (stack_pointer_rtx, Pmode);
3612 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3613 PUT_MODE (frame_pointer_rtx, Pmode);
3614 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3615 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3616 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3618 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3619 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3620 PUT_MODE (arg_pointer_rtx, Pmode);
3623 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3624 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3625 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3626 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3627 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3628 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3629 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3630 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3631 REGNO (virtual_cfa_rtx) = VIRTUAL_CFA_REGNUM;
3632 PUT_MODE (virtual_cfa_rtx, Pmode);
3634 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3635 return_address_pointer_rtx
3636 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3640 struct_value_rtx = STRUCT_VALUE;
3642 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3645 #ifdef STRUCT_VALUE_INCOMING
3646 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3648 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3649 struct_value_incoming_rtx
3650 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3652 struct_value_incoming_rtx = struct_value_rtx;
3656 #ifdef STATIC_CHAIN_REGNUM
3657 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3659 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3660 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3661 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3664 static_chain_incoming_rtx = static_chain_rtx;
3668 static_chain_rtx = STATIC_CHAIN;
3670 #ifdef STATIC_CHAIN_INCOMING
3671 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3673 static_chain_incoming_rtx = static_chain_rtx;
3677 #ifdef PIC_OFFSET_TABLE_REGNUM
3678 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3681 #ifdef INIT_EXPANDERS
3682 /* This is to initialize save_machine_status and restore_machine_status before
3683 the first call to push_function_context_to. This is needed by the Chill
3684 front end which calls push_function_context_to before the first cal to
3685 init_function_start. */
3690 /* Query and clear/ restore no_line_numbers. This is used by the
3691 switch / case handling in stmt.c to give proper line numbers in
3692 warnings about unreachable code. */
3695 force_line_numbers ()
3697 int old = no_line_numbers;
3699 no_line_numbers = 0;
3701 force_next_line_note ();
3706 restore_line_number_status (old_value)
3709 no_line_numbers = old_value;