1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_last_label_num was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these are unique; no other rtx-object will be equal to any
92 rtx global_rtl[GR_MAX];
94 /* Commonly used RTL for hard registers. These objects are not necessarily
95 unique, so we allocate them separately from global_rtl. They are
96 initialized once per compilation unit, then copied into regno_reg_rtx
97 at the beginning of each function. */
98 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
100 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
101 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
102 record a copy of const[012]_rtx. */
104 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
108 REAL_VALUE_TYPE dconst0;
109 REAL_VALUE_TYPE dconst1;
110 REAL_VALUE_TYPE dconst2;
111 REAL_VALUE_TYPE dconst3;
112 REAL_VALUE_TYPE dconst10;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconstm2;
115 REAL_VALUE_TYPE dconsthalf;
116 REAL_VALUE_TYPE dconstthird;
117 REAL_VALUE_TYPE dconstpi;
118 REAL_VALUE_TYPE dconste;
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
157 htab_t const_int_htab;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
161 htab_t mem_attrs_htab;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
165 htab_t reg_attrs_htab;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_double_htab;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_location (cfun->emit->x_last_location)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw (rtx);
178 static rtx make_call_insn_raw (rtx);
179 static rtx find_line_note (rtx);
180 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
181 static void unshare_all_decls (tree);
182 static void reset_used_decls (tree);
183 static void mark_label_nuses (rtx);
184 static hashval_t const_int_htab_hash (const void *);
185 static int const_int_htab_eq (const void *, const void *);
186 static hashval_t const_double_htab_hash (const void *);
187 static int const_double_htab_eq (const void *, const void *);
188 static rtx lookup_const_double (rtx);
189 static hashval_t mem_attrs_htab_hash (const void *);
190 static int mem_attrs_htab_eq (const void *, const void *);
191 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
193 static hashval_t reg_attrs_htab_hash (const void *);
194 static int reg_attrs_htab_eq (const void *, const void *);
195 static reg_attrs *get_reg_attrs (tree, int);
196 static tree component_ref_for_mem_expr (tree);
197 static rtx gen_const_vector_0 (enum machine_mode);
198 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
199 static void copy_rtx_if_shared_1 (rtx *orig);
201 /* Probability of the conditional branch currently proceeded by try_split.
202 Set to -1 otherwise. */
203 int split_branch_probability = -1;
205 /* Returns a hash code for X (which is a really a CONST_INT). */
208 const_int_htab_hash (const void *x)
210 return (hashval_t) INTVAL ((rtx) x);
213 /* Returns nonzero if the value represented by X (which is really a
214 CONST_INT) is the same as that given by Y (which is really a
218 const_int_htab_eq (const void *x, const void *y)
220 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
223 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
225 const_double_htab_hash (const void *x)
230 if (GET_MODE (value) == VOIDmode)
231 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
234 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
235 /* MODE is used in the comparison, so it should be in the hash. */
236 h ^= GET_MODE (value);
241 /* Returns nonzero if the value represented by X (really a ...)
242 is the same as that represented by Y (really a ...) */
244 const_double_htab_eq (const void *x, const void *y)
246 rtx a = (rtx)x, b = (rtx)y;
248 if (GET_MODE (a) != GET_MODE (b))
250 if (GET_MODE (a) == VOIDmode)
251 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
252 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
254 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
255 CONST_DOUBLE_REAL_VALUE (b));
258 /* Returns a hash code for X (which is a really a mem_attrs *). */
261 mem_attrs_htab_hash (const void *x)
263 mem_attrs *p = (mem_attrs *) x;
265 return (p->alias ^ (p->align * 1000)
266 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
267 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
271 /* Returns nonzero if the value represented by X (which is really a
272 mem_attrs *) is the same as that given by Y (which is also really a
276 mem_attrs_htab_eq (const void *x, const void *y)
278 mem_attrs *p = (mem_attrs *) x;
279 mem_attrs *q = (mem_attrs *) y;
281 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
282 && p->size == q->size && p->align == q->align);
285 /* Allocate a new mem_attrs structure and insert it into the hash table if
286 one identical to it is not already in the table. We are doing this for
290 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
291 unsigned int align, enum machine_mode mode)
296 /* If everything is the default, we can just return zero.
297 This must match what the corresponding MEM_* macros return when the
298 field is not present. */
299 if (alias == 0 && expr == 0 && offset == 0
301 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
302 && (STRICT_ALIGNMENT && mode != BLKmode
303 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
308 attrs.offset = offset;
312 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
315 *slot = ggc_alloc (sizeof (mem_attrs));
316 memcpy (*slot, &attrs, sizeof (mem_attrs));
322 /* Returns a hash code for X (which is a really a reg_attrs *). */
325 reg_attrs_htab_hash (const void *x)
327 reg_attrs *p = (reg_attrs *) x;
329 return ((p->offset * 1000) ^ (long) p->decl);
332 /* Returns nonzero if the value represented by X (which is really a
333 reg_attrs *) is the same as that given by Y (which is also really a
337 reg_attrs_htab_eq (const void *x, const void *y)
339 reg_attrs *p = (reg_attrs *) x;
340 reg_attrs *q = (reg_attrs *) y;
342 return (p->decl == q->decl && p->offset == q->offset);
344 /* Allocate a new reg_attrs structure and insert it into the hash table if
345 one identical to it is not already in the table. We are doing this for
349 get_reg_attrs (tree decl, int offset)
354 /* If everything is the default, we can just return zero. */
355 if (decl == 0 && offset == 0)
359 attrs.offset = offset;
361 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
364 *slot = ggc_alloc (sizeof (reg_attrs));
365 memcpy (*slot, &attrs, sizeof (reg_attrs));
371 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
372 don't attempt to share with the various global pieces of rtl (such as
373 frame_pointer_rtx). */
376 gen_raw_REG (enum machine_mode mode, int regno)
378 rtx x = gen_rtx_raw_REG (mode, regno);
379 ORIGINAL_REGNO (x) = regno;
383 /* There are some RTL codes that require special attention; the generation
384 functions do the raw handling. If you add to this list, modify
385 special_rtx in gengenrtl.c as well. */
388 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
392 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
393 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
395 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
396 if (const_true_rtx && arg == STORE_FLAG_VALUE)
397 return const_true_rtx;
400 /* Look up the CONST_INT in the hash table. */
401 slot = htab_find_slot_with_hash (const_int_htab, &arg,
402 (hashval_t) arg, INSERT);
404 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
410 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
412 return GEN_INT (trunc_int_for_mode (c, mode));
415 /* CONST_DOUBLEs might be created from pairs of integers, or from
416 REAL_VALUE_TYPEs. Also, their length is known only at run time,
417 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
419 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
420 hash table. If so, return its counterpart; otherwise add it
421 to the hash table and return it. */
423 lookup_const_double (rtx real)
425 void **slot = htab_find_slot (const_double_htab, real, INSERT);
432 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
433 VALUE in mode MODE. */
435 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
437 rtx real = rtx_alloc (CONST_DOUBLE);
438 PUT_MODE (real, mode);
440 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
442 return lookup_const_double (real);
445 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
446 of ints: I0 is the low-order word and I1 is the high-order word.
447 Do not use this routine for non-integer modes; convert to
448 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
451 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
456 if (mode != VOIDmode)
460 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
461 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
462 /* We can get a 0 for an error mark. */
463 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
464 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
466 /* We clear out all bits that don't belong in MODE, unless they and
467 our sign bit are all one. So we get either a reasonable negative
468 value or a reasonable unsigned value for this mode. */
469 width = GET_MODE_BITSIZE (mode);
470 if (width < HOST_BITS_PER_WIDE_INT
471 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
472 != ((HOST_WIDE_INT) (-1) << (width - 1))))
473 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
474 else if (width == HOST_BITS_PER_WIDE_INT
475 && ! (i1 == ~0 && i0 < 0))
478 /* We should be able to represent this value as a constant. */
479 gcc_assert (width <= 2 * HOST_BITS_PER_WIDE_INT);
481 /* If this would be an entire word for the target, but is not for
482 the host, then sign-extend on the host so that the number will
483 look the same way on the host that it would on the target.
485 For example, when building a 64 bit alpha hosted 32 bit sparc
486 targeted compiler, then we want the 32 bit unsigned value -1 to be
487 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
488 The latter confuses the sparc backend. */
490 if (width < HOST_BITS_PER_WIDE_INT
491 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
492 i0 |= ((HOST_WIDE_INT) (-1) << width);
494 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
497 ??? Strictly speaking, this is wrong if we create a CONST_INT for
498 a large unsigned constant with the size of MODE being
499 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
500 in a wider mode. In that case we will mis-interpret it as a
503 Unfortunately, the only alternative is to make a CONST_DOUBLE for
504 any constant in any mode if it is an unsigned constant larger
505 than the maximum signed integer in an int on the host. However,
506 doing this will break everyone that always expects to see a
507 CONST_INT for SImode and smaller.
509 We have always been making CONST_INTs in this case, so nothing
510 new is being broken. */
512 if (width <= HOST_BITS_PER_WIDE_INT)
513 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
516 /* If this integer fits in one word, return a CONST_INT. */
517 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
520 /* We use VOIDmode for integers. */
521 value = rtx_alloc (CONST_DOUBLE);
522 PUT_MODE (value, VOIDmode);
524 CONST_DOUBLE_LOW (value) = i0;
525 CONST_DOUBLE_HIGH (value) = i1;
527 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
528 XWINT (value, i) = 0;
530 return lookup_const_double (value);
534 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
536 /* In case the MD file explicitly references the frame pointer, have
537 all such references point to the same frame pointer. This is
538 used during frame pointer elimination to distinguish the explicit
539 references to these registers from pseudos that happened to be
542 If we have eliminated the frame pointer or arg pointer, we will
543 be using it as a normal register, for example as a spill
544 register. In such cases, we might be accessing it in a mode that
545 is not Pmode and therefore cannot use the pre-allocated rtx.
547 Also don't do this when we are making new REGs in reload, since
548 we don't want to get confused with the real pointers. */
550 if (mode == Pmode && !reload_in_progress)
552 if (regno == FRAME_POINTER_REGNUM
553 && (!reload_completed || frame_pointer_needed))
554 return frame_pointer_rtx;
555 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
556 if (regno == HARD_FRAME_POINTER_REGNUM
557 && (!reload_completed || frame_pointer_needed))
558 return hard_frame_pointer_rtx;
560 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
561 if (regno == ARG_POINTER_REGNUM)
562 return arg_pointer_rtx;
564 #ifdef RETURN_ADDRESS_POINTER_REGNUM
565 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
566 return return_address_pointer_rtx;
568 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
569 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
570 return pic_offset_table_rtx;
571 if (regno == STACK_POINTER_REGNUM)
572 return stack_pointer_rtx;
576 /* If the per-function register table has been set up, try to re-use
577 an existing entry in that table to avoid useless generation of RTL.
579 This code is disabled for now until we can fix the various backends
580 which depend on having non-shared hard registers in some cases. Long
581 term we want to re-enable this code as it can significantly cut down
582 on the amount of useless RTL that gets generated.
584 We'll also need to fix some code that runs after reload that wants to
585 set ORIGINAL_REGNO. */
590 && regno < FIRST_PSEUDO_REGISTER
591 && reg_raw_mode[regno] == mode)
592 return regno_reg_rtx[regno];
595 return gen_raw_REG (mode, regno);
599 gen_rtx_MEM (enum machine_mode mode, rtx addr)
601 rtx rt = gen_rtx_raw_MEM (mode, addr);
603 /* This field is not cleared by the mere allocation of the rtx, so
610 /* Generate a memory referring to non-trapping constant memory. */
613 gen_const_mem (enum machine_mode mode, rtx addr)
615 rtx mem = gen_rtx_MEM (mode, addr);
616 MEM_READONLY_P (mem) = 1;
617 MEM_NOTRAP_P (mem) = 1;
622 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
624 /* This is the most common failure type.
625 Catch it early so we can see who does it. */
626 gcc_assert (!(offset % GET_MODE_SIZE (mode)));
628 /* This check isn't usable right now because combine will
629 throw arbitrary crap like a CALL into a SUBREG in
630 gen_lowpart_for_combine so we must just eat it. */
632 /* Check for this too. */
633 gcc_assert (offset < GET_MODE_SIZE (GET_MODE (reg)));
635 return gen_rtx_raw_SUBREG (mode, reg, offset);
638 /* Generate a SUBREG representing the least-significant part of REG if MODE
639 is smaller than mode of REG, otherwise paradoxical SUBREG. */
642 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
644 enum machine_mode inmode;
646 inmode = GET_MODE (reg);
647 if (inmode == VOIDmode)
649 return gen_rtx_SUBREG (mode, reg,
650 subreg_lowpart_offset (mode, inmode));
653 /* gen_rtvec (n, [rt1, ..., rtn])
655 ** This routine creates an rtvec and stores within it the
656 ** pointers to rtx's which are its arguments.
661 gen_rtvec (int n, ...)
670 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
672 vector = alloca (n * sizeof (rtx));
674 for (i = 0; i < n; i++)
675 vector[i] = va_arg (p, rtx);
677 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
681 return gen_rtvec_v (save_n, vector);
685 gen_rtvec_v (int n, rtx *argp)
691 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
693 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
695 for (i = 0; i < n; i++)
696 rt_val->elem[i] = *argp++;
701 /* Generate a REG rtx for a new pseudo register of mode MODE.
702 This pseudo is assigned the next sequential register number. */
705 gen_reg_rtx (enum machine_mode mode)
707 struct function *f = cfun;
710 /* Don't let anything called after initial flow analysis create new
712 gcc_assert (!no_new_pseudos);
714 if (generating_concat_p
715 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
716 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
718 /* For complex modes, don't make a single pseudo.
719 Instead, make a CONCAT of two pseudos.
720 This allows noncontiguous allocation of the real and imaginary parts,
721 which makes much better code. Besides, allocating DCmode
722 pseudos overstrains reload on some machines like the 386. */
723 rtx realpart, imagpart;
724 enum machine_mode partmode = GET_MODE_INNER (mode);
726 realpart = gen_reg_rtx (partmode);
727 imagpart = gen_reg_rtx (partmode);
728 return gen_rtx_CONCAT (mode, realpart, imagpart);
731 /* Make sure regno_pointer_align, and regno_reg_rtx are large
732 enough to have an element for this pseudo reg number. */
734 if (reg_rtx_no == f->emit->regno_pointer_align_length)
736 int old_size = f->emit->regno_pointer_align_length;
740 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
741 memset (new + old_size, 0, old_size);
742 f->emit->regno_pointer_align = (unsigned char *) new;
744 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
745 old_size * 2 * sizeof (rtx));
746 memset (new1 + old_size, 0, old_size * sizeof (rtx));
747 regno_reg_rtx = new1;
749 f->emit->regno_pointer_align_length = old_size * 2;
752 val = gen_raw_REG (mode, reg_rtx_no);
753 regno_reg_rtx[reg_rtx_no++] = val;
757 /* Generate a register with same attributes as REG, but offsetted by OFFSET.
758 Do the big endian correction if needed. */
761 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
763 rtx new = gen_rtx_REG (mode, regno);
765 HOST_WIDE_INT var_size;
767 /* PR middle-end/14084
768 The problem appears when a variable is stored in a larger register
769 and later it is used in the original mode or some mode in between
770 or some part of variable is accessed.
772 On little endian machines there is no problem because
773 the REG_OFFSET of the start of the variable is the same when
774 accessed in any mode (it is 0).
776 However, this is not true on big endian machines.
777 The offset of the start of the variable is different when accessed
779 When we are taking a part of the REG we have to change the OFFSET
780 from offset WRT size of mode of REG to offset WRT size of variable.
782 If we would not do the big endian correction the resulting REG_OFFSET
783 would be larger than the size of the DECL.
785 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
787 REG.mode MODE DECL size old offset new offset description
788 DI SI 4 4 0 int32 in SImode
789 DI SI 1 4 0 char in SImode
790 DI QI 1 7 0 char in QImode
791 DI QI 4 5 1 1st element in QImode
793 DI HI 4 6 2 1st element in HImode
796 If the size of DECL is equal or greater than the size of REG
797 we can't do this correction because the register holds the
798 whole variable or a part of the variable and thus the REG_OFFSET
799 is already correct. */
801 decl = REG_EXPR (reg);
802 if ((BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
805 && GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode)
806 && ((var_size = int_size_in_bytes (TREE_TYPE (decl))) > 0
807 && var_size < GET_MODE_SIZE (GET_MODE (reg))))
811 /* Convert machine endian to little endian WRT size of mode of REG. */
812 if (WORDS_BIG_ENDIAN)
813 offset_le = ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
814 / UNITS_PER_WORD) * UNITS_PER_WORD;
816 offset_le = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
818 if (BYTES_BIG_ENDIAN)
819 offset_le += ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
822 offset_le += offset % UNITS_PER_WORD;
824 if (offset_le >= var_size)
826 /* MODE is wider than the variable so the new reg will cover
827 the whole variable so the resulting OFFSET should be 0. */
832 /* Convert little endian to machine endian WRT size of variable. */
833 if (WORDS_BIG_ENDIAN)
834 offset = ((var_size - 1 - offset_le)
835 / UNITS_PER_WORD) * UNITS_PER_WORD;
837 offset = (offset_le / UNITS_PER_WORD) * UNITS_PER_WORD;
839 if (BYTES_BIG_ENDIAN)
840 offset += ((var_size - 1 - offset_le)
843 offset += offset_le % UNITS_PER_WORD;
847 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
848 REG_OFFSET (reg) + offset);
852 /* Set the decl for MEM to DECL. */
855 set_reg_attrs_from_mem (rtx reg, rtx mem)
857 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
859 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
862 /* Set the register attributes for registers contained in PARM_RTX.
863 Use needed values from memory attributes of MEM. */
866 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
868 if (REG_P (parm_rtx))
869 set_reg_attrs_from_mem (parm_rtx, mem);
870 else if (GET_CODE (parm_rtx) == PARALLEL)
872 /* Check for a NULL entry in the first slot, used to indicate that the
873 parameter goes both on the stack and in registers. */
874 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
875 for (; i < XVECLEN (parm_rtx, 0); i++)
877 rtx x = XVECEXP (parm_rtx, 0, i);
878 if (REG_P (XEXP (x, 0)))
879 REG_ATTRS (XEXP (x, 0))
880 = get_reg_attrs (MEM_EXPR (mem),
881 INTVAL (XEXP (x, 1)));
886 /* Assign the RTX X to declaration T. */
888 set_decl_rtl (tree t, rtx x)
890 DECL_CHECK (t)->decl.rtl = x;
894 /* For register, we maintain the reverse information too. */
896 REG_ATTRS (x) = get_reg_attrs (t, 0);
897 else if (GET_CODE (x) == SUBREG)
898 REG_ATTRS (SUBREG_REG (x))
899 = get_reg_attrs (t, -SUBREG_BYTE (x));
900 if (GET_CODE (x) == CONCAT)
902 if (REG_P (XEXP (x, 0)))
903 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
904 if (REG_P (XEXP (x, 1)))
905 REG_ATTRS (XEXP (x, 1))
906 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
908 if (GET_CODE (x) == PARALLEL)
911 for (i = 0; i < XVECLEN (x, 0); i++)
913 rtx y = XVECEXP (x, 0, i);
914 if (REG_P (XEXP (y, 0)))
915 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
920 /* Assign the RTX X to parameter declaration T. */
922 set_decl_incoming_rtl (tree t, rtx x)
924 DECL_INCOMING_RTL (t) = x;
928 /* For register, we maintain the reverse information too. */
930 REG_ATTRS (x) = get_reg_attrs (t, 0);
931 else if (GET_CODE (x) == SUBREG)
932 REG_ATTRS (SUBREG_REG (x))
933 = get_reg_attrs (t, -SUBREG_BYTE (x));
934 if (GET_CODE (x) == CONCAT)
936 if (REG_P (XEXP (x, 0)))
937 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
938 if (REG_P (XEXP (x, 1)))
939 REG_ATTRS (XEXP (x, 1))
940 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
942 if (GET_CODE (x) == PARALLEL)
946 /* Check for a NULL entry, used to indicate that the parameter goes
947 both on the stack and in registers. */
948 if (XEXP (XVECEXP (x, 0, 0), 0))
953 for (i = start; i < XVECLEN (x, 0); i++)
955 rtx y = XVECEXP (x, 0, i);
956 if (REG_P (XEXP (y, 0)))
957 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
962 /* Identify REG (which may be a CONCAT) as a user register. */
965 mark_user_reg (rtx reg)
967 if (GET_CODE (reg) == CONCAT)
969 REG_USERVAR_P (XEXP (reg, 0)) = 1;
970 REG_USERVAR_P (XEXP (reg, 1)) = 1;
974 gcc_assert (REG_P (reg));
975 REG_USERVAR_P (reg) = 1;
979 /* Identify REG as a probable pointer register and show its alignment
980 as ALIGN, if nonzero. */
983 mark_reg_pointer (rtx reg, int align)
985 if (! REG_POINTER (reg))
987 REG_POINTER (reg) = 1;
990 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
992 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
993 /* We can no-longer be sure just how aligned this pointer is. */
994 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
997 /* Return 1 plus largest pseudo reg number used in the current function. */
1005 /* Return 1 + the largest label number used so far in the current function. */
1008 max_label_num (void)
1010 if (last_label_num && label_num == base_label_num)
1011 return last_label_num;
1015 /* Return first label number used in this function (if any were used). */
1018 get_first_label_num (void)
1020 return first_label_num;
1023 /* If the rtx for label was created during the expansion of a nested
1024 function, then first_label_num won't include this label number.
1025 Fix this now so that array indicies work later. */
1028 maybe_set_first_label_num (rtx x)
1030 if (CODE_LABEL_NUMBER (x) < first_label_num)
1031 first_label_num = CODE_LABEL_NUMBER (x);
1034 /* Return the final regno of X, which is a SUBREG of a hard
1037 subreg_hard_regno (rtx x, int check_mode)
1039 enum machine_mode mode = GET_MODE (x);
1040 unsigned int byte_offset, base_regno, final_regno;
1041 rtx reg = SUBREG_REG (x);
1043 /* This is where we attempt to catch illegal subregs
1044 created by the compiler. */
1045 gcc_assert (GET_CODE (x) == SUBREG && REG_P (reg));
1046 base_regno = REGNO (reg);
1047 gcc_assert (base_regno < FIRST_PSEUDO_REGISTER);
1048 gcc_assert (!check_mode || HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)));
1049 #ifdef ENABLE_CHECKING
1050 gcc_assert (subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1051 SUBREG_BYTE (x), mode));
1053 /* Catch non-congruent offsets too. */
1054 byte_offset = SUBREG_BYTE (x);
1055 gcc_assert (!(byte_offset % GET_MODE_SIZE (mode)));
1057 final_regno = subreg_regno (x);
1062 /* Return a value representing some low-order bits of X, where the number
1063 of low-order bits is given by MODE. Note that no conversion is done
1064 between floating-point and fixed-point values, rather, the bit
1065 representation is returned.
1067 This function handles the cases in common between gen_lowpart, below,
1068 and two variants in cse.c and combine.c. These are the cases that can
1069 be safely handled at all points in the compilation.
1071 If this is not a case we can handle, return 0. */
1074 gen_lowpart_common (enum machine_mode mode, rtx x)
1076 int msize = GET_MODE_SIZE (mode);
1079 enum machine_mode innermode;
1081 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1082 so we have to make one up. Yuk. */
1083 innermode = GET_MODE (x);
1084 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
1085 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1086 else if (innermode == VOIDmode)
1087 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1089 xsize = GET_MODE_SIZE (innermode);
1091 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1093 if (innermode == mode)
1096 /* MODE must occupy no more words than the mode of X. */
1097 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1098 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1101 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1102 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1105 offset = subreg_lowpart_offset (mode, innermode);
1107 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1108 && (GET_MODE_CLASS (mode) == MODE_INT
1109 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1111 /* If we are getting the low-order part of something that has been
1112 sign- or zero-extended, we can either just use the object being
1113 extended or make a narrower extension. If we want an even smaller
1114 piece than the size of the object being extended, call ourselves
1117 This case is used mostly by combine and cse. */
1119 if (GET_MODE (XEXP (x, 0)) == mode)
1121 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1122 return gen_lowpart_common (mode, XEXP (x, 0));
1123 else if (msize < xsize)
1124 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1126 else if (GET_CODE (x) == SUBREG || REG_P (x)
1127 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1128 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1129 return simplify_gen_subreg (mode, x, innermode, offset);
1131 /* Otherwise, we can't do this. */
1135 /* Return the constant real or imaginary part (which has mode MODE)
1136 of a complex value X. The IMAGPART_P argument determines whether
1137 the real or complex component should be returned. This function
1138 returns NULL_RTX if the component isn't a constant. */
1141 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1146 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1148 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1149 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1151 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1152 if (TREE_CODE (part) == REAL_CST
1153 || TREE_CODE (part) == INTEGER_CST)
1154 return expand_expr (part, NULL_RTX, mode, 0);
1160 /* Return the real part (which has mode MODE) of a complex value X.
1161 This always comes at the low address in memory. */
1164 gen_realpart (enum machine_mode mode, rtx x)
1168 /* Handle complex constants. */
1169 part = gen_complex_constant_part (mode, x, 0);
1170 if (part != NULL_RTX)
1173 if (WORDS_BIG_ENDIAN
1174 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1176 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1178 ("can't access real part of complex value in hard register");
1179 else if (WORDS_BIG_ENDIAN)
1180 return gen_highpart (mode, x);
1182 return gen_lowpart (mode, x);
1185 /* Return the imaginary part (which has mode MODE) of a complex value X.
1186 This always comes at the high address in memory. */
1189 gen_imagpart (enum machine_mode mode, rtx x)
1193 /* Handle complex constants. */
1194 part = gen_complex_constant_part (mode, x, 1);
1195 if (part != NULL_RTX)
1198 if (WORDS_BIG_ENDIAN)
1199 return gen_lowpart (mode, x);
1200 else if (! WORDS_BIG_ENDIAN
1201 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1203 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1205 ("can't access imaginary part of complex value in hard register");
1207 return gen_highpart (mode, x);
1211 gen_highpart (enum machine_mode mode, rtx x)
1213 unsigned int msize = GET_MODE_SIZE (mode);
1216 /* This case loses if X is a subreg. To catch bugs early,
1217 complain if an invalid MODE is used even in other cases. */
1218 gcc_assert (msize <= UNITS_PER_WORD
1219 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1221 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1222 subreg_highpart_offset (mode, GET_MODE (x)));
1223 gcc_assert (result);
1225 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1226 the target if we have a MEM. gen_highpart must return a valid operand,
1227 emitting code if necessary to do so. */
1230 result = validize_mem (result);
1231 gcc_assert (result);
1237 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1238 be VOIDmode constant. */
1240 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1242 if (GET_MODE (exp) != VOIDmode)
1244 gcc_assert (GET_MODE (exp) == innermode);
1245 return gen_highpart (outermode, exp);
1247 return simplify_gen_subreg (outermode, exp, innermode,
1248 subreg_highpart_offset (outermode, innermode));
1251 /* Return offset in bytes to get OUTERMODE low part
1252 of the value in mode INNERMODE stored in memory in target format. */
1255 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1257 unsigned int offset = 0;
1258 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1262 if (WORDS_BIG_ENDIAN)
1263 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1264 if (BYTES_BIG_ENDIAN)
1265 offset += difference % UNITS_PER_WORD;
1271 /* Return offset in bytes to get OUTERMODE high part
1272 of the value in mode INNERMODE stored in memory in target format. */
1274 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1276 unsigned int offset = 0;
1277 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1279 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1283 if (! WORDS_BIG_ENDIAN)
1284 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1285 if (! BYTES_BIG_ENDIAN)
1286 offset += difference % UNITS_PER_WORD;
1292 /* Return 1 iff X, assumed to be a SUBREG,
1293 refers to the least significant part of its containing reg.
1294 If X is not a SUBREG, always return 1 (it is its own low part!). */
1297 subreg_lowpart_p (rtx x)
1299 if (GET_CODE (x) != SUBREG)
1301 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1304 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1305 == SUBREG_BYTE (x));
1308 /* Return subword OFFSET of operand OP.
1309 The word number, OFFSET, is interpreted as the word number starting
1310 at the low-order address. OFFSET 0 is the low-order word if not
1311 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1313 If we cannot extract the required word, we return zero. Otherwise,
1314 an rtx corresponding to the requested word will be returned.
1316 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1317 reload has completed, a valid address will always be returned. After
1318 reload, if a valid address cannot be returned, we return zero.
1320 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1321 it is the responsibility of the caller.
1323 MODE is the mode of OP in case it is a CONST_INT.
1325 ??? This is still rather broken for some cases. The problem for the
1326 moment is that all callers of this thing provide no 'goal mode' to
1327 tell us to work with. This exists because all callers were written
1328 in a word based SUBREG world.
1329 Now use of this function can be deprecated by simplify_subreg in most
1334 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1336 if (mode == VOIDmode)
1337 mode = GET_MODE (op);
1339 gcc_assert (mode != VOIDmode);
1341 /* If OP is narrower than a word, fail. */
1343 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1346 /* If we want a word outside OP, return zero. */
1348 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1351 /* Form a new MEM at the requested address. */
1354 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1356 if (! validate_address)
1359 else if (reload_completed)
1361 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1365 return replace_equiv_address (new, XEXP (new, 0));
1368 /* Rest can be handled by simplify_subreg. */
1369 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1372 /* Similar to `operand_subword', but never return 0. If we can't extract
1373 the required subword, put OP into a register and try again. If that fails,
1374 abort. We always validate the address in this case.
1376 MODE is the mode of OP, in case it is CONST_INT. */
1379 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1381 rtx result = operand_subword (op, offset, 1, mode);
1386 if (mode != BLKmode && mode != VOIDmode)
1388 /* If this is a register which can not be accessed by words, copy it
1389 to a pseudo register. */
1391 op = copy_to_reg (op);
1393 op = force_reg (mode, op);
1396 result = operand_subword (op, offset, 1, mode);
1397 gcc_assert (result);
1402 /* Given a compare instruction, swap the operands.
1403 A test instruction is changed into a compare of 0 against the operand. */
1406 reverse_comparison (rtx insn)
1408 rtx body = PATTERN (insn);
1411 if (GET_CODE (body) == SET)
1412 comp = SET_SRC (body);
1414 comp = SET_SRC (XVECEXP (body, 0, 0));
1416 if (GET_CODE (comp) == COMPARE)
1418 rtx op0 = XEXP (comp, 0);
1419 rtx op1 = XEXP (comp, 1);
1420 XEXP (comp, 0) = op1;
1421 XEXP (comp, 1) = op0;
1425 rtx new = gen_rtx_COMPARE (VOIDmode,
1426 CONST0_RTX (GET_MODE (comp)), comp);
1427 if (GET_CODE (body) == SET)
1428 SET_SRC (body) = new;
1430 SET_SRC (XVECEXP (body, 0, 0)) = new;
1434 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1435 or (2) a component ref of something variable. Represent the later with
1436 a NULL expression. */
1439 component_ref_for_mem_expr (tree ref)
1441 tree inner = TREE_OPERAND (ref, 0);
1443 if (TREE_CODE (inner) == COMPONENT_REF)
1444 inner = component_ref_for_mem_expr (inner);
1447 /* Now remove any conversions: they don't change what the underlying
1448 object is. Likewise for SAVE_EXPR. */
1449 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1450 || TREE_CODE (inner) == NON_LVALUE_EXPR
1451 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1452 || TREE_CODE (inner) == SAVE_EXPR)
1453 inner = TREE_OPERAND (inner, 0);
1455 if (! DECL_P (inner))
1459 if (inner == TREE_OPERAND (ref, 0))
1462 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1463 TREE_OPERAND (ref, 1), NULL_TREE);
1466 /* Returns 1 if both MEM_EXPR can be considered equal
1470 mem_expr_equal_p (tree expr1, tree expr2)
1475 if (! expr1 || ! expr2)
1478 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1481 if (TREE_CODE (expr1) == COMPONENT_REF)
1483 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1484 TREE_OPERAND (expr2, 0))
1485 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1486 TREE_OPERAND (expr2, 1));
1488 if (TREE_CODE (expr1) == INDIRECT_REF)
1489 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1490 TREE_OPERAND (expr2, 0));
1492 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1493 have been resolved here. */
1494 gcc_assert (DECL_P (expr1));
1496 /* Decls with different pointers can't be equal. */
1500 /* Given REF, a MEM, and T, either the type of X or the expression
1501 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1502 if we are making a new object of this type. BITPOS is nonzero if
1503 there is an offset outstanding on T that will be applied later. */
1506 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1507 HOST_WIDE_INT bitpos)
1509 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1510 tree expr = MEM_EXPR (ref);
1511 rtx offset = MEM_OFFSET (ref);
1512 rtx size = MEM_SIZE (ref);
1513 unsigned int align = MEM_ALIGN (ref);
1514 HOST_WIDE_INT apply_bitpos = 0;
1517 /* It can happen that type_for_mode was given a mode for which there
1518 is no language-level type. In which case it returns NULL, which
1523 type = TYPE_P (t) ? t : TREE_TYPE (t);
1524 if (type == error_mark_node)
1527 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1528 wrong answer, as it assumes that DECL_RTL already has the right alias
1529 info. Callers should not set DECL_RTL until after the call to
1530 set_mem_attributes. */
1531 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1533 /* Get the alias set from the expression or type (perhaps using a
1534 front-end routine) and use it. */
1535 alias = get_alias_set (t);
1537 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1538 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1539 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1540 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (t);
1542 /* If we are making an object of this type, or if this is a DECL, we know
1543 that it is a scalar if the type is not an aggregate. */
1544 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1545 MEM_SCALAR_P (ref) = 1;
1547 /* We can set the alignment from the type if we are making an object,
1548 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1549 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1550 align = MAX (align, TYPE_ALIGN (type));
1552 /* If the size is known, we can set that. */
1553 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1554 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1556 /* If T is not a type, we may be able to deduce some more information about
1560 tree base = get_base_address (t);
1561 if (base && DECL_P (base)
1562 && TREE_READONLY (base)
1563 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1564 MEM_READONLY_P (ref) = 1;
1566 if (TREE_THIS_VOLATILE (t))
1567 MEM_VOLATILE_P (ref) = 1;
1569 /* Now remove any conversions: they don't change what the underlying
1570 object is. Likewise for SAVE_EXPR. */
1571 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1572 || TREE_CODE (t) == NON_LVALUE_EXPR
1573 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1574 || TREE_CODE (t) == SAVE_EXPR)
1575 t = TREE_OPERAND (t, 0);
1577 /* If this expression can't be addressed (e.g., it contains a reference
1578 to a non-addressable field), show we don't change its alias set. */
1579 if (! can_address_p (t))
1580 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1582 /* If this is a decl, set the attributes of the MEM from it. */
1586 offset = const0_rtx;
1587 apply_bitpos = bitpos;
1588 size = (DECL_SIZE_UNIT (t)
1589 && host_integerp (DECL_SIZE_UNIT (t), 1)
1590 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1591 align = DECL_ALIGN (t);
1594 /* If this is a constant, we know the alignment. */
1595 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1597 align = TYPE_ALIGN (type);
1598 #ifdef CONSTANT_ALIGNMENT
1599 align = CONSTANT_ALIGNMENT (t, align);
1603 /* If this is a field reference and not a bit-field, record it. */
1604 /* ??? There is some information that can be gleened from bit-fields,
1605 such as the word offset in the structure that might be modified.
1606 But skip it for now. */
1607 else if (TREE_CODE (t) == COMPONENT_REF
1608 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1610 expr = component_ref_for_mem_expr (t);
1611 offset = const0_rtx;
1612 apply_bitpos = bitpos;
1613 /* ??? Any reason the field size would be different than
1614 the size we got from the type? */
1617 /* If this is an array reference, look for an outer field reference. */
1618 else if (TREE_CODE (t) == ARRAY_REF)
1620 tree off_tree = size_zero_node;
1621 /* We can't modify t, because we use it at the end of the
1627 tree index = TREE_OPERAND (t2, 1);
1628 tree low_bound = array_ref_low_bound (t2);
1629 tree unit_size = array_ref_element_size (t2);
1631 /* We assume all arrays have sizes that are a multiple of a byte.
1632 First subtract the lower bound, if any, in the type of the
1633 index, then convert to sizetype and multiply by the size of
1634 the array element. */
1635 if (! integer_zerop (low_bound))
1636 index = fold (build2 (MINUS_EXPR, TREE_TYPE (index),
1639 off_tree = size_binop (PLUS_EXPR,
1640 size_binop (MULT_EXPR, convert (sizetype,
1644 t2 = TREE_OPERAND (t2, 0);
1646 while (TREE_CODE (t2) == ARRAY_REF);
1652 if (host_integerp (off_tree, 1))
1654 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1655 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1656 align = DECL_ALIGN (t2);
1657 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1659 offset = GEN_INT (ioff);
1660 apply_bitpos = bitpos;
1663 else if (TREE_CODE (t2) == COMPONENT_REF)
1665 expr = component_ref_for_mem_expr (t2);
1666 if (host_integerp (off_tree, 1))
1668 offset = GEN_INT (tree_low_cst (off_tree, 1));
1669 apply_bitpos = bitpos;
1671 /* ??? Any reason the field size would be different than
1672 the size we got from the type? */
1674 else if (flag_argument_noalias > 1
1675 && TREE_CODE (t2) == INDIRECT_REF
1676 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1683 /* If this is a Fortran indirect argument reference, record the
1685 else if (flag_argument_noalias > 1
1686 && TREE_CODE (t) == INDIRECT_REF
1687 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1694 /* If we modified OFFSET based on T, then subtract the outstanding
1695 bit position offset. Similarly, increase the size of the accessed
1696 object to contain the negative offset. */
1699 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1701 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1704 /* Now set the attributes we computed above. */
1706 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1708 /* If this is already known to be a scalar or aggregate, we are done. */
1709 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1712 /* If it is a reference into an aggregate, this is part of an aggregate.
1713 Otherwise we don't know. */
1714 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1715 || TREE_CODE (t) == ARRAY_RANGE_REF
1716 || TREE_CODE (t) == BIT_FIELD_REF)
1717 MEM_IN_STRUCT_P (ref) = 1;
1721 set_mem_attributes (rtx ref, tree t, int objectp)
1723 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1726 /* Set the decl for MEM to DECL. */
1729 set_mem_attrs_from_reg (rtx mem, rtx reg)
1732 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1733 GEN_INT (REG_OFFSET (reg)),
1734 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1737 /* Set the alias set of MEM to SET. */
1740 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1742 #ifdef ENABLE_CHECKING
1743 /* If the new and old alias sets don't conflict, something is wrong. */
1744 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1747 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1748 MEM_SIZE (mem), MEM_ALIGN (mem),
1752 /* Set the alignment of MEM to ALIGN bits. */
1755 set_mem_align (rtx mem, unsigned int align)
1757 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1758 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1762 /* Set the expr for MEM to EXPR. */
1765 set_mem_expr (rtx mem, tree expr)
1768 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1769 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1772 /* Set the offset of MEM to OFFSET. */
1775 set_mem_offset (rtx mem, rtx offset)
1777 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1778 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1782 /* Set the size of MEM to SIZE. */
1785 set_mem_size (rtx mem, rtx size)
1787 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1788 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1792 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1793 and its address changed to ADDR. (VOIDmode means don't change the mode.
1794 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1795 returned memory location is required to be valid. The memory
1796 attributes are not changed. */
1799 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1803 gcc_assert (MEM_P (memref));
1804 if (mode == VOIDmode)
1805 mode = GET_MODE (memref);
1807 addr = XEXP (memref, 0);
1808 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1809 && (!validate || memory_address_p (mode, addr)))
1814 if (reload_in_progress || reload_completed)
1815 gcc_assert (memory_address_p (mode, addr));
1817 addr = memory_address (mode, addr);
1820 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1823 new = gen_rtx_MEM (mode, addr);
1824 MEM_COPY_ATTRIBUTES (new, memref);
1828 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1829 way we are changing MEMREF, so we only preserve the alias set. */
1832 change_address (rtx memref, enum machine_mode mode, rtx addr)
1834 rtx new = change_address_1 (memref, mode, addr, 1), size;
1835 enum machine_mode mmode = GET_MODE (new);
1838 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1839 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1841 /* If there are no changes, just return the original memory reference. */
1844 if (MEM_ATTRS (memref) == 0
1845 || (MEM_EXPR (memref) == NULL
1846 && MEM_OFFSET (memref) == NULL
1847 && MEM_SIZE (memref) == size
1848 && MEM_ALIGN (memref) == align))
1851 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1852 MEM_COPY_ATTRIBUTES (new, memref);
1856 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1861 /* Return a memory reference like MEMREF, but with its mode changed
1862 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1863 nonzero, the memory address is forced to be valid.
1864 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1865 and caller is responsible for adjusting MEMREF base register. */
1868 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1869 int validate, int adjust)
1871 rtx addr = XEXP (memref, 0);
1873 rtx memoffset = MEM_OFFSET (memref);
1875 unsigned int memalign = MEM_ALIGN (memref);
1877 /* If there are no changes, just return the original memory reference. */
1878 if (mode == GET_MODE (memref) && !offset
1879 && (!validate || memory_address_p (mode, addr)))
1882 /* ??? Prefer to create garbage instead of creating shared rtl.
1883 This may happen even if offset is nonzero -- consider
1884 (plus (plus reg reg) const_int) -- so do this always. */
1885 addr = copy_rtx (addr);
1889 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1890 object, we can merge it into the LO_SUM. */
1891 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1893 && (unsigned HOST_WIDE_INT) offset
1894 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1895 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1896 plus_constant (XEXP (addr, 1), offset));
1898 addr = plus_constant (addr, offset);
1901 new = change_address_1 (memref, mode, addr, validate);
1903 /* Compute the new values of the memory attributes due to this adjustment.
1904 We add the offsets and update the alignment. */
1906 memoffset = GEN_INT (offset + INTVAL (memoffset));
1908 /* Compute the new alignment by taking the MIN of the alignment and the
1909 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1914 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1916 /* We can compute the size in a number of ways. */
1917 if (GET_MODE (new) != BLKmode)
1918 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1919 else if (MEM_SIZE (memref))
1920 size = plus_constant (MEM_SIZE (memref), -offset);
1922 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1923 memoffset, size, memalign, GET_MODE (new));
1925 /* At some point, we should validate that this offset is within the object,
1926 if all the appropriate values are known. */
1930 /* Return a memory reference like MEMREF, but with its mode changed
1931 to MODE and its address changed to ADDR, which is assumed to be
1932 MEMREF offseted by OFFSET bytes. If VALIDATE is
1933 nonzero, the memory address is forced to be valid. */
1936 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1937 HOST_WIDE_INT offset, int validate)
1939 memref = change_address_1 (memref, VOIDmode, addr, validate);
1940 return adjust_address_1 (memref, mode, offset, validate, 0);
1943 /* Return a memory reference like MEMREF, but whose address is changed by
1944 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1945 known to be in OFFSET (possibly 1). */
1948 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1950 rtx new, addr = XEXP (memref, 0);
1952 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1954 /* At this point we don't know _why_ the address is invalid. It
1955 could have secondary memory references, multiplies or anything.
1957 However, if we did go and rearrange things, we can wind up not
1958 being able to recognize the magic around pic_offset_table_rtx.
1959 This stuff is fragile, and is yet another example of why it is
1960 bad to expose PIC machinery too early. */
1961 if (! memory_address_p (GET_MODE (memref), new)
1962 && GET_CODE (addr) == PLUS
1963 && XEXP (addr, 0) == pic_offset_table_rtx)
1965 addr = force_reg (GET_MODE (addr), addr);
1966 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1969 update_temp_slot_address (XEXP (memref, 0), new);
1970 new = change_address_1 (memref, VOIDmode, new, 1);
1972 /* If there are no changes, just return the original memory reference. */
1976 /* Update the alignment to reflect the offset. Reset the offset, which
1979 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1980 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1985 /* Return a memory reference like MEMREF, but with its address changed to
1986 ADDR. The caller is asserting that the actual piece of memory pointed
1987 to is the same, just the form of the address is being changed, such as
1988 by putting something into a register. */
1991 replace_equiv_address (rtx memref, rtx addr)
1993 /* change_address_1 copies the memory attribute structure without change
1994 and that's exactly what we want here. */
1995 update_temp_slot_address (XEXP (memref, 0), addr);
1996 return change_address_1 (memref, VOIDmode, addr, 1);
1999 /* Likewise, but the reference is not required to be valid. */
2002 replace_equiv_address_nv (rtx memref, rtx addr)
2004 return change_address_1 (memref, VOIDmode, addr, 0);
2007 /* Return a memory reference like MEMREF, but with its mode widened to
2008 MODE and offset by OFFSET. This would be used by targets that e.g.
2009 cannot issue QImode memory operations and have to use SImode memory
2010 operations plus masking logic. */
2013 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2015 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2016 tree expr = MEM_EXPR (new);
2017 rtx memoffset = MEM_OFFSET (new);
2018 unsigned int size = GET_MODE_SIZE (mode);
2020 /* If there are no changes, just return the original memory reference. */
2024 /* If we don't know what offset we were at within the expression, then
2025 we can't know if we've overstepped the bounds. */
2031 if (TREE_CODE (expr) == COMPONENT_REF)
2033 tree field = TREE_OPERAND (expr, 1);
2034 tree offset = component_ref_field_offset (expr);
2036 if (! DECL_SIZE_UNIT (field))
2042 /* Is the field at least as large as the access? If so, ok,
2043 otherwise strip back to the containing structure. */
2044 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2045 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2046 && INTVAL (memoffset) >= 0)
2049 if (! host_integerp (offset, 1))
2055 expr = TREE_OPERAND (expr, 0);
2057 = (GEN_INT (INTVAL (memoffset)
2058 + tree_low_cst (offset, 1)
2059 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2062 /* Similarly for the decl. */
2063 else if (DECL_P (expr)
2064 && DECL_SIZE_UNIT (expr)
2065 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2066 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2067 && (! memoffset || INTVAL (memoffset) >= 0))
2071 /* The widened memory access overflows the expression, which means
2072 that it could alias another expression. Zap it. */
2079 memoffset = NULL_RTX;
2081 /* The widened memory may alias other stuff, so zap the alias set. */
2082 /* ??? Maybe use get_alias_set on any remaining expression. */
2084 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2085 MEM_ALIGN (new), mode);
2090 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2093 gen_label_rtx (void)
2095 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2096 NULL, label_num++, NULL);
2099 /* For procedure integration. */
2101 /* Install new pointers to the first and last insns in the chain.
2102 Also, set cur_insn_uid to one higher than the last in use.
2103 Used for an inline-procedure after copying the insn chain. */
2106 set_new_first_and_last_insn (rtx first, rtx last)
2114 for (insn = first; insn; insn = NEXT_INSN (insn))
2115 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2120 /* Set the last label number found in the current function.
2121 This is used when belatedly compiling an inline function. */
2124 set_new_last_label_num (int last)
2126 base_label_num = label_num;
2127 last_label_num = last;
2130 /* Restore all variables describing the current status from the structure *P.
2131 This is used after a nested function. */
2134 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2139 /* Go through all the RTL insn bodies and copy any invalid shared
2140 structure. This routine should only be called once. */
2143 unshare_all_rtl_1 (tree fndecl, rtx insn)
2147 /* Make sure that virtual parameters are not shared. */
2148 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2149 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2151 /* Make sure that virtual stack slots are not shared. */
2152 unshare_all_decls (DECL_INITIAL (fndecl));
2154 /* Unshare just about everything else. */
2155 unshare_all_rtl_in_chain (insn);
2157 /* Make sure the addresses of stack slots found outside the insn chain
2158 (such as, in DECL_RTL of a variable) are not shared
2159 with the insn chain.
2161 This special care is necessary when the stack slot MEM does not
2162 actually appear in the insn chain. If it does appear, its address
2163 is unshared from all else at that point. */
2164 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2167 /* Go through all the RTL insn bodies and copy any invalid shared
2168 structure, again. This is a fairly expensive thing to do so it
2169 should be done sparingly. */
2172 unshare_all_rtl_again (rtx insn)
2177 for (p = insn; p; p = NEXT_INSN (p))
2180 reset_used_flags (PATTERN (p));
2181 reset_used_flags (REG_NOTES (p));
2182 reset_used_flags (LOG_LINKS (p));
2185 /* Make sure that virtual stack slots are not shared. */
2186 reset_used_decls (DECL_INITIAL (cfun->decl));
2188 /* Make sure that virtual parameters are not shared. */
2189 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2190 reset_used_flags (DECL_RTL (decl));
2192 reset_used_flags (stack_slot_list);
2194 unshare_all_rtl_1 (cfun->decl, insn);
2198 unshare_all_rtl (void)
2200 unshare_all_rtl_1 (current_function_decl, get_insns ());
2203 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2204 Recursively does the same for subexpressions. */
2207 verify_rtx_sharing (rtx orig, rtx insn)
2212 const char *format_ptr;
2217 code = GET_CODE (x);
2219 /* These types may be freely shared. */
2234 /* SCRATCH must be shared because they represent distinct values. */
2236 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2241 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2242 a LABEL_REF, it isn't sharable. */
2243 if (GET_CODE (XEXP (x, 0)) == PLUS
2244 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2245 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2250 /* A MEM is allowed to be shared if its address is constant. */
2251 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2252 || reload_completed || reload_in_progress)
2261 /* This rtx may not be shared. If it has already been seen,
2262 replace it with a copy of itself. */
2264 if (RTX_FLAG (x, used))
2266 error ("Invalid rtl sharing found in the insn");
2268 error ("Shared rtx");
2270 fatal_error ("Internal consistency failure");
2272 RTX_FLAG (x, used) = 1;
2274 /* Now scan the subexpressions recursively. */
2276 format_ptr = GET_RTX_FORMAT (code);
2278 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2280 switch (*format_ptr++)
2283 verify_rtx_sharing (XEXP (x, i), insn);
2287 if (XVEC (x, i) != NULL)
2290 int len = XVECLEN (x, i);
2292 for (j = 0; j < len; j++)
2294 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2295 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2296 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2297 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2299 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2308 /* Go through all the RTL insn bodies and check that there is no unexpected
2309 sharing in between the subexpressions. */
2312 verify_rtl_sharing (void)
2316 for (p = get_insns (); p; p = NEXT_INSN (p))
2319 reset_used_flags (PATTERN (p));
2320 reset_used_flags (REG_NOTES (p));
2321 reset_used_flags (LOG_LINKS (p));
2324 for (p = get_insns (); p; p = NEXT_INSN (p))
2327 verify_rtx_sharing (PATTERN (p), p);
2328 verify_rtx_sharing (REG_NOTES (p), p);
2329 verify_rtx_sharing (LOG_LINKS (p), p);
2333 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2334 Assumes the mark bits are cleared at entry. */
2337 unshare_all_rtl_in_chain (rtx insn)
2339 for (; insn; insn = NEXT_INSN (insn))
2342 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2343 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2344 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2348 /* Go through all virtual stack slots of a function and copy any
2349 shared structure. */
2351 unshare_all_decls (tree blk)
2355 /* Copy shared decls. */
2356 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2357 if (DECL_RTL_SET_P (t))
2358 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2360 /* Now process sub-blocks. */
2361 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2362 unshare_all_decls (t);
2365 /* Go through all virtual stack slots of a function and mark them as
2368 reset_used_decls (tree blk)
2373 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2374 if (DECL_RTL_SET_P (t))
2375 reset_used_flags (DECL_RTL (t));
2377 /* Now process sub-blocks. */
2378 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2379 reset_used_decls (t);
2382 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2383 placed in the result directly, rather than being copied. MAY_SHARE is
2384 either a MEM of an EXPR_LIST of MEMs. */
2387 copy_most_rtx (rtx orig, rtx may_share)
2392 const char *format_ptr;
2394 if (orig == may_share
2395 || (GET_CODE (may_share) == EXPR_LIST
2396 && in_expr_list_p (may_share, orig)))
2399 code = GET_CODE (orig);
2416 copy = rtx_alloc (code);
2417 PUT_MODE (copy, GET_MODE (orig));
2418 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2419 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2420 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2421 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2422 RTX_FLAG (copy, return_val) = RTX_FLAG (orig, return_val);
2424 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2426 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2428 switch (*format_ptr++)
2431 XEXP (copy, i) = XEXP (orig, i);
2432 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2433 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2437 XEXP (copy, i) = XEXP (orig, i);
2442 XVEC (copy, i) = XVEC (orig, i);
2443 if (XVEC (orig, i) != NULL)
2445 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2446 for (j = 0; j < XVECLEN (copy, i); j++)
2447 XVECEXP (copy, i, j)
2448 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2453 XWINT (copy, i) = XWINT (orig, i);
2458 XINT (copy, i) = XINT (orig, i);
2462 XTREE (copy, i) = XTREE (orig, i);
2467 XSTR (copy, i) = XSTR (orig, i);
2471 X0ANY (copy, i) = X0ANY (orig, i);
2481 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2482 Recursively does the same for subexpressions. Uses
2483 copy_rtx_if_shared_1 to reduce stack space. */
2486 copy_rtx_if_shared (rtx orig)
2488 copy_rtx_if_shared_1 (&orig);
2492 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2493 use. Recursively does the same for subexpressions. */
2496 copy_rtx_if_shared_1 (rtx *orig1)
2502 const char *format_ptr;
2506 /* Repeat is used to turn tail-recursion into iteration. */
2513 code = GET_CODE (x);
2515 /* These types may be freely shared. */
2529 /* SCRATCH must be shared because they represent distinct values. */
2532 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2537 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2538 a LABEL_REF, it isn't sharable. */
2539 if (GET_CODE (XEXP (x, 0)) == PLUS
2540 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2541 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2550 /* The chain of insns is not being copied. */
2557 /* This rtx may not be shared. If it has already been seen,
2558 replace it with a copy of itself. */
2560 if (RTX_FLAG (x, used))
2564 copy = rtx_alloc (code);
2565 memcpy (copy, x, RTX_SIZE (code));
2569 RTX_FLAG (x, used) = 1;
2571 /* Now scan the subexpressions recursively.
2572 We can store any replaced subexpressions directly into X
2573 since we know X is not shared! Any vectors in X
2574 must be copied if X was copied. */
2576 format_ptr = GET_RTX_FORMAT (code);
2577 length = GET_RTX_LENGTH (code);
2580 for (i = 0; i < length; i++)
2582 switch (*format_ptr++)
2586 copy_rtx_if_shared_1 (last_ptr);
2587 last_ptr = &XEXP (x, i);
2591 if (XVEC (x, i) != NULL)
2594 int len = XVECLEN (x, i);
2596 /* Copy the vector iff I copied the rtx and the length
2598 if (copied && len > 0)
2599 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2601 /* Call recursively on all inside the vector. */
2602 for (j = 0; j < len; j++)
2605 copy_rtx_if_shared_1 (last_ptr);
2606 last_ptr = &XVECEXP (x, i, j);
2621 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2622 to look for shared sub-parts. */
2625 reset_used_flags (rtx x)
2629 const char *format_ptr;
2632 /* Repeat is used to turn tail-recursion into iteration. */
2637 code = GET_CODE (x);
2639 /* These types may be freely shared so we needn't do any resetting
2660 /* The chain of insns is not being copied. */
2667 RTX_FLAG (x, used) = 0;
2669 format_ptr = GET_RTX_FORMAT (code);
2670 length = GET_RTX_LENGTH (code);
2672 for (i = 0; i < length; i++)
2674 switch (*format_ptr++)
2682 reset_used_flags (XEXP (x, i));
2686 for (j = 0; j < XVECLEN (x, i); j++)
2687 reset_used_flags (XVECEXP (x, i, j));
2693 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2694 to look for shared sub-parts. */
2697 set_used_flags (rtx x)
2701 const char *format_ptr;
2706 code = GET_CODE (x);
2708 /* These types may be freely shared so we needn't do any resetting
2729 /* The chain of insns is not being copied. */
2736 RTX_FLAG (x, used) = 1;
2738 format_ptr = GET_RTX_FORMAT (code);
2739 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2741 switch (*format_ptr++)
2744 set_used_flags (XEXP (x, i));
2748 for (j = 0; j < XVECLEN (x, i); j++)
2749 set_used_flags (XVECEXP (x, i, j));
2755 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2756 Return X or the rtx for the pseudo reg the value of X was copied into.
2757 OTHER must be valid as a SET_DEST. */
2760 make_safe_from (rtx x, rtx other)
2763 switch (GET_CODE (other))
2766 other = SUBREG_REG (other);
2768 case STRICT_LOW_PART:
2771 other = XEXP (other, 0);
2780 && GET_CODE (x) != SUBREG)
2782 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2783 || reg_mentioned_p (other, x))))
2785 rtx temp = gen_reg_rtx (GET_MODE (x));
2786 emit_move_insn (temp, x);
2792 /* Emission of insns (adding them to the doubly-linked list). */
2794 /* Return the first insn of the current sequence or current function. */
2802 /* Specify a new insn as the first in the chain. */
2805 set_first_insn (rtx insn)
2807 gcc_assert (!PREV_INSN (insn));
2811 /* Return the last insn emitted in current sequence or current function. */
2814 get_last_insn (void)
2819 /* Specify a new insn as the last in the chain. */
2822 set_last_insn (rtx insn)
2824 gcc_assert (!NEXT_INSN (insn));
2828 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2831 get_last_insn_anywhere (void)
2833 struct sequence_stack *stack;
2836 for (stack = seq_stack; stack; stack = stack->next)
2837 if (stack->last != 0)
2842 /* Return the first nonnote insn emitted in current sequence or current
2843 function. This routine looks inside SEQUENCEs. */
2846 get_first_nonnote_insn (void)
2848 rtx insn = first_insn;
2852 insn = next_insn (insn);
2853 if (insn == 0 || !NOTE_P (insn))
2860 /* Return the last nonnote insn emitted in current sequence or current
2861 function. This routine looks inside SEQUENCEs. */
2864 get_last_nonnote_insn (void)
2866 rtx insn = last_insn;
2870 insn = previous_insn (insn);
2871 if (insn == 0 || !NOTE_P (insn))
2878 /* Return a number larger than any instruction's uid in this function. */
2883 return cur_insn_uid;
2886 /* Renumber instructions so that no instruction UIDs are wasted. */
2889 renumber_insns (FILE *stream)
2893 /* If we're not supposed to renumber instructions, don't. */
2894 if (!flag_renumber_insns)
2897 /* If there aren't that many instructions, then it's not really
2898 worth renumbering them. */
2899 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2904 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2907 fprintf (stream, "Renumbering insn %d to %d\n",
2908 INSN_UID (insn), cur_insn_uid);
2909 INSN_UID (insn) = cur_insn_uid++;
2913 /* Return the next insn. If it is a SEQUENCE, return the first insn
2917 next_insn (rtx insn)
2921 insn = NEXT_INSN (insn);
2922 if (insn && NONJUMP_INSN_P (insn)
2923 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2924 insn = XVECEXP (PATTERN (insn), 0, 0);
2930 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2934 previous_insn (rtx insn)
2938 insn = PREV_INSN (insn);
2939 if (insn && NONJUMP_INSN_P (insn)
2940 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2941 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2947 /* Return the next insn after INSN that is not a NOTE. This routine does not
2948 look inside SEQUENCEs. */
2951 next_nonnote_insn (rtx insn)
2955 insn = NEXT_INSN (insn);
2956 if (insn == 0 || !NOTE_P (insn))
2963 /* Return the previous insn before INSN that is not a NOTE. This routine does
2964 not look inside SEQUENCEs. */
2967 prev_nonnote_insn (rtx insn)
2971 insn = PREV_INSN (insn);
2972 if (insn == 0 || !NOTE_P (insn))
2979 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2980 or 0, if there is none. This routine does not look inside
2984 next_real_insn (rtx insn)
2988 insn = NEXT_INSN (insn);
2989 if (insn == 0 || INSN_P (insn))
2996 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2997 or 0, if there is none. This routine does not look inside
3001 prev_real_insn (rtx insn)
3005 insn = PREV_INSN (insn);
3006 if (insn == 0 || INSN_P (insn))
3013 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3014 This routine does not look inside SEQUENCEs. */
3017 last_call_insn (void)
3021 for (insn = get_last_insn ();
3022 insn && !CALL_P (insn);
3023 insn = PREV_INSN (insn))
3029 /* Find the next insn after INSN that really does something. This routine
3030 does not look inside SEQUENCEs. Until reload has completed, this is the
3031 same as next_real_insn. */
3034 active_insn_p (rtx insn)
3036 return (CALL_P (insn) || JUMP_P (insn)
3037 || (NONJUMP_INSN_P (insn)
3038 && (! reload_completed
3039 || (GET_CODE (PATTERN (insn)) != USE
3040 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3044 next_active_insn (rtx insn)
3048 insn = NEXT_INSN (insn);
3049 if (insn == 0 || active_insn_p (insn))
3056 /* Find the last insn before INSN that really does something. This routine
3057 does not look inside SEQUENCEs. Until reload has completed, this is the
3058 same as prev_real_insn. */
3061 prev_active_insn (rtx insn)
3065 insn = PREV_INSN (insn);
3066 if (insn == 0 || active_insn_p (insn))
3073 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3076 next_label (rtx insn)
3080 insn = NEXT_INSN (insn);
3081 if (insn == 0 || LABEL_P (insn))
3088 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3091 prev_label (rtx insn)
3095 insn = PREV_INSN (insn);
3096 if (insn == 0 || LABEL_P (insn))
3103 /* Return the last label to mark the same position as LABEL. Return null
3104 if LABEL itself is null. */
3107 skip_consecutive_labels (rtx label)
3111 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3119 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3120 and REG_CC_USER notes so we can find it. */
3123 link_cc0_insns (rtx insn)
3125 rtx user = next_nonnote_insn (insn);
3127 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3128 user = XVECEXP (PATTERN (user), 0, 0);
3130 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3132 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3135 /* Return the next insn that uses CC0 after INSN, which is assumed to
3136 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3137 applied to the result of this function should yield INSN).
3139 Normally, this is simply the next insn. However, if a REG_CC_USER note
3140 is present, it contains the insn that uses CC0.
3142 Return 0 if we can't find the insn. */
3145 next_cc0_user (rtx insn)
3147 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3150 return XEXP (note, 0);
3152 insn = next_nonnote_insn (insn);
3153 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3154 insn = XVECEXP (PATTERN (insn), 0, 0);
3156 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3162 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3163 note, it is the previous insn. */
3166 prev_cc0_setter (rtx insn)
3168 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3171 return XEXP (note, 0);
3173 insn = prev_nonnote_insn (insn);
3174 gcc_assert (sets_cc0_p (PATTERN (insn)));
3180 /* Increment the label uses for all labels present in rtx. */
3183 mark_label_nuses (rtx x)
3189 code = GET_CODE (x);
3190 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3191 LABEL_NUSES (XEXP (x, 0))++;
3193 fmt = GET_RTX_FORMAT (code);
3194 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3197 mark_label_nuses (XEXP (x, i));
3198 else if (fmt[i] == 'E')
3199 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3200 mark_label_nuses (XVECEXP (x, i, j));
3205 /* Try splitting insns that can be split for better scheduling.
3206 PAT is the pattern which might split.
3207 TRIAL is the insn providing PAT.
3208 LAST is nonzero if we should return the last insn of the sequence produced.
3210 If this routine succeeds in splitting, it returns the first or last
3211 replacement insn depending on the value of LAST. Otherwise, it
3212 returns TRIAL. If the insn to be returned can be split, it will be. */
3215 try_split (rtx pat, rtx trial, int last)
3217 rtx before = PREV_INSN (trial);
3218 rtx after = NEXT_INSN (trial);
3219 int has_barrier = 0;
3223 rtx insn_last, insn;
3226 if (any_condjump_p (trial)
3227 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3228 split_branch_probability = INTVAL (XEXP (note, 0));
3229 probability = split_branch_probability;
3231 seq = split_insns (pat, trial);
3233 split_branch_probability = -1;
3235 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3236 We may need to handle this specially. */
3237 if (after && BARRIER_P (after))
3240 after = NEXT_INSN (after);
3246 /* Avoid infinite loop if any insn of the result matches
3247 the original pattern. */
3251 if (INSN_P (insn_last)
3252 && rtx_equal_p (PATTERN (insn_last), pat))
3254 if (!NEXT_INSN (insn_last))
3256 insn_last = NEXT_INSN (insn_last);
3260 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3264 mark_jump_label (PATTERN (insn), insn, 0);
3266 if (probability != -1
3267 && any_condjump_p (insn)
3268 && !find_reg_note (insn, REG_BR_PROB, 0))
3270 /* We can preserve the REG_BR_PROB notes only if exactly
3271 one jump is created, otherwise the machine description
3272 is responsible for this step using
3273 split_branch_probability variable. */
3274 gcc_assert (njumps == 1);
3276 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3277 GEN_INT (probability),
3283 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3284 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3287 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3290 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3293 *p = CALL_INSN_FUNCTION_USAGE (trial);
3294 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3298 /* Copy notes, particularly those related to the CFG. */
3299 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3301 switch (REG_NOTE_KIND (note))
3305 while (insn != NULL_RTX)
3308 || (flag_non_call_exceptions && INSN_P (insn)
3309 && may_trap_p (PATTERN (insn))))
3311 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3314 insn = PREV_INSN (insn);
3320 case REG_ALWAYS_RETURN:
3322 while (insn != NULL_RTX)
3326 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3329 insn = PREV_INSN (insn);
3333 case REG_NON_LOCAL_GOTO:
3335 while (insn != NULL_RTX)
3339 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3342 insn = PREV_INSN (insn);
3351 /* If there are LABELS inside the split insns increment the
3352 usage count so we don't delete the label. */
3353 if (NONJUMP_INSN_P (trial))
3356 while (insn != NULL_RTX)
3358 if (NONJUMP_INSN_P (insn))
3359 mark_label_nuses (PATTERN (insn));
3361 insn = PREV_INSN (insn);
3365 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3367 delete_insn (trial);
3369 emit_barrier_after (tem);
3371 /* Recursively call try_split for each new insn created; by the
3372 time control returns here that insn will be fully split, so
3373 set LAST and continue from the insn after the one returned.
3374 We can't use next_active_insn here since AFTER may be a note.
3375 Ignore deleted insns, which can be occur if not optimizing. */
3376 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3377 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3378 tem = try_split (PATTERN (tem), tem, 1);
3380 /* Return either the first or the last insn, depending on which was
3383 ? (after ? PREV_INSN (after) : last_insn)
3384 : NEXT_INSN (before);
3387 /* Make and return an INSN rtx, initializing all its slots.
3388 Store PATTERN in the pattern slots. */
3391 make_insn_raw (rtx pattern)
3395 insn = rtx_alloc (INSN);
3397 INSN_UID (insn) = cur_insn_uid++;
3398 PATTERN (insn) = pattern;
3399 INSN_CODE (insn) = -1;
3400 LOG_LINKS (insn) = NULL;
3401 REG_NOTES (insn) = NULL;
3402 INSN_LOCATOR (insn) = 0;
3403 BLOCK_FOR_INSN (insn) = NULL;
3405 #ifdef ENABLE_RTL_CHECKING
3408 && (returnjump_p (insn)
3409 || (GET_CODE (insn) == SET
3410 && SET_DEST (insn) == pc_rtx)))
3412 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3420 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3423 make_jump_insn_raw (rtx pattern)
3427 insn = rtx_alloc (JUMP_INSN);
3428 INSN_UID (insn) = cur_insn_uid++;
3430 PATTERN (insn) = pattern;
3431 INSN_CODE (insn) = -1;
3432 LOG_LINKS (insn) = NULL;
3433 REG_NOTES (insn) = NULL;
3434 JUMP_LABEL (insn) = NULL;
3435 INSN_LOCATOR (insn) = 0;
3436 BLOCK_FOR_INSN (insn) = NULL;
3441 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3444 make_call_insn_raw (rtx pattern)
3448 insn = rtx_alloc (CALL_INSN);
3449 INSN_UID (insn) = cur_insn_uid++;
3451 PATTERN (insn) = pattern;
3452 INSN_CODE (insn) = -1;
3453 LOG_LINKS (insn) = NULL;
3454 REG_NOTES (insn) = NULL;
3455 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3456 INSN_LOCATOR (insn) = 0;
3457 BLOCK_FOR_INSN (insn) = NULL;
3462 /* Add INSN to the end of the doubly-linked list.
3463 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3468 PREV_INSN (insn) = last_insn;
3469 NEXT_INSN (insn) = 0;
3471 if (NULL != last_insn)
3472 NEXT_INSN (last_insn) = insn;
3474 if (NULL == first_insn)
3480 /* Add INSN into the doubly-linked list after insn AFTER. This and
3481 the next should be the only functions called to insert an insn once
3482 delay slots have been filled since only they know how to update a
3486 add_insn_after (rtx insn, rtx after)
3488 rtx next = NEXT_INSN (after);
3491 gcc_assert (!optimize || !INSN_DELETED_P (after));
3493 NEXT_INSN (insn) = next;
3494 PREV_INSN (insn) = after;
3498 PREV_INSN (next) = insn;
3499 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3500 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3502 else if (last_insn == after)
3506 struct sequence_stack *stack = seq_stack;
3507 /* Scan all pending sequences too. */
3508 for (; stack; stack = stack->next)
3509 if (after == stack->last)
3518 if (!BARRIER_P (after)
3519 && !BARRIER_P (insn)
3520 && (bb = BLOCK_FOR_INSN (after)))
3522 set_block_for_insn (insn, bb);
3524 bb->flags |= BB_DIRTY;
3525 /* Should not happen as first in the BB is always
3526 either NOTE or LABEL. */
3527 if (BB_END (bb) == after
3528 /* Avoid clobbering of structure when creating new BB. */
3529 && !BARRIER_P (insn)
3531 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3535 NEXT_INSN (after) = insn;
3536 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3538 rtx sequence = PATTERN (after);
3539 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3543 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3544 the previous should be the only functions called to insert an insn once
3545 delay slots have been filled since only they know how to update a
3549 add_insn_before (rtx insn, rtx before)
3551 rtx prev = PREV_INSN (before);
3554 gcc_assert (!optimize || !INSN_DELETED_P (before));
3556 PREV_INSN (insn) = prev;
3557 NEXT_INSN (insn) = before;
3561 NEXT_INSN (prev) = insn;
3562 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3564 rtx sequence = PATTERN (prev);
3565 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3568 else if (first_insn == before)
3572 struct sequence_stack *stack = seq_stack;
3573 /* Scan all pending sequences too. */
3574 for (; stack; stack = stack->next)
3575 if (before == stack->first)
3577 stack->first = insn;
3584 if (!BARRIER_P (before)
3585 && !BARRIER_P (insn)
3586 && (bb = BLOCK_FOR_INSN (before)))
3588 set_block_for_insn (insn, bb);
3590 bb->flags |= BB_DIRTY;
3591 /* Should not happen as first in the BB is always either NOTE or
3593 gcc_assert (BB_HEAD (bb) != insn
3594 /* Avoid clobbering of structure when creating new BB. */
3597 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_BASIC_BLOCK));
3600 PREV_INSN (before) = insn;
3601 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3602 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3605 /* Remove an insn from its doubly-linked list. This function knows how
3606 to handle sequences. */
3608 remove_insn (rtx insn)
3610 rtx next = NEXT_INSN (insn);
3611 rtx prev = PREV_INSN (insn);
3616 NEXT_INSN (prev) = next;
3617 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3619 rtx sequence = PATTERN (prev);
3620 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3623 else if (first_insn == insn)
3627 struct sequence_stack *stack = seq_stack;
3628 /* Scan all pending sequences too. */
3629 for (; stack; stack = stack->next)
3630 if (insn == stack->first)
3632 stack->first = next;
3641 PREV_INSN (next) = prev;
3642 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3643 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3645 else if (last_insn == insn)
3649 struct sequence_stack *stack = seq_stack;
3650 /* Scan all pending sequences too. */
3651 for (; stack; stack = stack->next)
3652 if (insn == stack->last)
3660 if (!BARRIER_P (insn)
3661 && (bb = BLOCK_FOR_INSN (insn)))
3664 bb->flags |= BB_DIRTY;
3665 if (BB_HEAD (bb) == insn)
3667 /* Never ever delete the basic block note without deleting whole
3669 gcc_assert (!NOTE_P (insn));
3670 BB_HEAD (bb) = next;
3672 if (BB_END (bb) == insn)
3677 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3680 add_function_usage_to (rtx call_insn, rtx call_fusage)
3682 gcc_assert (call_insn && CALL_P (call_insn));
3684 /* Put the register usage information on the CALL. If there is already
3685 some usage information, put ours at the end. */
3686 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3690 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3691 link = XEXP (link, 1))
3694 XEXP (link, 1) = call_fusage;
3697 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3700 /* Delete all insns made since FROM.
3701 FROM becomes the new last instruction. */
3704 delete_insns_since (rtx from)
3709 NEXT_INSN (from) = 0;
3713 /* This function is deprecated, please use sequences instead.
3715 Move a consecutive bunch of insns to a different place in the chain.
3716 The insns to be moved are those between FROM and TO.
3717 They are moved to a new position after the insn AFTER.
3718 AFTER must not be FROM or TO or any insn in between.
3720 This function does not know about SEQUENCEs and hence should not be
3721 called after delay-slot filling has been done. */
3724 reorder_insns_nobb (rtx from, rtx to, rtx after)
3726 /* Splice this bunch out of where it is now. */
3727 if (PREV_INSN (from))
3728 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3730 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3731 if (last_insn == to)
3732 last_insn = PREV_INSN (from);
3733 if (first_insn == from)
3734 first_insn = NEXT_INSN (to);
3736 /* Make the new neighbors point to it and it to them. */
3737 if (NEXT_INSN (after))
3738 PREV_INSN (NEXT_INSN (after)) = to;
3740 NEXT_INSN (to) = NEXT_INSN (after);
3741 PREV_INSN (from) = after;
3742 NEXT_INSN (after) = from;
3743 if (after == last_insn)
3747 /* Same as function above, but take care to update BB boundaries. */
3749 reorder_insns (rtx from, rtx to, rtx after)
3751 rtx prev = PREV_INSN (from);
3752 basic_block bb, bb2;
3754 reorder_insns_nobb (from, to, after);
3756 if (!BARRIER_P (after)
3757 && (bb = BLOCK_FOR_INSN (after)))
3760 bb->flags |= BB_DIRTY;
3762 if (!BARRIER_P (from)
3763 && (bb2 = BLOCK_FOR_INSN (from)))
3765 if (BB_END (bb2) == to)
3766 BB_END (bb2) = prev;
3767 bb2->flags |= BB_DIRTY;
3770 if (BB_END (bb) == after)
3773 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3775 set_block_for_insn (x, bb);
3779 /* Return the line note insn preceding INSN. */
3782 find_line_note (rtx insn)
3784 if (no_line_numbers)
3787 for (; insn; insn = PREV_INSN (insn))
3789 && NOTE_LINE_NUMBER (insn) >= 0)
3795 /* Remove unnecessary notes from the instruction stream. */
3798 remove_unnecessary_notes (void)
3800 rtx block_stack = NULL_RTX;
3801 rtx eh_stack = NULL_RTX;
3806 /* We must not remove the first instruction in the function because
3807 the compiler depends on the first instruction being a note. */
3808 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3810 /* Remember what's next. */
3811 next = NEXT_INSN (insn);
3813 /* We're only interested in notes. */
3817 switch (NOTE_LINE_NUMBER (insn))
3819 case NOTE_INSN_DELETED:
3823 case NOTE_INSN_EH_REGION_BEG:
3824 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3827 case NOTE_INSN_EH_REGION_END:
3828 /* Too many end notes. */
3829 gcc_assert (eh_stack);
3830 /* Mismatched nesting. */
3831 gcc_assert (NOTE_EH_HANDLER (XEXP (eh_stack, 0))
3832 == NOTE_EH_HANDLER (insn));
3834 eh_stack = XEXP (eh_stack, 1);
3835 free_INSN_LIST_node (tmp);
3838 case NOTE_INSN_BLOCK_BEG:
3839 /* By now, all notes indicating lexical blocks should have
3840 NOTE_BLOCK filled in. */
3841 gcc_assert (NOTE_BLOCK (insn));
3842 block_stack = alloc_INSN_LIST (insn, block_stack);
3845 case NOTE_INSN_BLOCK_END:
3846 /* Too many end notes. */
3847 gcc_assert (block_stack);
3848 /* Mismatched nesting. */
3849 gcc_assert (NOTE_BLOCK (XEXP (block_stack, 0)) == NOTE_BLOCK (insn));
3851 block_stack = XEXP (block_stack, 1);
3852 free_INSN_LIST_node (tmp);
3854 /* Scan back to see if there are any non-note instructions
3855 between INSN and the beginning of this block. If not,
3856 then there is no PC range in the generated code that will
3857 actually be in this block, so there's no point in
3858 remembering the existence of the block. */
3859 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3861 /* This block contains a real instruction. Note that we
3862 don't include labels; if the only thing in the block
3863 is a label, then there are still no PC values that
3864 lie within the block. */
3868 /* We're only interested in NOTEs. */
3872 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3874 /* We just verified that this BLOCK matches us with
3875 the block_stack check above. Never delete the
3876 BLOCK for the outermost scope of the function; we
3877 can refer to names from that scope even if the
3878 block notes are messed up. */
3879 if (! is_body_block (NOTE_BLOCK (insn))
3880 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3887 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3888 /* There's a nested block. We need to leave the
3889 current block in place since otherwise the debugger
3890 wouldn't be able to show symbols from our block in
3891 the nested block. */
3897 /* Too many begin notes. */
3898 gcc_assert (!block_stack && !eh_stack);
3902 /* Emit insn(s) of given code and pattern
3903 at a specified place within the doubly-linked list.
3905 All of the emit_foo global entry points accept an object
3906 X which is either an insn list or a PATTERN of a single
3909 There are thus a few canonical ways to generate code and
3910 emit it at a specific place in the instruction stream. For
3911 example, consider the instruction named SPOT and the fact that
3912 we would like to emit some instructions before SPOT. We might
3916 ... emit the new instructions ...
3917 insns_head = get_insns ();
3920 emit_insn_before (insns_head, SPOT);
3922 It used to be common to generate SEQUENCE rtl instead, but that
3923 is a relic of the past which no longer occurs. The reason is that
3924 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3925 generated would almost certainly die right after it was created. */
3927 /* Make X be output before the instruction BEFORE. */
3930 emit_insn_before (rtx x, rtx before)
3935 gcc_assert (before);
3940 switch (GET_CODE (x))
3951 rtx next = NEXT_INSN (insn);
3952 add_insn_before (insn, before);
3958 #ifdef ENABLE_RTL_CHECKING
3965 last = make_insn_raw (x);
3966 add_insn_before (last, before);
3973 /* Make an instruction with body X and code JUMP_INSN
3974 and output it before the instruction BEFORE. */
3977 emit_jump_insn_before (rtx x, rtx before)
3979 rtx insn, last = NULL_RTX;
3981 gcc_assert (before);
3983 switch (GET_CODE (x))
3994 rtx next = NEXT_INSN (insn);
3995 add_insn_before (insn, before);
4001 #ifdef ENABLE_RTL_CHECKING
4008 last = make_jump_insn_raw (x);
4009 add_insn_before (last, before);
4016 /* Make an instruction with body X and code CALL_INSN
4017 and output it before the instruction BEFORE. */
4020 emit_call_insn_before (rtx x, rtx before)
4022 rtx last = NULL_RTX, insn;
4024 gcc_assert (before);
4026 switch (GET_CODE (x))
4037 rtx next = NEXT_INSN (insn);
4038 add_insn_before (insn, before);
4044 #ifdef ENABLE_RTL_CHECKING
4051 last = make_call_insn_raw (x);
4052 add_insn_before (last, before);
4059 /* Make an insn of code BARRIER
4060 and output it before the insn BEFORE. */
4063 emit_barrier_before (rtx before)
4065 rtx insn = rtx_alloc (BARRIER);
4067 INSN_UID (insn) = cur_insn_uid++;
4069 add_insn_before (insn, before);
4073 /* Emit the label LABEL before the insn BEFORE. */
4076 emit_label_before (rtx label, rtx before)
4078 /* This can be called twice for the same label as a result of the
4079 confusion that follows a syntax error! So make it harmless. */
4080 if (INSN_UID (label) == 0)
4082 INSN_UID (label) = cur_insn_uid++;
4083 add_insn_before (label, before);
4089 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4092 emit_note_before (int subtype, rtx before)
4094 rtx note = rtx_alloc (NOTE);
4095 INSN_UID (note) = cur_insn_uid++;
4096 #ifndef USE_MAPPED_LOCATION
4097 NOTE_SOURCE_FILE (note) = 0;
4099 NOTE_LINE_NUMBER (note) = subtype;
4100 BLOCK_FOR_INSN (note) = NULL;
4102 add_insn_before (note, before);
4106 /* Helper for emit_insn_after, handles lists of instructions
4109 static rtx emit_insn_after_1 (rtx, rtx);
4112 emit_insn_after_1 (rtx first, rtx after)
4118 if (!BARRIER_P (after)
4119 && (bb = BLOCK_FOR_INSN (after)))
4121 bb->flags |= BB_DIRTY;
4122 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4123 if (!BARRIER_P (last))
4124 set_block_for_insn (last, bb);
4125 if (!BARRIER_P (last))
4126 set_block_for_insn (last, bb);
4127 if (BB_END (bb) == after)
4131 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4134 after_after = NEXT_INSN (after);
4136 NEXT_INSN (after) = first;
4137 PREV_INSN (first) = after;
4138 NEXT_INSN (last) = after_after;
4140 PREV_INSN (after_after) = last;
4142 if (after == last_insn)
4147 /* Make X be output after the insn AFTER. */
4150 emit_insn_after (rtx x, rtx after)
4159 switch (GET_CODE (x))
4167 last = emit_insn_after_1 (x, after);
4170 #ifdef ENABLE_RTL_CHECKING
4177 last = make_insn_raw (x);
4178 add_insn_after (last, after);
4185 /* Similar to emit_insn_after, except that line notes are to be inserted so
4186 as to act as if this insn were at FROM. */
4189 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4191 rtx from_line = find_line_note (from);
4192 rtx after_line = find_line_note (after);
4193 rtx insn = emit_insn_after (x, after);
4196 emit_note_copy_after (from_line, after);
4199 emit_note_copy_after (after_line, insn);
4202 /* Make an insn of code JUMP_INSN with body X
4203 and output it after the insn AFTER. */
4206 emit_jump_insn_after (rtx x, rtx after)
4212 switch (GET_CODE (x))
4220 last = emit_insn_after_1 (x, after);
4223 #ifdef ENABLE_RTL_CHECKING
4230 last = make_jump_insn_raw (x);
4231 add_insn_after (last, after);
4238 /* Make an instruction with body X and code CALL_INSN
4239 and output it after the instruction AFTER. */
4242 emit_call_insn_after (rtx x, rtx after)
4248 switch (GET_CODE (x))
4256 last = emit_insn_after_1 (x, after);
4259 #ifdef ENABLE_RTL_CHECKING
4266 last = make_call_insn_raw (x);
4267 add_insn_after (last, after);
4274 /* Make an insn of code BARRIER
4275 and output it after the insn AFTER. */
4278 emit_barrier_after (rtx after)
4280 rtx insn = rtx_alloc (BARRIER);
4282 INSN_UID (insn) = cur_insn_uid++;
4284 add_insn_after (insn, after);
4288 /* Emit the label LABEL after the insn AFTER. */
4291 emit_label_after (rtx label, rtx after)
4293 /* This can be called twice for the same label
4294 as a result of the confusion that follows a syntax error!
4295 So make it harmless. */
4296 if (INSN_UID (label) == 0)
4298 INSN_UID (label) = cur_insn_uid++;
4299 add_insn_after (label, after);
4305 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4308 emit_note_after (int subtype, rtx after)
4310 rtx note = rtx_alloc (NOTE);
4311 INSN_UID (note) = cur_insn_uid++;
4312 #ifndef USE_MAPPED_LOCATION
4313 NOTE_SOURCE_FILE (note) = 0;
4315 NOTE_LINE_NUMBER (note) = subtype;
4316 BLOCK_FOR_INSN (note) = NULL;
4317 add_insn_after (note, after);
4321 /* Emit a copy of note ORIG after the insn AFTER. */
4324 emit_note_copy_after (rtx orig, rtx after)
4328 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4334 note = rtx_alloc (NOTE);
4335 INSN_UID (note) = cur_insn_uid++;
4336 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4337 NOTE_DATA (note) = NOTE_DATA (orig);
4338 BLOCK_FOR_INSN (note) = NULL;
4339 add_insn_after (note, after);
4343 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4345 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4347 rtx last = emit_insn_after (pattern, after);
4349 if (pattern == NULL_RTX)
4352 after = NEXT_INSN (after);
4355 if (active_insn_p (after))
4356 INSN_LOCATOR (after) = loc;
4359 after = NEXT_INSN (after);
4364 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4366 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4368 rtx last = emit_jump_insn_after (pattern, after);
4370 if (pattern == NULL_RTX)
4373 after = NEXT_INSN (after);
4376 if (active_insn_p (after))
4377 INSN_LOCATOR (after) = loc;
4380 after = NEXT_INSN (after);
4385 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4387 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4389 rtx last = emit_call_insn_after (pattern, after);
4391 if (pattern == NULL_RTX)
4394 after = NEXT_INSN (after);
4397 if (active_insn_p (after))
4398 INSN_LOCATOR (after) = loc;
4401 after = NEXT_INSN (after);
4406 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4408 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4410 rtx first = PREV_INSN (before);
4411 rtx last = emit_insn_before (pattern, before);
4413 if (pattern == NULL_RTX)
4416 first = NEXT_INSN (first);
4419 if (active_insn_p (first))
4420 INSN_LOCATOR (first) = loc;
4423 first = NEXT_INSN (first);
4428 /* Take X and emit it at the end of the doubly-linked
4431 Returns the last insn emitted. */
4436 rtx last = last_insn;
4442 switch (GET_CODE (x))
4453 rtx next = NEXT_INSN (insn);
4460 #ifdef ENABLE_RTL_CHECKING
4467 last = make_insn_raw (x);
4475 /* Make an insn of code JUMP_INSN with pattern X
4476 and add it to the end of the doubly-linked list. */
4479 emit_jump_insn (rtx x)
4481 rtx last = NULL_RTX, insn;
4483 switch (GET_CODE (x))
4494 rtx next = NEXT_INSN (insn);
4501 #ifdef ENABLE_RTL_CHECKING
4508 last = make_jump_insn_raw (x);
4516 /* Make an insn of code CALL_INSN with pattern X
4517 and add it to the end of the doubly-linked list. */
4520 emit_call_insn (rtx x)
4524 switch (GET_CODE (x))
4532 insn = emit_insn (x);
4535 #ifdef ENABLE_RTL_CHECKING
4542 insn = make_call_insn_raw (x);
4550 /* Add the label LABEL to the end of the doubly-linked list. */
4553 emit_label (rtx label)
4555 /* This can be called twice for the same label
4556 as a result of the confusion that follows a syntax error!
4557 So make it harmless. */
4558 if (INSN_UID (label) == 0)
4560 INSN_UID (label) = cur_insn_uid++;
4566 /* Make an insn of code BARRIER
4567 and add it to the end of the doubly-linked list. */
4572 rtx barrier = rtx_alloc (BARRIER);
4573 INSN_UID (barrier) = cur_insn_uid++;
4578 /* Make line numbering NOTE insn for LOCATION add it to the end
4579 of the doubly-linked list, but only if line-numbers are desired for
4580 debugging info and it doesn't match the previous one. */
4583 emit_line_note (location_t location)
4587 #ifdef USE_MAPPED_LOCATION
4588 if (location == last_location)
4591 if (location.file && last_location.file
4592 && !strcmp (location.file, last_location.file)
4593 && location.line == last_location.line)
4596 last_location = location;
4598 if (no_line_numbers)
4604 #ifdef USE_MAPPED_LOCATION
4605 note = emit_note ((int) location);
4607 note = emit_note (location.line);
4608 NOTE_SOURCE_FILE (note) = location.file;
4614 /* Emit a copy of note ORIG. */
4617 emit_note_copy (rtx orig)
4621 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4627 note = rtx_alloc (NOTE);
4629 INSN_UID (note) = cur_insn_uid++;
4630 NOTE_DATA (note) = NOTE_DATA (orig);
4631 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4632 BLOCK_FOR_INSN (note) = NULL;
4638 /* Make an insn of code NOTE or type NOTE_NO
4639 and add it to the end of the doubly-linked list. */
4642 emit_note (int note_no)
4646 note = rtx_alloc (NOTE);
4647 INSN_UID (note) = cur_insn_uid++;
4648 NOTE_LINE_NUMBER (note) = note_no;
4649 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4650 BLOCK_FOR_INSN (note) = NULL;
4655 /* Cause next statement to emit a line note even if the line number
4659 force_next_line_note (void)
4661 #ifdef USE_MAPPED_LOCATION
4664 last_location.line = -1;
4668 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4669 note of this type already exists, remove it first. */
4672 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4674 rtx note = find_reg_note (insn, kind, NULL_RTX);
4680 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4681 has multiple sets (some callers assume single_set
4682 means the insn only has one set, when in fact it
4683 means the insn only has one * useful * set). */
4684 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4690 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4691 It serves no useful purpose and breaks eliminate_regs. */
4692 if (GET_CODE (datum) == ASM_OPERANDS)
4702 XEXP (note, 0) = datum;
4706 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4707 return REG_NOTES (insn);
4710 /* Return an indication of which type of insn should have X as a body.
4711 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4714 classify_insn (rtx x)
4718 if (GET_CODE (x) == CALL)
4720 if (GET_CODE (x) == RETURN)
4722 if (GET_CODE (x) == SET)
4724 if (SET_DEST (x) == pc_rtx)
4726 else if (GET_CODE (SET_SRC (x)) == CALL)
4731 if (GET_CODE (x) == PARALLEL)
4734 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4735 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4737 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4738 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4740 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4741 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4747 /* Emit the rtl pattern X as an appropriate kind of insn.
4748 If X is a label, it is simply added into the insn chain. */
4753 enum rtx_code code = classify_insn (x);
4758 return emit_label (x);
4760 return emit_insn (x);
4763 rtx insn = emit_jump_insn (x);
4764 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4765 return emit_barrier ();
4769 return emit_call_insn (x);
4775 /* Space for free sequence stack entries. */
4776 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4778 /* Begin emitting insns to a sequence. If this sequence will contain
4779 something that might cause the compiler to pop arguments to function
4780 calls (because those pops have previously been deferred; see
4781 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4782 before calling this function. That will ensure that the deferred
4783 pops are not accidentally emitted in the middle of this sequence. */
4786 start_sequence (void)
4788 struct sequence_stack *tem;
4790 if (free_sequence_stack != NULL)
4792 tem = free_sequence_stack;
4793 free_sequence_stack = tem->next;
4796 tem = ggc_alloc (sizeof (struct sequence_stack));
4798 tem->next = seq_stack;
4799 tem->first = first_insn;
4800 tem->last = last_insn;
4808 /* Set up the insn chain starting with FIRST as the current sequence,
4809 saving the previously current one. See the documentation for
4810 start_sequence for more information about how to use this function. */
4813 push_to_sequence (rtx first)
4819 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4825 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4828 push_to_full_sequence (rtx first, rtx last)
4833 /* We really should have the end of the insn chain here. */
4834 gcc_assert (!last || !NEXT_INSN (last));
4837 /* Set up the outer-level insn chain
4838 as the current sequence, saving the previously current one. */
4841 push_topmost_sequence (void)
4843 struct sequence_stack *stack, *top = NULL;
4847 for (stack = seq_stack; stack; stack = stack->next)
4850 first_insn = top->first;
4851 last_insn = top->last;
4854 /* After emitting to the outer-level insn chain, update the outer-level
4855 insn chain, and restore the previous saved state. */
4858 pop_topmost_sequence (void)
4860 struct sequence_stack *stack, *top = NULL;
4862 for (stack = seq_stack; stack; stack = stack->next)
4865 top->first = first_insn;
4866 top->last = last_insn;
4871 /* After emitting to a sequence, restore previous saved state.
4873 To get the contents of the sequence just made, you must call
4874 `get_insns' *before* calling here.
4876 If the compiler might have deferred popping arguments while
4877 generating this sequence, and this sequence will not be immediately
4878 inserted into the instruction stream, use do_pending_stack_adjust
4879 before calling get_insns. That will ensure that the deferred
4880 pops are inserted into this sequence, and not into some random
4881 location in the instruction stream. See INHIBIT_DEFER_POP for more
4882 information about deferred popping of arguments. */
4887 struct sequence_stack *tem = seq_stack;
4889 first_insn = tem->first;
4890 last_insn = tem->last;
4891 seq_stack = tem->next;
4893 memset (tem, 0, sizeof (*tem));
4894 tem->next = free_sequence_stack;
4895 free_sequence_stack = tem;
4898 /* Return 1 if currently emitting into a sequence. */
4901 in_sequence_p (void)
4903 return seq_stack != 0;
4906 /* Put the various virtual registers into REGNO_REG_RTX. */
4909 init_virtual_regs (struct emit_status *es)
4911 rtx *ptr = es->x_regno_reg_rtx;
4912 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4913 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4914 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4915 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4916 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4920 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4921 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4922 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4923 static int copy_insn_n_scratches;
4925 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4926 copied an ASM_OPERANDS.
4927 In that case, it is the original input-operand vector. */
4928 static rtvec orig_asm_operands_vector;
4930 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4931 copied an ASM_OPERANDS.
4932 In that case, it is the copied input-operand vector. */
4933 static rtvec copy_asm_operands_vector;
4935 /* Likewise for the constraints vector. */
4936 static rtvec orig_asm_constraints_vector;
4937 static rtvec copy_asm_constraints_vector;
4939 /* Recursively create a new copy of an rtx for copy_insn.
4940 This function differs from copy_rtx in that it handles SCRATCHes and
4941 ASM_OPERANDs properly.
4942 Normally, this function is not used directly; use copy_insn as front end.
4943 However, you could first copy an insn pattern with copy_insn and then use
4944 this function afterwards to properly copy any REG_NOTEs containing
4948 copy_insn_1 (rtx orig)
4953 const char *format_ptr;
4955 code = GET_CODE (orig);
4969 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4974 for (i = 0; i < copy_insn_n_scratches; i++)
4975 if (copy_insn_scratch_in[i] == orig)
4976 return copy_insn_scratch_out[i];
4980 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4981 a LABEL_REF, it isn't sharable. */
4982 if (GET_CODE (XEXP (orig, 0)) == PLUS
4983 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4984 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4988 /* A MEM with a constant address is not sharable. The problem is that
4989 the constant address may need to be reloaded. If the mem is shared,
4990 then reloading one copy of this mem will cause all copies to appear
4991 to have been reloaded. */
4997 copy = rtx_alloc (code);
4999 /* Copy the various flags, and other information. We assume that
5000 all fields need copying, and then clear the fields that should
5001 not be copied. That is the sensible default behavior, and forces
5002 us to explicitly document why we are *not* copying a flag. */
5003 memcpy (copy, orig, RTX_HDR_SIZE);
5005 /* We do not copy the USED flag, which is used as a mark bit during
5006 walks over the RTL. */
5007 RTX_FLAG (copy, used) = 0;
5009 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5012 RTX_FLAG (copy, jump) = 0;
5013 RTX_FLAG (copy, call) = 0;
5014 RTX_FLAG (copy, frame_related) = 0;
5017 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5019 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5021 copy->u.fld[i] = orig->u.fld[i];
5022 switch (*format_ptr++)
5025 if (XEXP (orig, i) != NULL)
5026 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5031 if (XVEC (orig, i) == orig_asm_constraints_vector)
5032 XVEC (copy, i) = copy_asm_constraints_vector;
5033 else if (XVEC (orig, i) == orig_asm_operands_vector)
5034 XVEC (copy, i) = copy_asm_operands_vector;
5035 else if (XVEC (orig, i) != NULL)
5037 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5038 for (j = 0; j < XVECLEN (copy, i); j++)
5039 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5050 /* These are left unchanged. */
5058 if (code == SCRATCH)
5060 i = copy_insn_n_scratches++;
5061 gcc_assert (i < MAX_RECOG_OPERANDS);
5062 copy_insn_scratch_in[i] = orig;
5063 copy_insn_scratch_out[i] = copy;
5065 else if (code == ASM_OPERANDS)
5067 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5068 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5069 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5070 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5076 /* Create a new copy of an rtx.
5077 This function differs from copy_rtx in that it handles SCRATCHes and
5078 ASM_OPERANDs properly.
5079 INSN doesn't really have to be a full INSN; it could be just the
5082 copy_insn (rtx insn)
5084 copy_insn_n_scratches = 0;
5085 orig_asm_operands_vector = 0;
5086 orig_asm_constraints_vector = 0;
5087 copy_asm_operands_vector = 0;
5088 copy_asm_constraints_vector = 0;
5089 return copy_insn_1 (insn);
5092 /* Initialize data structures and variables in this file
5093 before generating rtl for each function. */
5098 struct function *f = cfun;
5100 f->emit = ggc_alloc (sizeof (struct emit_status));
5104 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5105 last_location = UNKNOWN_LOCATION;
5106 first_label_num = label_num;
5110 /* Init the tables that describe all the pseudo regs. */
5112 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5114 f->emit->regno_pointer_align
5115 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5116 * sizeof (unsigned char));
5119 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5121 /* Put copies of all the hard registers into regno_reg_rtx. */
5122 memcpy (regno_reg_rtx,
5123 static_regno_reg_rtx,
5124 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5126 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5127 init_virtual_regs (f->emit);
5129 /* Indicate that the virtual registers and stack locations are
5131 REG_POINTER (stack_pointer_rtx) = 1;
5132 REG_POINTER (frame_pointer_rtx) = 1;
5133 REG_POINTER (hard_frame_pointer_rtx) = 1;
5134 REG_POINTER (arg_pointer_rtx) = 1;
5136 REG_POINTER (virtual_incoming_args_rtx) = 1;
5137 REG_POINTER (virtual_stack_vars_rtx) = 1;
5138 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5139 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5140 REG_POINTER (virtual_cfa_rtx) = 1;
5142 #ifdef STACK_BOUNDARY
5143 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5144 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5145 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5146 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5148 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5149 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5150 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5151 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5152 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5155 #ifdef INIT_EXPANDERS
5160 /* Generate the constant 0. */
5163 gen_const_vector_0 (enum machine_mode mode)
5168 enum machine_mode inner;
5170 units = GET_MODE_NUNITS (mode);
5171 inner = GET_MODE_INNER (mode);
5173 v = rtvec_alloc (units);
5175 /* We need to call this function after we to set CONST0_RTX first. */
5176 gcc_assert (CONST0_RTX (inner));
5178 for (i = 0; i < units; ++i)
5179 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5181 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5185 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5186 all elements are zero. */
5188 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5190 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5193 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5194 if (RTVEC_ELT (v, i) != inner_zero)
5195 return gen_rtx_raw_CONST_VECTOR (mode, v);
5196 return CONST0_RTX (mode);
5199 /* Create some permanent unique rtl objects shared between all functions.
5200 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5203 init_emit_once (int line_numbers)
5206 enum machine_mode mode;
5207 enum machine_mode double_mode;
5209 /* We need reg_raw_mode, so initialize the modes now. */
5210 init_reg_modes_once ();
5212 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5214 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5215 const_int_htab_eq, NULL);
5217 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5218 const_double_htab_eq, NULL);
5220 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5221 mem_attrs_htab_eq, NULL);
5222 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5223 reg_attrs_htab_eq, NULL);
5225 no_line_numbers = ! line_numbers;
5227 /* Compute the word and byte modes. */
5229 byte_mode = VOIDmode;
5230 word_mode = VOIDmode;
5231 double_mode = VOIDmode;
5233 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5234 mode = GET_MODE_WIDER_MODE (mode))
5236 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5237 && byte_mode == VOIDmode)
5240 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5241 && word_mode == VOIDmode)
5245 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5246 mode = GET_MODE_WIDER_MODE (mode))
5248 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5249 && double_mode == VOIDmode)
5253 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5255 /* Assign register numbers to the globally defined register rtx.
5256 This must be done at runtime because the register number field
5257 is in a union and some compilers can't initialize unions. */
5259 pc_rtx = gen_rtx_PC (VOIDmode);
5260 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5261 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5262 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5263 if (hard_frame_pointer_rtx == 0)
5264 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5265 HARD_FRAME_POINTER_REGNUM);
5266 if (arg_pointer_rtx == 0)
5267 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5268 virtual_incoming_args_rtx =
5269 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5270 virtual_stack_vars_rtx =
5271 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5272 virtual_stack_dynamic_rtx =
5273 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5274 virtual_outgoing_args_rtx =
5275 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5276 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5278 /* Initialize RTL for commonly used hard registers. These are
5279 copied into regno_reg_rtx as we begin to compile each function. */
5280 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5281 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5283 #ifdef INIT_EXPANDERS
5284 /* This is to initialize {init|mark|free}_machine_status before the first
5285 call to push_function_context_to. This is needed by the Chill front
5286 end which calls push_function_context_to before the first call to
5287 init_function_start. */
5291 /* Create the unique rtx's for certain rtx codes and operand values. */
5293 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5294 tries to use these variables. */
5295 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5296 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5297 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5299 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5300 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5301 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5303 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5305 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5306 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5307 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5308 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5309 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5310 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5311 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5313 dconsthalf = dconst1;
5314 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5316 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5318 /* Initialize mathematical constants for constant folding builtins.
5319 These constants need to be given to at least 160 bits precision. */
5320 real_from_string (&dconstpi,
5321 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5322 real_from_string (&dconste,
5323 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5325 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5327 REAL_VALUE_TYPE *r =
5328 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5330 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5331 mode = GET_MODE_WIDER_MODE (mode))
5332 const_tiny_rtx[i][(int) mode] =
5333 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5335 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5337 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5338 mode = GET_MODE_WIDER_MODE (mode))
5339 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5341 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5343 mode = GET_MODE_WIDER_MODE (mode))
5344 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5347 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5349 mode = GET_MODE_WIDER_MODE (mode))
5350 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5352 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5354 mode = GET_MODE_WIDER_MODE (mode))
5355 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5357 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5358 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5359 const_tiny_rtx[0][i] = const0_rtx;
5361 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5362 if (STORE_FLAG_VALUE == 1)
5363 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5365 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5366 return_address_pointer_rtx
5367 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5370 #ifdef STATIC_CHAIN_REGNUM
5371 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5373 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5374 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5375 static_chain_incoming_rtx
5376 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5379 static_chain_incoming_rtx = static_chain_rtx;
5383 static_chain_rtx = STATIC_CHAIN;
5385 #ifdef STATIC_CHAIN_INCOMING
5386 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5388 static_chain_incoming_rtx = static_chain_rtx;
5392 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5393 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5396 /* Produce exact duplicate of insn INSN after AFTER.
5397 Care updating of libcall regions if present. */
5400 emit_copy_of_insn_after (rtx insn, rtx after)
5403 rtx note1, note2, link;
5405 switch (GET_CODE (insn))
5408 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5412 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5416 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5417 if (CALL_INSN_FUNCTION_USAGE (insn))
5418 CALL_INSN_FUNCTION_USAGE (new)
5419 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5420 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5421 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5428 /* Update LABEL_NUSES. */
5429 mark_jump_label (PATTERN (new), new, 0);
5431 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5433 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5435 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5436 if (REG_NOTE_KIND (link) != REG_LABEL)
5438 if (GET_CODE (link) == EXPR_LIST)
5440 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5445 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5450 /* Fix the libcall sequences. */
5451 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5454 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5456 XEXP (note1, 0) = p;
5457 XEXP (note2, 0) = new;
5459 INSN_CODE (new) = INSN_CODE (insn);
5463 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5465 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5467 if (hard_reg_clobbers[mode][regno])
5468 return hard_reg_clobbers[mode][regno];
5470 return (hard_reg_clobbers[mode][regno] =
5471 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5474 #include "gt-emit-rtl.h"