1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
49 #include "insn-config.h"
55 #include "bc-opcode.h"
56 #include "bc-typecd.h"
64 #ifdef BCDEBUG_PRINT_CODE
67 #include "bc-opname.h"
74 /* Commonly used modes. */
76 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
77 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
78 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
80 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
81 After rtl generation, it is 1 plus the largest register number used. */
83 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
85 /* This is *not* reset after each function. It gives each CODE_LABEL
86 in the entire compilation a unique label number. */
88 static int label_num = 1;
90 /* Lowest label number in current function. */
92 static int first_label_num;
94 /* Highest label number in current function.
95 Zero means use the value of label_num instead.
96 This is nonzero only when belatedly compiling an inline function. */
98 static int last_label_num;
100 /* Value label_num had when set_new_first_and_last_label_number was called.
101 If label_num has not changed since then, last_label_num is valid. */
103 static int base_label_num;
105 /* Nonzero means do not generate NOTEs for source line numbers. */
107 static int no_line_numbers;
109 /* Commonly used rtx's, so that we only need space for one copy.
110 These are initialized once for the entire compilation.
111 All of these except perhaps the floating-point CONST_DOUBLEs
112 are unique; no other rtx-object will be equal to any of these. */
114 rtx pc_rtx; /* (PC) */
115 rtx cc0_rtx; /* (CC0) */
116 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
117 rtx const0_rtx; /* (CONST_INT 0) */
118 rtx const1_rtx; /* (CONST_INT 1) */
119 rtx const2_rtx; /* (CONST_INT 2) */
120 rtx constm1_rtx; /* (CONST_INT -1) */
121 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
123 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
124 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
125 record a copy of const[012]_rtx. */
127 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
129 REAL_VALUE_TYPE dconst0;
130 REAL_VALUE_TYPE dconst1;
131 REAL_VALUE_TYPE dconst2;
132 REAL_VALUE_TYPE dconstm1;
134 /* All references to the following fixed hard registers go through
135 these unique rtl objects. On machines where the frame-pointer and
136 arg-pointer are the same register, they use the same unique object.
138 After register allocation, other rtl objects which used to be pseudo-regs
139 may be clobbered to refer to the frame-pointer register.
140 But references that were originally to the frame-pointer can be
141 distinguished from the others because they contain frame_pointer_rtx.
143 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
144 tricky: until register elimination has taken place hard_frame_pointer_rtx
145 should be used if it is being set, and frame_pointer_rtx otherwise. After
146 register elimination hard_frame_pointer_rtx should always be used.
147 On machines where the two registers are same (most) then these are the
150 In an inline procedure, the stack and frame pointer rtxs may not be
151 used for anything else. */
152 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
153 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
154 rtx hard_frame_pointer_rtx; /* (REG:Pmode HARD_FRAME_POINTER_REGNUM) */
155 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
156 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
157 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
158 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
159 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
160 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
162 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
163 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
164 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
165 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
167 /* We make one copy of (const_int C) where C is in
168 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
169 to save space during the compilation and simplify comparisons of
172 #define MAX_SAVED_CONST_INT 64
174 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
176 /* The ends of the doubly-linked chain of rtl for the current function.
177 Both are reset to null at the start of rtl generation for the function.
179 start_sequence saves both of these on `sequence_stack' along with
180 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
182 static rtx first_insn = NULL;
183 static rtx last_insn = NULL;
185 /* RTL_EXPR within which the current sequence will be placed. Use to
186 prevent reuse of any temporaries within the sequence until after the
187 RTL_EXPR is emitted. */
189 tree sequence_rtl_expr = NULL;
191 /* INSN_UID for next insn emitted.
192 Reset to 1 for each function compiled. */
194 static int cur_insn_uid = 1;
196 /* Line number and source file of the last line-number NOTE emitted.
197 This is used to avoid generating duplicates. */
199 static int last_linenum = 0;
200 static char *last_filename = 0;
202 /* A vector indexed by pseudo reg number. The allocated length
203 of this vector is regno_pointer_flag_length. Since this
204 vector is needed during the expansion phase when the total
205 number of registers in the function is not yet known,
206 it is copied and made bigger when necessary. */
208 char *regno_pointer_flag;
209 int regno_pointer_flag_length;
211 /* Indexed by pseudo register number, gives the rtx for that pseudo.
212 Allocated in parallel with regno_pointer_flag. */
216 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
217 Each element describes one pending sequence.
218 The main insn-chain is saved in the last element of the chain,
219 unless the chain is empty. */
221 struct sequence_stack *sequence_stack;
223 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
224 shortly thrown away. We use two mechanisms to prevent this waste:
226 First, we keep a list of the expressions used to represent the sequence
227 stack in sequence_element_free_list.
229 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
230 rtvec for use by gen_sequence. One entry for each size is sufficient
231 because most cases are calls to gen_sequence followed by immediately
232 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
233 destructive on the insn in it anyway and hence can't be redone.
235 We do not bother to save this cached data over nested function calls.
236 Instead, we just reinitialize them. */
238 #define SEQUENCE_RESULT_SIZE 5
240 static struct sequence_stack *sequence_element_free_list;
241 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
243 extern int rtx_equal_function_value_matters;
245 /* Filename and line number of last line-number note,
246 whether we actually emitted it or not. */
247 extern char *emit_filename;
248 extern int emit_lineno;
250 rtx change_address ();
253 extern struct obstack *rtl_obstack;
255 extern int stack_depth;
256 extern int max_stack_depth;
258 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
260 ** This routine generates an RTX of the size specified by
261 ** <code>, which is an RTX code. The RTX structure is initialized
262 ** from the arguments <element1> through <elementn>, which are
263 ** interpreted according to the specific RTX type's format. The
264 ** special machine mode associated with the rtx (if any) is specified
267 ** gen_rtx can be invoked in a way which resembles the lisp-like
268 ** rtx it will generate. For example, the following rtx structure:
270 ** (plus:QI (mem:QI (reg:SI 1))
271 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
273 ** ...would be generated by the following C code:
275 ** gen_rtx (PLUS, QImode,
276 ** gen_rtx (MEM, QImode,
277 ** gen_rtx (REG, SImode, 1)),
278 ** gen_rtx (MEM, QImode,
279 ** gen_rtx (PLUS, SImode,
280 ** gen_rtx (REG, SImode, 2),
281 ** gen_rtx (REG, SImode, 3)))),
286 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
290 enum machine_mode mode;
293 register int i; /* Array indices... */
294 register char *fmt; /* Current rtx's format... */
295 register rtx rt_val; /* RTX to return to caller... */
300 code = va_arg (p, enum rtx_code);
301 mode = va_arg (p, enum machine_mode);
304 if (code == CONST_INT)
306 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
308 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
309 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
311 if (const_true_rtx && arg == STORE_FLAG_VALUE)
312 return const_true_rtx;
314 rt_val = rtx_alloc (code);
315 INTVAL (rt_val) = arg;
317 else if (code == REG)
319 int regno = va_arg (p, int);
321 /* In case the MD file explicitly references the frame pointer, have
322 all such references point to the same frame pointer. This is used
323 during frame pointer elimination to distinguish the explicit
324 references to these registers from pseudos that happened to be
327 If we have eliminated the frame pointer or arg pointer, we will
328 be using it as a normal register, for example as a spill register.
329 In such cases, we might be accessing it in a mode that is not
330 Pmode and therefore cannot use the pre-allocated rtx.
332 Also don't do this when we are making new REGs in reload,
333 since we don't want to get confused with the real pointers. */
335 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
336 && ! reload_in_progress)
337 return frame_pointer_rtx;
338 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
339 if (hard_frame_pointer_rtx && regno == HARD_FRAME_POINTER_REGNUM
340 && mode == Pmode && ! reload_in_progress)
341 return hard_frame_pointer_rtx;
343 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
344 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
345 && ! reload_in_progress)
346 return arg_pointer_rtx;
348 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
349 && ! reload_in_progress)
350 return stack_pointer_rtx;
353 rt_val = rtx_alloc (code);
355 REGNO (rt_val) = regno;
361 rt_val = rtx_alloc (code); /* Allocate the storage space. */
362 rt_val->mode = mode; /* Store the machine mode... */
364 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
365 for (i = 0; i < GET_RTX_LENGTH (code); i++)
369 case '0': /* Unused field. */
372 case 'i': /* An integer? */
373 XINT (rt_val, i) = va_arg (p, int);
376 case 'w': /* A wide integer? */
377 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
380 case 's': /* A string? */
381 XSTR (rt_val, i) = va_arg (p, char *);
384 case 'e': /* An expression? */
385 case 'u': /* An insn? Same except when printing. */
386 XEXP (rt_val, i) = va_arg (p, rtx);
389 case 'E': /* An RTX vector? */
390 XVEC (rt_val, i) = va_arg (p, rtvec);
399 return rt_val; /* Return the new RTX... */
402 /* gen_rtvec (n, [rt1, ..., rtn])
404 ** This routine creates an rtvec and stores within it the
405 ** pointers to rtx's which are its arguments.
410 gen_rtvec VPROTO((int n, ...))
426 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
428 vector = (rtx *) alloca (n * sizeof (rtx));
430 for (i = 0; i < n; i++)
431 vector[i] = va_arg (p, rtx);
434 return gen_rtvec_v (n, vector);
438 gen_rtvec_v (n, argp)
443 register rtvec rt_val;
446 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
448 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
450 for (i = 0; i < n; i++)
451 rt_val->elem[i].rtx = *argp++;
456 /* Generate a REG rtx for a new pseudo register of mode MODE.
457 This pseudo is assigned the next sequential register number. */
461 enum machine_mode mode;
465 /* Don't let anything called by or after reload create new registers
466 (actually, registers can't be created after flow, but this is a good
469 if (reload_in_progress || reload_completed)
472 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
473 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
475 /* For complex modes, don't make a single pseudo.
476 Instead, make a CONCAT of two pseudos.
477 This allows noncontiguous allocation of the real and imaginary parts,
478 which makes much better code. Besides, allocating DCmode
479 pseudos overstrains reload on some machines like the 386. */
480 rtx realpart, imagpart;
481 int size = GET_MODE_UNIT_SIZE (mode);
482 enum machine_mode partmode
483 = mode_for_size (size * BITS_PER_UNIT,
484 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
485 ? MODE_FLOAT : MODE_INT),
488 realpart = gen_reg_rtx (partmode);
489 imagpart = gen_reg_rtx (partmode);
490 return gen_rtx (CONCAT, mode, realpart, imagpart);
493 /* Make sure regno_pointer_flag and regno_reg_rtx are large
494 enough to have an element for this pseudo reg number. */
496 if (reg_rtx_no == regno_pointer_flag_length)
500 (char *) oballoc (regno_pointer_flag_length * 2);
501 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
502 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
503 regno_pointer_flag = new;
505 new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx));
506 bcopy ((char *) regno_reg_rtx, (char *) new1,
507 regno_pointer_flag_length * sizeof (rtx));
508 bzero ((char *) &new1[regno_pointer_flag_length],
509 regno_pointer_flag_length * sizeof (rtx));
510 regno_reg_rtx = new1;
512 regno_pointer_flag_length *= 2;
515 val = gen_rtx (REG, mode, reg_rtx_no);
516 regno_reg_rtx[reg_rtx_no++] = val;
520 /* Identify REG as a probable pointer register. */
523 mark_reg_pointer (reg)
526 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
529 /* Return 1 plus largest pseudo reg number used in the current function. */
537 /* Return 1 + the largest label number used so far in the current function. */
542 if (last_label_num && label_num == base_label_num)
543 return last_label_num;
547 /* Return first label number used in this function (if any were used). */
550 get_first_label_num ()
552 return first_label_num;
555 /* Return a value representing some low-order bits of X, where the number
556 of low-order bits is given by MODE. Note that no conversion is done
557 between floating-point and fixed-point values, rather, the bit
558 representation is returned.
560 This function handles the cases in common between gen_lowpart, below,
561 and two variants in cse.c and combine.c. These are the cases that can
562 be safely handled at all points in the compilation.
564 If this is not a case we can handle, return 0. */
567 gen_lowpart_common (mode, x)
568 enum machine_mode mode;
573 if (GET_MODE (x) == mode)
576 /* MODE must occupy no more words than the mode of X. */
577 if (GET_MODE (x) != VOIDmode
578 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
579 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
583 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
584 word = ((GET_MODE_SIZE (GET_MODE (x))
585 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
588 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
589 && (GET_MODE_CLASS (mode) == MODE_INT
590 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
592 /* If we are getting the low-order part of something that has been
593 sign- or zero-extended, we can either just use the object being
594 extended or make a narrower extension. If we want an even smaller
595 piece than the size of the object being extended, call ourselves
598 This case is used mostly by combine and cse. */
600 if (GET_MODE (XEXP (x, 0)) == mode)
602 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
603 return gen_lowpart_common (mode, XEXP (x, 0));
604 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
605 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
607 else if (GET_CODE (x) == SUBREG
608 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
609 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
610 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
612 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
613 else if (GET_CODE (x) == REG)
615 /* If the register is not valid for MODE, return 0. If we don't
616 do this, there is no way to fix up the resulting REG later.
617 But we do do this if the current REG is not valid for its
618 mode. This latter is a kludge, but is required due to the
619 way that parameters are passed on some machines, most
621 if (REGNO (x) < FIRST_PSEUDO_REGISTER
622 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
623 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
625 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
626 /* integrate.c can't handle parts of a return value register. */
627 && (! REG_FUNCTION_VALUE_P (x)
628 || ! rtx_equal_function_value_matters)
629 /* We want to keep the stack, frame, and arg pointers
631 && x != frame_pointer_rtx
632 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
633 && x != arg_pointer_rtx
635 && x != stack_pointer_rtx)
636 return gen_rtx (REG, mode, REGNO (x) + word);
638 return gen_rtx (SUBREG, mode, x, word);
640 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
641 from the low-order part of the constant. */
642 else if ((GET_MODE_CLASS (mode) == MODE_INT
643 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
644 && GET_MODE (x) == VOIDmode
645 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
647 /* If MODE is twice the host word size, X is already the desired
648 representation. Otherwise, if MODE is wider than a word, we can't
649 do this. If MODE is exactly a word, return just one CONST_INT.
650 If MODE is smaller than a word, clear the bits that don't belong
651 in our mode, unless they and our sign bit are all one. So we get
652 either a reasonable negative value or a reasonable unsigned value
655 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
657 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
659 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
660 return (GET_CODE (x) == CONST_INT ? x
661 : GEN_INT (CONST_DOUBLE_LOW (x)));
664 /* MODE must be narrower than HOST_BITS_PER_INT. */
665 int width = GET_MODE_BITSIZE (mode);
666 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
667 : CONST_DOUBLE_LOW (x));
669 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
670 != ((HOST_WIDE_INT) (-1) << (width - 1))))
671 val &= ((HOST_WIDE_INT) 1 << width) - 1;
673 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
678 /* If X is an integral constant but we want it in floating-point, it
679 must be the case that we have a union of an integer and a floating-point
680 value. If the machine-parameters allow it, simulate that union here
681 and return the result. The two-word and single-word cases are
684 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
685 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
686 || flag_pretend_float)
687 && GET_MODE_CLASS (mode) == MODE_FLOAT
688 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
689 && GET_CODE (x) == CONST_INT
690 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
691 #ifdef REAL_ARITHMETIC
697 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
698 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
702 union {HOST_WIDE_INT i; float d; } u;
705 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
708 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
709 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
710 || flag_pretend_float)
711 && GET_MODE_CLASS (mode) == MODE_FLOAT
712 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
713 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
714 && GET_MODE (x) == VOIDmode
715 && (sizeof (double) * HOST_BITS_PER_CHAR
716 == 2 * HOST_BITS_PER_WIDE_INT))
717 #ifdef REAL_ARITHMETIC
721 HOST_WIDE_INT low, high;
723 if (GET_CODE (x) == CONST_INT)
724 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
726 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
728 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
730 if (WORDS_BIG_ENDIAN)
731 i[0] = high, i[1] = low;
733 i[0] = low, i[1] = high;
735 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
736 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
740 union {HOST_WIDE_INT i[2]; double d; } u;
741 HOST_WIDE_INT low, high;
743 if (GET_CODE (x) == CONST_INT)
744 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
746 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
748 #ifdef HOST_WORDS_BIG_ENDIAN
749 u.i[0] = high, u.i[1] = low;
751 u.i[0] = low, u.i[1] = high;
754 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
757 /* Similarly, if this is converting a floating-point value into a
758 single-word integer. Only do this is the host and target parameters are
761 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
762 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
763 || flag_pretend_float)
764 && (GET_MODE_CLASS (mode) == MODE_INT
765 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
766 && GET_CODE (x) == CONST_DOUBLE
767 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
768 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
769 return operand_subword (x, 0, 0, GET_MODE (x));
771 /* Similarly, if this is converting a floating-point value into a
772 two-word integer, we can do this one word at a time and make an
773 integer. Only do this is the host and target parameters are
776 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
777 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
778 || flag_pretend_float)
779 && (GET_MODE_CLASS (mode) == MODE_INT
780 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
781 && GET_CODE (x) == CONST_DOUBLE
782 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
783 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
785 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
786 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
788 if (lowpart && GET_CODE (lowpart) == CONST_INT
789 && highpart && GET_CODE (highpart) == CONST_INT)
790 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
793 /* Otherwise, we can't do this. */
797 /* Return the real part (which has mode MODE) of a complex value X.
798 This always comes at the low address in memory. */
801 gen_realpart (mode, x)
802 enum machine_mode mode;
805 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
807 else if (WORDS_BIG_ENDIAN)
808 return gen_highpart (mode, x);
810 return gen_lowpart (mode, x);
813 /* Return the imaginary part (which has mode MODE) of a complex value X.
814 This always comes at the high address in memory. */
817 gen_imagpart (mode, x)
818 enum machine_mode mode;
821 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
823 else if (WORDS_BIG_ENDIAN)
824 return gen_lowpart (mode, x);
826 return gen_highpart (mode, x);
829 /* Return 1 iff X, assumed to be a SUBREG,
830 refers to the real part of the complex value in its containing reg.
831 Complex values are always stored with the real part in the first word,
832 regardless of WORDS_BIG_ENDIAN. */
835 subreg_realpart_p (x)
838 if (GET_CODE (x) != SUBREG)
841 return SUBREG_WORD (x) == 0;
844 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
845 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
846 least-significant part of X.
847 MODE specifies how big a part of X to return;
848 it usually should not be larger than a word.
849 If X is a MEM whose address is a QUEUED, the value may be so also. */
852 gen_lowpart (mode, x)
853 enum machine_mode mode;
856 rtx result = gen_lowpart_common (mode, x);
860 else if (GET_CODE (x) == REG)
862 /* Must be a hard reg that's not valid in MODE. */
863 result = gen_lowpart_common (mode, copy_to_reg (x));
867 else if (GET_CODE (x) == MEM)
869 /* The only additional case we can do is MEM. */
870 register int offset = 0;
871 if (WORDS_BIG_ENDIAN)
872 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
873 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
875 if (BYTES_BIG_ENDIAN)
876 /* Adjust the address so that the address-after-the-data
878 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
879 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
881 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
887 /* Like `gen_lowpart', but refer to the most significant part.
888 This is used to access the imaginary part of a complex number. */
891 gen_highpart (mode, x)
892 enum machine_mode mode;
895 /* This case loses if X is a subreg. To catch bugs early,
896 complain if an invalid MODE is used even in other cases. */
897 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
898 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
900 if (GET_CODE (x) == CONST_DOUBLE
901 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
902 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
905 return gen_rtx (CONST_INT, VOIDmode,
906 CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
907 else if (GET_CODE (x) == CONST_INT)
909 else if (GET_CODE (x) == MEM)
911 register int offset = 0;
912 if (! WORDS_BIG_ENDIAN)
913 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
914 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
916 if (! BYTES_BIG_ENDIAN
917 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
918 offset -= (GET_MODE_SIZE (mode)
919 - MIN (UNITS_PER_WORD,
920 GET_MODE_SIZE (GET_MODE (x))));
922 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
924 else if (GET_CODE (x) == SUBREG)
926 /* The only time this should occur is when we are looking at a
927 multi-word item with a SUBREG whose mode is the same as that of the
928 item. It isn't clear what we would do if it wasn't. */
929 if (SUBREG_WORD (x) != 0)
931 return gen_highpart (mode, SUBREG_REG (x));
933 else if (GET_CODE (x) == REG)
937 if (! WORDS_BIG_ENDIAN
938 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
939 word = ((GET_MODE_SIZE (GET_MODE (x))
940 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
944 * ??? This fails miserably for complex values being passed in registers
945 * where the sizeof the real and imaginary part are not equal to the
946 * sizeof SImode. FIXME
949 if (REGNO (x) < FIRST_PSEUDO_REGISTER
950 /* integrate.c can't handle parts of a return value register. */
951 && (! REG_FUNCTION_VALUE_P (x)
952 || ! rtx_equal_function_value_matters)
953 /* We want to keep the stack, frame, and arg pointers special. */
954 && x != frame_pointer_rtx
955 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
956 && x != arg_pointer_rtx
958 && x != stack_pointer_rtx)
959 return gen_rtx (REG, mode, REGNO (x) + word);
961 return gen_rtx (SUBREG, mode, x, word);
967 /* Return 1 iff X, assumed to be a SUBREG,
968 refers to the least significant part of its containing reg.
969 If X is not a SUBREG, always return 1 (it is its own low part!). */
975 if (GET_CODE (x) != SUBREG)
979 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
980 return (SUBREG_WORD (x)
981 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
982 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
985 return SUBREG_WORD (x) == 0;
988 /* Return subword I of operand OP.
989 The word number, I, is interpreted as the word number starting at the
990 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
991 otherwise it is the high-order word.
993 If we cannot extract the required word, we return zero. Otherwise, an
994 rtx corresponding to the requested word will be returned.
996 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
997 reload has completed, a valid address will always be returned. After
998 reload, if a valid address cannot be returned, we return zero.
1000 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1001 it is the responsibility of the caller.
1003 MODE is the mode of OP in case it is a CONST_INT. */
1006 operand_subword (op, i, validate_address, mode)
1009 int validate_address;
1010 enum machine_mode mode;
1013 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1015 if (mode == VOIDmode)
1016 mode = GET_MODE (op);
1018 if (mode == VOIDmode)
1021 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1023 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1024 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1027 /* If OP is already an integer word, return it. */
1028 if (GET_MODE_CLASS (mode) == MODE_INT
1029 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1032 /* If OP is a REG or SUBREG, we can handle it very simply. */
1033 if (GET_CODE (op) == REG)
1035 /* If the register is not valid for MODE, return 0. If we don't
1036 do this, there is no way to fix up the resulting REG later. */
1037 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1038 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1040 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1041 || (REG_FUNCTION_VALUE_P (op)
1042 && rtx_equal_function_value_matters)
1043 /* We want to keep the stack, frame, and arg pointers
1045 || op == frame_pointer_rtx
1046 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1047 || op == arg_pointer_rtx
1049 || op == stack_pointer_rtx)
1050 return gen_rtx (SUBREG, word_mode, op, i);
1052 return gen_rtx (REG, word_mode, REGNO (op) + i);
1054 else if (GET_CODE (op) == SUBREG)
1055 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1056 else if (GET_CODE (op) == CONCAT)
1058 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1060 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1061 return operand_subword (XEXP (op, 1), i - partwords,
1062 validate_address, mode);
1065 /* Form a new MEM at the requested address. */
1066 if (GET_CODE (op) == MEM)
1068 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1071 if (validate_address)
1073 if (reload_completed)
1075 if (! strict_memory_address_p (word_mode, addr))
1079 addr = memory_address (word_mode, addr);
1082 new = gen_rtx (MEM, word_mode, addr);
1084 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1085 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1086 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1091 /* The only remaining cases are when OP is a constant. If the host and
1092 target floating formats are the same, handling two-word floating
1093 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1094 are defined as returning one or two 32 bit values, respectively,
1095 and not values of BITS_PER_WORD bits. */
1096 #ifdef REAL_ARITHMETIC
1097 /* The output is some bits, the width of the target machine's word.
1098 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1100 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1101 && GET_MODE_CLASS (mode) == MODE_FLOAT
1102 && GET_MODE_BITSIZE (mode) == 64
1103 && GET_CODE (op) == CONST_DOUBLE)
1108 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1109 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1111 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1112 which the words are written depends on the word endianness.
1114 ??? This is a potential portability problem and should
1115 be fixed at some point. */
1116 if (BITS_PER_WORD == 32)
1117 return GEN_INT ((HOST_WIDE_INT) k[i]);
1118 #if HOST_BITS_PER_WIDE_INT > 32
1119 else if (BITS_PER_WORD >= 64 && i == 0)
1120 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1121 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1123 else if (BITS_PER_WORD == 16)
1130 return GEN_INT ((HOST_WIDE_INT) value);
1135 #else /* no REAL_ARITHMETIC */
1136 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1137 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1138 || flag_pretend_float)
1139 && GET_MODE_CLASS (mode) == MODE_FLOAT
1140 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1141 && GET_CODE (op) == CONST_DOUBLE)
1143 /* The constant is stored in the host's word-ordering,
1144 but we want to access it in the target's word-ordering. Some
1145 compilers don't like a conditional inside macro args, so we have two
1146 copies of the return. */
1147 #ifdef HOST_WORDS_BIG_ENDIAN
1148 return GEN_INT (i == WORDS_BIG_ENDIAN
1149 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1151 return GEN_INT (i != WORDS_BIG_ENDIAN
1152 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1155 #endif /* no REAL_ARITHMETIC */
1157 /* Single word float is a little harder, since single- and double-word
1158 values often do not have the same high-order bits. We have already
1159 verified that we want the only defined word of the single-word value. */
1160 #ifdef REAL_ARITHMETIC
1161 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1162 && GET_MODE_BITSIZE (mode) == 32
1163 && GET_CODE (op) == CONST_DOUBLE)
1168 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1169 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1170 return GEN_INT ((HOST_WIDE_INT) l);
1173 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1174 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1175 || flag_pretend_float)
1176 && GET_MODE_CLASS (mode) == MODE_FLOAT
1177 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1178 && GET_CODE (op) == CONST_DOUBLE)
1181 union {float f; HOST_WIDE_INT i; } u;
1183 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1186 return GEN_INT (u.i);
1188 #endif /* no REAL_ARITHMETIC */
1190 /* The only remaining cases that we can handle are integers.
1191 Convert to proper endianness now since these cases need it.
1192 At this point, i == 0 means the low-order word.
1194 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1195 in general. However, if OP is (const_int 0), we can just return
1198 if (op == const0_rtx)
1201 if (GET_MODE_CLASS (mode) != MODE_INT
1202 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1203 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1206 if (WORDS_BIG_ENDIAN)
1207 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1209 /* Find out which word on the host machine this value is in and get
1210 it from the constant. */
1211 val = (i / size_ratio == 0
1212 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1213 : (GET_CODE (op) == CONST_INT
1214 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1216 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1217 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1218 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
1219 & (((HOST_WIDE_INT) 1
1220 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
1222 return GEN_INT (val);
1225 /* Similar to `operand_subword', but never return 0. If we can't extract
1226 the required subword, put OP into a register and try again. If that fails,
1227 abort. We always validate the address in this case. It is not valid
1228 to call this function after reload; it is mostly meant for RTL
1231 MODE is the mode of OP, in case it is CONST_INT. */
1234 operand_subword_force (op, i, mode)
1237 enum machine_mode mode;
1239 rtx result = operand_subword (op, i, 1, mode);
1244 if (mode != BLKmode && mode != VOIDmode)
1245 op = force_reg (mode, op);
1247 result = operand_subword (op, i, 1, mode);
1254 /* Given a compare instruction, swap the operands.
1255 A test instruction is changed into a compare of 0 against the operand. */
1258 reverse_comparison (insn)
1261 rtx body = PATTERN (insn);
1264 if (GET_CODE (body) == SET)
1265 comp = SET_SRC (body);
1267 comp = SET_SRC (XVECEXP (body, 0, 0));
1269 if (GET_CODE (comp) == COMPARE)
1271 rtx op0 = XEXP (comp, 0);
1272 rtx op1 = XEXP (comp, 1);
1273 XEXP (comp, 0) = op1;
1274 XEXP (comp, 1) = op0;
1278 rtx new = gen_rtx (COMPARE, VOIDmode,
1279 CONST0_RTX (GET_MODE (comp)), comp);
1280 if (GET_CODE (body) == SET)
1281 SET_SRC (body) = new;
1283 SET_SRC (XVECEXP (body, 0, 0)) = new;
1287 /* Return a memory reference like MEMREF, but with its mode changed
1288 to MODE and its address changed to ADDR.
1289 (VOIDmode means don't change the mode.
1290 NULL for ADDR means don't change the address.) */
1293 change_address (memref, mode, addr)
1295 enum machine_mode mode;
1300 if (GET_CODE (memref) != MEM)
1302 if (mode == VOIDmode)
1303 mode = GET_MODE (memref);
1305 addr = XEXP (memref, 0);
1307 /* If reload is in progress or has completed, ADDR must be valid.
1308 Otherwise, we can call memory_address to make it valid. */
1309 if (reload_completed || reload_in_progress)
1311 if (! memory_address_p (mode, addr))
1315 addr = memory_address (mode, addr);
1317 new = gen_rtx (MEM, mode, addr);
1318 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1319 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1320 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1324 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1331 label = (output_bytecode
1332 ? gen_rtx (CODE_LABEL, VOIDmode, NULL, bc_get_bytecode_label ())
1333 : gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, label_num++, NULL_PTR));
1335 LABEL_NUSES (label) = 0;
1339 /* For procedure integration. */
1341 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1342 from a permanent obstack when the opportunity arises. */
1345 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1346 last_labelno, max_parm_regnum, max_regnum, args_size,
1347 pops_args, stack_slots, forced_labels, function_flags,
1348 outgoing_args_size, original_arg_vector,
1349 original_decl_initial)
1350 rtx first_insn, first_parm_insn;
1351 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1356 int outgoing_args_size;
1357 rtvec original_arg_vector;
1358 rtx original_decl_initial;
1360 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
1361 cur_insn_uid++, NULL_RTX,
1362 first_insn, first_parm_insn,
1363 first_labelno, last_labelno,
1364 max_parm_regnum, max_regnum, args_size, pops_args,
1365 stack_slots, forced_labels, function_flags,
1367 original_arg_vector, original_decl_initial);
1371 /* Install new pointers to the first and last insns in the chain.
1372 Used for an inline-procedure after copying the insn chain. */
1375 set_new_first_and_last_insn (first, last)
1382 /* Set the range of label numbers found in the current function.
1383 This is used when belatedly compiling an inline function. */
1386 set_new_first_and_last_label_num (first, last)
1389 base_label_num = label_num;
1390 first_label_num = first;
1391 last_label_num = last;
1394 /* Save all variables describing the current status into the structure *P.
1395 This is used before starting a nested function. */
1398 save_emit_status (p)
1401 p->reg_rtx_no = reg_rtx_no;
1402 p->first_label_num = first_label_num;
1403 p->first_insn = first_insn;
1404 p->last_insn = last_insn;
1405 p->sequence_rtl_expr = sequence_rtl_expr;
1406 p->sequence_stack = sequence_stack;
1407 p->cur_insn_uid = cur_insn_uid;
1408 p->last_linenum = last_linenum;
1409 p->last_filename = last_filename;
1410 p->regno_pointer_flag = regno_pointer_flag;
1411 p->regno_pointer_flag_length = regno_pointer_flag_length;
1412 p->regno_reg_rtx = regno_reg_rtx;
1415 /* Restore all variables describing the current status from the structure *P.
1416 This is used after a nested function. */
1419 restore_emit_status (p)
1424 reg_rtx_no = p->reg_rtx_no;
1425 first_label_num = p->first_label_num;
1427 first_insn = p->first_insn;
1428 last_insn = p->last_insn;
1429 sequence_rtl_expr = p->sequence_rtl_expr;
1430 sequence_stack = p->sequence_stack;
1431 cur_insn_uid = p->cur_insn_uid;
1432 last_linenum = p->last_linenum;
1433 last_filename = p->last_filename;
1434 regno_pointer_flag = p->regno_pointer_flag;
1435 regno_pointer_flag_length = p->regno_pointer_flag_length;
1436 regno_reg_rtx = p->regno_reg_rtx;
1438 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1439 sequence_element_free_list = 0;
1440 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1441 sequence_result[i] = 0;
1444 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1445 It does not work to do this twice, because the mark bits set here
1446 are not cleared afterwards. */
1449 unshare_all_rtl (insn)
1452 for (; insn; insn = NEXT_INSN (insn))
1453 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1454 || GET_CODE (insn) == CALL_INSN)
1456 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1457 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1458 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1461 /* Make sure the addresses of stack slots found outside the insn chain
1462 (such as, in DECL_RTL of a variable) are not shared
1463 with the insn chain.
1465 This special care is necessary when the stack slot MEM does not
1466 actually appear in the insn chain. If it does appear, its address
1467 is unshared from all else at that point. */
1469 copy_rtx_if_shared (stack_slot_list);
1472 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1473 Recursively does the same for subexpressions. */
1476 copy_rtx_if_shared (orig)
1479 register rtx x = orig;
1481 register enum rtx_code code;
1482 register char *format_ptr;
1488 code = GET_CODE (x);
1490 /* These types may be freely shared. */
1503 /* SCRATCH must be shared because they represent distinct values. */
1507 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1508 a LABEL_REF, it isn't sharable. */
1509 if (GET_CODE (XEXP (x, 0)) == PLUS
1510 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1511 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1520 /* The chain of insns is not being copied. */
1524 /* A MEM is allowed to be shared if its address is constant
1525 or is a constant plus one of the special registers. */
1526 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1527 || XEXP (x, 0) == virtual_stack_vars_rtx
1528 || XEXP (x, 0) == virtual_incoming_args_rtx)
1531 if (GET_CODE (XEXP (x, 0)) == PLUS
1532 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1533 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1534 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1536 /* This MEM can appear in more than one place,
1537 but its address better not be shared with anything else. */
1539 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1545 /* This rtx may not be shared. If it has already been seen,
1546 replace it with a copy of itself. */
1552 copy = rtx_alloc (code);
1553 bcopy ((char *) x, (char *) copy,
1554 (sizeof (*copy) - sizeof (copy->fld)
1555 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1561 /* Now scan the subexpressions recursively.
1562 We can store any replaced subexpressions directly into X
1563 since we know X is not shared! Any vectors in X
1564 must be copied if X was copied. */
1566 format_ptr = GET_RTX_FORMAT (code);
1568 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1570 switch (*format_ptr++)
1573 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1577 if (XVEC (x, i) != NULL)
1580 int len = XVECLEN (x, i);
1582 if (copied && len > 0)
1583 XVEC (x, i) = gen_rtvec_v (len, &XVECEXP (x, i, 0));
1584 for (j = 0; j < len; j++)
1585 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1593 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1594 to look for shared sub-parts. */
1597 reset_used_flags (x)
1601 register enum rtx_code code;
1602 register char *format_ptr;
1607 code = GET_CODE (x);
1609 /* These types may be freely shared so we needn't do any resetting
1630 /* The chain of insns is not being copied. */
1636 format_ptr = GET_RTX_FORMAT (code);
1637 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1639 switch (*format_ptr++)
1642 reset_used_flags (XEXP (x, i));
1646 for (j = 0; j < XVECLEN (x, i); j++)
1647 reset_used_flags (XVECEXP (x, i, j));
1653 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1654 Return X or the rtx for the pseudo reg the value of X was copied into.
1655 OTHER must be valid as a SET_DEST. */
1658 make_safe_from (x, other)
1662 switch (GET_CODE (other))
1665 other = SUBREG_REG (other);
1667 case STRICT_LOW_PART:
1670 other = XEXP (other, 0);
1676 if ((GET_CODE (other) == MEM
1678 && GET_CODE (x) != REG
1679 && GET_CODE (x) != SUBREG)
1680 || (GET_CODE (other) == REG
1681 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1682 || reg_mentioned_p (other, x))))
1684 rtx temp = gen_reg_rtx (GET_MODE (x));
1685 emit_move_insn (temp, x);
1691 /* Emission of insns (adding them to the doubly-linked list). */
1693 /* Return the first insn of the current sequence or current function. */
1701 /* Return the last insn emitted in current sequence or current function. */
1709 /* Specify a new insn as the last in the chain. */
1712 set_last_insn (insn)
1715 if (NEXT_INSN (insn) != 0)
1720 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1723 get_last_insn_anywhere ()
1725 struct sequence_stack *stack;
1728 for (stack = sequence_stack; stack; stack = stack->next)
1729 if (stack->last != 0)
1734 /* Return a number larger than any instruction's uid in this function. */
1739 return cur_insn_uid;
1742 /* Return the next insn. If it is a SEQUENCE, return the first insn
1751 insn = NEXT_INSN (insn);
1752 if (insn && GET_CODE (insn) == INSN
1753 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1754 insn = XVECEXP (PATTERN (insn), 0, 0);
1760 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1764 previous_insn (insn)
1769 insn = PREV_INSN (insn);
1770 if (insn && GET_CODE (insn) == INSN
1771 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1772 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1778 /* Return the next insn after INSN that is not a NOTE. This routine does not
1779 look inside SEQUENCEs. */
1782 next_nonnote_insn (insn)
1787 insn = NEXT_INSN (insn);
1788 if (insn == 0 || GET_CODE (insn) != NOTE)
1795 /* Return the previous insn before INSN that is not a NOTE. This routine does
1796 not look inside SEQUENCEs. */
1799 prev_nonnote_insn (insn)
1804 insn = PREV_INSN (insn);
1805 if (insn == 0 || GET_CODE (insn) != NOTE)
1812 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1813 or 0, if there is none. This routine does not look inside
1817 next_real_insn (insn)
1822 insn = NEXT_INSN (insn);
1823 if (insn == 0 || GET_CODE (insn) == INSN
1824 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1831 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1832 or 0, if there is none. This routine does not look inside
1836 prev_real_insn (insn)
1841 insn = PREV_INSN (insn);
1842 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1843 || GET_CODE (insn) == JUMP_INSN)
1850 /* Find the next insn after INSN that really does something. This routine
1851 does not look inside SEQUENCEs. Until reload has completed, this is the
1852 same as next_real_insn. */
1855 next_active_insn (insn)
1860 insn = NEXT_INSN (insn);
1862 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1863 || (GET_CODE (insn) == INSN
1864 && (! reload_completed
1865 || (GET_CODE (PATTERN (insn)) != USE
1866 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1873 /* Find the last insn before INSN that really does something. This routine
1874 does not look inside SEQUENCEs. Until reload has completed, this is the
1875 same as prev_real_insn. */
1878 prev_active_insn (insn)
1883 insn = PREV_INSN (insn);
1885 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1886 || (GET_CODE (insn) == INSN
1887 && (! reload_completed
1888 || (GET_CODE (PATTERN (insn)) != USE
1889 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1896 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1904 insn = NEXT_INSN (insn);
1905 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1912 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1920 insn = PREV_INSN (insn);
1921 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1929 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1930 and REG_CC_USER notes so we can find it. */
1933 link_cc0_insns (insn)
1936 rtx user = next_nonnote_insn (insn);
1938 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
1939 user = XVECEXP (PATTERN (user), 0, 0);
1941 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
1943 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
1946 /* Return the next insn that uses CC0 after INSN, which is assumed to
1947 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1948 applied to the result of this function should yield INSN).
1950 Normally, this is simply the next insn. However, if a REG_CC_USER note
1951 is present, it contains the insn that uses CC0.
1953 Return 0 if we can't find the insn. */
1956 next_cc0_user (insn)
1959 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
1962 return XEXP (note, 0);
1964 insn = next_nonnote_insn (insn);
1965 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1966 insn = XVECEXP (PATTERN (insn), 0, 0);
1968 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1969 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
1975 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1976 note, it is the previous insn. */
1979 prev_cc0_setter (insn)
1982 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1986 return XEXP (note, 0);
1988 insn = prev_nonnote_insn (insn);
1989 if (! sets_cc0_p (PATTERN (insn)))
1996 /* Try splitting insns that can be split for better scheduling.
1997 PAT is the pattern which might split.
1998 TRIAL is the insn providing PAT.
1999 LAST is non-zero if we should return the last insn of the sequence produced.
2001 If this routine succeeds in splitting, it returns the first or last
2002 replacement insn depending on the value of LAST. Otherwise, it
2003 returns TRIAL. If the insn to be returned can be split, it will be. */
2006 try_split (pat, trial, last)
2010 rtx before = PREV_INSN (trial);
2011 rtx after = NEXT_INSN (trial);
2012 rtx seq = split_insns (pat, trial);
2013 int has_barrier = 0;
2016 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2017 We may need to handle this specially. */
2018 if (after && GET_CODE (after) == BARRIER)
2021 after = NEXT_INSN (after);
2026 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2027 The latter case will normally arise only when being done so that
2028 it, in turn, will be split (SFmode on the 29k is an example). */
2029 if (GET_CODE (seq) == SEQUENCE)
2031 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2032 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2033 increment the usage count so we don't delete the label. */
2036 if (GET_CODE (trial) == JUMP_INSN)
2037 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2038 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2040 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2042 if (JUMP_LABEL (trial))
2043 LABEL_NUSES (JUMP_LABEL (trial))++;
2046 tem = emit_insn_after (seq, before);
2048 delete_insn (trial);
2050 emit_barrier_after (tem);
2052 /* Recursively call try_split for each new insn created; by the
2053 time control returns here that insn will be fully split, so
2054 set LAST and continue from the insn after the one returned.
2055 We can't use next_active_insn here since AFTER may be a note.
2056 Ignore deleted insns, which can be occur if not optimizing. */
2057 for (tem = NEXT_INSN (before); tem != after;
2058 tem = NEXT_INSN (tem))
2059 if (! INSN_DELETED_P (tem))
2060 tem = try_split (PATTERN (tem), tem, 1);
2062 /* Avoid infinite loop if the result matches the original pattern. */
2063 else if (rtx_equal_p (seq, pat))
2067 PATTERN (trial) = seq;
2068 INSN_CODE (trial) = -1;
2069 try_split (seq, trial, last);
2072 /* Return either the first or the last insn, depending on which was
2074 return last ? prev_active_insn (after) : next_active_insn (before);
2080 /* Make and return an INSN rtx, initializing all its slots.
2081 Store PATTERN in the pattern slots. */
2084 make_insn_raw (pattern)
2089 insn = rtx_alloc (INSN);
2090 INSN_UID (insn) = cur_insn_uid++;
2092 PATTERN (insn) = pattern;
2093 INSN_CODE (insn) = -1;
2094 LOG_LINKS (insn) = NULL;
2095 REG_NOTES (insn) = NULL;
2100 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2103 make_jump_insn_raw (pattern)
2108 insn = rtx_alloc (JUMP_INSN);
2109 INSN_UID (insn) = cur_insn_uid++;
2111 PATTERN (insn) = pattern;
2112 INSN_CODE (insn) = -1;
2113 LOG_LINKS (insn) = NULL;
2114 REG_NOTES (insn) = NULL;
2115 JUMP_LABEL (insn) = NULL;
2120 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2123 make_call_insn_raw (pattern)
2128 insn = rtx_alloc (CALL_INSN);
2129 INSN_UID (insn) = cur_insn_uid++;
2131 PATTERN (insn) = pattern;
2132 INSN_CODE (insn) = -1;
2133 LOG_LINKS (insn) = NULL;
2134 REG_NOTES (insn) = NULL;
2135 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2140 /* Add INSN to the end of the doubly-linked list.
2141 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2147 PREV_INSN (insn) = last_insn;
2148 NEXT_INSN (insn) = 0;
2150 if (NULL != last_insn)
2151 NEXT_INSN (last_insn) = insn;
2153 if (NULL == first_insn)
2159 /* Add INSN into the doubly-linked list after insn AFTER. This and
2160 the next should be the only functions called to insert an insn once
2161 delay slots have been filled since only they know how to update a
2165 add_insn_after (insn, after)
2168 rtx next = NEXT_INSN (after);
2170 if (optimize && INSN_DELETED_P (after))
2173 NEXT_INSN (insn) = next;
2174 PREV_INSN (insn) = after;
2178 PREV_INSN (next) = insn;
2179 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2180 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2182 else if (last_insn == after)
2186 struct sequence_stack *stack = sequence_stack;
2187 /* Scan all pending sequences too. */
2188 for (; stack; stack = stack->next)
2189 if (after == stack->last)
2199 NEXT_INSN (after) = insn;
2200 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2202 rtx sequence = PATTERN (after);
2203 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2207 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2208 the previous should be the only functions called to insert an insn once
2209 delay slots have been filled since only they know how to update a
2213 add_insn_before (insn, before)
2216 rtx prev = PREV_INSN (before);
2218 if (optimize && INSN_DELETED_P (before))
2221 PREV_INSN (insn) = prev;
2222 NEXT_INSN (insn) = before;
2226 NEXT_INSN (prev) = insn;
2227 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2229 rtx sequence = PATTERN (prev);
2230 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2233 else if (first_insn == before)
2237 struct sequence_stack *stack = sequence_stack;
2238 /* Scan all pending sequences too. */
2239 for (; stack; stack = stack->next)
2240 if (before == stack->first)
2242 stack->first = insn;
2250 PREV_INSN (before) = insn;
2251 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2252 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2255 /* Delete all insns made since FROM.
2256 FROM becomes the new last instruction. */
2259 delete_insns_since (from)
2265 NEXT_INSN (from) = 0;
2269 /* This function is deprecated, please use sequences instead.
2271 Move a consecutive bunch of insns to a different place in the chain.
2272 The insns to be moved are those between FROM and TO.
2273 They are moved to a new position after the insn AFTER.
2274 AFTER must not be FROM or TO or any insn in between.
2276 This function does not know about SEQUENCEs and hence should not be
2277 called after delay-slot filling has been done. */
2280 reorder_insns (from, to, after)
2281 rtx from, to, after;
2283 /* Splice this bunch out of where it is now. */
2284 if (PREV_INSN (from))
2285 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2287 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2288 if (last_insn == to)
2289 last_insn = PREV_INSN (from);
2290 if (first_insn == from)
2291 first_insn = NEXT_INSN (to);
2293 /* Make the new neighbors point to it and it to them. */
2294 if (NEXT_INSN (after))
2295 PREV_INSN (NEXT_INSN (after)) = to;
2297 NEXT_INSN (to) = NEXT_INSN (after);
2298 PREV_INSN (from) = after;
2299 NEXT_INSN (after) = from;
2300 if (after == last_insn)
2304 /* Return the line note insn preceding INSN. */
2307 find_line_note (insn)
2310 if (no_line_numbers)
2313 for (; insn; insn = PREV_INSN (insn))
2314 if (GET_CODE (insn) == NOTE
2315 && NOTE_LINE_NUMBER (insn) >= 0)
2321 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2322 of the moved insns when debugging. This may insert a note between AFTER
2323 and FROM, and another one after TO. */
2326 reorder_insns_with_line_notes (from, to, after)
2327 rtx from, to, after;
2329 rtx from_line = find_line_note (from);
2330 rtx after_line = find_line_note (after);
2332 reorder_insns (from, to, after);
2334 if (from_line == after_line)
2338 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2339 NOTE_LINE_NUMBER (from_line),
2342 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2343 NOTE_LINE_NUMBER (after_line),
2347 /* Emit an insn of given code and pattern
2348 at a specified place within the doubly-linked list. */
2350 /* Make an instruction with body PATTERN
2351 and output it before the instruction BEFORE. */
2354 emit_insn_before (pattern, before)
2355 register rtx pattern, before;
2357 register rtx insn = before;
2359 if (GET_CODE (pattern) == SEQUENCE)
2363 for (i = 0; i < XVECLEN (pattern, 0); i++)
2365 insn = XVECEXP (pattern, 0, i);
2366 add_insn_before (insn, before);
2368 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2369 sequence_result[XVECLEN (pattern, 0)] = pattern;
2373 insn = make_insn_raw (pattern);
2374 add_insn_before (insn, before);
2380 /* Make an instruction with body PATTERN and code JUMP_INSN
2381 and output it before the instruction BEFORE. */
2384 emit_jump_insn_before (pattern, before)
2385 register rtx pattern, before;
2389 if (GET_CODE (pattern) == SEQUENCE)
2390 insn = emit_insn_before (pattern, before);
2393 insn = make_jump_insn_raw (pattern);
2394 add_insn_before (insn, before);
2400 /* Make an instruction with body PATTERN and code CALL_INSN
2401 and output it before the instruction BEFORE. */
2404 emit_call_insn_before (pattern, before)
2405 register rtx pattern, before;
2409 if (GET_CODE (pattern) == SEQUENCE)
2410 insn = emit_insn_before (pattern, before);
2413 insn = make_call_insn_raw (pattern);
2414 add_insn_before (insn, before);
2415 PUT_CODE (insn, CALL_INSN);
2421 /* Make an insn of code BARRIER
2422 and output it before the insn AFTER. */
2425 emit_barrier_before (before)
2426 register rtx before;
2428 register rtx insn = rtx_alloc (BARRIER);
2430 INSN_UID (insn) = cur_insn_uid++;
2432 add_insn_before (insn, before);
2436 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2439 emit_note_before (subtype, before)
2443 register rtx note = rtx_alloc (NOTE);
2444 INSN_UID (note) = cur_insn_uid++;
2445 NOTE_SOURCE_FILE (note) = 0;
2446 NOTE_LINE_NUMBER (note) = subtype;
2448 add_insn_before (note, before);
2452 /* Make an insn of code INSN with body PATTERN
2453 and output it after the insn AFTER. */
2456 emit_insn_after (pattern, after)
2457 register rtx pattern, after;
2459 register rtx insn = after;
2461 if (GET_CODE (pattern) == SEQUENCE)
2465 for (i = 0; i < XVECLEN (pattern, 0); i++)
2467 insn = XVECEXP (pattern, 0, i);
2468 add_insn_after (insn, after);
2471 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2472 sequence_result[XVECLEN (pattern, 0)] = pattern;
2476 insn = make_insn_raw (pattern);
2477 add_insn_after (insn, after);
2483 /* Similar to emit_insn_after, except that line notes are to be inserted so
2484 as to act as if this insn were at FROM. */
2487 emit_insn_after_with_line_notes (pattern, after, from)
2488 rtx pattern, after, from;
2490 rtx from_line = find_line_note (from);
2491 rtx after_line = find_line_note (after);
2492 rtx insn = emit_insn_after (pattern, after);
2495 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2496 NOTE_LINE_NUMBER (from_line),
2500 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2501 NOTE_LINE_NUMBER (after_line),
2505 /* Make an insn of code JUMP_INSN with body PATTERN
2506 and output it after the insn AFTER. */
2509 emit_jump_insn_after (pattern, after)
2510 register rtx pattern, after;
2514 if (GET_CODE (pattern) == SEQUENCE)
2515 insn = emit_insn_after (pattern, after);
2518 insn = make_jump_insn_raw (pattern);
2519 add_insn_after (insn, after);
2525 /* Make an insn of code BARRIER
2526 and output it after the insn AFTER. */
2529 emit_barrier_after (after)
2532 register rtx insn = rtx_alloc (BARRIER);
2534 INSN_UID (insn) = cur_insn_uid++;
2536 add_insn_after (insn, after);
2540 /* Emit the label LABEL after the insn AFTER. */
2543 emit_label_after (label, after)
2546 /* This can be called twice for the same label
2547 as a result of the confusion that follows a syntax error!
2548 So make it harmless. */
2549 if (INSN_UID (label) == 0)
2551 INSN_UID (label) = cur_insn_uid++;
2552 add_insn_after (label, after);
2558 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2561 emit_note_after (subtype, after)
2565 register rtx note = rtx_alloc (NOTE);
2566 INSN_UID (note) = cur_insn_uid++;
2567 NOTE_SOURCE_FILE (note) = 0;
2568 NOTE_LINE_NUMBER (note) = subtype;
2569 add_insn_after (note, after);
2573 /* Emit a line note for FILE and LINE after the insn AFTER. */
2576 emit_line_note_after (file, line, after)
2583 if (no_line_numbers && line > 0)
2589 note = rtx_alloc (NOTE);
2590 INSN_UID (note) = cur_insn_uid++;
2591 NOTE_SOURCE_FILE (note) = file;
2592 NOTE_LINE_NUMBER (note) = line;
2593 add_insn_after (note, after);
2597 /* Make an insn of code INSN with pattern PATTERN
2598 and add it to the end of the doubly-linked list.
2599 If PATTERN is a SEQUENCE, take the elements of it
2600 and emit an insn for each element.
2602 Returns the last insn emitted. */
2608 rtx insn = last_insn;
2610 if (GET_CODE (pattern) == SEQUENCE)
2614 for (i = 0; i < XVECLEN (pattern, 0); i++)
2616 insn = XVECEXP (pattern, 0, i);
2619 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2620 sequence_result[XVECLEN (pattern, 0)] = pattern;
2624 insn = make_insn_raw (pattern);
2631 /* Emit the insns in a chain starting with INSN.
2632 Return the last insn emitted. */
2642 rtx next = NEXT_INSN (insn);
2651 /* Emit the insns in a chain starting with INSN and place them in front of
2652 the insn BEFORE. Return the last insn emitted. */
2655 emit_insns_before (insn, before)
2663 rtx next = NEXT_INSN (insn);
2664 add_insn_before (insn, before);
2672 /* Emit the insns in a chain starting with FIRST and place them in back of
2673 the insn AFTER. Return the last insn emitted. */
2676 emit_insns_after (first, after)
2681 register rtx after_after;
2689 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2692 after_after = NEXT_INSN (after);
2694 NEXT_INSN (after) = first;
2695 PREV_INSN (first) = after;
2696 NEXT_INSN (last) = after_after;
2698 PREV_INSN (after_after) = last;
2700 if (after == last_insn)
2705 /* Make an insn of code JUMP_INSN with pattern PATTERN
2706 and add it to the end of the doubly-linked list. */
2709 emit_jump_insn (pattern)
2712 if (GET_CODE (pattern) == SEQUENCE)
2713 return emit_insn (pattern);
2716 register rtx insn = make_jump_insn_raw (pattern);
2722 /* Make an insn of code CALL_INSN with pattern PATTERN
2723 and add it to the end of the doubly-linked list. */
2726 emit_call_insn (pattern)
2729 if (GET_CODE (pattern) == SEQUENCE)
2730 return emit_insn (pattern);
2733 register rtx insn = make_call_insn_raw (pattern);
2735 PUT_CODE (insn, CALL_INSN);
2740 /* Add the label LABEL to the end of the doubly-linked list. */
2746 /* This can be called twice for the same label
2747 as a result of the confusion that follows a syntax error!
2748 So make it harmless. */
2749 if (INSN_UID (label) == 0)
2751 INSN_UID (label) = cur_insn_uid++;
2757 /* Make an insn of code BARRIER
2758 and add it to the end of the doubly-linked list. */
2763 register rtx barrier = rtx_alloc (BARRIER);
2764 INSN_UID (barrier) = cur_insn_uid++;
2769 /* Make an insn of code NOTE
2770 with data-fields specified by FILE and LINE
2771 and add it to the end of the doubly-linked list,
2772 but only if line-numbers are desired for debugging info. */
2775 emit_line_note (file, line)
2779 if (output_bytecode)
2781 /* FIXME: for now we do nothing, but eventually we will have to deal with
2782 debugging information. */
2786 emit_filename = file;
2790 if (no_line_numbers)
2794 return emit_note (file, line);
2797 /* Make an insn of code NOTE
2798 with data-fields specified by FILE and LINE
2799 and add it to the end of the doubly-linked list.
2800 If it is a line-number NOTE, omit it if it matches the previous one. */
2803 emit_note (file, line)
2811 if (file && last_filename && !strcmp (file, last_filename)
2812 && line == last_linenum)
2814 last_filename = file;
2815 last_linenum = line;
2818 if (no_line_numbers && line > 0)
2824 note = rtx_alloc (NOTE);
2825 INSN_UID (note) = cur_insn_uid++;
2826 NOTE_SOURCE_FILE (note) = file;
2827 NOTE_LINE_NUMBER (note) = line;
2832 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2835 emit_line_note_force (file, line)
2840 return emit_line_note (file, line);
2843 /* Cause next statement to emit a line note even if the line number
2844 has not changed. This is used at the beginning of a function. */
2847 force_next_line_note ()
2852 /* Return an indication of which type of insn should have X as a body.
2853 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2859 if (GET_CODE (x) == CODE_LABEL)
2861 if (GET_CODE (x) == CALL)
2863 if (GET_CODE (x) == RETURN)
2865 if (GET_CODE (x) == SET)
2867 if (SET_DEST (x) == pc_rtx)
2869 else if (GET_CODE (SET_SRC (x)) == CALL)
2874 if (GET_CODE (x) == PARALLEL)
2877 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2878 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2880 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2881 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2883 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2884 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2890 /* Emit the rtl pattern X as an appropriate kind of insn.
2891 If X is a label, it is simply added into the insn chain. */
2897 enum rtx_code code = classify_insn (x);
2899 if (code == CODE_LABEL)
2900 return emit_label (x);
2901 else if (code == INSN)
2902 return emit_insn (x);
2903 else if (code == JUMP_INSN)
2905 register rtx insn = emit_jump_insn (x);
2906 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2907 return emit_barrier ();
2910 else if (code == CALL_INSN)
2911 return emit_call_insn (x);
2916 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2921 struct sequence_stack *tem;
2923 if (sequence_element_free_list)
2925 /* Reuse a previously-saved struct sequence_stack. */
2926 tem = sequence_element_free_list;
2927 sequence_element_free_list = tem->next;
2930 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
2932 tem->next = sequence_stack;
2933 tem->first = first_insn;
2934 tem->last = last_insn;
2935 tem->sequence_rtl_expr = sequence_rtl_expr;
2937 sequence_stack = tem;
2943 /* Similarly, but indicate that this sequence will be placed in
2947 start_sequence_for_rtl_expr (t)
2952 sequence_rtl_expr = t;
2955 /* Set up the insn chain starting with FIRST
2956 as the current sequence, saving the previously current one. */
2959 push_to_sequence (first)
2966 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
2972 /* Set up the outer-level insn chain
2973 as the current sequence, saving the previously current one. */
2976 push_topmost_sequence ()
2978 struct sequence_stack *stack, *top;
2982 for (stack = sequence_stack; stack; stack = stack->next)
2985 first_insn = top->first;
2986 last_insn = top->last;
2987 sequence_rtl_expr = top->sequence_rtl_expr;
2990 /* After emitting to the outer-level insn chain, update the outer-level
2991 insn chain, and restore the previous saved state. */
2994 pop_topmost_sequence ()
2996 struct sequence_stack *stack, *top;
2998 for (stack = sequence_stack; stack; stack = stack->next)
3001 top->first = first_insn;
3002 top->last = last_insn;
3003 /* ??? Why don't we save sequence_rtl_expr here? */
3008 /* After emitting to a sequence, restore previous saved state.
3010 To get the contents of the sequence just made,
3011 you must call `gen_sequence' *before* calling here. */
3016 struct sequence_stack *tem = sequence_stack;
3018 first_insn = tem->first;
3019 last_insn = tem->last;
3020 sequence_rtl_expr = tem->sequence_rtl_expr;
3021 sequence_stack = tem->next;
3023 tem->next = sequence_element_free_list;
3024 sequence_element_free_list = tem;
3027 /* Return 1 if currently emitting into a sequence. */
3032 return sequence_stack != 0;
3035 /* Generate a SEQUENCE rtx containing the insns already emitted
3036 to the current sequence.
3038 This is how the gen_... function from a DEFINE_EXPAND
3039 constructs the SEQUENCE that it returns. */
3049 /* Count the insns in the chain. */
3051 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3054 /* If only one insn, return its pattern rather than a SEQUENCE.
3055 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3056 the case of an empty list.) */
3058 && (GET_CODE (first_insn) == INSN
3059 || GET_CODE (first_insn) == JUMP_INSN
3060 /* Don't discard the call usage field. */
3061 || (GET_CODE (first_insn) == CALL_INSN
3062 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3063 return PATTERN (first_insn);
3065 /* Put them in a vector. See if we already have a SEQUENCE of the
3066 appropriate length around. */
3067 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3068 sequence_result[len] = 0;
3071 /* Ensure that this rtl goes in saveable_obstack, since we may
3073 push_obstacks_nochange ();
3074 rtl_in_saveable_obstack ();
3075 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
3079 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3080 XVECEXP (result, 0, i) = tem;
3085 /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
3086 according to the chain of insns starting with FIRST.
3088 Also set cur_insn_uid to exceed the largest uid in that chain.
3090 This is used when an inline function's rtl is saved
3091 and passed to rest_of_compilation later. */
3093 static void restore_reg_data_1 ();
3096 restore_reg_data (first)
3101 register int max_uid = 0;
3103 for (insn = first; insn; insn = NEXT_INSN (insn))
3105 if (INSN_UID (insn) >= max_uid)
3106 max_uid = INSN_UID (insn);
3108 switch (GET_CODE (insn))
3118 restore_reg_data_1 (PATTERN (insn));
3123 /* Don't duplicate the uids already in use. */
3124 cur_insn_uid = max_uid + 1;
3126 /* If any regs are missing, make them up.
3128 ??? word_mode is not necessarily the right mode. Most likely these REGs
3129 are never used. At some point this should be checked. */
3131 for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++)
3132 if (regno_reg_rtx[i] == 0)
3133 regno_reg_rtx[i] = gen_rtx (REG, word_mode, i);
3137 restore_reg_data_1 (orig)
3140 register rtx x = orig;
3142 register enum rtx_code code;
3143 register char *format_ptr;
3145 code = GET_CODE (x);
3160 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
3162 /* Make sure regno_pointer_flag and regno_reg_rtx are large
3163 enough to have an element for this pseudo reg number. */
3164 if (REGNO (x) >= reg_rtx_no)
3166 reg_rtx_no = REGNO (x);
3168 if (reg_rtx_no >= regno_pointer_flag_length)
3170 int newlen = MAX (regno_pointer_flag_length * 2,
3173 char *new = (char *) oballoc (newlen);
3174 bzero (new, newlen);
3175 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
3177 new1 = (rtx *) oballoc (newlen * sizeof (rtx));
3178 bzero ((char *) new1, newlen * sizeof (rtx));
3179 bcopy ((char *) regno_reg_rtx, (char *) new1,
3180 regno_pointer_flag_length * sizeof (rtx));
3182 regno_pointer_flag = new;
3183 regno_reg_rtx = new1;
3184 regno_pointer_flag_length = newlen;
3188 regno_reg_rtx[REGNO (x)] = x;
3193 if (GET_CODE (XEXP (x, 0)) == REG)
3194 mark_reg_pointer (XEXP (x, 0));
3195 restore_reg_data_1 (XEXP (x, 0));
3199 /* Now scan the subexpressions recursively. */
3201 format_ptr = GET_RTX_FORMAT (code);
3203 for (i = 0; i < GET_RTX_LENGTH (code); i++)
3205 switch (*format_ptr++)
3208 restore_reg_data_1 (XEXP (x, i));
3212 if (XVEC (x, i) != NULL)
3216 for (j = 0; j < XVECLEN (x, i); j++)
3217 restore_reg_data_1 (XVECEXP (x, i, j));
3224 /* Initialize data structures and variables in this file
3225 before generating rtl for each function. */
3234 sequence_rtl_expr = NULL;
3236 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3239 first_label_num = label_num;
3241 sequence_stack = NULL;
3243 /* Clear the start_sequence/gen_sequence cache. */
3244 sequence_element_free_list = 0;
3245 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3246 sequence_result[i] = 0;
3248 /* Init the tables that describe all the pseudo regs. */
3250 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3253 = (char *) oballoc (regno_pointer_flag_length);
3254 bzero (regno_pointer_flag, regno_pointer_flag_length);
3257 = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx));
3258 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3260 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3261 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3262 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3263 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3264 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3266 /* Indicate that the virtual registers and stack locations are
3268 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3269 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3270 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3271 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3273 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3274 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3275 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3276 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3278 #ifdef INIT_EXPANDERS
3283 /* Create some permanent unique rtl objects shared between all functions.
3284 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3287 init_emit_once (line_numbers)
3291 enum machine_mode mode;
3293 no_line_numbers = ! line_numbers;
3295 sequence_stack = NULL;
3297 /* Compute the word and byte modes. */
3299 byte_mode = VOIDmode;
3300 word_mode = VOIDmode;
3302 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3303 mode = GET_MODE_WIDER_MODE (mode))
3305 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3306 && byte_mode == VOIDmode)
3309 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3310 && word_mode == VOIDmode)
3314 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3316 /* Create the unique rtx's for certain rtx codes and operand values. */
3318 pc_rtx = gen_rtx (PC, VOIDmode);
3319 cc0_rtx = gen_rtx (CC0, VOIDmode);
3321 /* Don't use gen_rtx here since gen_rtx in this case
3322 tries to use these variables. */
3323 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3325 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
3326 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3327 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3330 /* These four calls obtain some of the rtx expressions made above. */
3331 const0_rtx = GEN_INT (0);
3332 const1_rtx = GEN_INT (1);
3333 const2_rtx = GEN_INT (2);
3334 constm1_rtx = GEN_INT (-1);
3336 /* This will usually be one of the above constants, but may be a new rtx. */
3337 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
3339 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3340 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3341 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3342 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3344 for (i = 0; i <= 2; i++)
3346 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3347 mode = GET_MODE_WIDER_MODE (mode))
3349 rtx tem = rtx_alloc (CONST_DOUBLE);
3350 union real_extract u;
3352 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3353 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3355 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3356 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3357 PUT_MODE (tem, mode);
3359 const_tiny_rtx[i][(int) mode] = tem;
3362 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3364 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3365 mode = GET_MODE_WIDER_MODE (mode))
3366 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3368 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3370 mode = GET_MODE_WIDER_MODE (mode))
3371 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3374 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3375 mode = GET_MODE_WIDER_MODE (mode))
3376 const_tiny_rtx[0][(int) mode] = const0_rtx;
3378 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
3379 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
3381 if (HARD_FRAME_POINTER_REGNUM == FRAME_POINTER_REGNUM)
3382 hard_frame_pointer_rtx = frame_pointer_rtx;
3384 hard_frame_pointer_rtx = gen_rtx (REG, Pmode, HARD_FRAME_POINTER_REGNUM);
3386 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3387 arg_pointer_rtx = frame_pointer_rtx;
3388 else if (HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3389 arg_pointer_rtx = hard_frame_pointer_rtx;
3390 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
3391 arg_pointer_rtx = stack_pointer_rtx;
3393 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
3395 /* Create the virtual registers. Do so here since the following objects
3396 might reference them. */
3398 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
3399 VIRTUAL_INCOMING_ARGS_REGNUM);
3400 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
3401 VIRTUAL_STACK_VARS_REGNUM);
3402 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
3403 VIRTUAL_STACK_DYNAMIC_REGNUM);
3404 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
3405 VIRTUAL_OUTGOING_ARGS_REGNUM);
3408 struct_value_rtx = STRUCT_VALUE;
3410 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
3413 #ifdef STRUCT_VALUE_INCOMING
3414 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3416 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3417 struct_value_incoming_rtx
3418 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3420 struct_value_incoming_rtx = struct_value_rtx;
3424 #ifdef STATIC_CHAIN_REGNUM
3425 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
3427 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3428 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3429 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3432 static_chain_incoming_rtx = static_chain_rtx;
3436 static_chain_rtx = STATIC_CHAIN;
3438 #ifdef STATIC_CHAIN_INCOMING
3439 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3441 static_chain_incoming_rtx = static_chain_rtx;
3445 #ifdef PIC_OFFSET_TABLE_REGNUM
3446 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);