1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
63 /* Commonly used modes. */
65 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
66 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
67 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
68 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
70 /* Datastructures maintained for currently processed function in RTL form. */
72 struct rtl_data x_rtl;
74 /* Indexed by pseudo register number, gives the rtx for that pseudo.
75 Allocated in parallel with regno_pointer_align.
76 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
77 with length attribute nested in top level structures. */
81 /* This is *not* reset after each function. It gives each CODE_LABEL
82 in the entire compilation a unique label number. */
84 static GTY(()) int label_num = 1;
86 /* Nonzero means do not generate NOTEs for source line numbers. */
88 static int no_line_numbers;
90 /* Commonly used rtx's, so that we only need space for one copy.
91 These are initialized once for the entire compilation.
92 All of these are unique; no other rtx-object will be equal to any
95 rtx global_rtl[GR_MAX];
97 /* Commonly used RTL for hard registers. These objects are not necessarily
98 unique, so we allocate them separately from global_rtl. They are
99 initialized once per compilation unit, then copied into regno_reg_rtx
100 at the beginning of each function. */
101 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
103 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
104 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
105 record a copy of const[012]_rtx. */
107 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
111 REAL_VALUE_TYPE dconst0;
112 REAL_VALUE_TYPE dconst1;
113 REAL_VALUE_TYPE dconst2;
114 REAL_VALUE_TYPE dconstm1;
115 REAL_VALUE_TYPE dconsthalf;
117 /* Record fixed-point constant 0 and 1. */
118 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
119 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
121 /* All references to the following fixed hard registers go through
122 these unique rtl objects. On machines where the frame-pointer and
123 arg-pointer are the same register, they use the same unique object.
125 After register allocation, other rtl objects which used to be pseudo-regs
126 may be clobbered to refer to the frame-pointer register.
127 But references that were originally to the frame-pointer can be
128 distinguished from the others because they contain frame_pointer_rtx.
130 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
131 tricky: until register elimination has taken place hard_frame_pointer_rtx
132 should be used if it is being set, and frame_pointer_rtx otherwise. After
133 register elimination hard_frame_pointer_rtx should always be used.
134 On machines where the two registers are same (most) then these are the
137 In an inline procedure, the stack and frame pointer rtxs may not be
138 used for anything else. */
139 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
140 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
141 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
143 /* This is used to implement __builtin_return_address for some machines.
144 See for instance the MIPS port. */
145 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
147 /* We make one copy of (const_int C) where C is in
148 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
149 to save space during the compilation and simplify comparisons of
152 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
154 /* A hash table storing CONST_INTs whose absolute value is greater
155 than MAX_SAVED_CONST_INT. */
157 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
158 htab_t const_int_htab;
160 /* A hash table storing memory attribute structures. */
161 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
162 htab_t mem_attrs_htab;
164 /* A hash table storing register attribute structures. */
165 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
166 htab_t reg_attrs_htab;
168 /* A hash table storing all CONST_DOUBLEs. */
169 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
170 htab_t const_double_htab;
172 /* A hash table storing all CONST_FIXEDs. */
173 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
174 htab_t const_fixed_htab;
176 #define first_insn (crtl->emit.x_first_insn)
177 #define last_insn (crtl->emit.x_last_insn)
178 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
179 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
180 #define last_location (crtl->emit.x_last_location)
181 #define first_label_num (crtl->emit.x_first_label_num)
183 static rtx make_call_insn_raw (rtx);
184 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
185 static void set_used_decls (tree);
186 static void mark_label_nuses (rtx);
187 static hashval_t const_int_htab_hash (const void *);
188 static int const_int_htab_eq (const void *, const void *);
189 static hashval_t const_double_htab_hash (const void *);
190 static int const_double_htab_eq (const void *, const void *);
191 static rtx lookup_const_double (rtx);
192 static hashval_t const_fixed_htab_hash (const void *);
193 static int const_fixed_htab_eq (const void *, const void *);
194 static rtx lookup_const_fixed (rtx);
195 static hashval_t mem_attrs_htab_hash (const void *);
196 static int mem_attrs_htab_eq (const void *, const void *);
197 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
199 static hashval_t reg_attrs_htab_hash (const void *);
200 static int reg_attrs_htab_eq (const void *, const void *);
201 static reg_attrs *get_reg_attrs (tree, int);
202 static rtx gen_const_vector (enum machine_mode, int);
203 static void copy_rtx_if_shared_1 (rtx *orig);
205 /* Probability of the conditional branch currently proceeded by try_split.
206 Set to -1 otherwise. */
207 int split_branch_probability = -1;
209 /* Returns a hash code for X (which is a really a CONST_INT). */
212 const_int_htab_hash (const void *x)
214 return (hashval_t) INTVAL ((const_rtx) x);
217 /* Returns nonzero if the value represented by X (which is really a
218 CONST_INT) is the same as that given by Y (which is really a
222 const_int_htab_eq (const void *x, const void *y)
224 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
227 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
229 const_double_htab_hash (const void *x)
231 const_rtx const value = (const_rtx) x;
234 if (GET_MODE (value) == VOIDmode)
235 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
238 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
239 /* MODE is used in the comparison, so it should be in the hash. */
240 h ^= GET_MODE (value);
245 /* Returns nonzero if the value represented by X (really a ...)
246 is the same as that represented by Y (really a ...) */
248 const_double_htab_eq (const void *x, const void *y)
250 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
252 if (GET_MODE (a) != GET_MODE (b))
254 if (GET_MODE (a) == VOIDmode)
255 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
256 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
258 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
259 CONST_DOUBLE_REAL_VALUE (b));
262 /* Returns a hash code for X (which is really a CONST_FIXED). */
265 const_fixed_htab_hash (const void *x)
267 const_rtx const value = (const_rtx) x;
270 h = fixed_hash (CONST_FIXED_VALUE (value));
271 /* MODE is used in the comparison, so it should be in the hash. */
272 h ^= GET_MODE (value);
276 /* Returns nonzero if the value represented by X (really a ...)
277 is the same as that represented by Y (really a ...). */
280 const_fixed_htab_eq (const void *x, const void *y)
282 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
284 if (GET_MODE (a) != GET_MODE (b))
286 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
289 /* Returns a hash code for X (which is a really a mem_attrs *). */
292 mem_attrs_htab_hash (const void *x)
294 const mem_attrs *const p = (const mem_attrs *) x;
296 return (p->alias ^ (p->align * 1000)
297 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
298 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
299 ^ (size_t) iterative_hash_expr (p->expr, 0));
302 /* Returns nonzero if the value represented by X (which is really a
303 mem_attrs *) is the same as that given by Y (which is also really a
307 mem_attrs_htab_eq (const void *x, const void *y)
309 const mem_attrs *const p = (const mem_attrs *) x;
310 const mem_attrs *const q = (const mem_attrs *) y;
312 return (p->alias == q->alias && p->offset == q->offset
313 && p->size == q->size && p->align == q->align
314 && (p->expr == q->expr
315 || (p->expr != NULL_TREE && q->expr != NULL_TREE
316 && operand_equal_p (p->expr, q->expr, 0))));
319 /* Allocate a new mem_attrs structure and insert it into the hash table if
320 one identical to it is not already in the table. We are doing this for
324 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
325 unsigned int align, enum machine_mode mode)
330 /* If everything is the default, we can just return zero.
331 This must match what the corresponding MEM_* macros return when the
332 field is not present. */
333 if (alias == 0 && expr == 0 && offset == 0
335 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
336 && (STRICT_ALIGNMENT && mode != BLKmode
337 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
342 attrs.offset = offset;
346 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
349 *slot = ggc_alloc (sizeof (mem_attrs));
350 memcpy (*slot, &attrs, sizeof (mem_attrs));
353 return (mem_attrs *) *slot;
356 /* Returns a hash code for X (which is a really a reg_attrs *). */
359 reg_attrs_htab_hash (const void *x)
361 const reg_attrs *const p = (const reg_attrs *) x;
363 return ((p->offset * 1000) ^ (long) p->decl);
366 /* Returns nonzero if the value represented by X (which is really a
367 reg_attrs *) is the same as that given by Y (which is also really a
371 reg_attrs_htab_eq (const void *x, const void *y)
373 const reg_attrs *const p = (const reg_attrs *) x;
374 const reg_attrs *const q = (const reg_attrs *) y;
376 return (p->decl == q->decl && p->offset == q->offset);
378 /* Allocate a new reg_attrs structure and insert it into the hash table if
379 one identical to it is not already in the table. We are doing this for
383 get_reg_attrs (tree decl, int offset)
388 /* If everything is the default, we can just return zero. */
389 if (decl == 0 && offset == 0)
393 attrs.offset = offset;
395 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
398 *slot = ggc_alloc (sizeof (reg_attrs));
399 memcpy (*slot, &attrs, sizeof (reg_attrs));
402 return (reg_attrs *) *slot;
407 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
413 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
414 MEM_VOLATILE_P (x) = true;
420 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
421 don't attempt to share with the various global pieces of rtl (such as
422 frame_pointer_rtx). */
425 gen_raw_REG (enum machine_mode mode, int regno)
427 rtx x = gen_rtx_raw_REG (mode, regno);
428 ORIGINAL_REGNO (x) = regno;
432 /* There are some RTL codes that require special attention; the generation
433 functions do the raw handling. If you add to this list, modify
434 special_rtx in gengenrtl.c as well. */
437 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
441 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
442 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
444 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
445 if (const_true_rtx && arg == STORE_FLAG_VALUE)
446 return const_true_rtx;
449 /* Look up the CONST_INT in the hash table. */
450 slot = htab_find_slot_with_hash (const_int_htab, &arg,
451 (hashval_t) arg, INSERT);
453 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
459 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
461 return GEN_INT (trunc_int_for_mode (c, mode));
464 /* CONST_DOUBLEs might be created from pairs of integers, or from
465 REAL_VALUE_TYPEs. Also, their length is known only at run time,
466 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
468 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
469 hash table. If so, return its counterpart; otherwise add it
470 to the hash table and return it. */
472 lookup_const_double (rtx real)
474 void **slot = htab_find_slot (const_double_htab, real, INSERT);
481 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
482 VALUE in mode MODE. */
484 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
486 rtx real = rtx_alloc (CONST_DOUBLE);
487 PUT_MODE (real, mode);
491 return lookup_const_double (real);
494 /* Determine whether FIXED, a CONST_FIXED, already exists in the
495 hash table. If so, return its counterpart; otherwise add it
496 to the hash table and return it. */
499 lookup_const_fixed (rtx fixed)
501 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
508 /* Return a CONST_FIXED rtx for a fixed-point value specified by
509 VALUE in mode MODE. */
512 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
514 rtx fixed = rtx_alloc (CONST_FIXED);
515 PUT_MODE (fixed, mode);
519 return lookup_const_fixed (fixed);
522 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
523 of ints: I0 is the low-order word and I1 is the high-order word.
524 Do not use this routine for non-integer modes; convert to
525 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
528 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
533 /* There are the following cases (note that there are no modes with
534 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
536 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
538 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
539 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
540 from copies of the sign bit, and sign of i0 and i1 are the same), then
541 we return a CONST_INT for i0.
542 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
543 if (mode != VOIDmode)
545 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
546 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
547 /* We can get a 0 for an error mark. */
548 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
549 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
551 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
552 return gen_int_mode (i0, mode);
554 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
557 /* If this integer fits in one word, return a CONST_INT. */
558 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
561 /* We use VOIDmode for integers. */
562 value = rtx_alloc (CONST_DOUBLE);
563 PUT_MODE (value, VOIDmode);
565 CONST_DOUBLE_LOW (value) = i0;
566 CONST_DOUBLE_HIGH (value) = i1;
568 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
569 XWINT (value, i) = 0;
571 return lookup_const_double (value);
575 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
577 /* In case the MD file explicitly references the frame pointer, have
578 all such references point to the same frame pointer. This is
579 used during frame pointer elimination to distinguish the explicit
580 references to these registers from pseudos that happened to be
583 If we have eliminated the frame pointer or arg pointer, we will
584 be using it as a normal register, for example as a spill
585 register. In such cases, we might be accessing it in a mode that
586 is not Pmode and therefore cannot use the pre-allocated rtx.
588 Also don't do this when we are making new REGs in reload, since
589 we don't want to get confused with the real pointers. */
591 if (mode == Pmode && !reload_in_progress)
593 if (regno == FRAME_POINTER_REGNUM
594 && (!reload_completed || frame_pointer_needed))
595 return frame_pointer_rtx;
596 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
597 if (regno == HARD_FRAME_POINTER_REGNUM
598 && (!reload_completed || frame_pointer_needed))
599 return hard_frame_pointer_rtx;
601 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
602 if (regno == ARG_POINTER_REGNUM)
603 return arg_pointer_rtx;
605 #ifdef RETURN_ADDRESS_POINTER_REGNUM
606 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
607 return return_address_pointer_rtx;
609 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
610 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
611 return pic_offset_table_rtx;
612 if (regno == STACK_POINTER_REGNUM)
613 return stack_pointer_rtx;
617 /* If the per-function register table has been set up, try to re-use
618 an existing entry in that table to avoid useless generation of RTL.
620 This code is disabled for now until we can fix the various backends
621 which depend on having non-shared hard registers in some cases. Long
622 term we want to re-enable this code as it can significantly cut down
623 on the amount of useless RTL that gets generated.
625 We'll also need to fix some code that runs after reload that wants to
626 set ORIGINAL_REGNO. */
631 && regno < FIRST_PSEUDO_REGISTER
632 && reg_raw_mode[regno] == mode)
633 return regno_reg_rtx[regno];
636 return gen_raw_REG (mode, regno);
640 gen_rtx_MEM (enum machine_mode mode, rtx addr)
642 rtx rt = gen_rtx_raw_MEM (mode, addr);
644 /* This field is not cleared by the mere allocation of the rtx, so
651 /* Generate a memory referring to non-trapping constant memory. */
654 gen_const_mem (enum machine_mode mode, rtx addr)
656 rtx mem = gen_rtx_MEM (mode, addr);
657 MEM_READONLY_P (mem) = 1;
658 MEM_NOTRAP_P (mem) = 1;
662 /* Generate a MEM referring to fixed portions of the frame, e.g., register
666 gen_frame_mem (enum machine_mode mode, rtx addr)
668 rtx mem = gen_rtx_MEM (mode, addr);
669 MEM_NOTRAP_P (mem) = 1;
670 set_mem_alias_set (mem, get_frame_alias_set ());
674 /* Generate a MEM referring to a temporary use of the stack, not part
675 of the fixed stack frame. For example, something which is pushed
676 by a target splitter. */
678 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
680 rtx mem = gen_rtx_MEM (mode, addr);
681 MEM_NOTRAP_P (mem) = 1;
682 if (!cfun->calls_alloca)
683 set_mem_alias_set (mem, get_frame_alias_set ());
687 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
688 this construct would be valid, and false otherwise. */
691 validate_subreg (enum machine_mode omode, enum machine_mode imode,
692 const_rtx reg, unsigned int offset)
694 unsigned int isize = GET_MODE_SIZE (imode);
695 unsigned int osize = GET_MODE_SIZE (omode);
697 /* All subregs must be aligned. */
698 if (offset % osize != 0)
701 /* The subreg offset cannot be outside the inner object. */
705 /* ??? This should not be here. Temporarily continue to allow word_mode
706 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
707 Generally, backends are doing something sketchy but it'll take time to
709 if (omode == word_mode)
711 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
712 is the culprit here, and not the backends. */
713 else if (osize >= UNITS_PER_WORD && isize >= osize)
715 /* Allow component subregs of complex and vector. Though given the below
716 extraction rules, it's not always clear what that means. */
717 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
718 && GET_MODE_INNER (imode) == omode)
720 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
721 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
722 represent this. It's questionable if this ought to be represented at
723 all -- why can't this all be hidden in post-reload splitters that make
724 arbitrarily mode changes to the registers themselves. */
725 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
727 /* Subregs involving floating point modes are not allowed to
728 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
729 (subreg:SI (reg:DF) 0) isn't. */
730 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
736 /* Paradoxical subregs must have offset zero. */
740 /* This is a normal subreg. Verify that the offset is representable. */
742 /* For hard registers, we already have most of these rules collected in
743 subreg_offset_representable_p. */
744 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
746 unsigned int regno = REGNO (reg);
748 #ifdef CANNOT_CHANGE_MODE_CLASS
749 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
750 && GET_MODE_INNER (imode) == omode)
752 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
756 return subreg_offset_representable_p (regno, imode, offset, omode);
759 /* For pseudo registers, we want most of the same checks. Namely:
760 If the register no larger than a word, the subreg must be lowpart.
761 If the register is larger than a word, the subreg must be the lowpart
762 of a subword. A subreg does *not* perform arbitrary bit extraction.
763 Given that we've already checked mode/offset alignment, we only have
764 to check subword subregs here. */
765 if (osize < UNITS_PER_WORD)
767 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
768 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
769 if (offset % UNITS_PER_WORD != low_off)
776 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
778 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
779 return gen_rtx_raw_SUBREG (mode, reg, offset);
782 /* Generate a SUBREG representing the least-significant part of REG if MODE
783 is smaller than mode of REG, otherwise paradoxical SUBREG. */
786 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
788 enum machine_mode inmode;
790 inmode = GET_MODE (reg);
791 if (inmode == VOIDmode)
793 return gen_rtx_SUBREG (mode, reg,
794 subreg_lowpart_offset (mode, inmode));
798 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
801 gen_rtvec (int n, ...)
809 /* Don't allocate an empty rtvec... */
813 rt_val = rtvec_alloc (n);
815 for (i = 0; i < n; i++)
816 rt_val->elem[i] = va_arg (p, rtx);
823 gen_rtvec_v (int n, rtx *argp)
828 /* Don't allocate an empty rtvec... */
832 rt_val = rtvec_alloc (n);
834 for (i = 0; i < n; i++)
835 rt_val->elem[i] = *argp++;
840 /* Return the number of bytes between the start of an OUTER_MODE
841 in-memory value and the start of an INNER_MODE in-memory value,
842 given that the former is a lowpart of the latter. It may be a
843 paradoxical lowpart, in which case the offset will be negative
844 on big-endian targets. */
847 byte_lowpart_offset (enum machine_mode outer_mode,
848 enum machine_mode inner_mode)
850 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
851 return subreg_lowpart_offset (outer_mode, inner_mode);
853 return -subreg_lowpart_offset (inner_mode, outer_mode);
856 /* Generate a REG rtx for a new pseudo register of mode MODE.
857 This pseudo is assigned the next sequential register number. */
860 gen_reg_rtx (enum machine_mode mode)
863 unsigned int align = GET_MODE_ALIGNMENT (mode);
865 gcc_assert (can_create_pseudo_p ());
867 /* If a virtual register with bigger mode alignment is generated,
868 increase stack alignment estimation because it might be spilled
870 if (SUPPORTS_STACK_ALIGNMENT
871 && crtl->stack_alignment_estimated < align
872 && !crtl->stack_realign_processed)
874 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
875 if (crtl->stack_alignment_estimated < min_align)
876 crtl->stack_alignment_estimated = min_align;
879 if (generating_concat_p
880 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
881 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
883 /* For complex modes, don't make a single pseudo.
884 Instead, make a CONCAT of two pseudos.
885 This allows noncontiguous allocation of the real and imaginary parts,
886 which makes much better code. Besides, allocating DCmode
887 pseudos overstrains reload on some machines like the 386. */
888 rtx realpart, imagpart;
889 enum machine_mode partmode = GET_MODE_INNER (mode);
891 realpart = gen_reg_rtx (partmode);
892 imagpart = gen_reg_rtx (partmode);
893 return gen_rtx_CONCAT (mode, realpart, imagpart);
896 /* Make sure regno_pointer_align, and regno_reg_rtx are large
897 enough to have an element for this pseudo reg number. */
899 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
901 int old_size = crtl->emit.regno_pointer_align_length;
905 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
906 memset (tmp + old_size, 0, old_size);
907 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
909 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
910 memset (new1 + old_size, 0, old_size * sizeof (rtx));
911 regno_reg_rtx = new1;
913 crtl->emit.regno_pointer_align_length = old_size * 2;
916 val = gen_raw_REG (mode, reg_rtx_no);
917 regno_reg_rtx[reg_rtx_no++] = val;
921 /* Update NEW with the same attributes as REG, but with OFFSET added
922 to the REG_OFFSET. */
925 update_reg_offset (rtx new_rtx, rtx reg, int offset)
927 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
928 REG_OFFSET (reg) + offset);
931 /* Generate a register with same attributes as REG, but with OFFSET
932 added to the REG_OFFSET. */
935 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
938 rtx new_rtx = gen_rtx_REG (mode, regno);
940 update_reg_offset (new_rtx, reg, offset);
944 /* Generate a new pseudo-register with the same attributes as REG, but
945 with OFFSET added to the REG_OFFSET. */
948 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
950 rtx new_rtx = gen_reg_rtx (mode);
952 update_reg_offset (new_rtx, reg, offset);
956 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
957 new register is a (possibly paradoxical) lowpart of the old one. */
960 adjust_reg_mode (rtx reg, enum machine_mode mode)
962 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
963 PUT_MODE (reg, mode);
966 /* Copy REG's attributes from X, if X has any attributes. If REG and X
967 have different modes, REG is a (possibly paradoxical) lowpart of X. */
970 set_reg_attrs_from_value (rtx reg, rtx x)
974 /* Hard registers can be reused for multiple purposes within the same
975 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
977 if (HARD_REGISTER_P (reg))
980 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
983 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
985 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
987 mark_reg_pointer (reg, 0);
992 update_reg_offset (reg, x, offset);
994 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
998 /* Generate a REG rtx for a new pseudo register, copying the mode
999 and attributes from X. */
1002 gen_reg_rtx_and_attrs (rtx x)
1004 rtx reg = gen_reg_rtx (GET_MODE (x));
1005 set_reg_attrs_from_value (reg, x);
1009 /* Set the register attributes for registers contained in PARM_RTX.
1010 Use needed values from memory attributes of MEM. */
1013 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1015 if (REG_P (parm_rtx))
1016 set_reg_attrs_from_value (parm_rtx, mem);
1017 else if (GET_CODE (parm_rtx) == PARALLEL)
1019 /* Check for a NULL entry in the first slot, used to indicate that the
1020 parameter goes both on the stack and in registers. */
1021 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1022 for (; i < XVECLEN (parm_rtx, 0); i++)
1024 rtx x = XVECEXP (parm_rtx, 0, i);
1025 if (REG_P (XEXP (x, 0)))
1026 REG_ATTRS (XEXP (x, 0))
1027 = get_reg_attrs (MEM_EXPR (mem),
1028 INTVAL (XEXP (x, 1)));
1033 /* Set the REG_ATTRS for registers in value X, given that X represents
1037 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1039 if (GET_CODE (x) == SUBREG)
1041 gcc_assert (subreg_lowpart_p (x));
1046 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1048 if (GET_CODE (x) == CONCAT)
1050 if (REG_P (XEXP (x, 0)))
1051 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1052 if (REG_P (XEXP (x, 1)))
1053 REG_ATTRS (XEXP (x, 1))
1054 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1056 if (GET_CODE (x) == PARALLEL)
1060 /* Check for a NULL entry, used to indicate that the parameter goes
1061 both on the stack and in registers. */
1062 if (XEXP (XVECEXP (x, 0, 0), 0))
1067 for (i = start; i < XVECLEN (x, 0); i++)
1069 rtx y = XVECEXP (x, 0, i);
1070 if (REG_P (XEXP (y, 0)))
1071 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1076 /* Assign the RTX X to declaration T. */
1079 set_decl_rtl (tree t, rtx x)
1081 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1083 set_reg_attrs_for_decl_rtl (t, x);
1086 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1087 if the ABI requires the parameter to be passed by reference. */
1090 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1092 DECL_INCOMING_RTL (t) = x;
1093 if (x && !by_reference_p)
1094 set_reg_attrs_for_decl_rtl (t, x);
1097 /* Identify REG (which may be a CONCAT) as a user register. */
1100 mark_user_reg (rtx reg)
1102 if (GET_CODE (reg) == CONCAT)
1104 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1105 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1109 gcc_assert (REG_P (reg));
1110 REG_USERVAR_P (reg) = 1;
1114 /* Identify REG as a probable pointer register and show its alignment
1115 as ALIGN, if nonzero. */
1118 mark_reg_pointer (rtx reg, int align)
1120 if (! REG_POINTER (reg))
1122 REG_POINTER (reg) = 1;
1125 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1127 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1128 /* We can no-longer be sure just how aligned this pointer is. */
1129 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1132 /* Return 1 plus largest pseudo reg number used in the current function. */
1140 /* Return 1 + the largest label number used so far in the current function. */
1143 max_label_num (void)
1148 /* Return first label number used in this function (if any were used). */
1151 get_first_label_num (void)
1153 return first_label_num;
1156 /* If the rtx for label was created during the expansion of a nested
1157 function, then first_label_num won't include this label number.
1158 Fix this now so that array indices work later. */
1161 maybe_set_first_label_num (rtx x)
1163 if (CODE_LABEL_NUMBER (x) < first_label_num)
1164 first_label_num = CODE_LABEL_NUMBER (x);
1167 /* Return a value representing some low-order bits of X, where the number
1168 of low-order bits is given by MODE. Note that no conversion is done
1169 between floating-point and fixed-point values, rather, the bit
1170 representation is returned.
1172 This function handles the cases in common between gen_lowpart, below,
1173 and two variants in cse.c and combine.c. These are the cases that can
1174 be safely handled at all points in the compilation.
1176 If this is not a case we can handle, return 0. */
1179 gen_lowpart_common (enum machine_mode mode, rtx x)
1181 int msize = GET_MODE_SIZE (mode);
1184 enum machine_mode innermode;
1186 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1187 so we have to make one up. Yuk. */
1188 innermode = GET_MODE (x);
1190 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1191 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1192 else if (innermode == VOIDmode)
1193 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1195 xsize = GET_MODE_SIZE (innermode);
1197 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1199 if (innermode == mode)
1202 /* MODE must occupy no more words than the mode of X. */
1203 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1204 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1207 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1208 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1211 offset = subreg_lowpart_offset (mode, innermode);
1213 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1214 && (GET_MODE_CLASS (mode) == MODE_INT
1215 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1217 /* If we are getting the low-order part of something that has been
1218 sign- or zero-extended, we can either just use the object being
1219 extended or make a narrower extension. If we want an even smaller
1220 piece than the size of the object being extended, call ourselves
1223 This case is used mostly by combine and cse. */
1225 if (GET_MODE (XEXP (x, 0)) == mode)
1227 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1228 return gen_lowpart_common (mode, XEXP (x, 0));
1229 else if (msize < xsize)
1230 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1232 else if (GET_CODE (x) == SUBREG || REG_P (x)
1233 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1234 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1235 return simplify_gen_subreg (mode, x, innermode, offset);
1237 /* Otherwise, we can't do this. */
1242 gen_highpart (enum machine_mode mode, rtx x)
1244 unsigned int msize = GET_MODE_SIZE (mode);
1247 /* This case loses if X is a subreg. To catch bugs early,
1248 complain if an invalid MODE is used even in other cases. */
1249 gcc_assert (msize <= UNITS_PER_WORD
1250 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1252 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1253 subreg_highpart_offset (mode, GET_MODE (x)));
1254 gcc_assert (result);
1256 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1257 the target if we have a MEM. gen_highpart must return a valid operand,
1258 emitting code if necessary to do so. */
1261 result = validize_mem (result);
1262 gcc_assert (result);
1268 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1269 be VOIDmode constant. */
1271 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1273 if (GET_MODE (exp) != VOIDmode)
1275 gcc_assert (GET_MODE (exp) == innermode);
1276 return gen_highpart (outermode, exp);
1278 return simplify_gen_subreg (outermode, exp, innermode,
1279 subreg_highpart_offset (outermode, innermode));
1282 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1285 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1287 unsigned int offset = 0;
1288 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1292 if (WORDS_BIG_ENDIAN)
1293 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1294 if (BYTES_BIG_ENDIAN)
1295 offset += difference % UNITS_PER_WORD;
1301 /* Return offset in bytes to get OUTERMODE high part
1302 of the value in mode INNERMODE stored in memory in target format. */
1304 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1306 unsigned int offset = 0;
1307 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1309 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1313 if (! WORDS_BIG_ENDIAN)
1314 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1315 if (! BYTES_BIG_ENDIAN)
1316 offset += difference % UNITS_PER_WORD;
1322 /* Return 1 iff X, assumed to be a SUBREG,
1323 refers to the least significant part of its containing reg.
1324 If X is not a SUBREG, always return 1 (it is its own low part!). */
1327 subreg_lowpart_p (const_rtx x)
1329 if (GET_CODE (x) != SUBREG)
1331 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1334 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1335 == SUBREG_BYTE (x));
1338 /* Return subword OFFSET of operand OP.
1339 The word number, OFFSET, is interpreted as the word number starting
1340 at the low-order address. OFFSET 0 is the low-order word if not
1341 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1343 If we cannot extract the required word, we return zero. Otherwise,
1344 an rtx corresponding to the requested word will be returned.
1346 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1347 reload has completed, a valid address will always be returned. After
1348 reload, if a valid address cannot be returned, we return zero.
1350 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1351 it is the responsibility of the caller.
1353 MODE is the mode of OP in case it is a CONST_INT.
1355 ??? This is still rather broken for some cases. The problem for the
1356 moment is that all callers of this thing provide no 'goal mode' to
1357 tell us to work with. This exists because all callers were written
1358 in a word based SUBREG world.
1359 Now use of this function can be deprecated by simplify_subreg in most
1364 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1366 if (mode == VOIDmode)
1367 mode = GET_MODE (op);
1369 gcc_assert (mode != VOIDmode);
1371 /* If OP is narrower than a word, fail. */
1373 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1376 /* If we want a word outside OP, return zero. */
1378 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1381 /* Form a new MEM at the requested address. */
1384 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1386 if (! validate_address)
1389 else if (reload_completed)
1391 if (! strict_memory_address_p (word_mode, XEXP (new_rtx, 0)))
1395 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1398 /* Rest can be handled by simplify_subreg. */
1399 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1402 /* Similar to `operand_subword', but never return 0. If we can't
1403 extract the required subword, put OP into a register and try again.
1404 The second attempt must succeed. We always validate the address in
1407 MODE is the mode of OP, in case it is CONST_INT. */
1410 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1412 rtx result = operand_subword (op, offset, 1, mode);
1417 if (mode != BLKmode && mode != VOIDmode)
1419 /* If this is a register which can not be accessed by words, copy it
1420 to a pseudo register. */
1422 op = copy_to_reg (op);
1424 op = force_reg (mode, op);
1427 result = operand_subword (op, offset, 1, mode);
1428 gcc_assert (result);
1433 /* Returns 1 if both MEM_EXPR can be considered equal
1437 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1442 if (! expr1 || ! expr2)
1445 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1448 return operand_equal_p (expr1, expr2, 0);
1451 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1452 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1456 get_mem_align_offset (rtx mem, unsigned int align)
1459 unsigned HOST_WIDE_INT offset;
1461 /* This function can't use
1462 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1463 || !CONST_INT_P (MEM_OFFSET (mem))
1464 || (get_object_alignment (MEM_EXPR (mem), MEM_ALIGN (mem), align)
1468 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1470 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1471 for <variable>. get_inner_reference doesn't handle it and
1472 even if it did, the alignment in that case needs to be determined
1473 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1474 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1475 isn't sufficiently aligned, the object it is in might be. */
1476 gcc_assert (MEM_P (mem));
1477 expr = MEM_EXPR (mem);
1478 if (expr == NULL_TREE
1479 || MEM_OFFSET (mem) == NULL_RTX
1480 || !CONST_INT_P (MEM_OFFSET (mem)))
1483 offset = INTVAL (MEM_OFFSET (mem));
1486 if (DECL_ALIGN (expr) < align)
1489 else if (INDIRECT_REF_P (expr))
1491 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1494 else if (TREE_CODE (expr) == COMPONENT_REF)
1498 tree inner = TREE_OPERAND (expr, 0);
1499 tree field = TREE_OPERAND (expr, 1);
1500 tree byte_offset = component_ref_field_offset (expr);
1501 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1504 || !host_integerp (byte_offset, 1)
1505 || !host_integerp (bit_offset, 1))
1508 offset += tree_low_cst (byte_offset, 1);
1509 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1511 if (inner == NULL_TREE)
1513 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1514 < (unsigned int) align)
1518 else if (DECL_P (inner))
1520 if (DECL_ALIGN (inner) < align)
1524 else if (TREE_CODE (inner) != COMPONENT_REF)
1532 return offset & ((align / BITS_PER_UNIT) - 1);
1535 /* Given REF (a MEM) and T, either the type of X or the expression
1536 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1537 if we are making a new object of this type. BITPOS is nonzero if
1538 there is an offset outstanding on T that will be applied later. */
1541 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1542 HOST_WIDE_INT bitpos)
1544 alias_set_type alias = MEM_ALIAS_SET (ref);
1545 tree expr = MEM_EXPR (ref);
1546 rtx offset = MEM_OFFSET (ref);
1547 rtx size = MEM_SIZE (ref);
1548 unsigned int align = MEM_ALIGN (ref);
1549 HOST_WIDE_INT apply_bitpos = 0;
1552 /* It can happen that type_for_mode was given a mode for which there
1553 is no language-level type. In which case it returns NULL, which
1558 type = TYPE_P (t) ? t : TREE_TYPE (t);
1559 if (type == error_mark_node)
1562 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1563 wrong answer, as it assumes that DECL_RTL already has the right alias
1564 info. Callers should not set DECL_RTL until after the call to
1565 set_mem_attributes. */
1566 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1568 /* Get the alias set from the expression or type (perhaps using a
1569 front-end routine) and use it. */
1570 alias = get_alias_set (t);
1572 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1573 MEM_IN_STRUCT_P (ref)
1574 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1575 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1577 /* If we are making an object of this type, or if this is a DECL, we know
1578 that it is a scalar if the type is not an aggregate. */
1579 if ((objectp || DECL_P (t))
1580 && ! AGGREGATE_TYPE_P (type)
1581 && TREE_CODE (type) != COMPLEX_TYPE)
1582 MEM_SCALAR_P (ref) = 1;
1584 /* We can set the alignment from the type if we are making an object,
1585 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1586 if (objectp || TREE_CODE (t) == INDIRECT_REF
1587 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1588 || TYPE_ALIGN_OK (type))
1589 align = MAX (align, TYPE_ALIGN (type));
1591 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1593 if (integer_zerop (TREE_OPERAND (t, 1)))
1594 /* We don't know anything about the alignment. */
1595 align = BITS_PER_UNIT;
1597 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1600 /* If the size is known, we can set that. */
1601 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1602 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1604 /* If T is not a type, we may be able to deduce some more information about
1609 bool align_computed = false;
1611 if (TREE_THIS_VOLATILE (t))
1612 MEM_VOLATILE_P (ref) = 1;
1614 /* Now remove any conversions: they don't change what the underlying
1615 object is. Likewise for SAVE_EXPR. */
1616 while (CONVERT_EXPR_P (t)
1617 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1618 || TREE_CODE (t) == SAVE_EXPR)
1619 t = TREE_OPERAND (t, 0);
1621 /* We may look through structure-like accesses for the purposes of
1622 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1624 while (TREE_CODE (base) == COMPONENT_REF
1625 || TREE_CODE (base) == REALPART_EXPR
1626 || TREE_CODE (base) == IMAGPART_EXPR
1627 || TREE_CODE (base) == BIT_FIELD_REF)
1628 base = TREE_OPERAND (base, 0);
1632 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1633 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1635 MEM_NOTRAP_P (ref) = 1;
1638 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1640 base = get_base_address (base);
1641 if (base && DECL_P (base)
1642 && TREE_READONLY (base)
1643 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1645 tree base_type = TREE_TYPE (base);
1646 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1647 || DECL_ARTIFICIAL (base));
1648 MEM_READONLY_P (ref) = 1;
1651 /* If this expression uses it's parent's alias set, mark it such
1652 that we won't change it. */
1653 if (component_uses_parent_alias_set (t))
1654 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1656 /* If this is a decl, set the attributes of the MEM from it. */
1660 offset = const0_rtx;
1661 apply_bitpos = bitpos;
1662 size = (DECL_SIZE_UNIT (t)
1663 && host_integerp (DECL_SIZE_UNIT (t), 1)
1664 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1665 align = DECL_ALIGN (t);
1666 align_computed = true;
1669 /* If this is a constant, we know the alignment. */
1670 else if (CONSTANT_CLASS_P (t))
1672 align = TYPE_ALIGN (type);
1673 #ifdef CONSTANT_ALIGNMENT
1674 align = CONSTANT_ALIGNMENT (t, align);
1676 align_computed = true;
1679 /* If this is a field reference and not a bit-field, record it. */
1680 /* ??? There is some information that can be gleaned from bit-fields,
1681 such as the word offset in the structure that might be modified.
1682 But skip it for now. */
1683 else if (TREE_CODE (t) == COMPONENT_REF
1684 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1687 offset = const0_rtx;
1688 apply_bitpos = bitpos;
1689 /* ??? Any reason the field size would be different than
1690 the size we got from the type? */
1693 /* If this is an array reference, look for an outer field reference. */
1694 else if (TREE_CODE (t) == ARRAY_REF)
1696 tree off_tree = size_zero_node;
1697 /* We can't modify t, because we use it at the end of the
1703 tree index = TREE_OPERAND (t2, 1);
1704 tree low_bound = array_ref_low_bound (t2);
1705 tree unit_size = array_ref_element_size (t2);
1707 /* We assume all arrays have sizes that are a multiple of a byte.
1708 First subtract the lower bound, if any, in the type of the
1709 index, then convert to sizetype and multiply by the size of
1710 the array element. */
1711 if (! integer_zerop (low_bound))
1712 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1715 off_tree = size_binop (PLUS_EXPR,
1716 size_binop (MULT_EXPR,
1717 fold_convert (sizetype,
1721 t2 = TREE_OPERAND (t2, 0);
1723 while (TREE_CODE (t2) == ARRAY_REF);
1729 if (host_integerp (off_tree, 1))
1731 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1732 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1733 align = DECL_ALIGN (t2);
1734 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1736 align_computed = true;
1737 offset = GEN_INT (ioff);
1738 apply_bitpos = bitpos;
1741 else if (TREE_CODE (t2) == COMPONENT_REF)
1745 if (host_integerp (off_tree, 1))
1747 offset = GEN_INT (tree_low_cst (off_tree, 1));
1748 apply_bitpos = bitpos;
1750 /* ??? Any reason the field size would be different than
1751 the size we got from the type? */
1753 else if (flag_argument_noalias > 1
1754 && (INDIRECT_REF_P (t2))
1755 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1762 /* If this is a Fortran indirect argument reference, record the
1764 else if (flag_argument_noalias > 1
1765 && (INDIRECT_REF_P (t))
1766 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1772 if (!align_computed && !INDIRECT_REF_P (t))
1774 unsigned int obj_align
1775 = get_object_alignment (t, align, BIGGEST_ALIGNMENT);
1776 align = MAX (align, obj_align);
1780 /* If we modified OFFSET based on T, then subtract the outstanding
1781 bit position offset. Similarly, increase the size of the accessed
1782 object to contain the negative offset. */
1785 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1787 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1790 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1792 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1793 we're overlapping. */
1798 /* Now set the attributes we computed above. */
1800 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1802 /* If this is already known to be a scalar or aggregate, we are done. */
1803 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1806 /* If it is a reference into an aggregate, this is part of an aggregate.
1807 Otherwise we don't know. */
1808 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1809 || TREE_CODE (t) == ARRAY_RANGE_REF
1810 || TREE_CODE (t) == BIT_FIELD_REF)
1811 MEM_IN_STRUCT_P (ref) = 1;
1815 set_mem_attributes (rtx ref, tree t, int objectp)
1817 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1820 /* Set the alias set of MEM to SET. */
1823 set_mem_alias_set (rtx mem, alias_set_type set)
1825 #ifdef ENABLE_CHECKING
1826 /* If the new and old alias sets don't conflict, something is wrong. */
1827 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1830 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1831 MEM_SIZE (mem), MEM_ALIGN (mem),
1835 /* Set the alignment of MEM to ALIGN bits. */
1838 set_mem_align (rtx mem, unsigned int align)
1840 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1841 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1845 /* Set the expr for MEM to EXPR. */
1848 set_mem_expr (rtx mem, tree expr)
1851 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1852 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1855 /* Set the offset of MEM to OFFSET. */
1858 set_mem_offset (rtx mem, rtx offset)
1860 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1861 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1865 /* Set the size of MEM to SIZE. */
1868 set_mem_size (rtx mem, rtx size)
1870 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1871 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1875 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1876 and its address changed to ADDR. (VOIDmode means don't change the mode.
1877 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1878 returned memory location is required to be valid. The memory
1879 attributes are not changed. */
1882 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1886 gcc_assert (MEM_P (memref));
1887 if (mode == VOIDmode)
1888 mode = GET_MODE (memref);
1890 addr = XEXP (memref, 0);
1891 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1892 && (!validate || memory_address_p (mode, addr)))
1897 if (reload_in_progress || reload_completed)
1898 gcc_assert (memory_address_p (mode, addr));
1900 addr = memory_address (mode, addr);
1903 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1906 new_rtx = gen_rtx_MEM (mode, addr);
1907 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1911 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1912 way we are changing MEMREF, so we only preserve the alias set. */
1915 change_address (rtx memref, enum machine_mode mode, rtx addr)
1917 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1918 enum machine_mode mmode = GET_MODE (new_rtx);
1921 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1922 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1924 /* If there are no changes, just return the original memory reference. */
1925 if (new_rtx == memref)
1927 if (MEM_ATTRS (memref) == 0
1928 || (MEM_EXPR (memref) == NULL
1929 && MEM_OFFSET (memref) == NULL
1930 && MEM_SIZE (memref) == size
1931 && MEM_ALIGN (memref) == align))
1934 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1935 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1939 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1944 /* Return a memory reference like MEMREF, but with its mode changed
1945 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1946 nonzero, the memory address is forced to be valid.
1947 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1948 and caller is responsible for adjusting MEMREF base register. */
1951 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1952 int validate, int adjust)
1954 rtx addr = XEXP (memref, 0);
1956 rtx memoffset = MEM_OFFSET (memref);
1958 unsigned int memalign = MEM_ALIGN (memref);
1961 /* If there are no changes, just return the original memory reference. */
1962 if (mode == GET_MODE (memref) && !offset
1963 && (!validate || memory_address_p (mode, addr)))
1966 /* ??? Prefer to create garbage instead of creating shared rtl.
1967 This may happen even if offset is nonzero -- consider
1968 (plus (plus reg reg) const_int) -- so do this always. */
1969 addr = copy_rtx (addr);
1971 /* Convert a possibly large offset to a signed value within the
1972 range of the target address space. */
1973 pbits = GET_MODE_BITSIZE (Pmode);
1974 if (HOST_BITS_PER_WIDE_INT > pbits)
1976 int shift = HOST_BITS_PER_WIDE_INT - pbits;
1977 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
1983 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1984 object, we can merge it into the LO_SUM. */
1985 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1987 && (unsigned HOST_WIDE_INT) offset
1988 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1989 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1990 plus_constant (XEXP (addr, 1), offset));
1992 addr = plus_constant (addr, offset);
1995 new_rtx = change_address_1 (memref, mode, addr, validate);
1997 /* If the address is a REG, change_address_1 rightfully returns memref,
1998 but this would destroy memref's MEM_ATTRS. */
1999 if (new_rtx == memref && offset != 0)
2000 new_rtx = copy_rtx (new_rtx);
2002 /* Compute the new values of the memory attributes due to this adjustment.
2003 We add the offsets and update the alignment. */
2005 memoffset = GEN_INT (offset + INTVAL (memoffset));
2007 /* Compute the new alignment by taking the MIN of the alignment and the
2008 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2013 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2015 /* We can compute the size in a number of ways. */
2016 if (GET_MODE (new_rtx) != BLKmode)
2017 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2018 else if (MEM_SIZE (memref))
2019 size = plus_constant (MEM_SIZE (memref), -offset);
2021 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2022 memoffset, size, memalign, GET_MODE (new_rtx));
2024 /* At some point, we should validate that this offset is within the object,
2025 if all the appropriate values are known. */
2029 /* Return a memory reference like MEMREF, but with its mode changed
2030 to MODE and its address changed to ADDR, which is assumed to be
2031 MEMREF offset by OFFSET bytes. If VALIDATE is
2032 nonzero, the memory address is forced to be valid. */
2035 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2036 HOST_WIDE_INT offset, int validate)
2038 memref = change_address_1 (memref, VOIDmode, addr, validate);
2039 return adjust_address_1 (memref, mode, offset, validate, 0);
2042 /* Return a memory reference like MEMREF, but whose address is changed by
2043 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2044 known to be in OFFSET (possibly 1). */
2047 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2049 rtx new_rtx, addr = XEXP (memref, 0);
2051 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2053 /* At this point we don't know _why_ the address is invalid. It
2054 could have secondary memory references, multiplies or anything.
2056 However, if we did go and rearrange things, we can wind up not
2057 being able to recognize the magic around pic_offset_table_rtx.
2058 This stuff is fragile, and is yet another example of why it is
2059 bad to expose PIC machinery too early. */
2060 if (! memory_address_p (GET_MODE (memref), new_rtx)
2061 && GET_CODE (addr) == PLUS
2062 && XEXP (addr, 0) == pic_offset_table_rtx)
2064 addr = force_reg (GET_MODE (addr), addr);
2065 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2068 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2069 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2071 /* If there are no changes, just return the original memory reference. */
2072 if (new_rtx == memref)
2075 /* Update the alignment to reflect the offset. Reset the offset, which
2078 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2079 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2080 GET_MODE (new_rtx));
2084 /* Return a memory reference like MEMREF, but with its address changed to
2085 ADDR. The caller is asserting that the actual piece of memory pointed
2086 to is the same, just the form of the address is being changed, such as
2087 by putting something into a register. */
2090 replace_equiv_address (rtx memref, rtx addr)
2092 /* change_address_1 copies the memory attribute structure without change
2093 and that's exactly what we want here. */
2094 update_temp_slot_address (XEXP (memref, 0), addr);
2095 return change_address_1 (memref, VOIDmode, addr, 1);
2098 /* Likewise, but the reference is not required to be valid. */
2101 replace_equiv_address_nv (rtx memref, rtx addr)
2103 return change_address_1 (memref, VOIDmode, addr, 0);
2106 /* Return a memory reference like MEMREF, but with its mode widened to
2107 MODE and offset by OFFSET. This would be used by targets that e.g.
2108 cannot issue QImode memory operations and have to use SImode memory
2109 operations plus masking logic. */
2112 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2114 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2115 tree expr = MEM_EXPR (new_rtx);
2116 rtx memoffset = MEM_OFFSET (new_rtx);
2117 unsigned int size = GET_MODE_SIZE (mode);
2119 /* If there are no changes, just return the original memory reference. */
2120 if (new_rtx == memref)
2123 /* If we don't know what offset we were at within the expression, then
2124 we can't know if we've overstepped the bounds. */
2130 if (TREE_CODE (expr) == COMPONENT_REF)
2132 tree field = TREE_OPERAND (expr, 1);
2133 tree offset = component_ref_field_offset (expr);
2135 if (! DECL_SIZE_UNIT (field))
2141 /* Is the field at least as large as the access? If so, ok,
2142 otherwise strip back to the containing structure. */
2143 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2144 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2145 && INTVAL (memoffset) >= 0)
2148 if (! host_integerp (offset, 1))
2154 expr = TREE_OPERAND (expr, 0);
2156 = (GEN_INT (INTVAL (memoffset)
2157 + tree_low_cst (offset, 1)
2158 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2161 /* Similarly for the decl. */
2162 else if (DECL_P (expr)
2163 && DECL_SIZE_UNIT (expr)
2164 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2165 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2166 && (! memoffset || INTVAL (memoffset) >= 0))
2170 /* The widened memory access overflows the expression, which means
2171 that it could alias another expression. Zap it. */
2178 memoffset = NULL_RTX;
2180 /* The widened memory may alias other stuff, so zap the alias set. */
2181 /* ??? Maybe use get_alias_set on any remaining expression. */
2183 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2184 MEM_ALIGN (new_rtx), mode);
2189 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2190 static GTY(()) tree spill_slot_decl;
2193 get_spill_slot_decl (bool force_build_p)
2195 tree d = spill_slot_decl;
2198 if (d || !force_build_p)
2201 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2202 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2203 DECL_ARTIFICIAL (d) = 1;
2204 DECL_IGNORED_P (d) = 1;
2206 TREE_THIS_NOTRAP (d) = 1;
2207 spill_slot_decl = d;
2209 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2210 MEM_NOTRAP_P (rd) = 1;
2211 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2212 NULL_RTX, 0, BLKmode);
2213 SET_DECL_RTL (d, rd);
2218 /* Given MEM, a result from assign_stack_local, fill in the memory
2219 attributes as appropriate for a register allocator spill slot.
2220 These slots are not aliasable by other memory. We arrange for
2221 them all to use a single MEM_EXPR, so that the aliasing code can
2222 work properly in the case of shared spill slots. */
2225 set_mem_attrs_for_spill (rtx mem)
2227 alias_set_type alias;
2231 expr = get_spill_slot_decl (true);
2232 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2234 /* We expect the incoming memory to be of the form:
2235 (mem:MODE (plus (reg sfp) (const_int offset)))
2236 with perhaps the plus missing for offset = 0. */
2237 addr = XEXP (mem, 0);
2238 offset = const0_rtx;
2239 if (GET_CODE (addr) == PLUS
2240 && CONST_INT_P (XEXP (addr, 1)))
2241 offset = XEXP (addr, 1);
2243 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2244 MEM_SIZE (mem), MEM_ALIGN (mem),
2246 MEM_NOTRAP_P (mem) = 1;
2249 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2252 gen_label_rtx (void)
2254 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2255 NULL, label_num++, NULL);
2258 /* For procedure integration. */
2260 /* Install new pointers to the first and last insns in the chain.
2261 Also, set cur_insn_uid to one higher than the last in use.
2262 Used for an inline-procedure after copying the insn chain. */
2265 set_new_first_and_last_insn (rtx first, rtx last)
2273 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2275 int debug_count = 0;
2277 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2278 cur_debug_insn_uid = 0;
2280 for (insn = first; insn; insn = NEXT_INSN (insn))
2281 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2282 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2285 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2286 if (DEBUG_INSN_P (insn))
2291 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2293 cur_debug_insn_uid++;
2296 for (insn = first; insn; insn = NEXT_INSN (insn))
2297 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2302 /* Go through all the RTL insn bodies and copy any invalid shared
2303 structure. This routine should only be called once. */
2306 unshare_all_rtl_1 (rtx insn)
2308 /* Unshare just about everything else. */
2309 unshare_all_rtl_in_chain (insn);
2311 /* Make sure the addresses of stack slots found outside the insn chain
2312 (such as, in DECL_RTL of a variable) are not shared
2313 with the insn chain.
2315 This special care is necessary when the stack slot MEM does not
2316 actually appear in the insn chain. If it does appear, its address
2317 is unshared from all else at that point. */
2318 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2321 /* Go through all the RTL insn bodies and copy any invalid shared
2322 structure, again. This is a fairly expensive thing to do so it
2323 should be done sparingly. */
2326 unshare_all_rtl_again (rtx insn)
2331 for (p = insn; p; p = NEXT_INSN (p))
2334 reset_used_flags (PATTERN (p));
2335 reset_used_flags (REG_NOTES (p));
2338 /* Make sure that virtual stack slots are not shared. */
2339 set_used_decls (DECL_INITIAL (cfun->decl));
2341 /* Make sure that virtual parameters are not shared. */
2342 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2343 set_used_flags (DECL_RTL (decl));
2345 reset_used_flags (stack_slot_list);
2347 unshare_all_rtl_1 (insn);
2351 unshare_all_rtl (void)
2353 unshare_all_rtl_1 (get_insns ());
2357 struct rtl_opt_pass pass_unshare_all_rtl =
2361 "unshare", /* name */
2363 unshare_all_rtl, /* execute */
2366 0, /* static_pass_number */
2367 TV_NONE, /* tv_id */
2368 0, /* properties_required */
2369 0, /* properties_provided */
2370 0, /* properties_destroyed */
2371 0, /* todo_flags_start */
2372 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2377 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2378 Recursively does the same for subexpressions. */
2381 verify_rtx_sharing (rtx orig, rtx insn)
2386 const char *format_ptr;
2391 code = GET_CODE (x);
2393 /* These types may be freely shared. */
2409 /* SCRATCH must be shared because they represent distinct values. */
2411 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2416 if (shared_const_p (orig))
2421 /* A MEM is allowed to be shared if its address is constant. */
2422 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2423 || reload_completed || reload_in_progress)
2432 /* This rtx may not be shared. If it has already been seen,
2433 replace it with a copy of itself. */
2434 #ifdef ENABLE_CHECKING
2435 if (RTX_FLAG (x, used))
2437 error ("invalid rtl sharing found in the insn");
2439 error ("shared rtx");
2441 internal_error ("internal consistency failure");
2444 gcc_assert (!RTX_FLAG (x, used));
2446 RTX_FLAG (x, used) = 1;
2448 /* Now scan the subexpressions recursively. */
2450 format_ptr = GET_RTX_FORMAT (code);
2452 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2454 switch (*format_ptr++)
2457 verify_rtx_sharing (XEXP (x, i), insn);
2461 if (XVEC (x, i) != NULL)
2464 int len = XVECLEN (x, i);
2466 for (j = 0; j < len; j++)
2468 /* We allow sharing of ASM_OPERANDS inside single
2470 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2471 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2473 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2475 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2484 /* Go through all the RTL insn bodies and check that there is no unexpected
2485 sharing in between the subexpressions. */
2488 verify_rtl_sharing (void)
2492 for (p = get_insns (); p; p = NEXT_INSN (p))
2495 reset_used_flags (PATTERN (p));
2496 reset_used_flags (REG_NOTES (p));
2497 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2500 rtx q, sequence = PATTERN (p);
2502 for (i = 0; i < XVECLEN (sequence, 0); i++)
2504 q = XVECEXP (sequence, 0, i);
2505 gcc_assert (INSN_P (q));
2506 reset_used_flags (PATTERN (q));
2507 reset_used_flags (REG_NOTES (q));
2512 for (p = get_insns (); p; p = NEXT_INSN (p))
2515 verify_rtx_sharing (PATTERN (p), p);
2516 verify_rtx_sharing (REG_NOTES (p), p);
2520 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2521 Assumes the mark bits are cleared at entry. */
2524 unshare_all_rtl_in_chain (rtx insn)
2526 for (; insn; insn = NEXT_INSN (insn))
2529 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2530 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2534 /* Go through all virtual stack slots of a function and mark them as
2535 shared. We never replace the DECL_RTLs themselves with a copy,
2536 but expressions mentioned into a DECL_RTL cannot be shared with
2537 expressions in the instruction stream.
2539 Note that reload may convert pseudo registers into memories in-place.
2540 Pseudo registers are always shared, but MEMs never are. Thus if we
2541 reset the used flags on MEMs in the instruction stream, we must set
2542 them again on MEMs that appear in DECL_RTLs. */
2545 set_used_decls (tree blk)
2550 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2551 if (DECL_RTL_SET_P (t))
2552 set_used_flags (DECL_RTL (t));
2554 /* Now process sub-blocks. */
2555 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2559 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2560 Recursively does the same for subexpressions. Uses
2561 copy_rtx_if_shared_1 to reduce stack space. */
2564 copy_rtx_if_shared (rtx orig)
2566 copy_rtx_if_shared_1 (&orig);
2570 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2571 use. Recursively does the same for subexpressions. */
2574 copy_rtx_if_shared_1 (rtx *orig1)
2580 const char *format_ptr;
2584 /* Repeat is used to turn tail-recursion into iteration. */
2591 code = GET_CODE (x);
2593 /* These types may be freely shared. */
2608 /* SCRATCH must be shared because they represent distinct values. */
2611 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2616 if (shared_const_p (x))
2626 /* The chain of insns is not being copied. */
2633 /* This rtx may not be shared. If it has already been seen,
2634 replace it with a copy of itself. */
2636 if (RTX_FLAG (x, used))
2638 x = shallow_copy_rtx (x);
2641 RTX_FLAG (x, used) = 1;
2643 /* Now scan the subexpressions recursively.
2644 We can store any replaced subexpressions directly into X
2645 since we know X is not shared! Any vectors in X
2646 must be copied if X was copied. */
2648 format_ptr = GET_RTX_FORMAT (code);
2649 length = GET_RTX_LENGTH (code);
2652 for (i = 0; i < length; i++)
2654 switch (*format_ptr++)
2658 copy_rtx_if_shared_1 (last_ptr);
2659 last_ptr = &XEXP (x, i);
2663 if (XVEC (x, i) != NULL)
2666 int len = XVECLEN (x, i);
2668 /* Copy the vector iff I copied the rtx and the length
2670 if (copied && len > 0)
2671 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2673 /* Call recursively on all inside the vector. */
2674 for (j = 0; j < len; j++)
2677 copy_rtx_if_shared_1 (last_ptr);
2678 last_ptr = &XVECEXP (x, i, j);
2693 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2694 to look for shared sub-parts. */
2697 reset_used_flags (rtx x)
2701 const char *format_ptr;
2704 /* Repeat is used to turn tail-recursion into iteration. */
2709 code = GET_CODE (x);
2711 /* These types may be freely shared so we needn't do any resetting
2734 /* The chain of insns is not being copied. */
2741 RTX_FLAG (x, used) = 0;
2743 format_ptr = GET_RTX_FORMAT (code);
2744 length = GET_RTX_LENGTH (code);
2746 for (i = 0; i < length; i++)
2748 switch (*format_ptr++)
2756 reset_used_flags (XEXP (x, i));
2760 for (j = 0; j < XVECLEN (x, i); j++)
2761 reset_used_flags (XVECEXP (x, i, j));
2767 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2768 to look for shared sub-parts. */
2771 set_used_flags (rtx x)
2775 const char *format_ptr;
2780 code = GET_CODE (x);
2782 /* These types may be freely shared so we needn't do any resetting
2805 /* The chain of insns is not being copied. */
2812 RTX_FLAG (x, used) = 1;
2814 format_ptr = GET_RTX_FORMAT (code);
2815 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2817 switch (*format_ptr++)
2820 set_used_flags (XEXP (x, i));
2824 for (j = 0; j < XVECLEN (x, i); j++)
2825 set_used_flags (XVECEXP (x, i, j));
2831 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2832 Return X or the rtx for the pseudo reg the value of X was copied into.
2833 OTHER must be valid as a SET_DEST. */
2836 make_safe_from (rtx x, rtx other)
2839 switch (GET_CODE (other))
2842 other = SUBREG_REG (other);
2844 case STRICT_LOW_PART:
2847 other = XEXP (other, 0);
2856 && GET_CODE (x) != SUBREG)
2858 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2859 || reg_mentioned_p (other, x))))
2861 rtx temp = gen_reg_rtx (GET_MODE (x));
2862 emit_move_insn (temp, x);
2868 /* Emission of insns (adding them to the doubly-linked list). */
2870 /* Return the first insn of the current sequence or current function. */
2878 /* Specify a new insn as the first in the chain. */
2881 set_first_insn (rtx insn)
2883 gcc_assert (!PREV_INSN (insn));
2887 /* Return the last insn emitted in current sequence or current function. */
2890 get_last_insn (void)
2895 /* Specify a new insn as the last in the chain. */
2898 set_last_insn (rtx insn)
2900 gcc_assert (!NEXT_INSN (insn));
2904 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2907 get_last_insn_anywhere (void)
2909 struct sequence_stack *stack;
2912 for (stack = seq_stack; stack; stack = stack->next)
2913 if (stack->last != 0)
2918 /* Return the first nonnote insn emitted in current sequence or current
2919 function. This routine looks inside SEQUENCEs. */
2922 get_first_nonnote_insn (void)
2924 rtx insn = first_insn;
2929 for (insn = next_insn (insn);
2930 insn && NOTE_P (insn);
2931 insn = next_insn (insn))
2935 if (NONJUMP_INSN_P (insn)
2936 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2937 insn = XVECEXP (PATTERN (insn), 0, 0);
2944 /* Return the last nonnote insn emitted in current sequence or current
2945 function. This routine looks inside SEQUENCEs. */
2948 get_last_nonnote_insn (void)
2950 rtx insn = last_insn;
2955 for (insn = previous_insn (insn);
2956 insn && NOTE_P (insn);
2957 insn = previous_insn (insn))
2961 if (NONJUMP_INSN_P (insn)
2962 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2963 insn = XVECEXP (PATTERN (insn), 0,
2964 XVECLEN (PATTERN (insn), 0) - 1);
2971 /* Return a number larger than any instruction's uid in this function. */
2976 return cur_insn_uid;
2979 /* Return the number of actual (non-debug) insns emitted in this
2983 get_max_insn_count (void)
2985 int n = cur_insn_uid;
2987 /* The table size must be stable across -g, to avoid codegen
2988 differences due to debug insns, and not be affected by
2989 -fmin-insn-uid, to avoid excessive table size and to simplify
2990 debugging of -fcompare-debug failures. */
2991 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
2992 n -= cur_debug_insn_uid;
2994 n -= MIN_NONDEBUG_INSN_UID;
3000 /* Return the next insn. If it is a SEQUENCE, return the first insn
3004 next_insn (rtx insn)
3008 insn = NEXT_INSN (insn);
3009 if (insn && NONJUMP_INSN_P (insn)
3010 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3011 insn = XVECEXP (PATTERN (insn), 0, 0);
3017 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3021 previous_insn (rtx insn)
3025 insn = PREV_INSN (insn);
3026 if (insn && NONJUMP_INSN_P (insn)
3027 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3028 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3034 /* Return the next insn after INSN that is not a NOTE. This routine does not
3035 look inside SEQUENCEs. */
3038 next_nonnote_insn (rtx insn)
3042 insn = NEXT_INSN (insn);
3043 if (insn == 0 || !NOTE_P (insn))
3050 /* Return the next insn after INSN that is not a NOTE, but stop the
3051 search before we enter another basic block. This routine does not
3052 look inside SEQUENCEs. */
3055 next_nonnote_insn_bb (rtx insn)
3059 insn = NEXT_INSN (insn);
3060 if (insn == 0 || !NOTE_P (insn))
3062 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3069 /* Return the previous insn before INSN that is not a NOTE. This routine does
3070 not look inside SEQUENCEs. */
3073 prev_nonnote_insn (rtx insn)
3077 insn = PREV_INSN (insn);
3078 if (insn == 0 || !NOTE_P (insn))
3085 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3086 routine does not look inside SEQUENCEs. */
3089 next_nondebug_insn (rtx insn)
3093 insn = NEXT_INSN (insn);
3094 if (insn == 0 || !DEBUG_INSN_P (insn))
3101 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3102 This routine does not look inside SEQUENCEs. */
3105 prev_nondebug_insn (rtx insn)
3109 insn = PREV_INSN (insn);
3110 if (insn == 0 || !DEBUG_INSN_P (insn))
3117 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3118 or 0, if there is none. This routine does not look inside
3122 next_real_insn (rtx insn)
3126 insn = NEXT_INSN (insn);
3127 if (insn == 0 || INSN_P (insn))
3134 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3135 or 0, if there is none. This routine does not look inside
3139 prev_real_insn (rtx insn)
3143 insn = PREV_INSN (insn);
3144 if (insn == 0 || INSN_P (insn))
3151 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3152 This routine does not look inside SEQUENCEs. */
3155 last_call_insn (void)
3159 for (insn = get_last_insn ();
3160 insn && !CALL_P (insn);
3161 insn = PREV_INSN (insn))
3167 /* Find the next insn after INSN that really does something. This routine
3168 does not look inside SEQUENCEs. Until reload has completed, this is the
3169 same as next_real_insn. */
3172 active_insn_p (const_rtx insn)
3174 return (CALL_P (insn) || JUMP_P (insn)
3175 || (NONJUMP_INSN_P (insn)
3176 && (! reload_completed
3177 || (GET_CODE (PATTERN (insn)) != USE
3178 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3182 next_active_insn (rtx insn)
3186 insn = NEXT_INSN (insn);
3187 if (insn == 0 || active_insn_p (insn))
3194 /* Find the last insn before INSN that really does something. This routine
3195 does not look inside SEQUENCEs. Until reload has completed, this is the
3196 same as prev_real_insn. */
3199 prev_active_insn (rtx insn)
3203 insn = PREV_INSN (insn);
3204 if (insn == 0 || active_insn_p (insn))
3211 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3214 next_label (rtx insn)
3218 insn = NEXT_INSN (insn);
3219 if (insn == 0 || LABEL_P (insn))
3226 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3229 prev_label (rtx insn)
3233 insn = PREV_INSN (insn);
3234 if (insn == 0 || LABEL_P (insn))
3241 /* Return the last label to mark the same position as LABEL. Return null
3242 if LABEL itself is null. */
3245 skip_consecutive_labels (rtx label)
3249 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3257 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3258 and REG_CC_USER notes so we can find it. */
3261 link_cc0_insns (rtx insn)
3263 rtx user = next_nonnote_insn (insn);
3265 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3266 user = XVECEXP (PATTERN (user), 0, 0);
3268 add_reg_note (user, REG_CC_SETTER, insn);
3269 add_reg_note (insn, REG_CC_USER, user);
3272 /* Return the next insn that uses CC0 after INSN, which is assumed to
3273 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3274 applied to the result of this function should yield INSN).
3276 Normally, this is simply the next insn. However, if a REG_CC_USER note
3277 is present, it contains the insn that uses CC0.
3279 Return 0 if we can't find the insn. */
3282 next_cc0_user (rtx insn)
3284 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3287 return XEXP (note, 0);
3289 insn = next_nonnote_insn (insn);
3290 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3291 insn = XVECEXP (PATTERN (insn), 0, 0);
3293 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3299 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3300 note, it is the previous insn. */
3303 prev_cc0_setter (rtx insn)
3305 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3308 return XEXP (note, 0);
3310 insn = prev_nonnote_insn (insn);
3311 gcc_assert (sets_cc0_p (PATTERN (insn)));
3318 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3321 find_auto_inc (rtx *xp, void *data)
3324 rtx reg = (rtx) data;
3326 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3329 switch (GET_CODE (x))
3337 if (rtx_equal_p (reg, XEXP (x, 0)))
3348 /* Increment the label uses for all labels present in rtx. */
3351 mark_label_nuses (rtx x)
3357 code = GET_CODE (x);
3358 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3359 LABEL_NUSES (XEXP (x, 0))++;
3361 fmt = GET_RTX_FORMAT (code);
3362 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3365 mark_label_nuses (XEXP (x, i));
3366 else if (fmt[i] == 'E')
3367 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3368 mark_label_nuses (XVECEXP (x, i, j));
3373 /* Try splitting insns that can be split for better scheduling.
3374 PAT is the pattern which might split.
3375 TRIAL is the insn providing PAT.
3376 LAST is nonzero if we should return the last insn of the sequence produced.
3378 If this routine succeeds in splitting, it returns the first or last
3379 replacement insn depending on the value of LAST. Otherwise, it
3380 returns TRIAL. If the insn to be returned can be split, it will be. */
3383 try_split (rtx pat, rtx trial, int last)
3385 rtx before = PREV_INSN (trial);
3386 rtx after = NEXT_INSN (trial);
3387 int has_barrier = 0;
3390 rtx insn_last, insn;
3393 /* We're not good at redistributing frame information. */
3394 if (RTX_FRAME_RELATED_P (trial))
3397 if (any_condjump_p (trial)
3398 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3399 split_branch_probability = INTVAL (XEXP (note, 0));
3400 probability = split_branch_probability;
3402 seq = split_insns (pat, trial);
3404 split_branch_probability = -1;
3406 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3407 We may need to handle this specially. */
3408 if (after && BARRIER_P (after))
3411 after = NEXT_INSN (after);
3417 /* Avoid infinite loop if any insn of the result matches
3418 the original pattern. */
3422 if (INSN_P (insn_last)
3423 && rtx_equal_p (PATTERN (insn_last), pat))
3425 if (!NEXT_INSN (insn_last))
3427 insn_last = NEXT_INSN (insn_last);
3430 /* We will be adding the new sequence to the function. The splitters
3431 may have introduced invalid RTL sharing, so unshare the sequence now. */
3432 unshare_all_rtl_in_chain (seq);
3435 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3439 mark_jump_label (PATTERN (insn), insn, 0);
3441 if (probability != -1
3442 && any_condjump_p (insn)
3443 && !find_reg_note (insn, REG_BR_PROB, 0))
3445 /* We can preserve the REG_BR_PROB notes only if exactly
3446 one jump is created, otherwise the machine description
3447 is responsible for this step using
3448 split_branch_probability variable. */
3449 gcc_assert (njumps == 1);
3450 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3455 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3456 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3459 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3462 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3465 *p = CALL_INSN_FUNCTION_USAGE (trial);
3466 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3470 /* Copy notes, particularly those related to the CFG. */
3471 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3473 switch (REG_NOTE_KIND (note))
3476 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3479 || (flag_non_call_exceptions && INSN_P (insn)
3480 && may_trap_p (PATTERN (insn))))
3481 add_reg_note (insn, REG_EH_REGION, XEXP (note, 0));
3487 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3490 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3494 case REG_NON_LOCAL_GOTO:
3495 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3498 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3504 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3506 rtx reg = XEXP (note, 0);
3507 if (!FIND_REG_INC_NOTE (insn, reg)
3508 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3509 add_reg_note (insn, REG_INC, reg);
3519 /* If there are LABELS inside the split insns increment the
3520 usage count so we don't delete the label. */
3524 while (insn != NULL_RTX)
3526 /* JUMP_P insns have already been "marked" above. */
3527 if (NONJUMP_INSN_P (insn))
3528 mark_label_nuses (PATTERN (insn));
3530 insn = PREV_INSN (insn);
3534 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3536 delete_insn (trial);
3538 emit_barrier_after (tem);
3540 /* Recursively call try_split for each new insn created; by the
3541 time control returns here that insn will be fully split, so
3542 set LAST and continue from the insn after the one returned.
3543 We can't use next_active_insn here since AFTER may be a note.
3544 Ignore deleted insns, which can be occur if not optimizing. */
3545 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3546 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3547 tem = try_split (PATTERN (tem), tem, 1);
3549 /* Return either the first or the last insn, depending on which was
3552 ? (after ? PREV_INSN (after) : last_insn)
3553 : NEXT_INSN (before);
3556 /* Make and return an INSN rtx, initializing all its slots.
3557 Store PATTERN in the pattern slots. */
3560 make_insn_raw (rtx pattern)
3564 insn = rtx_alloc (INSN);
3566 INSN_UID (insn) = cur_insn_uid++;
3567 PATTERN (insn) = pattern;
3568 INSN_CODE (insn) = -1;
3569 REG_NOTES (insn) = NULL;
3570 INSN_LOCATOR (insn) = curr_insn_locator ();
3571 BLOCK_FOR_INSN (insn) = NULL;
3573 #ifdef ENABLE_RTL_CHECKING
3576 && (returnjump_p (insn)
3577 || (GET_CODE (insn) == SET
3578 && SET_DEST (insn) == pc_rtx)))
3580 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3588 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3591 make_debug_insn_raw (rtx pattern)
3595 insn = rtx_alloc (DEBUG_INSN);
3596 INSN_UID (insn) = cur_debug_insn_uid++;
3597 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3598 INSN_UID (insn) = cur_insn_uid++;
3600 PATTERN (insn) = pattern;
3601 INSN_CODE (insn) = -1;
3602 REG_NOTES (insn) = NULL;
3603 INSN_LOCATOR (insn) = curr_insn_locator ();
3604 BLOCK_FOR_INSN (insn) = NULL;
3609 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3612 make_jump_insn_raw (rtx pattern)
3616 insn = rtx_alloc (JUMP_INSN);
3617 INSN_UID (insn) = cur_insn_uid++;
3619 PATTERN (insn) = pattern;
3620 INSN_CODE (insn) = -1;
3621 REG_NOTES (insn) = NULL;
3622 JUMP_LABEL (insn) = NULL;
3623 INSN_LOCATOR (insn) = curr_insn_locator ();
3624 BLOCK_FOR_INSN (insn) = NULL;
3629 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3632 make_call_insn_raw (rtx pattern)
3636 insn = rtx_alloc (CALL_INSN);
3637 INSN_UID (insn) = cur_insn_uid++;
3639 PATTERN (insn) = pattern;
3640 INSN_CODE (insn) = -1;
3641 REG_NOTES (insn) = NULL;
3642 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3643 INSN_LOCATOR (insn) = curr_insn_locator ();
3644 BLOCK_FOR_INSN (insn) = NULL;
3649 /* Add INSN to the end of the doubly-linked list.
3650 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3655 PREV_INSN (insn) = last_insn;
3656 NEXT_INSN (insn) = 0;
3658 if (NULL != last_insn)
3659 NEXT_INSN (last_insn) = insn;
3661 if (NULL == first_insn)
3667 /* Add INSN into the doubly-linked list after insn AFTER. This and
3668 the next should be the only functions called to insert an insn once
3669 delay slots have been filled since only they know how to update a
3673 add_insn_after (rtx insn, rtx after, basic_block bb)
3675 rtx next = NEXT_INSN (after);
3677 gcc_assert (!optimize || !INSN_DELETED_P (after));
3679 NEXT_INSN (insn) = next;
3680 PREV_INSN (insn) = after;
3684 PREV_INSN (next) = insn;
3685 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3686 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3688 else if (last_insn == after)
3692 struct sequence_stack *stack = seq_stack;
3693 /* Scan all pending sequences too. */
3694 for (; stack; stack = stack->next)
3695 if (after == stack->last)
3704 if (!BARRIER_P (after)
3705 && !BARRIER_P (insn)
3706 && (bb = BLOCK_FOR_INSN (after)))
3708 set_block_for_insn (insn, bb);
3710 df_insn_rescan (insn);
3711 /* Should not happen as first in the BB is always
3712 either NOTE or LABEL. */
3713 if (BB_END (bb) == after
3714 /* Avoid clobbering of structure when creating new BB. */
3715 && !BARRIER_P (insn)
3716 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3720 NEXT_INSN (after) = insn;
3721 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3723 rtx sequence = PATTERN (after);
3724 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3728 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3729 the previous should be the only functions called to insert an insn
3730 once delay slots have been filled since only they know how to
3731 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3735 add_insn_before (rtx insn, rtx before, basic_block bb)
3737 rtx prev = PREV_INSN (before);
3739 gcc_assert (!optimize || !INSN_DELETED_P (before));
3741 PREV_INSN (insn) = prev;
3742 NEXT_INSN (insn) = before;
3746 NEXT_INSN (prev) = insn;
3747 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3749 rtx sequence = PATTERN (prev);
3750 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3753 else if (first_insn == before)
3757 struct sequence_stack *stack = seq_stack;
3758 /* Scan all pending sequences too. */
3759 for (; stack; stack = stack->next)
3760 if (before == stack->first)
3762 stack->first = insn;
3770 && !BARRIER_P (before)
3771 && !BARRIER_P (insn))
3772 bb = BLOCK_FOR_INSN (before);
3776 set_block_for_insn (insn, bb);
3778 df_insn_rescan (insn);
3779 /* Should not happen as first in the BB is always either NOTE or
3781 gcc_assert (BB_HEAD (bb) != insn
3782 /* Avoid clobbering of structure when creating new BB. */
3784 || NOTE_INSN_BASIC_BLOCK_P (insn));
3787 PREV_INSN (before) = insn;
3788 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3789 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3793 /* Replace insn with an deleted instruction note. */
3796 set_insn_deleted (rtx insn)
3798 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3799 PUT_CODE (insn, NOTE);
3800 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3804 /* Remove an insn from its doubly-linked list. This function knows how
3805 to handle sequences. */
3807 remove_insn (rtx insn)
3809 rtx next = NEXT_INSN (insn);
3810 rtx prev = PREV_INSN (insn);
3813 /* Later in the code, the block will be marked dirty. */
3814 df_insn_delete (NULL, INSN_UID (insn));
3818 NEXT_INSN (prev) = next;
3819 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3821 rtx sequence = PATTERN (prev);
3822 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3825 else if (first_insn == insn)
3829 struct sequence_stack *stack = seq_stack;
3830 /* Scan all pending sequences too. */
3831 for (; stack; stack = stack->next)
3832 if (insn == stack->first)
3834 stack->first = next;
3843 PREV_INSN (next) = prev;
3844 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3845 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3847 else if (last_insn == insn)
3851 struct sequence_stack *stack = seq_stack;
3852 /* Scan all pending sequences too. */
3853 for (; stack; stack = stack->next)
3854 if (insn == stack->last)
3862 if (!BARRIER_P (insn)
3863 && (bb = BLOCK_FOR_INSN (insn)))
3866 df_set_bb_dirty (bb);
3867 if (BB_HEAD (bb) == insn)
3869 /* Never ever delete the basic block note without deleting whole
3871 gcc_assert (!NOTE_P (insn));
3872 BB_HEAD (bb) = next;
3874 if (BB_END (bb) == insn)
3879 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3882 add_function_usage_to (rtx call_insn, rtx call_fusage)
3884 gcc_assert (call_insn && CALL_P (call_insn));
3886 /* Put the register usage information on the CALL. If there is already
3887 some usage information, put ours at the end. */
3888 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3892 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3893 link = XEXP (link, 1))
3896 XEXP (link, 1) = call_fusage;
3899 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3902 /* Delete all insns made since FROM.
3903 FROM becomes the new last instruction. */
3906 delete_insns_since (rtx from)
3911 NEXT_INSN (from) = 0;
3915 /* This function is deprecated, please use sequences instead.
3917 Move a consecutive bunch of insns to a different place in the chain.
3918 The insns to be moved are those between FROM and TO.
3919 They are moved to a new position after the insn AFTER.
3920 AFTER must not be FROM or TO or any insn in between.
3922 This function does not know about SEQUENCEs and hence should not be
3923 called after delay-slot filling has been done. */
3926 reorder_insns_nobb (rtx from, rtx to, rtx after)
3928 /* Splice this bunch out of where it is now. */
3929 if (PREV_INSN (from))
3930 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3932 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3933 if (last_insn == to)
3934 last_insn = PREV_INSN (from);
3935 if (first_insn == from)
3936 first_insn = NEXT_INSN (to);
3938 /* Make the new neighbors point to it and it to them. */
3939 if (NEXT_INSN (after))
3940 PREV_INSN (NEXT_INSN (after)) = to;
3942 NEXT_INSN (to) = NEXT_INSN (after);
3943 PREV_INSN (from) = after;
3944 NEXT_INSN (after) = from;
3945 if (after == last_insn)
3949 /* Same as function above, but take care to update BB boundaries. */
3951 reorder_insns (rtx from, rtx to, rtx after)
3953 rtx prev = PREV_INSN (from);
3954 basic_block bb, bb2;
3956 reorder_insns_nobb (from, to, after);
3958 if (!BARRIER_P (after)
3959 && (bb = BLOCK_FOR_INSN (after)))
3962 df_set_bb_dirty (bb);
3964 if (!BARRIER_P (from)
3965 && (bb2 = BLOCK_FOR_INSN (from)))
3967 if (BB_END (bb2) == to)
3968 BB_END (bb2) = prev;
3969 df_set_bb_dirty (bb2);
3972 if (BB_END (bb) == after)
3975 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3977 df_insn_change_bb (x, bb);
3982 /* Emit insn(s) of given code and pattern
3983 at a specified place within the doubly-linked list.
3985 All of the emit_foo global entry points accept an object
3986 X which is either an insn list or a PATTERN of a single
3989 There are thus a few canonical ways to generate code and
3990 emit it at a specific place in the instruction stream. For
3991 example, consider the instruction named SPOT and the fact that
3992 we would like to emit some instructions before SPOT. We might
3996 ... emit the new instructions ...
3997 insns_head = get_insns ();
4000 emit_insn_before (insns_head, SPOT);
4002 It used to be common to generate SEQUENCE rtl instead, but that
4003 is a relic of the past which no longer occurs. The reason is that
4004 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4005 generated would almost certainly die right after it was created. */
4007 /* Make X be output before the instruction BEFORE. */
4010 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4015 gcc_assert (before);
4020 switch (GET_CODE (x))
4032 rtx next = NEXT_INSN (insn);
4033 add_insn_before (insn, before, bb);
4039 #ifdef ENABLE_RTL_CHECKING
4046 last = make_insn_raw (x);
4047 add_insn_before (last, before, bb);
4054 /* Make an instruction with body X and code JUMP_INSN
4055 and output it before the instruction BEFORE. */
4058 emit_jump_insn_before_noloc (rtx x, rtx before)
4060 rtx insn, last = NULL_RTX;
4062 gcc_assert (before);
4064 switch (GET_CODE (x))
4076 rtx next = NEXT_INSN (insn);
4077 add_insn_before (insn, before, NULL);
4083 #ifdef ENABLE_RTL_CHECKING
4090 last = make_jump_insn_raw (x);
4091 add_insn_before (last, before, NULL);
4098 /* Make an instruction with body X and code CALL_INSN
4099 and output it before the instruction BEFORE. */
4102 emit_call_insn_before_noloc (rtx x, rtx before)
4104 rtx last = NULL_RTX, insn;
4106 gcc_assert (before);
4108 switch (GET_CODE (x))
4120 rtx next = NEXT_INSN (insn);
4121 add_insn_before (insn, before, NULL);
4127 #ifdef ENABLE_RTL_CHECKING
4134 last = make_call_insn_raw (x);
4135 add_insn_before (last, before, NULL);
4142 /* Make an instruction with body X and code DEBUG_INSN
4143 and output it before the instruction BEFORE. */
4146 emit_debug_insn_before_noloc (rtx x, rtx before)
4148 rtx last = NULL_RTX, insn;
4150 gcc_assert (before);
4152 switch (GET_CODE (x))
4164 rtx next = NEXT_INSN (insn);
4165 add_insn_before (insn, before, NULL);
4171 #ifdef ENABLE_RTL_CHECKING
4178 last = make_debug_insn_raw (x);
4179 add_insn_before (last, before, NULL);
4186 /* Make an insn of code BARRIER
4187 and output it before the insn BEFORE. */
4190 emit_barrier_before (rtx before)
4192 rtx insn = rtx_alloc (BARRIER);
4194 INSN_UID (insn) = cur_insn_uid++;
4196 add_insn_before (insn, before, NULL);
4200 /* Emit the label LABEL before the insn BEFORE. */
4203 emit_label_before (rtx label, rtx before)
4205 /* This can be called twice for the same label as a result of the
4206 confusion that follows a syntax error! So make it harmless. */
4207 if (INSN_UID (label) == 0)
4209 INSN_UID (label) = cur_insn_uid++;
4210 add_insn_before (label, before, NULL);
4216 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4219 emit_note_before (enum insn_note subtype, rtx before)
4221 rtx note = rtx_alloc (NOTE);
4222 INSN_UID (note) = cur_insn_uid++;
4223 NOTE_KIND (note) = subtype;
4224 BLOCK_FOR_INSN (note) = NULL;
4225 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4227 add_insn_before (note, before, NULL);
4231 /* Helper for emit_insn_after, handles lists of instructions
4235 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4239 if (!bb && !BARRIER_P (after))
4240 bb = BLOCK_FOR_INSN (after);
4244 df_set_bb_dirty (bb);
4245 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4246 if (!BARRIER_P (last))
4248 set_block_for_insn (last, bb);
4249 df_insn_rescan (last);
4251 if (!BARRIER_P (last))
4253 set_block_for_insn (last, bb);
4254 df_insn_rescan (last);
4256 if (BB_END (bb) == after)
4260 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4263 after_after = NEXT_INSN (after);
4265 NEXT_INSN (after) = first;
4266 PREV_INSN (first) = after;
4267 NEXT_INSN (last) = after_after;
4269 PREV_INSN (after_after) = last;
4271 if (after == last_insn)
4277 /* Make X be output after the insn AFTER and set the BB of insn. If
4278 BB is NULL, an attempt is made to infer the BB from AFTER. */
4281 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4290 switch (GET_CODE (x))
4299 last = emit_insn_after_1 (x, after, bb);
4302 #ifdef ENABLE_RTL_CHECKING
4309 last = make_insn_raw (x);
4310 add_insn_after (last, after, bb);
4318 /* Make an insn of code JUMP_INSN with body X
4319 and output it after the insn AFTER. */
4322 emit_jump_insn_after_noloc (rtx x, rtx after)
4328 switch (GET_CODE (x))
4337 last = emit_insn_after_1 (x, after, NULL);
4340 #ifdef ENABLE_RTL_CHECKING
4347 last = make_jump_insn_raw (x);
4348 add_insn_after (last, after, NULL);
4355 /* Make an instruction with body X and code CALL_INSN
4356 and output it after the instruction AFTER. */
4359 emit_call_insn_after_noloc (rtx x, rtx after)
4365 switch (GET_CODE (x))
4374 last = emit_insn_after_1 (x, after, NULL);
4377 #ifdef ENABLE_RTL_CHECKING
4384 last = make_call_insn_raw (x);
4385 add_insn_after (last, after, NULL);
4392 /* Make an instruction with body X and code CALL_INSN
4393 and output it after the instruction AFTER. */
4396 emit_debug_insn_after_noloc (rtx x, rtx after)
4402 switch (GET_CODE (x))
4411 last = emit_insn_after_1 (x, after, NULL);
4414 #ifdef ENABLE_RTL_CHECKING
4421 last = make_debug_insn_raw (x);
4422 add_insn_after (last, after, NULL);
4429 /* Make an insn of code BARRIER
4430 and output it after the insn AFTER. */
4433 emit_barrier_after (rtx after)
4435 rtx insn = rtx_alloc (BARRIER);
4437 INSN_UID (insn) = cur_insn_uid++;
4439 add_insn_after (insn, after, NULL);
4443 /* Emit the label LABEL after the insn AFTER. */
4446 emit_label_after (rtx label, rtx after)
4448 /* This can be called twice for the same label
4449 as a result of the confusion that follows a syntax error!
4450 So make it harmless. */
4451 if (INSN_UID (label) == 0)
4453 INSN_UID (label) = cur_insn_uid++;
4454 add_insn_after (label, after, NULL);
4460 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4463 emit_note_after (enum insn_note subtype, rtx after)
4465 rtx note = rtx_alloc (NOTE);
4466 INSN_UID (note) = cur_insn_uid++;
4467 NOTE_KIND (note) = subtype;
4468 BLOCK_FOR_INSN (note) = NULL;
4469 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4470 add_insn_after (note, after, NULL);
4474 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4476 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4478 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4480 if (pattern == NULL_RTX || !loc)
4483 after = NEXT_INSN (after);
4486 if (active_insn_p (after) && !INSN_LOCATOR (after))
4487 INSN_LOCATOR (after) = loc;
4490 after = NEXT_INSN (after);
4495 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4497 emit_insn_after (rtx pattern, rtx after)
4501 while (DEBUG_INSN_P (prev))
4502 prev = PREV_INSN (prev);
4505 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4507 return emit_insn_after_noloc (pattern, after, NULL);
4510 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4512 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4514 rtx last = emit_jump_insn_after_noloc (pattern, after);
4516 if (pattern == NULL_RTX || !loc)
4519 after = NEXT_INSN (after);
4522 if (active_insn_p (after) && !INSN_LOCATOR (after))
4523 INSN_LOCATOR (after) = loc;
4526 after = NEXT_INSN (after);
4531 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4533 emit_jump_insn_after (rtx pattern, rtx after)
4537 while (DEBUG_INSN_P (prev))
4538 prev = PREV_INSN (prev);
4541 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4543 return emit_jump_insn_after_noloc (pattern, after);
4546 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4548 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4550 rtx last = emit_call_insn_after_noloc (pattern, after);
4552 if (pattern == NULL_RTX || !loc)
4555 after = NEXT_INSN (after);
4558 if (active_insn_p (after) && !INSN_LOCATOR (after))
4559 INSN_LOCATOR (after) = loc;
4562 after = NEXT_INSN (after);
4567 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4569 emit_call_insn_after (rtx pattern, rtx after)
4573 while (DEBUG_INSN_P (prev))
4574 prev = PREV_INSN (prev);
4577 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4579 return emit_call_insn_after_noloc (pattern, after);
4582 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4584 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4586 rtx last = emit_debug_insn_after_noloc (pattern, after);
4588 if (pattern == NULL_RTX || !loc)
4591 after = NEXT_INSN (after);
4594 if (active_insn_p (after) && !INSN_LOCATOR (after))
4595 INSN_LOCATOR (after) = loc;
4598 after = NEXT_INSN (after);
4603 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4605 emit_debug_insn_after (rtx pattern, rtx after)
4608 return emit_debug_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4610 return emit_debug_insn_after_noloc (pattern, after);
4613 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4615 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4617 rtx first = PREV_INSN (before);
4618 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4620 if (pattern == NULL_RTX || !loc)
4624 first = get_insns ();
4626 first = NEXT_INSN (first);
4629 if (active_insn_p (first) && !INSN_LOCATOR (first))
4630 INSN_LOCATOR (first) = loc;
4633 first = NEXT_INSN (first);
4638 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4640 emit_insn_before (rtx pattern, rtx before)
4644 while (DEBUG_INSN_P (next))
4645 next = PREV_INSN (next);
4648 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4650 return emit_insn_before_noloc (pattern, before, NULL);
4653 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4655 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4657 rtx first = PREV_INSN (before);
4658 rtx last = emit_jump_insn_before_noloc (pattern, before);
4660 if (pattern == NULL_RTX)
4663 first = NEXT_INSN (first);
4666 if (active_insn_p (first) && !INSN_LOCATOR (first))
4667 INSN_LOCATOR (first) = loc;
4670 first = NEXT_INSN (first);
4675 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4677 emit_jump_insn_before (rtx pattern, rtx before)
4681 while (DEBUG_INSN_P (next))
4682 next = PREV_INSN (next);
4685 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4687 return emit_jump_insn_before_noloc (pattern, before);
4690 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4692 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4694 rtx first = PREV_INSN (before);
4695 rtx last = emit_call_insn_before_noloc (pattern, before);
4697 if (pattern == NULL_RTX)
4700 first = NEXT_INSN (first);
4703 if (active_insn_p (first) && !INSN_LOCATOR (first))
4704 INSN_LOCATOR (first) = loc;
4707 first = NEXT_INSN (first);
4712 /* like emit_call_insn_before_noloc,
4713 but set insn_locator according to before. */
4715 emit_call_insn_before (rtx pattern, rtx before)
4719 while (DEBUG_INSN_P (next))
4720 next = PREV_INSN (next);
4723 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4725 return emit_call_insn_before_noloc (pattern, before);
4728 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4730 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4732 rtx first = PREV_INSN (before);
4733 rtx last = emit_debug_insn_before_noloc (pattern, before);
4735 if (pattern == NULL_RTX)
4738 first = NEXT_INSN (first);
4741 if (active_insn_p (first) && !INSN_LOCATOR (first))
4742 INSN_LOCATOR (first) = loc;
4745 first = NEXT_INSN (first);
4750 /* like emit_debug_insn_before_noloc,
4751 but set insn_locator according to before. */
4753 emit_debug_insn_before (rtx pattern, rtx before)
4755 if (INSN_P (before))
4756 return emit_debug_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4758 return emit_debug_insn_before_noloc (pattern, before);
4761 /* Take X and emit it at the end of the doubly-linked
4764 Returns the last insn emitted. */
4769 rtx last = last_insn;
4775 switch (GET_CODE (x))
4787 rtx next = NEXT_INSN (insn);
4794 #ifdef ENABLE_RTL_CHECKING
4801 last = make_insn_raw (x);
4809 /* Make an insn of code DEBUG_INSN with pattern X
4810 and add it to the end of the doubly-linked list. */
4813 emit_debug_insn (rtx x)
4815 rtx last = last_insn;
4821 switch (GET_CODE (x))
4833 rtx next = NEXT_INSN (insn);
4840 #ifdef ENABLE_RTL_CHECKING
4847 last = make_debug_insn_raw (x);
4855 /* Make an insn of code JUMP_INSN with pattern X
4856 and add it to the end of the doubly-linked list. */
4859 emit_jump_insn (rtx x)
4861 rtx last = NULL_RTX, insn;
4863 switch (GET_CODE (x))
4875 rtx next = NEXT_INSN (insn);
4882 #ifdef ENABLE_RTL_CHECKING
4889 last = make_jump_insn_raw (x);
4897 /* Make an insn of code CALL_INSN with pattern X
4898 and add it to the end of the doubly-linked list. */
4901 emit_call_insn (rtx x)
4905 switch (GET_CODE (x))
4914 insn = emit_insn (x);
4917 #ifdef ENABLE_RTL_CHECKING
4924 insn = make_call_insn_raw (x);
4932 /* Add the label LABEL to the end of the doubly-linked list. */
4935 emit_label (rtx label)
4937 /* This can be called twice for the same label
4938 as a result of the confusion that follows a syntax error!
4939 So make it harmless. */
4940 if (INSN_UID (label) == 0)
4942 INSN_UID (label) = cur_insn_uid++;
4948 /* Make an insn of code BARRIER
4949 and add it to the end of the doubly-linked list. */
4954 rtx barrier = rtx_alloc (BARRIER);
4955 INSN_UID (barrier) = cur_insn_uid++;
4960 /* Emit a copy of note ORIG. */
4963 emit_note_copy (rtx orig)
4967 note = rtx_alloc (NOTE);
4969 INSN_UID (note) = cur_insn_uid++;
4970 NOTE_DATA (note) = NOTE_DATA (orig);
4971 NOTE_KIND (note) = NOTE_KIND (orig);
4972 BLOCK_FOR_INSN (note) = NULL;
4978 /* Make an insn of code NOTE or type NOTE_NO
4979 and add it to the end of the doubly-linked list. */
4982 emit_note (enum insn_note kind)
4986 note = rtx_alloc (NOTE);
4987 INSN_UID (note) = cur_insn_uid++;
4988 NOTE_KIND (note) = kind;
4989 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4990 BLOCK_FOR_INSN (note) = NULL;
4995 /* Emit a clobber of lvalue X. */
4998 emit_clobber (rtx x)
5000 /* CONCATs should not appear in the insn stream. */
5001 if (GET_CODE (x) == CONCAT)
5003 emit_clobber (XEXP (x, 0));
5004 return emit_clobber (XEXP (x, 1));
5006 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5009 /* Return a sequence of insns to clobber lvalue X. */
5023 /* Emit a use of rvalue X. */
5028 /* CONCATs should not appear in the insn stream. */
5029 if (GET_CODE (x) == CONCAT)
5031 emit_use (XEXP (x, 0));
5032 return emit_use (XEXP (x, 1));
5034 return emit_insn (gen_rtx_USE (VOIDmode, x));
5037 /* Return a sequence of insns to use rvalue X. */
5051 /* Cause next statement to emit a line note even if the line number
5055 force_next_line_note (void)
5060 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5061 note of this type already exists, remove it first. */
5064 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5066 rtx note = find_reg_note (insn, kind, NULL_RTX);
5072 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5073 has multiple sets (some callers assume single_set
5074 means the insn only has one set, when in fact it
5075 means the insn only has one * useful * set). */
5076 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
5082 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5083 It serves no useful purpose and breaks eliminate_regs. */
5084 if (GET_CODE (datum) == ASM_OPERANDS)
5089 XEXP (note, 0) = datum;
5090 df_notes_rescan (insn);
5098 XEXP (note, 0) = datum;
5104 add_reg_note (insn, kind, datum);
5110 df_notes_rescan (insn);
5116 return REG_NOTES (insn);
5119 /* Return an indication of which type of insn should have X as a body.
5120 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5122 static enum rtx_code
5123 classify_insn (rtx x)
5127 if (GET_CODE (x) == CALL)
5129 if (GET_CODE (x) == RETURN)
5131 if (GET_CODE (x) == SET)
5133 if (SET_DEST (x) == pc_rtx)
5135 else if (GET_CODE (SET_SRC (x)) == CALL)
5140 if (GET_CODE (x) == PARALLEL)
5143 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5144 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5146 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5147 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5149 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5150 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5156 /* Emit the rtl pattern X as an appropriate kind of insn.
5157 If X is a label, it is simply added into the insn chain. */
5162 enum rtx_code code = classify_insn (x);
5167 return emit_label (x);
5169 return emit_insn (x);
5172 rtx insn = emit_jump_insn (x);
5173 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5174 return emit_barrier ();
5178 return emit_call_insn (x);
5180 return emit_debug_insn (x);
5186 /* Space for free sequence stack entries. */
5187 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5189 /* Begin emitting insns to a sequence. If this sequence will contain
5190 something that might cause the compiler to pop arguments to function
5191 calls (because those pops have previously been deferred; see
5192 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5193 before calling this function. That will ensure that the deferred
5194 pops are not accidentally emitted in the middle of this sequence. */
5197 start_sequence (void)
5199 struct sequence_stack *tem;
5201 if (free_sequence_stack != NULL)
5203 tem = free_sequence_stack;
5204 free_sequence_stack = tem->next;
5207 tem = GGC_NEW (struct sequence_stack);
5209 tem->next = seq_stack;
5210 tem->first = first_insn;
5211 tem->last = last_insn;
5219 /* Set up the insn chain starting with FIRST as the current sequence,
5220 saving the previously current one. See the documentation for
5221 start_sequence for more information about how to use this function. */
5224 push_to_sequence (rtx first)
5230 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5236 /* Like push_to_sequence, but take the last insn as an argument to avoid
5237 looping through the list. */
5240 push_to_sequence2 (rtx first, rtx last)
5248 /* Set up the outer-level insn chain
5249 as the current sequence, saving the previously current one. */
5252 push_topmost_sequence (void)
5254 struct sequence_stack *stack, *top = NULL;
5258 for (stack = seq_stack; stack; stack = stack->next)
5261 first_insn = top->first;
5262 last_insn = top->last;
5265 /* After emitting to the outer-level insn chain, update the outer-level
5266 insn chain, and restore the previous saved state. */
5269 pop_topmost_sequence (void)
5271 struct sequence_stack *stack, *top = NULL;
5273 for (stack = seq_stack; stack; stack = stack->next)
5276 top->first = first_insn;
5277 top->last = last_insn;
5282 /* After emitting to a sequence, restore previous saved state.
5284 To get the contents of the sequence just made, you must call
5285 `get_insns' *before* calling here.
5287 If the compiler might have deferred popping arguments while
5288 generating this sequence, and this sequence will not be immediately
5289 inserted into the instruction stream, use do_pending_stack_adjust
5290 before calling get_insns. That will ensure that the deferred
5291 pops are inserted into this sequence, and not into some random
5292 location in the instruction stream. See INHIBIT_DEFER_POP for more
5293 information about deferred popping of arguments. */
5298 struct sequence_stack *tem = seq_stack;
5300 first_insn = tem->first;
5301 last_insn = tem->last;
5302 seq_stack = tem->next;
5304 memset (tem, 0, sizeof (*tem));
5305 tem->next = free_sequence_stack;
5306 free_sequence_stack = tem;
5309 /* Return 1 if currently emitting into a sequence. */
5312 in_sequence_p (void)
5314 return seq_stack != 0;
5317 /* Put the various virtual registers into REGNO_REG_RTX. */
5320 init_virtual_regs (void)
5322 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5323 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5324 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5325 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5326 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5330 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5331 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5332 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5333 static int copy_insn_n_scratches;
5335 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5336 copied an ASM_OPERANDS.
5337 In that case, it is the original input-operand vector. */
5338 static rtvec orig_asm_operands_vector;
5340 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5341 copied an ASM_OPERANDS.
5342 In that case, it is the copied input-operand vector. */
5343 static rtvec copy_asm_operands_vector;
5345 /* Likewise for the constraints vector. */
5346 static rtvec orig_asm_constraints_vector;
5347 static rtvec copy_asm_constraints_vector;
5349 /* Recursively create a new copy of an rtx for copy_insn.
5350 This function differs from copy_rtx in that it handles SCRATCHes and
5351 ASM_OPERANDs properly.
5352 Normally, this function is not used directly; use copy_insn as front end.
5353 However, you could first copy an insn pattern with copy_insn and then use
5354 this function afterwards to properly copy any REG_NOTEs containing
5358 copy_insn_1 (rtx orig)
5363 const char *format_ptr;
5368 code = GET_CODE (orig);
5383 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5388 for (i = 0; i < copy_insn_n_scratches; i++)
5389 if (copy_insn_scratch_in[i] == orig)
5390 return copy_insn_scratch_out[i];
5394 if (shared_const_p (orig))
5398 /* A MEM with a constant address is not sharable. The problem is that
5399 the constant address may need to be reloaded. If the mem is shared,
5400 then reloading one copy of this mem will cause all copies to appear
5401 to have been reloaded. */
5407 /* Copy the various flags, fields, and other information. We assume
5408 that all fields need copying, and then clear the fields that should
5409 not be copied. That is the sensible default behavior, and forces
5410 us to explicitly document why we are *not* copying a flag. */
5411 copy = shallow_copy_rtx (orig);
5413 /* We do not copy the USED flag, which is used as a mark bit during
5414 walks over the RTL. */
5415 RTX_FLAG (copy, used) = 0;
5417 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5420 RTX_FLAG (copy, jump) = 0;
5421 RTX_FLAG (copy, call) = 0;
5422 RTX_FLAG (copy, frame_related) = 0;
5425 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5427 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5428 switch (*format_ptr++)
5431 if (XEXP (orig, i) != NULL)
5432 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5437 if (XVEC (orig, i) == orig_asm_constraints_vector)
5438 XVEC (copy, i) = copy_asm_constraints_vector;
5439 else if (XVEC (orig, i) == orig_asm_operands_vector)
5440 XVEC (copy, i) = copy_asm_operands_vector;
5441 else if (XVEC (orig, i) != NULL)
5443 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5444 for (j = 0; j < XVECLEN (copy, i); j++)
5445 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5456 /* These are left unchanged. */
5463 if (code == SCRATCH)
5465 i = copy_insn_n_scratches++;
5466 gcc_assert (i < MAX_RECOG_OPERANDS);
5467 copy_insn_scratch_in[i] = orig;
5468 copy_insn_scratch_out[i] = copy;
5470 else if (code == ASM_OPERANDS)
5472 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5473 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5474 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5475 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5481 /* Create a new copy of an rtx.
5482 This function differs from copy_rtx in that it handles SCRATCHes and
5483 ASM_OPERANDs properly.
5484 INSN doesn't really have to be a full INSN; it could be just the
5487 copy_insn (rtx insn)
5489 copy_insn_n_scratches = 0;
5490 orig_asm_operands_vector = 0;
5491 orig_asm_constraints_vector = 0;
5492 copy_asm_operands_vector = 0;
5493 copy_asm_constraints_vector = 0;
5494 return copy_insn_1 (insn);
5497 /* Initialize data structures and variables in this file
5498 before generating rtl for each function. */
5505 if (MIN_NONDEBUG_INSN_UID)
5506 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5509 cur_debug_insn_uid = 1;
5510 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5511 last_location = UNKNOWN_LOCATION;
5512 first_label_num = label_num;
5515 /* Init the tables that describe all the pseudo regs. */
5517 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5519 crtl->emit.regno_pointer_align
5520 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5523 = GGC_NEWVEC (rtx, crtl->emit.regno_pointer_align_length);
5525 /* Put copies of all the hard registers into regno_reg_rtx. */
5526 memcpy (regno_reg_rtx,
5527 static_regno_reg_rtx,
5528 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5530 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5531 init_virtual_regs ();
5533 /* Indicate that the virtual registers and stack locations are
5535 REG_POINTER (stack_pointer_rtx) = 1;
5536 REG_POINTER (frame_pointer_rtx) = 1;
5537 REG_POINTER (hard_frame_pointer_rtx) = 1;
5538 REG_POINTER (arg_pointer_rtx) = 1;
5540 REG_POINTER (virtual_incoming_args_rtx) = 1;
5541 REG_POINTER (virtual_stack_vars_rtx) = 1;
5542 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5543 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5544 REG_POINTER (virtual_cfa_rtx) = 1;
5546 #ifdef STACK_BOUNDARY
5547 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5548 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5549 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5550 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5552 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5553 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5554 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5555 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5556 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5559 #ifdef INIT_EXPANDERS
5564 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5567 gen_const_vector (enum machine_mode mode, int constant)
5572 enum machine_mode inner;
5574 units = GET_MODE_NUNITS (mode);
5575 inner = GET_MODE_INNER (mode);
5577 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5579 v = rtvec_alloc (units);
5581 /* We need to call this function after we set the scalar const_tiny_rtx
5583 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5585 for (i = 0; i < units; ++i)
5586 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5588 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5592 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5593 all elements are zero, and the one vector when all elements are one. */
5595 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5597 enum machine_mode inner = GET_MODE_INNER (mode);
5598 int nunits = GET_MODE_NUNITS (mode);
5602 /* Check to see if all of the elements have the same value. */
5603 x = RTVEC_ELT (v, nunits - 1);
5604 for (i = nunits - 2; i >= 0; i--)
5605 if (RTVEC_ELT (v, i) != x)
5608 /* If the values are all the same, check to see if we can use one of the
5609 standard constant vectors. */
5612 if (x == CONST0_RTX (inner))
5613 return CONST0_RTX (mode);
5614 else if (x == CONST1_RTX (inner))
5615 return CONST1_RTX (mode);
5618 return gen_rtx_raw_CONST_VECTOR (mode, v);
5621 /* Initialise global register information required by all functions. */
5624 init_emit_regs (void)
5628 /* Reset register attributes */
5629 htab_empty (reg_attrs_htab);
5631 /* We need reg_raw_mode, so initialize the modes now. */
5632 init_reg_modes_target ();
5634 /* Assign register numbers to the globally defined register rtx. */
5635 pc_rtx = gen_rtx_PC (VOIDmode);
5636 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5637 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5638 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5639 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5640 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5641 virtual_incoming_args_rtx =
5642 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5643 virtual_stack_vars_rtx =
5644 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5645 virtual_stack_dynamic_rtx =
5646 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5647 virtual_outgoing_args_rtx =
5648 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5649 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5651 /* Initialize RTL for commonly used hard registers. These are
5652 copied into regno_reg_rtx as we begin to compile each function. */
5653 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5654 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5656 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5657 return_address_pointer_rtx
5658 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5661 #ifdef STATIC_CHAIN_REGNUM
5662 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5664 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5665 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5666 static_chain_incoming_rtx
5667 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5670 static_chain_incoming_rtx = static_chain_rtx;
5674 static_chain_rtx = STATIC_CHAIN;
5676 #ifdef STATIC_CHAIN_INCOMING
5677 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5679 static_chain_incoming_rtx = static_chain_rtx;
5683 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5684 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5686 pic_offset_table_rtx = NULL_RTX;
5689 /* Create some permanent unique rtl objects shared between all functions.
5690 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5693 init_emit_once (int line_numbers)
5696 enum machine_mode mode;
5697 enum machine_mode double_mode;
5699 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5701 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5702 const_int_htab_eq, NULL);
5704 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5705 const_double_htab_eq, NULL);
5707 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5708 const_fixed_htab_eq, NULL);
5710 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5711 mem_attrs_htab_eq, NULL);
5712 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5713 reg_attrs_htab_eq, NULL);
5715 no_line_numbers = ! line_numbers;
5717 /* Compute the word and byte modes. */
5719 byte_mode = VOIDmode;
5720 word_mode = VOIDmode;
5721 double_mode = VOIDmode;
5723 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5725 mode = GET_MODE_WIDER_MODE (mode))
5727 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5728 && byte_mode == VOIDmode)
5731 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5732 && word_mode == VOIDmode)
5736 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5738 mode = GET_MODE_WIDER_MODE (mode))
5740 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5741 && double_mode == VOIDmode)
5745 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5747 #ifdef INIT_EXPANDERS
5748 /* This is to initialize {init|mark|free}_machine_status before the first
5749 call to push_function_context_to. This is needed by the Chill front
5750 end which calls push_function_context_to before the first call to
5751 init_function_start. */
5755 /* Create the unique rtx's for certain rtx codes and operand values. */
5757 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5758 tries to use these variables. */
5759 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5760 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5761 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5763 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5764 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5765 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5767 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5769 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5770 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5771 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5776 dconsthalf = dconst1;
5777 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5779 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5781 const REAL_VALUE_TYPE *const r =
5782 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5784 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5786 mode = GET_MODE_WIDER_MODE (mode))
5787 const_tiny_rtx[i][(int) mode] =
5788 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5790 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5792 mode = GET_MODE_WIDER_MODE (mode))
5793 const_tiny_rtx[i][(int) mode] =
5794 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5796 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5798 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5800 mode = GET_MODE_WIDER_MODE (mode))
5801 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5803 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5805 mode = GET_MODE_WIDER_MODE (mode))
5806 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5809 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5811 mode = GET_MODE_WIDER_MODE (mode))
5813 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5814 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5817 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5819 mode = GET_MODE_WIDER_MODE (mode))
5821 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5822 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5825 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5827 mode = GET_MODE_WIDER_MODE (mode))
5829 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5830 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5833 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5835 mode = GET_MODE_WIDER_MODE (mode))
5837 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5838 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5841 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5843 mode = GET_MODE_WIDER_MODE (mode))
5845 FCONST0(mode).data.high = 0;
5846 FCONST0(mode).data.low = 0;
5847 FCONST0(mode).mode = mode;
5848 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5849 FCONST0 (mode), mode);
5852 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5854 mode = GET_MODE_WIDER_MODE (mode))
5856 FCONST0(mode).data.high = 0;
5857 FCONST0(mode).data.low = 0;
5858 FCONST0(mode).mode = mode;
5859 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5860 FCONST0 (mode), mode);
5863 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5865 mode = GET_MODE_WIDER_MODE (mode))
5867 FCONST0(mode).data.high = 0;
5868 FCONST0(mode).data.low = 0;
5869 FCONST0(mode).mode = mode;
5870 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5871 FCONST0 (mode), mode);
5873 /* We store the value 1. */
5874 FCONST1(mode).data.high = 0;
5875 FCONST1(mode).data.low = 0;
5876 FCONST1(mode).mode = mode;
5877 lshift_double (1, 0, GET_MODE_FBIT (mode),
5878 2 * HOST_BITS_PER_WIDE_INT,
5879 &FCONST1(mode).data.low,
5880 &FCONST1(mode).data.high,
5881 SIGNED_FIXED_POINT_MODE_P (mode));
5882 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5883 FCONST1 (mode), mode);
5886 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5888 mode = GET_MODE_WIDER_MODE (mode))
5890 FCONST0(mode).data.high = 0;
5891 FCONST0(mode).data.low = 0;
5892 FCONST0(mode).mode = mode;
5893 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5894 FCONST0 (mode), mode);
5896 /* We store the value 1. */
5897 FCONST1(mode).data.high = 0;
5898 FCONST1(mode).data.low = 0;
5899 FCONST1(mode).mode = mode;
5900 lshift_double (1, 0, GET_MODE_FBIT (mode),
5901 2 * HOST_BITS_PER_WIDE_INT,
5902 &FCONST1(mode).data.low,
5903 &FCONST1(mode).data.high,
5904 SIGNED_FIXED_POINT_MODE_P (mode));
5905 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5906 FCONST1 (mode), mode);
5909 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5911 mode = GET_MODE_WIDER_MODE (mode))
5913 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5916 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5918 mode = GET_MODE_WIDER_MODE (mode))
5920 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5923 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5925 mode = GET_MODE_WIDER_MODE (mode))
5927 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5928 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5931 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5933 mode = GET_MODE_WIDER_MODE (mode))
5935 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5936 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5939 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5940 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5941 const_tiny_rtx[0][i] = const0_rtx;
5943 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5944 if (STORE_FLAG_VALUE == 1)
5945 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5948 /* Produce exact duplicate of insn INSN after AFTER.
5949 Care updating of libcall regions if present. */
5952 emit_copy_of_insn_after (rtx insn, rtx after)
5956 switch (GET_CODE (insn))
5959 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5963 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5967 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5971 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5972 if (CALL_INSN_FUNCTION_USAGE (insn))
5973 CALL_INSN_FUNCTION_USAGE (new_rtx)
5974 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5975 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5976 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5977 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5978 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5979 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5986 /* Update LABEL_NUSES. */
5987 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5989 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5991 /* If the old insn is frame related, then so is the new one. This is
5992 primarily needed for IA-64 unwind info which marks epilogue insns,
5993 which may be duplicated by the basic block reordering code. */
5994 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5996 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5997 will make them. REG_LABEL_TARGETs are created there too, but are
5998 supposed to be sticky, so we copy them. */
5999 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6000 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6002 if (GET_CODE (link) == EXPR_LIST)
6003 add_reg_note (new_rtx, REG_NOTE_KIND (link),
6004 copy_insn_1 (XEXP (link, 0)));
6006 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
6009 INSN_CODE (new_rtx) = INSN_CODE (insn);
6013 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6015 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
6017 if (hard_reg_clobbers[mode][regno])
6018 return hard_reg_clobbers[mode][regno];
6020 return (hard_reg_clobbers[mode][regno] =
6021 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6024 #include "gt-emit-rtl.h"