1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num = 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl[GR_MAX];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
101 REAL_VALUE_TYPE dconst0;
102 REAL_VALUE_TYPE dconst1;
103 REAL_VALUE_TYPE dconst2;
104 REAL_VALUE_TYPE dconstm1;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 static rtx make_jump_insn_raw PARAMS ((rtx));
174 static rtx make_call_insn_raw PARAMS ((rtx));
175 static rtx find_line_note PARAMS ((rtx));
176 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
177 static void unshare_all_rtl_1 PARAMS ((rtx));
178 static void unshare_all_decls PARAMS ((tree));
179 static void reset_used_decls PARAMS ((tree));
180 static hashval_t const_int_htab_hash PARAMS ((const void *));
181 static int const_int_htab_eq PARAMS ((const void *,
183 static int rtx_htab_mark_1 PARAMS ((void **, void *));
184 static void rtx_htab_mark PARAMS ((void *));
187 /* Returns a hash code for X (which is a really a CONST_INT). */
190 const_int_htab_hash (x)
193 return (hashval_t) INTVAL ((const struct rtx_def *) x);
196 /* Returns non-zero if the value represented by X (which is really a
197 CONST_INT) is the same as that given by Y (which is really a
201 const_int_htab_eq (x, y)
205 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
208 /* Mark the hash-table element X (which is really a pointer to an
212 rtx_htab_mark_1 (x, data)
214 void *data ATTRIBUTE_UNUSED;
220 /* Mark all the elements of HTAB (which is really an htab_t full of
227 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
230 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
231 don't attempt to share with the various global pieces of rtl (such as
232 frame_pointer_rtx). */
235 gen_raw_REG (mode, regno)
236 enum machine_mode mode;
239 rtx x = gen_rtx_raw_REG (mode, regno);
240 ORIGINAL_REGNO (x) = regno;
244 /* There are some RTL codes that require special attention; the generation
245 functions do the raw handling. If you add to this list, modify
246 special_rtx in gengenrtl.c as well. */
249 gen_rtx_CONST_INT (mode, arg)
250 enum machine_mode mode ATTRIBUTE_UNUSED;
255 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
256 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
258 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
259 if (const_true_rtx && arg == STORE_FLAG_VALUE)
260 return const_true_rtx;
263 /* Look up the CONST_INT in the hash table. */
264 slot = htab_find_slot_with_hash (const_int_htab, &arg,
265 (hashval_t) arg, INSERT);
267 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
272 /* CONST_DOUBLEs needs special handling because their length is known
276 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
277 enum machine_mode mode;
279 HOST_WIDE_INT arg1, arg2;
281 rtx r = rtx_alloc (CONST_DOUBLE);
286 X0EXP (r, 1) = NULL_RTX;
290 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
297 gen_rtx_REG (mode, regno)
298 enum machine_mode mode;
301 /* In case the MD file explicitly references the frame pointer, have
302 all such references point to the same frame pointer. This is
303 used during frame pointer elimination to distinguish the explicit
304 references to these registers from pseudos that happened to be
307 If we have eliminated the frame pointer or arg pointer, we will
308 be using it as a normal register, for example as a spill
309 register. In such cases, we might be accessing it in a mode that
310 is not Pmode and therefore cannot use the pre-allocated rtx.
312 Also don't do this when we are making new REGs in reload, since
313 we don't want to get confused with the real pointers. */
315 if (mode == Pmode && !reload_in_progress)
317 if (regno == FRAME_POINTER_REGNUM)
318 return frame_pointer_rtx;
319 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
320 if (regno == HARD_FRAME_POINTER_REGNUM)
321 return hard_frame_pointer_rtx;
323 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
324 if (regno == ARG_POINTER_REGNUM)
325 return arg_pointer_rtx;
327 #ifdef RETURN_ADDRESS_POINTER_REGNUM
328 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
329 return return_address_pointer_rtx;
331 if (regno == STACK_POINTER_REGNUM)
332 return stack_pointer_rtx;
335 return gen_raw_REG (mode, regno);
339 gen_rtx_MEM (mode, addr)
340 enum machine_mode mode;
343 rtx rt = gen_rtx_raw_MEM (mode, addr);
345 /* This field is not cleared by the mere allocation of the rtx, so
347 MEM_ALIAS_SET (rt) = 0;
352 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
354 ** This routine generates an RTX of the size specified by
355 ** <code>, which is an RTX code. The RTX structure is initialized
356 ** from the arguments <element1> through <elementn>, which are
357 ** interpreted according to the specific RTX type's format. The
358 ** special machine mode associated with the rtx (if any) is specified
361 ** gen_rtx can be invoked in a way which resembles the lisp-like
362 ** rtx it will generate. For example, the following rtx structure:
364 ** (plus:QI (mem:QI (reg:SI 1))
365 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
367 ** ...would be generated by the following C code:
369 ** gen_rtx (PLUS, QImode,
370 ** gen_rtx (MEM, QImode,
371 ** gen_rtx (REG, SImode, 1)),
372 ** gen_rtx (MEM, QImode,
373 ** gen_rtx (PLUS, SImode,
374 ** gen_rtx (REG, SImode, 2),
375 ** gen_rtx (REG, SImode, 3)))),
380 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
382 #ifndef ANSI_PROTOTYPES
384 enum machine_mode mode;
387 register int i; /* Array indices... */
388 register const char *fmt; /* Current rtx's format... */
389 register rtx rt_val; /* RTX to return to caller... */
393 #ifndef ANSI_PROTOTYPES
394 code = va_arg (p, enum rtx_code);
395 mode = va_arg (p, enum machine_mode);
401 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
406 rtx arg0 = va_arg (p, rtx);
407 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
408 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
409 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
414 rt_val = gen_rtx_REG (mode, va_arg (p, int));
418 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
422 rt_val = rtx_alloc (code); /* Allocate the storage space. */
423 rt_val->mode = mode; /* Store the machine mode... */
425 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
426 for (i = 0; i < GET_RTX_LENGTH (code); i++)
430 case '0': /* Unused field. */
433 case 'i': /* An integer? */
434 XINT (rt_val, i) = va_arg (p, int);
437 case 'w': /* A wide integer? */
438 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
441 case 's': /* A string? */
442 XSTR (rt_val, i) = va_arg (p, char *);
445 case 'e': /* An expression? */
446 case 'u': /* An insn? Same except when printing. */
447 XEXP (rt_val, i) = va_arg (p, rtx);
450 case 'E': /* An RTX vector? */
451 XVEC (rt_val, i) = va_arg (p, rtvec);
454 case 'b': /* A bitmap? */
455 XBITMAP (rt_val, i) = va_arg (p, bitmap);
458 case 't': /* A tree? */
459 XTREE (rt_val, i) = va_arg (p, tree);
473 /* gen_rtvec (n, [rt1, ..., rtn])
475 ** This routine creates an rtvec and stores within it the
476 ** pointers to rtx's which are its arguments.
481 gen_rtvec VPARAMS ((int n, ...))
483 #ifndef ANSI_PROTOTYPES
492 #ifndef ANSI_PROTOTYPES
497 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
499 vector = (rtx *) alloca (n * sizeof (rtx));
501 for (i = 0; i < n; i++)
502 vector[i] = va_arg (p, rtx);
505 return gen_rtvec_v (n, vector);
509 gen_rtvec_v (n, argp)
514 register rtvec rt_val;
517 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
519 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
521 for (i = 0; i < n; i++)
522 rt_val->elem[i] = *argp++;
528 /* Generate a REG rtx for a new pseudo register of mode MODE.
529 This pseudo is assigned the next sequential register number. */
533 enum machine_mode mode;
535 struct function *f = cfun;
538 /* Don't let anything called after initial flow analysis create new
543 if (generating_concat_p
544 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
545 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
547 /* For complex modes, don't make a single pseudo.
548 Instead, make a CONCAT of two pseudos.
549 This allows noncontiguous allocation of the real and imaginary parts,
550 which makes much better code. Besides, allocating DCmode
551 pseudos overstrains reload on some machines like the 386. */
552 rtx realpart, imagpart;
553 int size = GET_MODE_UNIT_SIZE (mode);
554 enum machine_mode partmode
555 = mode_for_size (size * BITS_PER_UNIT,
556 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
557 ? MODE_FLOAT : MODE_INT),
560 realpart = gen_reg_rtx (partmode);
561 imagpart = gen_reg_rtx (partmode);
562 return gen_rtx_CONCAT (mode, realpart, imagpart);
565 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
566 to have an element for this pseudo reg number. */
568 if (reg_rtx_no == f->emit->regno_pointer_align_length)
570 int old_size = f->emit->regno_pointer_align_length;
573 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
574 memset (new + old_size, 0, old_size);
575 f->emit->regno_pointer_align = (unsigned char *) new;
577 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
578 old_size * 2 * sizeof (rtx));
579 memset (new1 + old_size, 0, old_size * sizeof (rtx));
580 regno_reg_rtx = new1;
582 f->emit->regno_pointer_align_length = old_size * 2;
585 val = gen_raw_REG (mode, reg_rtx_no);
586 regno_reg_rtx[reg_rtx_no++] = val;
590 /* Identify REG (which may be a CONCAT) as a user register. */
596 if (GET_CODE (reg) == CONCAT)
598 REG_USERVAR_P (XEXP (reg, 0)) = 1;
599 REG_USERVAR_P (XEXP (reg, 1)) = 1;
601 else if (GET_CODE (reg) == REG)
602 REG_USERVAR_P (reg) = 1;
607 /* Identify REG as a probable pointer register and show its alignment
608 as ALIGN, if nonzero. */
611 mark_reg_pointer (reg, align)
615 if (! REG_POINTER (reg))
617 REG_POINTER (reg) = 1;
620 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
622 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
623 /* We can no-longer be sure just how aligned this pointer is */
624 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
627 /* Return 1 plus largest pseudo reg number used in the current function. */
635 /* Return 1 + the largest label number used so far in the current function. */
640 if (last_label_num && label_num == base_label_num)
641 return last_label_num;
645 /* Return first label number used in this function (if any were used). */
648 get_first_label_num ()
650 return first_label_num;
653 /* Return a value representing some low-order bits of X, where the number
654 of low-order bits is given by MODE. Note that no conversion is done
655 between floating-point and fixed-point values, rather, the bit
656 representation is returned.
658 This function handles the cases in common between gen_lowpart, below,
659 and two variants in cse.c and combine.c. These are the cases that can
660 be safely handled at all points in the compilation.
662 If this is not a case we can handle, return 0. */
665 gen_lowpart_common (mode, x)
666 enum machine_mode mode;
671 if (GET_MODE (x) == mode)
674 /* MODE must occupy no more words than the mode of X. */
675 if (GET_MODE (x) != VOIDmode
676 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
677 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
681 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
682 word = ((GET_MODE_SIZE (GET_MODE (x))
683 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
686 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
687 && (GET_MODE_CLASS (mode) == MODE_INT
688 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
690 /* If we are getting the low-order part of something that has been
691 sign- or zero-extended, we can either just use the object being
692 extended or make a narrower extension. If we want an even smaller
693 piece than the size of the object being extended, call ourselves
696 This case is used mostly by combine and cse. */
698 if (GET_MODE (XEXP (x, 0)) == mode)
700 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
701 return gen_lowpart_common (mode, XEXP (x, 0));
702 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
703 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
705 else if (GET_CODE (x) == SUBREG
706 && (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
707 || GET_MODE_SIZE (mode) <= UNITS_PER_WORD
708 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
709 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
711 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
712 else if (GET_CODE (x) == REG)
714 /* Let the backend decide how many registers to skip. This is needed
715 in particular for Sparc64 where fp regs are smaller than a word. */
716 /* ??? Note that subregs are now ambiguous, in that those against
717 pseudos are sized by the Word Size, while those against hard
718 regs are sized by the underlying register size. Better would be
719 to always interpret the subreg offset parameter as bytes or bits. */
721 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER
722 && GET_MODE_SIZE (GET_MODE (x)) > GET_MODE_SIZE (mode))
723 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
724 - HARD_REGNO_NREGS (REGNO (x), mode));
726 /* If the register is not valid for MODE, return 0. If we don't
727 do this, there is no way to fix up the resulting REG later.
728 But we do do this if the current REG is not valid for its
729 mode. This latter is a kludge, but is required due to the
730 way that parameters are passed on some machines, most
732 if (REGNO (x) < FIRST_PSEUDO_REGISTER
733 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
734 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
736 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
737 /* integrate.c can't handle parts of a return value register. */
738 && (! REG_FUNCTION_VALUE_P (x)
739 || ! rtx_equal_function_value_matters)
740 #ifdef CLASS_CANNOT_CHANGE_MODE
741 && ! (CLASS_CANNOT_CHANGE_MODE_P (mode, GET_MODE (x))
742 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
743 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
744 && (TEST_HARD_REG_BIT
745 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
748 /* We want to keep the stack, frame, and arg pointers
750 && x != frame_pointer_rtx
751 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
752 && x != arg_pointer_rtx
754 && x != stack_pointer_rtx)
755 return gen_rtx_REG (mode, REGNO (x) + word);
757 return gen_rtx_SUBREG (mode, x, word);
759 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
760 from the low-order part of the constant. */
761 else if ((GET_MODE_CLASS (mode) == MODE_INT
762 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
763 && GET_MODE (x) == VOIDmode
764 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
766 /* If MODE is twice the host word size, X is already the desired
767 representation. Otherwise, if MODE is wider than a word, we can't
768 do this. If MODE is exactly a word, return just one CONST_INT. */
770 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
772 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
774 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
775 return (GET_CODE (x) == CONST_INT ? x
776 : GEN_INT (CONST_DOUBLE_LOW (x)));
779 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
780 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
781 : CONST_DOUBLE_LOW (x));
783 /* Sign extend to HOST_WIDE_INT. */
784 val = trunc_int_for_mode (val, mode);
786 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
791 #ifndef REAL_ARITHMETIC
792 /* If X is an integral constant but we want it in floating-point, it
793 must be the case that we have a union of an integer and a floating-point
794 value. If the machine-parameters allow it, simulate that union here
795 and return the result. The two-word and single-word cases are
798 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
799 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
800 || flag_pretend_float)
801 && GET_MODE_CLASS (mode) == MODE_FLOAT
802 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
803 && GET_CODE (x) == CONST_INT
804 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
806 union {HOST_WIDE_INT i; float d; } u;
809 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
811 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
812 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
813 || flag_pretend_float)
814 && GET_MODE_CLASS (mode) == MODE_FLOAT
815 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
816 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
817 && GET_MODE (x) == VOIDmode
818 && (sizeof (double) * HOST_BITS_PER_CHAR
819 == 2 * HOST_BITS_PER_WIDE_INT))
821 union {HOST_WIDE_INT i[2]; double d; } u;
822 HOST_WIDE_INT low, high;
824 if (GET_CODE (x) == CONST_INT)
825 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
827 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
829 #ifdef HOST_WORDS_BIG_ENDIAN
830 u.i[0] = high, u.i[1] = low;
832 u.i[0] = low, u.i[1] = high;
835 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
838 /* Similarly, if this is converting a floating-point value into a
839 single-word integer. Only do this is the host and target parameters are
842 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
843 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
844 || flag_pretend_float)
845 && (GET_MODE_CLASS (mode) == MODE_INT
846 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
847 && GET_CODE (x) == CONST_DOUBLE
848 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
849 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
850 return operand_subword (x, word, 0, GET_MODE (x));
852 /* Similarly, if this is converting a floating-point value into a
853 two-word integer, we can do this one word at a time and make an
854 integer. Only do this is the host and target parameters are
857 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
858 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
859 || flag_pretend_float)
860 && (GET_MODE_CLASS (mode) == MODE_INT
861 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
862 && GET_CODE (x) == CONST_DOUBLE
863 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
864 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
867 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
869 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
871 if (lowpart && GET_CODE (lowpart) == CONST_INT
872 && highpart && GET_CODE (highpart) == CONST_INT)
873 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
875 #else /* ifndef REAL_ARITHMETIC */
877 /* When we have a FP emulator, we can handle all conversions between
878 FP and integer operands. This simplifies reload because it
879 doesn't have to deal with constructs like (subreg:DI
880 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
882 else if (mode == SFmode
883 && GET_CODE (x) == CONST_INT)
889 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
890 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
892 else if (mode == DFmode
893 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
894 && GET_MODE (x) == VOIDmode)
898 HOST_WIDE_INT low, high;
900 if (GET_CODE (x) == CONST_INT)
903 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
907 low = CONST_DOUBLE_LOW (x);
908 high = CONST_DOUBLE_HIGH (x);
911 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
913 if (WORDS_BIG_ENDIAN)
914 i[0] = high, i[1] = low;
916 i[0] = low, i[1] = high;
918 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
919 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
921 else if ((GET_MODE_CLASS (mode) == MODE_INT
922 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
923 && GET_CODE (x) == CONST_DOUBLE
924 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
927 long i[4]; /* Only the low 32 bits of each 'long' are used. */
928 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
930 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
931 switch (GET_MODE (x))
934 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
938 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
940 #if LONG_DOUBLE_TYPE_SIZE == 96
942 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
946 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
953 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
955 #if HOST_BITS_PER_WIDE_INT == 32
956 return immed_double_const (i[endian], i[1 - endian], mode);
961 if (HOST_BITS_PER_WIDE_INT != 64)
964 for (c = 0; c < 4; c++)
967 switch (GET_MODE (x))
971 return immed_double_const (((unsigned long) i[endian]) |
972 (((HOST_WIDE_INT) i[1-endian]) << 32),
975 return immed_double_const (((unsigned long) i[endian*3]) |
976 (((HOST_WIDE_INT) i[1+endian]) << 32),
977 ((unsigned long) i[2-endian]) |
978 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
984 #endif /* ifndef REAL_ARITHMETIC */
986 /* Otherwise, we can't do this. */
990 /* Return the real part (which has mode MODE) of a complex value X.
991 This always comes at the low address in memory. */
994 gen_realpart (mode, x)
995 enum machine_mode mode;
998 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
1000 else if (WORDS_BIG_ENDIAN
1001 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1003 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1004 fatal ("Unable to access real part of complex value in a hard register on this target");
1005 else if (WORDS_BIG_ENDIAN)
1006 return gen_highpart (mode, x);
1008 return gen_lowpart (mode, x);
1011 /* Return the imaginary part (which has mode MODE) of a complex value X.
1012 This always comes at the high address in memory. */
1015 gen_imagpart (mode, x)
1016 enum machine_mode mode;
1019 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
1021 else if (WORDS_BIG_ENDIAN)
1022 return gen_lowpart (mode, x);
1023 else if (!WORDS_BIG_ENDIAN
1024 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1026 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1027 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
1029 return gen_highpart (mode, x);
1032 /* Return 1 iff X, assumed to be a SUBREG,
1033 refers to the real part of the complex value in its containing reg.
1034 Complex values are always stored with the real part in the first word,
1035 regardless of WORDS_BIG_ENDIAN. */
1038 subreg_realpart_p (x)
1041 if (GET_CODE (x) != SUBREG)
1044 return ((unsigned int) SUBREG_WORD (x) * UNITS_PER_WORD
1045 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1048 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1049 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1050 least-significant part of X.
1051 MODE specifies how big a part of X to return;
1052 it usually should not be larger than a word.
1053 If X is a MEM whose address is a QUEUED, the value may be so also. */
1056 gen_lowpart (mode, x)
1057 enum machine_mode mode;
1060 rtx result = gen_lowpart_common (mode, x);
1064 else if (GET_CODE (x) == REG)
1066 /* Must be a hard reg that's not valid in MODE. */
1067 result = gen_lowpart_common (mode, copy_to_reg (x));
1072 else if (GET_CODE (x) == MEM)
1074 /* The only additional case we can do is MEM. */
1075 register int offset = 0;
1076 if (WORDS_BIG_ENDIAN)
1077 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1078 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1080 if (BYTES_BIG_ENDIAN)
1081 /* Adjust the address so that the address-after-the-data
1083 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1084 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1086 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1088 else if (GET_CODE (x) == ADDRESSOF)
1089 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1094 /* Like `gen_lowpart', but refer to the most significant part.
1095 This is used to access the imaginary part of a complex number. */
1098 gen_highpart (mode, x)
1099 enum machine_mode mode;
1102 /* This case loses if X is a subreg. To catch bugs early,
1103 complain if an invalid MODE is used even in other cases. */
1104 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1105 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1107 if (GET_CODE (x) == CONST_DOUBLE
1108 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1109 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1112 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1113 else if (GET_CODE (x) == CONST_INT)
1115 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1117 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1119 else if (GET_CODE (x) == MEM)
1121 register int offset = 0;
1122 if (! WORDS_BIG_ENDIAN)
1123 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1124 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1126 if (! BYTES_BIG_ENDIAN
1127 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1128 offset -= (GET_MODE_SIZE (mode)
1129 - MIN (UNITS_PER_WORD,
1130 GET_MODE_SIZE (GET_MODE (x))));
1132 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1134 else if (GET_CODE (x) == SUBREG)
1136 /* The only time this should occur is when we are looking at a
1137 multi-word item with a SUBREG whose mode is the same as that of the
1138 item. It isn't clear what we would do if it wasn't. */
1139 if (SUBREG_WORD (x) != 0)
1141 return gen_highpart (mode, SUBREG_REG (x));
1143 else if (GET_CODE (x) == REG)
1147 /* Let the backend decide how many registers to skip. This is needed
1148 in particular for sparc64 where fp regs are smaller than a word. */
1149 /* ??? Note that subregs are now ambiguous, in that those against
1150 pseudos are sized by the word size, while those against hard
1151 regs are sized by the underlying register size. Better would be
1152 to always interpret the subreg offset parameter as bytes or bits. */
1154 if (GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (mode))
1156 else if (WORDS_BIG_ENDIAN)
1158 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1159 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1160 - HARD_REGNO_NREGS (REGNO (x), mode));
1162 word = ((GET_MODE_SIZE (GET_MODE (x))
1163 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1166 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1167 /* integrate.c can't handle parts of a return value register. */
1168 && (! REG_FUNCTION_VALUE_P (x)
1169 || ! rtx_equal_function_value_matters)
1170 /* We want to keep the stack, frame, and arg pointers special. */
1171 && x != frame_pointer_rtx
1172 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1173 && x != arg_pointer_rtx
1175 && x != stack_pointer_rtx)
1176 return gen_rtx_REG (mode, REGNO (x) + word);
1178 return gen_rtx_SUBREG (mode, x, word);
1184 /* Return 1 iff X, assumed to be a SUBREG,
1185 refers to the least significant part of its containing reg.
1186 If X is not a SUBREG, always return 1 (it is its own low part!). */
1189 subreg_lowpart_p (x)
1192 if (GET_CODE (x) != SUBREG)
1194 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1197 if (WORDS_BIG_ENDIAN
1198 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1199 return (SUBREG_WORD (x)
1200 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1201 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1204 return SUBREG_WORD (x) == 0;
1207 /* Return subword I of operand OP.
1208 The word number, I, is interpreted as the word number starting at the
1209 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1210 otherwise it is the high-order word.
1212 If we cannot extract the required word, we return zero. Otherwise, an
1213 rtx corresponding to the requested word will be returned.
1215 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1216 reload has completed, a valid address will always be returned. After
1217 reload, if a valid address cannot be returned, we return zero.
1219 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1220 it is the responsibility of the caller.
1222 MODE is the mode of OP in case it is a CONST_INT. */
1225 operand_subword (op, i, validate_address, mode)
1228 int validate_address;
1229 enum machine_mode mode;
1232 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1234 if (mode == VOIDmode)
1235 mode = GET_MODE (op);
1237 if (mode == VOIDmode)
1240 /* If OP is narrower than a word, fail. */
1242 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1245 /* If we want a word outside OP, return zero. */
1247 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1250 /* If OP is already an integer word, return it. */
1251 if (GET_MODE_CLASS (mode) == MODE_INT
1252 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1255 /* If OP is a REG or SUBREG, we can handle it very simply. */
1256 if (GET_CODE (op) == REG)
1258 /* ??? There is a potential problem with this code. It does not
1259 properly handle extractions of a subword from a hard register
1260 that is larger than word_mode. Presumably the check for
1261 HARD_REGNO_MODE_OK catches these most of these cases. */
1263 /* If OP is a hard register, but OP + I is not a hard register,
1264 then extracting a subword is impossible.
1266 For example, consider if OP is the last hard register and it is
1267 larger than word_mode. If we wanted word N (for N > 0) because a
1268 part of that hard register was known to contain a useful value,
1269 then OP + I would refer to a pseudo, not the hard register we
1271 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1272 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1275 /* If the register is not valid for MODE, return 0. Note we
1276 have to check both OP and OP + I since they may refer to
1277 different parts of the register file.
1279 Consider if OP refers to the last 96bit FP register and we want
1280 subword 3 because that subword is known to contain a value we
1282 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1283 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1284 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1286 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1287 || (REG_FUNCTION_VALUE_P (op)
1288 && rtx_equal_function_value_matters)
1289 /* We want to keep the stack, frame, and arg pointers
1291 || op == frame_pointer_rtx
1292 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1293 || op == arg_pointer_rtx
1295 || op == stack_pointer_rtx)
1296 return gen_rtx_SUBREG (word_mode, op, i);
1298 return gen_rtx_REG (word_mode, REGNO (op) + i);
1300 else if (GET_CODE (op) == SUBREG)
1301 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1302 else if (GET_CODE (op) == CONCAT)
1304 unsigned int partwords
1305 = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1308 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1309 return operand_subword (XEXP (op, 1), i - partwords,
1310 validate_address, mode);
1313 /* Form a new MEM at the requested address. */
1314 if (GET_CODE (op) == MEM)
1316 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1319 if (validate_address)
1321 if (reload_completed)
1323 if (! strict_memory_address_p (word_mode, addr))
1327 addr = memory_address (word_mode, addr);
1330 new = gen_rtx_MEM (word_mode, addr);
1331 MEM_COPY_ATTRIBUTES (new, op);
1335 /* The only remaining cases are when OP is a constant. If the host and
1336 target floating formats are the same, handling two-word floating
1337 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1338 are defined as returning one or two 32 bit values, respectively,
1339 and not values of BITS_PER_WORD bits. */
1340 #ifdef REAL_ARITHMETIC
1341 /* The output is some bits, the width of the target machine's word.
1342 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1344 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1345 && GET_MODE_CLASS (mode) == MODE_FLOAT
1346 && GET_MODE_BITSIZE (mode) == 64
1347 && GET_CODE (op) == CONST_DOUBLE)
1352 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1353 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1355 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1356 which the words are written depends on the word endianness.
1357 ??? This is a potential portability problem and should
1358 be fixed at some point.
1360 We must excercise caution with the sign bit. By definition there
1361 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1362 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1363 So we explicitly mask and sign-extend as necessary. */
1364 if (BITS_PER_WORD == 32)
1367 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1368 return GEN_INT (val);
1370 #if HOST_BITS_PER_WIDE_INT >= 64
1371 else if (BITS_PER_WORD >= 64 && i == 0)
1373 val = k[! WORDS_BIG_ENDIAN];
1374 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1375 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1376 return GEN_INT (val);
1379 else if (BITS_PER_WORD == 16)
1382 if ((i & 1) == !WORDS_BIG_ENDIAN)
1385 return GEN_INT (val);
1390 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1391 && GET_MODE_CLASS (mode) == MODE_FLOAT
1392 && GET_MODE_BITSIZE (mode) > 64
1393 && GET_CODE (op) == CONST_DOUBLE)
1398 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1399 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1401 if (BITS_PER_WORD == 32)
1404 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1405 return GEN_INT (val);
1407 #if HOST_BITS_PER_WIDE_INT >= 64
1408 else if (BITS_PER_WORD >= 64 && i <= 1)
1410 val = k[i*2 + ! WORDS_BIG_ENDIAN];
1411 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1412 val |= (HOST_WIDE_INT) k[i*2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1413 return GEN_INT (val);
1419 #else /* no REAL_ARITHMETIC */
1420 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1421 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1422 || flag_pretend_float)
1423 && GET_MODE_CLASS (mode) == MODE_FLOAT
1424 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1425 && GET_CODE (op) == CONST_DOUBLE)
1427 /* The constant is stored in the host's word-ordering,
1428 but we want to access it in the target's word-ordering. Some
1429 compilers don't like a conditional inside macro args, so we have two
1430 copies of the return. */
1431 #ifdef HOST_WORDS_BIG_ENDIAN
1432 return GEN_INT (i == WORDS_BIG_ENDIAN
1433 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1435 return GEN_INT (i != WORDS_BIG_ENDIAN
1436 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1439 #endif /* no REAL_ARITHMETIC */
1441 /* Single word float is a little harder, since single- and double-word
1442 values often do not have the same high-order bits. We have already
1443 verified that we want the only defined word of the single-word value. */
1444 #ifdef REAL_ARITHMETIC
1445 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1446 && GET_MODE_BITSIZE (mode) == 32
1447 && GET_CODE (op) == CONST_DOUBLE)
1452 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1453 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1455 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1457 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1459 if (BITS_PER_WORD == 16)
1461 if ((i & 1) == !WORDS_BIG_ENDIAN)
1466 return GEN_INT (val);
1469 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1470 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1471 || flag_pretend_float)
1472 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1473 && GET_MODE_CLASS (mode) == MODE_FLOAT
1474 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1475 && GET_CODE (op) == CONST_DOUBLE)
1478 union {float f; HOST_WIDE_INT i; } u;
1480 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1483 return GEN_INT (u.i);
1485 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1486 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1487 || flag_pretend_float)
1488 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1489 && GET_MODE_CLASS (mode) == MODE_FLOAT
1490 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1491 && GET_CODE (op) == CONST_DOUBLE)
1494 union {double d; HOST_WIDE_INT i; } u;
1496 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1499 return GEN_INT (u.i);
1501 #endif /* no REAL_ARITHMETIC */
1503 /* The only remaining cases that we can handle are integers.
1504 Convert to proper endianness now since these cases need it.
1505 At this point, i == 0 means the low-order word.
1507 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1508 in general. However, if OP is (const_int 0), we can just return
1511 if (op == const0_rtx)
1514 if (GET_MODE_CLASS (mode) != MODE_INT
1515 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1516 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1519 if (WORDS_BIG_ENDIAN)
1520 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1522 /* Find out which word on the host machine this value is in and get
1523 it from the constant. */
1524 val = (i / size_ratio == 0
1525 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1526 : (GET_CODE (op) == CONST_INT
1527 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1529 /* Get the value we want into the low bits of val. */
1530 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1531 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1533 val = trunc_int_for_mode (val, word_mode);
1535 return GEN_INT (val);
1538 /* Similar to `operand_subword', but never return 0. If we can't extract
1539 the required subword, put OP into a register and try again. If that fails,
1540 abort. We always validate the address in this case. It is not valid
1541 to call this function after reload; it is mostly meant for RTL
1544 MODE is the mode of OP, in case it is CONST_INT. */
1547 operand_subword_force (op, i, mode)
1550 enum machine_mode mode;
1552 rtx result = operand_subword (op, i, 1, mode);
1557 if (mode != BLKmode && mode != VOIDmode)
1559 /* If this is a register which can not be accessed by words, copy it
1560 to a pseudo register. */
1561 if (GET_CODE (op) == REG)
1562 op = copy_to_reg (op);
1564 op = force_reg (mode, op);
1567 result = operand_subword (op, i, 1, mode);
1574 /* Given a compare instruction, swap the operands.
1575 A test instruction is changed into a compare of 0 against the operand. */
1578 reverse_comparison (insn)
1581 rtx body = PATTERN (insn);
1584 if (GET_CODE (body) == SET)
1585 comp = SET_SRC (body);
1587 comp = SET_SRC (XVECEXP (body, 0, 0));
1589 if (GET_CODE (comp) == COMPARE)
1591 rtx op0 = XEXP (comp, 0);
1592 rtx op1 = XEXP (comp, 1);
1593 XEXP (comp, 0) = op1;
1594 XEXP (comp, 1) = op0;
1598 rtx new = gen_rtx_COMPARE (VOIDmode,
1599 CONST0_RTX (GET_MODE (comp)), comp);
1600 if (GET_CODE (body) == SET)
1601 SET_SRC (body) = new;
1603 SET_SRC (XVECEXP (body, 0, 0)) = new;
1607 /* Return a memory reference like MEMREF, but with its mode changed
1608 to MODE and its address changed to ADDR.
1609 (VOIDmode means don't change the mode.
1610 NULL for ADDR means don't change the address.) */
1613 change_address (memref, mode, addr)
1615 enum machine_mode mode;
1620 if (GET_CODE (memref) != MEM)
1622 if (mode == VOIDmode)
1623 mode = GET_MODE (memref);
1625 addr = XEXP (memref, 0);
1627 /* If reload is in progress or has completed, ADDR must be valid.
1628 Otherwise, we can call memory_address to make it valid. */
1629 if (reload_completed || reload_in_progress)
1631 if (! memory_address_p (mode, addr))
1635 addr = memory_address (mode, addr);
1637 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1640 new = gen_rtx_MEM (mode, addr);
1641 MEM_COPY_ATTRIBUTES (new, memref);
1645 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1652 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1653 NULL_RTX, label_num++, NULL_PTR, NULL_PTR);
1655 LABEL_NUSES (label) = 0;
1656 LABEL_ALTERNATE_NAME (label) = NULL;
1660 /* For procedure integration. */
1662 /* Install new pointers to the first and last insns in the chain.
1663 Also, set cur_insn_uid to one higher than the last in use.
1664 Used for an inline-procedure after copying the insn chain. */
1667 set_new_first_and_last_insn (first, last)
1676 for (insn = first; insn; insn = NEXT_INSN (insn))
1677 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1682 /* Set the range of label numbers found in the current function.
1683 This is used when belatedly compiling an inline function. */
1686 set_new_first_and_last_label_num (first, last)
1689 base_label_num = label_num;
1690 first_label_num = first;
1691 last_label_num = last;
1694 /* Set the last label number found in the current function.
1695 This is used when belatedly compiling an inline function. */
1698 set_new_last_label_num (last)
1701 base_label_num = label_num;
1702 last_label_num = last;
1705 /* Restore all variables describing the current status from the structure *P.
1706 This is used after a nested function. */
1709 restore_emit_status (p)
1710 struct function *p ATTRIBUTE_UNUSED;
1713 clear_emit_caches ();
1716 /* Clear out all parts of the state in F that can safely be discarded
1717 after the function has been compiled, to let garbage collection
1718 reclaim the memory. */
1721 free_emit_status (f)
1724 free (f->emit->x_regno_reg_rtx);
1725 free (f->emit->regno_pointer_align);
1730 /* Go through all the RTL insn bodies and copy any invalid shared
1731 structure. This routine should only be called once. */
1734 unshare_all_rtl (fndecl, insn)
1740 /* Make sure that virtual parameters are not shared. */
1741 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1742 DECL_RTL (decl) = copy_rtx_if_shared (DECL_RTL (decl));
1744 /* Make sure that virtual stack slots are not shared. */
1745 unshare_all_decls (DECL_INITIAL (fndecl));
1747 /* Unshare just about everything else. */
1748 unshare_all_rtl_1 (insn);
1750 /* Make sure the addresses of stack slots found outside the insn chain
1751 (such as, in DECL_RTL of a variable) are not shared
1752 with the insn chain.
1754 This special care is necessary when the stack slot MEM does not
1755 actually appear in the insn chain. If it does appear, its address
1756 is unshared from all else at that point. */
1757 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1760 /* Go through all the RTL insn bodies and copy any invalid shared
1761 structure, again. This is a fairly expensive thing to do so it
1762 should be done sparingly. */
1765 unshare_all_rtl_again (insn)
1771 for (p = insn; p; p = NEXT_INSN (p))
1774 reset_used_flags (PATTERN (p));
1775 reset_used_flags (REG_NOTES (p));
1776 reset_used_flags (LOG_LINKS (p));
1779 /* Make sure that virtual stack slots are not shared. */
1780 reset_used_decls (DECL_INITIAL (cfun->decl));
1782 /* Make sure that virtual parameters are not shared. */
1783 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1784 reset_used_flags (DECL_RTL (decl));
1786 reset_used_flags (stack_slot_list);
1788 unshare_all_rtl (cfun->decl, insn);
1791 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1792 Assumes the mark bits are cleared at entry. */
1795 unshare_all_rtl_1 (insn)
1798 for (; insn; insn = NEXT_INSN (insn))
1801 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1802 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1803 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1807 /* Go through all virtual stack slots of a function and copy any
1808 shared structure. */
1810 unshare_all_decls (blk)
1815 /* Copy shared decls. */
1816 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1817 DECL_RTL (t) = copy_rtx_if_shared (DECL_RTL (t));
1819 /* Now process sub-blocks. */
1820 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1821 unshare_all_decls (t);
1824 /* Go through all virtual stack slots of a function and mark them as
1827 reset_used_decls (blk)
1833 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1834 reset_used_flags (DECL_RTL (t));
1836 /* Now process sub-blocks. */
1837 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1838 reset_used_decls (t);
1841 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1842 Recursively does the same for subexpressions. */
1845 copy_rtx_if_shared (orig)
1848 register rtx x = orig;
1850 register enum rtx_code code;
1851 register const char *format_ptr;
1857 code = GET_CODE (x);
1859 /* These types may be freely shared. */
1872 /* SCRATCH must be shared because they represent distinct values. */
1876 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1877 a LABEL_REF, it isn't sharable. */
1878 if (GET_CODE (XEXP (x, 0)) == PLUS
1879 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1880 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1889 /* The chain of insns is not being copied. */
1893 /* A MEM is allowed to be shared if its address is constant.
1895 We used to allow sharing of MEMs which referenced
1896 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1897 that can lose. instantiate_virtual_regs will not unshare
1898 the MEMs, and combine may change the structure of the address
1899 because it looks safe and profitable in one context, but
1900 in some other context it creates unrecognizable RTL. */
1901 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1910 /* This rtx may not be shared. If it has already been seen,
1911 replace it with a copy of itself. */
1917 copy = rtx_alloc (code);
1919 (sizeof (*copy) - sizeof (copy->fld)
1920 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1926 /* Now scan the subexpressions recursively.
1927 We can store any replaced subexpressions directly into X
1928 since we know X is not shared! Any vectors in X
1929 must be copied if X was copied. */
1931 format_ptr = GET_RTX_FORMAT (code);
1933 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1935 switch (*format_ptr++)
1938 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1942 if (XVEC (x, i) != NULL)
1945 int len = XVECLEN (x, i);
1947 if (copied && len > 0)
1948 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1949 for (j = 0; j < len; j++)
1950 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1958 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1959 to look for shared sub-parts. */
1962 reset_used_flags (x)
1966 register enum rtx_code code;
1967 register const char *format_ptr;
1972 code = GET_CODE (x);
1974 /* These types may be freely shared so we needn't do any resetting
1995 /* The chain of insns is not being copied. */
2004 format_ptr = GET_RTX_FORMAT (code);
2005 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2007 switch (*format_ptr++)
2010 reset_used_flags (XEXP (x, i));
2014 for (j = 0; j < XVECLEN (x, i); j++)
2015 reset_used_flags (XVECEXP (x, i, j));
2021 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2022 Return X or the rtx for the pseudo reg the value of X was copied into.
2023 OTHER must be valid as a SET_DEST. */
2026 make_safe_from (x, other)
2030 switch (GET_CODE (other))
2033 other = SUBREG_REG (other);
2035 case STRICT_LOW_PART:
2038 other = XEXP (other, 0);
2044 if ((GET_CODE (other) == MEM
2046 && GET_CODE (x) != REG
2047 && GET_CODE (x) != SUBREG)
2048 || (GET_CODE (other) == REG
2049 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2050 || reg_mentioned_p (other, x))))
2052 rtx temp = gen_reg_rtx (GET_MODE (x));
2053 emit_move_insn (temp, x);
2059 /* Emission of insns (adding them to the doubly-linked list). */
2061 /* Return the first insn of the current sequence or current function. */
2069 /* Return the last insn emitted in current sequence or current function. */
2077 /* Specify a new insn as the last in the chain. */
2080 set_last_insn (insn)
2083 if (NEXT_INSN (insn) != 0)
2088 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2091 get_last_insn_anywhere ()
2093 struct sequence_stack *stack;
2096 for (stack = seq_stack; stack; stack = stack->next)
2097 if (stack->last != 0)
2102 /* Return a number larger than any instruction's uid in this function. */
2107 return cur_insn_uid;
2110 /* Renumber instructions so that no instruction UIDs are wasted. */
2113 renumber_insns (stream)
2118 /* If we're not supposed to renumber instructions, don't. */
2119 if (!flag_renumber_insns)
2122 /* If there aren't that many instructions, then it's not really
2123 worth renumbering them. */
2124 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2129 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2132 fprintf (stream, "Renumbering insn %d to %d\n",
2133 INSN_UID (insn), cur_insn_uid);
2134 INSN_UID (insn) = cur_insn_uid++;
2138 /* Return the next insn. If it is a SEQUENCE, return the first insn
2147 insn = NEXT_INSN (insn);
2148 if (insn && GET_CODE (insn) == INSN
2149 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2150 insn = XVECEXP (PATTERN (insn), 0, 0);
2156 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2160 previous_insn (insn)
2165 insn = PREV_INSN (insn);
2166 if (insn && GET_CODE (insn) == INSN
2167 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2168 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2174 /* Return the next insn after INSN that is not a NOTE. This routine does not
2175 look inside SEQUENCEs. */
2178 next_nonnote_insn (insn)
2183 insn = NEXT_INSN (insn);
2184 if (insn == 0 || GET_CODE (insn) != NOTE)
2191 /* Return the previous insn before INSN that is not a NOTE. This routine does
2192 not look inside SEQUENCEs. */
2195 prev_nonnote_insn (insn)
2200 insn = PREV_INSN (insn);
2201 if (insn == 0 || GET_CODE (insn) != NOTE)
2208 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2209 or 0, if there is none. This routine does not look inside
2213 next_real_insn (insn)
2218 insn = NEXT_INSN (insn);
2219 if (insn == 0 || GET_CODE (insn) == INSN
2220 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2227 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2228 or 0, if there is none. This routine does not look inside
2232 prev_real_insn (insn)
2237 insn = PREV_INSN (insn);
2238 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2239 || GET_CODE (insn) == JUMP_INSN)
2246 /* Find the next insn after INSN that really does something. This routine
2247 does not look inside SEQUENCEs. Until reload has completed, this is the
2248 same as next_real_insn. */
2251 active_insn_p (insn)
2254 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2255 || (GET_CODE (insn) == INSN
2256 && (! reload_completed
2257 || (GET_CODE (PATTERN (insn)) != USE
2258 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2262 next_active_insn (insn)
2267 insn = NEXT_INSN (insn);
2268 if (insn == 0 || active_insn_p (insn))
2275 /* Find the last insn before INSN that really does something. This routine
2276 does not look inside SEQUENCEs. Until reload has completed, this is the
2277 same as prev_real_insn. */
2280 prev_active_insn (insn)
2285 insn = PREV_INSN (insn);
2286 if (insn == 0 || active_insn_p (insn))
2293 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2301 insn = NEXT_INSN (insn);
2302 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2309 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2317 insn = PREV_INSN (insn);
2318 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2326 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2327 and REG_CC_USER notes so we can find it. */
2330 link_cc0_insns (insn)
2333 rtx user = next_nonnote_insn (insn);
2335 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2336 user = XVECEXP (PATTERN (user), 0, 0);
2338 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2340 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2343 /* Return the next insn that uses CC0 after INSN, which is assumed to
2344 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2345 applied to the result of this function should yield INSN).
2347 Normally, this is simply the next insn. However, if a REG_CC_USER note
2348 is present, it contains the insn that uses CC0.
2350 Return 0 if we can't find the insn. */
2353 next_cc0_user (insn)
2356 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2359 return XEXP (note, 0);
2361 insn = next_nonnote_insn (insn);
2362 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2363 insn = XVECEXP (PATTERN (insn), 0, 0);
2365 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2371 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2372 note, it is the previous insn. */
2375 prev_cc0_setter (insn)
2378 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2381 return XEXP (note, 0);
2383 insn = prev_nonnote_insn (insn);
2384 if (! sets_cc0_p (PATTERN (insn)))
2391 /* Try splitting insns that can be split for better scheduling.
2392 PAT is the pattern which might split.
2393 TRIAL is the insn providing PAT.
2394 LAST is non-zero if we should return the last insn of the sequence produced.
2396 If this routine succeeds in splitting, it returns the first or last
2397 replacement insn depending on the value of LAST. Otherwise, it
2398 returns TRIAL. If the insn to be returned can be split, it will be. */
2401 try_split (pat, trial, last)
2405 rtx before = PREV_INSN (trial);
2406 rtx after = NEXT_INSN (trial);
2407 rtx seq = split_insns (pat, trial);
2408 int has_barrier = 0;
2411 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2412 We may need to handle this specially. */
2413 if (after && GET_CODE (after) == BARRIER)
2416 after = NEXT_INSN (after);
2421 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2422 The latter case will normally arise only when being done so that
2423 it, in turn, will be split (SFmode on the 29k is an example). */
2424 if (GET_CODE (seq) == SEQUENCE)
2428 /* Avoid infinite loop if any insn of the result matches
2429 the original pattern. */
2430 for (i = 0; i < XVECLEN (seq, 0); i++)
2431 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2432 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2436 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2437 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2438 mark_jump_label (PATTERN (XVECEXP (seq, 0, i)),
2439 XVECEXP (seq, 0, i), 0, 0);
2441 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2442 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2443 if (GET_CODE (trial) == CALL_INSN)
2444 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2445 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2446 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2447 = CALL_INSN_FUNCTION_USAGE (trial);
2449 tem = emit_insn_after (seq, before);
2451 delete_insn (trial);
2453 emit_barrier_after (tem);
2455 /* Recursively call try_split for each new insn created; by the
2456 time control returns here that insn will be fully split, so
2457 set LAST and continue from the insn after the one returned.
2458 We can't use next_active_insn here since AFTER may be a note.
2459 Ignore deleted insns, which can be occur if not optimizing. */
2460 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2461 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2462 tem = try_split (PATTERN (tem), tem, 1);
2464 /* Avoid infinite loop if the result matches the original pattern. */
2465 else if (rtx_equal_p (seq, pat))
2469 PATTERN (trial) = seq;
2470 INSN_CODE (trial) = -1;
2471 try_split (seq, trial, last);
2474 /* Return either the first or the last insn, depending on which was
2477 ? (after ? prev_active_insn (after) : last_insn)
2478 : next_active_insn (before);
2484 /* Make and return an INSN rtx, initializing all its slots.
2485 Store PATTERN in the pattern slots. */
2488 make_insn_raw (pattern)
2493 insn = rtx_alloc (INSN);
2495 INSN_UID (insn) = cur_insn_uid++;
2496 PATTERN (insn) = pattern;
2497 INSN_CODE (insn) = -1;
2498 LOG_LINKS (insn) = NULL;
2499 REG_NOTES (insn) = NULL;
2501 #ifdef ENABLE_RTL_CHECKING
2504 && (returnjump_p (insn)
2505 || (GET_CODE (insn) == SET
2506 && SET_DEST (insn) == pc_rtx)))
2508 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2516 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2519 make_jump_insn_raw (pattern)
2524 insn = rtx_alloc (JUMP_INSN);
2525 INSN_UID (insn) = cur_insn_uid++;
2527 PATTERN (insn) = pattern;
2528 INSN_CODE (insn) = -1;
2529 LOG_LINKS (insn) = NULL;
2530 REG_NOTES (insn) = NULL;
2531 JUMP_LABEL (insn) = NULL;
2536 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2539 make_call_insn_raw (pattern)
2544 insn = rtx_alloc (CALL_INSN);
2545 INSN_UID (insn) = cur_insn_uid++;
2547 PATTERN (insn) = pattern;
2548 INSN_CODE (insn) = -1;
2549 LOG_LINKS (insn) = NULL;
2550 REG_NOTES (insn) = NULL;
2551 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2556 /* Add INSN to the end of the doubly-linked list.
2557 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2563 PREV_INSN (insn) = last_insn;
2564 NEXT_INSN (insn) = 0;
2566 if (NULL != last_insn)
2567 NEXT_INSN (last_insn) = insn;
2569 if (NULL == first_insn)
2575 /* Add INSN into the doubly-linked list after insn AFTER. This and
2576 the next should be the only functions called to insert an insn once
2577 delay slots have been filled since only they know how to update a
2581 add_insn_after (insn, after)
2584 rtx next = NEXT_INSN (after);
2586 if (optimize && INSN_DELETED_P (after))
2589 NEXT_INSN (insn) = next;
2590 PREV_INSN (insn) = after;
2594 PREV_INSN (next) = insn;
2595 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2596 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2598 else if (last_insn == after)
2602 struct sequence_stack *stack = seq_stack;
2603 /* Scan all pending sequences too. */
2604 for (; stack; stack = stack->next)
2605 if (after == stack->last)
2615 NEXT_INSN (after) = insn;
2616 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2618 rtx sequence = PATTERN (after);
2619 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2623 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2624 the previous should be the only functions called to insert an insn once
2625 delay slots have been filled since only they know how to update a
2629 add_insn_before (insn, before)
2632 rtx prev = PREV_INSN (before);
2634 if (optimize && INSN_DELETED_P (before))
2637 PREV_INSN (insn) = prev;
2638 NEXT_INSN (insn) = before;
2642 NEXT_INSN (prev) = insn;
2643 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2645 rtx sequence = PATTERN (prev);
2646 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2649 else if (first_insn == before)
2653 struct sequence_stack *stack = seq_stack;
2654 /* Scan all pending sequences too. */
2655 for (; stack; stack = stack->next)
2656 if (before == stack->first)
2658 stack->first = insn;
2666 PREV_INSN (before) = insn;
2667 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2668 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2671 /* Remove an insn from its doubly-linked list. This function knows how
2672 to handle sequences. */
2677 rtx next = NEXT_INSN (insn);
2678 rtx prev = PREV_INSN (insn);
2681 NEXT_INSN (prev) = next;
2682 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2684 rtx sequence = PATTERN (prev);
2685 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2688 else if (first_insn == insn)
2692 struct sequence_stack *stack = seq_stack;
2693 /* Scan all pending sequences too. */
2694 for (; stack; stack = stack->next)
2695 if (insn == stack->first)
2697 stack->first = next;
2707 PREV_INSN (next) = prev;
2708 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2709 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2711 else if (last_insn == insn)
2715 struct sequence_stack *stack = seq_stack;
2716 /* Scan all pending sequences too. */
2717 for (; stack; stack = stack->next)
2718 if (insn == stack->last)
2729 /* Delete all insns made since FROM.
2730 FROM becomes the new last instruction. */
2733 delete_insns_since (from)
2739 NEXT_INSN (from) = 0;
2743 /* This function is deprecated, please use sequences instead.
2745 Move a consecutive bunch of insns to a different place in the chain.
2746 The insns to be moved are those between FROM and TO.
2747 They are moved to a new position after the insn AFTER.
2748 AFTER must not be FROM or TO or any insn in between.
2750 This function does not know about SEQUENCEs and hence should not be
2751 called after delay-slot filling has been done. */
2754 reorder_insns (from, to, after)
2755 rtx from, to, after;
2757 /* Splice this bunch out of where it is now. */
2758 if (PREV_INSN (from))
2759 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2761 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2762 if (last_insn == to)
2763 last_insn = PREV_INSN (from);
2764 if (first_insn == from)
2765 first_insn = NEXT_INSN (to);
2767 /* Make the new neighbors point to it and it to them. */
2768 if (NEXT_INSN (after))
2769 PREV_INSN (NEXT_INSN (after)) = to;
2771 NEXT_INSN (to) = NEXT_INSN (after);
2772 PREV_INSN (from) = after;
2773 NEXT_INSN (after) = from;
2774 if (after == last_insn)
2778 /* Return the line note insn preceding INSN. */
2781 find_line_note (insn)
2784 if (no_line_numbers)
2787 for (; insn; insn = PREV_INSN (insn))
2788 if (GET_CODE (insn) == NOTE
2789 && NOTE_LINE_NUMBER (insn) >= 0)
2795 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2796 of the moved insns when debugging. This may insert a note between AFTER
2797 and FROM, and another one after TO. */
2800 reorder_insns_with_line_notes (from, to, after)
2801 rtx from, to, after;
2803 rtx from_line = find_line_note (from);
2804 rtx after_line = find_line_note (after);
2806 reorder_insns (from, to, after);
2808 if (from_line == after_line)
2812 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2813 NOTE_LINE_NUMBER (from_line),
2816 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2817 NOTE_LINE_NUMBER (after_line),
2821 /* Remove unnecessary notes from the instruction stream. */
2824 remove_unnecessary_notes ()
2829 /* We must not remove the first instruction in the function because
2830 the compiler depends on the first instruction being a note. */
2831 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2833 /* Remember what's next. */
2834 next = NEXT_INSN (insn);
2836 /* We're only interested in notes. */
2837 if (GET_CODE (insn) != NOTE)
2840 /* By now, all notes indicating lexical blocks should have
2841 NOTE_BLOCK filled in. */
2842 if ((NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2843 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2844 && NOTE_BLOCK (insn) == NULL_TREE)
2847 /* Remove NOTE_INSN_DELETED notes. */
2848 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2850 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2852 /* Scan back to see if there are any non-note instructions
2853 between INSN and the beginning of this block. If not,
2854 then there is no PC range in the generated code that will
2855 actually be in this block, so there's no point in
2856 remembering the existence of the block. */
2859 for (prev = PREV_INSN (insn); prev; prev = PREV_INSN (prev))
2861 /* This block contains a real instruction. Note that we
2862 don't include labels; if the only thing in the block
2863 is a label, then there are still no PC values that
2864 lie within the block. */
2868 /* We're only interested in NOTEs. */
2869 if (GET_CODE (prev) != NOTE)
2872 if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_BEG)
2874 /* If the BLOCKs referred to by these notes don't
2875 match, then something is wrong with our BLOCK
2876 nesting structure. */
2877 if (NOTE_BLOCK (prev) != NOTE_BLOCK (insn))
2880 if (debug_ignore_block (NOTE_BLOCK (insn)))
2887 else if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_END)
2888 /* There's a nested block. We need to leave the
2889 current block in place since otherwise the debugger
2890 wouldn't be able to show symbols from our block in
2891 the nested block. */
2899 /* Emit an insn of given code and pattern
2900 at a specified place within the doubly-linked list. */
2902 /* Make an instruction with body PATTERN
2903 and output it before the instruction BEFORE. */
2906 emit_insn_before (pattern, before)
2907 register rtx pattern, before;
2909 register rtx insn = before;
2911 if (GET_CODE (pattern) == SEQUENCE)
2915 for (i = 0; i < XVECLEN (pattern, 0); i++)
2917 insn = XVECEXP (pattern, 0, i);
2918 add_insn_before (insn, before);
2923 insn = make_insn_raw (pattern);
2924 add_insn_before (insn, before);
2930 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2933 emit_block_insn_before (pattern, before, block)
2934 rtx pattern, before;
2937 rtx prev = PREV_INSN (before);
2938 rtx r = emit_insn_before (pattern, before);
2939 if (block && block->head == before)
2940 block->head = NEXT_INSN (prev);
2944 /* Make an instruction with body PATTERN and code JUMP_INSN
2945 and output it before the instruction BEFORE. */
2948 emit_jump_insn_before (pattern, before)
2949 register rtx pattern, before;
2953 if (GET_CODE (pattern) == SEQUENCE)
2954 insn = emit_insn_before (pattern, before);
2957 insn = make_jump_insn_raw (pattern);
2958 add_insn_before (insn, before);
2964 /* Make an instruction with body PATTERN and code CALL_INSN
2965 and output it before the instruction BEFORE. */
2968 emit_call_insn_before (pattern, before)
2969 register rtx pattern, before;
2973 if (GET_CODE (pattern) == SEQUENCE)
2974 insn = emit_insn_before (pattern, before);
2977 insn = make_call_insn_raw (pattern);
2978 add_insn_before (insn, before);
2979 PUT_CODE (insn, CALL_INSN);
2985 /* Make an insn of code BARRIER
2986 and output it before the insn BEFORE. */
2989 emit_barrier_before (before)
2990 register rtx before;
2992 register rtx insn = rtx_alloc (BARRIER);
2994 INSN_UID (insn) = cur_insn_uid++;
2996 add_insn_before (insn, before);
3000 /* Emit the label LABEL before the insn BEFORE. */
3003 emit_label_before (label, before)
3006 /* This can be called twice for the same label as a result of the
3007 confusion that follows a syntax error! So make it harmless. */
3008 if (INSN_UID (label) == 0)
3010 INSN_UID (label) = cur_insn_uid++;
3011 add_insn_before (label, before);
3017 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3020 emit_note_before (subtype, before)
3024 register rtx note = rtx_alloc (NOTE);
3025 INSN_UID (note) = cur_insn_uid++;
3026 NOTE_SOURCE_FILE (note) = 0;
3027 NOTE_LINE_NUMBER (note) = subtype;
3029 add_insn_before (note, before);
3033 /* Make an insn of code INSN with body PATTERN
3034 and output it after the insn AFTER. */
3037 emit_insn_after (pattern, after)
3038 register rtx pattern, after;
3040 register rtx insn = after;
3042 if (GET_CODE (pattern) == SEQUENCE)
3046 for (i = 0; i < XVECLEN (pattern, 0); i++)
3048 insn = XVECEXP (pattern, 0, i);
3049 add_insn_after (insn, after);
3055 insn = make_insn_raw (pattern);
3056 add_insn_after (insn, after);
3062 /* Similar to emit_insn_after, except that line notes are to be inserted so
3063 as to act as if this insn were at FROM. */
3066 emit_insn_after_with_line_notes (pattern, after, from)
3067 rtx pattern, after, from;
3069 rtx from_line = find_line_note (from);
3070 rtx after_line = find_line_note (after);
3071 rtx insn = emit_insn_after (pattern, after);
3074 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3075 NOTE_LINE_NUMBER (from_line),
3079 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3080 NOTE_LINE_NUMBER (after_line),
3084 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3087 emit_block_insn_after (pattern, after, block)
3091 rtx r = emit_insn_after (pattern, after);
3092 if (block && block->end == after)
3097 /* Make an insn of code JUMP_INSN with body PATTERN
3098 and output it after the insn AFTER. */
3101 emit_jump_insn_after (pattern, after)
3102 register rtx pattern, after;
3106 if (GET_CODE (pattern) == SEQUENCE)
3107 insn = emit_insn_after (pattern, after);
3110 insn = make_jump_insn_raw (pattern);
3111 add_insn_after (insn, after);
3117 /* Make an insn of code BARRIER
3118 and output it after the insn AFTER. */
3121 emit_barrier_after (after)
3124 register rtx insn = rtx_alloc (BARRIER);
3126 INSN_UID (insn) = cur_insn_uid++;
3128 add_insn_after (insn, after);
3132 /* Emit the label LABEL after the insn AFTER. */
3135 emit_label_after (label, after)
3138 /* This can be called twice for the same label
3139 as a result of the confusion that follows a syntax error!
3140 So make it harmless. */
3141 if (INSN_UID (label) == 0)
3143 INSN_UID (label) = cur_insn_uid++;
3144 add_insn_after (label, after);
3150 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3153 emit_note_after (subtype, after)
3157 register rtx note = rtx_alloc (NOTE);
3158 INSN_UID (note) = cur_insn_uid++;
3159 NOTE_SOURCE_FILE (note) = 0;
3160 NOTE_LINE_NUMBER (note) = subtype;
3161 add_insn_after (note, after);
3165 /* Emit a line note for FILE and LINE after the insn AFTER. */
3168 emit_line_note_after (file, line, after)
3175 if (no_line_numbers && line > 0)
3181 note = rtx_alloc (NOTE);
3182 INSN_UID (note) = cur_insn_uid++;
3183 NOTE_SOURCE_FILE (note) = file;
3184 NOTE_LINE_NUMBER (note) = line;
3185 add_insn_after (note, after);
3189 /* Make an insn of code INSN with pattern PATTERN
3190 and add it to the end of the doubly-linked list.
3191 If PATTERN is a SEQUENCE, take the elements of it
3192 and emit an insn for each element.
3194 Returns the last insn emitted. */
3200 rtx insn = last_insn;
3202 if (GET_CODE (pattern) == SEQUENCE)
3206 for (i = 0; i < XVECLEN (pattern, 0); i++)
3208 insn = XVECEXP (pattern, 0, i);
3214 insn = make_insn_raw (pattern);
3221 /* Emit the insns in a chain starting with INSN.
3222 Return the last insn emitted. */
3232 rtx next = NEXT_INSN (insn);
3241 /* Emit the insns in a chain starting with INSN and place them in front of
3242 the insn BEFORE. Return the last insn emitted. */
3245 emit_insns_before (insn, before)
3253 rtx next = NEXT_INSN (insn);
3254 add_insn_before (insn, before);
3262 /* Emit the insns in a chain starting with FIRST and place them in back of
3263 the insn AFTER. Return the last insn emitted. */
3266 emit_insns_after (first, after)
3271 register rtx after_after;
3279 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3282 after_after = NEXT_INSN (after);
3284 NEXT_INSN (after) = first;
3285 PREV_INSN (first) = after;
3286 NEXT_INSN (last) = after_after;
3288 PREV_INSN (after_after) = last;
3290 if (after == last_insn)
3295 /* Make an insn of code JUMP_INSN with pattern PATTERN
3296 and add it to the end of the doubly-linked list. */
3299 emit_jump_insn (pattern)
3302 if (GET_CODE (pattern) == SEQUENCE)
3303 return emit_insn (pattern);
3306 register rtx insn = make_jump_insn_raw (pattern);
3312 /* Make an insn of code CALL_INSN with pattern PATTERN
3313 and add it to the end of the doubly-linked list. */
3316 emit_call_insn (pattern)
3319 if (GET_CODE (pattern) == SEQUENCE)
3320 return emit_insn (pattern);
3323 register rtx insn = make_call_insn_raw (pattern);
3325 PUT_CODE (insn, CALL_INSN);
3330 /* Add the label LABEL to the end of the doubly-linked list. */
3336 /* This can be called twice for the same label
3337 as a result of the confusion that follows a syntax error!
3338 So make it harmless. */
3339 if (INSN_UID (label) == 0)
3341 INSN_UID (label) = cur_insn_uid++;
3347 /* Make an insn of code BARRIER
3348 and add it to the end of the doubly-linked list. */
3353 register rtx barrier = rtx_alloc (BARRIER);
3354 INSN_UID (barrier) = cur_insn_uid++;
3359 /* Make an insn of code NOTE
3360 with data-fields specified by FILE and LINE
3361 and add it to the end of the doubly-linked list,
3362 but only if line-numbers are desired for debugging info. */
3365 emit_line_note (file, line)
3369 set_file_and_line_for_stmt (file, line);
3372 if (no_line_numbers)
3376 return emit_note (file, line);
3379 /* Make an insn of code NOTE
3380 with data-fields specified by FILE and LINE
3381 and add it to the end of the doubly-linked list.
3382 If it is a line-number NOTE, omit it if it matches the previous one. */
3385 emit_note (file, line)
3393 if (file && last_filename && !strcmp (file, last_filename)
3394 && line == last_linenum)
3396 last_filename = file;
3397 last_linenum = line;
3400 if (no_line_numbers && line > 0)
3406 note = rtx_alloc (NOTE);
3407 INSN_UID (note) = cur_insn_uid++;
3408 NOTE_SOURCE_FILE (note) = file;
3409 NOTE_LINE_NUMBER (note) = line;
3414 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3417 emit_line_note_force (file, line)
3422 return emit_line_note (file, line);
3425 /* Cause next statement to emit a line note even if the line number
3426 has not changed. This is used at the beginning of a function. */
3429 force_next_line_note ()
3434 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3435 note of this type already exists, remove it first. */
3438 set_unique_reg_note (insn, kind, datum)
3443 rtx note = find_reg_note (insn, kind, NULL_RTX);
3445 /* First remove the note if there already is one. */
3447 remove_note (insn, note);
3449 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3452 /* Return an indication of which type of insn should have X as a body.
3453 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3459 if (GET_CODE (x) == CODE_LABEL)
3461 if (GET_CODE (x) == CALL)
3463 if (GET_CODE (x) == RETURN)
3465 if (GET_CODE (x) == SET)
3467 if (SET_DEST (x) == pc_rtx)
3469 else if (GET_CODE (SET_SRC (x)) == CALL)
3474 if (GET_CODE (x) == PARALLEL)
3477 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3478 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3480 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3481 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3483 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3484 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3490 /* Emit the rtl pattern X as an appropriate kind of insn.
3491 If X is a label, it is simply added into the insn chain. */
3497 enum rtx_code code = classify_insn (x);
3499 if (code == CODE_LABEL)
3500 return emit_label (x);
3501 else if (code == INSN)
3502 return emit_insn (x);
3503 else if (code == JUMP_INSN)
3505 register rtx insn = emit_jump_insn (x);
3506 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3507 return emit_barrier ();
3510 else if (code == CALL_INSN)
3511 return emit_call_insn (x);
3516 /* Begin emitting insns to a sequence which can be packaged in an
3517 RTL_EXPR. If this sequence will contain something that might cause
3518 the compiler to pop arguments to function calls (because those
3519 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3520 details), use do_pending_stack_adjust before calling this function.
3521 That will ensure that the deferred pops are not accidentally
3522 emitted in the middle of this sequence. */
3527 struct sequence_stack *tem;
3529 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3531 tem->next = seq_stack;
3532 tem->first = first_insn;
3533 tem->last = last_insn;
3534 tem->sequence_rtl_expr = seq_rtl_expr;
3542 /* Similarly, but indicate that this sequence will be placed in T, an
3543 RTL_EXPR. See the documentation for start_sequence for more
3544 information about how to use this function. */
3547 start_sequence_for_rtl_expr (t)
3555 /* Set up the insn chain starting with FIRST as the current sequence,
3556 saving the previously current one. See the documentation for
3557 start_sequence for more information about how to use this function. */
3560 push_to_sequence (first)
3567 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3573 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3576 push_to_full_sequence (first, last)
3582 /* We really should have the end of the insn chain here. */
3583 if (last && NEXT_INSN (last))
3587 /* Set up the outer-level insn chain
3588 as the current sequence, saving the previously current one. */
3591 push_topmost_sequence ()
3593 struct sequence_stack *stack, *top = NULL;
3597 for (stack = seq_stack; stack; stack = stack->next)
3600 first_insn = top->first;
3601 last_insn = top->last;
3602 seq_rtl_expr = top->sequence_rtl_expr;
3605 /* After emitting to the outer-level insn chain, update the outer-level
3606 insn chain, and restore the previous saved state. */
3609 pop_topmost_sequence ()
3611 struct sequence_stack *stack, *top = NULL;
3613 for (stack = seq_stack; stack; stack = stack->next)
3616 top->first = first_insn;
3617 top->last = last_insn;
3618 /* ??? Why don't we save seq_rtl_expr here? */
3623 /* After emitting to a sequence, restore previous saved state.
3625 To get the contents of the sequence just made, you must call
3626 `gen_sequence' *before* calling here.
3628 If the compiler might have deferred popping arguments while
3629 generating this sequence, and this sequence will not be immediately
3630 inserted into the instruction stream, use do_pending_stack_adjust
3631 before calling gen_sequence. That will ensure that the deferred
3632 pops are inserted into this sequence, and not into some random
3633 location in the instruction stream. See INHIBIT_DEFER_POP for more
3634 information about deferred popping of arguments. */
3639 struct sequence_stack *tem = seq_stack;
3641 first_insn = tem->first;
3642 last_insn = tem->last;
3643 seq_rtl_expr = tem->sequence_rtl_expr;
3644 seq_stack = tem->next;
3649 /* This works like end_sequence, but records the old sequence in FIRST
3653 end_full_sequence (first, last)
3656 *first = first_insn;
3661 /* Return 1 if currently emitting into a sequence. */
3666 return seq_stack != 0;
3669 /* Generate a SEQUENCE rtx containing the insns already emitted
3670 to the current sequence.
3672 This is how the gen_... function from a DEFINE_EXPAND
3673 constructs the SEQUENCE that it returns. */
3683 /* Count the insns in the chain. */
3685 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3688 /* If only one insn, return it rather than a SEQUENCE.
3689 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3690 the case of an empty list.)
3691 We only return the pattern of an insn if its code is INSN and it
3692 has no notes. This ensures that no information gets lost. */
3694 && ! RTX_FRAME_RELATED_P (first_insn)
3695 && GET_CODE (first_insn) == INSN
3696 /* Don't throw away any reg notes. */
3697 && REG_NOTES (first_insn) == 0)
3698 return PATTERN (first_insn);
3700 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3702 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3703 XVECEXP (result, 0, i) = tem;
3708 /* Put the various virtual registers into REGNO_REG_RTX. */
3711 init_virtual_regs (es)
3712 struct emit_status *es;
3714 rtx *ptr = es->x_regno_reg_rtx;
3715 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3716 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3717 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3718 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3719 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3723 clear_emit_caches ()
3727 /* Clear the start_sequence/gen_sequence cache. */
3728 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3729 sequence_result[i] = 0;
3733 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3734 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3735 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3736 static int copy_insn_n_scratches;
3738 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3739 copied an ASM_OPERANDS.
3740 In that case, it is the original input-operand vector. */
3741 static rtvec orig_asm_operands_vector;
3743 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3744 copied an ASM_OPERANDS.
3745 In that case, it is the copied input-operand vector. */
3746 static rtvec copy_asm_operands_vector;
3748 /* Likewise for the constraints vector. */
3749 static rtvec orig_asm_constraints_vector;
3750 static rtvec copy_asm_constraints_vector;
3752 /* Recursively create a new copy of an rtx for copy_insn.
3753 This function differs from copy_rtx in that it handles SCRATCHes and
3754 ASM_OPERANDs properly.
3755 Normally, this function is not used directly; use copy_insn as front end.
3756 However, you could first copy an insn pattern with copy_insn and then use
3757 this function afterwards to properly copy any REG_NOTEs containing
3766 register RTX_CODE code;
3767 register const char *format_ptr;
3769 code = GET_CODE (orig);
3785 for (i = 0; i < copy_insn_n_scratches; i++)
3786 if (copy_insn_scratch_in[i] == orig)
3787 return copy_insn_scratch_out[i];
3791 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3792 a LABEL_REF, it isn't sharable. */
3793 if (GET_CODE (XEXP (orig, 0)) == PLUS
3794 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3795 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3799 /* A MEM with a constant address is not sharable. The problem is that
3800 the constant address may need to be reloaded. If the mem is shared,
3801 then reloading one copy of this mem will cause all copies to appear
3802 to have been reloaded. */
3808 copy = rtx_alloc (code);
3810 /* Copy the various flags, and other information. We assume that
3811 all fields need copying, and then clear the fields that should
3812 not be copied. That is the sensible default behavior, and forces
3813 us to explicitly document why we are *not* copying a flag. */
3814 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3816 /* We do not copy the USED flag, which is used as a mark bit during
3817 walks over the RTL. */
3820 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3821 if (GET_RTX_CLASS (code) == 'i')
3825 copy->frame_related = 0;
3828 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3830 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3832 copy->fld[i] = orig->fld[i];
3833 switch (*format_ptr++)
3836 if (XEXP (orig, i) != NULL)
3837 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3842 if (XVEC (orig, i) == orig_asm_constraints_vector)
3843 XVEC (copy, i) = copy_asm_constraints_vector;
3844 else if (XVEC (orig, i) == orig_asm_operands_vector)
3845 XVEC (copy, i) = copy_asm_operands_vector;
3846 else if (XVEC (orig, i) != NULL)
3848 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3849 for (j = 0; j < XVECLEN (copy, i); j++)
3850 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3861 /* These are left unchanged. */
3869 if (code == SCRATCH)
3871 i = copy_insn_n_scratches++;
3872 if (i >= MAX_RECOG_OPERANDS)
3874 copy_insn_scratch_in[i] = orig;
3875 copy_insn_scratch_out[i] = copy;
3877 else if (code == ASM_OPERANDS)
3879 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
3880 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
3881 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
3882 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
3888 /* Create a new copy of an rtx.
3889 This function differs from copy_rtx in that it handles SCRATCHes and
3890 ASM_OPERANDs properly.
3891 INSN doesn't really have to be a full INSN; it could be just the
3897 copy_insn_n_scratches = 0;
3898 orig_asm_operands_vector = 0;
3899 orig_asm_constraints_vector = 0;
3900 copy_asm_operands_vector = 0;
3901 copy_asm_constraints_vector = 0;
3902 return copy_insn_1 (insn);
3905 /* Initialize data structures and variables in this file
3906 before generating rtl for each function. */
3911 struct function *f = cfun;
3913 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3916 seq_rtl_expr = NULL;
3918 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3921 first_label_num = label_num;
3925 clear_emit_caches ();
3927 /* Init the tables that describe all the pseudo regs. */
3929 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
3931 f->emit->regno_pointer_align
3932 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
3933 sizeof (unsigned char));
3936 = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
3939 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3940 init_virtual_regs (f->emit);
3942 /* Indicate that the virtual registers and stack locations are
3944 REG_POINTER (stack_pointer_rtx) = 1;
3945 REG_POINTER (frame_pointer_rtx) = 1;
3946 REG_POINTER (hard_frame_pointer_rtx) = 1;
3947 REG_POINTER (arg_pointer_rtx) = 1;
3949 REG_POINTER (virtual_incoming_args_rtx) = 1;
3950 REG_POINTER (virtual_stack_vars_rtx) = 1;
3951 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
3952 REG_POINTER (virtual_outgoing_args_rtx) = 1;
3953 REG_POINTER (virtual_cfa_rtx) = 1;
3955 #ifdef STACK_BOUNDARY
3956 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3957 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3958 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3959 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
3961 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
3962 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
3963 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
3964 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
3965 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
3968 #ifdef INIT_EXPANDERS
3973 /* Mark SS for GC. */
3976 mark_sequence_stack (ss)
3977 struct sequence_stack *ss;
3981 ggc_mark_rtx (ss->first);
3982 ggc_mark_tree (ss->sequence_rtl_expr);
3987 /* Mark ES for GC. */
3990 mark_emit_status (es)
3991 struct emit_status *es;
3999 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
4003 mark_sequence_stack (es->sequence_stack);
4004 ggc_mark_tree (es->sequence_rtl_expr);
4005 ggc_mark_rtx (es->x_first_insn);
4008 /* Create some permanent unique rtl objects shared between all functions.
4009 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4012 init_emit_once (line_numbers)
4016 enum machine_mode mode;
4017 enum machine_mode double_mode;
4019 /* Initialize the CONST_INT hash table. */
4020 const_int_htab = htab_create (37, const_int_htab_hash,
4021 const_int_htab_eq, NULL);
4022 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4025 no_line_numbers = ! line_numbers;
4027 /* Compute the word and byte modes. */
4029 byte_mode = VOIDmode;
4030 word_mode = VOIDmode;
4031 double_mode = VOIDmode;
4033 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4034 mode = GET_MODE_WIDER_MODE (mode))
4036 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4037 && byte_mode == VOIDmode)
4040 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4041 && word_mode == VOIDmode)
4045 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4046 mode = GET_MODE_WIDER_MODE (mode))
4048 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4049 && double_mode == VOIDmode)
4053 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4055 /* Assign register numbers to the globally defined register rtx.
4056 This must be done at runtime because the register number field
4057 is in a union and some compilers can't initialize unions. */
4059 pc_rtx = gen_rtx (PC, VOIDmode);
4060 cc0_rtx = gen_rtx (CC0, VOIDmode);
4061 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4062 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4063 if (hard_frame_pointer_rtx == 0)
4064 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4065 HARD_FRAME_POINTER_REGNUM);
4066 if (arg_pointer_rtx == 0)
4067 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4068 virtual_incoming_args_rtx =
4069 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4070 virtual_stack_vars_rtx =
4071 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4072 virtual_stack_dynamic_rtx =
4073 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4074 virtual_outgoing_args_rtx =
4075 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4076 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4078 /* These rtx must be roots if GC is enabled. */
4079 ggc_add_rtx_root (global_rtl, GR_MAX);
4081 #ifdef INIT_EXPANDERS
4082 /* This is to initialize {init|mark|free}_machine_status before the first
4083 call to push_function_context_to. This is needed by the Chill front
4084 end which calls push_function_context_to before the first cal to
4085 init_function_start. */
4089 /* Create the unique rtx's for certain rtx codes and operand values. */
4091 /* Don't use gen_rtx here since gen_rtx in this case
4092 tries to use these variables. */
4093 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4094 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4095 gen_rtx_raw_CONST_INT (VOIDmode, i);
4096 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4098 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4099 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4100 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4102 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4104 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4105 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4106 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4107 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4109 for (i = 0; i <= 2; i++)
4111 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4112 mode = GET_MODE_WIDER_MODE (mode))
4114 rtx tem = rtx_alloc (CONST_DOUBLE);
4115 union real_extract u;
4117 memset ((char *) &u, 0, sizeof u); /* Zero any holes in a structure. */
4118 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4120 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4121 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4122 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4123 PUT_MODE (tem, mode);
4125 const_tiny_rtx[i][(int) mode] = tem;
4128 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4130 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4131 mode = GET_MODE_WIDER_MODE (mode))
4132 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4134 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4136 mode = GET_MODE_WIDER_MODE (mode))
4137 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4140 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
4141 if (GET_MODE_CLASS (mode) == MODE_CC)
4142 const_tiny_rtx[0][(int) mode] = const0_rtx;
4144 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4145 if (STORE_FLAG_VALUE == 1)
4146 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4148 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4149 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4150 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4151 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4152 ggc_add_rtx_root (&const_true_rtx, 1);
4154 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4155 return_address_pointer_rtx
4156 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4160 struct_value_rtx = STRUCT_VALUE;
4162 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4165 #ifdef STRUCT_VALUE_INCOMING
4166 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4168 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4169 struct_value_incoming_rtx
4170 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4172 struct_value_incoming_rtx = struct_value_rtx;
4176 #ifdef STATIC_CHAIN_REGNUM
4177 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4179 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4180 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4181 static_chain_incoming_rtx
4182 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4185 static_chain_incoming_rtx = static_chain_rtx;
4189 static_chain_rtx = STATIC_CHAIN;
4191 #ifdef STATIC_CHAIN_INCOMING
4192 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4194 static_chain_incoming_rtx = static_chain_rtx;
4198 #ifdef PIC_OFFSET_TABLE_REGNUM
4199 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4202 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4203 ggc_add_rtx_root (&struct_value_rtx, 1);
4204 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4205 ggc_add_rtx_root (&static_chain_rtx, 1);
4206 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4207 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4210 /* Query and clear/ restore no_line_numbers. This is used by the
4211 switch / case handling in stmt.c to give proper line numbers in
4212 warnings about unreachable code. */
4215 force_line_numbers ()
4217 int old = no_line_numbers;
4219 no_line_numbers = 0;
4221 force_next_line_note ();
4226 restore_line_number_status (old_value)
4229 no_line_numbers = old_value;