1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
51 #include "insn-config.h"
56 /* Commonly used modes. */
58 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
59 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
60 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
62 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
63 After rtl generation, it is 1 plus the largest register number used. */
65 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Lowest label number in current function. */
74 static int first_label_num;
76 /* Highest label number in current function.
77 Zero means use the value of label_num instead.
78 This is nonzero only when belatedly compiling an inline function. */
80 static int last_label_num;
82 /* Value label_num had when set_new_first_and_last_label_number was called.
83 If label_num has not changed since then, last_label_num is valid. */
85 static int base_label_num;
87 /* Nonzero means do not generate NOTEs for source line numbers. */
89 static int no_line_numbers;
91 /* Commonly used rtx's, so that we only need space for one copy.
92 These are initialized once for the entire compilation.
93 All of these except perhaps the floating-point CONST_DOUBLEs
94 are unique; no other rtx-object will be equal to any of these. */
96 struct _global_rtl global_rtl =
98 {PC, VOIDmode}, /* pc_rtx */
99 {CC0, VOIDmode}, /* cc0_rtx */
100 {REG}, /* stack_pointer_rtx */
101 {REG}, /* frame_pointer_rtx */
102 {REG}, /* hard_frame_pointer_rtx */
103 {REG}, /* arg_pointer_rtx */
104 {REG}, /* virtual_incoming_args_rtx */
105 {REG}, /* virtual_stack_vars_rtx */
106 {REG}, /* virtual_stack_dynamic_rtx */
107 {REG}, /* virtual_outgoing_args_rtx */
110 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
111 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
112 record a copy of const[012]_rtx. */
114 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
118 REAL_VALUE_TYPE dconst0;
119 REAL_VALUE_TYPE dconst1;
120 REAL_VALUE_TYPE dconst2;
121 REAL_VALUE_TYPE dconstm1;
123 /* All references to the following fixed hard registers go through
124 these unique rtl objects. On machines where the frame-pointer and
125 arg-pointer are the same register, they use the same unique object.
127 After register allocation, other rtl objects which used to be pseudo-regs
128 may be clobbered to refer to the frame-pointer register.
129 But references that were originally to the frame-pointer can be
130 distinguished from the others because they contain frame_pointer_rtx.
132 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
133 tricky: until register elimination has taken place hard_frame_pointer_rtx
134 should be used if it is being set, and frame_pointer_rtx otherwise. After
135 register elimination hard_frame_pointer_rtx should always be used.
136 On machines where the two registers are same (most) then these are the
139 In an inline procedure, the stack and frame pointer rtxs may not be
140 used for anything else. */
141 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
142 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
143 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
144 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
145 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
147 /* This is used to implement __builtin_return_address for some machines.
148 See for instance the MIPS port. */
149 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
151 /* We make one copy of (const_int C) where C is in
152 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
153 to save space during the compilation and simplify comparisons of
156 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
158 /* The ends of the doubly-linked chain of rtl for the current function.
159 Both are reset to null at the start of rtl generation for the function.
161 start_sequence saves both of these on `sequence_stack' along with
162 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
164 static rtx first_insn = NULL;
165 static rtx last_insn = NULL;
167 /* RTL_EXPR within which the current sequence will be placed. Use to
168 prevent reuse of any temporaries within the sequence until after the
169 RTL_EXPR is emitted. */
171 tree sequence_rtl_expr = NULL;
173 /* INSN_UID for next insn emitted.
174 Reset to 1 for each function compiled. */
176 static int cur_insn_uid = 1;
178 /* Line number and source file of the last line-number NOTE emitted.
179 This is used to avoid generating duplicates. */
181 static int last_linenum = 0;
182 static char *last_filename = 0;
184 /* A vector indexed by pseudo reg number. The allocated length
185 of this vector is regno_pointer_flag_length. Since this
186 vector is needed during the expansion phase when the total
187 number of registers in the function is not yet known,
188 it is copied and made bigger when necessary. */
190 char *regno_pointer_flag;
191 int regno_pointer_flag_length;
193 /* Indexed by pseudo register number, if nonzero gives the known alignment
194 for that pseudo (if regno_pointer_flag is set).
195 Allocated in parallel with regno_pointer_flag. */
196 char *regno_pointer_align;
198 /* Indexed by pseudo register number, gives the rtx for that pseudo.
199 Allocated in parallel with regno_pointer_flag. */
203 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
204 Each element describes one pending sequence.
205 The main insn-chain is saved in the last element of the chain,
206 unless the chain is empty. */
208 struct sequence_stack *sequence_stack;
210 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
211 shortly thrown away. We use two mechanisms to prevent this waste:
213 First, we keep a list of the expressions used to represent the sequence
214 stack in sequence_element_free_list.
216 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
217 rtvec for use by gen_sequence. One entry for each size is sufficient
218 because most cases are calls to gen_sequence followed by immediately
219 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
220 destructive on the insn in it anyway and hence can't be redone.
222 We do not bother to save this cached data over nested function calls.
223 Instead, we just reinitialize them. */
225 #define SEQUENCE_RESULT_SIZE 5
227 static struct sequence_stack *sequence_element_free_list;
228 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
230 /* During RTL generation, we also keep a list of free INSN rtl codes. */
231 static rtx free_insn;
233 extern int rtx_equal_function_value_matters;
235 /* Filename and line number of last line-number note,
236 whether we actually emitted it or not. */
237 extern char *emit_filename;
238 extern int emit_lineno;
240 static rtx make_jump_insn_raw PROTO((rtx));
241 static rtx make_call_insn_raw PROTO((rtx));
242 static rtx find_line_note PROTO((rtx));
245 gen_rtx_CONST_INT (mode, arg)
246 enum machine_mode mode;
249 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
250 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
252 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
253 if (const_true_rtx && arg == STORE_FLAG_VALUE)
254 return const_true_rtx;
257 return gen_rtx_raw_CONST_INT (mode, arg);
261 gen_rtx_REG (mode, regno)
262 enum machine_mode mode;
265 /* In case the MD file explicitly references the frame pointer, have
266 all such references point to the same frame pointer. This is
267 used during frame pointer elimination to distinguish the explicit
268 references to these registers from pseudos that happened to be
271 If we have eliminated the frame pointer or arg pointer, we will
272 be using it as a normal register, for example as a spill
273 register. In such cases, we might be accessing it in a mode that
274 is not Pmode and therefore cannot use the pre-allocated rtx.
276 Also don't do this when we are making new REGs in reload, since
277 we don't want to get confused with the real pointers. */
279 if (mode == Pmode && !reload_in_progress)
281 if (regno == FRAME_POINTER_REGNUM)
282 return frame_pointer_rtx;
283 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
284 if (regno == HARD_FRAME_POINTER_REGNUM)
285 return hard_frame_pointer_rtx;
287 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
288 if (regno == ARG_POINTER_REGNUM)
289 return arg_pointer_rtx;
291 #ifdef RETURN_ADDRESS_POINTER_REGNUM
292 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
293 return return_address_pointer_rtx;
295 if (regno == STACK_POINTER_REGNUM)
296 return stack_pointer_rtx;
299 return gen_rtx_raw_REG (mode, regno);
302 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
304 ** This routine generates an RTX of the size specified by
305 ** <code>, which is an RTX code. The RTX structure is initialized
306 ** from the arguments <element1> through <elementn>, which are
307 ** interpreted according to the specific RTX type's format. The
308 ** special machine mode associated with the rtx (if any) is specified
311 ** gen_rtx can be invoked in a way which resembles the lisp-like
312 ** rtx it will generate. For example, the following rtx structure:
314 ** (plus:QI (mem:QI (reg:SI 1))
315 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
317 ** ...would be generated by the following C code:
319 ** gen_rtx (PLUS, QImode,
320 ** gen_rtx (MEM, QImode,
321 ** gen_rtx (REG, SImode, 1)),
322 ** gen_rtx (MEM, QImode,
323 ** gen_rtx (PLUS, SImode,
324 ** gen_rtx (REG, SImode, 2),
325 ** gen_rtx (REG, SImode, 3)))),
330 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
334 enum machine_mode mode;
337 register int i; /* Array indices... */
338 register char *fmt; /* Current rtx's format... */
339 register rtx rt_val; /* RTX to return to caller... */
344 code = va_arg (p, enum rtx_code);
345 mode = va_arg (p, enum machine_mode);
348 if (code == CONST_INT)
349 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
350 else if (code == REG)
351 rt_val = gen_rtx_REG (mode, va_arg (p, int));
354 rt_val = rtx_alloc (code); /* Allocate the storage space. */
355 rt_val->mode = mode; /* Store the machine mode... */
357 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
358 for (i = 0; i < GET_RTX_LENGTH (code); i++)
362 case '0': /* Unused field. */
365 case 'i': /* An integer? */
366 XINT (rt_val, i) = va_arg (p, int);
369 case 'w': /* A wide integer? */
370 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
373 case 's': /* A string? */
374 XSTR (rt_val, i) = va_arg (p, char *);
377 case 'e': /* An expression? */
378 case 'u': /* An insn? Same except when printing. */
379 XEXP (rt_val, i) = va_arg (p, rtx);
382 case 'E': /* An RTX vector? */
383 XVEC (rt_val, i) = va_arg (p, rtvec);
392 return rt_val; /* Return the new RTX... */
395 /* gen_rtvec (n, [rt1, ..., rtn])
397 ** This routine creates an rtvec and stores within it the
398 ** pointers to rtx's which are its arguments.
403 gen_rtvec VPROTO((int n, ...))
419 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
421 vector = (rtx *) alloca (n * sizeof (rtx));
423 for (i = 0; i < n; i++)
424 vector[i] = va_arg (p, rtx);
427 return gen_rtvec_v (n, vector);
431 gen_rtvec_v (n, argp)
436 register rtvec rt_val;
439 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
441 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
443 for (i = 0; i < n; i++)
444 rt_val->elem[i].rtx = *argp++;
450 gen_rtvec_vv (n, argp)
455 register rtvec rt_val;
458 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
460 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
462 for (i = 0; i < n; i++)
463 rt_val->elem[i].rtx = (argp++)->rtx;
468 /* Generate a REG rtx for a new pseudo register of mode MODE.
469 This pseudo is assigned the next sequential register number. */
473 enum machine_mode mode;
477 /* Don't let anything called by or after reload create new registers
478 (actually, registers can't be created after flow, but this is a good
481 if (reload_in_progress || reload_completed)
484 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
485 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
487 /* For complex modes, don't make a single pseudo.
488 Instead, make a CONCAT of two pseudos.
489 This allows noncontiguous allocation of the real and imaginary parts,
490 which makes much better code. Besides, allocating DCmode
491 pseudos overstrains reload on some machines like the 386. */
492 rtx realpart, imagpart;
493 int size = GET_MODE_UNIT_SIZE (mode);
494 enum machine_mode partmode
495 = mode_for_size (size * BITS_PER_UNIT,
496 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
497 ? MODE_FLOAT : MODE_INT),
500 realpart = gen_reg_rtx (partmode);
501 imagpart = gen_reg_rtx (partmode);
502 return gen_rtx_CONCAT (mode, realpart, imagpart);
505 /* Make sure regno_pointer_flag and regno_reg_rtx are large
506 enough to have an element for this pseudo reg number. */
508 if (reg_rtx_no == regno_pointer_flag_length)
512 (char *) savealloc (regno_pointer_flag_length * 2);
513 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
514 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
515 regno_pointer_flag = new;
517 new = (char *) savealloc (regno_pointer_flag_length * 2);
518 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
519 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
520 regno_pointer_align = new;
522 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
523 bcopy ((char *) regno_reg_rtx, (char *) new1,
524 regno_pointer_flag_length * sizeof (rtx));
525 bzero ((char *) &new1[regno_pointer_flag_length],
526 regno_pointer_flag_length * sizeof (rtx));
527 regno_reg_rtx = new1;
529 regno_pointer_flag_length *= 2;
532 val = gen_rtx_raw_REG (mode, reg_rtx_no);
533 regno_reg_rtx[reg_rtx_no++] = val;
537 /* Identify REG (which may be a CONCAT) as a user register. */
543 if (GET_CODE (reg) == CONCAT)
545 REG_USERVAR_P (XEXP (reg, 0)) = 1;
546 REG_USERVAR_P (XEXP (reg, 1)) = 1;
548 else if (GET_CODE (reg) == REG)
549 REG_USERVAR_P (reg) = 1;
554 /* Identify REG as a probable pointer register and show its alignment
555 as ALIGN, if nonzero. */
558 mark_reg_pointer (reg, align)
562 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
565 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
568 /* Return 1 plus largest pseudo reg number used in the current function. */
576 /* Return 1 + the largest label number used so far in the current function. */
581 if (last_label_num && label_num == base_label_num)
582 return last_label_num;
586 /* Return first label number used in this function (if any were used). */
589 get_first_label_num ()
591 return first_label_num;
594 /* Return a value representing some low-order bits of X, where the number
595 of low-order bits is given by MODE. Note that no conversion is done
596 between floating-point and fixed-point values, rather, the bit
597 representation is returned.
599 This function handles the cases in common between gen_lowpart, below,
600 and two variants in cse.c and combine.c. These are the cases that can
601 be safely handled at all points in the compilation.
603 If this is not a case we can handle, return 0. */
606 gen_lowpart_common (mode, x)
607 enum machine_mode mode;
612 if (GET_MODE (x) == mode)
615 /* MODE must occupy no more words than the mode of X. */
616 if (GET_MODE (x) != VOIDmode
617 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
618 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
622 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
623 word = ((GET_MODE_SIZE (GET_MODE (x))
624 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
627 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
628 && (GET_MODE_CLASS (mode) == MODE_INT
629 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
631 /* If we are getting the low-order part of something that has been
632 sign- or zero-extended, we can either just use the object being
633 extended or make a narrower extension. If we want an even smaller
634 piece than the size of the object being extended, call ourselves
637 This case is used mostly by combine and cse. */
639 if (GET_MODE (XEXP (x, 0)) == mode)
641 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
642 return gen_lowpart_common (mode, XEXP (x, 0));
643 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
644 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
646 else if (GET_CODE (x) == SUBREG
647 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
648 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
649 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
651 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
652 else if (GET_CODE (x) == REG)
654 /* If the register is not valid for MODE, return 0. If we don't
655 do this, there is no way to fix up the resulting REG later.
656 But we do do this if the current REG is not valid for its
657 mode. This latter is a kludge, but is required due to the
658 way that parameters are passed on some machines, most
660 if (REGNO (x) < FIRST_PSEUDO_REGISTER
661 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
662 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
664 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
665 /* integrate.c can't handle parts of a return value register. */
666 && (! REG_FUNCTION_VALUE_P (x)
667 || ! rtx_equal_function_value_matters)
668 /* We want to keep the stack, frame, and arg pointers
670 && x != frame_pointer_rtx
671 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
672 && x != arg_pointer_rtx
674 && x != stack_pointer_rtx)
675 return gen_rtx_REG (mode, REGNO (x) + word);
677 return gen_rtx_SUBREG (mode, x, word);
679 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
680 from the low-order part of the constant. */
681 else if ((GET_MODE_CLASS (mode) == MODE_INT
682 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
683 && GET_MODE (x) == VOIDmode
684 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
686 /* If MODE is twice the host word size, X is already the desired
687 representation. Otherwise, if MODE is wider than a word, we can't
688 do this. If MODE is exactly a word, return just one CONST_INT.
689 If MODE is smaller than a word, clear the bits that don't belong
690 in our mode, unless they and our sign bit are all one. So we get
691 either a reasonable negative value or a reasonable unsigned value
694 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
696 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
698 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
699 return (GET_CODE (x) == CONST_INT ? x
700 : GEN_INT (CONST_DOUBLE_LOW (x)));
703 /* MODE must be narrower than HOST_BITS_PER_INT. */
704 int width = GET_MODE_BITSIZE (mode);
705 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
706 : CONST_DOUBLE_LOW (x));
708 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
709 != ((HOST_WIDE_INT) (-1) << (width - 1))))
710 val &= ((HOST_WIDE_INT) 1 << width) - 1;
712 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
717 /* If X is an integral constant but we want it in floating-point, it
718 must be the case that we have a union of an integer and a floating-point
719 value. If the machine-parameters allow it, simulate that union here
720 and return the result. The two-word and single-word cases are
723 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
724 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
725 || flag_pretend_float)
726 && GET_MODE_CLASS (mode) == MODE_FLOAT
727 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
728 && GET_CODE (x) == CONST_INT
729 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
730 #ifdef REAL_ARITHMETIC
736 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
737 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
741 union {HOST_WIDE_INT i; float d; } u;
744 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
747 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
748 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
749 || flag_pretend_float)
750 && GET_MODE_CLASS (mode) == MODE_FLOAT
751 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
752 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
753 && GET_MODE (x) == VOIDmode
754 && (sizeof (double) * HOST_BITS_PER_CHAR
755 == 2 * HOST_BITS_PER_WIDE_INT))
756 #ifdef REAL_ARITHMETIC
760 HOST_WIDE_INT low, high;
762 if (GET_CODE (x) == CONST_INT)
763 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
765 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
767 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
769 if (WORDS_BIG_ENDIAN)
770 i[0] = high, i[1] = low;
772 i[0] = low, i[1] = high;
774 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
775 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
779 union {HOST_WIDE_INT i[2]; double d; } u;
780 HOST_WIDE_INT low, high;
782 if (GET_CODE (x) == CONST_INT)
783 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
785 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
787 #ifdef HOST_WORDS_BIG_ENDIAN
788 u.i[0] = high, u.i[1] = low;
790 u.i[0] = low, u.i[1] = high;
793 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
797 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
798 same as sizeof (double) or when sizeof (float) is larger than the
799 size of a word on the target machine. */
800 #ifdef REAL_ARITHMETIC
801 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
807 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
808 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
812 /* Similarly, if this is converting a floating-point value into a
813 single-word integer. Only do this is the host and target parameters are
816 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
817 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
818 || flag_pretend_float)
819 && (GET_MODE_CLASS (mode) == MODE_INT
820 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
821 && GET_CODE (x) == CONST_DOUBLE
822 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
823 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
824 return operand_subword (x, word, 0, GET_MODE (x));
826 /* Similarly, if this is converting a floating-point value into a
827 two-word integer, we can do this one word at a time and make an
828 integer. Only do this is the host and target parameters are
831 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
832 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
833 || flag_pretend_float)
834 && (GET_MODE_CLASS (mode) == MODE_INT
835 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
836 && GET_CODE (x) == CONST_DOUBLE
837 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
838 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
841 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
843 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
845 if (lowpart && GET_CODE (lowpart) == CONST_INT
846 && highpart && GET_CODE (highpart) == CONST_INT)
847 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
850 /* Otherwise, we can't do this. */
854 /* Return the real part (which has mode MODE) of a complex value X.
855 This always comes at the low address in memory. */
858 gen_realpart (mode, x)
859 enum machine_mode mode;
862 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
864 else if (WORDS_BIG_ENDIAN)
865 return gen_highpart (mode, x);
867 return gen_lowpart (mode, x);
870 /* Return the imaginary part (which has mode MODE) of a complex value X.
871 This always comes at the high address in memory. */
874 gen_imagpart (mode, x)
875 enum machine_mode mode;
878 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
880 else if (WORDS_BIG_ENDIAN)
881 return gen_lowpart (mode, x);
883 return gen_highpart (mode, x);
886 /* Return 1 iff X, assumed to be a SUBREG,
887 refers to the real part of the complex value in its containing reg.
888 Complex values are always stored with the real part in the first word,
889 regardless of WORDS_BIG_ENDIAN. */
892 subreg_realpart_p (x)
895 if (GET_CODE (x) != SUBREG)
898 return SUBREG_WORD (x) == 0;
901 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
902 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
903 least-significant part of X.
904 MODE specifies how big a part of X to return;
905 it usually should not be larger than a word.
906 If X is a MEM whose address is a QUEUED, the value may be so also. */
909 gen_lowpart (mode, x)
910 enum machine_mode mode;
913 rtx result = gen_lowpart_common (mode, x);
917 else if (GET_CODE (x) == REG)
919 /* Must be a hard reg that's not valid in MODE. */
920 result = gen_lowpart_common (mode, copy_to_reg (x));
925 else if (GET_CODE (x) == MEM)
927 /* The only additional case we can do is MEM. */
928 register int offset = 0;
929 if (WORDS_BIG_ENDIAN)
930 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
931 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
933 if (BYTES_BIG_ENDIAN)
934 /* Adjust the address so that the address-after-the-data
936 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
937 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
939 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
941 else if (GET_CODE (x) == ADDRESSOF)
942 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
947 /* Like `gen_lowpart', but refer to the most significant part.
948 This is used to access the imaginary part of a complex number. */
951 gen_highpart (mode, x)
952 enum machine_mode mode;
955 /* This case loses if X is a subreg. To catch bugs early,
956 complain if an invalid MODE is used even in other cases. */
957 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
958 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
960 if (GET_CODE (x) == CONST_DOUBLE
961 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
962 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
965 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
966 else if (GET_CODE (x) == CONST_INT)
968 else if (GET_CODE (x) == MEM)
970 register int offset = 0;
971 if (! WORDS_BIG_ENDIAN)
972 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
973 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
975 if (! BYTES_BIG_ENDIAN
976 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
977 offset -= (GET_MODE_SIZE (mode)
978 - MIN (UNITS_PER_WORD,
979 GET_MODE_SIZE (GET_MODE (x))));
981 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
983 else if (GET_CODE (x) == SUBREG)
985 /* The only time this should occur is when we are looking at a
986 multi-word item with a SUBREG whose mode is the same as that of the
987 item. It isn't clear what we would do if it wasn't. */
988 if (SUBREG_WORD (x) != 0)
990 return gen_highpart (mode, SUBREG_REG (x));
992 else if (GET_CODE (x) == REG)
996 if (! WORDS_BIG_ENDIAN
997 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
998 word = ((GET_MODE_SIZE (GET_MODE (x))
999 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1003 * ??? This fails miserably for complex values being passed in registers
1004 * where the sizeof the real and imaginary part are not equal to the
1005 * sizeof SImode. FIXME
1008 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1009 /* integrate.c can't handle parts of a return value register. */
1010 && (! REG_FUNCTION_VALUE_P (x)
1011 || ! rtx_equal_function_value_matters)
1012 /* We want to keep the stack, frame, and arg pointers special. */
1013 && x != frame_pointer_rtx
1014 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1015 && x != arg_pointer_rtx
1017 && x != stack_pointer_rtx)
1018 return gen_rtx_REG (mode, REGNO (x) + word);
1020 return gen_rtx_SUBREG (mode, x, word);
1026 /* Return 1 iff X, assumed to be a SUBREG,
1027 refers to the least significant part of its containing reg.
1028 If X is not a SUBREG, always return 1 (it is its own low part!). */
1031 subreg_lowpart_p (x)
1034 if (GET_CODE (x) != SUBREG)
1036 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1039 if (WORDS_BIG_ENDIAN
1040 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1041 return (SUBREG_WORD (x)
1042 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1043 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1046 return SUBREG_WORD (x) == 0;
1049 /* Return subword I of operand OP.
1050 The word number, I, is interpreted as the word number starting at the
1051 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1052 otherwise it is the high-order word.
1054 If we cannot extract the required word, we return zero. Otherwise, an
1055 rtx corresponding to the requested word will be returned.
1057 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1058 reload has completed, a valid address will always be returned. After
1059 reload, if a valid address cannot be returned, we return zero.
1061 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1062 it is the responsibility of the caller.
1064 MODE is the mode of OP in case it is a CONST_INT. */
1067 operand_subword (op, i, validate_address, mode)
1070 int validate_address;
1071 enum machine_mode mode;
1074 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1076 if (mode == VOIDmode)
1077 mode = GET_MODE (op);
1079 if (mode == VOIDmode)
1082 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1084 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1085 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1088 /* If OP is already an integer word, return it. */
1089 if (GET_MODE_CLASS (mode) == MODE_INT
1090 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1093 /* If OP is a REG or SUBREG, we can handle it very simply. */
1094 if (GET_CODE (op) == REG)
1096 /* If the register is not valid for MODE, return 0. If we don't
1097 do this, there is no way to fix up the resulting REG later. */
1098 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1099 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1101 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1102 || (REG_FUNCTION_VALUE_P (op)
1103 && rtx_equal_function_value_matters)
1104 /* We want to keep the stack, frame, and arg pointers
1106 || op == frame_pointer_rtx
1107 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1108 || op == arg_pointer_rtx
1110 || op == stack_pointer_rtx)
1111 return gen_rtx_SUBREG (word_mode, op, i);
1113 return gen_rtx_REG (word_mode, REGNO (op) + i);
1115 else if (GET_CODE (op) == SUBREG)
1116 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1117 else if (GET_CODE (op) == CONCAT)
1119 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1121 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1122 return operand_subword (XEXP (op, 1), i - partwords,
1123 validate_address, mode);
1126 /* Form a new MEM at the requested address. */
1127 if (GET_CODE (op) == MEM)
1129 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1132 if (validate_address)
1134 if (reload_completed)
1136 if (! strict_memory_address_p (word_mode, addr))
1140 addr = memory_address (word_mode, addr);
1143 new = gen_rtx_MEM (word_mode, addr);
1145 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1146 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1147 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1152 /* The only remaining cases are when OP is a constant. If the host and
1153 target floating formats are the same, handling two-word floating
1154 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1155 are defined as returning one or two 32 bit values, respectively,
1156 and not values of BITS_PER_WORD bits. */
1157 #ifdef REAL_ARITHMETIC
1158 /* The output is some bits, the width of the target machine's word.
1159 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1161 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1162 && GET_MODE_CLASS (mode) == MODE_FLOAT
1163 && GET_MODE_BITSIZE (mode) == 64
1164 && GET_CODE (op) == CONST_DOUBLE)
1169 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1170 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1172 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1173 which the words are written depends on the word endianness.
1175 ??? This is a potential portability problem and should
1176 be fixed at some point. */
1177 if (BITS_PER_WORD == 32)
1178 return GEN_INT ((HOST_WIDE_INT) k[i]);
1179 #if HOST_BITS_PER_WIDE_INT > 32
1180 else if (BITS_PER_WORD >= 64 && i == 0)
1181 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1182 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1184 else if (BITS_PER_WORD == 16)
1188 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1191 return GEN_INT ((HOST_WIDE_INT) value);
1196 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1197 && GET_MODE_CLASS (mode) == MODE_FLOAT
1198 && GET_MODE_BITSIZE (mode) > 64
1199 && GET_CODE (op) == CONST_DOUBLE)
1204 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1205 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1207 if (BITS_PER_WORD == 32)
1208 return GEN_INT ((HOST_WIDE_INT) k[i]);
1210 #else /* no REAL_ARITHMETIC */
1211 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1212 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1213 || flag_pretend_float)
1214 && GET_MODE_CLASS (mode) == MODE_FLOAT
1215 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1216 && GET_CODE (op) == CONST_DOUBLE)
1218 /* The constant is stored in the host's word-ordering,
1219 but we want to access it in the target's word-ordering. Some
1220 compilers don't like a conditional inside macro args, so we have two
1221 copies of the return. */
1222 #ifdef HOST_WORDS_BIG_ENDIAN
1223 return GEN_INT (i == WORDS_BIG_ENDIAN
1224 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1226 return GEN_INT (i != WORDS_BIG_ENDIAN
1227 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1230 #endif /* no REAL_ARITHMETIC */
1232 /* Single word float is a little harder, since single- and double-word
1233 values often do not have the same high-order bits. We have already
1234 verified that we want the only defined word of the single-word value. */
1235 #ifdef REAL_ARITHMETIC
1236 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1237 && GET_MODE_BITSIZE (mode) == 32
1238 && GET_CODE (op) == CONST_DOUBLE)
1243 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1244 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1246 if (BITS_PER_WORD == 16)
1248 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1252 return GEN_INT ((HOST_WIDE_INT) l);
1255 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1256 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1257 || flag_pretend_float)
1258 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1259 && GET_MODE_CLASS (mode) == MODE_FLOAT
1260 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1261 && GET_CODE (op) == CONST_DOUBLE)
1264 union {float f; HOST_WIDE_INT i; } u;
1266 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1269 return GEN_INT (u.i);
1271 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1272 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1273 || flag_pretend_float)
1274 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1275 && GET_MODE_CLASS (mode) == MODE_FLOAT
1276 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1277 && GET_CODE (op) == CONST_DOUBLE)
1280 union {double d; HOST_WIDE_INT i; } u;
1282 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1285 return GEN_INT (u.i);
1287 #endif /* no REAL_ARITHMETIC */
1289 /* The only remaining cases that we can handle are integers.
1290 Convert to proper endianness now since these cases need it.
1291 At this point, i == 0 means the low-order word.
1293 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1294 in general. However, if OP is (const_int 0), we can just return
1297 if (op == const0_rtx)
1300 if (GET_MODE_CLASS (mode) != MODE_INT
1301 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1302 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1305 if (WORDS_BIG_ENDIAN)
1306 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1308 /* Find out which word on the host machine this value is in and get
1309 it from the constant. */
1310 val = (i / size_ratio == 0
1311 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1312 : (GET_CODE (op) == CONST_INT
1313 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1315 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1316 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1317 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
1318 & (((HOST_WIDE_INT) 1
1319 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
1321 return GEN_INT (val);
1324 /* Similar to `operand_subword', but never return 0. If we can't extract
1325 the required subword, put OP into a register and try again. If that fails,
1326 abort. We always validate the address in this case. It is not valid
1327 to call this function after reload; it is mostly meant for RTL
1330 MODE is the mode of OP, in case it is CONST_INT. */
1333 operand_subword_force (op, i, mode)
1336 enum machine_mode mode;
1338 rtx result = operand_subword (op, i, 1, mode);
1343 if (mode != BLKmode && mode != VOIDmode)
1344 op = force_reg (mode, op);
1346 result = operand_subword (op, i, 1, mode);
1353 /* Given a compare instruction, swap the operands.
1354 A test instruction is changed into a compare of 0 against the operand. */
1357 reverse_comparison (insn)
1360 rtx body = PATTERN (insn);
1363 if (GET_CODE (body) == SET)
1364 comp = SET_SRC (body);
1366 comp = SET_SRC (XVECEXP (body, 0, 0));
1368 if (GET_CODE (comp) == COMPARE)
1370 rtx op0 = XEXP (comp, 0);
1371 rtx op1 = XEXP (comp, 1);
1372 XEXP (comp, 0) = op1;
1373 XEXP (comp, 1) = op0;
1377 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1378 if (GET_CODE (body) == SET)
1379 SET_SRC (body) = new;
1381 SET_SRC (XVECEXP (body, 0, 0)) = new;
1385 /* Return a memory reference like MEMREF, but with its mode changed
1386 to MODE and its address changed to ADDR.
1387 (VOIDmode means don't change the mode.
1388 NULL for ADDR means don't change the address.) */
1391 change_address (memref, mode, addr)
1393 enum machine_mode mode;
1398 if (GET_CODE (memref) != MEM)
1400 if (mode == VOIDmode)
1401 mode = GET_MODE (memref);
1403 addr = XEXP (memref, 0);
1405 /* If reload is in progress or has completed, ADDR must be valid.
1406 Otherwise, we can call memory_address to make it valid. */
1407 if (reload_completed || reload_in_progress)
1409 if (! memory_address_p (mode, addr))
1413 addr = memory_address (mode, addr);
1415 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1418 new = gen_rtx_MEM (mode, addr);
1419 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1420 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1421 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1425 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1432 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1433 NULL_RTX, label_num++, NULL_PTR);
1435 LABEL_NUSES (label) = 0;
1439 /* For procedure integration. */
1441 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1442 from a permanent obstack when the opportunity arises. */
1445 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1446 last_labelno, max_parm_regnum, max_regnum, args_size,
1447 pops_args, stack_slots, forced_labels, function_flags,
1448 outgoing_args_size, original_arg_vector,
1449 original_decl_initial, regno_rtx, regno_flag,
1450 regno_align, parm_reg_stack_loc)
1451 rtx first_insn, first_parm_insn;
1452 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1457 int outgoing_args_size;
1458 rtvec original_arg_vector;
1459 rtx original_decl_initial;
1463 rtvec parm_reg_stack_loc;
1465 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1466 cur_insn_uid++, NULL_RTX,
1467 first_insn, first_parm_insn,
1468 first_labelno, last_labelno,
1469 max_parm_regnum, max_regnum, args_size,
1470 pops_args, stack_slots, forced_labels,
1471 function_flags, outgoing_args_size,
1472 original_arg_vector,
1473 original_decl_initial,
1474 regno_rtx, regno_flag, regno_align,
1475 parm_reg_stack_loc);
1479 /* Install new pointers to the first and last insns in the chain.
1480 Also, set cur_insn_uid to one higher than the last in use.
1481 Used for an inline-procedure after copying the insn chain. */
1484 set_new_first_and_last_insn (first, last)
1493 for (insn = first; insn; insn = NEXT_INSN (insn))
1494 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1499 /* Set the range of label numbers found in the current function.
1500 This is used when belatedly compiling an inline function. */
1503 set_new_first_and_last_label_num (first, last)
1506 base_label_num = label_num;
1507 first_label_num = first;
1508 last_label_num = last;
1511 /* Save all variables describing the current status into the structure *P.
1512 This is used before starting a nested function. */
1515 save_emit_status (p)
1518 p->reg_rtx_no = reg_rtx_no;
1519 p->first_label_num = first_label_num;
1520 p->first_insn = first_insn;
1521 p->last_insn = last_insn;
1522 p->sequence_rtl_expr = sequence_rtl_expr;
1523 p->sequence_stack = sequence_stack;
1524 p->cur_insn_uid = cur_insn_uid;
1525 p->last_linenum = last_linenum;
1526 p->last_filename = last_filename;
1527 p->regno_pointer_flag = regno_pointer_flag;
1528 p->regno_pointer_align = regno_pointer_align;
1529 p->regno_pointer_flag_length = regno_pointer_flag_length;
1530 p->regno_reg_rtx = regno_reg_rtx;
1533 /* Restore all variables describing the current status from the structure *P.
1534 This is used after a nested function. */
1537 restore_emit_status (p)
1542 reg_rtx_no = p->reg_rtx_no;
1543 first_label_num = p->first_label_num;
1545 first_insn = p->first_insn;
1546 last_insn = p->last_insn;
1547 sequence_rtl_expr = p->sequence_rtl_expr;
1548 sequence_stack = p->sequence_stack;
1549 cur_insn_uid = p->cur_insn_uid;
1550 last_linenum = p->last_linenum;
1551 last_filename = p->last_filename;
1552 regno_pointer_flag = p->regno_pointer_flag;
1553 regno_pointer_align = p->regno_pointer_align;
1554 regno_pointer_flag_length = p->regno_pointer_flag_length;
1555 regno_reg_rtx = p->regno_reg_rtx;
1557 /* Clear our cache of rtx expressions for start_sequence and
1559 sequence_element_free_list = 0;
1560 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1561 sequence_result[i] = 0;
1566 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1567 It does not work to do this twice, because the mark bits set here
1568 are not cleared afterwards. */
1571 unshare_all_rtl (insn)
1574 for (; insn; insn = NEXT_INSN (insn))
1575 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1576 || GET_CODE (insn) == CALL_INSN)
1578 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1579 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1580 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1583 /* Make sure the addresses of stack slots found outside the insn chain
1584 (such as, in DECL_RTL of a variable) are not shared
1585 with the insn chain.
1587 This special care is necessary when the stack slot MEM does not
1588 actually appear in the insn chain. If it does appear, its address
1589 is unshared from all else at that point. */
1591 copy_rtx_if_shared (stack_slot_list);
1594 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1595 Recursively does the same for subexpressions. */
1598 copy_rtx_if_shared (orig)
1601 register rtx x = orig;
1603 register enum rtx_code code;
1604 register char *format_ptr;
1610 code = GET_CODE (x);
1612 /* These types may be freely shared. */
1625 /* SCRATCH must be shared because they represent distinct values. */
1629 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1630 a LABEL_REF, it isn't sharable. */
1631 if (GET_CODE (XEXP (x, 0)) == PLUS
1632 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1633 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1642 /* The chain of insns is not being copied. */
1646 /* A MEM is allowed to be shared if its address is constant
1647 or is a constant plus one of the special registers. */
1648 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1649 || XEXP (x, 0) == virtual_stack_vars_rtx
1650 || XEXP (x, 0) == virtual_incoming_args_rtx)
1653 if (GET_CODE (XEXP (x, 0)) == PLUS
1654 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1655 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1656 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1658 /* This MEM can appear in more than one place,
1659 but its address better not be shared with anything else. */
1661 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1671 /* This rtx may not be shared. If it has already been seen,
1672 replace it with a copy of itself. */
1678 copy = rtx_alloc (code);
1679 bcopy ((char *) x, (char *) copy,
1680 (sizeof (*copy) - sizeof (copy->fld)
1681 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1687 /* Now scan the subexpressions recursively.
1688 We can store any replaced subexpressions directly into X
1689 since we know X is not shared! Any vectors in X
1690 must be copied if X was copied. */
1692 format_ptr = GET_RTX_FORMAT (code);
1694 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1696 switch (*format_ptr++)
1699 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1703 if (XVEC (x, i) != NULL)
1706 int len = XVECLEN (x, i);
1708 if (copied && len > 0)
1709 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1710 for (j = 0; j < len; j++)
1711 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1719 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1720 to look for shared sub-parts. */
1723 reset_used_flags (x)
1727 register enum rtx_code code;
1728 register char *format_ptr;
1733 code = GET_CODE (x);
1735 /* These types may be freely shared so we needn't do any resetting
1756 /* The chain of insns is not being copied. */
1765 format_ptr = GET_RTX_FORMAT (code);
1766 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1768 switch (*format_ptr++)
1771 reset_used_flags (XEXP (x, i));
1775 for (j = 0; j < XVECLEN (x, i); j++)
1776 reset_used_flags (XVECEXP (x, i, j));
1782 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1783 Return X or the rtx for the pseudo reg the value of X was copied into.
1784 OTHER must be valid as a SET_DEST. */
1787 make_safe_from (x, other)
1791 switch (GET_CODE (other))
1794 other = SUBREG_REG (other);
1796 case STRICT_LOW_PART:
1799 other = XEXP (other, 0);
1805 if ((GET_CODE (other) == MEM
1807 && GET_CODE (x) != REG
1808 && GET_CODE (x) != SUBREG)
1809 || (GET_CODE (other) == REG
1810 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1811 || reg_mentioned_p (other, x))))
1813 rtx temp = gen_reg_rtx (GET_MODE (x));
1814 emit_move_insn (temp, x);
1820 /* Emission of insns (adding them to the doubly-linked list). */
1822 /* Return the first insn of the current sequence or current function. */
1830 /* Return the last insn emitted in current sequence or current function. */
1838 /* Specify a new insn as the last in the chain. */
1841 set_last_insn (insn)
1844 if (NEXT_INSN (insn) != 0)
1849 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1852 get_last_insn_anywhere ()
1854 struct sequence_stack *stack;
1857 for (stack = sequence_stack; stack; stack = stack->next)
1858 if (stack->last != 0)
1863 /* Return a number larger than any instruction's uid in this function. */
1868 return cur_insn_uid;
1871 /* Return the next insn. If it is a SEQUENCE, return the first insn
1880 insn = NEXT_INSN (insn);
1881 if (insn && GET_CODE (insn) == INSN
1882 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1883 insn = XVECEXP (PATTERN (insn), 0, 0);
1889 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1893 previous_insn (insn)
1898 insn = PREV_INSN (insn);
1899 if (insn && GET_CODE (insn) == INSN
1900 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1901 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1907 /* Return the next insn after INSN that is not a NOTE. This routine does not
1908 look inside SEQUENCEs. */
1911 next_nonnote_insn (insn)
1916 insn = NEXT_INSN (insn);
1917 if (insn == 0 || GET_CODE (insn) != NOTE)
1924 /* Return the previous insn before INSN that is not a NOTE. This routine does
1925 not look inside SEQUENCEs. */
1928 prev_nonnote_insn (insn)
1933 insn = PREV_INSN (insn);
1934 if (insn == 0 || GET_CODE (insn) != NOTE)
1941 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1942 or 0, if there is none. This routine does not look inside
1946 next_real_insn (insn)
1951 insn = NEXT_INSN (insn);
1952 if (insn == 0 || GET_CODE (insn) == INSN
1953 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1960 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1961 or 0, if there is none. This routine does not look inside
1965 prev_real_insn (insn)
1970 insn = PREV_INSN (insn);
1971 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1972 || GET_CODE (insn) == JUMP_INSN)
1979 /* Find the next insn after INSN that really does something. This routine
1980 does not look inside SEQUENCEs. Until reload has completed, this is the
1981 same as next_real_insn. */
1984 next_active_insn (insn)
1989 insn = NEXT_INSN (insn);
1991 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1992 || (GET_CODE (insn) == INSN
1993 && (! reload_completed
1994 || (GET_CODE (PATTERN (insn)) != USE
1995 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2002 /* Find the last insn before INSN that really does something. This routine
2003 does not look inside SEQUENCEs. Until reload has completed, this is the
2004 same as prev_real_insn. */
2007 prev_active_insn (insn)
2012 insn = PREV_INSN (insn);
2014 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2015 || (GET_CODE (insn) == INSN
2016 && (! reload_completed
2017 || (GET_CODE (PATTERN (insn)) != USE
2018 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2025 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2033 insn = NEXT_INSN (insn);
2034 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2041 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2049 insn = PREV_INSN (insn);
2050 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2058 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2059 and REG_CC_USER notes so we can find it. */
2062 link_cc0_insns (insn)
2065 rtx user = next_nonnote_insn (insn);
2067 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2068 user = XVECEXP (PATTERN (user), 0, 0);
2070 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2071 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2074 /* Return the next insn that uses CC0 after INSN, which is assumed to
2075 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2076 applied to the result of this function should yield INSN).
2078 Normally, this is simply the next insn. However, if a REG_CC_USER note
2079 is present, it contains the insn that uses CC0.
2081 Return 0 if we can't find the insn. */
2084 next_cc0_user (insn)
2087 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2090 return XEXP (note, 0);
2092 insn = next_nonnote_insn (insn);
2093 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2094 insn = XVECEXP (PATTERN (insn), 0, 0);
2096 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2097 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2103 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2104 note, it is the previous insn. */
2107 prev_cc0_setter (insn)
2110 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2113 return XEXP (note, 0);
2115 insn = prev_nonnote_insn (insn);
2116 if (! sets_cc0_p (PATTERN (insn)))
2123 /* Try splitting insns that can be split for better scheduling.
2124 PAT is the pattern which might split.
2125 TRIAL is the insn providing PAT.
2126 LAST is non-zero if we should return the last insn of the sequence produced.
2128 If this routine succeeds in splitting, it returns the first or last
2129 replacement insn depending on the value of LAST. Otherwise, it
2130 returns TRIAL. If the insn to be returned can be split, it will be. */
2133 try_split (pat, trial, last)
2137 rtx before = PREV_INSN (trial);
2138 rtx after = NEXT_INSN (trial);
2139 rtx seq = split_insns (pat, trial);
2140 int has_barrier = 0;
2143 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2144 We may need to handle this specially. */
2145 if (after && GET_CODE (after) == BARRIER)
2148 after = NEXT_INSN (after);
2153 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2154 The latter case will normally arise only when being done so that
2155 it, in turn, will be split (SFmode on the 29k is an example). */
2156 if (GET_CODE (seq) == SEQUENCE)
2158 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2159 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2160 increment the usage count so we don't delete the label. */
2163 if (GET_CODE (trial) == JUMP_INSN)
2164 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2165 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2167 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2169 if (JUMP_LABEL (trial))
2170 LABEL_NUSES (JUMP_LABEL (trial))++;
2173 tem = emit_insn_after (seq, before);
2175 delete_insn (trial);
2177 emit_barrier_after (tem);
2179 /* Recursively call try_split for each new insn created; by the
2180 time control returns here that insn will be fully split, so
2181 set LAST and continue from the insn after the one returned.
2182 We can't use next_active_insn here since AFTER may be a note.
2183 Ignore deleted insns, which can be occur if not optimizing. */
2184 for (tem = NEXT_INSN (before); tem != after;
2185 tem = NEXT_INSN (tem))
2186 if (! INSN_DELETED_P (tem))
2187 tem = try_split (PATTERN (tem), tem, 1);
2189 /* Avoid infinite loop if the result matches the original pattern. */
2190 else if (rtx_equal_p (seq, pat))
2194 PATTERN (trial) = seq;
2195 INSN_CODE (trial) = -1;
2196 try_split (seq, trial, last);
2199 /* Return either the first or the last insn, depending on which was
2201 return last ? prev_active_insn (after) : next_active_insn (before);
2207 /* Make and return an INSN rtx, initializing all its slots.
2208 Store PATTERN in the pattern slots. */
2211 make_insn_raw (pattern)
2216 /* If in RTL generation phase, see if FREE_INSN can be used. */
2217 if (free_insn != 0 && rtx_equal_function_value_matters)
2220 free_insn = NEXT_INSN (free_insn);
2221 PUT_CODE (insn, INSN);
2224 insn = rtx_alloc (INSN);
2226 INSN_UID (insn) = cur_insn_uid++;
2227 PATTERN (insn) = pattern;
2228 INSN_CODE (insn) = -1;
2229 LOG_LINKS (insn) = NULL;
2230 REG_NOTES (insn) = NULL;
2235 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2238 make_jump_insn_raw (pattern)
2243 insn = rtx_alloc (JUMP_INSN);
2244 INSN_UID (insn) = cur_insn_uid++;
2246 PATTERN (insn) = pattern;
2247 INSN_CODE (insn) = -1;
2248 LOG_LINKS (insn) = NULL;
2249 REG_NOTES (insn) = NULL;
2250 JUMP_LABEL (insn) = NULL;
2255 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2258 make_call_insn_raw (pattern)
2263 insn = rtx_alloc (CALL_INSN);
2264 INSN_UID (insn) = cur_insn_uid++;
2266 PATTERN (insn) = pattern;
2267 INSN_CODE (insn) = -1;
2268 LOG_LINKS (insn) = NULL;
2269 REG_NOTES (insn) = NULL;
2270 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2275 /* Add INSN to the end of the doubly-linked list.
2276 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2282 PREV_INSN (insn) = last_insn;
2283 NEXT_INSN (insn) = 0;
2285 if (NULL != last_insn)
2286 NEXT_INSN (last_insn) = insn;
2288 if (NULL == first_insn)
2294 /* Add INSN into the doubly-linked list after insn AFTER. This and
2295 the next should be the only functions called to insert an insn once
2296 delay slots have been filled since only they know how to update a
2300 add_insn_after (insn, after)
2303 rtx next = NEXT_INSN (after);
2305 if (optimize && INSN_DELETED_P (after))
2308 NEXT_INSN (insn) = next;
2309 PREV_INSN (insn) = after;
2313 PREV_INSN (next) = insn;
2314 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2315 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2317 else if (last_insn == after)
2321 struct sequence_stack *stack = sequence_stack;
2322 /* Scan all pending sequences too. */
2323 for (; stack; stack = stack->next)
2324 if (after == stack->last)
2334 NEXT_INSN (after) = insn;
2335 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2337 rtx sequence = PATTERN (after);
2338 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2342 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2343 the previous should be the only functions called to insert an insn once
2344 delay slots have been filled since only they know how to update a
2348 add_insn_before (insn, before)
2351 rtx prev = PREV_INSN (before);
2353 if (optimize && INSN_DELETED_P (before))
2356 PREV_INSN (insn) = prev;
2357 NEXT_INSN (insn) = before;
2361 NEXT_INSN (prev) = insn;
2362 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2364 rtx sequence = PATTERN (prev);
2365 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2368 else if (first_insn == before)
2372 struct sequence_stack *stack = sequence_stack;
2373 /* Scan all pending sequences too. */
2374 for (; stack; stack = stack->next)
2375 if (before == stack->first)
2377 stack->first = insn;
2385 PREV_INSN (before) = insn;
2386 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2387 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2390 /* Delete all insns made since FROM.
2391 FROM becomes the new last instruction. */
2394 delete_insns_since (from)
2400 NEXT_INSN (from) = 0;
2404 /* This function is deprecated, please use sequences instead.
2406 Move a consecutive bunch of insns to a different place in the chain.
2407 The insns to be moved are those between FROM and TO.
2408 They are moved to a new position after the insn AFTER.
2409 AFTER must not be FROM or TO or any insn in between.
2411 This function does not know about SEQUENCEs and hence should not be
2412 called after delay-slot filling has been done. */
2415 reorder_insns (from, to, after)
2416 rtx from, to, after;
2418 /* Splice this bunch out of where it is now. */
2419 if (PREV_INSN (from))
2420 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2422 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2423 if (last_insn == to)
2424 last_insn = PREV_INSN (from);
2425 if (first_insn == from)
2426 first_insn = NEXT_INSN (to);
2428 /* Make the new neighbors point to it and it to them. */
2429 if (NEXT_INSN (after))
2430 PREV_INSN (NEXT_INSN (after)) = to;
2432 NEXT_INSN (to) = NEXT_INSN (after);
2433 PREV_INSN (from) = after;
2434 NEXT_INSN (after) = from;
2435 if (after == last_insn)
2439 /* Return the line note insn preceding INSN. */
2442 find_line_note (insn)
2445 if (no_line_numbers)
2448 for (; insn; insn = PREV_INSN (insn))
2449 if (GET_CODE (insn) == NOTE
2450 && NOTE_LINE_NUMBER (insn) >= 0)
2456 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2457 of the moved insns when debugging. This may insert a note between AFTER
2458 and FROM, and another one after TO. */
2461 reorder_insns_with_line_notes (from, to, after)
2462 rtx from, to, after;
2464 rtx from_line = find_line_note (from);
2465 rtx after_line = find_line_note (after);
2467 reorder_insns (from, to, after);
2469 if (from_line == after_line)
2473 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2474 NOTE_LINE_NUMBER (from_line),
2477 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2478 NOTE_LINE_NUMBER (after_line),
2482 /* Emit an insn of given code and pattern
2483 at a specified place within the doubly-linked list. */
2485 /* Make an instruction with body PATTERN
2486 and output it before the instruction BEFORE. */
2489 emit_insn_before (pattern, before)
2490 register rtx pattern, before;
2492 register rtx insn = before;
2494 if (GET_CODE (pattern) == SEQUENCE)
2498 for (i = 0; i < XVECLEN (pattern, 0); i++)
2500 insn = XVECEXP (pattern, 0, i);
2501 add_insn_before (insn, before);
2503 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2504 sequence_result[XVECLEN (pattern, 0)] = pattern;
2508 insn = make_insn_raw (pattern);
2509 add_insn_before (insn, before);
2515 /* Make an instruction with body PATTERN and code JUMP_INSN
2516 and output it before the instruction BEFORE. */
2519 emit_jump_insn_before (pattern, before)
2520 register rtx pattern, before;
2524 if (GET_CODE (pattern) == SEQUENCE)
2525 insn = emit_insn_before (pattern, before);
2528 insn = make_jump_insn_raw (pattern);
2529 add_insn_before (insn, before);
2535 /* Make an instruction with body PATTERN and code CALL_INSN
2536 and output it before the instruction BEFORE. */
2539 emit_call_insn_before (pattern, before)
2540 register rtx pattern, before;
2544 if (GET_CODE (pattern) == SEQUENCE)
2545 insn = emit_insn_before (pattern, before);
2548 insn = make_call_insn_raw (pattern);
2549 add_insn_before (insn, before);
2550 PUT_CODE (insn, CALL_INSN);
2556 /* Make an insn of code BARRIER
2557 and output it before the insn AFTER. */
2560 emit_barrier_before (before)
2561 register rtx before;
2563 register rtx insn = rtx_alloc (BARRIER);
2565 INSN_UID (insn) = cur_insn_uid++;
2567 add_insn_before (insn, before);
2571 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2574 emit_note_before (subtype, before)
2578 register rtx note = rtx_alloc (NOTE);
2579 INSN_UID (note) = cur_insn_uid++;
2580 NOTE_SOURCE_FILE (note) = 0;
2581 NOTE_LINE_NUMBER (note) = subtype;
2583 add_insn_before (note, before);
2587 /* Make an insn of code INSN with body PATTERN
2588 and output it after the insn AFTER. */
2591 emit_insn_after (pattern, after)
2592 register rtx pattern, after;
2594 register rtx insn = after;
2596 if (GET_CODE (pattern) == SEQUENCE)
2600 for (i = 0; i < XVECLEN (pattern, 0); i++)
2602 insn = XVECEXP (pattern, 0, i);
2603 add_insn_after (insn, after);
2606 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2607 sequence_result[XVECLEN (pattern, 0)] = pattern;
2611 insn = make_insn_raw (pattern);
2612 add_insn_after (insn, after);
2618 /* Similar to emit_insn_after, except that line notes are to be inserted so
2619 as to act as if this insn were at FROM. */
2622 emit_insn_after_with_line_notes (pattern, after, from)
2623 rtx pattern, after, from;
2625 rtx from_line = find_line_note (from);
2626 rtx after_line = find_line_note (after);
2627 rtx insn = emit_insn_after (pattern, after);
2630 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2631 NOTE_LINE_NUMBER (from_line),
2635 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2636 NOTE_LINE_NUMBER (after_line),
2640 /* Make an insn of code JUMP_INSN with body PATTERN
2641 and output it after the insn AFTER. */
2644 emit_jump_insn_after (pattern, after)
2645 register rtx pattern, after;
2649 if (GET_CODE (pattern) == SEQUENCE)
2650 insn = emit_insn_after (pattern, after);
2653 insn = make_jump_insn_raw (pattern);
2654 add_insn_after (insn, after);
2660 /* Make an insn of code BARRIER
2661 and output it after the insn AFTER. */
2664 emit_barrier_after (after)
2667 register rtx insn = rtx_alloc (BARRIER);
2669 INSN_UID (insn) = cur_insn_uid++;
2671 add_insn_after (insn, after);
2675 /* Emit the label LABEL after the insn AFTER. */
2678 emit_label_after (label, after)
2681 /* This can be called twice for the same label
2682 as a result of the confusion that follows a syntax error!
2683 So make it harmless. */
2684 if (INSN_UID (label) == 0)
2686 INSN_UID (label) = cur_insn_uid++;
2687 add_insn_after (label, after);
2693 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2696 emit_note_after (subtype, after)
2700 register rtx note = rtx_alloc (NOTE);
2701 INSN_UID (note) = cur_insn_uid++;
2702 NOTE_SOURCE_FILE (note) = 0;
2703 NOTE_LINE_NUMBER (note) = subtype;
2704 add_insn_after (note, after);
2708 /* Emit a line note for FILE and LINE after the insn AFTER. */
2711 emit_line_note_after (file, line, after)
2718 if (no_line_numbers && line > 0)
2724 note = rtx_alloc (NOTE);
2725 INSN_UID (note) = cur_insn_uid++;
2726 NOTE_SOURCE_FILE (note) = file;
2727 NOTE_LINE_NUMBER (note) = line;
2728 add_insn_after (note, after);
2732 /* Make an insn of code INSN with pattern PATTERN
2733 and add it to the end of the doubly-linked list.
2734 If PATTERN is a SEQUENCE, take the elements of it
2735 and emit an insn for each element.
2737 Returns the last insn emitted. */
2743 rtx insn = last_insn;
2745 if (GET_CODE (pattern) == SEQUENCE)
2749 for (i = 0; i < XVECLEN (pattern, 0); i++)
2751 insn = XVECEXP (pattern, 0, i);
2754 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2755 sequence_result[XVECLEN (pattern, 0)] = pattern;
2759 insn = make_insn_raw (pattern);
2766 /* Emit the insns in a chain starting with INSN.
2767 Return the last insn emitted. */
2777 rtx next = NEXT_INSN (insn);
2786 /* Emit the insns in a chain starting with INSN and place them in front of
2787 the insn BEFORE. Return the last insn emitted. */
2790 emit_insns_before (insn, before)
2798 rtx next = NEXT_INSN (insn);
2799 add_insn_before (insn, before);
2807 /* Emit the insns in a chain starting with FIRST and place them in back of
2808 the insn AFTER. Return the last insn emitted. */
2811 emit_insns_after (first, after)
2816 register rtx after_after;
2824 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2827 after_after = NEXT_INSN (after);
2829 NEXT_INSN (after) = first;
2830 PREV_INSN (first) = after;
2831 NEXT_INSN (last) = after_after;
2833 PREV_INSN (after_after) = last;
2835 if (after == last_insn)
2840 /* Make an insn of code JUMP_INSN with pattern PATTERN
2841 and add it to the end of the doubly-linked list. */
2844 emit_jump_insn (pattern)
2847 if (GET_CODE (pattern) == SEQUENCE)
2848 return emit_insn (pattern);
2851 register rtx insn = make_jump_insn_raw (pattern);
2857 /* Make an insn of code CALL_INSN with pattern PATTERN
2858 and add it to the end of the doubly-linked list. */
2861 emit_call_insn (pattern)
2864 if (GET_CODE (pattern) == SEQUENCE)
2865 return emit_insn (pattern);
2868 register rtx insn = make_call_insn_raw (pattern);
2870 PUT_CODE (insn, CALL_INSN);
2875 /* Add the label LABEL to the end of the doubly-linked list. */
2881 /* This can be called twice for the same label
2882 as a result of the confusion that follows a syntax error!
2883 So make it harmless. */
2884 if (INSN_UID (label) == 0)
2886 INSN_UID (label) = cur_insn_uid++;
2892 /* Make an insn of code BARRIER
2893 and add it to the end of the doubly-linked list. */
2898 register rtx barrier = rtx_alloc (BARRIER);
2899 INSN_UID (barrier) = cur_insn_uid++;
2904 /* Make an insn of code NOTE
2905 with data-fields specified by FILE and LINE
2906 and add it to the end of the doubly-linked list,
2907 but only if line-numbers are desired for debugging info. */
2910 emit_line_note (file, line)
2914 emit_filename = file;
2918 if (no_line_numbers)
2922 return emit_note (file, line);
2925 /* Make an insn of code NOTE
2926 with data-fields specified by FILE and LINE
2927 and add it to the end of the doubly-linked list.
2928 If it is a line-number NOTE, omit it if it matches the previous one. */
2931 emit_note (file, line)
2939 if (file && last_filename && !strcmp (file, last_filename)
2940 && line == last_linenum)
2942 last_filename = file;
2943 last_linenum = line;
2946 if (no_line_numbers && line > 0)
2952 note = rtx_alloc (NOTE);
2953 INSN_UID (note) = cur_insn_uid++;
2954 NOTE_SOURCE_FILE (note) = file;
2955 NOTE_LINE_NUMBER (note) = line;
2960 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2963 emit_line_note_force (file, line)
2968 return emit_line_note (file, line);
2971 /* Cause next statement to emit a line note even if the line number
2972 has not changed. This is used at the beginning of a function. */
2975 force_next_line_note ()
2980 /* Return an indication of which type of insn should have X as a body.
2981 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2987 if (GET_CODE (x) == CODE_LABEL)
2989 if (GET_CODE (x) == CALL)
2991 if (GET_CODE (x) == RETURN)
2993 if (GET_CODE (x) == SET)
2995 if (SET_DEST (x) == pc_rtx)
2997 else if (GET_CODE (SET_SRC (x)) == CALL)
3002 if (GET_CODE (x) == PARALLEL)
3005 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3006 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3008 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3009 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3011 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3012 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3018 /* Emit the rtl pattern X as an appropriate kind of insn.
3019 If X is a label, it is simply added into the insn chain. */
3025 enum rtx_code code = classify_insn (x);
3027 if (code == CODE_LABEL)
3028 return emit_label (x);
3029 else if (code == INSN)
3030 return emit_insn (x);
3031 else if (code == JUMP_INSN)
3033 register rtx insn = emit_jump_insn (x);
3034 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3035 return emit_barrier ();
3038 else if (code == CALL_INSN)
3039 return emit_call_insn (x);
3044 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3049 struct sequence_stack *tem;
3051 if (sequence_element_free_list)
3053 /* Reuse a previously-saved struct sequence_stack. */
3054 tem = sequence_element_free_list;
3055 sequence_element_free_list = tem->next;
3058 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3060 tem->next = sequence_stack;
3061 tem->first = first_insn;
3062 tem->last = last_insn;
3063 tem->sequence_rtl_expr = sequence_rtl_expr;
3065 sequence_stack = tem;
3071 /* Similarly, but indicate that this sequence will be placed in
3075 start_sequence_for_rtl_expr (t)
3080 sequence_rtl_expr = t;
3083 /* Set up the insn chain starting with FIRST
3084 as the current sequence, saving the previously current one. */
3087 push_to_sequence (first)
3094 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3100 /* Set up the outer-level insn chain
3101 as the current sequence, saving the previously current one. */
3104 push_topmost_sequence ()
3106 struct sequence_stack *stack, *top;
3110 for (stack = sequence_stack; stack; stack = stack->next)
3113 first_insn = top->first;
3114 last_insn = top->last;
3115 sequence_rtl_expr = top->sequence_rtl_expr;
3118 /* After emitting to the outer-level insn chain, update the outer-level
3119 insn chain, and restore the previous saved state. */
3122 pop_topmost_sequence ()
3124 struct sequence_stack *stack, *top;
3126 for (stack = sequence_stack; stack; stack = stack->next)
3129 top->first = first_insn;
3130 top->last = last_insn;
3131 /* ??? Why don't we save sequence_rtl_expr here? */
3136 /* After emitting to a sequence, restore previous saved state.
3138 To get the contents of the sequence just made,
3139 you must call `gen_sequence' *before* calling here. */
3144 struct sequence_stack *tem = sequence_stack;
3146 first_insn = tem->first;
3147 last_insn = tem->last;
3148 sequence_rtl_expr = tem->sequence_rtl_expr;
3149 sequence_stack = tem->next;
3151 tem->next = sequence_element_free_list;
3152 sequence_element_free_list = tem;
3155 /* Return 1 if currently emitting into a sequence. */
3160 return sequence_stack != 0;
3163 /* Generate a SEQUENCE rtx containing the insns already emitted
3164 to the current sequence.
3166 This is how the gen_... function from a DEFINE_EXPAND
3167 constructs the SEQUENCE that it returns. */
3177 /* Count the insns in the chain. */
3179 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3182 /* If only one insn, return its pattern rather than a SEQUENCE.
3183 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3184 the case of an empty list.) */
3186 && ! RTX_FRAME_RELATED_P (first_insn)
3187 && (GET_CODE (first_insn) == INSN
3188 || GET_CODE (first_insn) == JUMP_INSN
3189 /* Don't discard the call usage field. */
3190 || (GET_CODE (first_insn) == CALL_INSN
3191 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3193 NEXT_INSN (first_insn) = free_insn;
3194 free_insn = first_insn;
3195 return PATTERN (first_insn);
3198 /* Put them in a vector. See if we already have a SEQUENCE of the
3199 appropriate length around. */
3200 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3201 sequence_result[len] = 0;
3204 /* Ensure that this rtl goes in saveable_obstack, since we may
3206 push_obstacks_nochange ();
3207 rtl_in_saveable_obstack ();
3208 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3212 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3213 XVECEXP (result, 0, i) = tem;
3218 /* Initialize data structures and variables in this file
3219 before generating rtl for each function. */
3228 sequence_rtl_expr = NULL;
3230 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3233 first_label_num = label_num;
3235 sequence_stack = NULL;
3237 /* Clear the start_sequence/gen_sequence cache. */
3238 sequence_element_free_list = 0;
3239 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3240 sequence_result[i] = 0;
3243 /* Init the tables that describe all the pseudo regs. */
3245 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3248 = (char *) savealloc (regno_pointer_flag_length);
3249 bzero (regno_pointer_flag, regno_pointer_flag_length);
3252 = (char *) savealloc (regno_pointer_flag_length);
3253 bzero (regno_pointer_align, regno_pointer_flag_length);
3256 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3257 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3259 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3260 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3261 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3262 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3263 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3265 /* Indicate that the virtual registers and stack locations are
3267 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3268 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3269 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3270 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3272 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3273 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3274 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3275 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3277 #ifdef STACK_BOUNDARY
3278 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3279 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3280 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3281 = STACK_BOUNDARY / BITS_PER_UNIT;
3282 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3284 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3285 = STACK_BOUNDARY / BITS_PER_UNIT;
3286 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3287 = STACK_BOUNDARY / BITS_PER_UNIT;
3288 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3289 = STACK_BOUNDARY / BITS_PER_UNIT;
3290 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3291 = STACK_BOUNDARY / BITS_PER_UNIT;
3294 #ifdef INIT_EXPANDERS
3299 /* Create some permanent unique rtl objects shared between all functions.
3300 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3303 init_emit_once (line_numbers)
3307 enum machine_mode mode;
3309 no_line_numbers = ! line_numbers;
3311 sequence_stack = NULL;
3313 /* Compute the word and byte modes. */
3315 byte_mode = VOIDmode;
3316 word_mode = VOIDmode;
3318 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3319 mode = GET_MODE_WIDER_MODE (mode))
3321 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3322 && byte_mode == VOIDmode)
3325 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3326 && word_mode == VOIDmode)
3330 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3332 /* Create the unique rtx's for certain rtx codes and operand values. */
3334 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3336 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3337 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3338 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3341 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3342 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3343 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3345 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3347 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3348 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3349 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3350 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3352 for (i = 0; i <= 2; i++)
3354 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3355 mode = GET_MODE_WIDER_MODE (mode))
3357 rtx tem = rtx_alloc (CONST_DOUBLE);
3358 union real_extract u;
3360 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3361 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3363 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3364 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3365 PUT_MODE (tem, mode);
3367 const_tiny_rtx[i][(int) mode] = tem;
3370 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3372 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3373 mode = GET_MODE_WIDER_MODE (mode))
3374 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3376 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3378 mode = GET_MODE_WIDER_MODE (mode))
3379 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3382 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3383 mode = GET_MODE_WIDER_MODE (mode))
3384 const_tiny_rtx[0][(int) mode] = const0_rtx;
3387 /* Assign register numbers to the globally defined register rtx.
3388 This must be done at runtime because the register number field
3389 is in a union and some compilers can't initialize unions. */
3391 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3392 PUT_MODE (stack_pointer_rtx, Pmode);
3393 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3394 PUT_MODE (frame_pointer_rtx, Pmode);
3395 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3396 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3397 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3399 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3400 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3401 PUT_MODE (arg_pointer_rtx, Pmode);
3404 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3405 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3406 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3407 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3408 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3409 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3410 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3411 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3413 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3414 return_address_pointer_rtx
3415 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3419 struct_value_rtx = STRUCT_VALUE;
3421 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3424 #ifdef STRUCT_VALUE_INCOMING
3425 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3427 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3428 struct_value_incoming_rtx
3429 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3431 struct_value_incoming_rtx = struct_value_rtx;
3435 #ifdef STATIC_CHAIN_REGNUM
3436 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3438 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3439 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3440 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3443 static_chain_incoming_rtx = static_chain_rtx;
3447 static_chain_rtx = STATIC_CHAIN;
3449 #ifdef STATIC_CHAIN_INCOMING
3450 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3452 static_chain_incoming_rtx = static_chain_rtx;
3456 #ifdef PIC_OFFSET_TABLE_REGNUM
3457 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);