1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl[GR_MAX];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab;
147 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
148 shortly thrown away. We use two mechanisms to prevent this waste:
150 For sizes up to 5 elements, we keep a SEQUENCE and its associated
151 rtvec for use by gen_sequence. One entry for each size is
152 sufficient because most cases are calls to gen_sequence followed by
153 immediately emitting the SEQUENCE. Reuse is safe since emitting a
154 sequence is destructive on the insn in it anyway and hence can't be
157 We do not bother to save this cached data over nested function calls.
158 Instead, we just reinitialize them. */
160 #define SEQUENCE_RESULT_SIZE 5
162 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
164 /* During RTL generation, we also keep a list of free INSN rtl codes. */
165 static rtx free_insn;
167 #define first_insn (cfun->emit->x_first_insn)
168 #define last_insn (cfun->emit->x_last_insn)
169 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
170 #define last_linenum (cfun->emit->x_last_linenum)
171 #define last_filename (cfun->emit->x_last_filename)
172 #define first_label_num (cfun->emit->x_first_label_num)
174 static rtx make_jump_insn_raw PARAMS ((rtx));
175 static rtx make_call_insn_raw PARAMS ((rtx));
176 static rtx find_line_note PARAMS ((rtx));
177 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
178 static void unshare_all_rtl_1 PARAMS ((rtx));
179 static void unshare_all_decls PARAMS ((tree));
180 static void reset_used_decls PARAMS ((tree));
181 static void mark_label_nuses PARAMS ((rtx));
182 static hashval_t const_int_htab_hash PARAMS ((const void *));
183 static int const_int_htab_eq PARAMS ((const void *,
185 static int rtx_htab_mark_1 PARAMS ((void **, void *));
186 static void rtx_htab_mark PARAMS ((void *));
188 /* Probability of the conditional branch currently proceeded by try_split.
189 Set to -1 otherwise. */
190 int split_branch_probability = -1;
193 /* Returns a hash code for X (which is a really a CONST_INT). */
196 const_int_htab_hash (x)
199 return (hashval_t) INTVAL ((const struct rtx_def *) x);
202 /* Returns non-zero if the value represented by X (which is really a
203 CONST_INT) is the same as that given by Y (which is really a
207 const_int_htab_eq (x, y)
211 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
214 /* Mark the hash-table element X (which is really a pointer to an
218 rtx_htab_mark_1 (x, data)
220 void *data ATTRIBUTE_UNUSED;
226 /* Mark all the elements of HTAB (which is really an htab_t full of
233 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
236 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
237 don't attempt to share with the various global pieces of rtl (such as
238 frame_pointer_rtx). */
241 gen_raw_REG (mode, regno)
242 enum machine_mode mode;
245 rtx x = gen_rtx_raw_REG (mode, regno);
246 ORIGINAL_REGNO (x) = regno;
250 /* There are some RTL codes that require special attention; the generation
251 functions do the raw handling. If you add to this list, modify
252 special_rtx in gengenrtl.c as well. */
255 gen_rtx_CONST_INT (mode, arg)
256 enum machine_mode mode ATTRIBUTE_UNUSED;
261 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
262 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
264 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
265 if (const_true_rtx && arg == STORE_FLAG_VALUE)
266 return const_true_rtx;
269 /* Look up the CONST_INT in the hash table. */
270 slot = htab_find_slot_with_hash (const_int_htab, &arg,
271 (hashval_t) arg, INSERT);
273 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
278 /* CONST_DOUBLEs needs special handling because their length is known
282 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
283 enum machine_mode mode;
285 HOST_WIDE_INT arg1, arg2;
287 rtx r = rtx_alloc (CONST_DOUBLE);
292 X0EXP (r, 1) = NULL_RTX;
296 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
303 gen_rtx_REG (mode, regno)
304 enum machine_mode mode;
307 /* In case the MD file explicitly references the frame pointer, have
308 all such references point to the same frame pointer. This is
309 used during frame pointer elimination to distinguish the explicit
310 references to these registers from pseudos that happened to be
313 If we have eliminated the frame pointer or arg pointer, we will
314 be using it as a normal register, for example as a spill
315 register. In such cases, we might be accessing it in a mode that
316 is not Pmode and therefore cannot use the pre-allocated rtx.
318 Also don't do this when we are making new REGs in reload, since
319 we don't want to get confused with the real pointers. */
321 if (mode == Pmode && !reload_in_progress)
323 if (regno == FRAME_POINTER_REGNUM)
324 return frame_pointer_rtx;
325 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
326 if (regno == HARD_FRAME_POINTER_REGNUM)
327 return hard_frame_pointer_rtx;
329 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
330 if (regno == ARG_POINTER_REGNUM)
331 return arg_pointer_rtx;
333 #ifdef RETURN_ADDRESS_POINTER_REGNUM
334 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
335 return return_address_pointer_rtx;
337 if (regno == STACK_POINTER_REGNUM)
338 return stack_pointer_rtx;
341 return gen_raw_REG (mode, regno);
345 gen_rtx_MEM (mode, addr)
346 enum machine_mode mode;
349 rtx rt = gen_rtx_raw_MEM (mode, addr);
351 /* This field is not cleared by the mere allocation of the rtx, so
353 MEM_ALIAS_SET (rt) = 0;
359 gen_rtx_SUBREG (mode, reg, offset)
360 enum machine_mode mode;
364 /* This is the most common failure type.
365 Catch it early so we can see who does it. */
366 if ((offset % GET_MODE_SIZE (mode)) != 0)
369 /* This check isn't usable right now because combine will
370 throw arbitrary crap like a CALL into a SUBREG in
371 gen_lowpart_for_combine so we must just eat it. */
373 /* Check for this too. */
374 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
377 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
380 /* Generate a SUBREG representing the least-significant part
381 * of REG if MODE is smaller than mode of REG, otherwise
382 * paradoxical SUBREG. */
384 gen_lowpart_SUBREG (mode, reg)
385 enum machine_mode mode;
388 enum machine_mode inmode;
390 inmode = GET_MODE (reg);
391 if (inmode == VOIDmode)
393 return gen_rtx_SUBREG (mode, reg,
394 subreg_lowpart_offset (mode, inmode));
397 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
399 ** This routine generates an RTX of the size specified by
400 ** <code>, which is an RTX code. The RTX structure is initialized
401 ** from the arguments <element1> through <elementn>, which are
402 ** interpreted according to the specific RTX type's format. The
403 ** special machine mode associated with the rtx (if any) is specified
406 ** gen_rtx can be invoked in a way which resembles the lisp-like
407 ** rtx it will generate. For example, the following rtx structure:
409 ** (plus:QI (mem:QI (reg:SI 1))
410 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
412 ** ...would be generated by the following C code:
414 ** gen_rtx (PLUS, QImode,
415 ** gen_rtx (MEM, QImode,
416 ** gen_rtx (REG, SImode, 1)),
417 ** gen_rtx (MEM, QImode,
418 ** gen_rtx (PLUS, SImode,
419 ** gen_rtx (REG, SImode, 2),
420 ** gen_rtx (REG, SImode, 3)))),
425 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
427 #ifndef ANSI_PROTOTYPES
429 enum machine_mode mode;
432 register int i; /* Array indices... */
433 register const char *fmt; /* Current rtx's format... */
434 register rtx rt_val; /* RTX to return to caller... */
438 #ifndef ANSI_PROTOTYPES
439 code = va_arg (p, enum rtx_code);
440 mode = va_arg (p, enum machine_mode);
446 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
451 rtx arg0 = va_arg (p, rtx);
452 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
453 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
454 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
459 rt_val = gen_rtx_REG (mode, va_arg (p, int));
463 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
467 rt_val = rtx_alloc (code); /* Allocate the storage space. */
468 rt_val->mode = mode; /* Store the machine mode... */
470 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
471 for (i = 0; i < GET_RTX_LENGTH (code); i++)
475 case '0': /* Unused field. */
478 case 'i': /* An integer? */
479 XINT (rt_val, i) = va_arg (p, int);
482 case 'w': /* A wide integer? */
483 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
486 case 's': /* A string? */
487 XSTR (rt_val, i) = va_arg (p, char *);
490 case 'e': /* An expression? */
491 case 'u': /* An insn? Same except when printing. */
492 XEXP (rt_val, i) = va_arg (p, rtx);
495 case 'E': /* An RTX vector? */
496 XVEC (rt_val, i) = va_arg (p, rtvec);
499 case 'b': /* A bitmap? */
500 XBITMAP (rt_val, i) = va_arg (p, bitmap);
503 case 't': /* A tree? */
504 XTREE (rt_val, i) = va_arg (p, tree);
518 /* gen_rtvec (n, [rt1, ..., rtn])
520 ** This routine creates an rtvec and stores within it the
521 ** pointers to rtx's which are its arguments.
526 gen_rtvec VPARAMS ((int n, ...))
528 #ifndef ANSI_PROTOTYPES
537 #ifndef ANSI_PROTOTYPES
542 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
544 vector = (rtx *) alloca (n * sizeof (rtx));
546 for (i = 0; i < n; i++)
547 vector[i] = va_arg (p, rtx);
550 return gen_rtvec_v (n, vector);
554 gen_rtvec_v (n, argp)
559 register rtvec rt_val;
562 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
564 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
566 for (i = 0; i < n; i++)
567 rt_val->elem[i] = *argp++;
573 /* Generate a REG rtx for a new pseudo register of mode MODE.
574 This pseudo is assigned the next sequential register number. */
578 enum machine_mode mode;
580 struct function *f = cfun;
583 /* Don't let anything called after initial flow analysis create new
588 if (generating_concat_p
589 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
590 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
592 /* For complex modes, don't make a single pseudo.
593 Instead, make a CONCAT of two pseudos.
594 This allows noncontiguous allocation of the real and imaginary parts,
595 which makes much better code. Besides, allocating DCmode
596 pseudos overstrains reload on some machines like the 386. */
597 rtx realpart, imagpart;
598 int size = GET_MODE_UNIT_SIZE (mode);
599 enum machine_mode partmode
600 = mode_for_size (size * BITS_PER_UNIT,
601 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
602 ? MODE_FLOAT : MODE_INT),
605 realpart = gen_reg_rtx (partmode);
606 imagpart = gen_reg_rtx (partmode);
607 return gen_rtx_CONCAT (mode, realpart, imagpart);
610 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
611 to have an element for this pseudo reg number. */
613 if (reg_rtx_no == f->emit->regno_pointer_align_length)
615 int old_size = f->emit->regno_pointer_align_length;
618 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
619 memset (new + old_size, 0, old_size);
620 f->emit->regno_pointer_align = (unsigned char *) new;
622 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
623 old_size * 2 * sizeof (rtx));
624 memset (new1 + old_size, 0, old_size * sizeof (rtx));
625 regno_reg_rtx = new1;
627 f->emit->regno_pointer_align_length = old_size * 2;
630 val = gen_raw_REG (mode, reg_rtx_no);
631 regno_reg_rtx[reg_rtx_no++] = val;
635 /* Identify REG (which may be a CONCAT) as a user register. */
641 if (GET_CODE (reg) == CONCAT)
643 REG_USERVAR_P (XEXP (reg, 0)) = 1;
644 REG_USERVAR_P (XEXP (reg, 1)) = 1;
646 else if (GET_CODE (reg) == REG)
647 REG_USERVAR_P (reg) = 1;
652 /* Identify REG as a probable pointer register and show its alignment
653 as ALIGN, if nonzero. */
656 mark_reg_pointer (reg, align)
660 if (! REG_POINTER (reg))
662 REG_POINTER (reg) = 1;
665 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
667 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
668 /* We can no-longer be sure just how aligned this pointer is */
669 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
672 /* Return 1 plus largest pseudo reg number used in the current function. */
680 /* Return 1 + the largest label number used so far in the current function. */
685 if (last_label_num && label_num == base_label_num)
686 return last_label_num;
690 /* Return first label number used in this function (if any were used). */
693 get_first_label_num ()
695 return first_label_num;
698 /* Return the final regno of X, which is a SUBREG of a hard
701 subreg_hard_regno (x, check_mode)
705 enum machine_mode mode = GET_MODE (x);
706 unsigned int byte_offset, base_regno, final_regno;
707 rtx reg = SUBREG_REG (x);
709 /* This is where we attempt to catch illegal subregs
710 created by the compiler. */
711 if (GET_CODE (x) != SUBREG
712 || GET_CODE (reg) != REG)
714 base_regno = REGNO (reg);
715 if (base_regno >= FIRST_PSEUDO_REGISTER)
717 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
720 /* Catch non-congruent offsets too. */
721 byte_offset = SUBREG_BYTE (x);
722 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
725 final_regno = subreg_regno (x);
730 /* Return a value representing some low-order bits of X, where the number
731 of low-order bits is given by MODE. Note that no conversion is done
732 between floating-point and fixed-point values, rather, the bit
733 representation is returned.
735 This function handles the cases in common between gen_lowpart, below,
736 and two variants in cse.c and combine.c. These are the cases that can
737 be safely handled at all points in the compilation.
739 If this is not a case we can handle, return 0. */
742 gen_lowpart_common (mode, x)
743 enum machine_mode mode;
746 int msize = GET_MODE_SIZE (mode);
747 int xsize = GET_MODE_SIZE (GET_MODE (x));
750 if (GET_MODE (x) == mode)
753 /* MODE must occupy no more words than the mode of X. */
754 if (GET_MODE (x) != VOIDmode
755 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
756 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
759 offset = subreg_lowpart_offset (mode, GET_MODE (x));
761 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
762 && (GET_MODE_CLASS (mode) == MODE_INT
763 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
765 /* If we are getting the low-order part of something that has been
766 sign- or zero-extended, we can either just use the object being
767 extended or make a narrower extension. If we want an even smaller
768 piece than the size of the object being extended, call ourselves
771 This case is used mostly by combine and cse. */
773 if (GET_MODE (XEXP (x, 0)) == mode)
775 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
776 return gen_lowpart_common (mode, XEXP (x, 0));
777 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
778 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
780 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
781 || GET_CODE (x) == CONCAT)
782 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
783 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
784 from the low-order part of the constant. */
785 else if ((GET_MODE_CLASS (mode) == MODE_INT
786 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
787 && GET_MODE (x) == VOIDmode
788 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
790 /* If MODE is twice the host word size, X is already the desired
791 representation. Otherwise, if MODE is wider than a word, we can't
792 do this. If MODE is exactly a word, return just one CONST_INT. */
794 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
796 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
798 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
799 return (GET_CODE (x) == CONST_INT ? x
800 : GEN_INT (CONST_DOUBLE_LOW (x)));
803 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
804 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
805 : CONST_DOUBLE_LOW (x));
807 /* Sign extend to HOST_WIDE_INT. */
808 val = trunc_int_for_mode (val, mode);
810 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
815 #ifndef REAL_ARITHMETIC
816 /* If X is an integral constant but we want it in floating-point, it
817 must be the case that we have a union of an integer and a floating-point
818 value. If the machine-parameters allow it, simulate that union here
819 and return the result. The two-word and single-word cases are
822 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
823 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
824 || flag_pretend_float)
825 && GET_MODE_CLASS (mode) == MODE_FLOAT
826 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
827 && GET_CODE (x) == CONST_INT
828 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
830 union {HOST_WIDE_INT i; float d; } u;
833 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
835 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
836 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
837 || flag_pretend_float)
838 && GET_MODE_CLASS (mode) == MODE_FLOAT
839 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
840 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
841 && GET_MODE (x) == VOIDmode
842 && (sizeof (double) * HOST_BITS_PER_CHAR
843 == 2 * HOST_BITS_PER_WIDE_INT))
845 union {HOST_WIDE_INT i[2]; double d; } u;
846 HOST_WIDE_INT low, high;
848 if (GET_CODE (x) == CONST_INT)
849 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
851 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
853 #ifdef HOST_WORDS_BIG_ENDIAN
854 u.i[0] = high, u.i[1] = low;
856 u.i[0] = low, u.i[1] = high;
859 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
862 /* Similarly, if this is converting a floating-point value into a
863 single-word integer. Only do this is the host and target parameters are
866 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
867 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
868 || flag_pretend_float)
869 && (GET_MODE_CLASS (mode) == MODE_INT
870 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
871 && GET_CODE (x) == CONST_DOUBLE
872 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
873 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
874 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
876 /* Similarly, if this is converting a floating-point value into a
877 two-word integer, we can do this one word at a time and make an
878 integer. Only do this is the host and target parameters are
881 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
882 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
883 || flag_pretend_float)
884 && (GET_MODE_CLASS (mode) == MODE_INT
885 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
886 && GET_CODE (x) == CONST_DOUBLE
887 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
888 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
890 rtx lowpart, highpart;
892 lowpart = constant_subword (x,
893 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
895 highpart = constant_subword (x,
896 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
898 if (lowpart && GET_CODE (lowpart) == CONST_INT
899 && highpart && GET_CODE (highpart) == CONST_INT)
900 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
902 #else /* ifndef REAL_ARITHMETIC */
904 /* When we have a FP emulator, we can handle all conversions between
905 FP and integer operands. This simplifies reload because it
906 doesn't have to deal with constructs like (subreg:DI
907 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
908 /* Single-precision floats are always 32-bits and double-precision
909 floats are always 64-bits. */
911 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
912 && GET_MODE_BITSIZE (mode) == 32
913 && GET_CODE (x) == CONST_INT)
919 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
920 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
922 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
923 && GET_MODE_BITSIZE (mode) == 64
924 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
925 && GET_MODE (x) == VOIDmode)
929 HOST_WIDE_INT low, high;
931 if (GET_CODE (x) == CONST_INT)
934 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
938 low = CONST_DOUBLE_LOW (x);
939 high = CONST_DOUBLE_HIGH (x);
942 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
944 if (WORDS_BIG_ENDIAN)
945 i[0] = high, i[1] = low;
947 i[0] = low, i[1] = high;
949 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
950 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
952 else if ((GET_MODE_CLASS (mode) == MODE_INT
953 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
954 && GET_CODE (x) == CONST_DOUBLE
955 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
958 long i[4]; /* Only the low 32 bits of each 'long' are used. */
959 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
961 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
962 switch (GET_MODE_BITSIZE (GET_MODE (x)))
965 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
969 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
972 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
976 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
982 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
984 #if HOST_BITS_PER_WIDE_INT == 32
985 return immed_double_const (i[endian], i[1 - endian], mode);
990 if (HOST_BITS_PER_WIDE_INT != 64)
993 for (c = 0; c < 4; c++)
996 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1000 return immed_double_const (((unsigned long) i[endian]) |
1001 (((HOST_WIDE_INT) i[1-endian]) << 32),
1005 return immed_double_const (((unsigned long) i[endian*3]) |
1006 (((HOST_WIDE_INT) i[1+endian]) << 32),
1007 ((unsigned long) i[2-endian]) |
1008 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1016 #endif /* ifndef REAL_ARITHMETIC */
1018 /* Otherwise, we can't do this. */
1022 /* Return the real part (which has mode MODE) of a complex value X.
1023 This always comes at the low address in memory. */
1026 gen_realpart (mode, x)
1027 enum machine_mode mode;
1030 if (WORDS_BIG_ENDIAN
1031 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1033 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1035 ("Can't access real part of complex value in hard register");
1036 else if (WORDS_BIG_ENDIAN)
1037 return gen_highpart (mode, x);
1039 return gen_lowpart (mode, x);
1042 /* Return the imaginary part (which has mode MODE) of a complex value X.
1043 This always comes at the high address in memory. */
1046 gen_imagpart (mode, x)
1047 enum machine_mode mode;
1050 if (WORDS_BIG_ENDIAN)
1051 return gen_lowpart (mode, x);
1052 else if (! WORDS_BIG_ENDIAN
1053 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1055 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1057 ("can't access imaginary part of complex value in hard register");
1059 return gen_highpart (mode, x);
1062 /* Return 1 iff X, assumed to be a SUBREG,
1063 refers to the real part of the complex value in its containing reg.
1064 Complex values are always stored with the real part in the first word,
1065 regardless of WORDS_BIG_ENDIAN. */
1068 subreg_realpart_p (x)
1071 if (GET_CODE (x) != SUBREG)
1074 return ((unsigned int) SUBREG_BYTE (x)
1075 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1078 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1079 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1080 least-significant part of X.
1081 MODE specifies how big a part of X to return;
1082 it usually should not be larger than a word.
1083 If X is a MEM whose address is a QUEUED, the value may be so also. */
1086 gen_lowpart (mode, x)
1087 enum machine_mode mode;
1090 rtx result = gen_lowpart_common (mode, x);
1094 else if (GET_CODE (x) == REG)
1096 /* Must be a hard reg that's not valid in MODE. */
1097 result = gen_lowpart_common (mode, copy_to_reg (x));
1102 else if (GET_CODE (x) == MEM)
1104 /* The only additional case we can do is MEM. */
1105 register int offset = 0;
1106 if (WORDS_BIG_ENDIAN)
1107 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1108 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1110 if (BYTES_BIG_ENDIAN)
1111 /* Adjust the address so that the address-after-the-data
1113 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1114 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1116 return adjust_address (x, mode, offset);
1118 else if (GET_CODE (x) == ADDRESSOF)
1119 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1124 /* Like `gen_lowpart', but refer to the most significant part.
1125 This is used to access the imaginary part of a complex number. */
1128 gen_highpart (mode, x)
1129 enum machine_mode mode;
1132 unsigned int msize = GET_MODE_SIZE (mode);
1135 /* This case loses if X is a subreg. To catch bugs early,
1136 complain if an invalid MODE is used even in other cases. */
1137 if (msize > UNITS_PER_WORD
1138 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1141 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1142 subreg_highpart_offset (mode, GET_MODE (x)));
1144 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1145 the target if we have a MEM. gen_highpart must return a valid operand,
1146 emitting code if necessary to do so. */
1147 if (GET_CODE (result) == MEM)
1148 result = validize_mem (result);
1155 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1156 be VOIDmode constant. */
1158 gen_highpart_mode (outermode, innermode, exp)
1159 enum machine_mode outermode, innermode;
1162 if (GET_MODE (exp) != VOIDmode)
1164 if (GET_MODE (exp) != innermode)
1166 return gen_highpart (outermode, exp);
1168 return simplify_gen_subreg (outermode, exp, innermode,
1169 subreg_highpart_offset (outermode, innermode));
1171 /* Return offset in bytes to get OUTERMODE low part
1172 of the value in mode INNERMODE stored in memory in target format. */
1175 subreg_lowpart_offset (outermode, innermode)
1176 enum machine_mode outermode, innermode;
1178 unsigned int offset = 0;
1179 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1183 if (WORDS_BIG_ENDIAN)
1184 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1185 if (BYTES_BIG_ENDIAN)
1186 offset += difference % UNITS_PER_WORD;
1192 /* Return offset in bytes to get OUTERMODE high part
1193 of the value in mode INNERMODE stored in memory in target format. */
1195 subreg_highpart_offset (outermode, innermode)
1196 enum machine_mode outermode, innermode;
1198 unsigned int offset = 0;
1199 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1201 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1206 if (! WORDS_BIG_ENDIAN)
1207 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1208 if (! BYTES_BIG_ENDIAN)
1209 offset += difference % UNITS_PER_WORD;
1215 /* Return 1 iff X, assumed to be a SUBREG,
1216 refers to the least significant part of its containing reg.
1217 If X is not a SUBREG, always return 1 (it is its own low part!). */
1220 subreg_lowpart_p (x)
1223 if (GET_CODE (x) != SUBREG)
1225 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1228 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1229 == SUBREG_BYTE (x));
1233 /* Helper routine for all the constant cases of operand_subword.
1234 Some places invoke this directly. */
1237 constant_subword (op, offset, mode)
1240 enum machine_mode mode;
1242 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1245 /* If OP is already an integer word, return it. */
1246 if (GET_MODE_CLASS (mode) == MODE_INT
1247 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1250 #ifdef REAL_ARITHMETIC
1251 /* The output is some bits, the width of the target machine's word.
1252 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1254 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1255 && GET_MODE_CLASS (mode) == MODE_FLOAT
1256 && GET_MODE_BITSIZE (mode) == 64
1257 && GET_CODE (op) == CONST_DOUBLE)
1262 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1263 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1265 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1266 which the words are written depends on the word endianness.
1267 ??? This is a potential portability problem and should
1268 be fixed at some point.
1270 We must excercise caution with the sign bit. By definition there
1271 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1272 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1273 So we explicitly mask and sign-extend as necessary. */
1274 if (BITS_PER_WORD == 32)
1277 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1278 return GEN_INT (val);
1280 #if HOST_BITS_PER_WIDE_INT >= 64
1281 else if (BITS_PER_WORD >= 64 && offset == 0)
1283 val = k[! WORDS_BIG_ENDIAN];
1284 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1285 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1286 return GEN_INT (val);
1289 else if (BITS_PER_WORD == 16)
1291 val = k[offset >> 1];
1292 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1294 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1295 return GEN_INT (val);
1300 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1301 && GET_MODE_CLASS (mode) == MODE_FLOAT
1302 && GET_MODE_BITSIZE (mode) > 64
1303 && GET_CODE (op) == CONST_DOUBLE)
1308 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1309 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1311 if (BITS_PER_WORD == 32)
1314 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1315 return GEN_INT (val);
1317 #if HOST_BITS_PER_WIDE_INT >= 64
1318 else if (BITS_PER_WORD >= 64 && offset <= 1)
1320 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1321 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1322 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1323 return GEN_INT (val);
1329 #else /* no REAL_ARITHMETIC */
1330 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1331 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1332 || flag_pretend_float)
1333 && GET_MODE_CLASS (mode) == MODE_FLOAT
1334 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1335 && GET_CODE (op) == CONST_DOUBLE)
1337 /* The constant is stored in the host's word-ordering,
1338 but we want to access it in the target's word-ordering. Some
1339 compilers don't like a conditional inside macro args, so we have two
1340 copies of the return. */
1341 #ifdef HOST_WORDS_BIG_ENDIAN
1342 return GEN_INT (offset == WORDS_BIG_ENDIAN
1343 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1345 return GEN_INT (offset != WORDS_BIG_ENDIAN
1346 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1349 #endif /* no REAL_ARITHMETIC */
1351 /* Single word float is a little harder, since single- and double-word
1352 values often do not have the same high-order bits. We have already
1353 verified that we want the only defined word of the single-word value. */
1354 #ifdef REAL_ARITHMETIC
1355 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1356 && GET_MODE_BITSIZE (mode) == 32
1357 && GET_CODE (op) == CONST_DOUBLE)
1362 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1363 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1365 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1367 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1369 if (BITS_PER_WORD == 16)
1371 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1373 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1376 return GEN_INT (val);
1379 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1380 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1381 || flag_pretend_float)
1382 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1383 && GET_MODE_CLASS (mode) == MODE_FLOAT
1384 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1385 && GET_CODE (op) == CONST_DOUBLE)
1388 union {float f; HOST_WIDE_INT i; } u;
1390 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1393 return GEN_INT (u.i);
1395 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1396 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1397 || flag_pretend_float)
1398 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1399 && GET_MODE_CLASS (mode) == MODE_FLOAT
1400 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1401 && GET_CODE (op) == CONST_DOUBLE)
1404 union {double d; HOST_WIDE_INT i; } u;
1406 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1409 return GEN_INT (u.i);
1411 #endif /* no REAL_ARITHMETIC */
1413 /* The only remaining cases that we can handle are integers.
1414 Convert to proper endianness now since these cases need it.
1415 At this point, offset == 0 means the low-order word.
1417 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1418 in general. However, if OP is (const_int 0), we can just return
1421 if (op == const0_rtx)
1424 if (GET_MODE_CLASS (mode) != MODE_INT
1425 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1426 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1429 if (WORDS_BIG_ENDIAN)
1430 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1432 /* Find out which word on the host machine this value is in and get
1433 it from the constant. */
1434 val = (offset / size_ratio == 0
1435 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1436 : (GET_CODE (op) == CONST_INT
1437 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1439 /* Get the value we want into the low bits of val. */
1440 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1441 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1443 val = trunc_int_for_mode (val, word_mode);
1445 return GEN_INT (val);
1448 /* Return subword OFFSET of operand OP.
1449 The word number, OFFSET, is interpreted as the word number starting
1450 at the low-order address. OFFSET 0 is the low-order word if not
1451 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1453 If we cannot extract the required word, we return zero. Otherwise,
1454 an rtx corresponding to the requested word will be returned.
1456 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1457 reload has completed, a valid address will always be returned. After
1458 reload, if a valid address cannot be returned, we return zero.
1460 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1461 it is the responsibility of the caller.
1463 MODE is the mode of OP in case it is a CONST_INT.
1465 ??? This is still rather broken for some cases. The problem for the
1466 moment is that all callers of this thing provide no 'goal mode' to
1467 tell us to work with. This exists because all callers were written
1468 in a word based SUBREG world.
1469 Now use of this function can be deprecated by simplify_subreg in most
1474 operand_subword (op, offset, validate_address, mode)
1476 unsigned int offset;
1477 int validate_address;
1478 enum machine_mode mode;
1480 if (mode == VOIDmode)
1481 mode = GET_MODE (op);
1483 if (mode == VOIDmode)
1486 /* If OP is narrower than a word, fail. */
1488 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1491 /* If we want a word outside OP, return zero. */
1493 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1496 /* Form a new MEM at the requested address. */
1497 if (GET_CODE (op) == MEM)
1499 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1501 if (! validate_address)
1504 else if (reload_completed)
1506 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1510 return replace_equiv_address (new, XEXP (new, 0));
1513 /* Rest can be handled by simplify_subreg. */
1514 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1517 /* Similar to `operand_subword', but never return 0. If we can't extract
1518 the required subword, put OP into a register and try again. If that fails,
1519 abort. We always validate the address in this case.
1521 MODE is the mode of OP, in case it is CONST_INT. */
1524 operand_subword_force (op, offset, mode)
1526 unsigned int offset;
1527 enum machine_mode mode;
1529 rtx result = operand_subword (op, offset, 1, mode);
1534 if (mode != BLKmode && mode != VOIDmode)
1536 /* If this is a register which can not be accessed by words, copy it
1537 to a pseudo register. */
1538 if (GET_CODE (op) == REG)
1539 op = copy_to_reg (op);
1541 op = force_reg (mode, op);
1544 result = operand_subword (op, offset, 1, mode);
1551 /* Given a compare instruction, swap the operands.
1552 A test instruction is changed into a compare of 0 against the operand. */
1555 reverse_comparison (insn)
1558 rtx body = PATTERN (insn);
1561 if (GET_CODE (body) == SET)
1562 comp = SET_SRC (body);
1564 comp = SET_SRC (XVECEXP (body, 0, 0));
1566 if (GET_CODE (comp) == COMPARE)
1568 rtx op0 = XEXP (comp, 0);
1569 rtx op1 = XEXP (comp, 1);
1570 XEXP (comp, 0) = op1;
1571 XEXP (comp, 1) = op0;
1575 rtx new = gen_rtx_COMPARE (VOIDmode,
1576 CONST0_RTX (GET_MODE (comp)), comp);
1577 if (GET_CODE (body) == SET)
1578 SET_SRC (body) = new;
1580 SET_SRC (XVECEXP (body, 0, 0)) = new;
1584 /* Return a memory reference like MEMREF, but with its mode changed
1585 to MODE and its address changed to ADDR.
1586 (VOIDmode means don't change the mode.
1587 NULL for ADDR means don't change the address.)
1588 VALIDATE is nonzero if the returned memory location is required to be
1592 change_address_1 (memref, mode, addr, validate)
1594 enum machine_mode mode;
1600 if (GET_CODE (memref) != MEM)
1602 if (mode == VOIDmode)
1603 mode = GET_MODE (memref);
1605 addr = XEXP (memref, 0);
1609 if (reload_in_progress || reload_completed)
1611 if (! memory_address_p (mode, addr))
1615 addr = memory_address (mode, addr);
1618 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1621 new = gen_rtx_MEM (mode, addr);
1622 MEM_COPY_ATTRIBUTES (new, memref);
1626 /* Return a memory reference like MEMREF, but with its mode changed
1627 to MODE and its address offset by OFFSET bytes. */
1630 adjust_address (memref, mode, offset)
1632 enum machine_mode mode;
1633 HOST_WIDE_INT offset;
1635 /* For now, this is just a wrapper for change_address, but eventually
1636 will do memref tracking. */
1637 rtx addr = XEXP (memref, 0);
1639 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1640 object, we can merge it into the LO_SUM. */
1641 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1643 && offset < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1644 addr = gen_rtx_LO_SUM (mode, XEXP (addr, 0),
1645 plus_constant (XEXP (addr, 1), offset));
1647 addr = plus_constant (addr, offset);
1649 return change_address (memref, mode, addr);
1652 /* Likewise, but the reference is not required to be valid. */
1655 adjust_address_nv (memref, mode, offset)
1657 enum machine_mode mode;
1658 HOST_WIDE_INT offset;
1660 /* For now, this is just a wrapper for change_address, but eventually
1661 will do memref tracking. */
1662 rtx addr = XEXP (memref, 0);
1664 /* If MEMREF is a LO_SUM and the offset is within the size of the
1665 object, we can merge it into the LO_SUM. */
1666 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1668 && offset < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1669 addr = gen_rtx_LO_SUM (mode, XEXP (addr, 0),
1670 plus_constant (XEXP (addr, 1), offset));
1672 addr = plus_constant (addr, offset);
1674 return change_address_1 (memref, mode, addr, 0);
1677 /* Return a memory reference like MEMREF, but with its address changed to
1678 ADDR. The caller is asserting that the actual piece of memory pointed
1679 to is the same, just the form of the address is being changed, such as
1680 by putting something into a register. */
1683 replace_equiv_address (memref, addr)
1687 /* For now, this is just a wrapper for change_address, but eventually
1688 will do memref tracking. */
1689 return change_address (memref, VOIDmode, addr);
1691 /* Likewise, but the reference is not required to be valid. */
1694 replace_equiv_address_nv (memref, addr)
1698 /* For now, this is just a wrapper for change_address, but eventually
1699 will do memref tracking. */
1700 return change_address_1 (memref, VOIDmode, addr, 0);
1703 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1710 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1711 NULL_RTX, label_num++, NULL, NULL);
1713 LABEL_NUSES (label) = 0;
1714 LABEL_ALTERNATE_NAME (label) = NULL;
1718 /* For procedure integration. */
1720 /* Install new pointers to the first and last insns in the chain.
1721 Also, set cur_insn_uid to one higher than the last in use.
1722 Used for an inline-procedure after copying the insn chain. */
1725 set_new_first_and_last_insn (first, last)
1734 for (insn = first; insn; insn = NEXT_INSN (insn))
1735 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1740 /* Set the range of label numbers found in the current function.
1741 This is used when belatedly compiling an inline function. */
1744 set_new_first_and_last_label_num (first, last)
1747 base_label_num = label_num;
1748 first_label_num = first;
1749 last_label_num = last;
1752 /* Set the last label number found in the current function.
1753 This is used when belatedly compiling an inline function. */
1756 set_new_last_label_num (last)
1759 base_label_num = label_num;
1760 last_label_num = last;
1763 /* Restore all variables describing the current status from the structure *P.
1764 This is used after a nested function. */
1767 restore_emit_status (p)
1768 struct function *p ATTRIBUTE_UNUSED;
1771 clear_emit_caches ();
1774 /* Clear out all parts of the state in F that can safely be discarded
1775 after the function has been compiled, to let garbage collection
1776 reclaim the memory. */
1779 free_emit_status (f)
1782 free (f->emit->x_regno_reg_rtx);
1783 free (f->emit->regno_pointer_align);
1788 /* Go through all the RTL insn bodies and copy any invalid shared
1789 structure. This routine should only be called once. */
1792 unshare_all_rtl (fndecl, insn)
1798 /* Make sure that virtual parameters are not shared. */
1799 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1800 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
1802 /* Make sure that virtual stack slots are not shared. */
1803 unshare_all_decls (DECL_INITIAL (fndecl));
1805 /* Unshare just about everything else. */
1806 unshare_all_rtl_1 (insn);
1808 /* Make sure the addresses of stack slots found outside the insn chain
1809 (such as, in DECL_RTL of a variable) are not shared
1810 with the insn chain.
1812 This special care is necessary when the stack slot MEM does not
1813 actually appear in the insn chain. If it does appear, its address
1814 is unshared from all else at that point. */
1815 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1818 /* Go through all the RTL insn bodies and copy any invalid shared
1819 structure, again. This is a fairly expensive thing to do so it
1820 should be done sparingly. */
1823 unshare_all_rtl_again (insn)
1829 for (p = insn; p; p = NEXT_INSN (p))
1832 reset_used_flags (PATTERN (p));
1833 reset_used_flags (REG_NOTES (p));
1834 reset_used_flags (LOG_LINKS (p));
1837 /* Make sure that virtual stack slots are not shared. */
1838 reset_used_decls (DECL_INITIAL (cfun->decl));
1840 /* Make sure that virtual parameters are not shared. */
1841 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1842 reset_used_flags (DECL_RTL (decl));
1844 reset_used_flags (stack_slot_list);
1846 unshare_all_rtl (cfun->decl, insn);
1849 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1850 Assumes the mark bits are cleared at entry. */
1853 unshare_all_rtl_1 (insn)
1856 for (; insn; insn = NEXT_INSN (insn))
1859 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1860 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1861 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1865 /* Go through all virtual stack slots of a function and copy any
1866 shared structure. */
1868 unshare_all_decls (blk)
1873 /* Copy shared decls. */
1874 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1875 if (DECL_RTL_SET_P (t))
1876 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
1878 /* Now process sub-blocks. */
1879 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1880 unshare_all_decls (t);
1883 /* Go through all virtual stack slots of a function and mark them as
1886 reset_used_decls (blk)
1892 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1893 if (DECL_RTL_SET_P (t))
1894 reset_used_flags (DECL_RTL (t));
1896 /* Now process sub-blocks. */
1897 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1898 reset_used_decls (t);
1901 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1902 Recursively does the same for subexpressions. */
1905 copy_rtx_if_shared (orig)
1908 register rtx x = orig;
1910 register enum rtx_code code;
1911 register const char *format_ptr;
1917 code = GET_CODE (x);
1919 /* These types may be freely shared. */
1932 /* SCRATCH must be shared because they represent distinct values. */
1936 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1937 a LABEL_REF, it isn't sharable. */
1938 if (GET_CODE (XEXP (x, 0)) == PLUS
1939 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1940 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1949 /* The chain of insns is not being copied. */
1953 /* A MEM is allowed to be shared if its address is constant.
1955 We used to allow sharing of MEMs which referenced
1956 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1957 that can lose. instantiate_virtual_regs will not unshare
1958 the MEMs, and combine may change the structure of the address
1959 because it looks safe and profitable in one context, but
1960 in some other context it creates unrecognizable RTL. */
1961 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1970 /* This rtx may not be shared. If it has already been seen,
1971 replace it with a copy of itself. */
1977 copy = rtx_alloc (code);
1979 (sizeof (*copy) - sizeof (copy->fld)
1980 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1986 /* Now scan the subexpressions recursively.
1987 We can store any replaced subexpressions directly into X
1988 since we know X is not shared! Any vectors in X
1989 must be copied if X was copied. */
1991 format_ptr = GET_RTX_FORMAT (code);
1993 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1995 switch (*format_ptr++)
1998 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2002 if (XVEC (x, i) != NULL)
2005 int len = XVECLEN (x, i);
2007 if (copied && len > 0)
2008 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2009 for (j = 0; j < len; j++)
2010 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2018 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2019 to look for shared sub-parts. */
2022 reset_used_flags (x)
2026 register enum rtx_code code;
2027 register const char *format_ptr;
2032 code = GET_CODE (x);
2034 /* These types may be freely shared so we needn't do any resetting
2055 /* The chain of insns is not being copied. */
2064 format_ptr = GET_RTX_FORMAT (code);
2065 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2067 switch (*format_ptr++)
2070 reset_used_flags (XEXP (x, i));
2074 for (j = 0; j < XVECLEN (x, i); j++)
2075 reset_used_flags (XVECEXP (x, i, j));
2081 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2082 Return X or the rtx for the pseudo reg the value of X was copied into.
2083 OTHER must be valid as a SET_DEST. */
2086 make_safe_from (x, other)
2090 switch (GET_CODE (other))
2093 other = SUBREG_REG (other);
2095 case STRICT_LOW_PART:
2098 other = XEXP (other, 0);
2104 if ((GET_CODE (other) == MEM
2106 && GET_CODE (x) != REG
2107 && GET_CODE (x) != SUBREG)
2108 || (GET_CODE (other) == REG
2109 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2110 || reg_mentioned_p (other, x))))
2112 rtx temp = gen_reg_rtx (GET_MODE (x));
2113 emit_move_insn (temp, x);
2119 /* Emission of insns (adding them to the doubly-linked list). */
2121 /* Return the first insn of the current sequence or current function. */
2129 /* Return the last insn emitted in current sequence or current function. */
2137 /* Specify a new insn as the last in the chain. */
2140 set_last_insn (insn)
2143 if (NEXT_INSN (insn) != 0)
2148 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2151 get_last_insn_anywhere ()
2153 struct sequence_stack *stack;
2156 for (stack = seq_stack; stack; stack = stack->next)
2157 if (stack->last != 0)
2162 /* Return a number larger than any instruction's uid in this function. */
2167 return cur_insn_uid;
2170 /* Renumber instructions so that no instruction UIDs are wasted. */
2173 renumber_insns (stream)
2178 /* If we're not supposed to renumber instructions, don't. */
2179 if (!flag_renumber_insns)
2182 /* If there aren't that many instructions, then it's not really
2183 worth renumbering them. */
2184 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2189 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2192 fprintf (stream, "Renumbering insn %d to %d\n",
2193 INSN_UID (insn), cur_insn_uid);
2194 INSN_UID (insn) = cur_insn_uid++;
2198 /* Return the next insn. If it is a SEQUENCE, return the first insn
2207 insn = NEXT_INSN (insn);
2208 if (insn && GET_CODE (insn) == INSN
2209 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2210 insn = XVECEXP (PATTERN (insn), 0, 0);
2216 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2220 previous_insn (insn)
2225 insn = PREV_INSN (insn);
2226 if (insn && GET_CODE (insn) == INSN
2227 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2228 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2234 /* Return the next insn after INSN that is not a NOTE. This routine does not
2235 look inside SEQUENCEs. */
2238 next_nonnote_insn (insn)
2243 insn = NEXT_INSN (insn);
2244 if (insn == 0 || GET_CODE (insn) != NOTE)
2251 /* Return the previous insn before INSN that is not a NOTE. This routine does
2252 not look inside SEQUENCEs. */
2255 prev_nonnote_insn (insn)
2260 insn = PREV_INSN (insn);
2261 if (insn == 0 || GET_CODE (insn) != NOTE)
2268 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2269 or 0, if there is none. This routine does not look inside
2273 next_real_insn (insn)
2278 insn = NEXT_INSN (insn);
2279 if (insn == 0 || GET_CODE (insn) == INSN
2280 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2287 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2288 or 0, if there is none. This routine does not look inside
2292 prev_real_insn (insn)
2297 insn = PREV_INSN (insn);
2298 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2299 || GET_CODE (insn) == JUMP_INSN)
2306 /* Find the next insn after INSN that really does something. This routine
2307 does not look inside SEQUENCEs. Until reload has completed, this is the
2308 same as next_real_insn. */
2311 active_insn_p (insn)
2314 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2315 || (GET_CODE (insn) == INSN
2316 && (! reload_completed
2317 || (GET_CODE (PATTERN (insn)) != USE
2318 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2322 next_active_insn (insn)
2327 insn = NEXT_INSN (insn);
2328 if (insn == 0 || active_insn_p (insn))
2335 /* Find the last insn before INSN that really does something. This routine
2336 does not look inside SEQUENCEs. Until reload has completed, this is the
2337 same as prev_real_insn. */
2340 prev_active_insn (insn)
2345 insn = PREV_INSN (insn);
2346 if (insn == 0 || active_insn_p (insn))
2353 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2361 insn = NEXT_INSN (insn);
2362 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2369 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2377 insn = PREV_INSN (insn);
2378 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2386 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2387 and REG_CC_USER notes so we can find it. */
2390 link_cc0_insns (insn)
2393 rtx user = next_nonnote_insn (insn);
2395 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2396 user = XVECEXP (PATTERN (user), 0, 0);
2398 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2400 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2403 /* Return the next insn that uses CC0 after INSN, which is assumed to
2404 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2405 applied to the result of this function should yield INSN).
2407 Normally, this is simply the next insn. However, if a REG_CC_USER note
2408 is present, it contains the insn that uses CC0.
2410 Return 0 if we can't find the insn. */
2413 next_cc0_user (insn)
2416 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2419 return XEXP (note, 0);
2421 insn = next_nonnote_insn (insn);
2422 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2423 insn = XVECEXP (PATTERN (insn), 0, 0);
2425 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2431 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2432 note, it is the previous insn. */
2435 prev_cc0_setter (insn)
2438 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2441 return XEXP (note, 0);
2443 insn = prev_nonnote_insn (insn);
2444 if (! sets_cc0_p (PATTERN (insn)))
2451 /* Increment the label uses for all labels present in rtx. */
2457 register enum rtx_code code;
2459 register const char *fmt;
2461 code = GET_CODE (x);
2462 if (code == LABEL_REF)
2463 LABEL_NUSES (XEXP (x, 0))++;
2465 fmt = GET_RTX_FORMAT (code);
2466 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2469 mark_label_nuses (XEXP (x, i));
2470 else if (fmt[i] == 'E')
2471 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2472 mark_label_nuses (XVECEXP (x, i, j));
2477 /* Try splitting insns that can be split for better scheduling.
2478 PAT is the pattern which might split.
2479 TRIAL is the insn providing PAT.
2480 LAST is non-zero if we should return the last insn of the sequence produced.
2482 If this routine succeeds in splitting, it returns the first or last
2483 replacement insn depending on the value of LAST. Otherwise, it
2484 returns TRIAL. If the insn to be returned can be split, it will be. */
2487 try_split (pat, trial, last)
2491 rtx before = PREV_INSN (trial);
2492 rtx after = NEXT_INSN (trial);
2493 int has_barrier = 0;
2498 if (any_condjump_p (trial)
2499 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2500 split_branch_probability = INTVAL (XEXP (note, 0));
2501 probability = split_branch_probability;
2503 seq = split_insns (pat, trial);
2505 split_branch_probability = -1;
2507 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2508 We may need to handle this specially. */
2509 if (after && GET_CODE (after) == BARRIER)
2512 after = NEXT_INSN (after);
2517 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2518 The latter case will normally arise only when being done so that
2519 it, in turn, will be split (SFmode on the 29k is an example). */
2520 if (GET_CODE (seq) == SEQUENCE)
2525 /* Avoid infinite loop if any insn of the result matches
2526 the original pattern. */
2527 for (i = 0; i < XVECLEN (seq, 0); i++)
2528 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2529 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2533 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2534 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2536 rtx insn = XVECEXP (seq, 0, i);
2537 mark_jump_label (PATTERN (insn),
2538 XVECEXP (seq, 0, i), 0);
2540 if (probability != -1
2541 && any_condjump_p (insn)
2542 && !find_reg_note (insn, REG_BR_PROB, 0))
2544 /* We can preserve the REG_BR_PROB notes only if exactly
2545 one jump is created, otherwise the machinde description
2546 is responsible for this step using
2547 split_branch_probability variable. */
2551 = gen_rtx_EXPR_LIST (REG_BR_PROB,
2552 GEN_INT (probability),
2556 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2557 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2558 if (GET_CODE (trial) == CALL_INSN)
2559 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2560 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2561 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2562 = CALL_INSN_FUNCTION_USAGE (trial);
2564 /* Copy EH notes. */
2565 if ((eh_note = find_reg_note (trial, REG_EH_REGION, NULL_RTX)))
2566 for (i = 0; i < XVECLEN (seq, 0); i++)
2568 rtx insn = XVECEXP (seq, 0, i);
2569 if (GET_CODE (insn) == CALL_INSN
2570 || (flag_non_call_exceptions
2571 && may_trap_p (PATTERN (insn))))
2573 = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (eh_note, 0),
2577 /* If there are LABELS inside the split insns increment the
2578 usage count so we don't delete the label. */
2579 if (GET_CODE (trial) == INSN)
2580 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2581 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2582 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2584 tem = emit_insn_after (seq, before);
2586 delete_insn (trial);
2588 emit_barrier_after (tem);
2590 /* Recursively call try_split for each new insn created; by the
2591 time control returns here that insn will be fully split, so
2592 set LAST and continue from the insn after the one returned.
2593 We can't use next_active_insn here since AFTER may be a note.
2594 Ignore deleted insns, which can be occur if not optimizing. */
2595 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2596 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2597 tem = try_split (PATTERN (tem), tem, 1);
2599 /* Avoid infinite loop if the result matches the original pattern. */
2600 else if (rtx_equal_p (seq, pat))
2604 PATTERN (trial) = seq;
2605 INSN_CODE (trial) = -1;
2606 try_split (seq, trial, last);
2609 /* Return either the first or the last insn, depending on which was
2612 ? (after ? PREV_INSN (after) : last_insn)
2613 : NEXT_INSN (before);
2619 /* Make and return an INSN rtx, initializing all its slots.
2620 Store PATTERN in the pattern slots. */
2623 make_insn_raw (pattern)
2628 insn = rtx_alloc (INSN);
2630 INSN_UID (insn) = cur_insn_uid++;
2631 PATTERN (insn) = pattern;
2632 INSN_CODE (insn) = -1;
2633 LOG_LINKS (insn) = NULL;
2634 REG_NOTES (insn) = NULL;
2636 #ifdef ENABLE_RTL_CHECKING
2639 && (returnjump_p (insn)
2640 || (GET_CODE (insn) == SET
2641 && SET_DEST (insn) == pc_rtx)))
2643 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2651 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2654 make_jump_insn_raw (pattern)
2659 insn = rtx_alloc (JUMP_INSN);
2660 INSN_UID (insn) = cur_insn_uid++;
2662 PATTERN (insn) = pattern;
2663 INSN_CODE (insn) = -1;
2664 LOG_LINKS (insn) = NULL;
2665 REG_NOTES (insn) = NULL;
2666 JUMP_LABEL (insn) = NULL;
2671 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2674 make_call_insn_raw (pattern)
2679 insn = rtx_alloc (CALL_INSN);
2680 INSN_UID (insn) = cur_insn_uid++;
2682 PATTERN (insn) = pattern;
2683 INSN_CODE (insn) = -1;
2684 LOG_LINKS (insn) = NULL;
2685 REG_NOTES (insn) = NULL;
2686 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2691 /* Add INSN to the end of the doubly-linked list.
2692 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2698 PREV_INSN (insn) = last_insn;
2699 NEXT_INSN (insn) = 0;
2701 if (NULL != last_insn)
2702 NEXT_INSN (last_insn) = insn;
2704 if (NULL == first_insn)
2710 /* Add INSN into the doubly-linked list after insn AFTER. This and
2711 the next should be the only functions called to insert an insn once
2712 delay slots have been filled since only they know how to update a
2716 add_insn_after (insn, after)
2719 rtx next = NEXT_INSN (after);
2721 if (optimize && INSN_DELETED_P (after))
2724 NEXT_INSN (insn) = next;
2725 PREV_INSN (insn) = after;
2729 PREV_INSN (next) = insn;
2730 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2731 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2733 else if (last_insn == after)
2737 struct sequence_stack *stack = seq_stack;
2738 /* Scan all pending sequences too. */
2739 for (; stack; stack = stack->next)
2740 if (after == stack->last)
2750 NEXT_INSN (after) = insn;
2751 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2753 rtx sequence = PATTERN (after);
2754 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2758 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2759 the previous should be the only functions called to insert an insn once
2760 delay slots have been filled since only they know how to update a
2764 add_insn_before (insn, before)
2767 rtx prev = PREV_INSN (before);
2769 if (optimize && INSN_DELETED_P (before))
2772 PREV_INSN (insn) = prev;
2773 NEXT_INSN (insn) = before;
2777 NEXT_INSN (prev) = insn;
2778 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2780 rtx sequence = PATTERN (prev);
2781 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2784 else if (first_insn == before)
2788 struct sequence_stack *stack = seq_stack;
2789 /* Scan all pending sequences too. */
2790 for (; stack; stack = stack->next)
2791 if (before == stack->first)
2793 stack->first = insn;
2801 PREV_INSN (before) = insn;
2802 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2803 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2806 /* Remove an insn from its doubly-linked list. This function knows how
2807 to handle sequences. */
2812 rtx next = NEXT_INSN (insn);
2813 rtx prev = PREV_INSN (insn);
2816 NEXT_INSN (prev) = next;
2817 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2819 rtx sequence = PATTERN (prev);
2820 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2823 else if (first_insn == insn)
2827 struct sequence_stack *stack = seq_stack;
2828 /* Scan all pending sequences too. */
2829 for (; stack; stack = stack->next)
2830 if (insn == stack->first)
2832 stack->first = next;
2842 PREV_INSN (next) = prev;
2843 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2844 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2846 else if (last_insn == insn)
2850 struct sequence_stack *stack = seq_stack;
2851 /* Scan all pending sequences too. */
2852 for (; stack; stack = stack->next)
2853 if (insn == stack->last)
2864 /* Delete all insns made since FROM.
2865 FROM becomes the new last instruction. */
2868 delete_insns_since (from)
2874 NEXT_INSN (from) = 0;
2878 /* This function is deprecated, please use sequences instead.
2880 Move a consecutive bunch of insns to a different place in the chain.
2881 The insns to be moved are those between FROM and TO.
2882 They are moved to a new position after the insn AFTER.
2883 AFTER must not be FROM or TO or any insn in between.
2885 This function does not know about SEQUENCEs and hence should not be
2886 called after delay-slot filling has been done. */
2889 reorder_insns (from, to, after)
2890 rtx from, to, after;
2892 /* Splice this bunch out of where it is now. */
2893 if (PREV_INSN (from))
2894 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2896 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2897 if (last_insn == to)
2898 last_insn = PREV_INSN (from);
2899 if (first_insn == from)
2900 first_insn = NEXT_INSN (to);
2902 /* Make the new neighbors point to it and it to them. */
2903 if (NEXT_INSN (after))
2904 PREV_INSN (NEXT_INSN (after)) = to;
2906 NEXT_INSN (to) = NEXT_INSN (after);
2907 PREV_INSN (from) = after;
2908 NEXT_INSN (after) = from;
2909 if (after == last_insn)
2913 /* Return the line note insn preceding INSN. */
2916 find_line_note (insn)
2919 if (no_line_numbers)
2922 for (; insn; insn = PREV_INSN (insn))
2923 if (GET_CODE (insn) == NOTE
2924 && NOTE_LINE_NUMBER (insn) >= 0)
2930 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2931 of the moved insns when debugging. This may insert a note between AFTER
2932 and FROM, and another one after TO. */
2935 reorder_insns_with_line_notes (from, to, after)
2936 rtx from, to, after;
2938 rtx from_line = find_line_note (from);
2939 rtx after_line = find_line_note (after);
2941 reorder_insns (from, to, after);
2943 if (from_line == after_line)
2947 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2948 NOTE_LINE_NUMBER (from_line),
2951 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2952 NOTE_LINE_NUMBER (after_line),
2956 /* Remove unnecessary notes from the instruction stream. */
2959 remove_unnecessary_notes ()
2961 rtx block_stack = NULL_RTX;
2962 rtx eh_stack = NULL_RTX;
2967 /* We must not remove the first instruction in the function because
2968 the compiler depends on the first instruction being a note. */
2969 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2971 /* Remember what's next. */
2972 next = NEXT_INSN (insn);
2974 /* We're only interested in notes. */
2975 if (GET_CODE (insn) != NOTE)
2978 switch (NOTE_LINE_NUMBER (insn))
2980 case NOTE_INSN_DELETED:
2984 case NOTE_INSN_EH_REGION_BEG:
2985 eh_stack = alloc_INSN_LIST (insn, eh_stack);
2988 case NOTE_INSN_EH_REGION_END:
2989 /* Too many end notes. */
2990 if (eh_stack == NULL_RTX)
2992 /* Mismatched nesting. */
2993 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
2996 eh_stack = XEXP (eh_stack, 1);
2997 free_INSN_LIST_node (tmp);
3000 case NOTE_INSN_BLOCK_BEG:
3001 /* By now, all notes indicating lexical blocks should have
3002 NOTE_BLOCK filled in. */
3003 if (NOTE_BLOCK (insn) == NULL_TREE)
3005 block_stack = alloc_INSN_LIST (insn, block_stack);
3008 case NOTE_INSN_BLOCK_END:
3009 /* Too many end notes. */
3010 if (block_stack == NULL_RTX)
3012 /* Mismatched nesting. */
3013 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3016 block_stack = XEXP (block_stack, 1);
3017 free_INSN_LIST_node (tmp);
3019 /* Scan back to see if there are any non-note instructions
3020 between INSN and the beginning of this block. If not,
3021 then there is no PC range in the generated code that will
3022 actually be in this block, so there's no point in
3023 remembering the existence of the block. */
3024 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3026 /* This block contains a real instruction. Note that we
3027 don't include labels; if the only thing in the block
3028 is a label, then there are still no PC values that
3029 lie within the block. */
3033 /* We're only interested in NOTEs. */
3034 if (GET_CODE (tmp) != NOTE)
3037 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3039 /* We just verified that this BLOCK matches us with
3040 the block_stack check above. Never delete the
3041 BLOCK for the outermost scope of the function; we
3042 can refer to names from that scope even if the
3043 block notes are messed up. */
3044 if (! is_body_block (NOTE_BLOCK (insn))
3045 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3052 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3053 /* There's a nested block. We need to leave the
3054 current block in place since otherwise the debugger
3055 wouldn't be able to show symbols from our block in
3056 the nested block. */
3062 /* Too many begin notes. */
3063 if (block_stack || eh_stack)
3068 /* Emit an insn of given code and pattern
3069 at a specified place within the doubly-linked list. */
3071 /* Make an instruction with body PATTERN
3072 and output it before the instruction BEFORE. */
3075 emit_insn_before (pattern, before)
3076 register rtx pattern, before;
3078 register rtx insn = before;
3080 if (GET_CODE (pattern) == SEQUENCE)
3084 for (i = 0; i < XVECLEN (pattern, 0); i++)
3086 insn = XVECEXP (pattern, 0, i);
3087 add_insn_before (insn, before);
3092 insn = make_insn_raw (pattern);
3093 add_insn_before (insn, before);
3099 /* Similar to emit_insn_before, but update basic block boundaries as well. */
3102 emit_block_insn_before (pattern, before, block)
3103 rtx pattern, before;
3106 rtx prev = PREV_INSN (before);
3107 rtx r = emit_insn_before (pattern, before);
3108 if (block && block->head == before)
3109 block->head = NEXT_INSN (prev);
3113 /* Make an instruction with body PATTERN and code JUMP_INSN
3114 and output it before the instruction BEFORE. */
3117 emit_jump_insn_before (pattern, before)
3118 register rtx pattern, before;
3122 if (GET_CODE (pattern) == SEQUENCE)
3123 insn = emit_insn_before (pattern, before);
3126 insn = make_jump_insn_raw (pattern);
3127 add_insn_before (insn, before);
3133 /* Make an instruction with body PATTERN and code CALL_INSN
3134 and output it before the instruction BEFORE. */
3137 emit_call_insn_before (pattern, before)
3138 register rtx pattern, before;
3142 if (GET_CODE (pattern) == SEQUENCE)
3143 insn = emit_insn_before (pattern, before);
3146 insn = make_call_insn_raw (pattern);
3147 add_insn_before (insn, before);
3148 PUT_CODE (insn, CALL_INSN);
3154 /* Make an insn of code BARRIER
3155 and output it before the insn BEFORE. */
3158 emit_barrier_before (before)
3159 register rtx before;
3161 register rtx insn = rtx_alloc (BARRIER);
3163 INSN_UID (insn) = cur_insn_uid++;
3165 add_insn_before (insn, before);
3169 /* Emit the label LABEL before the insn BEFORE. */
3172 emit_label_before (label, before)
3175 /* This can be called twice for the same label as a result of the
3176 confusion that follows a syntax error! So make it harmless. */
3177 if (INSN_UID (label) == 0)
3179 INSN_UID (label) = cur_insn_uid++;
3180 add_insn_before (label, before);
3186 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3189 emit_note_before (subtype, before)
3193 register rtx note = rtx_alloc (NOTE);
3194 INSN_UID (note) = cur_insn_uid++;
3195 NOTE_SOURCE_FILE (note) = 0;
3196 NOTE_LINE_NUMBER (note) = subtype;
3198 add_insn_before (note, before);
3202 /* Make an insn of code INSN with body PATTERN
3203 and output it after the insn AFTER. */
3206 emit_insn_after (pattern, after)
3207 register rtx pattern, after;
3209 register rtx insn = after;
3211 if (GET_CODE (pattern) == SEQUENCE)
3215 for (i = 0; i < XVECLEN (pattern, 0); i++)
3217 insn = XVECEXP (pattern, 0, i);
3218 add_insn_after (insn, after);
3224 insn = make_insn_raw (pattern);
3225 add_insn_after (insn, after);
3231 /* Similar to emit_insn_after, except that line notes are to be inserted so
3232 as to act as if this insn were at FROM. */
3235 emit_insn_after_with_line_notes (pattern, after, from)
3236 rtx pattern, after, from;
3238 rtx from_line = find_line_note (from);
3239 rtx after_line = find_line_note (after);
3240 rtx insn = emit_insn_after (pattern, after);
3243 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3244 NOTE_LINE_NUMBER (from_line),
3248 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3249 NOTE_LINE_NUMBER (after_line),
3253 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3256 emit_block_insn_after (pattern, after, block)
3260 rtx r = emit_insn_after (pattern, after);
3261 if (block && block->end == after)
3266 /* Make an insn of code JUMP_INSN with body PATTERN
3267 and output it after the insn AFTER. */
3270 emit_jump_insn_after (pattern, after)
3271 register rtx pattern, after;
3275 if (GET_CODE (pattern) == SEQUENCE)
3276 insn = emit_insn_after (pattern, after);
3279 insn = make_jump_insn_raw (pattern);
3280 add_insn_after (insn, after);
3286 /* Make an insn of code BARRIER
3287 and output it after the insn AFTER. */
3290 emit_barrier_after (after)
3293 register rtx insn = rtx_alloc (BARRIER);
3295 INSN_UID (insn) = cur_insn_uid++;
3297 add_insn_after (insn, after);
3301 /* Emit the label LABEL after the insn AFTER. */
3304 emit_label_after (label, after)
3307 /* This can be called twice for the same label
3308 as a result of the confusion that follows a syntax error!
3309 So make it harmless. */
3310 if (INSN_UID (label) == 0)
3312 INSN_UID (label) = cur_insn_uid++;
3313 add_insn_after (label, after);
3319 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3322 emit_note_after (subtype, after)
3326 register rtx note = rtx_alloc (NOTE);
3327 INSN_UID (note) = cur_insn_uid++;
3328 NOTE_SOURCE_FILE (note) = 0;
3329 NOTE_LINE_NUMBER (note) = subtype;
3330 add_insn_after (note, after);
3334 /* Emit a line note for FILE and LINE after the insn AFTER. */
3337 emit_line_note_after (file, line, after)
3344 if (no_line_numbers && line > 0)
3350 note = rtx_alloc (NOTE);
3351 INSN_UID (note) = cur_insn_uid++;
3352 NOTE_SOURCE_FILE (note) = file;
3353 NOTE_LINE_NUMBER (note) = line;
3354 add_insn_after (note, after);
3358 /* Make an insn of code INSN with pattern PATTERN
3359 and add it to the end of the doubly-linked list.
3360 If PATTERN is a SEQUENCE, take the elements of it
3361 and emit an insn for each element.
3363 Returns the last insn emitted. */
3369 rtx insn = last_insn;
3371 if (GET_CODE (pattern) == SEQUENCE)
3375 for (i = 0; i < XVECLEN (pattern, 0); i++)
3377 insn = XVECEXP (pattern, 0, i);
3383 insn = make_insn_raw (pattern);
3390 /* Emit the insns in a chain starting with INSN.
3391 Return the last insn emitted. */
3401 rtx next = NEXT_INSN (insn);
3410 /* Emit the insns in a chain starting with INSN and place them in front of
3411 the insn BEFORE. Return the last insn emitted. */
3414 emit_insns_before (insn, before)
3422 rtx next = NEXT_INSN (insn);
3423 add_insn_before (insn, before);
3431 /* Emit the insns in a chain starting with FIRST and place them in back of
3432 the insn AFTER. Return the last insn emitted. */
3435 emit_insns_after (first, after)
3440 register rtx after_after;
3448 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3451 after_after = NEXT_INSN (after);
3453 NEXT_INSN (after) = first;
3454 PREV_INSN (first) = after;
3455 NEXT_INSN (last) = after_after;
3457 PREV_INSN (after_after) = last;
3459 if (after == last_insn)
3464 /* Make an insn of code JUMP_INSN with pattern PATTERN
3465 and add it to the end of the doubly-linked list. */
3468 emit_jump_insn (pattern)
3471 if (GET_CODE (pattern) == SEQUENCE)
3472 return emit_insn (pattern);
3475 register rtx insn = make_jump_insn_raw (pattern);
3481 /* Make an insn of code CALL_INSN with pattern PATTERN
3482 and add it to the end of the doubly-linked list. */
3485 emit_call_insn (pattern)
3488 if (GET_CODE (pattern) == SEQUENCE)
3489 return emit_insn (pattern);
3492 register rtx insn = make_call_insn_raw (pattern);
3494 PUT_CODE (insn, CALL_INSN);
3499 /* Add the label LABEL to the end of the doubly-linked list. */
3505 /* This can be called twice for the same label
3506 as a result of the confusion that follows a syntax error!
3507 So make it harmless. */
3508 if (INSN_UID (label) == 0)
3510 INSN_UID (label) = cur_insn_uid++;
3516 /* Make an insn of code BARRIER
3517 and add it to the end of the doubly-linked list. */
3522 register rtx barrier = rtx_alloc (BARRIER);
3523 INSN_UID (barrier) = cur_insn_uid++;
3528 /* Make an insn of code NOTE
3529 with data-fields specified by FILE and LINE
3530 and add it to the end of the doubly-linked list,
3531 but only if line-numbers are desired for debugging info. */
3534 emit_line_note (file, line)
3538 set_file_and_line_for_stmt (file, line);
3541 if (no_line_numbers)
3545 return emit_note (file, line);
3548 /* Make an insn of code NOTE
3549 with data-fields specified by FILE and LINE
3550 and add it to the end of the doubly-linked list.
3551 If it is a line-number NOTE, omit it if it matches the previous one. */
3554 emit_note (file, line)
3562 if (file && last_filename && !strcmp (file, last_filename)
3563 && line == last_linenum)
3565 last_filename = file;
3566 last_linenum = line;
3569 if (no_line_numbers && line > 0)
3575 note = rtx_alloc (NOTE);
3576 INSN_UID (note) = cur_insn_uid++;
3577 NOTE_SOURCE_FILE (note) = file;
3578 NOTE_LINE_NUMBER (note) = line;
3583 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3586 emit_line_note_force (file, line)
3591 return emit_line_note (file, line);
3594 /* Cause next statement to emit a line note even if the line number
3595 has not changed. This is used at the beginning of a function. */
3598 force_next_line_note ()
3603 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3604 note of this type already exists, remove it first. */
3607 set_unique_reg_note (insn, kind, datum)
3612 rtx note = find_reg_note (insn, kind, NULL_RTX);
3614 /* First remove the note if there already is one. */
3616 remove_note (insn, note);
3618 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3621 /* Return an indication of which type of insn should have X as a body.
3622 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3628 if (GET_CODE (x) == CODE_LABEL)
3630 if (GET_CODE (x) == CALL)
3632 if (GET_CODE (x) == RETURN)
3634 if (GET_CODE (x) == SET)
3636 if (SET_DEST (x) == pc_rtx)
3638 else if (GET_CODE (SET_SRC (x)) == CALL)
3643 if (GET_CODE (x) == PARALLEL)
3646 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3647 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3649 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3650 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3652 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3653 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3659 /* Emit the rtl pattern X as an appropriate kind of insn.
3660 If X is a label, it is simply added into the insn chain. */
3666 enum rtx_code code = classify_insn (x);
3668 if (code == CODE_LABEL)
3669 return emit_label (x);
3670 else if (code == INSN)
3671 return emit_insn (x);
3672 else if (code == JUMP_INSN)
3674 register rtx insn = emit_jump_insn (x);
3675 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3676 return emit_barrier ();
3679 else if (code == CALL_INSN)
3680 return emit_call_insn (x);
3685 /* Begin emitting insns to a sequence which can be packaged in an
3686 RTL_EXPR. If this sequence will contain something that might cause
3687 the compiler to pop arguments to function calls (because those
3688 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3689 details), use do_pending_stack_adjust before calling this function.
3690 That will ensure that the deferred pops are not accidentally
3691 emitted in the middle of this sequence. */
3696 struct sequence_stack *tem;
3698 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3700 tem->next = seq_stack;
3701 tem->first = first_insn;
3702 tem->last = last_insn;
3703 tem->sequence_rtl_expr = seq_rtl_expr;
3711 /* Similarly, but indicate that this sequence will be placed in T, an
3712 RTL_EXPR. See the documentation for start_sequence for more
3713 information about how to use this function. */
3716 start_sequence_for_rtl_expr (t)
3724 /* Set up the insn chain starting with FIRST as the current sequence,
3725 saving the previously current one. See the documentation for
3726 start_sequence for more information about how to use this function. */
3729 push_to_sequence (first)
3736 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3742 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3745 push_to_full_sequence (first, last)
3751 /* We really should have the end of the insn chain here. */
3752 if (last && NEXT_INSN (last))
3756 /* Set up the outer-level insn chain
3757 as the current sequence, saving the previously current one. */
3760 push_topmost_sequence ()
3762 struct sequence_stack *stack, *top = NULL;
3766 for (stack = seq_stack; stack; stack = stack->next)
3769 first_insn = top->first;
3770 last_insn = top->last;
3771 seq_rtl_expr = top->sequence_rtl_expr;
3774 /* After emitting to the outer-level insn chain, update the outer-level
3775 insn chain, and restore the previous saved state. */
3778 pop_topmost_sequence ()
3780 struct sequence_stack *stack, *top = NULL;
3782 for (stack = seq_stack; stack; stack = stack->next)
3785 top->first = first_insn;
3786 top->last = last_insn;
3787 /* ??? Why don't we save seq_rtl_expr here? */
3792 /* After emitting to a sequence, restore previous saved state.
3794 To get the contents of the sequence just made, you must call
3795 `gen_sequence' *before* calling here.
3797 If the compiler might have deferred popping arguments while
3798 generating this sequence, and this sequence will not be immediately
3799 inserted into the instruction stream, use do_pending_stack_adjust
3800 before calling gen_sequence. That will ensure that the deferred
3801 pops are inserted into this sequence, and not into some random
3802 location in the instruction stream. See INHIBIT_DEFER_POP for more
3803 information about deferred popping of arguments. */
3808 struct sequence_stack *tem = seq_stack;
3810 first_insn = tem->first;
3811 last_insn = tem->last;
3812 seq_rtl_expr = tem->sequence_rtl_expr;
3813 seq_stack = tem->next;
3818 /* This works like end_sequence, but records the old sequence in FIRST
3822 end_full_sequence (first, last)
3825 *first = first_insn;
3830 /* Return 1 if currently emitting into a sequence. */
3835 return seq_stack != 0;
3838 /* Generate a SEQUENCE rtx containing the insns already emitted
3839 to the current sequence.
3841 This is how the gen_... function from a DEFINE_EXPAND
3842 constructs the SEQUENCE that it returns. */
3852 /* Count the insns in the chain. */
3854 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3857 /* If only one insn, return it rather than a SEQUENCE.
3858 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3859 the case of an empty list.)
3860 We only return the pattern of an insn if its code is INSN and it
3861 has no notes. This ensures that no information gets lost. */
3863 && ! RTX_FRAME_RELATED_P (first_insn)
3864 && GET_CODE (first_insn) == INSN
3865 /* Don't throw away any reg notes. */
3866 && REG_NOTES (first_insn) == 0)
3867 return PATTERN (first_insn);
3869 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3871 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3872 XVECEXP (result, 0, i) = tem;
3877 /* Put the various virtual registers into REGNO_REG_RTX. */
3880 init_virtual_regs (es)
3881 struct emit_status *es;
3883 rtx *ptr = es->x_regno_reg_rtx;
3884 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3885 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3886 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3887 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3888 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3892 clear_emit_caches ()
3896 /* Clear the start_sequence/gen_sequence cache. */
3897 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3898 sequence_result[i] = 0;
3902 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3903 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3904 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3905 static int copy_insn_n_scratches;
3907 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3908 copied an ASM_OPERANDS.
3909 In that case, it is the original input-operand vector. */
3910 static rtvec orig_asm_operands_vector;
3912 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3913 copied an ASM_OPERANDS.
3914 In that case, it is the copied input-operand vector. */
3915 static rtvec copy_asm_operands_vector;
3917 /* Likewise for the constraints vector. */
3918 static rtvec orig_asm_constraints_vector;
3919 static rtvec copy_asm_constraints_vector;
3921 /* Recursively create a new copy of an rtx for copy_insn.
3922 This function differs from copy_rtx in that it handles SCRATCHes and
3923 ASM_OPERANDs properly.
3924 Normally, this function is not used directly; use copy_insn as front end.
3925 However, you could first copy an insn pattern with copy_insn and then use
3926 this function afterwards to properly copy any REG_NOTEs containing
3935 register RTX_CODE code;
3936 register const char *format_ptr;
3938 code = GET_CODE (orig);
3954 for (i = 0; i < copy_insn_n_scratches; i++)
3955 if (copy_insn_scratch_in[i] == orig)
3956 return copy_insn_scratch_out[i];
3960 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3961 a LABEL_REF, it isn't sharable. */
3962 if (GET_CODE (XEXP (orig, 0)) == PLUS
3963 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3964 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3968 /* A MEM with a constant address is not sharable. The problem is that
3969 the constant address may need to be reloaded. If the mem is shared,
3970 then reloading one copy of this mem will cause all copies to appear
3971 to have been reloaded. */
3977 copy = rtx_alloc (code);
3979 /* Copy the various flags, and other information. We assume that
3980 all fields need copying, and then clear the fields that should
3981 not be copied. That is the sensible default behavior, and forces
3982 us to explicitly document why we are *not* copying a flag. */
3983 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3985 /* We do not copy the USED flag, which is used as a mark bit during
3986 walks over the RTL. */
3989 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3990 if (GET_RTX_CLASS (code) == 'i')
3994 copy->frame_related = 0;
3997 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3999 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4001 copy->fld[i] = orig->fld[i];
4002 switch (*format_ptr++)
4005 if (XEXP (orig, i) != NULL)
4006 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4011 if (XVEC (orig, i) == orig_asm_constraints_vector)
4012 XVEC (copy, i) = copy_asm_constraints_vector;
4013 else if (XVEC (orig, i) == orig_asm_operands_vector)
4014 XVEC (copy, i) = copy_asm_operands_vector;
4015 else if (XVEC (orig, i) != NULL)
4017 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4018 for (j = 0; j < XVECLEN (copy, i); j++)
4019 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4030 /* These are left unchanged. */
4038 if (code == SCRATCH)
4040 i = copy_insn_n_scratches++;
4041 if (i >= MAX_RECOG_OPERANDS)
4043 copy_insn_scratch_in[i] = orig;
4044 copy_insn_scratch_out[i] = copy;
4046 else if (code == ASM_OPERANDS)
4048 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4049 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4050 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4051 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4057 /* Create a new copy of an rtx.
4058 This function differs from copy_rtx in that it handles SCRATCHes and
4059 ASM_OPERANDs properly.
4060 INSN doesn't really have to be a full INSN; it could be just the
4066 copy_insn_n_scratches = 0;
4067 orig_asm_operands_vector = 0;
4068 orig_asm_constraints_vector = 0;
4069 copy_asm_operands_vector = 0;
4070 copy_asm_constraints_vector = 0;
4071 return copy_insn_1 (insn);
4074 /* Initialize data structures and variables in this file
4075 before generating rtl for each function. */
4080 struct function *f = cfun;
4082 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4085 seq_rtl_expr = NULL;
4087 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4090 first_label_num = label_num;
4094 clear_emit_caches ();
4096 /* Init the tables that describe all the pseudo regs. */
4098 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4100 f->emit->regno_pointer_align
4101 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4102 sizeof (unsigned char));
4105 = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
4108 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4109 init_virtual_regs (f->emit);
4111 /* Indicate that the virtual registers and stack locations are
4113 REG_POINTER (stack_pointer_rtx) = 1;
4114 REG_POINTER (frame_pointer_rtx) = 1;
4115 REG_POINTER (hard_frame_pointer_rtx) = 1;
4116 REG_POINTER (arg_pointer_rtx) = 1;
4118 REG_POINTER (virtual_incoming_args_rtx) = 1;
4119 REG_POINTER (virtual_stack_vars_rtx) = 1;
4120 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4121 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4122 REG_POINTER (virtual_cfa_rtx) = 1;
4124 #ifdef STACK_BOUNDARY
4125 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4126 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4127 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4128 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4130 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4131 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4132 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4133 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4134 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4137 #ifdef INIT_EXPANDERS
4142 /* Mark SS for GC. */
4145 mark_sequence_stack (ss)
4146 struct sequence_stack *ss;
4150 ggc_mark_rtx (ss->first);
4151 ggc_mark_tree (ss->sequence_rtl_expr);
4156 /* Mark ES for GC. */
4159 mark_emit_status (es)
4160 struct emit_status *es;
4168 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
4172 mark_sequence_stack (es->sequence_stack);
4173 ggc_mark_tree (es->sequence_rtl_expr);
4174 ggc_mark_rtx (es->x_first_insn);
4177 /* Create some permanent unique rtl objects shared between all functions.
4178 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4181 init_emit_once (line_numbers)
4185 enum machine_mode mode;
4186 enum machine_mode double_mode;
4188 /* Initialize the CONST_INT hash table. */
4189 const_int_htab = htab_create (37, const_int_htab_hash,
4190 const_int_htab_eq, NULL);
4191 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4194 no_line_numbers = ! line_numbers;
4196 /* Compute the word and byte modes. */
4198 byte_mode = VOIDmode;
4199 word_mode = VOIDmode;
4200 double_mode = VOIDmode;
4202 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4203 mode = GET_MODE_WIDER_MODE (mode))
4205 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4206 && byte_mode == VOIDmode)
4209 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4210 && word_mode == VOIDmode)
4214 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4215 mode = GET_MODE_WIDER_MODE (mode))
4217 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4218 && double_mode == VOIDmode)
4222 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4224 /* Assign register numbers to the globally defined register rtx.
4225 This must be done at runtime because the register number field
4226 is in a union and some compilers can't initialize unions. */
4228 pc_rtx = gen_rtx (PC, VOIDmode);
4229 cc0_rtx = gen_rtx (CC0, VOIDmode);
4230 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4231 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4232 if (hard_frame_pointer_rtx == 0)
4233 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4234 HARD_FRAME_POINTER_REGNUM);
4235 if (arg_pointer_rtx == 0)
4236 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4237 virtual_incoming_args_rtx =
4238 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4239 virtual_stack_vars_rtx =
4240 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4241 virtual_stack_dynamic_rtx =
4242 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4243 virtual_outgoing_args_rtx =
4244 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4245 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4247 /* These rtx must be roots if GC is enabled. */
4248 ggc_add_rtx_root (global_rtl, GR_MAX);
4250 #ifdef INIT_EXPANDERS
4251 /* This is to initialize {init|mark|free}_machine_status before the first
4252 call to push_function_context_to. This is needed by the Chill front
4253 end which calls push_function_context_to before the first cal to
4254 init_function_start. */
4258 /* Create the unique rtx's for certain rtx codes and operand values. */
4260 /* Don't use gen_rtx here since gen_rtx in this case
4261 tries to use these variables. */
4262 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4263 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4264 gen_rtx_raw_CONST_INT (VOIDmode, i);
4265 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4267 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4268 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4269 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4271 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4273 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4274 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4275 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4276 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4278 for (i = 0; i <= 2; i++)
4280 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4281 mode = GET_MODE_WIDER_MODE (mode))
4283 rtx tem = rtx_alloc (CONST_DOUBLE);
4284 union real_extract u;
4286 /* Zero any holes in a structure. */
4287 memset ((char *) &u, 0, sizeof u);
4288 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4290 /* Avoid trailing garbage in the rtx. */
4291 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4292 CONST_DOUBLE_LOW (tem) = 0;
4293 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4294 CONST_DOUBLE_HIGH (tem) = 0;
4296 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4297 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4298 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4299 PUT_MODE (tem, mode);
4301 const_tiny_rtx[i][(int) mode] = tem;
4304 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4306 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4307 mode = GET_MODE_WIDER_MODE (mode))
4308 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4310 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4312 mode = GET_MODE_WIDER_MODE (mode))
4313 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4316 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4317 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4318 const_tiny_rtx[0][i] = const0_rtx;
4320 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4321 if (STORE_FLAG_VALUE == 1)
4322 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4324 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4325 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4326 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4327 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4328 ggc_add_rtx_root (&const_true_rtx, 1);
4330 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4331 return_address_pointer_rtx
4332 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4336 struct_value_rtx = STRUCT_VALUE;
4338 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4341 #ifdef STRUCT_VALUE_INCOMING
4342 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4344 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4345 struct_value_incoming_rtx
4346 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4348 struct_value_incoming_rtx = struct_value_rtx;
4352 #ifdef STATIC_CHAIN_REGNUM
4353 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4355 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4356 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4357 static_chain_incoming_rtx
4358 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4361 static_chain_incoming_rtx = static_chain_rtx;
4365 static_chain_rtx = STATIC_CHAIN;
4367 #ifdef STATIC_CHAIN_INCOMING
4368 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4370 static_chain_incoming_rtx = static_chain_rtx;
4374 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4375 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4377 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4378 ggc_add_rtx_root (&struct_value_rtx, 1);
4379 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4380 ggc_add_rtx_root (&static_chain_rtx, 1);
4381 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4382 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4385 /* Query and clear/ restore no_line_numbers. This is used by the
4386 switch / case handling in stmt.c to give proper line numbers in
4387 warnings about unreachable code. */
4390 force_line_numbers ()
4392 int old = no_line_numbers;
4394 no_line_numbers = 0;
4396 force_next_line_note ();
4401 restore_line_number_status (old_value)
4404 no_line_numbers = old_value;