1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these except perhaps the floating-point CONST_DOUBLEs
91 are unique; no other rtx-object will be equal to any of these. */
93 rtx global_rtl[GR_MAX];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static htab_t mem_attrs_htab;
151 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
152 shortly thrown away. We use two mechanisms to prevent this waste:
154 For sizes up to 5 elements, we keep a SEQUENCE and its associated
155 rtvec for use by gen_sequence. One entry for each size is
156 sufficient because most cases are calls to gen_sequence followed by
157 immediately emitting the SEQUENCE. Reuse is safe since emitting a
158 sequence is destructive on the insn in it anyway and hence can't be
161 We do not bother to save this cached data over nested function calls.
162 Instead, we just reinitialize them. */
164 #define SEQUENCE_RESULT_SIZE 5
166 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
168 /* During RTL generation, we also keep a list of free INSN rtl codes. */
169 static rtx free_insn;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_linenum (cfun->emit->x_last_linenum)
175 #define last_filename (cfun->emit->x_last_filename)
176 #define first_label_num (cfun->emit->x_first_label_num)
178 static rtx make_jump_insn_raw PARAMS ((rtx));
179 static rtx make_call_insn_raw PARAMS ((rtx));
180 static rtx find_line_note PARAMS ((rtx));
181 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
182 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
184 static void unshare_all_rtl_1 PARAMS ((rtx));
185 static void unshare_all_decls PARAMS ((tree));
186 static void reset_used_decls PARAMS ((tree));
187 static void mark_label_nuses PARAMS ((rtx));
188 static hashval_t const_int_htab_hash PARAMS ((const void *));
189 static int const_int_htab_eq PARAMS ((const void *,
191 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
192 static int mem_attrs_htab_eq PARAMS ((const void *,
194 static void mem_attrs_mark PARAMS ((const void *));
195 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
198 static tree component_ref_for_mem_expr PARAMS ((tree));
199 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
201 /* Probability of the conditional branch currently proceeded by try_split.
202 Set to -1 otherwise. */
203 int split_branch_probability = -1;
205 /* Returns a hash code for X (which is a really a CONST_INT). */
208 const_int_htab_hash (x)
211 return (hashval_t) INTVAL ((const struct rtx_def *) x);
214 /* Returns non-zero if the value represented by X (which is really a
215 CONST_INT) is the same as that given by Y (which is really a
219 const_int_htab_eq (x, y)
223 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
226 /* Returns a hash code for X (which is a really a mem_attrs *). */
229 mem_attrs_htab_hash (x)
232 mem_attrs *p = (mem_attrs *) x;
234 return (p->alias ^ (p->align * 1000)
235 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
236 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
240 /* Returns non-zero if the value represented by X (which is really a
241 mem_attrs *) is the same as that given by Y (which is also really a
245 mem_attrs_htab_eq (x, y)
249 mem_attrs *p = (mem_attrs *) x;
250 mem_attrs *q = (mem_attrs *) y;
252 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
253 && p->size == q->size && p->align == q->align);
256 /* This routine is called when we determine that we need a mem_attrs entry.
257 It marks the associated decl and RTL as being used, if present. */
263 mem_attrs *p = (mem_attrs *) x;
266 ggc_mark_tree (p->expr);
269 ggc_mark_rtx (p->offset);
272 ggc_mark_rtx (p->size);
275 /* Allocate a new mem_attrs structure and insert it into the hash table if
276 one identical to it is not already in the table. We are doing this for
280 get_mem_attrs (alias, expr, offset, size, align, mode)
286 enum machine_mode mode;
291 /* If everything is the default, we can just return zero. */
292 if (alias == 0 && expr == 0 && offset == 0
294 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
295 && (align == BITS_PER_UNIT
297 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
302 attrs.offset = offset;
306 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
309 *slot = ggc_alloc (sizeof (mem_attrs));
310 memcpy (*slot, &attrs, sizeof (mem_attrs));
316 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
317 don't attempt to share with the various global pieces of rtl (such as
318 frame_pointer_rtx). */
321 gen_raw_REG (mode, regno)
322 enum machine_mode mode;
325 rtx x = gen_rtx_raw_REG (mode, regno);
326 ORIGINAL_REGNO (x) = regno;
330 /* There are some RTL codes that require special attention; the generation
331 functions do the raw handling. If you add to this list, modify
332 special_rtx in gengenrtl.c as well. */
335 gen_rtx_CONST_INT (mode, arg)
336 enum machine_mode mode ATTRIBUTE_UNUSED;
341 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
342 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
344 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
345 if (const_true_rtx && arg == STORE_FLAG_VALUE)
346 return const_true_rtx;
349 /* Look up the CONST_INT in the hash table. */
350 slot = htab_find_slot_with_hash (const_int_htab, &arg,
351 (hashval_t) arg, INSERT);
353 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
358 /* CONST_DOUBLEs needs special handling because their length is known
362 gen_rtx_CONST_DOUBLE (mode, arg0, arg1)
363 enum machine_mode mode;
364 HOST_WIDE_INT arg0, arg1;
366 rtx r = rtx_alloc (CONST_DOUBLE);
370 X0EXP (r, 0) = NULL_RTX;
374 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 2; --i)
381 gen_rtx_REG (mode, regno)
382 enum machine_mode mode;
385 /* In case the MD file explicitly references the frame pointer, have
386 all such references point to the same frame pointer. This is
387 used during frame pointer elimination to distinguish the explicit
388 references to these registers from pseudos that happened to be
391 If we have eliminated the frame pointer or arg pointer, we will
392 be using it as a normal register, for example as a spill
393 register. In such cases, we might be accessing it in a mode that
394 is not Pmode and therefore cannot use the pre-allocated rtx.
396 Also don't do this when we are making new REGs in reload, since
397 we don't want to get confused with the real pointers. */
399 if (mode == Pmode && !reload_in_progress)
401 if (regno == FRAME_POINTER_REGNUM)
402 return frame_pointer_rtx;
403 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
404 if (regno == HARD_FRAME_POINTER_REGNUM)
405 return hard_frame_pointer_rtx;
407 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
408 if (regno == ARG_POINTER_REGNUM)
409 return arg_pointer_rtx;
411 #ifdef RETURN_ADDRESS_POINTER_REGNUM
412 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
413 return return_address_pointer_rtx;
415 if (regno == PIC_OFFSET_TABLE_REGNUM
416 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
417 return pic_offset_table_rtx;
418 if (regno == STACK_POINTER_REGNUM)
419 return stack_pointer_rtx;
422 return gen_raw_REG (mode, regno);
426 gen_rtx_MEM (mode, addr)
427 enum machine_mode mode;
430 rtx rt = gen_rtx_raw_MEM (mode, addr);
432 /* This field is not cleared by the mere allocation of the rtx, so
440 gen_rtx_SUBREG (mode, reg, offset)
441 enum machine_mode mode;
445 /* This is the most common failure type.
446 Catch it early so we can see who does it. */
447 if ((offset % GET_MODE_SIZE (mode)) != 0)
450 /* This check isn't usable right now because combine will
451 throw arbitrary crap like a CALL into a SUBREG in
452 gen_lowpart_for_combine so we must just eat it. */
454 /* Check for this too. */
455 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
458 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
461 /* Generate a SUBREG representing the least-significant part of REG if MODE
462 is smaller than mode of REG, otherwise paradoxical SUBREG. */
465 gen_lowpart_SUBREG (mode, reg)
466 enum machine_mode mode;
469 enum machine_mode inmode;
471 inmode = GET_MODE (reg);
472 if (inmode == VOIDmode)
474 return gen_rtx_SUBREG (mode, reg,
475 subreg_lowpart_offset (mode, inmode));
478 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
480 ** This routine generates an RTX of the size specified by
481 ** <code>, which is an RTX code. The RTX structure is initialized
482 ** from the arguments <element1> through <elementn>, which are
483 ** interpreted according to the specific RTX type's format. The
484 ** special machine mode associated with the rtx (if any) is specified
487 ** gen_rtx can be invoked in a way which resembles the lisp-like
488 ** rtx it will generate. For example, the following rtx structure:
490 ** (plus:QI (mem:QI (reg:SI 1))
491 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
493 ** ...would be generated by the following C code:
495 ** gen_rtx (PLUS, QImode,
496 ** gen_rtx (MEM, QImode,
497 ** gen_rtx (REG, SImode, 1)),
498 ** gen_rtx (MEM, QImode,
499 ** gen_rtx (PLUS, SImode,
500 ** gen_rtx (REG, SImode, 2),
501 ** gen_rtx (REG, SImode, 3)))),
506 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
508 int i; /* Array indices... */
509 const char *fmt; /* Current rtx's format... */
510 rtx rt_val; /* RTX to return to caller... */
513 VA_FIXEDARG (p, enum rtx_code, code);
514 VA_FIXEDARG (p, enum machine_mode, mode);
519 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
524 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
525 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
527 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1);
532 rt_val = gen_rtx_REG (mode, va_arg (p, int));
536 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
540 rt_val = rtx_alloc (code); /* Allocate the storage space. */
541 rt_val->mode = mode; /* Store the machine mode... */
543 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
544 for (i = 0; i < GET_RTX_LENGTH (code); i++)
548 case '0': /* Unused field. */
551 case 'i': /* An integer? */
552 XINT (rt_val, i) = va_arg (p, int);
555 case 'w': /* A wide integer? */
556 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
559 case 's': /* A string? */
560 XSTR (rt_val, i) = va_arg (p, char *);
563 case 'e': /* An expression? */
564 case 'u': /* An insn? Same except when printing. */
565 XEXP (rt_val, i) = va_arg (p, rtx);
568 case 'E': /* An RTX vector? */
569 XVEC (rt_val, i) = va_arg (p, rtvec);
572 case 'b': /* A bitmap? */
573 XBITMAP (rt_val, i) = va_arg (p, bitmap);
576 case 't': /* A tree? */
577 XTREE (rt_val, i) = va_arg (p, tree);
591 /* gen_rtvec (n, [rt1, ..., rtn])
593 ** This routine creates an rtvec and stores within it the
594 ** pointers to rtx's which are its arguments.
599 gen_rtvec VPARAMS ((int n, ...))
605 VA_FIXEDARG (p, int, n);
608 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
610 vector = (rtx *) alloca (n * sizeof (rtx));
612 for (i = 0; i < n; i++)
613 vector[i] = va_arg (p, rtx);
615 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
619 return gen_rtvec_v (save_n, vector);
623 gen_rtvec_v (n, argp)
631 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
633 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
635 for (i = 0; i < n; i++)
636 rt_val->elem[i] = *argp++;
641 /* Generate a REG rtx for a new pseudo register of mode MODE.
642 This pseudo is assigned the next sequential register number. */
646 enum machine_mode mode;
648 struct function *f = cfun;
651 /* Don't let anything called after initial flow analysis create new
656 if (generating_concat_p
657 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
658 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
660 /* For complex modes, don't make a single pseudo.
661 Instead, make a CONCAT of two pseudos.
662 This allows noncontiguous allocation of the real and imaginary parts,
663 which makes much better code. Besides, allocating DCmode
664 pseudos overstrains reload on some machines like the 386. */
665 rtx realpart, imagpart;
666 int size = GET_MODE_UNIT_SIZE (mode);
667 enum machine_mode partmode
668 = mode_for_size (size * BITS_PER_UNIT,
669 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
670 ? MODE_FLOAT : MODE_INT),
673 realpart = gen_reg_rtx (partmode);
674 imagpart = gen_reg_rtx (partmode);
675 return gen_rtx_CONCAT (mode, realpart, imagpart);
678 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
679 enough to have an element for this pseudo reg number. */
681 if (reg_rtx_no == f->emit->regno_pointer_align_length)
683 int old_size = f->emit->regno_pointer_align_length;
688 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
689 memset (new + old_size, 0, old_size);
690 f->emit->regno_pointer_align = (unsigned char *) new;
692 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
693 old_size * 2 * sizeof (rtx));
694 memset (new1 + old_size, 0, old_size * sizeof (rtx));
695 regno_reg_rtx = new1;
697 new2 = (tree *) xrealloc (f->emit->regno_decl,
698 old_size * 2 * sizeof (tree));
699 memset (new2 + old_size, 0, old_size * sizeof (tree));
700 f->emit->regno_decl = new2;
702 f->emit->regno_pointer_align_length = old_size * 2;
705 val = gen_raw_REG (mode, reg_rtx_no);
706 regno_reg_rtx[reg_rtx_no++] = val;
710 /* Identify REG (which may be a CONCAT) as a user register. */
716 if (GET_CODE (reg) == CONCAT)
718 REG_USERVAR_P (XEXP (reg, 0)) = 1;
719 REG_USERVAR_P (XEXP (reg, 1)) = 1;
721 else if (GET_CODE (reg) == REG)
722 REG_USERVAR_P (reg) = 1;
727 /* Identify REG as a probable pointer register and show its alignment
728 as ALIGN, if nonzero. */
731 mark_reg_pointer (reg, align)
735 if (! REG_POINTER (reg))
737 REG_POINTER (reg) = 1;
740 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
742 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
743 /* We can no-longer be sure just how aligned this pointer is */
744 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
747 /* Return 1 plus largest pseudo reg number used in the current function. */
755 /* Return 1 + the largest label number used so far in the current function. */
760 if (last_label_num && label_num == base_label_num)
761 return last_label_num;
765 /* Return first label number used in this function (if any were used). */
768 get_first_label_num ()
770 return first_label_num;
773 /* Return the final regno of X, which is a SUBREG of a hard
776 subreg_hard_regno (x, check_mode)
780 enum machine_mode mode = GET_MODE (x);
781 unsigned int byte_offset, base_regno, final_regno;
782 rtx reg = SUBREG_REG (x);
784 /* This is where we attempt to catch illegal subregs
785 created by the compiler. */
786 if (GET_CODE (x) != SUBREG
787 || GET_CODE (reg) != REG)
789 base_regno = REGNO (reg);
790 if (base_regno >= FIRST_PSEUDO_REGISTER)
792 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
795 /* Catch non-congruent offsets too. */
796 byte_offset = SUBREG_BYTE (x);
797 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
800 final_regno = subreg_regno (x);
805 /* Return a value representing some low-order bits of X, where the number
806 of low-order bits is given by MODE. Note that no conversion is done
807 between floating-point and fixed-point values, rather, the bit
808 representation is returned.
810 This function handles the cases in common between gen_lowpart, below,
811 and two variants in cse.c and combine.c. These are the cases that can
812 be safely handled at all points in the compilation.
814 If this is not a case we can handle, return 0. */
817 gen_lowpart_common (mode, x)
818 enum machine_mode mode;
821 int msize = GET_MODE_SIZE (mode);
822 int xsize = GET_MODE_SIZE (GET_MODE (x));
825 if (GET_MODE (x) == mode)
828 /* MODE must occupy no more words than the mode of X. */
829 if (GET_MODE (x) != VOIDmode
830 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
831 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
834 offset = subreg_lowpart_offset (mode, GET_MODE (x));
836 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
837 && (GET_MODE_CLASS (mode) == MODE_INT
838 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
840 /* If we are getting the low-order part of something that has been
841 sign- or zero-extended, we can either just use the object being
842 extended or make a narrower extension. If we want an even smaller
843 piece than the size of the object being extended, call ourselves
846 This case is used mostly by combine and cse. */
848 if (GET_MODE (XEXP (x, 0)) == mode)
850 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
851 return gen_lowpart_common (mode, XEXP (x, 0));
852 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
853 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
855 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
856 || GET_CODE (x) == CONCAT)
857 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
858 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
859 from the low-order part of the constant. */
860 else if ((GET_MODE_CLASS (mode) == MODE_INT
861 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
862 && GET_MODE (x) == VOIDmode
863 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
865 /* If MODE is twice the host word size, X is already the desired
866 representation. Otherwise, if MODE is wider than a word, we can't
867 do this. If MODE is exactly a word, return just one CONST_INT. */
869 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
871 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
873 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
874 return (GET_CODE (x) == CONST_INT ? x
875 : GEN_INT (CONST_DOUBLE_LOW (x)));
878 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
879 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
880 : CONST_DOUBLE_LOW (x));
882 /* Sign extend to HOST_WIDE_INT. */
883 val = trunc_int_for_mode (val, mode);
885 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
890 #ifndef REAL_ARITHMETIC
891 /* If X is an integral constant but we want it in floating-point, it
892 must be the case that we have a union of an integer and a floating-point
893 value. If the machine-parameters allow it, simulate that union here
894 and return the result. The two-word and single-word cases are
897 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
898 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
899 || flag_pretend_float)
900 && GET_MODE_CLASS (mode) == MODE_FLOAT
901 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
902 && GET_CODE (x) == CONST_INT
903 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
905 union {HOST_WIDE_INT i; float d; } u;
908 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
910 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
911 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
912 || flag_pretend_float)
913 && GET_MODE_CLASS (mode) == MODE_FLOAT
914 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
915 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
916 && GET_MODE (x) == VOIDmode
917 && (sizeof (double) * HOST_BITS_PER_CHAR
918 == 2 * HOST_BITS_PER_WIDE_INT))
920 union {HOST_WIDE_INT i[2]; double d; } u;
921 HOST_WIDE_INT low, high;
923 if (GET_CODE (x) == CONST_INT)
924 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
926 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
927 #ifdef HOST_WORDS_BIG_ENDIAN
928 u.i[0] = high, u.i[1] = low;
930 u.i[0] = low, u.i[1] = high;
932 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
935 /* Similarly, if this is converting a floating-point value into a
936 single-word integer. Only do this is the host and target parameters are
939 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
940 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
941 || flag_pretend_float)
942 && (GET_MODE_CLASS (mode) == MODE_INT
943 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
944 && GET_CODE (x) == CONST_DOUBLE
945 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
946 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
947 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
949 /* Similarly, if this is converting a floating-point value into a
950 two-word integer, we can do this one word at a time and make an
951 integer. Only do this is the host and target parameters are
954 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
955 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
956 || flag_pretend_float)
957 && (GET_MODE_CLASS (mode) == MODE_INT
958 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
959 && GET_CODE (x) == CONST_DOUBLE
960 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
961 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
963 rtx lowpart, highpart;
965 lowpart = constant_subword (x,
966 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
968 highpart = constant_subword (x,
969 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
971 if (lowpart && GET_CODE (lowpart) == CONST_INT
972 && highpart && GET_CODE (highpart) == CONST_INT)
973 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
975 #else /* ifndef REAL_ARITHMETIC */
977 /* When we have a FP emulator, we can handle all conversions between
978 FP and integer operands. This simplifies reload because it
979 doesn't have to deal with constructs like (subreg:DI
980 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
981 /* Single-precision floats are always 32-bits and double-precision
982 floats are always 64-bits. */
984 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
985 && GET_MODE_BITSIZE (mode) == 32
986 && GET_CODE (x) == CONST_INT)
992 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
993 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
995 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
996 && GET_MODE_BITSIZE (mode) == 64
997 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
998 && GET_MODE (x) == VOIDmode)
1002 HOST_WIDE_INT low, high;
1004 if (GET_CODE (x) == CONST_INT)
1007 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1011 low = CONST_DOUBLE_LOW (x);
1012 high = CONST_DOUBLE_HIGH (x);
1015 #if HOST_BITS_PER_WIDE_INT == 32
1016 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1018 if (WORDS_BIG_ENDIAN)
1019 i[0] = high, i[1] = low;
1021 i[0] = low, i[1] = high;
1026 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1027 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1029 else if ((GET_MODE_CLASS (mode) == MODE_INT
1030 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1031 && GET_CODE (x) == CONST_DOUBLE
1032 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1035 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1036 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1038 /* Convert 'r' into an array of four 32-bit words in target word
1040 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1041 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1044 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1047 i[3 - 3 * endian] = 0;
1050 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1051 i[2 - 2 * endian] = 0;
1052 i[3 - 2 * endian] = 0;
1055 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1056 i[3 - 3 * endian] = 0;
1059 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1064 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1066 #if HOST_BITS_PER_WIDE_INT == 32
1067 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1069 if (HOST_BITS_PER_WIDE_INT != 64)
1072 return immed_double_const ((((unsigned long) i[3 * endian])
1073 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1074 (((unsigned long) i[2 - endian])
1075 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1079 #endif /* ifndef REAL_ARITHMETIC */
1081 /* Otherwise, we can't do this. */
1085 /* Return the real part (which has mode MODE) of a complex value X.
1086 This always comes at the low address in memory. */
1089 gen_realpart (mode, x)
1090 enum machine_mode mode;
1093 if (WORDS_BIG_ENDIAN
1094 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1096 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1098 ("can't access real part of complex value in hard register");
1099 else if (WORDS_BIG_ENDIAN)
1100 return gen_highpart (mode, x);
1102 return gen_lowpart (mode, x);
1105 /* Return the imaginary part (which has mode MODE) of a complex value X.
1106 This always comes at the high address in memory. */
1109 gen_imagpart (mode, x)
1110 enum machine_mode mode;
1113 if (WORDS_BIG_ENDIAN)
1114 return gen_lowpart (mode, x);
1115 else if (! WORDS_BIG_ENDIAN
1116 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1118 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1120 ("can't access imaginary part of complex value in hard register");
1122 return gen_highpart (mode, x);
1125 /* Return 1 iff X, assumed to be a SUBREG,
1126 refers to the real part of the complex value in its containing reg.
1127 Complex values are always stored with the real part in the first word,
1128 regardless of WORDS_BIG_ENDIAN. */
1131 subreg_realpart_p (x)
1134 if (GET_CODE (x) != SUBREG)
1137 return ((unsigned int) SUBREG_BYTE (x)
1138 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1141 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1142 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1143 least-significant part of X.
1144 MODE specifies how big a part of X to return;
1145 it usually should not be larger than a word.
1146 If X is a MEM whose address is a QUEUED, the value may be so also. */
1149 gen_lowpart (mode, x)
1150 enum machine_mode mode;
1153 rtx result = gen_lowpart_common (mode, x);
1157 else if (GET_CODE (x) == REG)
1159 /* Must be a hard reg that's not valid in MODE. */
1160 result = gen_lowpart_common (mode, copy_to_reg (x));
1165 else if (GET_CODE (x) == MEM)
1167 /* The only additional case we can do is MEM. */
1169 if (WORDS_BIG_ENDIAN)
1170 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1171 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1173 if (BYTES_BIG_ENDIAN)
1174 /* Adjust the address so that the address-after-the-data
1176 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1177 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1179 return adjust_address (x, mode, offset);
1181 else if (GET_CODE (x) == ADDRESSOF)
1182 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1187 /* Like `gen_lowpart', but refer to the most significant part.
1188 This is used to access the imaginary part of a complex number. */
1191 gen_highpart (mode, x)
1192 enum machine_mode mode;
1195 unsigned int msize = GET_MODE_SIZE (mode);
1198 /* This case loses if X is a subreg. To catch bugs early,
1199 complain if an invalid MODE is used even in other cases. */
1200 if (msize > UNITS_PER_WORD
1201 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1204 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1205 subreg_highpart_offset (mode, GET_MODE (x)));
1207 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1208 the target if we have a MEM. gen_highpart must return a valid operand,
1209 emitting code if necessary to do so. */
1210 if (result != NULL_RTX && GET_CODE (result) == MEM)
1211 result = validize_mem (result);
1218 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1219 be VOIDmode constant. */
1221 gen_highpart_mode (outermode, innermode, exp)
1222 enum machine_mode outermode, innermode;
1225 if (GET_MODE (exp) != VOIDmode)
1227 if (GET_MODE (exp) != innermode)
1229 return gen_highpart (outermode, exp);
1231 return simplify_gen_subreg (outermode, exp, innermode,
1232 subreg_highpart_offset (outermode, innermode));
1234 /* Return offset in bytes to get OUTERMODE low part
1235 of the value in mode INNERMODE stored in memory in target format. */
1238 subreg_lowpart_offset (outermode, innermode)
1239 enum machine_mode outermode, innermode;
1241 unsigned int offset = 0;
1242 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1246 if (WORDS_BIG_ENDIAN)
1247 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1248 if (BYTES_BIG_ENDIAN)
1249 offset += difference % UNITS_PER_WORD;
1255 /* Return offset in bytes to get OUTERMODE high part
1256 of the value in mode INNERMODE stored in memory in target format. */
1258 subreg_highpart_offset (outermode, innermode)
1259 enum machine_mode outermode, innermode;
1261 unsigned int offset = 0;
1262 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1264 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1269 if (! WORDS_BIG_ENDIAN)
1270 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1271 if (! BYTES_BIG_ENDIAN)
1272 offset += difference % UNITS_PER_WORD;
1278 /* Return 1 iff X, assumed to be a SUBREG,
1279 refers to the least significant part of its containing reg.
1280 If X is not a SUBREG, always return 1 (it is its own low part!). */
1283 subreg_lowpart_p (x)
1286 if (GET_CODE (x) != SUBREG)
1288 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1291 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1292 == SUBREG_BYTE (x));
1296 /* Helper routine for all the constant cases of operand_subword.
1297 Some places invoke this directly. */
1300 constant_subword (op, offset, mode)
1303 enum machine_mode mode;
1305 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1308 /* If OP is already an integer word, return it. */
1309 if (GET_MODE_CLASS (mode) == MODE_INT
1310 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1313 #ifdef REAL_ARITHMETIC
1314 /* The output is some bits, the width of the target machine's word.
1315 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1317 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1318 && GET_MODE_CLASS (mode) == MODE_FLOAT
1319 && GET_MODE_BITSIZE (mode) == 64
1320 && GET_CODE (op) == CONST_DOUBLE)
1325 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1326 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1328 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1329 which the words are written depends on the word endianness.
1330 ??? This is a potential portability problem and should
1331 be fixed at some point.
1333 We must exercise caution with the sign bit. By definition there
1334 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1335 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1336 So we explicitly mask and sign-extend as necessary. */
1337 if (BITS_PER_WORD == 32)
1340 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1341 return GEN_INT (val);
1343 #if HOST_BITS_PER_WIDE_INT >= 64
1344 else if (BITS_PER_WORD >= 64 && offset == 0)
1346 val = k[! WORDS_BIG_ENDIAN];
1347 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1348 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1349 return GEN_INT (val);
1352 else if (BITS_PER_WORD == 16)
1354 val = k[offset >> 1];
1355 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1357 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1358 return GEN_INT (val);
1363 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1364 && GET_MODE_CLASS (mode) == MODE_FLOAT
1365 && GET_MODE_BITSIZE (mode) > 64
1366 && GET_CODE (op) == CONST_DOUBLE)
1371 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1372 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1374 if (BITS_PER_WORD == 32)
1377 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1378 return GEN_INT (val);
1380 #if HOST_BITS_PER_WIDE_INT >= 64
1381 else if (BITS_PER_WORD >= 64 && offset <= 1)
1383 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1384 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1385 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1386 return GEN_INT (val);
1392 #else /* no REAL_ARITHMETIC */
1393 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1394 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1395 || flag_pretend_float)
1396 && GET_MODE_CLASS (mode) == MODE_FLOAT
1397 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1398 && GET_CODE (op) == CONST_DOUBLE)
1400 /* The constant is stored in the host's word-ordering,
1401 but we want to access it in the target's word-ordering. Some
1402 compilers don't like a conditional inside macro args, so we have two
1403 copies of the return. */
1404 #ifdef HOST_WORDS_BIG_ENDIAN
1405 return GEN_INT (offset == WORDS_BIG_ENDIAN
1406 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1408 return GEN_INT (offset != WORDS_BIG_ENDIAN
1409 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1412 #endif /* no REAL_ARITHMETIC */
1414 /* Single word float is a little harder, since single- and double-word
1415 values often do not have the same high-order bits. We have already
1416 verified that we want the only defined word of the single-word value. */
1417 #ifdef REAL_ARITHMETIC
1418 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1419 && GET_MODE_BITSIZE (mode) == 32
1420 && GET_CODE (op) == CONST_DOUBLE)
1425 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1426 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1428 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1430 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1432 if (BITS_PER_WORD == 16)
1434 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1436 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1439 return GEN_INT (val);
1442 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1443 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1444 || flag_pretend_float)
1445 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1446 && GET_MODE_CLASS (mode) == MODE_FLOAT
1447 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1448 && GET_CODE (op) == CONST_DOUBLE)
1451 union {float f; HOST_WIDE_INT i; } u;
1453 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1456 return GEN_INT (u.i);
1458 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1459 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1460 || flag_pretend_float)
1461 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1462 && GET_MODE_CLASS (mode) == MODE_FLOAT
1463 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1464 && GET_CODE (op) == CONST_DOUBLE)
1467 union {double d; HOST_WIDE_INT i; } u;
1469 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1472 return GEN_INT (u.i);
1474 #endif /* no REAL_ARITHMETIC */
1476 /* The only remaining cases that we can handle are integers.
1477 Convert to proper endianness now since these cases need it.
1478 At this point, offset == 0 means the low-order word.
1480 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1481 in general. However, if OP is (const_int 0), we can just return
1484 if (op == const0_rtx)
1487 if (GET_MODE_CLASS (mode) != MODE_INT
1488 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1489 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1492 if (WORDS_BIG_ENDIAN)
1493 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1495 /* Find out which word on the host machine this value is in and get
1496 it from the constant. */
1497 val = (offset / size_ratio == 0
1498 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1499 : (GET_CODE (op) == CONST_INT
1500 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1502 /* Get the value we want into the low bits of val. */
1503 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1504 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1506 val = trunc_int_for_mode (val, word_mode);
1508 return GEN_INT (val);
1511 /* Return subword OFFSET of operand OP.
1512 The word number, OFFSET, is interpreted as the word number starting
1513 at the low-order address. OFFSET 0 is the low-order word if not
1514 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1516 If we cannot extract the required word, we return zero. Otherwise,
1517 an rtx corresponding to the requested word will be returned.
1519 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1520 reload has completed, a valid address will always be returned. After
1521 reload, if a valid address cannot be returned, we return zero.
1523 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1524 it is the responsibility of the caller.
1526 MODE is the mode of OP in case it is a CONST_INT.
1528 ??? This is still rather broken for some cases. The problem for the
1529 moment is that all callers of this thing provide no 'goal mode' to
1530 tell us to work with. This exists because all callers were written
1531 in a word based SUBREG world.
1532 Now use of this function can be deprecated by simplify_subreg in most
1537 operand_subword (op, offset, validate_address, mode)
1539 unsigned int offset;
1540 int validate_address;
1541 enum machine_mode mode;
1543 if (mode == VOIDmode)
1544 mode = GET_MODE (op);
1546 if (mode == VOIDmode)
1549 /* If OP is narrower than a word, fail. */
1551 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1554 /* If we want a word outside OP, return zero. */
1556 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1559 /* Form a new MEM at the requested address. */
1560 if (GET_CODE (op) == MEM)
1562 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1564 if (! validate_address)
1567 else if (reload_completed)
1569 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1573 return replace_equiv_address (new, XEXP (new, 0));
1576 /* Rest can be handled by simplify_subreg. */
1577 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1580 /* Similar to `operand_subword', but never return 0. If we can't extract
1581 the required subword, put OP into a register and try again. If that fails,
1582 abort. We always validate the address in this case.
1584 MODE is the mode of OP, in case it is CONST_INT. */
1587 operand_subword_force (op, offset, mode)
1589 unsigned int offset;
1590 enum machine_mode mode;
1592 rtx result = operand_subword (op, offset, 1, mode);
1597 if (mode != BLKmode && mode != VOIDmode)
1599 /* If this is a register which can not be accessed by words, copy it
1600 to a pseudo register. */
1601 if (GET_CODE (op) == REG)
1602 op = copy_to_reg (op);
1604 op = force_reg (mode, op);
1607 result = operand_subword (op, offset, 1, mode);
1614 /* Given a compare instruction, swap the operands.
1615 A test instruction is changed into a compare of 0 against the operand. */
1618 reverse_comparison (insn)
1621 rtx body = PATTERN (insn);
1624 if (GET_CODE (body) == SET)
1625 comp = SET_SRC (body);
1627 comp = SET_SRC (XVECEXP (body, 0, 0));
1629 if (GET_CODE (comp) == COMPARE)
1631 rtx op0 = XEXP (comp, 0);
1632 rtx op1 = XEXP (comp, 1);
1633 XEXP (comp, 0) = op1;
1634 XEXP (comp, 1) = op0;
1638 rtx new = gen_rtx_COMPARE (VOIDmode,
1639 CONST0_RTX (GET_MODE (comp)), comp);
1640 if (GET_CODE (body) == SET)
1641 SET_SRC (body) = new;
1643 SET_SRC (XVECEXP (body, 0, 0)) = new;
1647 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1648 or (2) a component ref of something variable. Represent the later with
1649 a NULL expression. */
1652 component_ref_for_mem_expr (ref)
1655 tree inner = TREE_OPERAND (ref, 0);
1657 if (TREE_CODE (inner) == COMPONENT_REF)
1658 inner = component_ref_for_mem_expr (inner);
1661 tree placeholder_ptr = 0;
1663 /* Now remove any conversions: they don't change what the underlying
1664 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1665 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1666 || TREE_CODE (inner) == NON_LVALUE_EXPR
1667 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1668 || TREE_CODE (inner) == SAVE_EXPR
1669 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1670 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1671 inner = find_placeholder (inner, &placeholder_ptr);
1673 inner = TREE_OPERAND (inner, 0);
1675 if (! DECL_P (inner))
1679 if (inner == TREE_OPERAND (ref, 0))
1682 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1683 TREE_OPERAND (ref, 1));
1686 /* Given REF, a MEM, and T, either the type of X or the expression
1687 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1688 if we are making a new object of this type. */
1691 set_mem_attributes (ref, t, objectp)
1696 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1697 tree expr = MEM_EXPR (ref);
1698 rtx offset = MEM_OFFSET (ref);
1699 rtx size = MEM_SIZE (ref);
1700 unsigned int align = MEM_ALIGN (ref);
1703 /* It can happen that type_for_mode was given a mode for which there
1704 is no language-level type. In which case it returns NULL, which
1709 type = TYPE_P (t) ? t : TREE_TYPE (t);
1711 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1712 wrong answer, as it assumes that DECL_RTL already has the right alias
1713 info. Callers should not set DECL_RTL until after the call to
1714 set_mem_attributes. */
1715 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1718 /* Get the alias set from the expression or type (perhaps using a
1719 front-end routine) and use it. */
1720 alias = get_alias_set (t);
1722 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1723 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1724 RTX_UNCHANGING_P (ref)
1725 |= ((lang_hooks.honor_readonly
1726 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1727 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1729 /* If we are making an object of this type, or if this is a DECL, we know
1730 that it is a scalar if the type is not an aggregate. */
1731 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1732 MEM_SCALAR_P (ref) = 1;
1734 /* We can set the alignment from the type if we are making an object,
1735 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1736 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1737 align = MAX (align, TYPE_ALIGN (type));
1739 /* If the size is known, we can set that. */
1740 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1741 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1743 /* If T is not a type, we may be able to deduce some more information about
1747 maybe_set_unchanging (ref, t);
1748 if (TREE_THIS_VOLATILE (t))
1749 MEM_VOLATILE_P (ref) = 1;
1751 /* Now remove any conversions: they don't change what the underlying
1752 object is. Likewise for SAVE_EXPR. */
1753 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1754 || TREE_CODE (t) == NON_LVALUE_EXPR
1755 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1756 || TREE_CODE (t) == SAVE_EXPR)
1757 t = TREE_OPERAND (t, 0);
1759 /* If this expression can't be addressed (e.g., it contains a reference
1760 to a non-addressable field), show we don't change its alias set. */
1761 if (! can_address_p (t))
1762 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1764 /* If this is a decl, set the attributes of the MEM from it. */
1768 offset = const0_rtx;
1769 size = (DECL_SIZE_UNIT (t)
1770 && host_integerp (DECL_SIZE_UNIT (t), 1)
1771 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1772 align = DECL_ALIGN (t);
1775 /* If this is a constant, we know the alignment. */
1776 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1778 align = TYPE_ALIGN (type);
1779 #ifdef CONSTANT_ALIGNMENT
1780 align = CONSTANT_ALIGNMENT (t, align);
1784 /* If this is a field reference and not a bit-field, record it. */
1785 /* ??? There is some information that can be gleened from bit-fields,
1786 such as the word offset in the structure that might be modified.
1787 But skip it for now. */
1788 else if (TREE_CODE (t) == COMPONENT_REF
1789 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1791 expr = component_ref_for_mem_expr (t);
1792 offset = const0_rtx;
1793 /* ??? Any reason the field size would be different than
1794 the size we got from the type? */
1797 /* If this is an array reference, look for an outer field reference. */
1798 else if (TREE_CODE (t) == ARRAY_REF)
1800 tree off_tree = size_zero_node;
1805 = fold (build (PLUS_EXPR, sizetype,
1806 fold (build (MULT_EXPR, sizetype,
1807 TREE_OPERAND (t, 1),
1808 TYPE_SIZE_UNIT (TREE_TYPE (t)))),
1810 t = TREE_OPERAND (t, 0);
1812 while (TREE_CODE (t) == ARRAY_REF);
1814 if (TREE_CODE (t) == COMPONENT_REF)
1816 expr = component_ref_for_mem_expr (t);
1817 if (host_integerp (off_tree, 1))
1818 offset = GEN_INT (tree_low_cst (off_tree, 1));
1819 /* ??? Any reason the field size would be different than
1820 the size we got from the type? */
1825 /* Now set the attributes we computed above. */
1827 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1829 /* If this is already known to be a scalar or aggregate, we are done. */
1830 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1833 /* If it is a reference into an aggregate, this is part of an aggregate.
1834 Otherwise we don't know. */
1835 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1836 || TREE_CODE (t) == ARRAY_RANGE_REF
1837 || TREE_CODE (t) == BIT_FIELD_REF)
1838 MEM_IN_STRUCT_P (ref) = 1;
1841 /* Set the alias set of MEM to SET. */
1844 set_mem_alias_set (mem, set)
1848 #ifdef ENABLE_CHECKING
1849 /* If the new and old alias sets don't conflict, something is wrong. */
1850 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1854 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1855 MEM_SIZE (mem), MEM_ALIGN (mem),
1859 /* Set the alignment of MEM to ALIGN bits. */
1862 set_mem_align (mem, align)
1866 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1867 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1871 /* Set the expr for MEM to EXPR. */
1874 set_mem_expr (mem, expr)
1879 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1880 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1883 /* Set the offset of MEM to OFFSET. */
1886 set_mem_offset (mem, offset)
1889 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1890 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1894 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1895 and its address changed to ADDR. (VOIDmode means don't change the mode.
1896 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1897 returned memory location is required to be valid. The memory
1898 attributes are not changed. */
1901 change_address_1 (memref, mode, addr, validate)
1903 enum machine_mode mode;
1909 if (GET_CODE (memref) != MEM)
1911 if (mode == VOIDmode)
1912 mode = GET_MODE (memref);
1914 addr = XEXP (memref, 0);
1918 if (reload_in_progress || reload_completed)
1920 if (! memory_address_p (mode, addr))
1924 addr = memory_address (mode, addr);
1927 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1930 new = gen_rtx_MEM (mode, addr);
1931 MEM_COPY_ATTRIBUTES (new, memref);
1935 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1936 way we are changing MEMREF, so we only preserve the alias set. */
1939 change_address (memref, mode, addr)
1941 enum machine_mode mode;
1944 rtx new = change_address_1 (memref, mode, addr, 1);
1945 enum machine_mode mmode = GET_MODE (new);
1948 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1949 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1950 (mmode == BLKmode ? BITS_PER_UNIT
1951 : GET_MODE_ALIGNMENT (mmode)),
1957 /* Return a memory reference like MEMREF, but with its mode changed
1958 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1959 nonzero, the memory address is forced to be valid.
1960 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1961 and caller is responsible for adjusting MEMREF base register. */
1964 adjust_address_1 (memref, mode, offset, validate, adjust)
1966 enum machine_mode mode;
1967 HOST_WIDE_INT offset;
1968 int validate, adjust;
1970 rtx addr = XEXP (memref, 0);
1972 rtx memoffset = MEM_OFFSET (memref);
1974 unsigned int memalign = MEM_ALIGN (memref);
1976 /* ??? Prefer to create garbage instead of creating shared rtl.
1977 This may happen even if offset is non-zero -- consider
1978 (plus (plus reg reg) const_int) -- so do this always. */
1979 addr = copy_rtx (addr);
1983 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1984 object, we can merge it into the LO_SUM. */
1985 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1987 && (unsigned HOST_WIDE_INT) offset
1988 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1989 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1990 plus_constant (XEXP (addr, 1), offset));
1992 addr = plus_constant (addr, offset);
1995 new = change_address_1 (memref, mode, addr, validate);
1997 /* Compute the new values of the memory attributes due to this adjustment.
1998 We add the offsets and update the alignment. */
2000 memoffset = GEN_INT (offset + INTVAL (memoffset));
2002 /* Compute the new alignment by taking the MIN of the alignment and the
2003 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2006 memalign = MIN (memalign,
2007 (unsigned int) (offset & -offset) * BITS_PER_UNIT);
2009 /* We can compute the size in a number of ways. */
2010 if (GET_MODE (new) != BLKmode)
2011 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2012 else if (MEM_SIZE (memref))
2013 size = plus_constant (MEM_SIZE (memref), -offset);
2015 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2016 memoffset, size, memalign, GET_MODE (new));
2018 /* At some point, we should validate that this offset is within the object,
2019 if all the appropriate values are known. */
2023 /* Return a memory reference like MEMREF, but with its mode changed
2024 to MODE and its address changed to ADDR, which is assumed to be
2025 MEMREF offseted by OFFSET bytes. If VALIDATE is
2026 nonzero, the memory address is forced to be valid. */
2029 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2031 enum machine_mode mode;
2033 HOST_WIDE_INT offset;
2036 memref = change_address_1 (memref, VOIDmode, addr, validate);
2037 return adjust_address_1 (memref, mode, offset, validate, 0);
2040 /* Return a memory reference like MEMREF, but whose address is changed by
2041 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2042 known to be in OFFSET (possibly 1). */
2045 offset_address (memref, offset, pow2)
2050 rtx new, addr = XEXP (memref, 0);
2052 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2054 /* At this point we don't know _why_ the address is invalid. It
2055 could have secondary memory refereces, multiplies or anything.
2057 However, if we did go and rearrange things, we can wind up not
2058 being able to recognize the magic around pic_offset_table_rtx.
2059 This stuff is fragile, and is yet another example of why it is
2060 bad to expose PIC machinery too early. */
2061 if (! memory_address_p (GET_MODE (memref), new)
2062 && GET_CODE (addr) == PLUS
2063 && XEXP (addr, 0) == pic_offset_table_rtx)
2065 addr = force_reg (GET_MODE (addr), addr);
2066 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2069 new = change_address_1 (memref, VOIDmode, new, 1);
2071 /* Update the alignment to reflect the offset. Reset the offset, which
2074 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2075 MIN (MEM_ALIGN (memref),
2076 (unsigned int) pow2 * BITS_PER_UNIT),
2081 /* Return a memory reference like MEMREF, but with its address changed to
2082 ADDR. The caller is asserting that the actual piece of memory pointed
2083 to is the same, just the form of the address is being changed, such as
2084 by putting something into a register. */
2087 replace_equiv_address (memref, addr)
2091 /* change_address_1 copies the memory attribute structure without change
2092 and that's exactly what we want here. */
2093 update_temp_slot_address (XEXP (memref, 0), addr);
2094 return change_address_1 (memref, VOIDmode, addr, 1);
2097 /* Likewise, but the reference is not required to be valid. */
2100 replace_equiv_address_nv (memref, addr)
2104 return change_address_1 (memref, VOIDmode, addr, 0);
2107 /* Return a memory reference like MEMREF, but with its mode widened to
2108 MODE and offset by OFFSET. This would be used by targets that e.g.
2109 cannot issue QImode memory operations and have to use SImode memory
2110 operations plus masking logic. */
2113 widen_memory_access (memref, mode, offset)
2115 enum machine_mode mode;
2116 HOST_WIDE_INT offset;
2118 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2119 tree expr = MEM_EXPR (new);
2120 rtx memoffset = MEM_OFFSET (new);
2121 unsigned int size = GET_MODE_SIZE (mode);
2123 /* If we don't know what offset we were at within the expression, then
2124 we can't know if we've overstepped the bounds. */
2125 if (! memoffset && offset != 0)
2130 if (TREE_CODE (expr) == COMPONENT_REF)
2132 tree field = TREE_OPERAND (expr, 1);
2134 if (! DECL_SIZE_UNIT (field))
2140 /* Is the field at least as large as the access? If so, ok,
2141 otherwise strip back to the containing structure. */
2142 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2143 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2144 && INTVAL (memoffset) >= 0)
2147 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2153 expr = TREE_OPERAND (expr, 0);
2154 memoffset = (GEN_INT (INTVAL (memoffset)
2155 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2156 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2159 /* Similarly for the decl. */
2160 else if (DECL_P (expr)
2161 && DECL_SIZE_UNIT (expr)
2162 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2163 && (! memoffset || INTVAL (memoffset) >= 0))
2167 /* The widened memory access overflows the expression, which means
2168 that it could alias another expression. Zap it. */
2175 memoffset = NULL_RTX;
2177 /* The widened memory may alias other stuff, so zap the alias set. */
2178 /* ??? Maybe use get_alias_set on any remaining expression. */
2180 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2181 MEM_ALIGN (new), mode);
2186 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2193 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
2194 NULL_RTX, label_num++, NULL, NULL);
2196 LABEL_NUSES (label) = 0;
2197 LABEL_ALTERNATE_NAME (label) = NULL;
2201 /* For procedure integration. */
2203 /* Install new pointers to the first and last insns in the chain.
2204 Also, set cur_insn_uid to one higher than the last in use.
2205 Used for an inline-procedure after copying the insn chain. */
2208 set_new_first_and_last_insn (first, last)
2217 for (insn = first; insn; insn = NEXT_INSN (insn))
2218 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2223 /* Set the range of label numbers found in the current function.
2224 This is used when belatedly compiling an inline function. */
2227 set_new_first_and_last_label_num (first, last)
2230 base_label_num = label_num;
2231 first_label_num = first;
2232 last_label_num = last;
2235 /* Set the last label number found in the current function.
2236 This is used when belatedly compiling an inline function. */
2239 set_new_last_label_num (last)
2242 base_label_num = label_num;
2243 last_label_num = last;
2246 /* Restore all variables describing the current status from the structure *P.
2247 This is used after a nested function. */
2250 restore_emit_status (p)
2251 struct function *p ATTRIBUTE_UNUSED;
2254 clear_emit_caches ();
2257 /* Clear out all parts of the state in F that can safely be discarded
2258 after the function has been compiled, to let garbage collection
2259 reclaim the memory. */
2262 free_emit_status (f)
2265 free (f->emit->x_regno_reg_rtx);
2266 free (f->emit->regno_pointer_align);
2267 free (f->emit->regno_decl);
2272 /* Go through all the RTL insn bodies and copy any invalid shared
2273 structure. This routine should only be called once. */
2276 unshare_all_rtl (fndecl, insn)
2282 /* Make sure that virtual parameters are not shared. */
2283 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2284 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2286 /* Make sure that virtual stack slots are not shared. */
2287 unshare_all_decls (DECL_INITIAL (fndecl));
2289 /* Unshare just about everything else. */
2290 unshare_all_rtl_1 (insn);
2292 /* Make sure the addresses of stack slots found outside the insn chain
2293 (such as, in DECL_RTL of a variable) are not shared
2294 with the insn chain.
2296 This special care is necessary when the stack slot MEM does not
2297 actually appear in the insn chain. If it does appear, its address
2298 is unshared from all else at that point. */
2299 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2302 /* Go through all the RTL insn bodies and copy any invalid shared
2303 structure, again. This is a fairly expensive thing to do so it
2304 should be done sparingly. */
2307 unshare_all_rtl_again (insn)
2313 for (p = insn; p; p = NEXT_INSN (p))
2316 reset_used_flags (PATTERN (p));
2317 reset_used_flags (REG_NOTES (p));
2318 reset_used_flags (LOG_LINKS (p));
2321 /* Make sure that virtual stack slots are not shared. */
2322 reset_used_decls (DECL_INITIAL (cfun->decl));
2324 /* Make sure that virtual parameters are not shared. */
2325 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2326 reset_used_flags (DECL_RTL (decl));
2328 reset_used_flags (stack_slot_list);
2330 unshare_all_rtl (cfun->decl, insn);
2333 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2334 Assumes the mark bits are cleared at entry. */
2337 unshare_all_rtl_1 (insn)
2340 for (; insn; insn = NEXT_INSN (insn))
2343 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2344 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2345 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2349 /* Go through all virtual stack slots of a function and copy any
2350 shared structure. */
2352 unshare_all_decls (blk)
2357 /* Copy shared decls. */
2358 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2359 if (DECL_RTL_SET_P (t))
2360 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2362 /* Now process sub-blocks. */
2363 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2364 unshare_all_decls (t);
2367 /* Go through all virtual stack slots of a function and mark them as
2370 reset_used_decls (blk)
2376 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2377 if (DECL_RTL_SET_P (t))
2378 reset_used_flags (DECL_RTL (t));
2380 /* Now process sub-blocks. */
2381 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2382 reset_used_decls (t);
2385 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2386 Recursively does the same for subexpressions. */
2389 copy_rtx_if_shared (orig)
2395 const char *format_ptr;
2401 code = GET_CODE (x);
2403 /* These types may be freely shared. */
2417 /* SCRATCH must be shared because they represent distinct values. */
2421 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2422 a LABEL_REF, it isn't sharable. */
2423 if (GET_CODE (XEXP (x, 0)) == PLUS
2424 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2425 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2434 /* The chain of insns is not being copied. */
2438 /* A MEM is allowed to be shared if its address is constant.
2440 We used to allow sharing of MEMs which referenced
2441 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2442 that can lose. instantiate_virtual_regs will not unshare
2443 the MEMs, and combine may change the structure of the address
2444 because it looks safe and profitable in one context, but
2445 in some other context it creates unrecognizable RTL. */
2446 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2455 /* This rtx may not be shared. If it has already been seen,
2456 replace it with a copy of itself. */
2462 copy = rtx_alloc (code);
2464 (sizeof (*copy) - sizeof (copy->fld)
2465 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2471 /* Now scan the subexpressions recursively.
2472 We can store any replaced subexpressions directly into X
2473 since we know X is not shared! Any vectors in X
2474 must be copied if X was copied. */
2476 format_ptr = GET_RTX_FORMAT (code);
2478 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2480 switch (*format_ptr++)
2483 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2487 if (XVEC (x, i) != NULL)
2490 int len = XVECLEN (x, i);
2492 if (copied && len > 0)
2493 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2494 for (j = 0; j < len; j++)
2495 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2503 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2504 to look for shared sub-parts. */
2507 reset_used_flags (x)
2512 const char *format_ptr;
2517 code = GET_CODE (x);
2519 /* These types may be freely shared so we needn't do any resetting
2541 /* The chain of insns is not being copied. */
2550 format_ptr = GET_RTX_FORMAT (code);
2551 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2553 switch (*format_ptr++)
2556 reset_used_flags (XEXP (x, i));
2560 for (j = 0; j < XVECLEN (x, i); j++)
2561 reset_used_flags (XVECEXP (x, i, j));
2567 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2568 Return X or the rtx for the pseudo reg the value of X was copied into.
2569 OTHER must be valid as a SET_DEST. */
2572 make_safe_from (x, other)
2576 switch (GET_CODE (other))
2579 other = SUBREG_REG (other);
2581 case STRICT_LOW_PART:
2584 other = XEXP (other, 0);
2590 if ((GET_CODE (other) == MEM
2592 && GET_CODE (x) != REG
2593 && GET_CODE (x) != SUBREG)
2594 || (GET_CODE (other) == REG
2595 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2596 || reg_mentioned_p (other, x))))
2598 rtx temp = gen_reg_rtx (GET_MODE (x));
2599 emit_move_insn (temp, x);
2605 /* Emission of insns (adding them to the doubly-linked list). */
2607 /* Return the first insn of the current sequence or current function. */
2615 /* Return the last insn emitted in current sequence or current function. */
2623 /* Specify a new insn as the last in the chain. */
2626 set_last_insn (insn)
2629 if (NEXT_INSN (insn) != 0)
2634 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2637 get_last_insn_anywhere ()
2639 struct sequence_stack *stack;
2642 for (stack = seq_stack; stack; stack = stack->next)
2643 if (stack->last != 0)
2648 /* Return a number larger than any instruction's uid in this function. */
2653 return cur_insn_uid;
2656 /* Renumber instructions so that no instruction UIDs are wasted. */
2659 renumber_insns (stream)
2664 /* If we're not supposed to renumber instructions, don't. */
2665 if (!flag_renumber_insns)
2668 /* If there aren't that many instructions, then it's not really
2669 worth renumbering them. */
2670 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2675 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2678 fprintf (stream, "Renumbering insn %d to %d\n",
2679 INSN_UID (insn), cur_insn_uid);
2680 INSN_UID (insn) = cur_insn_uid++;
2684 /* Return the next insn. If it is a SEQUENCE, return the first insn
2693 insn = NEXT_INSN (insn);
2694 if (insn && GET_CODE (insn) == INSN
2695 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2696 insn = XVECEXP (PATTERN (insn), 0, 0);
2702 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2706 previous_insn (insn)
2711 insn = PREV_INSN (insn);
2712 if (insn && GET_CODE (insn) == INSN
2713 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2714 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2720 /* Return the next insn after INSN that is not a NOTE. This routine does not
2721 look inside SEQUENCEs. */
2724 next_nonnote_insn (insn)
2729 insn = NEXT_INSN (insn);
2730 if (insn == 0 || GET_CODE (insn) != NOTE)
2737 /* Return the previous insn before INSN that is not a NOTE. This routine does
2738 not look inside SEQUENCEs. */
2741 prev_nonnote_insn (insn)
2746 insn = PREV_INSN (insn);
2747 if (insn == 0 || GET_CODE (insn) != NOTE)
2754 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2755 or 0, if there is none. This routine does not look inside
2759 next_real_insn (insn)
2764 insn = NEXT_INSN (insn);
2765 if (insn == 0 || GET_CODE (insn) == INSN
2766 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2773 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2774 or 0, if there is none. This routine does not look inside
2778 prev_real_insn (insn)
2783 insn = PREV_INSN (insn);
2784 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2785 || GET_CODE (insn) == JUMP_INSN)
2792 /* Find the next insn after INSN that really does something. This routine
2793 does not look inside SEQUENCEs. Until reload has completed, this is the
2794 same as next_real_insn. */
2797 active_insn_p (insn)
2800 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2801 || (GET_CODE (insn) == INSN
2802 && (! reload_completed
2803 || (GET_CODE (PATTERN (insn)) != USE
2804 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2808 next_active_insn (insn)
2813 insn = NEXT_INSN (insn);
2814 if (insn == 0 || active_insn_p (insn))
2821 /* Find the last insn before INSN that really does something. This routine
2822 does not look inside SEQUENCEs. Until reload has completed, this is the
2823 same as prev_real_insn. */
2826 prev_active_insn (insn)
2831 insn = PREV_INSN (insn);
2832 if (insn == 0 || active_insn_p (insn))
2839 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2847 insn = NEXT_INSN (insn);
2848 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2855 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2863 insn = PREV_INSN (insn);
2864 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2872 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2873 and REG_CC_USER notes so we can find it. */
2876 link_cc0_insns (insn)
2879 rtx user = next_nonnote_insn (insn);
2881 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2882 user = XVECEXP (PATTERN (user), 0, 0);
2884 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2886 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2889 /* Return the next insn that uses CC0 after INSN, which is assumed to
2890 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2891 applied to the result of this function should yield INSN).
2893 Normally, this is simply the next insn. However, if a REG_CC_USER note
2894 is present, it contains the insn that uses CC0.
2896 Return 0 if we can't find the insn. */
2899 next_cc0_user (insn)
2902 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2905 return XEXP (note, 0);
2907 insn = next_nonnote_insn (insn);
2908 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2909 insn = XVECEXP (PATTERN (insn), 0, 0);
2911 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2917 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2918 note, it is the previous insn. */
2921 prev_cc0_setter (insn)
2924 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2927 return XEXP (note, 0);
2929 insn = prev_nonnote_insn (insn);
2930 if (! sets_cc0_p (PATTERN (insn)))
2937 /* Increment the label uses for all labels present in rtx. */
2947 code = GET_CODE (x);
2948 if (code == LABEL_REF)
2949 LABEL_NUSES (XEXP (x, 0))++;
2951 fmt = GET_RTX_FORMAT (code);
2952 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2955 mark_label_nuses (XEXP (x, i));
2956 else if (fmt[i] == 'E')
2957 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2958 mark_label_nuses (XVECEXP (x, i, j));
2963 /* Try splitting insns that can be split for better scheduling.
2964 PAT is the pattern which might split.
2965 TRIAL is the insn providing PAT.
2966 LAST is non-zero if we should return the last insn of the sequence produced.
2968 If this routine succeeds in splitting, it returns the first or last
2969 replacement insn depending on the value of LAST. Otherwise, it
2970 returns TRIAL. If the insn to be returned can be split, it will be. */
2973 try_split (pat, trial, last)
2977 rtx before = PREV_INSN (trial);
2978 rtx after = NEXT_INSN (trial);
2979 int has_barrier = 0;
2984 if (any_condjump_p (trial)
2985 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2986 split_branch_probability = INTVAL (XEXP (note, 0));
2987 probability = split_branch_probability;
2989 seq = split_insns (pat, trial);
2991 split_branch_probability = -1;
2993 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2994 We may need to handle this specially. */
2995 if (after && GET_CODE (after) == BARRIER)
2998 after = NEXT_INSN (after);
3003 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
3004 The latter case will normally arise only when being done so that
3005 it, in turn, will be split (SFmode on the 29k is an example). */
3006 if (GET_CODE (seq) == SEQUENCE)
3010 /* Avoid infinite loop if any insn of the result matches
3011 the original pattern. */
3012 for (i = 0; i < XVECLEN (seq, 0); i++)
3013 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
3014 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
3018 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3019 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
3021 rtx insn = XVECEXP (seq, 0, i);
3022 mark_jump_label (PATTERN (insn),
3023 XVECEXP (seq, 0, i), 0);
3025 if (probability != -1
3026 && any_condjump_p (insn)
3027 && !find_reg_note (insn, REG_BR_PROB, 0))
3029 /* We can preserve the REG_BR_PROB notes only if exactly
3030 one jump is created, otherwise the machine description
3031 is responsible for this step using
3032 split_branch_probability variable. */
3036 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3037 GEN_INT (probability),
3042 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3043 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3044 if (GET_CODE (trial) == CALL_INSN)
3045 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3046 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
3047 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
3048 = CALL_INSN_FUNCTION_USAGE (trial);
3050 /* Copy notes, particularly those related to the CFG. */
3051 for (note = REG_NOTES (trial); note ; note = XEXP (note, 1))
3053 switch (REG_NOTE_KIND (note))
3056 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3058 rtx insn = XVECEXP (seq, 0, i);
3059 if (GET_CODE (insn) == CALL_INSN
3060 || (flag_non_call_exceptions
3061 && may_trap_p (PATTERN (insn))))
3063 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3071 case REG_ALWAYS_RETURN:
3072 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3074 rtx insn = XVECEXP (seq, 0, i);
3075 if (GET_CODE (insn) == CALL_INSN)
3077 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3083 case REG_NON_LOCAL_GOTO:
3084 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3086 rtx insn = XVECEXP (seq, 0, i);
3087 if (GET_CODE (insn) == JUMP_INSN)
3089 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3100 /* If there are LABELS inside the split insns increment the
3101 usage count so we don't delete the label. */
3102 if (GET_CODE (trial) == INSN)
3103 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3104 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
3105 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
3107 tem = emit_insn_after (seq, trial);
3109 delete_related_insns (trial);
3111 emit_barrier_after (tem);
3113 /* Recursively call try_split for each new insn created; by the
3114 time control returns here that insn will be fully split, so
3115 set LAST and continue from the insn after the one returned.
3116 We can't use next_active_insn here since AFTER may be a note.
3117 Ignore deleted insns, which can be occur if not optimizing. */
3118 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3119 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3120 tem = try_split (PATTERN (tem), tem, 1);
3122 /* Avoid infinite loop if the result matches the original pattern. */
3123 else if (rtx_equal_p (seq, pat))
3127 PATTERN (trial) = seq;
3128 INSN_CODE (trial) = -1;
3129 try_split (seq, trial, last);
3132 /* Return either the first or the last insn, depending on which was
3135 ? (after ? PREV_INSN (after) : last_insn)
3136 : NEXT_INSN (before);
3142 /* Make and return an INSN rtx, initializing all its slots.
3143 Store PATTERN in the pattern slots. */
3146 make_insn_raw (pattern)
3151 insn = rtx_alloc (INSN);
3153 INSN_UID (insn) = cur_insn_uid++;
3154 PATTERN (insn) = pattern;
3155 INSN_CODE (insn) = -1;
3156 LOG_LINKS (insn) = NULL;
3157 REG_NOTES (insn) = NULL;
3159 #ifdef ENABLE_RTL_CHECKING
3162 && (returnjump_p (insn)
3163 || (GET_CODE (insn) == SET
3164 && SET_DEST (insn) == pc_rtx)))
3166 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3174 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
3177 make_jump_insn_raw (pattern)
3182 insn = rtx_alloc (JUMP_INSN);
3183 INSN_UID (insn) = cur_insn_uid++;
3185 PATTERN (insn) = pattern;
3186 INSN_CODE (insn) = -1;
3187 LOG_LINKS (insn) = NULL;
3188 REG_NOTES (insn) = NULL;
3189 JUMP_LABEL (insn) = NULL;
3194 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
3197 make_call_insn_raw (pattern)
3202 insn = rtx_alloc (CALL_INSN);
3203 INSN_UID (insn) = cur_insn_uid++;
3205 PATTERN (insn) = pattern;
3206 INSN_CODE (insn) = -1;
3207 LOG_LINKS (insn) = NULL;
3208 REG_NOTES (insn) = NULL;
3209 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3214 /* Add INSN to the end of the doubly-linked list.
3215 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3221 PREV_INSN (insn) = last_insn;
3222 NEXT_INSN (insn) = 0;
3224 if (NULL != last_insn)
3225 NEXT_INSN (last_insn) = insn;
3227 if (NULL == first_insn)
3233 /* Add INSN into the doubly-linked list after insn AFTER. This and
3234 the next should be the only functions called to insert an insn once
3235 delay slots have been filled since only they know how to update a
3239 add_insn_after (insn, after)
3242 rtx next = NEXT_INSN (after);
3245 if (optimize && INSN_DELETED_P (after))
3248 NEXT_INSN (insn) = next;
3249 PREV_INSN (insn) = after;
3253 PREV_INSN (next) = insn;
3254 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3255 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3257 else if (last_insn == after)
3261 struct sequence_stack *stack = seq_stack;
3262 /* Scan all pending sequences too. */
3263 for (; stack; stack = stack->next)
3264 if (after == stack->last)
3274 if (basic_block_for_insn
3275 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3276 && (bb = BLOCK_FOR_INSN (after)))
3278 set_block_for_insn (insn, bb);
3279 /* Should not happen as first in the BB is always
3280 either NOTE or LABEL. */
3281 if (bb->end == after
3282 /* Avoid clobbering of structure when creating new BB. */
3283 && GET_CODE (insn) != BARRIER
3284 && (GET_CODE (insn) != NOTE
3285 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3289 NEXT_INSN (after) = insn;
3290 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3292 rtx sequence = PATTERN (after);
3293 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3297 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3298 the previous should be the only functions called to insert an insn once
3299 delay slots have been filled since only they know how to update a
3303 add_insn_before (insn, before)
3306 rtx prev = PREV_INSN (before);
3309 if (optimize && INSN_DELETED_P (before))
3312 PREV_INSN (insn) = prev;
3313 NEXT_INSN (insn) = before;
3317 NEXT_INSN (prev) = insn;
3318 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3320 rtx sequence = PATTERN (prev);
3321 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3324 else if (first_insn == before)
3328 struct sequence_stack *stack = seq_stack;
3329 /* Scan all pending sequences too. */
3330 for (; stack; stack = stack->next)
3331 if (before == stack->first)
3333 stack->first = insn;
3341 if (basic_block_for_insn
3342 && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements
3343 && (bb = BLOCK_FOR_INSN (before)))
3345 set_block_for_insn (insn, bb);
3346 /* Should not happen as first in the BB is always
3347 either NOTE or LABEl. */
3348 if (bb->head == insn
3349 /* Avoid clobbering of structure when creating new BB. */
3350 && GET_CODE (insn) != BARRIER
3351 && (GET_CODE (insn) != NOTE
3352 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3356 PREV_INSN (before) = insn;
3357 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3358 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3361 /* Remove an insn from its doubly-linked list. This function knows how
3362 to handle sequences. */
3367 rtx next = NEXT_INSN (insn);
3368 rtx prev = PREV_INSN (insn);
3373 NEXT_INSN (prev) = next;
3374 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3376 rtx sequence = PATTERN (prev);
3377 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3380 else if (first_insn == insn)
3384 struct sequence_stack *stack = seq_stack;
3385 /* Scan all pending sequences too. */
3386 for (; stack; stack = stack->next)
3387 if (insn == stack->first)
3389 stack->first = next;
3399 PREV_INSN (next) = prev;
3400 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3401 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3403 else if (last_insn == insn)
3407 struct sequence_stack *stack = seq_stack;
3408 /* Scan all pending sequences too. */
3409 for (; stack; stack = stack->next)
3410 if (insn == stack->last)
3419 if (basic_block_for_insn
3420 && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements
3421 && (bb = BLOCK_FOR_INSN (insn)))
3423 if (bb->head == insn)
3425 /* Never ever delete the basic block note without deleting whole basic
3427 if (GET_CODE (insn) == NOTE)
3431 if (bb->end == insn)
3436 /* Delete all insns made since FROM.
3437 FROM becomes the new last instruction. */
3440 delete_insns_since (from)
3446 NEXT_INSN (from) = 0;
3450 /* This function is deprecated, please use sequences instead.
3452 Move a consecutive bunch of insns to a different place in the chain.
3453 The insns to be moved are those between FROM and TO.
3454 They are moved to a new position after the insn AFTER.
3455 AFTER must not be FROM or TO or any insn in between.
3457 This function does not know about SEQUENCEs and hence should not be
3458 called after delay-slot filling has been done. */
3461 reorder_insns_nobb (from, to, after)
3462 rtx from, to, after;
3464 /* Splice this bunch out of where it is now. */
3465 if (PREV_INSN (from))
3466 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3468 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3469 if (last_insn == to)
3470 last_insn = PREV_INSN (from);
3471 if (first_insn == from)
3472 first_insn = NEXT_INSN (to);
3474 /* Make the new neighbors point to it and it to them. */
3475 if (NEXT_INSN (after))
3476 PREV_INSN (NEXT_INSN (after)) = to;
3478 NEXT_INSN (to) = NEXT_INSN (after);
3479 PREV_INSN (from) = after;
3480 NEXT_INSN (after) = from;
3481 if (after == last_insn)
3485 /* Same as function above, but take care to update BB boundaries. */
3487 reorder_insns (from, to, after)
3488 rtx from, to, after;
3490 rtx prev = PREV_INSN (from);
3491 basic_block bb, bb2;
3493 reorder_insns_nobb (from, to, after);
3495 if (basic_block_for_insn
3496 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3497 && (bb = BLOCK_FOR_INSN (after)))
3501 if (basic_block_for_insn
3502 && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements
3503 && (bb2 = BLOCK_FOR_INSN (from)))
3509 if (bb->end == after)
3512 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3513 set_block_for_insn (x, bb);
3517 /* Return the line note insn preceding INSN. */
3520 find_line_note (insn)
3523 if (no_line_numbers)
3526 for (; insn; insn = PREV_INSN (insn))
3527 if (GET_CODE (insn) == NOTE
3528 && NOTE_LINE_NUMBER (insn) >= 0)
3534 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3535 of the moved insns when debugging. This may insert a note between AFTER
3536 and FROM, and another one after TO. */
3539 reorder_insns_with_line_notes (from, to, after)
3540 rtx from, to, after;
3542 rtx from_line = find_line_note (from);
3543 rtx after_line = find_line_note (after);
3545 reorder_insns (from, to, after);
3547 if (from_line == after_line)
3551 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3552 NOTE_LINE_NUMBER (from_line),
3555 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3556 NOTE_LINE_NUMBER (after_line),
3560 /* Remove unnecessary notes from the instruction stream. */
3563 remove_unnecessary_notes ()
3565 rtx block_stack = NULL_RTX;
3566 rtx eh_stack = NULL_RTX;
3571 /* We must not remove the first instruction in the function because
3572 the compiler depends on the first instruction being a note. */
3573 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3575 /* Remember what's next. */
3576 next = NEXT_INSN (insn);
3578 /* We're only interested in notes. */
3579 if (GET_CODE (insn) != NOTE)
3582 switch (NOTE_LINE_NUMBER (insn))
3584 case NOTE_INSN_DELETED:
3585 case NOTE_INSN_LOOP_END_TOP_COND:
3589 case NOTE_INSN_EH_REGION_BEG:
3590 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3593 case NOTE_INSN_EH_REGION_END:
3594 /* Too many end notes. */
3595 if (eh_stack == NULL_RTX)
3597 /* Mismatched nesting. */
3598 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3601 eh_stack = XEXP (eh_stack, 1);
3602 free_INSN_LIST_node (tmp);
3605 case NOTE_INSN_BLOCK_BEG:
3606 /* By now, all notes indicating lexical blocks should have
3607 NOTE_BLOCK filled in. */
3608 if (NOTE_BLOCK (insn) == NULL_TREE)
3610 block_stack = alloc_INSN_LIST (insn, block_stack);
3613 case NOTE_INSN_BLOCK_END:
3614 /* Too many end notes. */
3615 if (block_stack == NULL_RTX)
3617 /* Mismatched nesting. */
3618 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3621 block_stack = XEXP (block_stack, 1);
3622 free_INSN_LIST_node (tmp);
3624 /* Scan back to see if there are any non-note instructions
3625 between INSN and the beginning of this block. If not,
3626 then there is no PC range in the generated code that will
3627 actually be in this block, so there's no point in
3628 remembering the existence of the block. */
3629 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3631 /* This block contains a real instruction. Note that we
3632 don't include labels; if the only thing in the block
3633 is a label, then there are still no PC values that
3634 lie within the block. */
3638 /* We're only interested in NOTEs. */
3639 if (GET_CODE (tmp) != NOTE)
3642 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3644 /* We just verified that this BLOCK matches us with
3645 the block_stack check above. Never delete the
3646 BLOCK for the outermost scope of the function; we
3647 can refer to names from that scope even if the
3648 block notes are messed up. */
3649 if (! is_body_block (NOTE_BLOCK (insn))
3650 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3657 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3658 /* There's a nested block. We need to leave the
3659 current block in place since otherwise the debugger
3660 wouldn't be able to show symbols from our block in
3661 the nested block. */
3667 /* Too many begin notes. */
3668 if (block_stack || eh_stack)
3673 /* Emit an insn of given code and pattern
3674 at a specified place within the doubly-linked list. */
3676 /* Make an instruction with body PATTERN
3677 and output it before the instruction BEFORE. */
3680 emit_insn_before (pattern, before)
3681 rtx pattern, before;
3685 if (GET_CODE (pattern) == SEQUENCE)
3689 for (i = 0; i < XVECLEN (pattern, 0); i++)
3691 insn = XVECEXP (pattern, 0, i);
3692 add_insn_before (insn, before);
3697 insn = make_insn_raw (pattern);
3698 add_insn_before (insn, before);
3704 /* Make an instruction with body PATTERN and code JUMP_INSN
3705 and output it before the instruction BEFORE. */
3708 emit_jump_insn_before (pattern, before)
3709 rtx pattern, before;
3713 if (GET_CODE (pattern) == SEQUENCE)
3714 insn = emit_insn_before (pattern, before);
3717 insn = make_jump_insn_raw (pattern);
3718 add_insn_before (insn, before);
3724 /* Make an instruction with body PATTERN and code CALL_INSN
3725 and output it before the instruction BEFORE. */
3728 emit_call_insn_before (pattern, before)
3729 rtx pattern, before;
3733 if (GET_CODE (pattern) == SEQUENCE)
3734 insn = emit_insn_before (pattern, before);
3737 insn = make_call_insn_raw (pattern);
3738 add_insn_before (insn, before);
3739 PUT_CODE (insn, CALL_INSN);
3745 /* Make an insn of code BARRIER
3746 and output it before the insn BEFORE. */
3749 emit_barrier_before (before)
3752 rtx insn = rtx_alloc (BARRIER);
3754 INSN_UID (insn) = cur_insn_uid++;
3756 add_insn_before (insn, before);
3760 /* Emit the label LABEL before the insn BEFORE. */
3763 emit_label_before (label, before)
3766 /* This can be called twice for the same label as a result of the
3767 confusion that follows a syntax error! So make it harmless. */
3768 if (INSN_UID (label) == 0)
3770 INSN_UID (label) = cur_insn_uid++;
3771 add_insn_before (label, before);
3777 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3780 emit_note_before (subtype, before)
3784 rtx note = rtx_alloc (NOTE);
3785 INSN_UID (note) = cur_insn_uid++;
3786 NOTE_SOURCE_FILE (note) = 0;
3787 NOTE_LINE_NUMBER (note) = subtype;
3789 add_insn_before (note, before);
3793 /* Make an insn of code INSN with body PATTERN
3794 and output it after the insn AFTER. */
3797 emit_insn_after (pattern, after)
3802 if (GET_CODE (pattern) == SEQUENCE)
3806 for (i = 0; i < XVECLEN (pattern, 0); i++)
3808 insn = XVECEXP (pattern, 0, i);
3809 add_insn_after (insn, after);
3815 insn = make_insn_raw (pattern);
3816 add_insn_after (insn, after);
3822 /* Similar to emit_insn_after, except that line notes are to be inserted so
3823 as to act as if this insn were at FROM. */
3826 emit_insn_after_with_line_notes (pattern, after, from)
3827 rtx pattern, after, from;
3829 rtx from_line = find_line_note (from);
3830 rtx after_line = find_line_note (after);
3831 rtx insn = emit_insn_after (pattern, after);
3834 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3835 NOTE_LINE_NUMBER (from_line),
3839 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3840 NOTE_LINE_NUMBER (after_line),
3844 /* Make an insn of code JUMP_INSN with body PATTERN
3845 and output it after the insn AFTER. */
3848 emit_jump_insn_after (pattern, after)
3853 if (GET_CODE (pattern) == SEQUENCE)
3854 insn = emit_insn_after (pattern, after);
3857 insn = make_jump_insn_raw (pattern);
3858 add_insn_after (insn, after);
3864 /* Make an insn of code BARRIER
3865 and output it after the insn AFTER. */
3868 emit_barrier_after (after)
3871 rtx insn = rtx_alloc (BARRIER);
3873 INSN_UID (insn) = cur_insn_uid++;
3875 add_insn_after (insn, after);
3879 /* Emit the label LABEL after the insn AFTER. */
3882 emit_label_after (label, after)
3885 /* This can be called twice for the same label
3886 as a result of the confusion that follows a syntax error!
3887 So make it harmless. */
3888 if (INSN_UID (label) == 0)
3890 INSN_UID (label) = cur_insn_uid++;
3891 add_insn_after (label, after);
3897 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3900 emit_note_after (subtype, after)
3904 rtx note = rtx_alloc (NOTE);
3905 INSN_UID (note) = cur_insn_uid++;
3906 NOTE_SOURCE_FILE (note) = 0;
3907 NOTE_LINE_NUMBER (note) = subtype;
3908 add_insn_after (note, after);
3912 /* Emit a line note for FILE and LINE after the insn AFTER. */
3915 emit_line_note_after (file, line, after)
3922 if (no_line_numbers && line > 0)
3928 note = rtx_alloc (NOTE);
3929 INSN_UID (note) = cur_insn_uid++;
3930 NOTE_SOURCE_FILE (note) = file;
3931 NOTE_LINE_NUMBER (note) = line;
3932 add_insn_after (note, after);
3936 /* Make an insn of code INSN with pattern PATTERN
3937 and add it to the end of the doubly-linked list.
3938 If PATTERN is a SEQUENCE, take the elements of it
3939 and emit an insn for each element.
3941 Returns the last insn emitted. */
3947 rtx insn = last_insn;
3949 if (GET_CODE (pattern) == SEQUENCE)
3953 for (i = 0; i < XVECLEN (pattern, 0); i++)
3955 insn = XVECEXP (pattern, 0, i);
3961 insn = make_insn_raw (pattern);
3968 /* Emit the insns in a chain starting with INSN.
3969 Return the last insn emitted. */
3979 rtx next = NEXT_INSN (insn);
3988 /* Emit the insns in a chain starting with INSN and place them in front of
3989 the insn BEFORE. Return the last insn emitted. */
3992 emit_insns_before (insn, before)
4000 rtx next = NEXT_INSN (insn);
4001 add_insn_before (insn, before);
4009 /* Emit the insns in a chain starting with FIRST and place them in back of
4010 the insn AFTER. Return the last insn emitted. */
4013 emit_insns_after (first, after)
4027 if (basic_block_for_insn
4028 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
4029 && (bb = BLOCK_FOR_INSN (after)))
4031 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4032 set_block_for_insn (last, bb);
4033 set_block_for_insn (last, bb);
4034 if (bb->end == after)
4038 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4041 after_after = NEXT_INSN (after);
4043 NEXT_INSN (after) = first;
4044 PREV_INSN (first) = after;
4045 NEXT_INSN (last) = after_after;
4047 PREV_INSN (after_after) = last;
4049 if (after == last_insn)
4054 /* Make an insn of code JUMP_INSN with pattern PATTERN
4055 and add it to the end of the doubly-linked list. */
4058 emit_jump_insn (pattern)
4061 if (GET_CODE (pattern) == SEQUENCE)
4062 return emit_insn (pattern);
4065 rtx insn = make_jump_insn_raw (pattern);
4071 /* Make an insn of code CALL_INSN with pattern PATTERN
4072 and add it to the end of the doubly-linked list. */
4075 emit_call_insn (pattern)
4078 if (GET_CODE (pattern) == SEQUENCE)
4079 return emit_insn (pattern);
4082 rtx insn = make_call_insn_raw (pattern);
4084 PUT_CODE (insn, CALL_INSN);
4089 /* Add the label LABEL to the end of the doubly-linked list. */
4095 /* This can be called twice for the same label
4096 as a result of the confusion that follows a syntax error!
4097 So make it harmless. */
4098 if (INSN_UID (label) == 0)
4100 INSN_UID (label) = cur_insn_uid++;
4106 /* Make an insn of code BARRIER
4107 and add it to the end of the doubly-linked list. */
4112 rtx barrier = rtx_alloc (BARRIER);
4113 INSN_UID (barrier) = cur_insn_uid++;
4118 /* Make an insn of code NOTE
4119 with data-fields specified by FILE and LINE
4120 and add it to the end of the doubly-linked list,
4121 but only if line-numbers are desired for debugging info. */
4124 emit_line_note (file, line)
4128 set_file_and_line_for_stmt (file, line);
4131 if (no_line_numbers)
4135 return emit_note (file, line);
4138 /* Make an insn of code NOTE
4139 with data-fields specified by FILE and LINE
4140 and add it to the end of the doubly-linked list.
4141 If it is a line-number NOTE, omit it if it matches the previous one. */
4144 emit_note (file, line)
4152 if (file && last_filename && !strcmp (file, last_filename)
4153 && line == last_linenum)
4155 last_filename = file;
4156 last_linenum = line;
4159 if (no_line_numbers && line > 0)
4165 note = rtx_alloc (NOTE);
4166 INSN_UID (note) = cur_insn_uid++;
4167 NOTE_SOURCE_FILE (note) = file;
4168 NOTE_LINE_NUMBER (note) = line;
4173 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4176 emit_line_note_force (file, line)
4181 return emit_line_note (file, line);
4184 /* Cause next statement to emit a line note even if the line number
4185 has not changed. This is used at the beginning of a function. */
4188 force_next_line_note ()
4193 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4194 note of this type already exists, remove it first. */
4197 set_unique_reg_note (insn, kind, datum)
4202 rtx note = find_reg_note (insn, kind, NULL_RTX);
4208 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4209 has multiple sets (some callers assume single_set
4210 means the insn only has one set, when in fact it
4211 means the insn only has one * useful * set). */
4212 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4219 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4220 It serves no useful purpose and breaks eliminate_regs. */
4221 if (GET_CODE (datum) == ASM_OPERANDS)
4231 XEXP (note, 0) = datum;
4235 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4236 return REG_NOTES (insn);
4239 /* Return an indication of which type of insn should have X as a body.
4240 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4246 if (GET_CODE (x) == CODE_LABEL)
4248 if (GET_CODE (x) == CALL)
4250 if (GET_CODE (x) == RETURN)
4252 if (GET_CODE (x) == SET)
4254 if (SET_DEST (x) == pc_rtx)
4256 else if (GET_CODE (SET_SRC (x)) == CALL)
4261 if (GET_CODE (x) == PARALLEL)
4264 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4265 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4267 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4268 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4270 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4271 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4277 /* Emit the rtl pattern X as an appropriate kind of insn.
4278 If X is a label, it is simply added into the insn chain. */
4284 enum rtx_code code = classify_insn (x);
4286 if (code == CODE_LABEL)
4287 return emit_label (x);
4288 else if (code == INSN)
4289 return emit_insn (x);
4290 else if (code == JUMP_INSN)
4292 rtx insn = emit_jump_insn (x);
4293 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4294 return emit_barrier ();
4297 else if (code == CALL_INSN)
4298 return emit_call_insn (x);
4303 /* Begin emitting insns to a sequence which can be packaged in an
4304 RTL_EXPR. If this sequence will contain something that might cause
4305 the compiler to pop arguments to function calls (because those
4306 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4307 details), use do_pending_stack_adjust before calling this function.
4308 That will ensure that the deferred pops are not accidentally
4309 emitted in the middle of this sequence. */
4314 struct sequence_stack *tem;
4316 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4318 tem->next = seq_stack;
4319 tem->first = first_insn;
4320 tem->last = last_insn;
4321 tem->sequence_rtl_expr = seq_rtl_expr;
4329 /* Similarly, but indicate that this sequence will be placed in T, an
4330 RTL_EXPR. See the documentation for start_sequence for more
4331 information about how to use this function. */
4334 start_sequence_for_rtl_expr (t)
4342 /* Set up the insn chain starting with FIRST as the current sequence,
4343 saving the previously current one. See the documentation for
4344 start_sequence for more information about how to use this function. */
4347 push_to_sequence (first)
4354 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4360 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4363 push_to_full_sequence (first, last)
4369 /* We really should have the end of the insn chain here. */
4370 if (last && NEXT_INSN (last))
4374 /* Set up the outer-level insn chain
4375 as the current sequence, saving the previously current one. */
4378 push_topmost_sequence ()
4380 struct sequence_stack *stack, *top = NULL;
4384 for (stack = seq_stack; stack; stack = stack->next)
4387 first_insn = top->first;
4388 last_insn = top->last;
4389 seq_rtl_expr = top->sequence_rtl_expr;
4392 /* After emitting to the outer-level insn chain, update the outer-level
4393 insn chain, and restore the previous saved state. */
4396 pop_topmost_sequence ()
4398 struct sequence_stack *stack, *top = NULL;
4400 for (stack = seq_stack; stack; stack = stack->next)
4403 top->first = first_insn;
4404 top->last = last_insn;
4405 /* ??? Why don't we save seq_rtl_expr here? */
4410 /* After emitting to a sequence, restore previous saved state.
4412 To get the contents of the sequence just made, you must call
4413 `gen_sequence' *before* calling here.
4415 If the compiler might have deferred popping arguments while
4416 generating this sequence, and this sequence will not be immediately
4417 inserted into the instruction stream, use do_pending_stack_adjust
4418 before calling gen_sequence. That will ensure that the deferred
4419 pops are inserted into this sequence, and not into some random
4420 location in the instruction stream. See INHIBIT_DEFER_POP for more
4421 information about deferred popping of arguments. */
4426 struct sequence_stack *tem = seq_stack;
4428 first_insn = tem->first;
4429 last_insn = tem->last;
4430 seq_rtl_expr = tem->sequence_rtl_expr;
4431 seq_stack = tem->next;
4436 /* This works like end_sequence, but records the old sequence in FIRST
4440 end_full_sequence (first, last)
4443 *first = first_insn;
4448 /* Return 1 if currently emitting into a sequence. */
4453 return seq_stack != 0;
4456 /* Generate a SEQUENCE rtx containing the insns already emitted
4457 to the current sequence.
4459 This is how the gen_... function from a DEFINE_EXPAND
4460 constructs the SEQUENCE that it returns. */
4470 /* Count the insns in the chain. */
4472 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4475 /* If only one insn, return it rather than a SEQUENCE.
4476 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4477 the case of an empty list.)
4478 We only return the pattern of an insn if its code is INSN and it
4479 has no notes. This ensures that no information gets lost. */
4481 && ! RTX_FRAME_RELATED_P (first_insn)
4482 && GET_CODE (first_insn) == INSN
4483 /* Don't throw away any reg notes. */
4484 && REG_NOTES (first_insn) == 0)
4485 return PATTERN (first_insn);
4487 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4489 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4490 XVECEXP (result, 0, i) = tem;
4495 /* Put the various virtual registers into REGNO_REG_RTX. */
4498 init_virtual_regs (es)
4499 struct emit_status *es;
4501 rtx *ptr = es->x_regno_reg_rtx;
4502 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4503 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4504 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4505 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4506 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4510 clear_emit_caches ()
4514 /* Clear the start_sequence/gen_sequence cache. */
4515 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4516 sequence_result[i] = 0;
4520 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4521 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4522 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4523 static int copy_insn_n_scratches;
4525 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4526 copied an ASM_OPERANDS.
4527 In that case, it is the original input-operand vector. */
4528 static rtvec orig_asm_operands_vector;
4530 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4531 copied an ASM_OPERANDS.
4532 In that case, it is the copied input-operand vector. */
4533 static rtvec copy_asm_operands_vector;
4535 /* Likewise for the constraints vector. */
4536 static rtvec orig_asm_constraints_vector;
4537 static rtvec copy_asm_constraints_vector;
4539 /* Recursively create a new copy of an rtx for copy_insn.
4540 This function differs from copy_rtx in that it handles SCRATCHes and
4541 ASM_OPERANDs properly.
4542 Normally, this function is not used directly; use copy_insn as front end.
4543 However, you could first copy an insn pattern with copy_insn and then use
4544 this function afterwards to properly copy any REG_NOTEs containing
4554 const char *format_ptr;
4556 code = GET_CODE (orig);
4573 for (i = 0; i < copy_insn_n_scratches; i++)
4574 if (copy_insn_scratch_in[i] == orig)
4575 return copy_insn_scratch_out[i];
4579 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4580 a LABEL_REF, it isn't sharable. */
4581 if (GET_CODE (XEXP (orig, 0)) == PLUS
4582 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4583 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4587 /* A MEM with a constant address is not sharable. The problem is that
4588 the constant address may need to be reloaded. If the mem is shared,
4589 then reloading one copy of this mem will cause all copies to appear
4590 to have been reloaded. */
4596 copy = rtx_alloc (code);
4598 /* Copy the various flags, and other information. We assume that
4599 all fields need copying, and then clear the fields that should
4600 not be copied. That is the sensible default behavior, and forces
4601 us to explicitly document why we are *not* copying a flag. */
4602 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4604 /* We do not copy the USED flag, which is used as a mark bit during
4605 walks over the RTL. */
4608 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4609 if (GET_RTX_CLASS (code) == 'i')
4613 copy->frame_related = 0;
4616 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4618 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4620 copy->fld[i] = orig->fld[i];
4621 switch (*format_ptr++)
4624 if (XEXP (orig, i) != NULL)
4625 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4630 if (XVEC (orig, i) == orig_asm_constraints_vector)
4631 XVEC (copy, i) = copy_asm_constraints_vector;
4632 else if (XVEC (orig, i) == orig_asm_operands_vector)
4633 XVEC (copy, i) = copy_asm_operands_vector;
4634 else if (XVEC (orig, i) != NULL)
4636 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4637 for (j = 0; j < XVECLEN (copy, i); j++)
4638 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4649 /* These are left unchanged. */
4657 if (code == SCRATCH)
4659 i = copy_insn_n_scratches++;
4660 if (i >= MAX_RECOG_OPERANDS)
4662 copy_insn_scratch_in[i] = orig;
4663 copy_insn_scratch_out[i] = copy;
4665 else if (code == ASM_OPERANDS)
4667 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4668 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4669 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4670 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4676 /* Create a new copy of an rtx.
4677 This function differs from copy_rtx in that it handles SCRATCHes and
4678 ASM_OPERANDs properly.
4679 INSN doesn't really have to be a full INSN; it could be just the
4685 copy_insn_n_scratches = 0;
4686 orig_asm_operands_vector = 0;
4687 orig_asm_constraints_vector = 0;
4688 copy_asm_operands_vector = 0;
4689 copy_asm_constraints_vector = 0;
4690 return copy_insn_1 (insn);
4693 /* Initialize data structures and variables in this file
4694 before generating rtl for each function. */
4699 struct function *f = cfun;
4701 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4704 seq_rtl_expr = NULL;
4706 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4709 first_label_num = label_num;
4713 clear_emit_caches ();
4715 /* Init the tables that describe all the pseudo regs. */
4717 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4719 f->emit->regno_pointer_align
4720 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4721 sizeof (unsigned char));
4724 = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx));
4727 = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree));
4729 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4730 init_virtual_regs (f->emit);
4732 /* Indicate that the virtual registers and stack locations are
4734 REG_POINTER (stack_pointer_rtx) = 1;
4735 REG_POINTER (frame_pointer_rtx) = 1;
4736 REG_POINTER (hard_frame_pointer_rtx) = 1;
4737 REG_POINTER (arg_pointer_rtx) = 1;
4739 REG_POINTER (virtual_incoming_args_rtx) = 1;
4740 REG_POINTER (virtual_stack_vars_rtx) = 1;
4741 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4742 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4743 REG_POINTER (virtual_cfa_rtx) = 1;
4745 #ifdef STACK_BOUNDARY
4746 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4747 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4748 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4749 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4751 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4752 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4753 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4754 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4755 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4758 #ifdef INIT_EXPANDERS
4763 /* Mark SS for GC. */
4766 mark_sequence_stack (ss)
4767 struct sequence_stack *ss;
4771 ggc_mark_rtx (ss->first);
4772 ggc_mark_tree (ss->sequence_rtl_expr);
4777 /* Mark ES for GC. */
4780 mark_emit_status (es)
4781 struct emit_status *es;
4790 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx,
4792 i > 0; --i, ++r, ++t)
4798 mark_sequence_stack (es->sequence_stack);
4799 ggc_mark_tree (es->sequence_rtl_expr);
4800 ggc_mark_rtx (es->x_first_insn);
4803 /* Generate the constant 0. */
4806 gen_const_vector_0 (mode)
4807 enum machine_mode mode;
4812 enum machine_mode inner;
4814 units = GET_MODE_NUNITS (mode);
4815 inner = GET_MODE_INNER (mode);
4817 v = rtvec_alloc (units);
4819 /* We need to call this function after we to set CONST0_RTX first. */
4820 if (!CONST0_RTX (inner))
4823 for (i = 0; i < units; ++i)
4824 RTVEC_ELT (v, i) = CONST0_RTX (inner);
4826 tem = gen_rtx_CONST_VECTOR (mode, v);
4830 /* Create some permanent unique rtl objects shared between all functions.
4831 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4834 init_emit_once (line_numbers)
4838 enum machine_mode mode;
4839 enum machine_mode double_mode;
4841 /* Initialize the CONST_INT and memory attribute hash tables. */
4842 const_int_htab = htab_create (37, const_int_htab_hash,
4843 const_int_htab_eq, NULL);
4844 ggc_add_deletable_htab (const_int_htab, 0, 0);
4846 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4847 mem_attrs_htab_eq, NULL);
4848 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4850 no_line_numbers = ! line_numbers;
4852 /* Compute the word and byte modes. */
4854 byte_mode = VOIDmode;
4855 word_mode = VOIDmode;
4856 double_mode = VOIDmode;
4858 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4859 mode = GET_MODE_WIDER_MODE (mode))
4861 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4862 && byte_mode == VOIDmode)
4865 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4866 && word_mode == VOIDmode)
4870 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4871 mode = GET_MODE_WIDER_MODE (mode))
4873 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4874 && double_mode == VOIDmode)
4878 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4880 /* Assign register numbers to the globally defined register rtx.
4881 This must be done at runtime because the register number field
4882 is in a union and some compilers can't initialize unions. */
4884 pc_rtx = gen_rtx (PC, VOIDmode);
4885 cc0_rtx = gen_rtx (CC0, VOIDmode);
4886 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4887 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4888 if (hard_frame_pointer_rtx == 0)
4889 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4890 HARD_FRAME_POINTER_REGNUM);
4891 if (arg_pointer_rtx == 0)
4892 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4893 virtual_incoming_args_rtx =
4894 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4895 virtual_stack_vars_rtx =
4896 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4897 virtual_stack_dynamic_rtx =
4898 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4899 virtual_outgoing_args_rtx =
4900 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4901 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4903 /* These rtx must be roots if GC is enabled. */
4904 ggc_add_rtx_root (global_rtl, GR_MAX);
4906 #ifdef INIT_EXPANDERS
4907 /* This is to initialize {init|mark|free}_machine_status before the first
4908 call to push_function_context_to. This is needed by the Chill front
4909 end which calls push_function_context_to before the first call to
4910 init_function_start. */
4914 /* Create the unique rtx's for certain rtx codes and operand values. */
4916 /* Don't use gen_rtx here since gen_rtx in this case
4917 tries to use these variables. */
4918 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4919 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4920 gen_rtx_raw_CONST_INT (VOIDmode, i);
4921 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4923 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4924 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4925 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4927 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4929 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4930 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4931 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4932 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4934 for (i = 0; i <= 2; i++)
4936 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4937 mode = GET_MODE_WIDER_MODE (mode))
4939 rtx tem = rtx_alloc (CONST_DOUBLE);
4940 union real_extract u;
4942 /* Zero any holes in a structure. */
4943 memset ((char *) &u, 0, sizeof u);
4944 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4946 /* Avoid trailing garbage in the rtx. */
4947 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4948 CONST_DOUBLE_LOW (tem) = 0;
4949 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4950 CONST_DOUBLE_HIGH (tem) = 0;
4952 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4953 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4954 PUT_MODE (tem, mode);
4956 const_tiny_rtx[i][(int) mode] = tem;
4959 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4961 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4962 mode = GET_MODE_WIDER_MODE (mode))
4963 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4965 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4967 mode = GET_MODE_WIDER_MODE (mode))
4968 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4971 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
4973 mode = GET_MODE_WIDER_MODE (mode))
4974 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
4976 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
4978 mode = GET_MODE_WIDER_MODE (mode))
4979 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
4981 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4982 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4983 const_tiny_rtx[0][i] = const0_rtx;
4985 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4986 if (STORE_FLAG_VALUE == 1)
4987 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4989 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4990 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4991 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4992 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4993 ggc_add_rtx_root (&const_true_rtx, 1);
4995 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4996 return_address_pointer_rtx
4997 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5001 struct_value_rtx = STRUCT_VALUE;
5003 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5006 #ifdef STRUCT_VALUE_INCOMING
5007 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5009 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5010 struct_value_incoming_rtx
5011 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5013 struct_value_incoming_rtx = struct_value_rtx;
5017 #ifdef STATIC_CHAIN_REGNUM
5018 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5020 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5021 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5022 static_chain_incoming_rtx
5023 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5026 static_chain_incoming_rtx = static_chain_rtx;
5030 static_chain_rtx = STATIC_CHAIN;
5032 #ifdef STATIC_CHAIN_INCOMING
5033 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5035 static_chain_incoming_rtx = static_chain_rtx;
5039 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5040 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5042 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
5043 ggc_add_rtx_root (&struct_value_rtx, 1);
5044 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
5045 ggc_add_rtx_root (&static_chain_rtx, 1);
5046 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
5047 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
5050 /* Query and clear/ restore no_line_numbers. This is used by the
5051 switch / case handling in stmt.c to give proper line numbers in
5052 warnings about unreachable code. */
5055 force_line_numbers ()
5057 int old = no_line_numbers;
5059 no_line_numbers = 0;
5061 force_next_line_note ();
5066 restore_line_number_status (old_value)
5069 no_line_numbers = old_value;